1 /* 2 * ALSA driver for ICEnsemble ICE1712 (Envy24) 3 * 4 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * 20 */ 21 22 /* 23 NOTES: 24 - spdif nonaudio consumer mode does not work (at least with my 25 Sony STR-DB830) 26 */ 27 28 /* 29 * Changes: 30 * 31 * 2002.09.09 Takashi Iwai <tiwai@suse.de> 32 * split the code to several files. each low-level routine 33 * is stored in the local file and called from registration 34 * function from card_info struct. 35 * 36 * 2002.11.26 James Stafford <jstafford@ampltd.com> 37 * Added support for VT1724 (Envy24HT) 38 * I have left out support for 176.4 and 192 KHz for the moment. 39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401 40 * 41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de> 42 * Split vt1724 part to an independent driver. 43 * The GPIO is accessed through the callback functions now. 44 * 45 * 2004.03.31 Doug McLain <nostar@comcast.net> 46 * Added support for Event Electronics EZ8 card to hoontech.c. 47 */ 48 49 50 #include <sound/driver.h> 51 #include <asm/io.h> 52 #include <linux/delay.h> 53 #include <linux/interrupt.h> 54 #include <linux/init.h> 55 #include <linux/pci.h> 56 #include <linux/dma-mapping.h> 57 #include <linux/slab.h> 58 #include <linux/moduleparam.h> 59 #include <linux/mutex.h> 60 61 #include <sound/core.h> 62 #include <sound/cs8427.h> 63 #include <sound/info.h> 64 #include <sound/initval.h> 65 #include <sound/tlv.h> 66 67 #include <sound/asoundef.h> 68 69 #include "ice1712.h" 70 71 /* lowlevel routines */ 72 #include "delta.h" 73 #include "ews.h" 74 #include "hoontech.h" 75 76 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); 77 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)"); 78 MODULE_LICENSE("GPL"); 79 MODULE_SUPPORTED_DEVICE("{" 80 HOONTECH_DEVICE_DESC 81 DELTA_DEVICE_DESC 82 EWS_DEVICE_DESC 83 "{ICEnsemble,Generic ICE1712}," 84 "{ICEnsemble,Generic Envy24}}"); 85 86 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 87 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 88 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ 89 static char *model[SNDRV_CARDS]; 90 static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */ 91 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */ 92 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */ 93 94 module_param_array(index, int, NULL, 0444); 95 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard."); 96 module_param_array(id, charp, NULL, 0444); 97 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard."); 98 module_param_array(enable, bool, NULL, 0444); 99 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard."); 100 module_param_array(omni, bool, NULL, 0444); 101 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support."); 102 module_param_array(cs8427_timeout, int, NULL, 0444); 103 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution."); 104 module_param_array(model, charp, NULL, 0444); 105 MODULE_PARM_DESC(model, "Use the given board model."); 106 module_param_array(dxr_enable, int, NULL, 0444); 107 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE."); 108 109 110 static const struct pci_device_id snd_ice1712_ids[] = { 111 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */ 112 { 0, } 113 }; 114 115 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids); 116 117 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice); 118 static int snd_ice1712_build_controls(struct snd_ice1712 *ice); 119 120 static int PRO_RATE_LOCKED; 121 static int PRO_RATE_RESET = 1; 122 static unsigned int PRO_RATE_DEFAULT = 44100; 123 124 /* 125 * Basic I/O 126 */ 127 128 /* check whether the clock mode is spdif-in */ 129 static inline int is_spdif_master(struct snd_ice1712 *ice) 130 { 131 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0; 132 } 133 134 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 135 { 136 return is_spdif_master(ice) || PRO_RATE_LOCKED; 137 } 138 139 static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data) 140 { 141 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 142 outl(data, ICEDS(ice, DATA)); 143 } 144 145 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr) 146 { 147 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 148 return inl(ICEDS(ice, DATA)); 149 } 150 151 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97, 152 unsigned short reg, 153 unsigned short val) 154 { 155 struct snd_ice1712 *ice = ac97->private_data; 156 int tm; 157 unsigned char old_cmd = 0; 158 159 for (tm = 0; tm < 0x10000; tm++) { 160 old_cmd = inb(ICEREG(ice, AC97_CMD)); 161 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 162 continue; 163 if (!(old_cmd & ICE1712_AC97_READY)) 164 continue; 165 break; 166 } 167 outb(reg, ICEREG(ice, AC97_INDEX)); 168 outw(val, ICEREG(ice, AC97_DATA)); 169 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 170 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD)); 171 for (tm = 0; tm < 0x10000; tm++) 172 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 173 break; 174 } 175 176 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97, 177 unsigned short reg) 178 { 179 struct snd_ice1712 *ice = ac97->private_data; 180 int tm; 181 unsigned char old_cmd = 0; 182 183 for (tm = 0; tm < 0x10000; tm++) { 184 old_cmd = inb(ICEREG(ice, AC97_CMD)); 185 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 186 continue; 187 if (!(old_cmd & ICE1712_AC97_READY)) 188 continue; 189 break; 190 } 191 outb(reg, ICEREG(ice, AC97_INDEX)); 192 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD)); 193 for (tm = 0; tm < 0x10000; tm++) 194 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 195 break; 196 if (tm >= 0x10000) /* timeout */ 197 return ~0; 198 return inw(ICEREG(ice, AC97_DATA)); 199 } 200 201 /* 202 * pro ac97 section 203 */ 204 205 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97, 206 unsigned short reg, 207 unsigned short val) 208 { 209 struct snd_ice1712 *ice = ac97->private_data; 210 int tm; 211 unsigned char old_cmd = 0; 212 213 for (tm = 0; tm < 0x10000; tm++) { 214 old_cmd = inb(ICEMT(ice, AC97_CMD)); 215 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 216 continue; 217 if (!(old_cmd & ICE1712_AC97_READY)) 218 continue; 219 break; 220 } 221 outb(reg, ICEMT(ice, AC97_INDEX)); 222 outw(val, ICEMT(ice, AC97_DATA)); 223 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 224 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD)); 225 for (tm = 0; tm < 0x10000; tm++) 226 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 227 break; 228 } 229 230 231 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97, 232 unsigned short reg) 233 { 234 struct snd_ice1712 *ice = ac97->private_data; 235 int tm; 236 unsigned char old_cmd = 0; 237 238 for (tm = 0; tm < 0x10000; tm++) { 239 old_cmd = inb(ICEMT(ice, AC97_CMD)); 240 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 241 continue; 242 if (!(old_cmd & ICE1712_AC97_READY)) 243 continue; 244 break; 245 } 246 outb(reg, ICEMT(ice, AC97_INDEX)); 247 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD)); 248 for (tm = 0; tm < 0x10000; tm++) 249 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 250 break; 251 if (tm >= 0x10000) /* timeout */ 252 return ~0; 253 return inw(ICEMT(ice, AC97_DATA)); 254 } 255 256 /* 257 * consumer ac97 digital mix 258 */ 259 static int snd_ice1712_digmix_route_ac97_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 260 { 261 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 262 uinfo->count = 1; 263 uinfo->value.integer.min = 0; 264 uinfo->value.integer.max = 1; 265 return 0; 266 } 267 268 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 269 { 270 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 271 272 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0; 273 return 0; 274 } 275 276 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 277 { 278 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 279 unsigned char val, nval; 280 281 spin_lock_irq(&ice->reg_lock); 282 val = inb(ICEMT(ice, MONITOR_ROUTECTRL)); 283 nval = val & ~ICE1712_ROUTE_AC97; 284 if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97; 285 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL)); 286 spin_unlock_irq(&ice->reg_lock); 287 return val != nval; 288 } 289 290 static const struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = { 291 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 292 .name = "Digital Mixer To AC97", 293 .info = snd_ice1712_digmix_route_ac97_info, 294 .get = snd_ice1712_digmix_route_ac97_get, 295 .put = snd_ice1712_digmix_route_ac97_put, 296 }; 297 298 299 /* 300 * gpio operations 301 */ 302 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 303 { 304 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data); 305 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 306 } 307 308 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 309 { 310 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data); 311 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 312 } 313 314 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice) 315 { 316 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 317 } 318 319 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val) 320 { 321 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val); 322 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 323 } 324 325 /* 326 * 327 * CS8427 interface 328 * 329 */ 330 331 /* 332 * change the input clock selection 333 * spdif_clock = 1 - IEC958 input, 0 - Envy24 334 */ 335 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock) 336 { 337 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */ 338 unsigned char val, nval; 339 int res = 0; 340 341 snd_i2c_lock(ice->i2c); 342 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) { 343 snd_i2c_unlock(ice->i2c); 344 return -EIO; 345 } 346 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) { 347 snd_i2c_unlock(ice->i2c); 348 return -EIO; 349 } 350 nval = val & 0xf0; 351 if (spdif_clock) 352 nval |= 0x01; 353 else 354 nval |= 0x04; 355 if (val != nval) { 356 reg[1] = nval; 357 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) { 358 res = -EIO; 359 } else { 360 res++; 361 } 362 } 363 snd_i2c_unlock(ice->i2c); 364 return res; 365 } 366 367 /* 368 * spdif callbacks 369 */ 370 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 371 { 372 snd_cs8427_iec958_active(ice->cs8427, 1); 373 } 374 375 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 376 { 377 snd_cs8427_iec958_active(ice->cs8427, 0); 378 } 379 380 static void setup_cs8427(struct snd_ice1712 *ice, int rate) 381 { 382 snd_cs8427_iec958_pcm(ice->cs8427, rate); 383 } 384 385 /* 386 * create and initialize callbacks for cs8427 interface 387 */ 388 int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr) 389 { 390 int err; 391 392 if ((err = snd_cs8427_create(ice->i2c, addr, 393 (ice->cs8427_timeout * HZ) / 1000, 394 &ice->cs8427)) < 0) { 395 snd_printk(KERN_ERR "CS8427 initialization failed\n"); 396 return err; 397 } 398 ice->spdif.ops.open = open_cs8427; 399 ice->spdif.ops.close = close_cs8427; 400 ice->spdif.ops.setup_rate = setup_cs8427; 401 return 0; 402 } 403 404 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master) 405 { 406 /* change CS8427 clock source too */ 407 if (ice->cs8427) 408 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master); 409 /* notify ak4524 chip as well */ 410 if (spdif_is_master) { 411 unsigned int i; 412 for (i = 0; i < ice->akm_codecs; i++) { 413 if (ice->akm[i].ops.set_rate_val) 414 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 415 } 416 } 417 } 418 419 /* 420 * Interrupt handler 421 */ 422 423 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id) 424 { 425 struct snd_ice1712 *ice = dev_id; 426 unsigned char status; 427 int handled = 0; 428 429 while (1) { 430 status = inb(ICEREG(ice, IRQSTAT)); 431 if (status == 0) 432 break; 433 handled = 1; 434 if (status & ICE1712_IRQ_MPU1) { 435 if (ice->rmidi[0]) 436 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data); 437 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT)); 438 status &= ~ICE1712_IRQ_MPU1; 439 } 440 if (status & ICE1712_IRQ_TIMER) 441 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT)); 442 if (status & ICE1712_IRQ_MPU2) { 443 if (ice->rmidi[1]) 444 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data); 445 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT)); 446 status &= ~ICE1712_IRQ_MPU2; 447 } 448 if (status & ICE1712_IRQ_PROPCM) { 449 unsigned char mtstat = inb(ICEMT(ice, IRQ)); 450 if (mtstat & ICE1712_MULTI_PBKSTATUS) { 451 if (ice->playback_pro_substream) 452 snd_pcm_period_elapsed(ice->playback_pro_substream); 453 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ)); 454 } 455 if (mtstat & ICE1712_MULTI_CAPSTATUS) { 456 if (ice->capture_pro_substream) 457 snd_pcm_period_elapsed(ice->capture_pro_substream); 458 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ)); 459 } 460 } 461 if (status & ICE1712_IRQ_FM) 462 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT)); 463 if (status & ICE1712_IRQ_PBKDS) { 464 u32 idx; 465 u16 pbkstatus; 466 struct snd_pcm_substream *substream; 467 pbkstatus = inw(ICEDS(ice, INTSTAT)); 468 //printk("pbkstatus = 0x%x\n", pbkstatus); 469 for (idx = 0; idx < 6; idx++) { 470 if ((pbkstatus & (3 << (idx * 2))) == 0) 471 continue; 472 if ((substream = ice->playback_con_substream_ds[idx]) != NULL) 473 snd_pcm_period_elapsed(substream); 474 outw(3 << (idx * 2), ICEDS(ice, INTSTAT)); 475 } 476 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT)); 477 } 478 if (status & ICE1712_IRQ_CONCAP) { 479 if (ice->capture_con_substream) 480 snd_pcm_period_elapsed(ice->capture_con_substream); 481 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT)); 482 } 483 if (status & ICE1712_IRQ_CONPBK) { 484 if (ice->playback_con_substream) 485 snd_pcm_period_elapsed(ice->playback_con_substream); 486 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT)); 487 } 488 } 489 return IRQ_RETVAL(handled); 490 } 491 492 493 /* 494 * PCM part - misc 495 */ 496 497 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream, 498 struct snd_pcm_hw_params *hw_params) 499 { 500 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 501 } 502 503 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream) 504 { 505 return snd_pcm_lib_free_pages(substream); 506 } 507 508 /* 509 * PCM part - consumer I/O 510 */ 511 512 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream, 513 int cmd) 514 { 515 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 516 int result = 0; 517 u32 tmp; 518 519 spin_lock(&ice->reg_lock); 520 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL); 521 if (cmd == SNDRV_PCM_TRIGGER_START) { 522 tmp |= 1; 523 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 524 tmp &= ~1; 525 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 526 tmp |= 2; 527 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 528 tmp &= ~2; 529 } else { 530 result = -EINVAL; 531 } 532 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 533 spin_unlock(&ice->reg_lock); 534 return result; 535 } 536 537 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream, 538 int cmd) 539 { 540 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 541 int result = 0; 542 u32 tmp; 543 544 spin_lock(&ice->reg_lock); 545 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL); 546 if (cmd == SNDRV_PCM_TRIGGER_START) { 547 tmp |= 1; 548 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 549 tmp &= ~1; 550 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 551 tmp |= 2; 552 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 553 tmp &= ~2; 554 } else { 555 result = -EINVAL; 556 } 557 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp); 558 spin_unlock(&ice->reg_lock); 559 return result; 560 } 561 562 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream, 563 int cmd) 564 { 565 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 566 int result = 0; 567 u8 tmp; 568 569 spin_lock(&ice->reg_lock); 570 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL); 571 if (cmd == SNDRV_PCM_TRIGGER_START) { 572 tmp |= 1; 573 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 574 tmp &= ~1; 575 } else { 576 result = -EINVAL; 577 } 578 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 579 spin_unlock(&ice->reg_lock); 580 return result; 581 } 582 583 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream) 584 { 585 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 586 struct snd_pcm_runtime *runtime = substream->runtime; 587 u32 period_size, buf_size, rate, tmp; 588 589 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 590 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 591 tmp = 0x0000; 592 if (snd_pcm_format_width(runtime->format) == 16) 593 tmp |= 0x10; 594 if (runtime->channels == 2) 595 tmp |= 0x08; 596 rate = (runtime->rate * 8192) / 375; 597 if (rate > 0x000fffff) 598 rate = 0x000fffff; 599 spin_lock_irq(&ice->reg_lock); 600 outb(0, ice->ddma_port + 15); 601 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b); 602 outl(runtime->dma_addr, ice->ddma_port + 0); 603 outw(buf_size, ice->ddma_port + 4); 604 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff); 605 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff); 606 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff); 607 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 608 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff); 609 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8); 610 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0); 611 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0); 612 spin_unlock_irq(&ice->reg_lock); 613 return 0; 614 } 615 616 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream) 617 { 618 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 619 struct snd_pcm_runtime *runtime = substream->runtime; 620 u32 period_size, buf_size, rate, tmp, chn; 621 622 period_size = snd_pcm_lib_period_bytes(substream) - 1; 623 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 624 tmp = 0x0064; 625 if (snd_pcm_format_width(runtime->format) == 16) 626 tmp &= ~0x04; 627 if (runtime->channels == 2) 628 tmp |= 0x08; 629 rate = (runtime->rate * 8192) / 375; 630 if (rate > 0x000fffff) 631 rate = 0x000fffff; 632 ice->playback_con_active_buf[substream->number] = 0; 633 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr; 634 chn = substream->number * 2; 635 spin_lock_irq(&ice->reg_lock); 636 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr); 637 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size); 638 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0)); 639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size); 640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate); 641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0); 642 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp); 643 if (runtime->channels == 2) { 644 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate); 645 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0); 646 } 647 spin_unlock_irq(&ice->reg_lock); 648 return 0; 649 } 650 651 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream) 652 { 653 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 654 struct snd_pcm_runtime *runtime = substream->runtime; 655 u32 period_size, buf_size; 656 u8 tmp; 657 658 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 659 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 660 tmp = 0x06; 661 if (snd_pcm_format_width(runtime->format) == 16) 662 tmp &= ~0x04; 663 if (runtime->channels == 2) 664 tmp &= ~0x02; 665 spin_lock_irq(&ice->reg_lock); 666 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR)); 667 outw(buf_size, ICEREG(ice, CONCAP_COUNT)); 668 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8); 669 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff); 670 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 671 spin_unlock_irq(&ice->reg_lock); 672 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); 673 return 0; 674 } 675 676 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream) 677 { 678 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 679 struct snd_pcm_runtime *runtime = substream->runtime; 680 size_t ptr; 681 682 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1)) 683 return 0; 684 ptr = runtime->buffer_size - inw(ice->ddma_port + 4); 685 if (ptr == runtime->buffer_size) 686 ptr = 0; 687 return bytes_to_frames(substream->runtime, ptr); 688 } 689 690 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream) 691 { 692 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 693 u8 addr; 694 size_t ptr; 695 696 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1)) 697 return 0; 698 if (ice->playback_con_active_buf[substream->number]) 699 addr = ICE1712_DSC_ADDR1; 700 else 701 addr = ICE1712_DSC_ADDR0; 702 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) - 703 ice->playback_con_virt_addr[substream->number]; 704 if (ptr == substream->runtime->buffer_size) 705 ptr = 0; 706 return bytes_to_frames(substream->runtime, ptr); 707 } 708 709 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream) 710 { 711 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 712 size_t ptr; 713 714 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1)) 715 return 0; 716 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr; 717 if (ptr == substream->runtime->buffer_size) 718 ptr = 0; 719 return bytes_to_frames(substream->runtime, ptr); 720 } 721 722 static const struct snd_pcm_hardware snd_ice1712_playback = 723 { 724 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 725 SNDRV_PCM_INFO_BLOCK_TRANSFER | 726 SNDRV_PCM_INFO_MMAP_VALID | 727 SNDRV_PCM_INFO_PAUSE), 728 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 729 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 730 .rate_min = 4000, 731 .rate_max = 48000, 732 .channels_min = 1, 733 .channels_max = 2, 734 .buffer_bytes_max = (64*1024), 735 .period_bytes_min = 64, 736 .period_bytes_max = (64*1024), 737 .periods_min = 1, 738 .periods_max = 1024, 739 .fifo_size = 0, 740 }; 741 742 static const struct snd_pcm_hardware snd_ice1712_playback_ds = 743 { 744 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 745 SNDRV_PCM_INFO_BLOCK_TRANSFER | 746 SNDRV_PCM_INFO_MMAP_VALID | 747 SNDRV_PCM_INFO_PAUSE), 748 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 749 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 750 .rate_min = 4000, 751 .rate_max = 48000, 752 .channels_min = 1, 753 .channels_max = 2, 754 .buffer_bytes_max = (128*1024), 755 .period_bytes_min = 64, 756 .period_bytes_max = (128*1024), 757 .periods_min = 2, 758 .periods_max = 2, 759 .fifo_size = 0, 760 }; 761 762 static const struct snd_pcm_hardware snd_ice1712_capture = 763 { 764 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 765 SNDRV_PCM_INFO_BLOCK_TRANSFER | 766 SNDRV_PCM_INFO_MMAP_VALID), 767 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 768 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 769 .rate_min = 4000, 770 .rate_max = 48000, 771 .channels_min = 1, 772 .channels_max = 2, 773 .buffer_bytes_max = (64*1024), 774 .period_bytes_min = 64, 775 .period_bytes_max = (64*1024), 776 .periods_min = 1, 777 .periods_max = 1024, 778 .fifo_size = 0, 779 }; 780 781 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream) 782 { 783 struct snd_pcm_runtime *runtime = substream->runtime; 784 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 785 786 ice->playback_con_substream = substream; 787 runtime->hw = snd_ice1712_playback; 788 return 0; 789 } 790 791 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream) 792 { 793 struct snd_pcm_runtime *runtime = substream->runtime; 794 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 795 u32 tmp; 796 797 ice->playback_con_substream_ds[substream->number] = substream; 798 runtime->hw = snd_ice1712_playback_ds; 799 spin_lock_irq(&ice->reg_lock); 800 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2)); 801 outw(tmp, ICEDS(ice, INTMASK)); 802 spin_unlock_irq(&ice->reg_lock); 803 return 0; 804 } 805 806 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream) 807 { 808 struct snd_pcm_runtime *runtime = substream->runtime; 809 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 810 811 ice->capture_con_substream = substream; 812 runtime->hw = snd_ice1712_capture; 813 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC]; 814 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000)) 815 runtime->hw.rate_min = 48000; 816 return 0; 817 } 818 819 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream) 820 { 821 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 822 823 ice->playback_con_substream = NULL; 824 return 0; 825 } 826 827 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream) 828 { 829 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 830 u32 tmp; 831 832 spin_lock_irq(&ice->reg_lock); 833 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2)); 834 outw(tmp, ICEDS(ice, INTMASK)); 835 spin_unlock_irq(&ice->reg_lock); 836 ice->playback_con_substream_ds[substream->number] = NULL; 837 return 0; 838 } 839 840 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream) 841 { 842 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 843 844 ice->capture_con_substream = NULL; 845 return 0; 846 } 847 848 static struct snd_pcm_ops snd_ice1712_playback_ops = { 849 .open = snd_ice1712_playback_open, 850 .close = snd_ice1712_playback_close, 851 .ioctl = snd_pcm_lib_ioctl, 852 .hw_params = snd_ice1712_hw_params, 853 .hw_free = snd_ice1712_hw_free, 854 .prepare = snd_ice1712_playback_prepare, 855 .trigger = snd_ice1712_playback_trigger, 856 .pointer = snd_ice1712_playback_pointer, 857 }; 858 859 static struct snd_pcm_ops snd_ice1712_playback_ds_ops = { 860 .open = snd_ice1712_playback_ds_open, 861 .close = snd_ice1712_playback_ds_close, 862 .ioctl = snd_pcm_lib_ioctl, 863 .hw_params = snd_ice1712_hw_params, 864 .hw_free = snd_ice1712_hw_free, 865 .prepare = snd_ice1712_playback_ds_prepare, 866 .trigger = snd_ice1712_playback_ds_trigger, 867 .pointer = snd_ice1712_playback_ds_pointer, 868 }; 869 870 static struct snd_pcm_ops snd_ice1712_capture_ops = { 871 .open = snd_ice1712_capture_open, 872 .close = snd_ice1712_capture_close, 873 .ioctl = snd_pcm_lib_ioctl, 874 .hw_params = snd_ice1712_hw_params, 875 .hw_free = snd_ice1712_hw_free, 876 .prepare = snd_ice1712_capture_prepare, 877 .trigger = snd_ice1712_capture_trigger, 878 .pointer = snd_ice1712_capture_pointer, 879 }; 880 881 static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm) 882 { 883 struct snd_pcm *pcm; 884 int err; 885 886 if (rpcm) 887 *rpcm = NULL; 888 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm); 889 if (err < 0) 890 return err; 891 892 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops); 893 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops); 894 895 pcm->private_data = ice; 896 pcm->info_flags = 0; 897 strcpy(pcm->name, "ICE1712 consumer"); 898 ice->pcm = pcm; 899 900 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 901 snd_dma_pci_data(ice->pci), 64*1024, 64*1024); 902 903 if (rpcm) 904 *rpcm = pcm; 905 906 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n"); 907 908 return 0; 909 } 910 911 static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm) 912 { 913 struct snd_pcm *pcm; 914 int err; 915 916 if (rpcm) 917 *rpcm = NULL; 918 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm); 919 if (err < 0) 920 return err; 921 922 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops); 923 924 pcm->private_data = ice; 925 pcm->info_flags = 0; 926 strcpy(pcm->name, "ICE1712 consumer (DS)"); 927 ice->pcm_ds = pcm; 928 929 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 930 snd_dma_pci_data(ice->pci), 64*1024, 128*1024); 931 932 if (rpcm) 933 *rpcm = pcm; 934 935 return 0; 936 } 937 938 /* 939 * PCM code - professional part (multitrack) 940 */ 941 942 static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000, 943 32000, 44100, 48000, 64000, 88200, 96000 }; 944 945 static struct snd_pcm_hw_constraint_list hw_constraints_rates = { 946 .count = ARRAY_SIZE(rates), 947 .list = rates, 948 .mask = 0, 949 }; 950 951 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream, 952 int cmd) 953 { 954 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 955 switch (cmd) { 956 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 957 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 958 { 959 unsigned int what; 960 unsigned int old; 961 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) 962 return -EINVAL; 963 what = ICE1712_PLAYBACK_PAUSE; 964 snd_pcm_trigger_done(substream, substream); 965 spin_lock(&ice->reg_lock); 966 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 967 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 968 old |= what; 969 else 970 old &= ~what; 971 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 972 spin_unlock(&ice->reg_lock); 973 break; 974 } 975 case SNDRV_PCM_TRIGGER_START: 976 case SNDRV_PCM_TRIGGER_STOP: 977 { 978 unsigned int what = 0; 979 unsigned int old; 980 struct list_head *pos; 981 struct snd_pcm_substream *s; 982 983 snd_pcm_group_for_each(pos, substream) { 984 s = snd_pcm_group_substream_entry(pos); 985 if (s == ice->playback_pro_substream) { 986 what |= ICE1712_PLAYBACK_START; 987 snd_pcm_trigger_done(s, substream); 988 } else if (s == ice->capture_pro_substream) { 989 what |= ICE1712_CAPTURE_START_SHADOW; 990 snd_pcm_trigger_done(s, substream); 991 } 992 } 993 spin_lock(&ice->reg_lock); 994 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 995 if (cmd == SNDRV_PCM_TRIGGER_START) 996 old |= what; 997 else 998 old &= ~what; 999 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 1000 spin_unlock(&ice->reg_lock); 1001 break; 1002 } 1003 default: 1004 return -EINVAL; 1005 } 1006 return 0; 1007 } 1008 1009 /* 1010 */ 1011 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force) 1012 { 1013 unsigned long flags; 1014 unsigned char val, old; 1015 unsigned int i; 1016 1017 switch (rate) { 1018 case 8000: val = 6; break; 1019 case 9600: val = 3; break; 1020 case 11025: val = 10; break; 1021 case 12000: val = 2; break; 1022 case 16000: val = 5; break; 1023 case 22050: val = 9; break; 1024 case 24000: val = 1; break; 1025 case 32000: val = 4; break; 1026 case 44100: val = 8; break; 1027 case 48000: val = 0; break; 1028 case 64000: val = 15; break; 1029 case 88200: val = 11; break; 1030 case 96000: val = 7; break; 1031 default: 1032 snd_BUG(); 1033 val = 0; 1034 rate = 48000; 1035 break; 1036 } 1037 1038 spin_lock_irqsave(&ice->reg_lock, flags); 1039 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW| 1040 ICE1712_PLAYBACK_PAUSE| 1041 ICE1712_PLAYBACK_START)) { 1042 __out: 1043 spin_unlock_irqrestore(&ice->reg_lock, flags); 1044 return; 1045 } 1046 if (!force && is_pro_rate_locked(ice)) 1047 goto __out; 1048 1049 old = inb(ICEMT(ice, RATE)); 1050 if (!force && old == val) 1051 goto __out; 1052 outb(val, ICEMT(ice, RATE)); 1053 spin_unlock_irqrestore(&ice->reg_lock, flags); 1054 1055 if (ice->gpio.set_pro_rate) 1056 ice->gpio.set_pro_rate(ice, rate); 1057 for (i = 0; i < ice->akm_codecs; i++) { 1058 if (ice->akm[i].ops.set_rate_val) 1059 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 1060 } 1061 if (ice->spdif.ops.setup_rate) 1062 ice->spdif.ops.setup_rate(ice, rate); 1063 } 1064 1065 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream) 1066 { 1067 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1068 1069 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream); 1070 spin_lock_irq(&ice->reg_lock); 1071 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR)); 1072 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE)); 1073 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT)); 1074 spin_unlock_irq(&ice->reg_lock); 1075 1076 return 0; 1077 } 1078 1079 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream, 1080 struct snd_pcm_hw_params *hw_params) 1081 { 1082 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1083 1084 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1085 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1086 } 1087 1088 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream) 1089 { 1090 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1091 1092 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream); 1093 spin_lock_irq(&ice->reg_lock); 1094 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR)); 1095 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE)); 1096 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT)); 1097 spin_unlock_irq(&ice->reg_lock); 1098 return 0; 1099 } 1100 1101 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream, 1102 struct snd_pcm_hw_params *hw_params) 1103 { 1104 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1105 1106 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1107 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1108 } 1109 1110 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream) 1111 { 1112 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1113 size_t ptr; 1114 1115 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START)) 1116 return 0; 1117 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2); 1118 if (ptr == substream->runtime->buffer_size) 1119 ptr = 0; 1120 return bytes_to_frames(substream->runtime, ptr); 1121 } 1122 1123 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream) 1124 { 1125 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1126 size_t ptr; 1127 1128 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW)) 1129 return 0; 1130 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2); 1131 if (ptr == substream->runtime->buffer_size) 1132 ptr = 0; 1133 return bytes_to_frames(substream->runtime, ptr); 1134 } 1135 1136 static const struct snd_pcm_hardware snd_ice1712_playback_pro = 1137 { 1138 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1139 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1140 SNDRV_PCM_INFO_MMAP_VALID | 1141 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1142 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1143 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1144 .rate_min = 4000, 1145 .rate_max = 96000, 1146 .channels_min = 10, 1147 .channels_max = 10, 1148 .buffer_bytes_max = (256*1024), 1149 .period_bytes_min = 10 * 4 * 2, 1150 .period_bytes_max = 131040, 1151 .periods_min = 1, 1152 .periods_max = 1024, 1153 .fifo_size = 0, 1154 }; 1155 1156 static const struct snd_pcm_hardware snd_ice1712_capture_pro = 1157 { 1158 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1159 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1160 SNDRV_PCM_INFO_MMAP_VALID | 1161 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1162 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1163 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1164 .rate_min = 4000, 1165 .rate_max = 96000, 1166 .channels_min = 12, 1167 .channels_max = 12, 1168 .buffer_bytes_max = (256*1024), 1169 .period_bytes_min = 12 * 4 * 2, 1170 .period_bytes_max = 131040, 1171 .periods_min = 1, 1172 .periods_max = 1024, 1173 .fifo_size = 0, 1174 }; 1175 1176 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream) 1177 { 1178 struct snd_pcm_runtime *runtime = substream->runtime; 1179 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1180 1181 ice->playback_pro_substream = substream; 1182 runtime->hw = snd_ice1712_playback_pro; 1183 snd_pcm_set_sync(substream); 1184 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1185 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1186 1187 if (ice->spdif.ops.open) 1188 ice->spdif.ops.open(ice, substream); 1189 1190 return 0; 1191 } 1192 1193 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream) 1194 { 1195 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1196 struct snd_pcm_runtime *runtime = substream->runtime; 1197 1198 ice->capture_pro_substream = substream; 1199 runtime->hw = snd_ice1712_capture_pro; 1200 snd_pcm_set_sync(substream); 1201 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1202 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1203 return 0; 1204 } 1205 1206 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream) 1207 { 1208 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1209 1210 if (PRO_RATE_RESET) 1211 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1212 ice->playback_pro_substream = NULL; 1213 if (ice->spdif.ops.close) 1214 ice->spdif.ops.close(ice, substream); 1215 1216 return 0; 1217 } 1218 1219 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream) 1220 { 1221 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1222 1223 if (PRO_RATE_RESET) 1224 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1225 ice->capture_pro_substream = NULL; 1226 return 0; 1227 } 1228 1229 static struct snd_pcm_ops snd_ice1712_playback_pro_ops = { 1230 .open = snd_ice1712_playback_pro_open, 1231 .close = snd_ice1712_playback_pro_close, 1232 .ioctl = snd_pcm_lib_ioctl, 1233 .hw_params = snd_ice1712_playback_pro_hw_params, 1234 .hw_free = snd_ice1712_hw_free, 1235 .prepare = snd_ice1712_playback_pro_prepare, 1236 .trigger = snd_ice1712_pro_trigger, 1237 .pointer = snd_ice1712_playback_pro_pointer, 1238 }; 1239 1240 static struct snd_pcm_ops snd_ice1712_capture_pro_ops = { 1241 .open = snd_ice1712_capture_pro_open, 1242 .close = snd_ice1712_capture_pro_close, 1243 .ioctl = snd_pcm_lib_ioctl, 1244 .hw_params = snd_ice1712_capture_pro_hw_params, 1245 .hw_free = snd_ice1712_hw_free, 1246 .prepare = snd_ice1712_capture_pro_prepare, 1247 .trigger = snd_ice1712_pro_trigger, 1248 .pointer = snd_ice1712_capture_pro_pointer, 1249 }; 1250 1251 static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm) 1252 { 1253 struct snd_pcm *pcm; 1254 int err; 1255 1256 if (rpcm) 1257 *rpcm = NULL; 1258 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm); 1259 if (err < 0) 1260 return err; 1261 1262 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops); 1263 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops); 1264 1265 pcm->private_data = ice; 1266 pcm->info_flags = 0; 1267 strcpy(pcm->name, "ICE1712 multi"); 1268 1269 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1270 snd_dma_pci_data(ice->pci), 256*1024, 256*1024); 1271 1272 ice->pcm_pro = pcm; 1273 if (rpcm) 1274 *rpcm = pcm; 1275 1276 if (ice->cs8427) { 1277 /* assign channels to iec958 */ 1278 err = snd_cs8427_iec958_build(ice->cs8427, 1279 pcm->streams[0].substream, 1280 pcm->streams[1].substream); 1281 if (err < 0) 1282 return err; 1283 } 1284 1285 if ((err = snd_ice1712_build_pro_mixer(ice)) < 0) 1286 return err; 1287 return 0; 1288 } 1289 1290 /* 1291 * Mixer section 1292 */ 1293 1294 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index) 1295 { 1296 unsigned int vol = ice->pro_volumes[index]; 1297 unsigned short val = 0; 1298 1299 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f; 1300 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8; 1301 outb(index, ICEMT(ice, MONITOR_INDEX)); 1302 outw(val, ICEMT(ice, MONITOR_VOLUME)); 1303 } 1304 1305 static int snd_ice1712_pro_mixer_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1306 { 1307 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1308 uinfo->count = 2; 1309 uinfo->value.integer.min = 0; 1310 uinfo->value.integer.max = 1; 1311 return 0; 1312 } 1313 1314 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1315 { 1316 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1317 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value; 1318 1319 spin_lock_irq(&ice->reg_lock); 1320 ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1); 1321 ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1); 1322 spin_unlock_irq(&ice->reg_lock); 1323 return 0; 1324 } 1325 1326 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1327 { 1328 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1329 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value; 1330 unsigned int nval, change; 1331 1332 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) | 1333 (ucontrol->value.integer.value[1] ? 0 : 0x80000000); 1334 spin_lock_irq(&ice->reg_lock); 1335 nval |= ice->pro_volumes[index] & ~0x80008000; 1336 change = nval != ice->pro_volumes[index]; 1337 ice->pro_volumes[index] = nval; 1338 snd_ice1712_update_volume(ice, index); 1339 spin_unlock_irq(&ice->reg_lock); 1340 return change; 1341 } 1342 1343 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1344 { 1345 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1346 uinfo->count = 2; 1347 uinfo->value.integer.min = 0; 1348 uinfo->value.integer.max = 96; 1349 return 0; 1350 } 1351 1352 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1353 { 1354 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1355 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value; 1356 1357 spin_lock_irq(&ice->reg_lock); 1358 ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127; 1359 ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127; 1360 spin_unlock_irq(&ice->reg_lock); 1361 return 0; 1362 } 1363 1364 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1365 { 1366 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1367 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value; 1368 unsigned int nval, change; 1369 1370 nval = (ucontrol->value.integer.value[0] & 127) | 1371 ((ucontrol->value.integer.value[1] & 127) << 16); 1372 spin_lock_irq(&ice->reg_lock); 1373 nval |= ice->pro_volumes[index] & ~0x007f007f; 1374 change = nval != ice->pro_volumes[index]; 1375 ice->pro_volumes[index] = nval; 1376 snd_ice1712_update_volume(ice, index); 1377 spin_unlock_irq(&ice->reg_lock); 1378 return change; 1379 } 1380 1381 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0); 1382 1383 static const struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = { 1384 { 1385 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1386 .name = "Multi Playback Switch", 1387 .info = snd_ice1712_pro_mixer_switch_info, 1388 .get = snd_ice1712_pro_mixer_switch_get, 1389 .put = snd_ice1712_pro_mixer_switch_put, 1390 .private_value = 0, 1391 .count = 10, 1392 }, 1393 { 1394 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1395 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1396 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1397 .name = "Multi Playback Volume", 1398 .info = snd_ice1712_pro_mixer_volume_info, 1399 .get = snd_ice1712_pro_mixer_volume_get, 1400 .put = snd_ice1712_pro_mixer_volume_put, 1401 .private_value = 0, 1402 .count = 10, 1403 .tlv = { .p = db_scale_playback } 1404 }, 1405 }; 1406 1407 static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = { 1408 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1409 .name = "H/W Multi Capture Switch", 1410 .info = snd_ice1712_pro_mixer_switch_info, 1411 .get = snd_ice1712_pro_mixer_switch_get, 1412 .put = snd_ice1712_pro_mixer_switch_put, 1413 .private_value = 10, 1414 }; 1415 1416 static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = { 1417 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1418 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH), 1419 .info = snd_ice1712_pro_mixer_switch_info, 1420 .get = snd_ice1712_pro_mixer_switch_get, 1421 .put = snd_ice1712_pro_mixer_switch_put, 1422 .private_value = 18, 1423 .count = 2, 1424 }; 1425 1426 static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = { 1427 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1428 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1429 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1430 .name = "H/W Multi Capture Volume", 1431 .info = snd_ice1712_pro_mixer_volume_info, 1432 .get = snd_ice1712_pro_mixer_volume_get, 1433 .put = snd_ice1712_pro_mixer_volume_put, 1434 .private_value = 10, 1435 .tlv = { .p = db_scale_playback } 1436 }; 1437 1438 static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = { 1439 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1440 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME), 1441 .info = snd_ice1712_pro_mixer_volume_info, 1442 .get = snd_ice1712_pro_mixer_volume_get, 1443 .put = snd_ice1712_pro_mixer_volume_put, 1444 .private_value = 18, 1445 .count = 2, 1446 }; 1447 1448 static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice) 1449 { 1450 struct snd_card *card = ice->card; 1451 unsigned int idx; 1452 int err; 1453 1454 /* multi-channel mixer */ 1455 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) { 1456 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice)); 1457 if (err < 0) 1458 return err; 1459 } 1460 1461 if (ice->num_total_adcs > 0) { 1462 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch; 1463 tmp.count = ice->num_total_adcs; 1464 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1465 if (err < 0) 1466 return err; 1467 } 1468 1469 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice)); 1470 if (err < 0) 1471 return err; 1472 1473 if (ice->num_total_adcs > 0) { 1474 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume; 1475 tmp.count = ice->num_total_adcs; 1476 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1477 if (err < 0) 1478 return err; 1479 } 1480 1481 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice)); 1482 if (err < 0) 1483 return err; 1484 1485 /* initialize volumes */ 1486 for (idx = 0; idx < 10; idx++) { 1487 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1488 snd_ice1712_update_volume(ice, idx); 1489 } 1490 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) { 1491 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1492 snd_ice1712_update_volume(ice, idx); 1493 } 1494 for (idx = 18; idx < 20; idx++) { 1495 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1496 snd_ice1712_update_volume(ice, idx); 1497 } 1498 return 0; 1499 } 1500 1501 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97) 1502 { 1503 struct snd_ice1712 *ice = ac97->private_data; 1504 ice->ac97 = NULL; 1505 } 1506 1507 static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice) 1508 { 1509 int err, bus_num = 0; 1510 struct snd_ac97_template ac97; 1511 struct snd_ac97_bus *pbus; 1512 static struct snd_ac97_bus_ops con_ops = { 1513 .write = snd_ice1712_ac97_write, 1514 .read = snd_ice1712_ac97_read, 1515 }; 1516 static struct snd_ac97_bus_ops pro_ops = { 1517 .write = snd_ice1712_pro_ac97_write, 1518 .read = snd_ice1712_pro_ac97_read, 1519 }; 1520 1521 if (ice_has_con_ac97(ice)) { 1522 if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0) 1523 return err; 1524 memset(&ac97, 0, sizeof(ac97)); 1525 ac97.private_data = ice; 1526 ac97.private_free = snd_ice1712_mixer_free_ac97; 1527 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0) 1528 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n"); 1529 else { 1530 if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0) 1531 return err; 1532 return 0; 1533 } 1534 } 1535 1536 if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) { 1537 if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0) 1538 return err; 1539 memset(&ac97, 0, sizeof(ac97)); 1540 ac97.private_data = ice; 1541 ac97.private_free = snd_ice1712_mixer_free_ac97; 1542 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0) 1543 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n"); 1544 else 1545 return 0; 1546 } 1547 /* I2S mixer only */ 1548 strcat(ice->card->mixername, "ICE1712 - multitrack"); 1549 return 0; 1550 } 1551 1552 /* 1553 * 1554 */ 1555 1556 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx) 1557 { 1558 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8); 1559 } 1560 1561 static void snd_ice1712_proc_read(struct snd_info_entry *entry, 1562 struct snd_info_buffer *buffer) 1563 { 1564 struct snd_ice1712 *ice = entry->private_data; 1565 unsigned int idx; 1566 1567 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1568 snd_iprintf(buffer, "EEPROM:\n"); 1569 1570 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1571 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1572 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1573 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]); 1574 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]); 1575 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]); 1576 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]); 1577 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask); 1578 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate); 1579 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir); 1580 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO)); 1581 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO)); 1582 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO)); 1583 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]); 1584 for (idx = 0; idx < 4; idx++) 1585 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]); 1586 for (idx = 0; idx < 4; idx++) 1587 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]); 1588 for (idx = 0x1c; idx < ice->eeprom.size; idx++) 1589 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]); 1590 1591 snd_iprintf(buffer, "\nRegisters:\n"); 1592 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03))); 1593 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE))); 1594 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT))); 1595 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE))); 1596 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice)); 1597 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK)); 1598 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION)); 1599 } 1600 1601 static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice) 1602 { 1603 struct snd_info_entry *entry; 1604 1605 if (! snd_card_proc_new(ice->card, "ice1712", &entry)) 1606 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read); 1607 } 1608 1609 /* 1610 * 1611 */ 1612 1613 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol, 1614 struct snd_ctl_elem_info *uinfo) 1615 { 1616 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1617 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1618 return 0; 1619 } 1620 1621 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol, 1622 struct snd_ctl_elem_value *ucontrol) 1623 { 1624 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1625 1626 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1627 return 0; 1628 } 1629 1630 static const struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = { 1631 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1632 .name = "ICE1712 EEPROM", 1633 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1634 .info = snd_ice1712_eeprom_info, 1635 .get = snd_ice1712_eeprom_get 1636 }; 1637 1638 /* 1639 */ 1640 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol, 1641 struct snd_ctl_elem_info *uinfo) 1642 { 1643 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1644 uinfo->count = 1; 1645 return 0; 1646 } 1647 1648 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol, 1649 struct snd_ctl_elem_value *ucontrol) 1650 { 1651 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1652 if (ice->spdif.ops.default_get) 1653 ice->spdif.ops.default_get(ice, ucontrol); 1654 return 0; 1655 } 1656 1657 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol, 1658 struct snd_ctl_elem_value *ucontrol) 1659 { 1660 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1661 if (ice->spdif.ops.default_put) 1662 return ice->spdif.ops.default_put(ice, ucontrol); 1663 return 0; 1664 } 1665 1666 static const struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata = 1667 { 1668 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1669 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1670 .info = snd_ice1712_spdif_info, 1671 .get = snd_ice1712_spdif_default_get, 1672 .put = snd_ice1712_spdif_default_put 1673 }; 1674 1675 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1676 struct snd_ctl_elem_value *ucontrol) 1677 { 1678 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1679 if (ice->spdif.ops.default_get) { 1680 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1681 IEC958_AES0_PROFESSIONAL | 1682 IEC958_AES0_CON_NOT_COPYRIGHT | 1683 IEC958_AES0_CON_EMPHASIS; 1684 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1685 IEC958_AES1_CON_CATEGORY; 1686 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1687 } else { 1688 ucontrol->value.iec958.status[0] = 0xff; 1689 ucontrol->value.iec958.status[1] = 0xff; 1690 ucontrol->value.iec958.status[2] = 0xff; 1691 ucontrol->value.iec958.status[3] = 0xff; 1692 ucontrol->value.iec958.status[4] = 0xff; 1693 } 1694 return 0; 1695 } 1696 1697 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1698 struct snd_ctl_elem_value *ucontrol) 1699 { 1700 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1701 if (ice->spdif.ops.default_get) { 1702 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1703 IEC958_AES0_PROFESSIONAL | 1704 IEC958_AES0_PRO_FS | 1705 IEC958_AES0_PRO_EMPHASIS; 1706 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE; 1707 } else { 1708 ucontrol->value.iec958.status[0] = 0xff; 1709 ucontrol->value.iec958.status[1] = 0xff; 1710 ucontrol->value.iec958.status[2] = 0xff; 1711 ucontrol->value.iec958.status[3] = 0xff; 1712 ucontrol->value.iec958.status[4] = 0xff; 1713 } 1714 return 0; 1715 } 1716 1717 static const struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata = 1718 { 1719 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1720 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1721 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1722 .info = snd_ice1712_spdif_info, 1723 .get = snd_ice1712_spdif_maskc_get, 1724 }; 1725 1726 static const struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata = 1727 { 1728 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1729 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1730 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), 1731 .info = snd_ice1712_spdif_info, 1732 .get = snd_ice1712_spdif_maskp_get, 1733 }; 1734 1735 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol, 1736 struct snd_ctl_elem_value *ucontrol) 1737 { 1738 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1739 if (ice->spdif.ops.stream_get) 1740 ice->spdif.ops.stream_get(ice, ucontrol); 1741 return 0; 1742 } 1743 1744 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol, 1745 struct snd_ctl_elem_value *ucontrol) 1746 { 1747 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1748 if (ice->spdif.ops.stream_put) 1749 return ice->spdif.ops.stream_put(ice, ucontrol); 1750 return 0; 1751 } 1752 1753 static const struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata = 1754 { 1755 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1756 SNDRV_CTL_ELEM_ACCESS_INACTIVE), 1757 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1758 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1759 .info = snd_ice1712_spdif_info, 1760 .get = snd_ice1712_spdif_stream_get, 1761 .put = snd_ice1712_spdif_stream_put 1762 }; 1763 1764 int snd_ice1712_gpio_info(struct snd_kcontrol *kcontrol, 1765 struct snd_ctl_elem_info *uinfo) 1766 { 1767 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1768 uinfo->count = 1; 1769 uinfo->value.integer.min = 0; 1770 uinfo->value.integer.max = 1; 1771 return 0; 1772 } 1773 1774 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol, 1775 struct snd_ctl_elem_value *ucontrol) 1776 { 1777 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1778 unsigned char mask = kcontrol->private_value & 0xff; 1779 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1780 1781 snd_ice1712_save_gpio_status(ice); 1782 ucontrol->value.integer.value[0] = 1783 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert; 1784 snd_ice1712_restore_gpio_status(ice); 1785 return 0; 1786 } 1787 1788 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1789 struct snd_ctl_elem_value *ucontrol) 1790 { 1791 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1792 unsigned char mask = kcontrol->private_value & 0xff; 1793 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1794 unsigned int val, nval; 1795 1796 if (kcontrol->private_value & (1 << 31)) 1797 return -EPERM; 1798 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert; 1799 snd_ice1712_save_gpio_status(ice); 1800 val = snd_ice1712_gpio_read(ice); 1801 nval |= val & ~mask; 1802 if (val != nval) 1803 snd_ice1712_gpio_write(ice, nval); 1804 snd_ice1712_restore_gpio_status(ice); 1805 return val != nval; 1806 } 1807 1808 /* 1809 * rate 1810 */ 1811 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1812 struct snd_ctl_elem_info *uinfo) 1813 { 1814 static const char * const texts[] = { 1815 "8000", /* 0: 6 */ 1816 "9600", /* 1: 3 */ 1817 "11025", /* 2: 10 */ 1818 "12000", /* 3: 2 */ 1819 "16000", /* 4: 5 */ 1820 "22050", /* 5: 9 */ 1821 "24000", /* 6: 1 */ 1822 "32000", /* 7: 4 */ 1823 "44100", /* 8: 8 */ 1824 "48000", /* 9: 0 */ 1825 "64000", /* 10: 15 */ 1826 "88200", /* 11: 11 */ 1827 "96000", /* 12: 7 */ 1828 "IEC958 Input", /* 13: -- */ 1829 }; 1830 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1831 uinfo->count = 1; 1832 uinfo->value.enumerated.items = 14; 1833 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1834 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1835 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1836 return 0; 1837 } 1838 1839 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1840 struct snd_ctl_elem_value *ucontrol) 1841 { 1842 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1843 static const unsigned char xlate[16] = { 1844 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10 1845 }; 1846 unsigned char val; 1847 1848 spin_lock_irq(&ice->reg_lock); 1849 if (is_spdif_master(ice)) { 1850 ucontrol->value.enumerated.item[0] = 13; 1851 } else { 1852 val = xlate[inb(ICEMT(ice, RATE)) & 15]; 1853 if (val == 255) { 1854 snd_BUG(); 1855 val = 0; 1856 } 1857 ucontrol->value.enumerated.item[0] = val; 1858 } 1859 spin_unlock_irq(&ice->reg_lock); 1860 return 0; 1861 } 1862 1863 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1864 struct snd_ctl_elem_value *ucontrol) 1865 { 1866 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1867 static const unsigned int xrate[13] = { 1868 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1869 32000, 44100, 48000, 64000, 88200, 96000 1870 }; 1871 unsigned char oval; 1872 int change = 0; 1873 1874 spin_lock_irq(&ice->reg_lock); 1875 oval = inb(ICEMT(ice, RATE)); 1876 if (ucontrol->value.enumerated.item[0] == 13) { 1877 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE)); 1878 } else { 1879 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1880 spin_unlock_irq(&ice->reg_lock); 1881 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1); 1882 spin_lock_irq(&ice->reg_lock); 1883 } 1884 change = inb(ICEMT(ice, RATE)) != oval; 1885 spin_unlock_irq(&ice->reg_lock); 1886 1887 if ((oval & ICE1712_SPDIF_MASTER) != 1888 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) 1889 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice)); 1890 1891 return change; 1892 } 1893 1894 static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = { 1895 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1896 .name = "Multi Track Internal Clock", 1897 .info = snd_ice1712_pro_internal_clock_info, 1898 .get = snd_ice1712_pro_internal_clock_get, 1899 .put = snd_ice1712_pro_internal_clock_put 1900 }; 1901 1902 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol, 1903 struct snd_ctl_elem_info *uinfo) 1904 { 1905 static const char * const texts[] = { 1906 "8000", /* 0: 6 */ 1907 "9600", /* 1: 3 */ 1908 "11025", /* 2: 10 */ 1909 "12000", /* 3: 2 */ 1910 "16000", /* 4: 5 */ 1911 "22050", /* 5: 9 */ 1912 "24000", /* 6: 1 */ 1913 "32000", /* 7: 4 */ 1914 "44100", /* 8: 8 */ 1915 "48000", /* 9: 0 */ 1916 "64000", /* 10: 15 */ 1917 "88200", /* 11: 11 */ 1918 "96000", /* 12: 7 */ 1919 // "IEC958 Input", /* 13: -- */ 1920 }; 1921 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1922 uinfo->count = 1; 1923 uinfo->value.enumerated.items = 13; 1924 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1925 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1926 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1927 return 0; 1928 } 1929 1930 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol, 1931 struct snd_ctl_elem_value *ucontrol) 1932 { 1933 int val; 1934 static const unsigned int xrate[13] = { 1935 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1936 32000, 44100, 48000, 64000, 88200, 96000 1937 }; 1938 1939 for (val = 0; val < 13; val++) { 1940 if (xrate[val] == PRO_RATE_DEFAULT) 1941 break; 1942 } 1943 1944 ucontrol->value.enumerated.item[0] = val; 1945 return 0; 1946 } 1947 1948 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol, 1949 struct snd_ctl_elem_value *ucontrol) 1950 { 1951 static const unsigned int xrate[13] = { 1952 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1953 32000, 44100, 48000, 64000, 88200, 96000 1954 }; 1955 unsigned char oval; 1956 int change = 0; 1957 1958 oval = PRO_RATE_DEFAULT; 1959 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1960 change = PRO_RATE_DEFAULT != oval; 1961 1962 return change; 1963 } 1964 1965 static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = { 1966 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1967 .name = "Multi Track Internal Clock Default", 1968 .info = snd_ice1712_pro_internal_clock_default_info, 1969 .get = snd_ice1712_pro_internal_clock_default_get, 1970 .put = snd_ice1712_pro_internal_clock_default_put 1971 }; 1972 1973 static int snd_ice1712_pro_rate_locking_info(struct snd_kcontrol *kcontrol, 1974 struct snd_ctl_elem_info *uinfo) 1975 { 1976 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1977 uinfo->count = 1; 1978 uinfo->value.integer.min = 0; 1979 uinfo->value.integer.max = 1; 1980 return 0; 1981 } 1982 1983 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1984 struct snd_ctl_elem_value *ucontrol) 1985 { 1986 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1987 return 0; 1988 } 1989 1990 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1991 struct snd_ctl_elem_value *ucontrol) 1992 { 1993 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1994 int change = 0, nval; 1995 1996 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1997 spin_lock_irq(&ice->reg_lock); 1998 change = PRO_RATE_LOCKED != nval; 1999 PRO_RATE_LOCKED = nval; 2000 spin_unlock_irq(&ice->reg_lock); 2001 return change; 2002 } 2003 2004 static const struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = { 2005 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2006 .name = "Multi Track Rate Locking", 2007 .info = snd_ice1712_pro_rate_locking_info, 2008 .get = snd_ice1712_pro_rate_locking_get, 2009 .put = snd_ice1712_pro_rate_locking_put 2010 }; 2011 2012 static int snd_ice1712_pro_rate_reset_info(struct snd_kcontrol *kcontrol, 2013 struct snd_ctl_elem_info *uinfo) 2014 { 2015 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 2016 uinfo->count = 1; 2017 uinfo->value.integer.min = 0; 2018 uinfo->value.integer.max = 1; 2019 return 0; 2020 } 2021 2022 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 2023 struct snd_ctl_elem_value *ucontrol) 2024 { 2025 ucontrol->value.integer.value[0] = PRO_RATE_RESET; 2026 return 0; 2027 } 2028 2029 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 2030 struct snd_ctl_elem_value *ucontrol) 2031 { 2032 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2033 int change = 0, nval; 2034 2035 nval = ucontrol->value.integer.value[0] ? 1 : 0; 2036 spin_lock_irq(&ice->reg_lock); 2037 change = PRO_RATE_RESET != nval; 2038 PRO_RATE_RESET = nval; 2039 spin_unlock_irq(&ice->reg_lock); 2040 return change; 2041 } 2042 2043 static const struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = { 2044 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2045 .name = "Multi Track Rate Reset", 2046 .info = snd_ice1712_pro_rate_reset_info, 2047 .get = snd_ice1712_pro_rate_reset_get, 2048 .put = snd_ice1712_pro_rate_reset_put 2049 }; 2050 2051 /* 2052 * routing 2053 */ 2054 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol, 2055 struct snd_ctl_elem_info *uinfo) 2056 { 2057 static const char * const texts[] = { 2058 "PCM Out", /* 0 */ 2059 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */ 2060 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */ 2061 "IEC958 In L", "IEC958 In R", /* 9-10 */ 2062 "Digital Mixer", /* 11 - optional */ 2063 }; 2064 2065 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2066 uinfo->count = 1; 2067 uinfo->value.enumerated.items = 2068 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11; 2069 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 2070 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 2071 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 2072 return 0; 2073 } 2074 2075 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2076 struct snd_ctl_elem_value *ucontrol) 2077 { 2078 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2079 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2080 unsigned int val, cval; 2081 2082 spin_lock_irq(&ice->reg_lock); 2083 val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2084 cval = inl(ICEMT(ice, ROUTE_CAPTURE)); 2085 spin_unlock_irq(&ice->reg_lock); 2086 2087 val >>= ((idx % 2) * 8) + ((idx / 2) * 2); 2088 val &= 3; 2089 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4); 2090 if (val == 1 && idx < 2) 2091 ucontrol->value.enumerated.item[0] = 11; 2092 else if (val == 2) 2093 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2094 else if (val == 3) 2095 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2096 else 2097 ucontrol->value.enumerated.item[0] = 0; 2098 return 0; 2099 } 2100 2101 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2102 struct snd_ctl_elem_value *ucontrol) 2103 { 2104 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2105 int change, shift; 2106 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2107 unsigned int val, old_val, nval; 2108 2109 /* update PSDOUT */ 2110 if (ucontrol->value.enumerated.item[0] >= 11) 2111 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */ 2112 else if (ucontrol->value.enumerated.item[0] >= 9) 2113 nval = 3; /* spdif in */ 2114 else if (ucontrol->value.enumerated.item[0] >= 1) 2115 nval = 2; /* analog in */ 2116 else 2117 nval = 0; /* pcm */ 2118 shift = ((idx % 2) * 8) + ((idx / 2) * 2); 2119 spin_lock_irq(&ice->reg_lock); 2120 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2121 val &= ~(0x03 << shift); 2122 val |= nval << shift; 2123 change = val != old_val; 2124 if (change) 2125 outw(val, ICEMT(ice, ROUTE_PSDOUT03)); 2126 spin_unlock_irq(&ice->reg_lock); 2127 if (nval < 2) /* dig mixer of pcm */ 2128 return change; 2129 2130 /* update CAPTURE */ 2131 spin_lock_irq(&ice->reg_lock); 2132 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE)); 2133 shift = ((idx / 2) * 8) + ((idx % 2) * 4); 2134 if (nval == 2) { /* analog in */ 2135 nval = ucontrol->value.enumerated.item[0] - 1; 2136 val &= ~(0x07 << shift); 2137 val |= nval << shift; 2138 } else { /* spdif in */ 2139 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2140 val &= ~(0x08 << shift); 2141 val |= nval << shift; 2142 } 2143 if (val != old_val) { 2144 change = 1; 2145 outl(val, ICEMT(ice, ROUTE_CAPTURE)); 2146 } 2147 spin_unlock_irq(&ice->reg_lock); 2148 return change; 2149 } 2150 2151 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2152 struct snd_ctl_elem_value *ucontrol) 2153 { 2154 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2155 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2156 unsigned int val, cval; 2157 val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2158 cval = (val >> (idx * 4 + 8)) & 0x0f; 2159 val = (val >> (idx * 2)) & 0x03; 2160 if (val == 1) 2161 ucontrol->value.enumerated.item[0] = 11; 2162 else if (val == 2) 2163 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2164 else if (val == 3) 2165 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2166 else 2167 ucontrol->value.enumerated.item[0] = 0; 2168 return 0; 2169 } 2170 2171 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2172 struct snd_ctl_elem_value *ucontrol) 2173 { 2174 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2175 int change, shift; 2176 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2177 unsigned int val, old_val, nval; 2178 2179 /* update SPDOUT */ 2180 spin_lock_irq(&ice->reg_lock); 2181 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2182 if (ucontrol->value.enumerated.item[0] >= 11) 2183 nval = 1; 2184 else if (ucontrol->value.enumerated.item[0] >= 9) 2185 nval = 3; 2186 else if (ucontrol->value.enumerated.item[0] >= 1) 2187 nval = 2; 2188 else 2189 nval = 0; 2190 shift = idx * 2; 2191 val &= ~(0x03 << shift); 2192 val |= nval << shift; 2193 shift = idx * 4 + 8; 2194 if (nval == 2) { 2195 nval = ucontrol->value.enumerated.item[0] - 1; 2196 val &= ~(0x07 << shift); 2197 val |= nval << shift; 2198 } else if (nval == 3) { 2199 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2200 val &= ~(0x08 << shift); 2201 val |= nval << shift; 2202 } 2203 change = val != old_val; 2204 if (change) 2205 outw(val, ICEMT(ice, ROUTE_SPDOUT)); 2206 spin_unlock_irq(&ice->reg_lock); 2207 return change; 2208 } 2209 2210 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = { 2211 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2212 .name = "H/W Playback Route", 2213 .info = snd_ice1712_pro_route_info, 2214 .get = snd_ice1712_pro_route_analog_get, 2215 .put = snd_ice1712_pro_route_analog_put, 2216 }; 2217 2218 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = { 2219 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2220 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route", 2221 .info = snd_ice1712_pro_route_info, 2222 .get = snd_ice1712_pro_route_spdif_get, 2223 .put = snd_ice1712_pro_route_spdif_put, 2224 .count = 2, 2225 }; 2226 2227 2228 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol, 2229 struct snd_ctl_elem_info *uinfo) 2230 { 2231 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2232 uinfo->count = 1; 2233 uinfo->value.integer.min = 0; 2234 uinfo->value.integer.max = 255; 2235 return 0; 2236 } 2237 2238 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol, 2239 struct snd_ctl_elem_value *ucontrol) 2240 { 2241 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2242 2243 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE)); 2244 return 0; 2245 } 2246 2247 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol, 2248 struct snd_ctl_elem_value *ucontrol) 2249 { 2250 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2251 int change; 2252 2253 spin_lock_irq(&ice->reg_lock); 2254 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0]; 2255 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE)); 2256 spin_unlock_irq(&ice->reg_lock); 2257 return change; 2258 } 2259 2260 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = { 2261 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2262 .name = "Multi Track Volume Rate", 2263 .info = snd_ice1712_pro_volume_rate_info, 2264 .get = snd_ice1712_pro_volume_rate_get, 2265 .put = snd_ice1712_pro_volume_rate_put 2266 }; 2267 2268 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol, 2269 struct snd_ctl_elem_info *uinfo) 2270 { 2271 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2272 uinfo->count = 22; 2273 uinfo->value.integer.min = 0; 2274 uinfo->value.integer.max = 255; 2275 return 0; 2276 } 2277 2278 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol, 2279 struct snd_ctl_elem_value *ucontrol) 2280 { 2281 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2282 int idx; 2283 2284 spin_lock_irq(&ice->reg_lock); 2285 for (idx = 0; idx < 22; idx++) { 2286 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX)); 2287 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA)); 2288 } 2289 spin_unlock_irq(&ice->reg_lock); 2290 return 0; 2291 } 2292 2293 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = { 2294 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2295 .name = "Multi Track Peak", 2296 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2297 .info = snd_ice1712_pro_peak_info, 2298 .get = snd_ice1712_pro_peak_get 2299 }; 2300 2301 /* 2302 * 2303 */ 2304 2305 /* 2306 * list of available boards 2307 */ 2308 static const struct snd_ice1712_card_info *card_tables[] __devinitdata = { 2309 snd_ice1712_hoontech_cards, 2310 snd_ice1712_delta_cards, 2311 snd_ice1712_ews_cards, 2312 NULL, 2313 }; 2314 2315 static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice, 2316 unsigned char dev, 2317 unsigned char addr) 2318 { 2319 long t = 0x10000; 2320 2321 outb(addr, ICEREG(ice, I2C_BYTE_ADDR)); 2322 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR)); 2323 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ; 2324 return inb(ICEREG(ice, I2C_DATA)); 2325 } 2326 2327 static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice, 2328 const char *modelname) 2329 { 2330 int dev = 0xa0; /* EEPROM device address */ 2331 unsigned int i, size; 2332 const struct snd_ice1712_card_info **tbl, *c; 2333 2334 if (! modelname || ! *modelname) { 2335 ice->eeprom.subvendor = 0; 2336 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0) 2337 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) | 2338 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) | 2339 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) | 2340 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24); 2341 if (ice->eeprom.subvendor == 0 || 2342 ice->eeprom.subvendor == (unsigned int)-1) { 2343 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */ 2344 u16 vendor, device; 2345 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor); 2346 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2347 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device); 2348 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) { 2349 printk(KERN_ERR "ice1712: No valid ID is found\n"); 2350 return -ENXIO; 2351 } 2352 } 2353 } 2354 for (tbl = card_tables; *tbl; tbl++) { 2355 for (c = *tbl; c->subvendor; c++) { 2356 if (modelname && c->model && ! strcmp(modelname, c->model)) { 2357 printk(KERN_INFO "ice1712: Using board model %s\n", c->name); 2358 ice->eeprom.subvendor = c->subvendor; 2359 } else if (c->subvendor != ice->eeprom.subvendor) 2360 continue; 2361 if (! c->eeprom_size || ! c->eeprom_data) 2362 goto found; 2363 /* if the EEPROM is given by the driver, use it */ 2364 snd_printdd("using the defined eeprom..\n"); 2365 ice->eeprom.version = 1; 2366 ice->eeprom.size = c->eeprom_size + 6; 2367 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2368 goto read_skipped; 2369 } 2370 } 2371 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n", 2372 ice->eeprom.subvendor); 2373 2374 found: 2375 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04); 2376 if (ice->eeprom.size < 6) 2377 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */ 2378 else if (ice->eeprom.size > 32) { 2379 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size); 2380 return -EIO; 2381 } 2382 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05); 2383 if (ice->eeprom.version != 1) { 2384 snd_printk(KERN_ERR "invalid EEPROM version %i\n", 2385 ice->eeprom.version); 2386 /* return -EIO; */ 2387 } 2388 size = ice->eeprom.size - 6; 2389 for (i = 0; i < size; i++) 2390 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6); 2391 2392 read_skipped: 2393 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK]; 2394 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE]; 2395 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR]; 2396 2397 return 0; 2398 } 2399 2400 2401 2402 static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice) 2403 { 2404 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2405 udelay(200); 2406 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2407 udelay(200); 2408 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && 2409 !ice->dxr_enable) 2410 /* Set eeprom value to limit active ADCs and DACs to 6; 2411 * Also disable AC97 as no hardware in standard 6fire card/box 2412 * Note: DXR extensions are not currently supported 2413 */ 2414 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a; 2415 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]); 2416 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]); 2417 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]); 2418 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]); 2419 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) { 2420 ice->gpio.write_mask = ice->eeprom.gpiomask; 2421 ice->gpio.direction = ice->eeprom.gpiodir; 2422 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 2423 ice->eeprom.gpiomask); 2424 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 2425 ice->eeprom.gpiodir); 2426 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2427 ice->eeprom.gpiostate); 2428 } else { 2429 ice->gpio.write_mask = 0xc0; 2430 ice->gpio.direction = 0xff; 2431 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0); 2432 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff); 2433 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2434 ICE1712_STDSP24_CLOCK_BIT); 2435 } 2436 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0); 2437 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) { 2438 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD)); 2439 udelay(100); 2440 outb(0, ICEREG(ice, AC97_CMD)); 2441 udelay(200); 2442 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0); 2443 } 2444 snd_ice1712_set_pro_rate(ice, 48000, 1); 2445 2446 return 0; 2447 } 2448 2449 int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice) 2450 { 2451 int err; 2452 struct snd_kcontrol *kctl; 2453 2454 snd_assert(ice->pcm_pro != NULL, return -EIO); 2455 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice)); 2456 if (err < 0) 2457 return err; 2458 kctl->id.device = ice->pcm_pro->device; 2459 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice)); 2460 if (err < 0) 2461 return err; 2462 kctl->id.device = ice->pcm_pro->device; 2463 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice)); 2464 if (err < 0) 2465 return err; 2466 kctl->id.device = ice->pcm_pro->device; 2467 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice)); 2468 if (err < 0) 2469 return err; 2470 kctl->id.device = ice->pcm_pro->device; 2471 ice->spdif.stream_ctl = kctl; 2472 return 0; 2473 } 2474 2475 2476 static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice) 2477 { 2478 int err; 2479 2480 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice)); 2481 if (err < 0) 2482 return err; 2483 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice)); 2484 if (err < 0) 2485 return err; 2486 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice)); 2487 if (err < 0) 2488 return err; 2489 2490 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice)); 2491 if (err < 0) 2492 return err; 2493 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice)); 2494 if (err < 0) 2495 return err; 2496 2497 if (ice->num_total_dacs > 0) { 2498 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route; 2499 tmp.count = ice->num_total_dacs; 2500 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2501 if (err < 0) 2502 return err; 2503 } 2504 2505 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice)); 2506 if (err < 0) 2507 return err; 2508 2509 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice)); 2510 if (err < 0) 2511 return err; 2512 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice)); 2513 if (err < 0) 2514 return err; 2515 2516 return 0; 2517 } 2518 2519 static int snd_ice1712_free(struct snd_ice1712 *ice) 2520 { 2521 if (! ice->port) 2522 goto __hw_end; 2523 /* mask all interrupts */ 2524 outb(0xc0, ICEMT(ice, IRQ)); 2525 outb(0xff, ICEREG(ice, IRQMASK)); 2526 /* --- */ 2527 __hw_end: 2528 if (ice->irq >= 0) { 2529 synchronize_irq(ice->irq); 2530 free_irq(ice->irq, ice); 2531 } 2532 if (ice->port) 2533 pci_release_regions(ice->pci); 2534 snd_ice1712_akm4xxx_free(ice); 2535 pci_disable_device(ice->pci); 2536 kfree(ice); 2537 return 0; 2538 } 2539 2540 static int snd_ice1712_dev_free(struct snd_device *device) 2541 { 2542 struct snd_ice1712 *ice = device->device_data; 2543 return snd_ice1712_free(ice); 2544 } 2545 2546 static int __devinit snd_ice1712_create(struct snd_card *card, 2547 struct pci_dev *pci, 2548 const char *modelname, 2549 int omni, 2550 int cs8427_timeout, 2551 int dxr_enable, 2552 struct snd_ice1712 ** r_ice1712) 2553 { 2554 struct snd_ice1712 *ice; 2555 int err; 2556 static struct snd_device_ops ops = { 2557 .dev_free = snd_ice1712_dev_free, 2558 }; 2559 2560 *r_ice1712 = NULL; 2561 2562 /* enable PCI device */ 2563 if ((err = pci_enable_device(pci)) < 0) 2564 return err; 2565 /* check, if we can restrict PCI DMA transfers to 28 bits */ 2566 if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 || 2567 pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) { 2568 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n"); 2569 pci_disable_device(pci); 2570 return -ENXIO; 2571 } 2572 2573 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2574 if (ice == NULL) { 2575 pci_disable_device(pci); 2576 return -ENOMEM; 2577 } 2578 ice->omni = omni ? 1 : 0; 2579 if (cs8427_timeout < 1) 2580 cs8427_timeout = 1; 2581 else if (cs8427_timeout > 1000) 2582 cs8427_timeout = 1000; 2583 ice->cs8427_timeout = cs8427_timeout; 2584 ice->dxr_enable = dxr_enable; 2585 spin_lock_init(&ice->reg_lock); 2586 mutex_init(&ice->gpio_mutex); 2587 mutex_init(&ice->i2c_mutex); 2588 mutex_init(&ice->open_mutex); 2589 ice->gpio.set_mask = snd_ice1712_set_gpio_mask; 2590 ice->gpio.set_dir = snd_ice1712_set_gpio_dir; 2591 ice->gpio.set_data = snd_ice1712_set_gpio_data; 2592 ice->gpio.get_data = snd_ice1712_get_gpio_data; 2593 2594 ice->spdif.cs8403_bits = 2595 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */ 2596 0x10 | /* no emphasis */ 2597 0x20); /* PCM encoder/decoder */ 2598 ice->card = card; 2599 ice->pci = pci; 2600 ice->irq = -1; 2601 pci_set_master(pci); 2602 pci_write_config_word(ice->pci, 0x40, 0x807f); 2603 pci_write_config_word(ice->pci, 0x42, 0x0006); 2604 snd_ice1712_proc_init(ice); 2605 synchronize_irq(pci->irq); 2606 2607 if ((err = pci_request_regions(pci, "ICE1712")) < 0) { 2608 kfree(ice); 2609 pci_disable_device(pci); 2610 return err; 2611 } 2612 ice->port = pci_resource_start(pci, 0); 2613 ice->ddma_port = pci_resource_start(pci, 1); 2614 ice->dmapath_port = pci_resource_start(pci, 2); 2615 ice->profi_port = pci_resource_start(pci, 3); 2616 2617 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED, 2618 "ICE1712", ice)) { 2619 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 2620 snd_ice1712_free(ice); 2621 return -EIO; 2622 } 2623 2624 ice->irq = pci->irq; 2625 2626 if (snd_ice1712_read_eeprom(ice, modelname) < 0) { 2627 snd_ice1712_free(ice); 2628 return -EIO; 2629 } 2630 if (snd_ice1712_chip_init(ice) < 0) { 2631 snd_ice1712_free(ice); 2632 return -EIO; 2633 } 2634 2635 /* unmask used interrupts */ 2636 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ? 2637 ICE1712_IRQ_MPU2 : 0) | 2638 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ? 2639 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0), 2640 ICEREG(ice, IRQMASK)); 2641 outb(0x00, ICEMT(ice, IRQ)); 2642 2643 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) { 2644 snd_ice1712_free(ice); 2645 return err; 2646 } 2647 2648 snd_card_set_dev(card, &pci->dev); 2649 2650 *r_ice1712 = ice; 2651 return 0; 2652 } 2653 2654 2655 /* 2656 * 2657 * Registration 2658 * 2659 */ 2660 2661 static const struct snd_ice1712_card_info no_matched __devinitdata; 2662 2663 static int __devinit snd_ice1712_probe(struct pci_dev *pci, 2664 const struct pci_device_id *pci_id) 2665 { 2666 static int dev; 2667 struct snd_card *card; 2668 struct snd_ice1712 *ice; 2669 int pcm_dev = 0, err; 2670 const struct snd_ice1712_card_info **tbl, *c; 2671 2672 if (dev >= SNDRV_CARDS) 2673 return -ENODEV; 2674 if (!enable[dev]) { 2675 dev++; 2676 return -ENOENT; 2677 } 2678 2679 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); 2680 if (card == NULL) 2681 return -ENOMEM; 2682 2683 strcpy(card->driver, "ICE1712"); 2684 strcpy(card->shortname, "ICEnsemble ICE1712"); 2685 2686 if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev], 2687 cs8427_timeout[dev], dxr_enable[dev], 2688 &ice)) < 0) { 2689 snd_card_free(card); 2690 return err; 2691 } 2692 2693 for (tbl = card_tables; *tbl; tbl++) { 2694 for (c = *tbl; c->subvendor; c++) { 2695 if (c->subvendor == ice->eeprom.subvendor) { 2696 strcpy(card->shortname, c->name); 2697 if (c->driver) /* specific driver? */ 2698 strcpy(card->driver, c->driver); 2699 if (c->chip_init) { 2700 if ((err = c->chip_init(ice)) < 0) { 2701 snd_card_free(card); 2702 return err; 2703 } 2704 } 2705 goto __found; 2706 } 2707 } 2708 } 2709 c = &no_matched; 2710 __found: 2711 2712 if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) { 2713 snd_card_free(card); 2714 return err; 2715 } 2716 2717 if (ice_has_con_ac97(ice)) 2718 if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) { 2719 snd_card_free(card); 2720 return err; 2721 } 2722 2723 if ((err = snd_ice1712_ac97_mixer(ice)) < 0) { 2724 snd_card_free(card); 2725 return err; 2726 } 2727 2728 if ((err = snd_ice1712_build_controls(ice)) < 0) { 2729 snd_card_free(card); 2730 return err; 2731 } 2732 2733 if (c->build_controls) { 2734 if ((err = c->build_controls(ice)) < 0) { 2735 snd_card_free(card); 2736 return err; 2737 } 2738 } 2739 2740 if (ice_has_con_ac97(ice)) 2741 if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) { 2742 snd_card_free(card); 2743 return err; 2744 } 2745 2746 if (! c->no_mpu401) { 2747 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712, 2748 ICEREG(ice, MPU1_CTRL), 2749 (c->mpu401_1_info_flags | 2750 MPU401_INFO_INTEGRATED), 2751 ice->irq, 0, 2752 &ice->rmidi[0])) < 0) { 2753 snd_card_free(card); 2754 return err; 2755 } 2756 if (c->mpu401_1_name) 2757 /* Prefered name available in card_info */ 2758 snprintf(ice->rmidi[0]->name, 2759 sizeof(ice->rmidi[0]->name), 2760 "%s %d", c->mpu401_1_name, card->number); 2761 2762 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) { 2763 /* 2nd port used */ 2764 if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712, 2765 ICEREG(ice, MPU2_CTRL), 2766 (c->mpu401_2_info_flags | 2767 MPU401_INFO_INTEGRATED), 2768 ice->irq, 0, 2769 &ice->rmidi[1])) < 0) { 2770 snd_card_free(card); 2771 return err; 2772 } 2773 if (c->mpu401_2_name) 2774 /* Prefered name available in card_info */ 2775 snprintf(ice->rmidi[1]->name, 2776 sizeof(ice->rmidi[1]->name), 2777 "%s %d", c->mpu401_2_name, 2778 card->number); 2779 } 2780 } 2781 2782 snd_ice1712_set_input_clock_source(ice, 0); 2783 2784 sprintf(card->longname, "%s at 0x%lx, irq %i", 2785 card->shortname, ice->port, ice->irq); 2786 2787 if ((err = snd_card_register(card)) < 0) { 2788 snd_card_free(card); 2789 return err; 2790 } 2791 pci_set_drvdata(pci, card); 2792 dev++; 2793 return 0; 2794 } 2795 2796 static void __devexit snd_ice1712_remove(struct pci_dev *pci) 2797 { 2798 snd_card_free(pci_get_drvdata(pci)); 2799 pci_set_drvdata(pci, NULL); 2800 } 2801 2802 static struct pci_driver driver = { 2803 .name = "ICE1712", 2804 .id_table = snd_ice1712_ids, 2805 .probe = snd_ice1712_probe, 2806 .remove = __devexit_p(snd_ice1712_remove), 2807 }; 2808 2809 static int __init alsa_card_ice1712_init(void) 2810 { 2811 return pci_register_driver(&driver); 2812 } 2813 2814 static void __exit alsa_card_ice1712_exit(void) 2815 { 2816 pci_unregister_driver(&driver); 2817 } 2818 2819 module_init(alsa_card_ice1712_init) 2820 module_exit(alsa_card_ice1712_exit) 2821