1 /* 2 * ALSA driver for ICEnsemble ICE1712 (Envy24) 3 * 4 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * 20 */ 21 22 /* 23 NOTES: 24 - spdif nonaudio consumer mode does not work (at least with my 25 Sony STR-DB830) 26 */ 27 28 /* 29 * Changes: 30 * 31 * 2002.09.09 Takashi Iwai <tiwai@suse.de> 32 * split the code to several files. each low-level routine 33 * is stored in the local file and called from registration 34 * function from card_info struct. 35 * 36 * 2002.11.26 James Stafford <jstafford@ampltd.com> 37 * Added support for VT1724 (Envy24HT) 38 * I have left out support for 176.4 and 192 KHz for the moment. 39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401 40 * 41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de> 42 * Split vt1724 part to an independent driver. 43 * The GPIO is accessed through the callback functions now. 44 * 45 * 2004.03.31 Doug McLain <nostar@comcast.net> 46 * Added support for Event Electronics EZ8 card to hoontech.c. 47 */ 48 49 50 #include <sound/driver.h> 51 #include <asm/io.h> 52 #include <linux/delay.h> 53 #include <linux/interrupt.h> 54 #include <linux/init.h> 55 #include <linux/pci.h> 56 #include <linux/dma-mapping.h> 57 #include <linux/slab.h> 58 #include <linux/moduleparam.h> 59 #include <linux/mutex.h> 60 61 #include <sound/core.h> 62 #include <sound/cs8427.h> 63 #include <sound/info.h> 64 #include <sound/initval.h> 65 #include <sound/tlv.h> 66 67 #include <sound/asoundef.h> 68 69 #include "ice1712.h" 70 71 /* lowlevel routines */ 72 #include "delta.h" 73 #include "ews.h" 74 #include "hoontech.h" 75 76 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); 77 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)"); 78 MODULE_LICENSE("GPL"); 79 MODULE_SUPPORTED_DEVICE("{" 80 HOONTECH_DEVICE_DESC 81 DELTA_DEVICE_DESC 82 EWS_DEVICE_DESC 83 "{ICEnsemble,Generic ICE1712}," 84 "{ICEnsemble,Generic Envy24}}"); 85 86 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 87 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 88 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ 89 static char *model[SNDRV_CARDS]; 90 static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */ 91 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */ 92 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */ 93 94 module_param_array(index, int, NULL, 0444); 95 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard."); 96 module_param_array(id, charp, NULL, 0444); 97 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard."); 98 module_param_array(enable, bool, NULL, 0444); 99 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard."); 100 module_param_array(omni, bool, NULL, 0444); 101 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support."); 102 module_param_array(cs8427_timeout, int, NULL, 0444); 103 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution."); 104 module_param_array(model, charp, NULL, 0444); 105 MODULE_PARM_DESC(model, "Use the given board model."); 106 module_param_array(dxr_enable, int, NULL, 0444); 107 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE."); 108 109 110 static const struct pci_device_id snd_ice1712_ids[] = { 111 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */ 112 { 0, } 113 }; 114 115 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids); 116 117 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice); 118 static int snd_ice1712_build_controls(struct snd_ice1712 *ice); 119 120 static int PRO_RATE_LOCKED; 121 static int PRO_RATE_RESET = 1; 122 static unsigned int PRO_RATE_DEFAULT = 44100; 123 124 /* 125 * Basic I/O 126 */ 127 128 /* check whether the clock mode is spdif-in */ 129 static inline int is_spdif_master(struct snd_ice1712 *ice) 130 { 131 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0; 132 } 133 134 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 135 { 136 return is_spdif_master(ice) || PRO_RATE_LOCKED; 137 } 138 139 static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data) 140 { 141 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 142 outl(data, ICEDS(ice, DATA)); 143 } 144 145 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr) 146 { 147 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 148 return inl(ICEDS(ice, DATA)); 149 } 150 151 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97, 152 unsigned short reg, 153 unsigned short val) 154 { 155 struct snd_ice1712 *ice = ac97->private_data; 156 int tm; 157 unsigned char old_cmd = 0; 158 159 for (tm = 0; tm < 0x10000; tm++) { 160 old_cmd = inb(ICEREG(ice, AC97_CMD)); 161 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 162 continue; 163 if (!(old_cmd & ICE1712_AC97_READY)) 164 continue; 165 break; 166 } 167 outb(reg, ICEREG(ice, AC97_INDEX)); 168 outw(val, ICEREG(ice, AC97_DATA)); 169 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 170 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD)); 171 for (tm = 0; tm < 0x10000; tm++) 172 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 173 break; 174 } 175 176 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97, 177 unsigned short reg) 178 { 179 struct snd_ice1712 *ice = ac97->private_data; 180 int tm; 181 unsigned char old_cmd = 0; 182 183 for (tm = 0; tm < 0x10000; tm++) { 184 old_cmd = inb(ICEREG(ice, AC97_CMD)); 185 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 186 continue; 187 if (!(old_cmd & ICE1712_AC97_READY)) 188 continue; 189 break; 190 } 191 outb(reg, ICEREG(ice, AC97_INDEX)); 192 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD)); 193 for (tm = 0; tm < 0x10000; tm++) 194 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 195 break; 196 if (tm >= 0x10000) /* timeout */ 197 return ~0; 198 return inw(ICEREG(ice, AC97_DATA)); 199 } 200 201 /* 202 * pro ac97 section 203 */ 204 205 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97, 206 unsigned short reg, 207 unsigned short val) 208 { 209 struct snd_ice1712 *ice = ac97->private_data; 210 int tm; 211 unsigned char old_cmd = 0; 212 213 for (tm = 0; tm < 0x10000; tm++) { 214 old_cmd = inb(ICEMT(ice, AC97_CMD)); 215 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 216 continue; 217 if (!(old_cmd & ICE1712_AC97_READY)) 218 continue; 219 break; 220 } 221 outb(reg, ICEMT(ice, AC97_INDEX)); 222 outw(val, ICEMT(ice, AC97_DATA)); 223 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 224 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD)); 225 for (tm = 0; tm < 0x10000; tm++) 226 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 227 break; 228 } 229 230 231 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97, 232 unsigned short reg) 233 { 234 struct snd_ice1712 *ice = ac97->private_data; 235 int tm; 236 unsigned char old_cmd = 0; 237 238 for (tm = 0; tm < 0x10000; tm++) { 239 old_cmd = inb(ICEMT(ice, AC97_CMD)); 240 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 241 continue; 242 if (!(old_cmd & ICE1712_AC97_READY)) 243 continue; 244 break; 245 } 246 outb(reg, ICEMT(ice, AC97_INDEX)); 247 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD)); 248 for (tm = 0; tm < 0x10000; tm++) 249 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 250 break; 251 if (tm >= 0x10000) /* timeout */ 252 return ~0; 253 return inw(ICEMT(ice, AC97_DATA)); 254 } 255 256 /* 257 * consumer ac97 digital mix 258 */ 259 static int snd_ice1712_digmix_route_ac97_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 260 { 261 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 262 uinfo->count = 1; 263 uinfo->value.integer.min = 0; 264 uinfo->value.integer.max = 1; 265 return 0; 266 } 267 268 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 269 { 270 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 271 272 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0; 273 return 0; 274 } 275 276 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 277 { 278 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 279 unsigned char val, nval; 280 281 spin_lock_irq(&ice->reg_lock); 282 val = inb(ICEMT(ice, MONITOR_ROUTECTRL)); 283 nval = val & ~ICE1712_ROUTE_AC97; 284 if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97; 285 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL)); 286 spin_unlock_irq(&ice->reg_lock); 287 return val != nval; 288 } 289 290 static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = { 291 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 292 .name = "Digital Mixer To AC97", 293 .info = snd_ice1712_digmix_route_ac97_info, 294 .get = snd_ice1712_digmix_route_ac97_get, 295 .put = snd_ice1712_digmix_route_ac97_put, 296 }; 297 298 299 /* 300 * gpio operations 301 */ 302 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 303 { 304 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data); 305 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 306 } 307 308 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 309 { 310 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data); 311 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 312 } 313 314 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice) 315 { 316 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 317 } 318 319 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val) 320 { 321 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val); 322 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 323 } 324 325 /* 326 * 327 * CS8427 interface 328 * 329 */ 330 331 /* 332 * change the input clock selection 333 * spdif_clock = 1 - IEC958 input, 0 - Envy24 334 */ 335 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock) 336 { 337 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */ 338 unsigned char val, nval; 339 int res = 0; 340 341 snd_i2c_lock(ice->i2c); 342 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) { 343 snd_i2c_unlock(ice->i2c); 344 return -EIO; 345 } 346 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) { 347 snd_i2c_unlock(ice->i2c); 348 return -EIO; 349 } 350 nval = val & 0xf0; 351 if (spdif_clock) 352 nval |= 0x01; 353 else 354 nval |= 0x04; 355 if (val != nval) { 356 reg[1] = nval; 357 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) { 358 res = -EIO; 359 } else { 360 res++; 361 } 362 } 363 snd_i2c_unlock(ice->i2c); 364 return res; 365 } 366 367 /* 368 * spdif callbacks 369 */ 370 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 371 { 372 snd_cs8427_iec958_active(ice->cs8427, 1); 373 } 374 375 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 376 { 377 snd_cs8427_iec958_active(ice->cs8427, 0); 378 } 379 380 static void setup_cs8427(struct snd_ice1712 *ice, int rate) 381 { 382 snd_cs8427_iec958_pcm(ice->cs8427, rate); 383 } 384 385 /* 386 * create and initialize callbacks for cs8427 interface 387 */ 388 int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr) 389 { 390 int err; 391 392 if ((err = snd_cs8427_create(ice->i2c, addr, 393 (ice->cs8427_timeout * HZ) / 1000, 394 &ice->cs8427)) < 0) { 395 snd_printk(KERN_ERR "CS8427 initialization failed\n"); 396 return err; 397 } 398 ice->spdif.ops.open = open_cs8427; 399 ice->spdif.ops.close = close_cs8427; 400 ice->spdif.ops.setup_rate = setup_cs8427; 401 return 0; 402 } 403 404 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master) 405 { 406 /* change CS8427 clock source too */ 407 if (ice->cs8427) 408 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master); 409 /* notify ak4524 chip as well */ 410 if (spdif_is_master) { 411 unsigned int i; 412 for (i = 0; i < ice->akm_codecs; i++) { 413 if (ice->akm[i].ops.set_rate_val) 414 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 415 } 416 } 417 } 418 419 /* 420 * Interrupt handler 421 */ 422 423 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id) 424 { 425 struct snd_ice1712 *ice = dev_id; 426 unsigned char status; 427 int handled = 0; 428 429 while (1) { 430 status = inb(ICEREG(ice, IRQSTAT)); 431 if (status == 0) 432 break; 433 handled = 1; 434 if (status & ICE1712_IRQ_MPU1) { 435 if (ice->rmidi[0]) 436 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data); 437 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT)); 438 status &= ~ICE1712_IRQ_MPU1; 439 } 440 if (status & ICE1712_IRQ_TIMER) 441 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT)); 442 if (status & ICE1712_IRQ_MPU2) { 443 if (ice->rmidi[1]) 444 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data); 445 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT)); 446 status &= ~ICE1712_IRQ_MPU2; 447 } 448 if (status & ICE1712_IRQ_PROPCM) { 449 unsigned char mtstat = inb(ICEMT(ice, IRQ)); 450 if (mtstat & ICE1712_MULTI_PBKSTATUS) { 451 if (ice->playback_pro_substream) 452 snd_pcm_period_elapsed(ice->playback_pro_substream); 453 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ)); 454 } 455 if (mtstat & ICE1712_MULTI_CAPSTATUS) { 456 if (ice->capture_pro_substream) 457 snd_pcm_period_elapsed(ice->capture_pro_substream); 458 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ)); 459 } 460 } 461 if (status & ICE1712_IRQ_FM) 462 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT)); 463 if (status & ICE1712_IRQ_PBKDS) { 464 u32 idx; 465 u16 pbkstatus; 466 struct snd_pcm_substream *substream; 467 pbkstatus = inw(ICEDS(ice, INTSTAT)); 468 //printk("pbkstatus = 0x%x\n", pbkstatus); 469 for (idx = 0; idx < 6; idx++) { 470 if ((pbkstatus & (3 << (idx * 2))) == 0) 471 continue; 472 if ((substream = ice->playback_con_substream_ds[idx]) != NULL) 473 snd_pcm_period_elapsed(substream); 474 outw(3 << (idx * 2), ICEDS(ice, INTSTAT)); 475 } 476 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT)); 477 } 478 if (status & ICE1712_IRQ_CONCAP) { 479 if (ice->capture_con_substream) 480 snd_pcm_period_elapsed(ice->capture_con_substream); 481 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT)); 482 } 483 if (status & ICE1712_IRQ_CONPBK) { 484 if (ice->playback_con_substream) 485 snd_pcm_period_elapsed(ice->playback_con_substream); 486 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT)); 487 } 488 } 489 return IRQ_RETVAL(handled); 490 } 491 492 493 /* 494 * PCM part - misc 495 */ 496 497 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream, 498 struct snd_pcm_hw_params *hw_params) 499 { 500 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 501 } 502 503 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream) 504 { 505 return snd_pcm_lib_free_pages(substream); 506 } 507 508 /* 509 * PCM part - consumer I/O 510 */ 511 512 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream, 513 int cmd) 514 { 515 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 516 int result = 0; 517 u32 tmp; 518 519 spin_lock(&ice->reg_lock); 520 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL); 521 if (cmd == SNDRV_PCM_TRIGGER_START) { 522 tmp |= 1; 523 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 524 tmp &= ~1; 525 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 526 tmp |= 2; 527 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 528 tmp &= ~2; 529 } else { 530 result = -EINVAL; 531 } 532 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 533 spin_unlock(&ice->reg_lock); 534 return result; 535 } 536 537 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream, 538 int cmd) 539 { 540 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 541 int result = 0; 542 u32 tmp; 543 544 spin_lock(&ice->reg_lock); 545 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL); 546 if (cmd == SNDRV_PCM_TRIGGER_START) { 547 tmp |= 1; 548 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 549 tmp &= ~1; 550 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 551 tmp |= 2; 552 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 553 tmp &= ~2; 554 } else { 555 result = -EINVAL; 556 } 557 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp); 558 spin_unlock(&ice->reg_lock); 559 return result; 560 } 561 562 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream, 563 int cmd) 564 { 565 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 566 int result = 0; 567 u8 tmp; 568 569 spin_lock(&ice->reg_lock); 570 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL); 571 if (cmd == SNDRV_PCM_TRIGGER_START) { 572 tmp |= 1; 573 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 574 tmp &= ~1; 575 } else { 576 result = -EINVAL; 577 } 578 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 579 spin_unlock(&ice->reg_lock); 580 return result; 581 } 582 583 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream) 584 { 585 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 586 struct snd_pcm_runtime *runtime = substream->runtime; 587 u32 period_size, buf_size, rate, tmp; 588 589 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 590 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 591 tmp = 0x0000; 592 if (snd_pcm_format_width(runtime->format) == 16) 593 tmp |= 0x10; 594 if (runtime->channels == 2) 595 tmp |= 0x08; 596 rate = (runtime->rate * 8192) / 375; 597 if (rate > 0x000fffff) 598 rate = 0x000fffff; 599 spin_lock_irq(&ice->reg_lock); 600 outb(0, ice->ddma_port + 15); 601 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b); 602 outl(runtime->dma_addr, ice->ddma_port + 0); 603 outw(buf_size, ice->ddma_port + 4); 604 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff); 605 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff); 606 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff); 607 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 608 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff); 609 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8); 610 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0); 611 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0); 612 spin_unlock_irq(&ice->reg_lock); 613 return 0; 614 } 615 616 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream) 617 { 618 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 619 struct snd_pcm_runtime *runtime = substream->runtime; 620 u32 period_size, buf_size, rate, tmp, chn; 621 622 period_size = snd_pcm_lib_period_bytes(substream) - 1; 623 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 624 tmp = 0x0064; 625 if (snd_pcm_format_width(runtime->format) == 16) 626 tmp &= ~0x04; 627 if (runtime->channels == 2) 628 tmp |= 0x08; 629 rate = (runtime->rate * 8192) / 375; 630 if (rate > 0x000fffff) 631 rate = 0x000fffff; 632 ice->playback_con_active_buf[substream->number] = 0; 633 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr; 634 chn = substream->number * 2; 635 spin_lock_irq(&ice->reg_lock); 636 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr); 637 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size); 638 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0)); 639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size); 640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate); 641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0); 642 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp); 643 if (runtime->channels == 2) { 644 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate); 645 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0); 646 } 647 spin_unlock_irq(&ice->reg_lock); 648 return 0; 649 } 650 651 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream) 652 { 653 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 654 struct snd_pcm_runtime *runtime = substream->runtime; 655 u32 period_size, buf_size; 656 u8 tmp; 657 658 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 659 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 660 tmp = 0x06; 661 if (snd_pcm_format_width(runtime->format) == 16) 662 tmp &= ~0x04; 663 if (runtime->channels == 2) 664 tmp &= ~0x02; 665 spin_lock_irq(&ice->reg_lock); 666 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR)); 667 outw(buf_size, ICEREG(ice, CONCAP_COUNT)); 668 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8); 669 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff); 670 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 671 spin_unlock_irq(&ice->reg_lock); 672 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); 673 return 0; 674 } 675 676 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream) 677 { 678 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 679 struct snd_pcm_runtime *runtime = substream->runtime; 680 size_t ptr; 681 682 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1)) 683 return 0; 684 ptr = runtime->buffer_size - inw(ice->ddma_port + 4); 685 if (ptr == runtime->buffer_size) 686 ptr = 0; 687 return bytes_to_frames(substream->runtime, ptr); 688 } 689 690 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream) 691 { 692 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 693 u8 addr; 694 size_t ptr; 695 696 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1)) 697 return 0; 698 if (ice->playback_con_active_buf[substream->number]) 699 addr = ICE1712_DSC_ADDR1; 700 else 701 addr = ICE1712_DSC_ADDR0; 702 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) - 703 ice->playback_con_virt_addr[substream->number]; 704 if (ptr == substream->runtime->buffer_size) 705 ptr = 0; 706 return bytes_to_frames(substream->runtime, ptr); 707 } 708 709 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream) 710 { 711 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 712 size_t ptr; 713 714 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1)) 715 return 0; 716 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr; 717 if (ptr == substream->runtime->buffer_size) 718 ptr = 0; 719 return bytes_to_frames(substream->runtime, ptr); 720 } 721 722 static const struct snd_pcm_hardware snd_ice1712_playback = 723 { 724 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 725 SNDRV_PCM_INFO_BLOCK_TRANSFER | 726 SNDRV_PCM_INFO_MMAP_VALID | 727 SNDRV_PCM_INFO_PAUSE), 728 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 729 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 730 .rate_min = 4000, 731 .rate_max = 48000, 732 .channels_min = 1, 733 .channels_max = 2, 734 .buffer_bytes_max = (64*1024), 735 .period_bytes_min = 64, 736 .period_bytes_max = (64*1024), 737 .periods_min = 1, 738 .periods_max = 1024, 739 .fifo_size = 0, 740 }; 741 742 static const struct snd_pcm_hardware snd_ice1712_playback_ds = 743 { 744 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 745 SNDRV_PCM_INFO_BLOCK_TRANSFER | 746 SNDRV_PCM_INFO_MMAP_VALID | 747 SNDRV_PCM_INFO_PAUSE), 748 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 749 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 750 .rate_min = 4000, 751 .rate_max = 48000, 752 .channels_min = 1, 753 .channels_max = 2, 754 .buffer_bytes_max = (128*1024), 755 .period_bytes_min = 64, 756 .period_bytes_max = (128*1024), 757 .periods_min = 2, 758 .periods_max = 2, 759 .fifo_size = 0, 760 }; 761 762 static const struct snd_pcm_hardware snd_ice1712_capture = 763 { 764 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 765 SNDRV_PCM_INFO_BLOCK_TRANSFER | 766 SNDRV_PCM_INFO_MMAP_VALID), 767 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 768 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 769 .rate_min = 4000, 770 .rate_max = 48000, 771 .channels_min = 1, 772 .channels_max = 2, 773 .buffer_bytes_max = (64*1024), 774 .period_bytes_min = 64, 775 .period_bytes_max = (64*1024), 776 .periods_min = 1, 777 .periods_max = 1024, 778 .fifo_size = 0, 779 }; 780 781 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream) 782 { 783 struct snd_pcm_runtime *runtime = substream->runtime; 784 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 785 786 ice->playback_con_substream = substream; 787 runtime->hw = snd_ice1712_playback; 788 return 0; 789 } 790 791 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream) 792 { 793 struct snd_pcm_runtime *runtime = substream->runtime; 794 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 795 u32 tmp; 796 797 ice->playback_con_substream_ds[substream->number] = substream; 798 runtime->hw = snd_ice1712_playback_ds; 799 spin_lock_irq(&ice->reg_lock); 800 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2)); 801 outw(tmp, ICEDS(ice, INTMASK)); 802 spin_unlock_irq(&ice->reg_lock); 803 return 0; 804 } 805 806 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream) 807 { 808 struct snd_pcm_runtime *runtime = substream->runtime; 809 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 810 811 ice->capture_con_substream = substream; 812 runtime->hw = snd_ice1712_capture; 813 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC]; 814 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000)) 815 runtime->hw.rate_min = 48000; 816 return 0; 817 } 818 819 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream) 820 { 821 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 822 823 ice->playback_con_substream = NULL; 824 return 0; 825 } 826 827 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream) 828 { 829 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 830 u32 tmp; 831 832 spin_lock_irq(&ice->reg_lock); 833 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2)); 834 outw(tmp, ICEDS(ice, INTMASK)); 835 spin_unlock_irq(&ice->reg_lock); 836 ice->playback_con_substream_ds[substream->number] = NULL; 837 return 0; 838 } 839 840 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream) 841 { 842 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 843 844 ice->capture_con_substream = NULL; 845 return 0; 846 } 847 848 static struct snd_pcm_ops snd_ice1712_playback_ops = { 849 .open = snd_ice1712_playback_open, 850 .close = snd_ice1712_playback_close, 851 .ioctl = snd_pcm_lib_ioctl, 852 .hw_params = snd_ice1712_hw_params, 853 .hw_free = snd_ice1712_hw_free, 854 .prepare = snd_ice1712_playback_prepare, 855 .trigger = snd_ice1712_playback_trigger, 856 .pointer = snd_ice1712_playback_pointer, 857 }; 858 859 static struct snd_pcm_ops snd_ice1712_playback_ds_ops = { 860 .open = snd_ice1712_playback_ds_open, 861 .close = snd_ice1712_playback_ds_close, 862 .ioctl = snd_pcm_lib_ioctl, 863 .hw_params = snd_ice1712_hw_params, 864 .hw_free = snd_ice1712_hw_free, 865 .prepare = snd_ice1712_playback_ds_prepare, 866 .trigger = snd_ice1712_playback_ds_trigger, 867 .pointer = snd_ice1712_playback_ds_pointer, 868 }; 869 870 static struct snd_pcm_ops snd_ice1712_capture_ops = { 871 .open = snd_ice1712_capture_open, 872 .close = snd_ice1712_capture_close, 873 .ioctl = snd_pcm_lib_ioctl, 874 .hw_params = snd_ice1712_hw_params, 875 .hw_free = snd_ice1712_hw_free, 876 .prepare = snd_ice1712_capture_prepare, 877 .trigger = snd_ice1712_capture_trigger, 878 .pointer = snd_ice1712_capture_pointer, 879 }; 880 881 static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm) 882 { 883 struct snd_pcm *pcm; 884 int err; 885 886 if (rpcm) 887 *rpcm = NULL; 888 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm); 889 if (err < 0) 890 return err; 891 892 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops); 893 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops); 894 895 pcm->private_data = ice; 896 pcm->info_flags = 0; 897 strcpy(pcm->name, "ICE1712 consumer"); 898 ice->pcm = pcm; 899 900 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 901 snd_dma_pci_data(ice->pci), 64*1024, 64*1024); 902 903 if (rpcm) 904 *rpcm = pcm; 905 906 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n"); 907 908 return 0; 909 } 910 911 static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm) 912 { 913 struct snd_pcm *pcm; 914 int err; 915 916 if (rpcm) 917 *rpcm = NULL; 918 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm); 919 if (err < 0) 920 return err; 921 922 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops); 923 924 pcm->private_data = ice; 925 pcm->info_flags = 0; 926 strcpy(pcm->name, "ICE1712 consumer (DS)"); 927 ice->pcm_ds = pcm; 928 929 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 930 snd_dma_pci_data(ice->pci), 64*1024, 128*1024); 931 932 if (rpcm) 933 *rpcm = pcm; 934 935 return 0; 936 } 937 938 /* 939 * PCM code - professional part (multitrack) 940 */ 941 942 static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000, 943 32000, 44100, 48000, 64000, 88200, 96000 }; 944 945 static struct snd_pcm_hw_constraint_list hw_constraints_rates = { 946 .count = ARRAY_SIZE(rates), 947 .list = rates, 948 .mask = 0, 949 }; 950 951 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream, 952 int cmd) 953 { 954 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 955 switch (cmd) { 956 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 957 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 958 { 959 unsigned int what; 960 unsigned int old; 961 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) 962 return -EINVAL; 963 what = ICE1712_PLAYBACK_PAUSE; 964 snd_pcm_trigger_done(substream, substream); 965 spin_lock(&ice->reg_lock); 966 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 967 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 968 old |= what; 969 else 970 old &= ~what; 971 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 972 spin_unlock(&ice->reg_lock); 973 break; 974 } 975 case SNDRV_PCM_TRIGGER_START: 976 case SNDRV_PCM_TRIGGER_STOP: 977 { 978 unsigned int what = 0; 979 unsigned int old; 980 struct snd_pcm_substream *s; 981 982 snd_pcm_group_for_each_entry(s, substream) { 983 if (s == ice->playback_pro_substream) { 984 what |= ICE1712_PLAYBACK_START; 985 snd_pcm_trigger_done(s, substream); 986 } else if (s == ice->capture_pro_substream) { 987 what |= ICE1712_CAPTURE_START_SHADOW; 988 snd_pcm_trigger_done(s, substream); 989 } 990 } 991 spin_lock(&ice->reg_lock); 992 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 993 if (cmd == SNDRV_PCM_TRIGGER_START) 994 old |= what; 995 else 996 old &= ~what; 997 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 998 spin_unlock(&ice->reg_lock); 999 break; 1000 } 1001 default: 1002 return -EINVAL; 1003 } 1004 return 0; 1005 } 1006 1007 /* 1008 */ 1009 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force) 1010 { 1011 unsigned long flags; 1012 unsigned char val, old; 1013 unsigned int i; 1014 1015 switch (rate) { 1016 case 8000: val = 6; break; 1017 case 9600: val = 3; break; 1018 case 11025: val = 10; break; 1019 case 12000: val = 2; break; 1020 case 16000: val = 5; break; 1021 case 22050: val = 9; break; 1022 case 24000: val = 1; break; 1023 case 32000: val = 4; break; 1024 case 44100: val = 8; break; 1025 case 48000: val = 0; break; 1026 case 64000: val = 15; break; 1027 case 88200: val = 11; break; 1028 case 96000: val = 7; break; 1029 default: 1030 snd_BUG(); 1031 val = 0; 1032 rate = 48000; 1033 break; 1034 } 1035 1036 spin_lock_irqsave(&ice->reg_lock, flags); 1037 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW| 1038 ICE1712_PLAYBACK_PAUSE| 1039 ICE1712_PLAYBACK_START)) { 1040 __out: 1041 spin_unlock_irqrestore(&ice->reg_lock, flags); 1042 return; 1043 } 1044 if (!force && is_pro_rate_locked(ice)) 1045 goto __out; 1046 1047 old = inb(ICEMT(ice, RATE)); 1048 if (!force && old == val) 1049 goto __out; 1050 outb(val, ICEMT(ice, RATE)); 1051 spin_unlock_irqrestore(&ice->reg_lock, flags); 1052 1053 if (ice->gpio.set_pro_rate) 1054 ice->gpio.set_pro_rate(ice, rate); 1055 for (i = 0; i < ice->akm_codecs; i++) { 1056 if (ice->akm[i].ops.set_rate_val) 1057 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 1058 } 1059 if (ice->spdif.ops.setup_rate) 1060 ice->spdif.ops.setup_rate(ice, rate); 1061 } 1062 1063 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream) 1064 { 1065 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1066 1067 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream); 1068 spin_lock_irq(&ice->reg_lock); 1069 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR)); 1070 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE)); 1071 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT)); 1072 spin_unlock_irq(&ice->reg_lock); 1073 1074 return 0; 1075 } 1076 1077 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream, 1078 struct snd_pcm_hw_params *hw_params) 1079 { 1080 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1081 1082 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1083 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1084 } 1085 1086 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream) 1087 { 1088 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1089 1090 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream); 1091 spin_lock_irq(&ice->reg_lock); 1092 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR)); 1093 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE)); 1094 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT)); 1095 spin_unlock_irq(&ice->reg_lock); 1096 return 0; 1097 } 1098 1099 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream, 1100 struct snd_pcm_hw_params *hw_params) 1101 { 1102 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1103 1104 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1105 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1106 } 1107 1108 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream) 1109 { 1110 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1111 size_t ptr; 1112 1113 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START)) 1114 return 0; 1115 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2); 1116 if (ptr == substream->runtime->buffer_size) 1117 ptr = 0; 1118 return bytes_to_frames(substream->runtime, ptr); 1119 } 1120 1121 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream) 1122 { 1123 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1124 size_t ptr; 1125 1126 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW)) 1127 return 0; 1128 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2); 1129 if (ptr == substream->runtime->buffer_size) 1130 ptr = 0; 1131 return bytes_to_frames(substream->runtime, ptr); 1132 } 1133 1134 static const struct snd_pcm_hardware snd_ice1712_playback_pro = 1135 { 1136 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1137 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1138 SNDRV_PCM_INFO_MMAP_VALID | 1139 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1140 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1141 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1142 .rate_min = 4000, 1143 .rate_max = 96000, 1144 .channels_min = 10, 1145 .channels_max = 10, 1146 .buffer_bytes_max = (256*1024), 1147 .period_bytes_min = 10 * 4 * 2, 1148 .period_bytes_max = 131040, 1149 .periods_min = 1, 1150 .periods_max = 1024, 1151 .fifo_size = 0, 1152 }; 1153 1154 static const struct snd_pcm_hardware snd_ice1712_capture_pro = 1155 { 1156 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1157 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1158 SNDRV_PCM_INFO_MMAP_VALID | 1159 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1160 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1161 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1162 .rate_min = 4000, 1163 .rate_max = 96000, 1164 .channels_min = 12, 1165 .channels_max = 12, 1166 .buffer_bytes_max = (256*1024), 1167 .period_bytes_min = 12 * 4 * 2, 1168 .period_bytes_max = 131040, 1169 .periods_min = 1, 1170 .periods_max = 1024, 1171 .fifo_size = 0, 1172 }; 1173 1174 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream) 1175 { 1176 struct snd_pcm_runtime *runtime = substream->runtime; 1177 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1178 1179 ice->playback_pro_substream = substream; 1180 runtime->hw = snd_ice1712_playback_pro; 1181 snd_pcm_set_sync(substream); 1182 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1183 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1184 1185 if (ice->spdif.ops.open) 1186 ice->spdif.ops.open(ice, substream); 1187 1188 return 0; 1189 } 1190 1191 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream) 1192 { 1193 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1194 struct snd_pcm_runtime *runtime = substream->runtime; 1195 1196 ice->capture_pro_substream = substream; 1197 runtime->hw = snd_ice1712_capture_pro; 1198 snd_pcm_set_sync(substream); 1199 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1200 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1201 return 0; 1202 } 1203 1204 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream) 1205 { 1206 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1207 1208 if (PRO_RATE_RESET) 1209 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1210 ice->playback_pro_substream = NULL; 1211 if (ice->spdif.ops.close) 1212 ice->spdif.ops.close(ice, substream); 1213 1214 return 0; 1215 } 1216 1217 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream) 1218 { 1219 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1220 1221 if (PRO_RATE_RESET) 1222 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1223 ice->capture_pro_substream = NULL; 1224 return 0; 1225 } 1226 1227 static struct snd_pcm_ops snd_ice1712_playback_pro_ops = { 1228 .open = snd_ice1712_playback_pro_open, 1229 .close = snd_ice1712_playback_pro_close, 1230 .ioctl = snd_pcm_lib_ioctl, 1231 .hw_params = snd_ice1712_playback_pro_hw_params, 1232 .hw_free = snd_ice1712_hw_free, 1233 .prepare = snd_ice1712_playback_pro_prepare, 1234 .trigger = snd_ice1712_pro_trigger, 1235 .pointer = snd_ice1712_playback_pro_pointer, 1236 }; 1237 1238 static struct snd_pcm_ops snd_ice1712_capture_pro_ops = { 1239 .open = snd_ice1712_capture_pro_open, 1240 .close = snd_ice1712_capture_pro_close, 1241 .ioctl = snd_pcm_lib_ioctl, 1242 .hw_params = snd_ice1712_capture_pro_hw_params, 1243 .hw_free = snd_ice1712_hw_free, 1244 .prepare = snd_ice1712_capture_pro_prepare, 1245 .trigger = snd_ice1712_pro_trigger, 1246 .pointer = snd_ice1712_capture_pro_pointer, 1247 }; 1248 1249 static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm) 1250 { 1251 struct snd_pcm *pcm; 1252 int err; 1253 1254 if (rpcm) 1255 *rpcm = NULL; 1256 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm); 1257 if (err < 0) 1258 return err; 1259 1260 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops); 1261 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops); 1262 1263 pcm->private_data = ice; 1264 pcm->info_flags = 0; 1265 strcpy(pcm->name, "ICE1712 multi"); 1266 1267 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1268 snd_dma_pci_data(ice->pci), 256*1024, 256*1024); 1269 1270 ice->pcm_pro = pcm; 1271 if (rpcm) 1272 *rpcm = pcm; 1273 1274 if (ice->cs8427) { 1275 /* assign channels to iec958 */ 1276 err = snd_cs8427_iec958_build(ice->cs8427, 1277 pcm->streams[0].substream, 1278 pcm->streams[1].substream); 1279 if (err < 0) 1280 return err; 1281 } 1282 1283 if ((err = snd_ice1712_build_pro_mixer(ice)) < 0) 1284 return err; 1285 return 0; 1286 } 1287 1288 /* 1289 * Mixer section 1290 */ 1291 1292 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index) 1293 { 1294 unsigned int vol = ice->pro_volumes[index]; 1295 unsigned short val = 0; 1296 1297 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f; 1298 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8; 1299 outb(index, ICEMT(ice, MONITOR_INDEX)); 1300 outw(val, ICEMT(ice, MONITOR_VOLUME)); 1301 } 1302 1303 static int snd_ice1712_pro_mixer_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1304 { 1305 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1306 uinfo->count = 2; 1307 uinfo->value.integer.min = 0; 1308 uinfo->value.integer.max = 1; 1309 return 0; 1310 } 1311 1312 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1313 { 1314 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1315 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value; 1316 1317 spin_lock_irq(&ice->reg_lock); 1318 ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1); 1319 ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1); 1320 spin_unlock_irq(&ice->reg_lock); 1321 return 0; 1322 } 1323 1324 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1325 { 1326 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1327 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value; 1328 unsigned int nval, change; 1329 1330 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) | 1331 (ucontrol->value.integer.value[1] ? 0 : 0x80000000); 1332 spin_lock_irq(&ice->reg_lock); 1333 nval |= ice->pro_volumes[index] & ~0x80008000; 1334 change = nval != ice->pro_volumes[index]; 1335 ice->pro_volumes[index] = nval; 1336 snd_ice1712_update_volume(ice, index); 1337 spin_unlock_irq(&ice->reg_lock); 1338 return change; 1339 } 1340 1341 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1342 { 1343 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1344 uinfo->count = 2; 1345 uinfo->value.integer.min = 0; 1346 uinfo->value.integer.max = 96; 1347 return 0; 1348 } 1349 1350 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1351 { 1352 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1353 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value; 1354 1355 spin_lock_irq(&ice->reg_lock); 1356 ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127; 1357 ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127; 1358 spin_unlock_irq(&ice->reg_lock); 1359 return 0; 1360 } 1361 1362 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1363 { 1364 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1365 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value; 1366 unsigned int nval, change; 1367 1368 nval = (ucontrol->value.integer.value[0] & 127) | 1369 ((ucontrol->value.integer.value[1] & 127) << 16); 1370 spin_lock_irq(&ice->reg_lock); 1371 nval |= ice->pro_volumes[index] & ~0x007f007f; 1372 change = nval != ice->pro_volumes[index]; 1373 ice->pro_volumes[index] = nval; 1374 snd_ice1712_update_volume(ice, index); 1375 spin_unlock_irq(&ice->reg_lock); 1376 return change; 1377 } 1378 1379 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0); 1380 1381 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = { 1382 { 1383 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1384 .name = "Multi Playback Switch", 1385 .info = snd_ice1712_pro_mixer_switch_info, 1386 .get = snd_ice1712_pro_mixer_switch_get, 1387 .put = snd_ice1712_pro_mixer_switch_put, 1388 .private_value = 0, 1389 .count = 10, 1390 }, 1391 { 1392 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1393 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1394 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1395 .name = "Multi Playback Volume", 1396 .info = snd_ice1712_pro_mixer_volume_info, 1397 .get = snd_ice1712_pro_mixer_volume_get, 1398 .put = snd_ice1712_pro_mixer_volume_put, 1399 .private_value = 0, 1400 .count = 10, 1401 .tlv = { .p = db_scale_playback } 1402 }, 1403 }; 1404 1405 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = { 1406 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1407 .name = "H/W Multi Capture Switch", 1408 .info = snd_ice1712_pro_mixer_switch_info, 1409 .get = snd_ice1712_pro_mixer_switch_get, 1410 .put = snd_ice1712_pro_mixer_switch_put, 1411 .private_value = 10, 1412 }; 1413 1414 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = { 1415 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1416 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH), 1417 .info = snd_ice1712_pro_mixer_switch_info, 1418 .get = snd_ice1712_pro_mixer_switch_get, 1419 .put = snd_ice1712_pro_mixer_switch_put, 1420 .private_value = 18, 1421 .count = 2, 1422 }; 1423 1424 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = { 1425 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1426 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1427 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1428 .name = "H/W Multi Capture Volume", 1429 .info = snd_ice1712_pro_mixer_volume_info, 1430 .get = snd_ice1712_pro_mixer_volume_get, 1431 .put = snd_ice1712_pro_mixer_volume_put, 1432 .private_value = 10, 1433 .tlv = { .p = db_scale_playback } 1434 }; 1435 1436 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = { 1437 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1438 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME), 1439 .info = snd_ice1712_pro_mixer_volume_info, 1440 .get = snd_ice1712_pro_mixer_volume_get, 1441 .put = snd_ice1712_pro_mixer_volume_put, 1442 .private_value = 18, 1443 .count = 2, 1444 }; 1445 1446 static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice) 1447 { 1448 struct snd_card *card = ice->card; 1449 unsigned int idx; 1450 int err; 1451 1452 /* multi-channel mixer */ 1453 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) { 1454 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice)); 1455 if (err < 0) 1456 return err; 1457 } 1458 1459 if (ice->num_total_adcs > 0) { 1460 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch; 1461 tmp.count = ice->num_total_adcs; 1462 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1463 if (err < 0) 1464 return err; 1465 } 1466 1467 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice)); 1468 if (err < 0) 1469 return err; 1470 1471 if (ice->num_total_adcs > 0) { 1472 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume; 1473 tmp.count = ice->num_total_adcs; 1474 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1475 if (err < 0) 1476 return err; 1477 } 1478 1479 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice)); 1480 if (err < 0) 1481 return err; 1482 1483 /* initialize volumes */ 1484 for (idx = 0; idx < 10; idx++) { 1485 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1486 snd_ice1712_update_volume(ice, idx); 1487 } 1488 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) { 1489 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1490 snd_ice1712_update_volume(ice, idx); 1491 } 1492 for (idx = 18; idx < 20; idx++) { 1493 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1494 snd_ice1712_update_volume(ice, idx); 1495 } 1496 return 0; 1497 } 1498 1499 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97) 1500 { 1501 struct snd_ice1712 *ice = ac97->private_data; 1502 ice->ac97 = NULL; 1503 } 1504 1505 static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice) 1506 { 1507 int err, bus_num = 0; 1508 struct snd_ac97_template ac97; 1509 struct snd_ac97_bus *pbus; 1510 static struct snd_ac97_bus_ops con_ops = { 1511 .write = snd_ice1712_ac97_write, 1512 .read = snd_ice1712_ac97_read, 1513 }; 1514 static struct snd_ac97_bus_ops pro_ops = { 1515 .write = snd_ice1712_pro_ac97_write, 1516 .read = snd_ice1712_pro_ac97_read, 1517 }; 1518 1519 if (ice_has_con_ac97(ice)) { 1520 if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0) 1521 return err; 1522 memset(&ac97, 0, sizeof(ac97)); 1523 ac97.private_data = ice; 1524 ac97.private_free = snd_ice1712_mixer_free_ac97; 1525 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0) 1526 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n"); 1527 else { 1528 if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0) 1529 return err; 1530 return 0; 1531 } 1532 } 1533 1534 if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) { 1535 if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0) 1536 return err; 1537 memset(&ac97, 0, sizeof(ac97)); 1538 ac97.private_data = ice; 1539 ac97.private_free = snd_ice1712_mixer_free_ac97; 1540 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0) 1541 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n"); 1542 else 1543 return 0; 1544 } 1545 /* I2S mixer only */ 1546 strcat(ice->card->mixername, "ICE1712 - multitrack"); 1547 return 0; 1548 } 1549 1550 /* 1551 * 1552 */ 1553 1554 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx) 1555 { 1556 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8); 1557 } 1558 1559 static void snd_ice1712_proc_read(struct snd_info_entry *entry, 1560 struct snd_info_buffer *buffer) 1561 { 1562 struct snd_ice1712 *ice = entry->private_data; 1563 unsigned int idx; 1564 1565 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1566 snd_iprintf(buffer, "EEPROM:\n"); 1567 1568 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1569 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1570 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1571 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]); 1572 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]); 1573 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]); 1574 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]); 1575 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask); 1576 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate); 1577 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir); 1578 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO)); 1579 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO)); 1580 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO)); 1581 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]); 1582 for (idx = 0; idx < 4; idx++) 1583 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]); 1584 for (idx = 0; idx < 4; idx++) 1585 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]); 1586 for (idx = 0x1c; idx < ice->eeprom.size; idx++) 1587 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]); 1588 1589 snd_iprintf(buffer, "\nRegisters:\n"); 1590 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03))); 1591 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE))); 1592 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT))); 1593 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE))); 1594 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice)); 1595 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK)); 1596 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION)); 1597 } 1598 1599 static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice) 1600 { 1601 struct snd_info_entry *entry; 1602 1603 if (! snd_card_proc_new(ice->card, "ice1712", &entry)) 1604 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read); 1605 } 1606 1607 /* 1608 * 1609 */ 1610 1611 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol, 1612 struct snd_ctl_elem_info *uinfo) 1613 { 1614 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1615 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1616 return 0; 1617 } 1618 1619 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol, 1620 struct snd_ctl_elem_value *ucontrol) 1621 { 1622 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1623 1624 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1625 return 0; 1626 } 1627 1628 static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = { 1629 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1630 .name = "ICE1712 EEPROM", 1631 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1632 .info = snd_ice1712_eeprom_info, 1633 .get = snd_ice1712_eeprom_get 1634 }; 1635 1636 /* 1637 */ 1638 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol, 1639 struct snd_ctl_elem_info *uinfo) 1640 { 1641 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1642 uinfo->count = 1; 1643 return 0; 1644 } 1645 1646 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol, 1647 struct snd_ctl_elem_value *ucontrol) 1648 { 1649 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1650 if (ice->spdif.ops.default_get) 1651 ice->spdif.ops.default_get(ice, ucontrol); 1652 return 0; 1653 } 1654 1655 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol, 1656 struct snd_ctl_elem_value *ucontrol) 1657 { 1658 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1659 if (ice->spdif.ops.default_put) 1660 return ice->spdif.ops.default_put(ice, ucontrol); 1661 return 0; 1662 } 1663 1664 static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata = 1665 { 1666 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1667 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1668 .info = snd_ice1712_spdif_info, 1669 .get = snd_ice1712_spdif_default_get, 1670 .put = snd_ice1712_spdif_default_put 1671 }; 1672 1673 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1674 struct snd_ctl_elem_value *ucontrol) 1675 { 1676 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1677 if (ice->spdif.ops.default_get) { 1678 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1679 IEC958_AES0_PROFESSIONAL | 1680 IEC958_AES0_CON_NOT_COPYRIGHT | 1681 IEC958_AES0_CON_EMPHASIS; 1682 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1683 IEC958_AES1_CON_CATEGORY; 1684 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1685 } else { 1686 ucontrol->value.iec958.status[0] = 0xff; 1687 ucontrol->value.iec958.status[1] = 0xff; 1688 ucontrol->value.iec958.status[2] = 0xff; 1689 ucontrol->value.iec958.status[3] = 0xff; 1690 ucontrol->value.iec958.status[4] = 0xff; 1691 } 1692 return 0; 1693 } 1694 1695 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1696 struct snd_ctl_elem_value *ucontrol) 1697 { 1698 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1699 if (ice->spdif.ops.default_get) { 1700 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1701 IEC958_AES0_PROFESSIONAL | 1702 IEC958_AES0_PRO_FS | 1703 IEC958_AES0_PRO_EMPHASIS; 1704 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE; 1705 } else { 1706 ucontrol->value.iec958.status[0] = 0xff; 1707 ucontrol->value.iec958.status[1] = 0xff; 1708 ucontrol->value.iec958.status[2] = 0xff; 1709 ucontrol->value.iec958.status[3] = 0xff; 1710 ucontrol->value.iec958.status[4] = 0xff; 1711 } 1712 return 0; 1713 } 1714 1715 static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata = 1716 { 1717 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1718 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1719 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1720 .info = snd_ice1712_spdif_info, 1721 .get = snd_ice1712_spdif_maskc_get, 1722 }; 1723 1724 static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata = 1725 { 1726 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1727 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1728 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), 1729 .info = snd_ice1712_spdif_info, 1730 .get = snd_ice1712_spdif_maskp_get, 1731 }; 1732 1733 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol, 1734 struct snd_ctl_elem_value *ucontrol) 1735 { 1736 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1737 if (ice->spdif.ops.stream_get) 1738 ice->spdif.ops.stream_get(ice, ucontrol); 1739 return 0; 1740 } 1741 1742 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol, 1743 struct snd_ctl_elem_value *ucontrol) 1744 { 1745 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1746 if (ice->spdif.ops.stream_put) 1747 return ice->spdif.ops.stream_put(ice, ucontrol); 1748 return 0; 1749 } 1750 1751 static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata = 1752 { 1753 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1754 SNDRV_CTL_ELEM_ACCESS_INACTIVE), 1755 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1756 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1757 .info = snd_ice1712_spdif_info, 1758 .get = snd_ice1712_spdif_stream_get, 1759 .put = snd_ice1712_spdif_stream_put 1760 }; 1761 1762 int snd_ice1712_gpio_info(struct snd_kcontrol *kcontrol, 1763 struct snd_ctl_elem_info *uinfo) 1764 { 1765 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1766 uinfo->count = 1; 1767 uinfo->value.integer.min = 0; 1768 uinfo->value.integer.max = 1; 1769 return 0; 1770 } 1771 1772 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol, 1773 struct snd_ctl_elem_value *ucontrol) 1774 { 1775 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1776 unsigned char mask = kcontrol->private_value & 0xff; 1777 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1778 1779 snd_ice1712_save_gpio_status(ice); 1780 ucontrol->value.integer.value[0] = 1781 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert; 1782 snd_ice1712_restore_gpio_status(ice); 1783 return 0; 1784 } 1785 1786 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1787 struct snd_ctl_elem_value *ucontrol) 1788 { 1789 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1790 unsigned char mask = kcontrol->private_value & 0xff; 1791 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1792 unsigned int val, nval; 1793 1794 if (kcontrol->private_value & (1 << 31)) 1795 return -EPERM; 1796 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert; 1797 snd_ice1712_save_gpio_status(ice); 1798 val = snd_ice1712_gpio_read(ice); 1799 nval |= val & ~mask; 1800 if (val != nval) 1801 snd_ice1712_gpio_write(ice, nval); 1802 snd_ice1712_restore_gpio_status(ice); 1803 return val != nval; 1804 } 1805 1806 /* 1807 * rate 1808 */ 1809 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1810 struct snd_ctl_elem_info *uinfo) 1811 { 1812 static const char * const texts[] = { 1813 "8000", /* 0: 6 */ 1814 "9600", /* 1: 3 */ 1815 "11025", /* 2: 10 */ 1816 "12000", /* 3: 2 */ 1817 "16000", /* 4: 5 */ 1818 "22050", /* 5: 9 */ 1819 "24000", /* 6: 1 */ 1820 "32000", /* 7: 4 */ 1821 "44100", /* 8: 8 */ 1822 "48000", /* 9: 0 */ 1823 "64000", /* 10: 15 */ 1824 "88200", /* 11: 11 */ 1825 "96000", /* 12: 7 */ 1826 "IEC958 Input", /* 13: -- */ 1827 }; 1828 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1829 uinfo->count = 1; 1830 uinfo->value.enumerated.items = 14; 1831 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1832 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1833 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1834 return 0; 1835 } 1836 1837 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1838 struct snd_ctl_elem_value *ucontrol) 1839 { 1840 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1841 static const unsigned char xlate[16] = { 1842 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10 1843 }; 1844 unsigned char val; 1845 1846 spin_lock_irq(&ice->reg_lock); 1847 if (is_spdif_master(ice)) { 1848 ucontrol->value.enumerated.item[0] = 13; 1849 } else { 1850 val = xlate[inb(ICEMT(ice, RATE)) & 15]; 1851 if (val == 255) { 1852 snd_BUG(); 1853 val = 0; 1854 } 1855 ucontrol->value.enumerated.item[0] = val; 1856 } 1857 spin_unlock_irq(&ice->reg_lock); 1858 return 0; 1859 } 1860 1861 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1862 struct snd_ctl_elem_value *ucontrol) 1863 { 1864 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1865 static const unsigned int xrate[13] = { 1866 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1867 32000, 44100, 48000, 64000, 88200, 96000 1868 }; 1869 unsigned char oval; 1870 int change = 0; 1871 1872 spin_lock_irq(&ice->reg_lock); 1873 oval = inb(ICEMT(ice, RATE)); 1874 if (ucontrol->value.enumerated.item[0] == 13) { 1875 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE)); 1876 } else { 1877 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1878 spin_unlock_irq(&ice->reg_lock); 1879 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1); 1880 spin_lock_irq(&ice->reg_lock); 1881 } 1882 change = inb(ICEMT(ice, RATE)) != oval; 1883 spin_unlock_irq(&ice->reg_lock); 1884 1885 if ((oval & ICE1712_SPDIF_MASTER) != 1886 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) 1887 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice)); 1888 1889 return change; 1890 } 1891 1892 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = { 1893 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1894 .name = "Multi Track Internal Clock", 1895 .info = snd_ice1712_pro_internal_clock_info, 1896 .get = snd_ice1712_pro_internal_clock_get, 1897 .put = snd_ice1712_pro_internal_clock_put 1898 }; 1899 1900 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol, 1901 struct snd_ctl_elem_info *uinfo) 1902 { 1903 static const char * const texts[] = { 1904 "8000", /* 0: 6 */ 1905 "9600", /* 1: 3 */ 1906 "11025", /* 2: 10 */ 1907 "12000", /* 3: 2 */ 1908 "16000", /* 4: 5 */ 1909 "22050", /* 5: 9 */ 1910 "24000", /* 6: 1 */ 1911 "32000", /* 7: 4 */ 1912 "44100", /* 8: 8 */ 1913 "48000", /* 9: 0 */ 1914 "64000", /* 10: 15 */ 1915 "88200", /* 11: 11 */ 1916 "96000", /* 12: 7 */ 1917 // "IEC958 Input", /* 13: -- */ 1918 }; 1919 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1920 uinfo->count = 1; 1921 uinfo->value.enumerated.items = 13; 1922 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1923 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1924 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1925 return 0; 1926 } 1927 1928 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol, 1929 struct snd_ctl_elem_value *ucontrol) 1930 { 1931 int val; 1932 static const unsigned int xrate[13] = { 1933 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1934 32000, 44100, 48000, 64000, 88200, 96000 1935 }; 1936 1937 for (val = 0; val < 13; val++) { 1938 if (xrate[val] == PRO_RATE_DEFAULT) 1939 break; 1940 } 1941 1942 ucontrol->value.enumerated.item[0] = val; 1943 return 0; 1944 } 1945 1946 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol, 1947 struct snd_ctl_elem_value *ucontrol) 1948 { 1949 static const unsigned int xrate[13] = { 1950 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1951 32000, 44100, 48000, 64000, 88200, 96000 1952 }; 1953 unsigned char oval; 1954 int change = 0; 1955 1956 oval = PRO_RATE_DEFAULT; 1957 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1958 change = PRO_RATE_DEFAULT != oval; 1959 1960 return change; 1961 } 1962 1963 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = { 1964 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1965 .name = "Multi Track Internal Clock Default", 1966 .info = snd_ice1712_pro_internal_clock_default_info, 1967 .get = snd_ice1712_pro_internal_clock_default_get, 1968 .put = snd_ice1712_pro_internal_clock_default_put 1969 }; 1970 1971 static int snd_ice1712_pro_rate_locking_info(struct snd_kcontrol *kcontrol, 1972 struct snd_ctl_elem_info *uinfo) 1973 { 1974 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 1975 uinfo->count = 1; 1976 uinfo->value.integer.min = 0; 1977 uinfo->value.integer.max = 1; 1978 return 0; 1979 } 1980 1981 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1982 struct snd_ctl_elem_value *ucontrol) 1983 { 1984 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1985 return 0; 1986 } 1987 1988 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1989 struct snd_ctl_elem_value *ucontrol) 1990 { 1991 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1992 int change = 0, nval; 1993 1994 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1995 spin_lock_irq(&ice->reg_lock); 1996 change = PRO_RATE_LOCKED != nval; 1997 PRO_RATE_LOCKED = nval; 1998 spin_unlock_irq(&ice->reg_lock); 1999 return change; 2000 } 2001 2002 static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = { 2003 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2004 .name = "Multi Track Rate Locking", 2005 .info = snd_ice1712_pro_rate_locking_info, 2006 .get = snd_ice1712_pro_rate_locking_get, 2007 .put = snd_ice1712_pro_rate_locking_put 2008 }; 2009 2010 static int snd_ice1712_pro_rate_reset_info(struct snd_kcontrol *kcontrol, 2011 struct snd_ctl_elem_info *uinfo) 2012 { 2013 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 2014 uinfo->count = 1; 2015 uinfo->value.integer.min = 0; 2016 uinfo->value.integer.max = 1; 2017 return 0; 2018 } 2019 2020 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 2021 struct snd_ctl_elem_value *ucontrol) 2022 { 2023 ucontrol->value.integer.value[0] = PRO_RATE_RESET; 2024 return 0; 2025 } 2026 2027 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 2028 struct snd_ctl_elem_value *ucontrol) 2029 { 2030 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2031 int change = 0, nval; 2032 2033 nval = ucontrol->value.integer.value[0] ? 1 : 0; 2034 spin_lock_irq(&ice->reg_lock); 2035 change = PRO_RATE_RESET != nval; 2036 PRO_RATE_RESET = nval; 2037 spin_unlock_irq(&ice->reg_lock); 2038 return change; 2039 } 2040 2041 static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = { 2042 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2043 .name = "Multi Track Rate Reset", 2044 .info = snd_ice1712_pro_rate_reset_info, 2045 .get = snd_ice1712_pro_rate_reset_get, 2046 .put = snd_ice1712_pro_rate_reset_put 2047 }; 2048 2049 /* 2050 * routing 2051 */ 2052 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol, 2053 struct snd_ctl_elem_info *uinfo) 2054 { 2055 static const char * const texts[] = { 2056 "PCM Out", /* 0 */ 2057 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */ 2058 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */ 2059 "IEC958 In L", "IEC958 In R", /* 9-10 */ 2060 "Digital Mixer", /* 11 - optional */ 2061 }; 2062 2063 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2064 uinfo->count = 1; 2065 uinfo->value.enumerated.items = 2066 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11; 2067 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 2068 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 2069 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 2070 return 0; 2071 } 2072 2073 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2074 struct snd_ctl_elem_value *ucontrol) 2075 { 2076 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2077 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2078 unsigned int val, cval; 2079 2080 spin_lock_irq(&ice->reg_lock); 2081 val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2082 cval = inl(ICEMT(ice, ROUTE_CAPTURE)); 2083 spin_unlock_irq(&ice->reg_lock); 2084 2085 val >>= ((idx % 2) * 8) + ((idx / 2) * 2); 2086 val &= 3; 2087 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4); 2088 if (val == 1 && idx < 2) 2089 ucontrol->value.enumerated.item[0] = 11; 2090 else if (val == 2) 2091 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2092 else if (val == 3) 2093 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2094 else 2095 ucontrol->value.enumerated.item[0] = 0; 2096 return 0; 2097 } 2098 2099 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2100 struct snd_ctl_elem_value *ucontrol) 2101 { 2102 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2103 int change, shift; 2104 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2105 unsigned int val, old_val, nval; 2106 2107 /* update PSDOUT */ 2108 if (ucontrol->value.enumerated.item[0] >= 11) 2109 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */ 2110 else if (ucontrol->value.enumerated.item[0] >= 9) 2111 nval = 3; /* spdif in */ 2112 else if (ucontrol->value.enumerated.item[0] >= 1) 2113 nval = 2; /* analog in */ 2114 else 2115 nval = 0; /* pcm */ 2116 shift = ((idx % 2) * 8) + ((idx / 2) * 2); 2117 spin_lock_irq(&ice->reg_lock); 2118 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2119 val &= ~(0x03 << shift); 2120 val |= nval << shift; 2121 change = val != old_val; 2122 if (change) 2123 outw(val, ICEMT(ice, ROUTE_PSDOUT03)); 2124 spin_unlock_irq(&ice->reg_lock); 2125 if (nval < 2) /* dig mixer of pcm */ 2126 return change; 2127 2128 /* update CAPTURE */ 2129 spin_lock_irq(&ice->reg_lock); 2130 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE)); 2131 shift = ((idx / 2) * 8) + ((idx % 2) * 4); 2132 if (nval == 2) { /* analog in */ 2133 nval = ucontrol->value.enumerated.item[0] - 1; 2134 val &= ~(0x07 << shift); 2135 val |= nval << shift; 2136 } else { /* spdif in */ 2137 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2138 val &= ~(0x08 << shift); 2139 val |= nval << shift; 2140 } 2141 if (val != old_val) { 2142 change = 1; 2143 outl(val, ICEMT(ice, ROUTE_CAPTURE)); 2144 } 2145 spin_unlock_irq(&ice->reg_lock); 2146 return change; 2147 } 2148 2149 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2150 struct snd_ctl_elem_value *ucontrol) 2151 { 2152 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2153 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2154 unsigned int val, cval; 2155 val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2156 cval = (val >> (idx * 4 + 8)) & 0x0f; 2157 val = (val >> (idx * 2)) & 0x03; 2158 if (val == 1) 2159 ucontrol->value.enumerated.item[0] = 11; 2160 else if (val == 2) 2161 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2162 else if (val == 3) 2163 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2164 else 2165 ucontrol->value.enumerated.item[0] = 0; 2166 return 0; 2167 } 2168 2169 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2170 struct snd_ctl_elem_value *ucontrol) 2171 { 2172 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2173 int change, shift; 2174 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2175 unsigned int val, old_val, nval; 2176 2177 /* update SPDOUT */ 2178 spin_lock_irq(&ice->reg_lock); 2179 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2180 if (ucontrol->value.enumerated.item[0] >= 11) 2181 nval = 1; 2182 else if (ucontrol->value.enumerated.item[0] >= 9) 2183 nval = 3; 2184 else if (ucontrol->value.enumerated.item[0] >= 1) 2185 nval = 2; 2186 else 2187 nval = 0; 2188 shift = idx * 2; 2189 val &= ~(0x03 << shift); 2190 val |= nval << shift; 2191 shift = idx * 4 + 8; 2192 if (nval == 2) { 2193 nval = ucontrol->value.enumerated.item[0] - 1; 2194 val &= ~(0x07 << shift); 2195 val |= nval << shift; 2196 } else if (nval == 3) { 2197 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2198 val &= ~(0x08 << shift); 2199 val |= nval << shift; 2200 } 2201 change = val != old_val; 2202 if (change) 2203 outw(val, ICEMT(ice, ROUTE_SPDOUT)); 2204 spin_unlock_irq(&ice->reg_lock); 2205 return change; 2206 } 2207 2208 static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = { 2209 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2210 .name = "H/W Playback Route", 2211 .info = snd_ice1712_pro_route_info, 2212 .get = snd_ice1712_pro_route_analog_get, 2213 .put = snd_ice1712_pro_route_analog_put, 2214 }; 2215 2216 static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = { 2217 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2218 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route", 2219 .info = snd_ice1712_pro_route_info, 2220 .get = snd_ice1712_pro_route_spdif_get, 2221 .put = snd_ice1712_pro_route_spdif_put, 2222 .count = 2, 2223 }; 2224 2225 2226 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol, 2227 struct snd_ctl_elem_info *uinfo) 2228 { 2229 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2230 uinfo->count = 1; 2231 uinfo->value.integer.min = 0; 2232 uinfo->value.integer.max = 255; 2233 return 0; 2234 } 2235 2236 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol, 2237 struct snd_ctl_elem_value *ucontrol) 2238 { 2239 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2240 2241 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE)); 2242 return 0; 2243 } 2244 2245 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol, 2246 struct snd_ctl_elem_value *ucontrol) 2247 { 2248 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2249 int change; 2250 2251 spin_lock_irq(&ice->reg_lock); 2252 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0]; 2253 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE)); 2254 spin_unlock_irq(&ice->reg_lock); 2255 return change; 2256 } 2257 2258 static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = { 2259 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2260 .name = "Multi Track Volume Rate", 2261 .info = snd_ice1712_pro_volume_rate_info, 2262 .get = snd_ice1712_pro_volume_rate_get, 2263 .put = snd_ice1712_pro_volume_rate_put 2264 }; 2265 2266 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol, 2267 struct snd_ctl_elem_info *uinfo) 2268 { 2269 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2270 uinfo->count = 22; 2271 uinfo->value.integer.min = 0; 2272 uinfo->value.integer.max = 255; 2273 return 0; 2274 } 2275 2276 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol, 2277 struct snd_ctl_elem_value *ucontrol) 2278 { 2279 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2280 int idx; 2281 2282 spin_lock_irq(&ice->reg_lock); 2283 for (idx = 0; idx < 22; idx++) { 2284 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX)); 2285 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA)); 2286 } 2287 spin_unlock_irq(&ice->reg_lock); 2288 return 0; 2289 } 2290 2291 static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = { 2292 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2293 .name = "Multi Track Peak", 2294 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2295 .info = snd_ice1712_pro_peak_info, 2296 .get = snd_ice1712_pro_peak_get 2297 }; 2298 2299 /* 2300 * 2301 */ 2302 2303 /* 2304 * list of available boards 2305 */ 2306 static struct snd_ice1712_card_info *card_tables[] __devinitdata = { 2307 snd_ice1712_hoontech_cards, 2308 snd_ice1712_delta_cards, 2309 snd_ice1712_ews_cards, 2310 NULL, 2311 }; 2312 2313 static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice, 2314 unsigned char dev, 2315 unsigned char addr) 2316 { 2317 long t = 0x10000; 2318 2319 outb(addr, ICEREG(ice, I2C_BYTE_ADDR)); 2320 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR)); 2321 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ; 2322 return inb(ICEREG(ice, I2C_DATA)); 2323 } 2324 2325 static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice, 2326 const char *modelname) 2327 { 2328 int dev = 0xa0; /* EEPROM device address */ 2329 unsigned int i, size; 2330 struct snd_ice1712_card_info * const *tbl, *c; 2331 2332 if (! modelname || ! *modelname) { 2333 ice->eeprom.subvendor = 0; 2334 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0) 2335 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) | 2336 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) | 2337 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) | 2338 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24); 2339 if (ice->eeprom.subvendor == 0 || 2340 ice->eeprom.subvendor == (unsigned int)-1) { 2341 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */ 2342 u16 vendor, device; 2343 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor); 2344 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2345 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device); 2346 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) { 2347 printk(KERN_ERR "ice1712: No valid ID is found\n"); 2348 return -ENXIO; 2349 } 2350 } 2351 } 2352 for (tbl = card_tables; *tbl; tbl++) { 2353 for (c = *tbl; c->subvendor; c++) { 2354 if (modelname && c->model && ! strcmp(modelname, c->model)) { 2355 printk(KERN_INFO "ice1712: Using board model %s\n", c->name); 2356 ice->eeprom.subvendor = c->subvendor; 2357 } else if (c->subvendor != ice->eeprom.subvendor) 2358 continue; 2359 if (! c->eeprom_size || ! c->eeprom_data) 2360 goto found; 2361 /* if the EEPROM is given by the driver, use it */ 2362 snd_printdd("using the defined eeprom..\n"); 2363 ice->eeprom.version = 1; 2364 ice->eeprom.size = c->eeprom_size + 6; 2365 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2366 goto read_skipped; 2367 } 2368 } 2369 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n", 2370 ice->eeprom.subvendor); 2371 2372 found: 2373 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04); 2374 if (ice->eeprom.size < 6) 2375 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */ 2376 else if (ice->eeprom.size > 32) { 2377 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size); 2378 return -EIO; 2379 } 2380 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05); 2381 if (ice->eeprom.version != 1) { 2382 snd_printk(KERN_ERR "invalid EEPROM version %i\n", 2383 ice->eeprom.version); 2384 /* return -EIO; */ 2385 } 2386 size = ice->eeprom.size - 6; 2387 for (i = 0; i < size; i++) 2388 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6); 2389 2390 read_skipped: 2391 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK]; 2392 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE]; 2393 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR]; 2394 2395 return 0; 2396 } 2397 2398 2399 2400 static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice) 2401 { 2402 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2403 udelay(200); 2404 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2405 udelay(200); 2406 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && 2407 !ice->dxr_enable) 2408 /* Set eeprom value to limit active ADCs and DACs to 6; 2409 * Also disable AC97 as no hardware in standard 6fire card/box 2410 * Note: DXR extensions are not currently supported 2411 */ 2412 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a; 2413 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]); 2414 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]); 2415 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]); 2416 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]); 2417 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) { 2418 ice->gpio.write_mask = ice->eeprom.gpiomask; 2419 ice->gpio.direction = ice->eeprom.gpiodir; 2420 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 2421 ice->eeprom.gpiomask); 2422 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 2423 ice->eeprom.gpiodir); 2424 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2425 ice->eeprom.gpiostate); 2426 } else { 2427 ice->gpio.write_mask = 0xc0; 2428 ice->gpio.direction = 0xff; 2429 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0); 2430 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff); 2431 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2432 ICE1712_STDSP24_CLOCK_BIT); 2433 } 2434 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0); 2435 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) { 2436 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD)); 2437 udelay(100); 2438 outb(0, ICEREG(ice, AC97_CMD)); 2439 udelay(200); 2440 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0); 2441 } 2442 snd_ice1712_set_pro_rate(ice, 48000, 1); 2443 2444 return 0; 2445 } 2446 2447 int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice) 2448 { 2449 int err; 2450 struct snd_kcontrol *kctl; 2451 2452 snd_assert(ice->pcm_pro != NULL, return -EIO); 2453 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice)); 2454 if (err < 0) 2455 return err; 2456 kctl->id.device = ice->pcm_pro->device; 2457 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice)); 2458 if (err < 0) 2459 return err; 2460 kctl->id.device = ice->pcm_pro->device; 2461 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice)); 2462 if (err < 0) 2463 return err; 2464 kctl->id.device = ice->pcm_pro->device; 2465 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice)); 2466 if (err < 0) 2467 return err; 2468 kctl->id.device = ice->pcm_pro->device; 2469 ice->spdif.stream_ctl = kctl; 2470 return 0; 2471 } 2472 2473 2474 static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice) 2475 { 2476 int err; 2477 2478 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice)); 2479 if (err < 0) 2480 return err; 2481 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice)); 2482 if (err < 0) 2483 return err; 2484 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice)); 2485 if (err < 0) 2486 return err; 2487 2488 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice)); 2489 if (err < 0) 2490 return err; 2491 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice)); 2492 if (err < 0) 2493 return err; 2494 2495 if (ice->num_total_dacs > 0) { 2496 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route; 2497 tmp.count = ice->num_total_dacs; 2498 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2499 if (err < 0) 2500 return err; 2501 } 2502 2503 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice)); 2504 if (err < 0) 2505 return err; 2506 2507 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice)); 2508 if (err < 0) 2509 return err; 2510 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice)); 2511 if (err < 0) 2512 return err; 2513 2514 return 0; 2515 } 2516 2517 static int snd_ice1712_free(struct snd_ice1712 *ice) 2518 { 2519 if (! ice->port) 2520 goto __hw_end; 2521 /* mask all interrupts */ 2522 outb(0xc0, ICEMT(ice, IRQ)); 2523 outb(0xff, ICEREG(ice, IRQMASK)); 2524 /* --- */ 2525 __hw_end: 2526 if (ice->irq >= 0) { 2527 synchronize_irq(ice->irq); 2528 free_irq(ice->irq, ice); 2529 } 2530 if (ice->port) 2531 pci_release_regions(ice->pci); 2532 snd_ice1712_akm4xxx_free(ice); 2533 pci_disable_device(ice->pci); 2534 kfree(ice); 2535 return 0; 2536 } 2537 2538 static int snd_ice1712_dev_free(struct snd_device *device) 2539 { 2540 struct snd_ice1712 *ice = device->device_data; 2541 return snd_ice1712_free(ice); 2542 } 2543 2544 static int __devinit snd_ice1712_create(struct snd_card *card, 2545 struct pci_dev *pci, 2546 const char *modelname, 2547 int omni, 2548 int cs8427_timeout, 2549 int dxr_enable, 2550 struct snd_ice1712 ** r_ice1712) 2551 { 2552 struct snd_ice1712 *ice; 2553 int err; 2554 static struct snd_device_ops ops = { 2555 .dev_free = snd_ice1712_dev_free, 2556 }; 2557 2558 *r_ice1712 = NULL; 2559 2560 /* enable PCI device */ 2561 if ((err = pci_enable_device(pci)) < 0) 2562 return err; 2563 /* check, if we can restrict PCI DMA transfers to 28 bits */ 2564 if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 || 2565 pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) { 2566 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n"); 2567 pci_disable_device(pci); 2568 return -ENXIO; 2569 } 2570 2571 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2572 if (ice == NULL) { 2573 pci_disable_device(pci); 2574 return -ENOMEM; 2575 } 2576 ice->omni = omni ? 1 : 0; 2577 if (cs8427_timeout < 1) 2578 cs8427_timeout = 1; 2579 else if (cs8427_timeout > 1000) 2580 cs8427_timeout = 1000; 2581 ice->cs8427_timeout = cs8427_timeout; 2582 ice->dxr_enable = dxr_enable; 2583 spin_lock_init(&ice->reg_lock); 2584 mutex_init(&ice->gpio_mutex); 2585 mutex_init(&ice->i2c_mutex); 2586 mutex_init(&ice->open_mutex); 2587 ice->gpio.set_mask = snd_ice1712_set_gpio_mask; 2588 ice->gpio.set_dir = snd_ice1712_set_gpio_dir; 2589 ice->gpio.set_data = snd_ice1712_set_gpio_data; 2590 ice->gpio.get_data = snd_ice1712_get_gpio_data; 2591 2592 ice->spdif.cs8403_bits = 2593 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */ 2594 0x10 | /* no emphasis */ 2595 0x20); /* PCM encoder/decoder */ 2596 ice->card = card; 2597 ice->pci = pci; 2598 ice->irq = -1; 2599 pci_set_master(pci); 2600 pci_write_config_word(ice->pci, 0x40, 0x807f); 2601 pci_write_config_word(ice->pci, 0x42, 0x0006); 2602 snd_ice1712_proc_init(ice); 2603 synchronize_irq(pci->irq); 2604 2605 if ((err = pci_request_regions(pci, "ICE1712")) < 0) { 2606 kfree(ice); 2607 pci_disable_device(pci); 2608 return err; 2609 } 2610 ice->port = pci_resource_start(pci, 0); 2611 ice->ddma_port = pci_resource_start(pci, 1); 2612 ice->dmapath_port = pci_resource_start(pci, 2); 2613 ice->profi_port = pci_resource_start(pci, 3); 2614 2615 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED, 2616 "ICE1712", ice)) { 2617 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 2618 snd_ice1712_free(ice); 2619 return -EIO; 2620 } 2621 2622 ice->irq = pci->irq; 2623 2624 if (snd_ice1712_read_eeprom(ice, modelname) < 0) { 2625 snd_ice1712_free(ice); 2626 return -EIO; 2627 } 2628 if (snd_ice1712_chip_init(ice) < 0) { 2629 snd_ice1712_free(ice); 2630 return -EIO; 2631 } 2632 2633 /* unmask used interrupts */ 2634 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ? 2635 ICE1712_IRQ_MPU2 : 0) | 2636 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ? 2637 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0), 2638 ICEREG(ice, IRQMASK)); 2639 outb(0x00, ICEMT(ice, IRQ)); 2640 2641 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) { 2642 snd_ice1712_free(ice); 2643 return err; 2644 } 2645 2646 snd_card_set_dev(card, &pci->dev); 2647 2648 *r_ice1712 = ice; 2649 return 0; 2650 } 2651 2652 2653 /* 2654 * 2655 * Registration 2656 * 2657 */ 2658 2659 static struct snd_ice1712_card_info no_matched __devinitdata; 2660 2661 static int __devinit snd_ice1712_probe(struct pci_dev *pci, 2662 const struct pci_device_id *pci_id) 2663 { 2664 static int dev; 2665 struct snd_card *card; 2666 struct snd_ice1712 *ice; 2667 int pcm_dev = 0, err; 2668 struct snd_ice1712_card_info * const *tbl, *c; 2669 2670 if (dev >= SNDRV_CARDS) 2671 return -ENODEV; 2672 if (!enable[dev]) { 2673 dev++; 2674 return -ENOENT; 2675 } 2676 2677 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); 2678 if (card == NULL) 2679 return -ENOMEM; 2680 2681 strcpy(card->driver, "ICE1712"); 2682 strcpy(card->shortname, "ICEnsemble ICE1712"); 2683 2684 if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev], 2685 cs8427_timeout[dev], dxr_enable[dev], 2686 &ice)) < 0) { 2687 snd_card_free(card); 2688 return err; 2689 } 2690 2691 for (tbl = card_tables; *tbl; tbl++) { 2692 for (c = *tbl; c->subvendor; c++) { 2693 if (c->subvendor == ice->eeprom.subvendor) { 2694 strcpy(card->shortname, c->name); 2695 if (c->driver) /* specific driver? */ 2696 strcpy(card->driver, c->driver); 2697 if (c->chip_init) { 2698 if ((err = c->chip_init(ice)) < 0) { 2699 snd_card_free(card); 2700 return err; 2701 } 2702 } 2703 goto __found; 2704 } 2705 } 2706 } 2707 c = &no_matched; 2708 __found: 2709 2710 if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) { 2711 snd_card_free(card); 2712 return err; 2713 } 2714 2715 if (ice_has_con_ac97(ice)) 2716 if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) { 2717 snd_card_free(card); 2718 return err; 2719 } 2720 2721 if ((err = snd_ice1712_ac97_mixer(ice)) < 0) { 2722 snd_card_free(card); 2723 return err; 2724 } 2725 2726 if ((err = snd_ice1712_build_controls(ice)) < 0) { 2727 snd_card_free(card); 2728 return err; 2729 } 2730 2731 if (c->build_controls) { 2732 if ((err = c->build_controls(ice)) < 0) { 2733 snd_card_free(card); 2734 return err; 2735 } 2736 } 2737 2738 if (ice_has_con_ac97(ice)) 2739 if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) { 2740 snd_card_free(card); 2741 return err; 2742 } 2743 2744 if (! c->no_mpu401) { 2745 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712, 2746 ICEREG(ice, MPU1_CTRL), 2747 (c->mpu401_1_info_flags | 2748 MPU401_INFO_INTEGRATED), 2749 ice->irq, 0, 2750 &ice->rmidi[0])) < 0) { 2751 snd_card_free(card); 2752 return err; 2753 } 2754 if (c->mpu401_1_name) 2755 /* Prefered name available in card_info */ 2756 snprintf(ice->rmidi[0]->name, 2757 sizeof(ice->rmidi[0]->name), 2758 "%s %d", c->mpu401_1_name, card->number); 2759 2760 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) { 2761 /* 2nd port used */ 2762 if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712, 2763 ICEREG(ice, MPU2_CTRL), 2764 (c->mpu401_2_info_flags | 2765 MPU401_INFO_INTEGRATED), 2766 ice->irq, 0, 2767 &ice->rmidi[1])) < 0) { 2768 snd_card_free(card); 2769 return err; 2770 } 2771 if (c->mpu401_2_name) 2772 /* Prefered name available in card_info */ 2773 snprintf(ice->rmidi[1]->name, 2774 sizeof(ice->rmidi[1]->name), 2775 "%s %d", c->mpu401_2_name, 2776 card->number); 2777 } 2778 } 2779 2780 snd_ice1712_set_input_clock_source(ice, 0); 2781 2782 sprintf(card->longname, "%s at 0x%lx, irq %i", 2783 card->shortname, ice->port, ice->irq); 2784 2785 if ((err = snd_card_register(card)) < 0) { 2786 snd_card_free(card); 2787 return err; 2788 } 2789 pci_set_drvdata(pci, card); 2790 dev++; 2791 return 0; 2792 } 2793 2794 static void __devexit snd_ice1712_remove(struct pci_dev *pci) 2795 { 2796 snd_card_free(pci_get_drvdata(pci)); 2797 pci_set_drvdata(pci, NULL); 2798 } 2799 2800 static struct pci_driver driver = { 2801 .name = "ICE1712", 2802 .id_table = snd_ice1712_ids, 2803 .probe = snd_ice1712_probe, 2804 .remove = __devexit_p(snd_ice1712_remove), 2805 }; 2806 2807 static int __init alsa_card_ice1712_init(void) 2808 { 2809 return pci_register_driver(&driver); 2810 } 2811 2812 static void __exit alsa_card_ice1712_exit(void) 2813 { 2814 pci_unregister_driver(&driver); 2815 } 2816 2817 module_init(alsa_card_ice1712_init) 2818 module_exit(alsa_card_ice1712_exit) 2819