1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License as published by 4 * the Free Software Foundation; either version 2 of the License, or 5 * (at your option) any later version. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 * 12 * You should have received a copy of the GNU General Public License 13 * along with this program; if not, write to the Free Software 14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 15 * 16 */ 17 18 /* 19 * 2002-07 Benny Sjostrand benny@hostmobility.com 20 */ 21 22 23 #include <sound/driver.h> 24 #include <asm/io.h> 25 #include <linux/delay.h> 26 #include <linux/pci.h> 27 #include <linux/pm.h> 28 #include <linux/init.h> 29 #include <linux/slab.h> 30 #include <linux/vmalloc.h> 31 #include <linux/mutex.h> 32 33 #include <sound/core.h> 34 #include <sound/control.h> 35 #include <sound/info.h> 36 #include <sound/asoundef.h> 37 #include <sound/cs46xx.h> 38 39 #include "cs46xx_lib.h" 40 #include "dsp_spos.h" 41 42 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip, 43 struct dsp_scb_descriptor * fg_entry); 44 45 static enum wide_opcode wide_opcodes[] = { 46 WIDE_FOR_BEGIN_LOOP, 47 WIDE_FOR_BEGIN_LOOP2, 48 WIDE_COND_GOTO_ADDR, 49 WIDE_COND_GOTO_CALL, 50 WIDE_TBEQ_COND_GOTO_ADDR, 51 WIDE_TBEQ_COND_CALL_ADDR, 52 WIDE_TBEQ_NCOND_GOTO_ADDR, 53 WIDE_TBEQ_NCOND_CALL_ADDR, 54 WIDE_TBEQ_COND_GOTO1_ADDR, 55 WIDE_TBEQ_COND_CALL1_ADDR, 56 WIDE_TBEQ_NCOND_GOTOI_ADDR, 57 WIDE_TBEQ_NCOND_CALL1_ADDR 58 }; 59 60 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size, 61 u32 overlay_begin_address) 62 { 63 unsigned int i = 0, j, nreallocated = 0; 64 u32 hival,loval,address; 65 u32 mop_operands,mop_type,wide_op; 66 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 67 68 snd_assert( ((size % 2) == 0), return -EINVAL); 69 70 while (i < size) { 71 loval = data[i++]; 72 hival = data[i++]; 73 74 if (ins->code.offset > 0) { 75 mop_operands = (hival >> 6) & 0x03fff; 76 mop_type = mop_operands >> 10; 77 78 /* check for wide type instruction */ 79 if (mop_type == 0 && 80 (mop_operands & WIDE_LADD_INSTR_MASK) == 0 && 81 (mop_operands & WIDE_INSTR_MASK) != 0) { 82 wide_op = loval & 0x7f; 83 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) { 84 if (wide_opcodes[j] == wide_op) { 85 /* need to reallocate instruction */ 86 address = (hival & 0x00FFF) << 5; 87 address |= loval >> 15; 88 89 snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address); 90 91 if ( !(address & 0x8000) ) { 92 address += (ins->code.offset / 2) - overlay_begin_address; 93 } else { 94 snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n"); 95 } 96 97 hival &= 0xFF000; 98 loval &= 0x07FFF; 99 100 hival |= ( (address >> 5) & 0x00FFF); 101 loval |= ( (address << 15) & 0xF8000); 102 103 address = (hival & 0x00FFF) << 5; 104 address |= loval >> 15; 105 106 snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address); 107 nreallocated ++; 108 } /* wide_opcodes[j] == wide_op */ 109 } /* for */ 110 } /* mod_type == 0 ... */ 111 } /* ins->code.offset > 0 */ 112 113 ins->code.data[ins->code.size++] = loval; 114 ins->code.data[ins->code.size++] = hival; 115 } 116 117 snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated); 118 return nreallocated; 119 } 120 121 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type) 122 { 123 int i; 124 for (i = 0;i < module->nsegments; ++i) { 125 if (module->segments[i].segment_type == seg_type) { 126 return (module->segments + i); 127 } 128 } 129 130 return NULL; 131 }; 132 133 static int find_free_symbol_index (struct dsp_spos_instance * ins) 134 { 135 int index = ins->symbol_table.nsymbols,i; 136 137 for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) { 138 if (ins->symbol_table.symbols[i].deleted) { 139 index = i; 140 break; 141 } 142 } 143 144 return index; 145 } 146 147 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module) 148 { 149 int i; 150 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 151 152 if (module->symbol_table.nsymbols > 0) { 153 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") && 154 module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) { 155 module->overlay_begin_address = module->symbol_table.symbols[0].address; 156 } 157 } 158 159 for (i = 0;i < module->symbol_table.nsymbols; ++i) { 160 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) { 161 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n"); 162 return -ENOMEM; 163 } 164 165 166 if (cs46xx_dsp_lookup_symbol(chip, 167 module->symbol_table.symbols[i].symbol_name, 168 module->symbol_table.symbols[i].symbol_type) == NULL) { 169 170 ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i]; 171 ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address); 172 ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module; 173 ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0; 174 175 if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index) 176 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols; 177 178 ins->symbol_table.nsymbols++; 179 } else { 180 /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n", 181 module->symbol_table.symbols[i].symbol_name); */ 182 } 183 } 184 185 return 0; 186 } 187 188 static struct dsp_symbol_entry * 189 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type) 190 { 191 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 192 struct dsp_symbol_entry * symbol = NULL; 193 int index; 194 195 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) { 196 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n"); 197 return NULL; 198 } 199 200 if (cs46xx_dsp_lookup_symbol(chip, 201 symbol_name, 202 type) != NULL) { 203 snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name); 204 return NULL; 205 } 206 207 index = find_free_symbol_index (ins); 208 209 strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name); 210 ins->symbol_table.symbols[index].address = address; 211 ins->symbol_table.symbols[index].symbol_type = type; 212 ins->symbol_table.symbols[index].module = NULL; 213 ins->symbol_table.symbols[index].deleted = 0; 214 symbol = (ins->symbol_table.symbols + index); 215 216 if (index > ins->symbol_table.highest_frag_index) 217 ins->symbol_table.highest_frag_index = index; 218 219 if (index == ins->symbol_table.nsymbols) 220 ins->symbol_table.nsymbols++; /* no frag. in list */ 221 222 return symbol; 223 } 224 225 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip) 226 { 227 struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL); 228 229 if (ins == NULL) 230 return NULL; 231 232 /* better to use vmalloc for this big table */ 233 ins->symbol_table.nsymbols = 0; 234 ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) * 235 DSP_MAX_SYMBOLS); 236 ins->symbol_table.highest_frag_index = 0; 237 238 if (ins->symbol_table.symbols == NULL) { 239 cs46xx_dsp_spos_destroy(chip); 240 goto error; 241 } 242 243 ins->code.offset = 0; 244 ins->code.size = 0; 245 ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL); 246 247 if (ins->code.data == NULL) { 248 cs46xx_dsp_spos_destroy(chip); 249 goto error; 250 } 251 252 ins->nscb = 0; 253 ins->ntask = 0; 254 255 ins->nmodules = 0; 256 ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL); 257 258 if (ins->modules == NULL) { 259 cs46xx_dsp_spos_destroy(chip); 260 goto error; 261 } 262 263 /* default SPDIF input sample rate 264 to 48000 khz */ 265 ins->spdif_in_sample_rate = 48000; 266 267 /* maximize volume */ 268 ins->dac_volume_right = 0x8000; 269 ins->dac_volume_left = 0x8000; 270 ins->spdif_input_volume_right = 0x8000; 271 ins->spdif_input_volume_left = 0x8000; 272 273 /* set left and right validity bits and 274 default channel status */ 275 ins->spdif_csuv_default = 276 ins->spdif_csuv_stream = 277 /* byte 0 */ ((unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF & 0xff)) << 24) | 278 /* byte 1 */ ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) | 279 /* byte 3 */ (unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) | 280 /* left and right validity bits */ (1 << 13) | (1 << 12); 281 282 return ins; 283 284 error: 285 kfree(ins); 286 return NULL; 287 } 288 289 void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip) 290 { 291 int i; 292 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 293 294 snd_assert(ins != NULL, return); 295 296 mutex_lock(&chip->spos_mutex); 297 for (i = 0; i < ins->nscb; ++i) { 298 if (ins->scbs[i].deleted) continue; 299 300 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); 301 } 302 303 kfree(ins->code.data); 304 vfree(ins->symbol_table.symbols); 305 kfree(ins->modules); 306 kfree(ins); 307 mutex_unlock(&chip->spos_mutex); 308 } 309 310 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module) 311 { 312 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 313 struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM); 314 struct dsp_segment_desc * parameter = get_segment_desc (module,SEGTYPE_SP_PARAMETER); 315 struct dsp_segment_desc * sample = get_segment_desc (module,SEGTYPE_SP_SAMPLE); 316 u32 doffset, dsize; 317 318 if (ins->nmodules == DSP_MAX_MODULES - 1) { 319 snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n"); 320 return -ENOMEM; 321 } 322 323 snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name); 324 325 if (ins->nmodules == 0) { 326 snd_printdd("dsp_spos: clearing parameter area\n"); 327 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE); 328 } 329 330 if (parameter == NULL) { 331 snd_printdd("dsp_spos: module got no parameter segment\n"); 332 } else { 333 if (ins->nmodules > 0) { 334 snd_printk(KERN_WARNING "dsp_spos: WARNING current parameter data may be overwriten!\n"); 335 } 336 337 doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET); 338 dsize = parameter->size * 4; 339 340 snd_printdd("dsp_spos: downloading parameter data to chip (%08x-%08x)\n", 341 doffset,doffset + dsize); 342 343 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) { 344 snd_printk(KERN_ERR "dsp_spos: failed to download parameter data to DSP\n"); 345 return -EINVAL; 346 } 347 } 348 349 if (ins->nmodules == 0) { 350 snd_printdd("dsp_spos: clearing sample area\n"); 351 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE); 352 } 353 354 if (sample == NULL) { 355 snd_printdd("dsp_spos: module got no sample segment\n"); 356 } else { 357 if (ins->nmodules > 0) { 358 snd_printk(KERN_WARNING "dsp_spos: WARNING current sample data may be overwriten\n"); 359 } 360 361 doffset = (sample->offset * 4 + DSP_SAMPLE_BYTE_OFFSET); 362 dsize = sample->size * 4; 363 364 snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n", 365 doffset,doffset + dsize); 366 367 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) { 368 snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n"); 369 return -EINVAL; 370 } 371 } 372 373 374 if (ins->nmodules == 0) { 375 snd_printdd("dsp_spos: clearing code area\n"); 376 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE); 377 } 378 379 if (code == NULL) { 380 snd_printdd("dsp_spos: module got no code segment\n"); 381 } else { 382 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) { 383 snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n"); 384 return -ENOMEM; 385 } 386 387 module->load_address = ins->code.offset; 388 module->overlay_begin_address = 0x000; 389 390 /* if module has a code segment it must have 391 symbol table */ 392 snd_assert(module->symbol_table.symbols != NULL ,return -ENOMEM); 393 if (add_symbols(chip,module)) { 394 snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n"); 395 return -ENOMEM; 396 } 397 398 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET); 399 dsize = code->size * 4; 400 snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n", 401 doffset,doffset + dsize); 402 403 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address); 404 405 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) { 406 snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n"); 407 return -EINVAL; 408 } 409 410 ins->code.offset += code->size; 411 } 412 413 /* NOTE: module segments and symbol table must be 414 statically allocated. Case that module data is 415 not generated by the ospparser */ 416 ins->modules[ins->nmodules] = *module; 417 ins->nmodules++; 418 419 return 0; 420 } 421 422 struct dsp_symbol_entry * 423 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type) 424 { 425 int i; 426 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 427 428 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { 429 430 if (ins->symbol_table.symbols[i].deleted) 431 continue; 432 433 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) && 434 ins->symbol_table.symbols[i].symbol_type == symbol_type) { 435 return (ins->symbol_table.symbols + i); 436 } 437 } 438 439 #if 0 440 printk ("dsp_spos: symbol <%s> type %02x not found\n", 441 symbol_name,symbol_type); 442 #endif 443 444 return NULL; 445 } 446 447 448 #ifdef CONFIG_PROC_FS 449 static struct dsp_symbol_entry * 450 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type) 451 { 452 int i; 453 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 454 455 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { 456 457 if (ins->symbol_table.symbols[i].deleted) 458 continue; 459 460 if (ins->symbol_table.symbols[i].address == address && 461 ins->symbol_table.symbols[i].symbol_type == symbol_type) { 462 return (ins->symbol_table.symbols + i); 463 } 464 } 465 466 467 return NULL; 468 } 469 470 471 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry, 472 struct snd_info_buffer *buffer) 473 { 474 struct snd_cs46xx *chip = entry->private_data; 475 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 476 int i; 477 478 snd_iprintf(buffer, "SYMBOLS:\n"); 479 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { 480 char *module_str = "system"; 481 482 if (ins->symbol_table.symbols[i].deleted) 483 continue; 484 485 if (ins->symbol_table.symbols[i].module != NULL) { 486 module_str = ins->symbol_table.symbols[i].module->module_name; 487 } 488 489 490 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n", 491 ins->symbol_table.symbols[i].address, 492 ins->symbol_table.symbols[i].symbol_type, 493 ins->symbol_table.symbols[i].symbol_name, 494 module_str); 495 } 496 } 497 498 499 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry, 500 struct snd_info_buffer *buffer) 501 { 502 struct snd_cs46xx *chip = entry->private_data; 503 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 504 int i,j; 505 506 mutex_lock(&chip->spos_mutex); 507 snd_iprintf(buffer, "MODULES:\n"); 508 for ( i = 0; i < ins->nmodules; ++i ) { 509 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name); 510 snd_iprintf(buffer, " %d symbols\n", ins->modules[i].symbol_table.nsymbols); 511 snd_iprintf(buffer, " %d fixups\n", ins->modules[i].nfixups); 512 513 for (j = 0; j < ins->modules[i].nsegments; ++ j) { 514 struct dsp_segment_desc * desc = (ins->modules[i].segments + j); 515 snd_iprintf(buffer, " segment %02x offset %08x size %08x\n", 516 desc->segment_type,desc->offset, desc->size); 517 } 518 } 519 mutex_unlock(&chip->spos_mutex); 520 } 521 522 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry, 523 struct snd_info_buffer *buffer) 524 { 525 struct snd_cs46xx *chip = entry->private_data; 526 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 527 int i, j, col; 528 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; 529 530 mutex_lock(&chip->spos_mutex); 531 snd_iprintf(buffer, "TASK TREES:\n"); 532 for ( i = 0; i < ins->ntask; ++i) { 533 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name); 534 535 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) { 536 u32 val; 537 if (col == 4) { 538 snd_iprintf(buffer,"\n"); 539 col = 0; 540 } 541 val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32)); 542 snd_iprintf(buffer,"%08x ",val); 543 } 544 } 545 546 snd_iprintf(buffer,"\n"); 547 mutex_unlock(&chip->spos_mutex); 548 } 549 550 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry, 551 struct snd_info_buffer *buffer) 552 { 553 struct snd_cs46xx *chip = entry->private_data; 554 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 555 int i; 556 557 mutex_lock(&chip->spos_mutex); 558 snd_iprintf(buffer, "SCB's:\n"); 559 for ( i = 0; i < ins->nscb; ++i) { 560 if (ins->scbs[i].deleted) 561 continue; 562 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name); 563 564 if (ins->scbs[i].parent_scb_ptr != NULL) { 565 snd_iprintf(buffer,"parent [%s:%04x] ", 566 ins->scbs[i].parent_scb_ptr->scb_name, 567 ins->scbs[i].parent_scb_ptr->address); 568 } else snd_iprintf(buffer,"parent [none] "); 569 570 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n", 571 ins->scbs[i].sub_list_ptr->scb_name, 572 ins->scbs[i].sub_list_ptr->address, 573 ins->scbs[i].next_scb_ptr->scb_name, 574 ins->scbs[i].next_scb_ptr->address, 575 ins->scbs[i].task_entry->symbol_name, 576 ins->scbs[i].task_entry->address); 577 } 578 579 snd_iprintf(buffer,"\n"); 580 mutex_unlock(&chip->spos_mutex); 581 } 582 583 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry, 584 struct snd_info_buffer *buffer) 585 { 586 struct snd_cs46xx *chip = entry->private_data; 587 /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */ 588 unsigned int i, col = 0; 589 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; 590 struct dsp_symbol_entry * symbol; 591 592 for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) { 593 if (col == 4) { 594 snd_iprintf(buffer,"\n"); 595 col = 0; 596 } 597 598 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) { 599 col = 0; 600 snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name); 601 } 602 603 if (col == 0) { 604 snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32)); 605 } 606 607 snd_iprintf(buffer,"%08X ",readl(dst + i)); 608 } 609 } 610 611 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry, 612 struct snd_info_buffer *buffer) 613 { 614 struct snd_cs46xx *chip = entry->private_data; 615 int i,col = 0; 616 void __iomem *dst = chip->region.idx[2].remap_addr; 617 618 snd_iprintf(buffer,"PCMREADER:\n"); 619 for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) { 620 if (col == 4) { 621 snd_iprintf(buffer,"\n"); 622 col = 0; 623 } 624 625 if (col == 0) { 626 snd_iprintf(buffer, "%04X ",i); 627 } 628 629 snd_iprintf(buffer,"%08X ",readl(dst + i)); 630 } 631 632 snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n"); 633 634 col = 0; 635 for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) { 636 if (col == 4) { 637 snd_iprintf(buffer,"\n"); 638 col = 0; 639 } 640 641 if (col == 0) { 642 snd_iprintf(buffer, "%04X ",i); 643 } 644 645 snd_iprintf(buffer,"%08X ",readl(dst + i)); 646 } 647 648 snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n"); 649 col = 0; 650 for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) { 651 if (col == 4) { 652 snd_iprintf(buffer,"\n"); 653 col = 0; 654 } 655 656 if (col == 0) { 657 snd_iprintf(buffer, "%04X ",i); 658 } 659 660 snd_iprintf(buffer,"%08X ",readl(dst + i)); 661 } 662 663 664 snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n"); 665 col = 0; 666 for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) { 667 if (col == 4) { 668 snd_iprintf(buffer,"\n"); 669 col = 0; 670 } 671 672 if (col == 0) { 673 snd_iprintf(buffer, "%04X ",i); 674 } 675 676 snd_iprintf(buffer,"%08X ",readl(dst + i)); 677 } 678 679 snd_iprintf(buffer,"\n...\n"); 680 col = 0; 681 682 for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) { 683 if (col == 4) { 684 snd_iprintf(buffer,"\n"); 685 col = 0; 686 } 687 688 if (col == 0) { 689 snd_iprintf(buffer, "%04X ",i); 690 } 691 692 snd_iprintf(buffer,"%08X ",readl(dst + i)); 693 } 694 695 696 snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n"); 697 col = 0; 698 for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) { 699 if (col == 4) { 700 snd_iprintf(buffer,"\n"); 701 col = 0; 702 } 703 704 if (col == 0) { 705 snd_iprintf(buffer, "%04X ",i); 706 } 707 708 snd_iprintf(buffer,"%08X ",readl(dst + i)); 709 } 710 711 snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n"); 712 col = 0; 713 for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) { 714 if (col == 4) { 715 snd_iprintf(buffer,"\n"); 716 col = 0; 717 } 718 719 if (col == 0) { 720 snd_iprintf(buffer, "%04X ",i); 721 } 722 723 snd_iprintf(buffer,"%08X ",readl(dst + i)); 724 } 725 #if 0 726 snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n"); 727 col = 0; 728 for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) { 729 if (col == 4) { 730 snd_iprintf(buffer,"\n"); 731 col = 0; 732 } 733 734 if (col == 0) { 735 snd_iprintf(buffer, "%04X ",i); 736 } 737 738 snd_iprintf(buffer,"%08X ",readl(dst + i)); 739 } 740 #endif 741 742 snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n"); 743 col = 0; 744 for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) { 745 if (col == 4) { 746 snd_iprintf(buffer,"\n"); 747 col = 0; 748 } 749 750 if (col == 0) { 751 snd_iprintf(buffer, "%04X ",i); 752 } 753 754 snd_iprintf(buffer,"%08X ",readl(dst + i)); 755 } 756 snd_iprintf(buffer,"\n"); 757 } 758 759 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip) 760 { 761 struct snd_info_entry *entry; 762 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 763 int i; 764 765 ins->snd_card = card; 766 767 if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) { 768 entry->content = SNDRV_INFO_CONTENT_TEXT; 769 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO; 770 entry->c.text.read_size = 512; 771 772 if (snd_info_register(entry) < 0) { 773 snd_info_free_entry(entry); 774 entry = NULL; 775 } 776 } 777 778 ins->proc_dsp_dir = entry; 779 780 if (!ins->proc_dsp_dir) 781 return -ENOMEM; 782 783 if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) { 784 entry->content = SNDRV_INFO_CONTENT_TEXT; 785 entry->private_data = chip; 786 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 787 entry->c.text.read_size = 512; 788 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read; 789 if (snd_info_register(entry) < 0) { 790 snd_info_free_entry(entry); 791 entry = NULL; 792 } 793 } 794 ins->proc_sym_info_entry = entry; 795 796 if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) { 797 entry->content = SNDRV_INFO_CONTENT_TEXT; 798 entry->private_data = chip; 799 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 800 entry->c.text.read_size = 512; 801 entry->c.text.read = cs46xx_dsp_proc_modules_read; 802 if (snd_info_register(entry) < 0) { 803 snd_info_free_entry(entry); 804 entry = NULL; 805 } 806 } 807 ins->proc_modules_info_entry = entry; 808 809 if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) { 810 entry->content = SNDRV_INFO_CONTENT_TEXT; 811 entry->private_data = chip; 812 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 813 entry->c.text.read_size = 512; 814 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read; 815 if (snd_info_register(entry) < 0) { 816 snd_info_free_entry(entry); 817 entry = NULL; 818 } 819 } 820 ins->proc_parameter_dump_info_entry = entry; 821 822 if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) { 823 entry->content = SNDRV_INFO_CONTENT_TEXT; 824 entry->private_data = chip; 825 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 826 entry->c.text.read_size = 512; 827 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read; 828 if (snd_info_register(entry) < 0) { 829 snd_info_free_entry(entry); 830 entry = NULL; 831 } 832 } 833 ins->proc_sample_dump_info_entry = entry; 834 835 if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) { 836 entry->content = SNDRV_INFO_CONTENT_TEXT; 837 entry->private_data = chip; 838 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 839 entry->c.text.read_size = 512; 840 entry->c.text.read = cs46xx_dsp_proc_task_tree_read; 841 if (snd_info_register(entry) < 0) { 842 snd_info_free_entry(entry); 843 entry = NULL; 844 } 845 } 846 ins->proc_task_info_entry = entry; 847 848 if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) { 849 entry->content = SNDRV_INFO_CONTENT_TEXT; 850 entry->private_data = chip; 851 entry->mode = S_IFREG | S_IRUGO | S_IWUSR; 852 entry->c.text.read_size = 1024; 853 entry->c.text.read = cs46xx_dsp_proc_scb_read; 854 if (snd_info_register(entry) < 0) { 855 snd_info_free_entry(entry); 856 entry = NULL; 857 } 858 } 859 ins->proc_scb_info_entry = entry; 860 861 mutex_lock(&chip->spos_mutex); 862 /* register/update SCB's entries on proc */ 863 for (i = 0; i < ins->nscb; ++i) { 864 if (ins->scbs[i].deleted) continue; 865 866 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i)); 867 } 868 mutex_unlock(&chip->spos_mutex); 869 870 return 0; 871 } 872 873 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip) 874 { 875 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 876 int i; 877 878 if (ins->proc_sym_info_entry) { 879 snd_info_unregister(ins->proc_sym_info_entry); 880 ins->proc_sym_info_entry = NULL; 881 } 882 883 if (ins->proc_modules_info_entry) { 884 snd_info_unregister(ins->proc_modules_info_entry); 885 ins->proc_modules_info_entry = NULL; 886 } 887 888 if (ins->proc_parameter_dump_info_entry) { 889 snd_info_unregister(ins->proc_parameter_dump_info_entry); 890 ins->proc_parameter_dump_info_entry = NULL; 891 } 892 893 if (ins->proc_sample_dump_info_entry) { 894 snd_info_unregister(ins->proc_sample_dump_info_entry); 895 ins->proc_sample_dump_info_entry = NULL; 896 } 897 898 if (ins->proc_scb_info_entry) { 899 snd_info_unregister(ins->proc_scb_info_entry); 900 ins->proc_scb_info_entry = NULL; 901 } 902 903 if (ins->proc_task_info_entry) { 904 snd_info_unregister(ins->proc_task_info_entry); 905 ins->proc_task_info_entry = NULL; 906 } 907 908 mutex_lock(&chip->spos_mutex); 909 for (i = 0; i < ins->nscb; ++i) { 910 if (ins->scbs[i].deleted) continue; 911 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); 912 } 913 mutex_unlock(&chip->spos_mutex); 914 915 if (ins->proc_dsp_dir) { 916 snd_info_unregister (ins->proc_dsp_dir); 917 ins->proc_dsp_dir = NULL; 918 } 919 920 return 0; 921 } 922 #endif /* CONFIG_PROC_FS */ 923 924 static int debug_tree; 925 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data, 926 u32 dest, int size) 927 { 928 void __iomem *spdst = chip->region.idx[1].remap_addr + 929 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32); 930 int i; 931 932 for (i = 0; i < size; ++i) { 933 if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]); 934 writel(task_data[i],spdst); 935 spdst += sizeof(u32); 936 } 937 } 938 939 static int debug_scb; 940 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest) 941 { 942 void __iomem *spdst = chip->region.idx[1].remap_addr + 943 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32); 944 int i; 945 946 for (i = 0; i < 0x10; ++i) { 947 if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]); 948 writel(scb_data[i],spdst); 949 spdst += sizeof(u32); 950 } 951 } 952 953 static int find_free_scb_index (struct dsp_spos_instance * ins) 954 { 955 int index = ins->nscb, i; 956 957 for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) { 958 if (ins->scbs[i].deleted) { 959 index = i; 960 break; 961 } 962 } 963 964 return index; 965 } 966 967 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest) 968 { 969 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 970 struct dsp_scb_descriptor * desc = NULL; 971 int index; 972 973 if (ins->nscb == DSP_MAX_SCB_DESC - 1) { 974 snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n"); 975 return NULL; 976 } 977 978 index = find_free_scb_index (ins); 979 980 strcpy(ins->scbs[index].scb_name, name); 981 ins->scbs[index].address = dest; 982 ins->scbs[index].index = index; 983 ins->scbs[index].proc_info = NULL; 984 ins->scbs[index].ref_count = 1; 985 ins->scbs[index].deleted = 0; 986 spin_lock_init(&ins->scbs[index].lock); 987 988 desc = (ins->scbs + index); 989 ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER); 990 991 if (index > ins->scb_highest_frag_index) 992 ins->scb_highest_frag_index = index; 993 994 if (index == ins->nscb) 995 ins->nscb++; 996 997 return desc; 998 } 999 1000 static struct dsp_task_descriptor * 1001 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size) 1002 { 1003 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1004 struct dsp_task_descriptor * desc = NULL; 1005 1006 if (ins->ntask == DSP_MAX_TASK_DESC - 1) { 1007 snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n"); 1008 return NULL; 1009 } 1010 1011 strcpy(ins->tasks[ins->ntask].task_name,name); 1012 ins->tasks[ins->ntask].address = dest; 1013 ins->tasks[ins->ntask].size = size; 1014 1015 /* quick find in list */ 1016 ins->tasks[ins->ntask].index = ins->ntask; 1017 desc = (ins->tasks + ins->ntask); 1018 ins->ntask++; 1019 1020 add_symbol (chip,name,dest,SYMBOL_PARAMETER); 1021 return desc; 1022 } 1023 1024 struct dsp_scb_descriptor * 1025 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest) 1026 { 1027 struct dsp_scb_descriptor * desc; 1028 1029 desc = _map_scb (chip,name,dest); 1030 if (desc) { 1031 _dsp_create_scb(chip,scb_data,dest); 1032 } else { 1033 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n"); 1034 } 1035 1036 return desc; 1037 } 1038 1039 1040 static struct dsp_task_descriptor * 1041 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data, 1042 u32 dest, int size) 1043 { 1044 struct dsp_task_descriptor * desc; 1045 1046 desc = _map_task_tree (chip,name,dest,size); 1047 if (desc) { 1048 _dsp_create_task_tree(chip,task_data,dest,size); 1049 } else { 1050 snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n"); 1051 } 1052 1053 return desc; 1054 } 1055 1056 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip) 1057 { 1058 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1059 struct dsp_symbol_entry * fg_task_tree_header_code; 1060 struct dsp_symbol_entry * task_tree_header_code; 1061 struct dsp_symbol_entry * task_tree_thread; 1062 struct dsp_symbol_entry * null_algorithm; 1063 struct dsp_symbol_entry * magic_snoop_task; 1064 1065 struct dsp_scb_descriptor * timing_master_scb; 1066 struct dsp_scb_descriptor * codec_out_scb; 1067 struct dsp_scb_descriptor * codec_in_scb; 1068 struct dsp_scb_descriptor * src_task_scb; 1069 struct dsp_scb_descriptor * master_mix_scb; 1070 struct dsp_scb_descriptor * rear_mix_scb; 1071 struct dsp_scb_descriptor * record_mix_scb; 1072 struct dsp_scb_descriptor * write_back_scb; 1073 struct dsp_scb_descriptor * vari_decimate_scb; 1074 struct dsp_scb_descriptor * rear_codec_out_scb; 1075 struct dsp_scb_descriptor * clfe_codec_out_scb; 1076 struct dsp_scb_descriptor * magic_snoop_scb; 1077 1078 int fifo_addr, fifo_span, valid_slots; 1079 1080 static struct dsp_spos_control_block sposcb = { 1081 /* 0 */ HFG_TREE_SCB,HFG_STACK, 1082 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR, 1083 /* 2 */ DSP_SPOS_DC,0, 1084 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC, 1085 /* 4 */ 0,0, 1086 /* 5 */ DSP_SPOS_UU,0, 1087 /* 6 */ FG_TASK_HEADER_ADDR,0, 1088 /* 7 */ 0,0, 1089 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC, 1090 /* 9 */ 0, 1091 /* A */ 0,HFG_FIRST_EXECUTE_MODE, 1092 /* B */ DSP_SPOS_UU,DSP_SPOS_UU, 1093 /* C */ DSP_SPOS_DC_DC, 1094 /* D */ DSP_SPOS_DC_DC, 1095 /* E */ DSP_SPOS_DC_DC, 1096 /* F */ DSP_SPOS_DC_DC 1097 }; 1098 1099 cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10); 1100 1101 null_algorithm = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE); 1102 if (null_algorithm == NULL) { 1103 snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n"); 1104 return -EIO; 1105 } 1106 1107 fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE); 1108 if (fg_task_tree_header_code == NULL) { 1109 snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n"); 1110 return -EIO; 1111 } 1112 1113 task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE); 1114 if (task_tree_header_code == NULL) { 1115 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n"); 1116 return -EIO; 1117 } 1118 1119 task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE); 1120 if (task_tree_thread == NULL) { 1121 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n"); 1122 return -EIO; 1123 } 1124 1125 magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE); 1126 if (magic_snoop_task == NULL) { 1127 snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n"); 1128 return -EIO; 1129 } 1130 1131 { 1132 /* create the null SCB */ 1133 static struct dsp_generic_scb null_scb = { 1134 { 0, 0, 0, 0 }, 1135 { 0, 0, 0, 0, 0 }, 1136 NULL_SCB_ADDR, NULL_SCB_ADDR, 1137 0, 0, 0, 0, 0, 1138 { 1139 0,0, 1140 0,0, 1141 } 1142 }; 1143 1144 null_scb.entry_point = null_algorithm->address; 1145 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR); 1146 ins->the_null_scb->task_entry = null_algorithm; 1147 ins->the_null_scb->sub_list_ptr = ins->the_null_scb; 1148 ins->the_null_scb->next_scb_ptr = ins->the_null_scb; 1149 ins->the_null_scb->parent_scb_ptr = NULL; 1150 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb); 1151 } 1152 1153 { 1154 /* setup foreground task tree */ 1155 static struct dsp_task_tree_control_block fg_task_tree_hdr = { 1156 { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10), 1157 DSP_SPOS_DC_DC, 1158 DSP_SPOS_DC_DC, 1159 0x0000,DSP_SPOS_DC, 1160 DSP_SPOS_DC, DSP_SPOS_DC, 1161 DSP_SPOS_DC_DC, 1162 DSP_SPOS_DC_DC, 1163 DSP_SPOS_DC_DC, 1164 DSP_SPOS_DC,DSP_SPOS_DC }, 1165 1166 { 1167 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR, 1168 0, 1169 FG_TASK_HEADER_ADDR + TCBData, 1170 }, 1171 1172 { 1173 4,0, 1174 1,0, 1175 2,SPOSCB_ADDR + HFGFlags, 1176 0,0, 1177 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK 1178 }, 1179 1180 { 1181 DSP_SPOS_DC,0, 1182 DSP_SPOS_DC,DSP_SPOS_DC, 1183 DSP_SPOS_DC,DSP_SPOS_DC, 1184 DSP_SPOS_DC,DSP_SPOS_DC, 1185 DSP_SPOS_DC,DSP_SPOS_DC, 1186 DSP_SPOS_DCDC, 1187 DSP_SPOS_UU,1, 1188 DSP_SPOS_DCDC, 1189 DSP_SPOS_DCDC, 1190 DSP_SPOS_DCDC, 1191 DSP_SPOS_DCDC, 1192 DSP_SPOS_DCDC, 1193 DSP_SPOS_DCDC, 1194 DSP_SPOS_DCDC, 1195 DSP_SPOS_DCDC, 1196 DSP_SPOS_DCDC, 1197 DSP_SPOS_DCDC, 1198 DSP_SPOS_DCDC, 1199 DSP_SPOS_DCDC, 1200 DSP_SPOS_DCDC, 1201 DSP_SPOS_DCDC, 1202 DSP_SPOS_DCDC, 1203 DSP_SPOS_DCDC, 1204 DSP_SPOS_DCDC, 1205 DSP_SPOS_DCDC, 1206 DSP_SPOS_DCDC, 1207 DSP_SPOS_DCDC, 1208 DSP_SPOS_DCDC, 1209 DSP_SPOS_DCDC, 1210 DSP_SPOS_DCDC, 1211 DSP_SPOS_DCDC, 1212 DSP_SPOS_DCDC, 1213 DSP_SPOS_DCDC, 1214 DSP_SPOS_DCDC, 1215 DSP_SPOS_DCDC 1216 }, 1217 { 1218 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU, 1219 0,0 1220 } 1221 }; 1222 1223 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address; 1224 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address; 1225 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35); 1226 } 1227 1228 1229 { 1230 /* setup foreground task tree */ 1231 static struct dsp_task_tree_control_block bg_task_tree_hdr = { 1232 { DSP_SPOS_DC_DC, 1233 DSP_SPOS_DC_DC, 1234 DSP_SPOS_DC_DC, 1235 DSP_SPOS_DC, DSP_SPOS_DC, 1236 DSP_SPOS_DC, DSP_SPOS_DC, 1237 DSP_SPOS_DC_DC, 1238 DSP_SPOS_DC_DC, 1239 DSP_SPOS_DC_DC, 1240 DSP_SPOS_DC,DSP_SPOS_DC }, 1241 1242 { 1243 NULL_SCB_ADDR,NULL_SCB_ADDR, /* Set up the background to do nothing */ 1244 0, 1245 BG_TREE_SCB_ADDR + TCBData, 1246 }, 1247 1248 { 1249 9999,0, 1250 0,1, 1251 0,SPOSCB_ADDR + HFGFlags, 1252 0,0, 1253 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK 1254 }, 1255 1256 { 1257 DSP_SPOS_DC,0, 1258 DSP_SPOS_DC,DSP_SPOS_DC, 1259 DSP_SPOS_DC,DSP_SPOS_DC, 1260 DSP_SPOS_DC,DSP_SPOS_DC, 1261 DSP_SPOS_DC,DSP_SPOS_DC, 1262 DSP_SPOS_DCDC, 1263 DSP_SPOS_UU,1, 1264 DSP_SPOS_DCDC, 1265 DSP_SPOS_DCDC, 1266 DSP_SPOS_DCDC, 1267 DSP_SPOS_DCDC, 1268 DSP_SPOS_DCDC, 1269 DSP_SPOS_DCDC, 1270 DSP_SPOS_DCDC, 1271 DSP_SPOS_DCDC, 1272 DSP_SPOS_DCDC, 1273 DSP_SPOS_DCDC, 1274 DSP_SPOS_DCDC, 1275 DSP_SPOS_DCDC, 1276 DSP_SPOS_DCDC, 1277 DSP_SPOS_DCDC, 1278 DSP_SPOS_DCDC, 1279 DSP_SPOS_DCDC, 1280 DSP_SPOS_DCDC, 1281 DSP_SPOS_DCDC, 1282 DSP_SPOS_DCDC, 1283 DSP_SPOS_DCDC, 1284 DSP_SPOS_DCDC, 1285 DSP_SPOS_DCDC, 1286 DSP_SPOS_DCDC, 1287 DSP_SPOS_DCDC, 1288 DSP_SPOS_DCDC, 1289 DSP_SPOS_DCDC, 1290 DSP_SPOS_DCDC, 1291 DSP_SPOS_DCDC 1292 }, 1293 { 1294 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU, 1295 0,0 1296 } 1297 }; 1298 1299 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address; 1300 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address; 1301 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35); 1302 } 1303 1304 /* create timing master SCB */ 1305 timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip); 1306 1307 /* create the CODEC output task */ 1308 codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000, 1309 MASTERMIX_SCB_ADDR, 1310 CODECOUT_SCB_ADDR,timing_master_scb, 1311 SCB_ON_PARENT_SUBLIST_SCB); 1312 1313 if (!codec_out_scb) goto _fail_end; 1314 /* create the master mix SCB */ 1315 master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB", 1316 MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR, 1317 codec_out_scb, 1318 SCB_ON_PARENT_SUBLIST_SCB); 1319 ins->master_mix_scb = master_mix_scb; 1320 1321 if (!master_mix_scb) goto _fail_end; 1322 1323 /* create codec in */ 1324 codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0, 1325 CODEC_INPUT_BUF1, 1326 CODECIN_SCB_ADDR,codec_out_scb, 1327 SCB_ON_PARENT_NEXT_SCB); 1328 if (!codec_in_scb) goto _fail_end; 1329 ins->codec_in_scb = codec_in_scb; 1330 1331 /* create write back scb */ 1332 write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB", 1333 WRITE_BACK_BUF1,WRITE_BACK_SPB, 1334 WRITEBACK_SCB_ADDR, 1335 timing_master_scb, 1336 SCB_ON_PARENT_NEXT_SCB); 1337 if (!write_back_scb) goto _fail_end; 1338 1339 { 1340 static struct dsp_mix2_ostream_spb mix2_ostream_spb = { 1341 0x00020000, 1342 0x0000ffff 1343 }; 1344 1345 /* dirty hack ... */ 1346 _dsp_create_task_tree (chip,(u32 *)&mix2_ostream_spb,WRITE_BACK_SPB,2); 1347 } 1348 1349 /* input sample converter */ 1350 vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB", 1351 VARI_DECIMATE_BUF0, 1352 VARI_DECIMATE_BUF1, 1353 VARIDECIMATE_SCB_ADDR, 1354 write_back_scb, 1355 SCB_ON_PARENT_SUBLIST_SCB); 1356 if (!vari_decimate_scb) goto _fail_end; 1357 1358 /* create the record mixer SCB */ 1359 record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB", 1360 MIX_SAMPLE_BUF2, 1361 RECORD_MIXER_SCB_ADDR, 1362 vari_decimate_scb, 1363 SCB_ON_PARENT_SUBLIST_SCB); 1364 ins->record_mixer_scb = record_mix_scb; 1365 1366 if (!record_mix_scb) goto _fail_end; 1367 1368 valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV); 1369 1370 snd_assert (chip->nr_ac97_codecs == 1 || chip->nr_ac97_codecs == 2); 1371 1372 if (chip->nr_ac97_codecs == 1) { 1373 /* output on slot 5 and 11 1374 on primary CODEC */ 1375 fifo_addr = 0x20; 1376 fifo_span = 0x60; 1377 1378 /* enable slot 5 and 11 */ 1379 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11; 1380 } else { 1381 /* output on slot 7 and 8 1382 on secondary CODEC */ 1383 fifo_addr = 0x40; 1384 fifo_span = 0x10; 1385 1386 /* enable slot 7 and 8 */ 1387 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8; 1388 } 1389 /* create CODEC tasklet for rear speakers output*/ 1390 rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr, 1391 REAR_MIXER_SCB_ADDR, 1392 REAR_CODECOUT_SCB_ADDR,codec_in_scb, 1393 SCB_ON_PARENT_NEXT_SCB); 1394 if (!rear_codec_out_scb) goto _fail_end; 1395 1396 1397 /* create the rear PCM channel mixer SCB */ 1398 rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB", 1399 MIX_SAMPLE_BUF3, 1400 REAR_MIXER_SCB_ADDR, 1401 rear_codec_out_scb, 1402 SCB_ON_PARENT_SUBLIST_SCB); 1403 ins->rear_mix_scb = rear_mix_scb; 1404 if (!rear_mix_scb) goto _fail_end; 1405 1406 if (chip->nr_ac97_codecs == 2) { 1407 /* create CODEC tasklet for rear Center/LFE output 1408 slot 6 and 9 on seconadry CODEC */ 1409 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030, 1410 CLFE_MIXER_SCB_ADDR, 1411 CLFE_CODEC_SCB_ADDR, 1412 rear_codec_out_scb, 1413 SCB_ON_PARENT_NEXT_SCB); 1414 if (!clfe_codec_out_scb) goto _fail_end; 1415 1416 1417 /* create the rear PCM channel mixer SCB */ 1418 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB", 1419 MIX_SAMPLE_BUF4, 1420 CLFE_MIXER_SCB_ADDR, 1421 clfe_codec_out_scb, 1422 SCB_ON_PARENT_SUBLIST_SCB); 1423 if (!ins->center_lfe_mix_scb) goto _fail_end; 1424 1425 /* enable slot 6 and 9 */ 1426 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9; 1427 } else { 1428 clfe_codec_out_scb = rear_codec_out_scb; 1429 ins->center_lfe_mix_scb = rear_mix_scb; 1430 } 1431 1432 /* enable slots depending on CODEC configuration */ 1433 snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots); 1434 1435 /* the magic snooper */ 1436 magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR, 1437 OUTPUT_SNOOP_BUFFER, 1438 codec_out_scb, 1439 clfe_codec_out_scb, 1440 SCB_ON_PARENT_NEXT_SCB); 1441 1442 1443 if (!magic_snoop_scb) goto _fail_end; 1444 ins->ref_snoop_scb = magic_snoop_scb; 1445 1446 /* SP IO access */ 1447 if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR, 1448 magic_snoop_scb, 1449 SCB_ON_PARENT_NEXT_SCB)) 1450 goto _fail_end; 1451 1452 /* SPDIF input sampel rate converter */ 1453 src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI", 1454 ins->spdif_in_sample_rate, 1455 SRC_OUTPUT_BUF1, 1456 SRC_DELAY_BUF1,SRCTASK_SCB_ADDR, 1457 master_mix_scb, 1458 SCB_ON_PARENT_SUBLIST_SCB,1); 1459 1460 if (!src_task_scb) goto _fail_end; 1461 cs46xx_src_unlink(chip,src_task_scb); 1462 1463 /* NOTE: when we now how to detect the SPDIF input 1464 sample rate we will use this SRC to adjust it */ 1465 ins->spdif_in_src = src_task_scb; 1466 1467 cs46xx_dsp_async_init(chip,timing_master_scb); 1468 return 0; 1469 1470 _fail_end: 1471 snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n"); 1472 return -EINVAL; 1473 } 1474 1475 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip, 1476 struct dsp_scb_descriptor * fg_entry) 1477 { 1478 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1479 struct dsp_symbol_entry * s16_async_codec_input_task; 1480 struct dsp_symbol_entry * spdifo_task; 1481 struct dsp_symbol_entry * spdifi_task; 1482 struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc; 1483 1484 s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE); 1485 if (s16_async_codec_input_task == NULL) { 1486 snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n"); 1487 return -EIO; 1488 } 1489 spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE); 1490 if (spdifo_task == NULL) { 1491 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n"); 1492 return -EIO; 1493 } 1494 1495 spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE); 1496 if (spdifi_task == NULL) { 1497 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n"); 1498 return -EIO; 1499 } 1500 1501 { 1502 /* 0xBC0 */ 1503 struct dsp_spdifoscb spdifo_scb = { 1504 /* 0 */ DSP_SPOS_UUUU, 1505 { 1506 /* 1 */ 0xb0, 1507 /* 2 */ 0, 1508 /* 3 */ 0, 1509 /* 4 */ 0, 1510 }, 1511 /* NOTE: the SPDIF output task read samples in mono 1512 format, the AsynchFGTxSCB task writes to buffer 1513 in stereo format 1514 */ 1515 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256, 1516 /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 ) | 0xFFFC, 1517 /* 7 */ 0,0, 1518 /* 8 */ 0, 1519 /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR, 1520 /* A */ spdifo_task->address, 1521 SPDIFO_SCB_INST + SPDIFOFIFOPointer, 1522 { 1523 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/ 1524 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/ 1525 }, 1526 /* D */ 0x804c,0, /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */ 1527 /* E */ 0x0108,0x0001, /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */ 1528 /* F */ DSP_SPOS_UUUU /* SPDIFOFree; */ 1529 }; 1530 1531 /* 0xBB0 */ 1532 struct dsp_spdifiscb spdifi_scb = { 1533 /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI, 1534 /* 1 */ 0, 1535 /* 2 */ 0, 1536 /* 3 */ 1,4000, /* SPDIFICountLimit SPDIFICount */ 1537 /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */ 1538 /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */ 1539 /* 6 */ DSP_SPOS_UUUU, /* Free3 */ 1540 /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC, /* Free2 BitCount*/ 1541 /* 8 */ DSP_SPOS_UUUU, /* TempStatus */ 1542 /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR, 1543 /* A */ spdifi_task->address, 1544 SPDIFI_SCB_INST + SPDIFIFIFOPointer, 1545 /* NOTE: The SPDIF input task write the sample in mono 1546 format from the HW FIFO, the AsynchFGRxSCB task reads 1547 them in stereo 1548 */ 1549 /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128, 1550 /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC, 1551 /* D */ 0x8048,0, 1552 /* E */ 0x01f0,0x0001, 1553 /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */ 1554 }; 1555 1556 /* 0xBA0 */ 1557 struct dsp_async_codec_input_scb async_codec_input_scb = { 1558 /* 0 */ DSP_SPOS_UUUU, 1559 /* 1 */ 0, 1560 /* 2 */ 0, 1561 /* 3 */ 1,4000, 1562 /* 4 */ 0x0118,0x0001, 1563 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64, 1564 /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC, 1565 /* 7 */ DSP_SPOS_UU,0x3, 1566 /* 8 */ DSP_SPOS_UUUU, 1567 /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR, 1568 /* A */ s16_async_codec_input_task->address, 1569 HFG_TREE_SCB + AsyncCIOFIFOPointer, 1570 1571 /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64, 1572 /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10), /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/ 1573 1574 #ifdef UseASER1Input 1575 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr; 1576 Init. 0000:8042: for ASER1 1577 0000:8044: for ASER2 */ 1578 /* D */ 0x8042,0, 1579 1580 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr; 1581 Init 1 stero:8050 ASER1 1582 Init 0 mono:8070 ASER2 1583 Init 1 Stereo : 0100 ASER1 (Set by script) */ 1584 /* E */ 0x0100,0x0001, 1585 1586 #endif 1587 1588 #ifdef UseASER2Input 1589 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr; 1590 Init. 0000:8042: for ASER1 1591 0000:8044: for ASER2 */ 1592 /* D */ 0x8044,0, 1593 1594 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr; 1595 Init 1 stero:8050 ASER1 1596 Init 0 mono:8070 ASER2 1597 Init 1 Stereo : 0100 ASER1 (Set by script) */ 1598 /* E */ 0x0110,0x0001, 1599 1600 #endif 1601 1602 /* short AsyncCIOutputBufModulo:AsyncCIFree; 1603 AsyncCIOutputBufModulo: The modulo size for 1604 the output buffer of this task */ 1605 /* F */ 0, /* DSP_SPOS_UUUU */ 1606 }; 1607 1608 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST); 1609 1610 snd_assert(spdifo_scb_desc, return -EIO); 1611 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST); 1612 snd_assert(spdifi_scb_desc, return -EIO); 1613 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB); 1614 snd_assert(async_codec_scb_desc, return -EIO); 1615 1616 async_codec_scb_desc->parent_scb_ptr = NULL; 1617 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc; 1618 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb; 1619 async_codec_scb_desc->task_entry = s16_async_codec_input_task; 1620 1621 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc; 1622 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc; 1623 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb; 1624 spdifi_scb_desc->task_entry = spdifi_task; 1625 1626 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc; 1627 spdifo_scb_desc->next_scb_ptr = fg_entry; 1628 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb; 1629 spdifo_scb_desc->task_entry = spdifo_task; 1630 1631 /* this one is faked, as the parnet of SPDIFO task 1632 is the FG task tree */ 1633 fg_entry->parent_scb_ptr = spdifo_scb_desc; 1634 1635 /* for proc fs */ 1636 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc); 1637 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc); 1638 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc); 1639 1640 /* Async MASTER ENABLE, affects both SPDIF input and output */ 1641 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 ); 1642 } 1643 1644 return 0; 1645 } 1646 1647 1648 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip) 1649 { 1650 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1651 1652 /* set SPDIF output FIFO slot */ 1653 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0); 1654 1655 /* SPDIF output MASTER ENABLE */ 1656 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0); 1657 1658 /* right and left validate bit */ 1659 /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/ 1660 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0); 1661 1662 /* clear fifo pointer */ 1663 cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0); 1664 1665 /* monitor state */ 1666 ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED; 1667 } 1668 1669 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip) 1670 { 1671 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1672 1673 /* if hw-ctrl already enabled, turn off to reset logic ... */ 1674 cs46xx_dsp_disable_spdif_hw (chip); 1675 udelay(50); 1676 1677 /* set SPDIF output FIFO slot */ 1678 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) )); 1679 1680 /* SPDIF output MASTER ENABLE */ 1681 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000); 1682 1683 /* right and left validate bit */ 1684 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default); 1685 1686 /* monitor state */ 1687 ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED; 1688 1689 return 0; 1690 } 1691 1692 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip) 1693 { 1694 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1695 1696 /* turn on amplifier */ 1697 chip->active_ctrl(chip, 1); 1698 chip->amplifier_ctrl(chip, 1); 1699 1700 snd_assert (ins->asynch_rx_scb == NULL,return -EINVAL); 1701 snd_assert (ins->spdif_in_src != NULL,return -EINVAL); 1702 1703 mutex_lock(&chip->spos_mutex); 1704 1705 if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) { 1706 /* time countdown enable */ 1707 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005); 1708 /* NOTE: 80000005 value is just magic. With all values 1709 that I've tested this one seem to give the best result. 1710 Got no explication why. (Benny) */ 1711 1712 /* SPDIF input MASTER ENABLE */ 1713 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff); 1714 1715 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED; 1716 } 1717 1718 /* create and start the asynchronous receiver SCB */ 1719 ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB", 1720 ASYNCRX_SCB_ADDR, 1721 SPDIFI_SCB_INST, 1722 SPDIFI_IP_OUTPUT_BUFFER1, 1723 ins->spdif_in_src, 1724 SCB_ON_PARENT_SUBLIST_SCB); 1725 1726 spin_lock_irq(&chip->reg_lock); 1727 1728 /* reset SPDIF input sample buffer pointer */ 1729 /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2, 1730 (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/ 1731 1732 /* reset FIFO ptr */ 1733 /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/ 1734 cs46xx_src_link(chip,ins->spdif_in_src); 1735 1736 /* unmute SRC volume */ 1737 cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff); 1738 1739 spin_unlock_irq(&chip->reg_lock); 1740 1741 /* set SPDIF input sample rate and unmute 1742 NOTE: only 48khz support for SPDIF input this time */ 1743 /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */ 1744 1745 /* monitor state */ 1746 ins->spdif_status_in = 1; 1747 mutex_unlock(&chip->spos_mutex); 1748 1749 return 0; 1750 } 1751 1752 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip) 1753 { 1754 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1755 1756 snd_assert (ins->asynch_rx_scb != NULL, return -EINVAL); 1757 snd_assert (ins->spdif_in_src != NULL,return -EINVAL); 1758 1759 mutex_lock(&chip->spos_mutex); 1760 1761 /* Remove the asynchronous receiver SCB */ 1762 cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb); 1763 ins->asynch_rx_scb = NULL; 1764 1765 cs46xx_src_unlink(chip,ins->spdif_in_src); 1766 1767 /* monitor state */ 1768 ins->spdif_status_in = 0; 1769 mutex_unlock(&chip->spos_mutex); 1770 1771 /* restore amplifier */ 1772 chip->active_ctrl(chip, -1); 1773 chip->amplifier_ctrl(chip, -1); 1774 1775 return 0; 1776 } 1777 1778 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip) 1779 { 1780 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1781 1782 snd_assert (ins->pcm_input == NULL,return -EINVAL); 1783 snd_assert (ins->ref_snoop_scb != NULL,return -EINVAL); 1784 1785 mutex_lock(&chip->spos_mutex); 1786 ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR, 1787 "PCMSerialInput_Wave"); 1788 mutex_unlock(&chip->spos_mutex); 1789 1790 return 0; 1791 } 1792 1793 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip) 1794 { 1795 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1796 1797 snd_assert (ins->pcm_input != NULL,return -EINVAL); 1798 1799 mutex_lock(&chip->spos_mutex); 1800 cs46xx_dsp_remove_scb (chip,ins->pcm_input); 1801 ins->pcm_input = NULL; 1802 mutex_unlock(&chip->spos_mutex); 1803 1804 return 0; 1805 } 1806 1807 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip) 1808 { 1809 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1810 1811 snd_assert (ins->adc_input == NULL,return -EINVAL); 1812 snd_assert (ins->codec_in_scb != NULL,return -EINVAL); 1813 1814 mutex_lock(&chip->spos_mutex); 1815 ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR, 1816 "PCMSerialInput_ADC"); 1817 mutex_unlock(&chip->spos_mutex); 1818 1819 return 0; 1820 } 1821 1822 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip) 1823 { 1824 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1825 1826 snd_assert (ins->adc_input != NULL,return -EINVAL); 1827 1828 mutex_lock(&chip->spos_mutex); 1829 cs46xx_dsp_remove_scb (chip,ins->adc_input); 1830 ins->adc_input = NULL; 1831 mutex_unlock(&chip->spos_mutex); 1832 1833 return 0; 1834 } 1835 1836 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data) 1837 { 1838 u32 temp; 1839 int i; 1840 1841 /* santiy check the parameters. (These numbers are not 100% correct. They are 1842 a rough guess from looking at the controller spec.) */ 1843 if (address < 0x8000 || address >= 0x9000) 1844 return -EINVAL; 1845 1846 /* initialize the SP_IO_WRITE SCB with the data. */ 1847 temp = ( address << 16 ) | ( address & 0x0000FFFF); /* offset 0 <-- address2 : address1 */ 1848 1849 snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR << 2), temp); 1850 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */ 1851 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */ 1852 1853 /* Poke this location to tell the task to start */ 1854 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10); 1855 1856 /* Verify that the task ran */ 1857 for (i=0; i<25; i++) { 1858 udelay(125); 1859 1860 temp = snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2)); 1861 if (temp == 0x00000000) 1862 break; 1863 } 1864 1865 if (i == 25) { 1866 snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n"); 1867 return -EBUSY; 1868 } 1869 1870 return 0; 1871 } 1872 1873 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right) 1874 { 1875 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1876 struct dsp_scb_descriptor * scb; 1877 1878 mutex_lock(&chip->spos_mutex); 1879 1880 /* main output */ 1881 scb = ins->master_mix_scb->sub_list_ptr; 1882 while (scb != ins->the_null_scb) { 1883 cs46xx_dsp_scb_set_volume (chip,scb,left,right); 1884 scb = scb->next_scb_ptr; 1885 } 1886 1887 /* rear output */ 1888 scb = ins->rear_mix_scb->sub_list_ptr; 1889 while (scb != ins->the_null_scb) { 1890 cs46xx_dsp_scb_set_volume (chip,scb,left,right); 1891 scb = scb->next_scb_ptr; 1892 } 1893 1894 ins->dac_volume_left = left; 1895 ins->dac_volume_right = right; 1896 1897 mutex_unlock(&chip->spos_mutex); 1898 1899 return 0; 1900 } 1901 1902 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right) 1903 { 1904 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1905 1906 mutex_lock(&chip->spos_mutex); 1907 1908 if (ins->asynch_rx_scb != NULL) 1909 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb, 1910 left,right); 1911 1912 ins->spdif_input_volume_left = left; 1913 ins->spdif_input_volume_right = right; 1914 1915 mutex_unlock(&chip->spos_mutex); 1916 1917 return 0; 1918 } 1919