1 /* 2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz> 3 * Universal interface for Audio Codec '97 4 * 5 * For more details look to AC '97 component specification revision 2.2 6 * by Intel Corporation (http://developer.intel.com) and to datasheets 7 * for specific codecs. 8 * 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25 26 #include <sound/driver.h> 27 #include <linux/delay.h> 28 #include <linux/init.h> 29 #include <linux/slab.h> 30 #include <linux/mutex.h> 31 32 #include <sound/core.h> 33 #include <sound/pcm.h> 34 #include <sound/control.h> 35 #include <sound/ac97_codec.h> 36 #include <sound/asoundef.h> 37 #include "ac97_patch.h" 38 #include "ac97_id.h" 39 #include "ac97_local.h" 40 41 /* 42 * PCM support 43 */ 44 45 static unsigned char rate_reg_tables[2][4][9] = { 46 { 47 /* standard rates */ 48 { 49 /* 3&4 front, 7&8 rear, 6&9 center/lfe */ 50 AC97_PCM_FRONT_DAC_RATE, /* slot 3 */ 51 AC97_PCM_FRONT_DAC_RATE, /* slot 4 */ 52 0xff, /* slot 5 */ 53 AC97_PCM_LFE_DAC_RATE, /* slot 6 */ 54 AC97_PCM_SURR_DAC_RATE, /* slot 7 */ 55 AC97_PCM_SURR_DAC_RATE, /* slot 8 */ 56 AC97_PCM_LFE_DAC_RATE, /* slot 9 */ 57 0xff, /* slot 10 */ 58 0xff, /* slot 11 */ 59 }, 60 { 61 /* 7&8 front, 6&9 rear, 10&11 center/lfe */ 62 0xff, /* slot 3 */ 63 0xff, /* slot 4 */ 64 0xff, /* slot 5 */ 65 AC97_PCM_SURR_DAC_RATE, /* slot 6 */ 66 AC97_PCM_FRONT_DAC_RATE, /* slot 7 */ 67 AC97_PCM_FRONT_DAC_RATE, /* slot 8 */ 68 AC97_PCM_SURR_DAC_RATE, /* slot 9 */ 69 AC97_PCM_LFE_DAC_RATE, /* slot 10 */ 70 AC97_PCM_LFE_DAC_RATE, /* slot 11 */ 71 }, 72 { 73 /* 6&9 front, 10&11 rear, 3&4 center/lfe */ 74 AC97_PCM_LFE_DAC_RATE, /* slot 3 */ 75 AC97_PCM_LFE_DAC_RATE, /* slot 4 */ 76 0xff, /* slot 5 */ 77 AC97_PCM_FRONT_DAC_RATE, /* slot 6 */ 78 0xff, /* slot 7 */ 79 0xff, /* slot 8 */ 80 AC97_PCM_FRONT_DAC_RATE, /* slot 9 */ 81 AC97_PCM_SURR_DAC_RATE, /* slot 10 */ 82 AC97_PCM_SURR_DAC_RATE, /* slot 11 */ 83 }, 84 { 85 /* 10&11 front, 3&4 rear, 7&8 center/lfe */ 86 AC97_PCM_SURR_DAC_RATE, /* slot 3 */ 87 AC97_PCM_SURR_DAC_RATE, /* slot 4 */ 88 0xff, /* slot 5 */ 89 0xff, /* slot 6 */ 90 AC97_PCM_LFE_DAC_RATE, /* slot 7 */ 91 AC97_PCM_LFE_DAC_RATE, /* slot 8 */ 92 0xff, /* slot 9 */ 93 AC97_PCM_FRONT_DAC_RATE, /* slot 10 */ 94 AC97_PCM_FRONT_DAC_RATE, /* slot 11 */ 95 }, 96 }, 97 { 98 /* double rates */ 99 { 100 /* 3&4 front, 7&8 front (t+1) */ 101 AC97_PCM_FRONT_DAC_RATE, /* slot 3 */ 102 AC97_PCM_FRONT_DAC_RATE, /* slot 4 */ 103 0xff, /* slot 5 */ 104 0xff, /* slot 6 */ 105 AC97_PCM_FRONT_DAC_RATE, /* slot 7 */ 106 AC97_PCM_FRONT_DAC_RATE, /* slot 8 */ 107 0xff, /* slot 9 */ 108 0xff, /* slot 10 */ 109 0xff, /* slot 11 */ 110 }, 111 { 112 /* not specified in the specification */ 113 0xff, /* slot 3 */ 114 0xff, /* slot 4 */ 115 0xff, /* slot 5 */ 116 0xff, /* slot 6 */ 117 0xff, /* slot 7 */ 118 0xff, /* slot 8 */ 119 0xff, /* slot 9 */ 120 0xff, /* slot 10 */ 121 0xff, /* slot 11 */ 122 }, 123 { 124 0xff, /* slot 3 */ 125 0xff, /* slot 4 */ 126 0xff, /* slot 5 */ 127 0xff, /* slot 6 */ 128 0xff, /* slot 7 */ 129 0xff, /* slot 8 */ 130 0xff, /* slot 9 */ 131 0xff, /* slot 10 */ 132 0xff, /* slot 11 */ 133 }, 134 { 135 0xff, /* slot 3 */ 136 0xff, /* slot 4 */ 137 0xff, /* slot 5 */ 138 0xff, /* slot 6 */ 139 0xff, /* slot 7 */ 140 0xff, /* slot 8 */ 141 0xff, /* slot 9 */ 142 0xff, /* slot 10 */ 143 0xff, /* slot 11 */ 144 } 145 }}; 146 147 /* FIXME: more various mappings for ADC? */ 148 static unsigned char rate_cregs[9] = { 149 AC97_PCM_LR_ADC_RATE, /* 3 */ 150 AC97_PCM_LR_ADC_RATE, /* 4 */ 151 0xff, /* 5 */ 152 AC97_PCM_MIC_ADC_RATE, /* 6 */ 153 0xff, /* 7 */ 154 0xff, /* 8 */ 155 0xff, /* 9 */ 156 0xff, /* 10 */ 157 0xff, /* 11 */ 158 }; 159 160 static unsigned char get_slot_reg(struct ac97_pcm *pcm, unsigned short cidx, 161 unsigned short slot, int dbl) 162 { 163 if (slot < 3) 164 return 0xff; 165 if (slot > 11) 166 return 0xff; 167 if (pcm->spdif) 168 return AC97_SPDIF; /* pseudo register */ 169 if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK) 170 return rate_reg_tables[dbl][pcm->r[dbl].rate_table[cidx]][slot - 3]; 171 else 172 return rate_cregs[slot - 3]; 173 } 174 175 static int set_spdif_rate(struct snd_ac97 *ac97, unsigned short rate) 176 { 177 unsigned short old, bits, reg, mask; 178 unsigned int sbits; 179 180 if (! (ac97->ext_id & AC97_EI_SPDIF)) 181 return -ENODEV; 182 183 /* TODO: double rate support */ 184 if (ac97->flags & AC97_CS_SPDIF) { 185 switch (rate) { 186 case 48000: bits = 0; break; 187 case 44100: bits = 1 << AC97_SC_SPSR_SHIFT; break; 188 default: /* invalid - disable output */ 189 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 190 return -EINVAL; 191 } 192 reg = AC97_CSR_SPDIF; 193 mask = 1 << AC97_SC_SPSR_SHIFT; 194 } else { 195 if (ac97->id == AC97_ID_CM9739 && rate != 48000) { 196 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 197 return -EINVAL; 198 } 199 switch (rate) { 200 case 44100: bits = AC97_SC_SPSR_44K; break; 201 case 48000: bits = AC97_SC_SPSR_48K; break; 202 case 32000: bits = AC97_SC_SPSR_32K; break; 203 default: /* invalid - disable output */ 204 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 205 return -EINVAL; 206 } 207 reg = AC97_SPDIF; 208 mask = AC97_SC_SPSR_MASK; 209 } 210 211 mutex_lock(&ac97->reg_mutex); 212 old = snd_ac97_read(ac97, reg) & mask; 213 if (old != bits) { 214 snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); 215 snd_ac97_update_bits_nolock(ac97, reg, mask, bits); 216 /* update the internal spdif bits */ 217 sbits = ac97->spdif_status; 218 if (sbits & IEC958_AES0_PROFESSIONAL) { 219 sbits &= ~IEC958_AES0_PRO_FS; 220 switch (rate) { 221 case 44100: sbits |= IEC958_AES0_PRO_FS_44100; break; 222 case 48000: sbits |= IEC958_AES0_PRO_FS_48000; break; 223 case 32000: sbits |= IEC958_AES0_PRO_FS_32000; break; 224 } 225 } else { 226 sbits &= ~(IEC958_AES3_CON_FS << 24); 227 switch (rate) { 228 case 44100: sbits |= IEC958_AES3_CON_FS_44100<<24; break; 229 case 48000: sbits |= IEC958_AES3_CON_FS_48000<<24; break; 230 case 32000: sbits |= IEC958_AES3_CON_FS_32000<<24; break; 231 } 232 } 233 ac97->spdif_status = sbits; 234 } 235 snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF); 236 mutex_unlock(&ac97->reg_mutex); 237 return 0; 238 } 239 240 /** 241 * snd_ac97_set_rate - change the rate of the given input/output. 242 * @ac97: the ac97 instance 243 * @reg: the register to change 244 * @rate: the sample rate to set 245 * 246 * Changes the rate of the given input/output on the codec. 247 * If the codec doesn't support VAR, the rate must be 48000 (except 248 * for SPDIF). 249 * 250 * The valid registers are AC97_PMC_MIC_ADC_RATE, 251 * AC97_PCM_FRONT_DAC_RATE, AC97_PCM_LR_ADC_RATE. 252 * AC97_PCM_SURR_DAC_RATE and AC97_PCM_LFE_DAC_RATE are accepted 253 * if the codec supports them. 254 * AC97_SPDIF is accepted as a pseudo register to modify the SPDIF 255 * status bits. 256 * 257 * Returns zero if successful, or a negative error code on failure. 258 */ 259 int snd_ac97_set_rate(struct snd_ac97 *ac97, int reg, unsigned int rate) 260 { 261 int dbl; 262 unsigned int tmp; 263 264 dbl = rate > 48000; 265 if (dbl) { 266 if (!(ac97->flags & AC97_DOUBLE_RATE)) 267 return -EINVAL; 268 if (reg != AC97_PCM_FRONT_DAC_RATE) 269 return -EINVAL; 270 } 271 272 switch (reg) { 273 case AC97_PCM_MIC_ADC_RATE: 274 if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRM) == 0) /* MIC VRA */ 275 if (rate != 48000) 276 return -EINVAL; 277 break; 278 case AC97_PCM_FRONT_DAC_RATE: 279 case AC97_PCM_LR_ADC_RATE: 280 if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRA) == 0) /* VRA */ 281 if (rate != 48000 && rate != 96000) 282 return -EINVAL; 283 break; 284 case AC97_PCM_SURR_DAC_RATE: 285 if (! (ac97->scaps & AC97_SCAP_SURROUND_DAC)) 286 return -EINVAL; 287 break; 288 case AC97_PCM_LFE_DAC_RATE: 289 if (! (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)) 290 return -EINVAL; 291 break; 292 case AC97_SPDIF: 293 /* special case */ 294 return set_spdif_rate(ac97, rate); 295 default: 296 return -EINVAL; 297 } 298 if (dbl) 299 rate /= 2; 300 tmp = (rate * ac97->bus->clock) / 48000; 301 if (tmp > 65535) 302 return -EINVAL; 303 if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) 304 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, 305 AC97_EA_DRA, dbl ? AC97_EA_DRA : 0); 306 snd_ac97_update(ac97, reg, tmp & 0xffff); 307 snd_ac97_read(ac97, reg); 308 if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) { 309 /* Intel controllers require double rate data to be put in 310 * slots 7+8 311 */ 312 snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, 313 AC97_GP_DRSS_MASK, 314 dbl ? AC97_GP_DRSS_78 : 0); 315 snd_ac97_read(ac97, AC97_GENERAL_PURPOSE); 316 } 317 return 0; 318 } 319 320 EXPORT_SYMBOL(snd_ac97_set_rate); 321 322 static unsigned short get_pslots(struct snd_ac97 *ac97, unsigned char *rate_table, unsigned short *spdif_slots) 323 { 324 if (!ac97_is_audio(ac97)) 325 return 0; 326 if (ac97_is_rev22(ac97) || ac97_can_amap(ac97)) { 327 unsigned short slots = 0; 328 if (ac97_is_rev22(ac97)) { 329 /* Note: it's simply emulation of AMAP behaviour */ 330 u16 es; 331 es = ac97->regs[AC97_EXTENDED_ID] &= ~AC97_EI_DACS_SLOT_MASK; 332 switch (ac97->addr) { 333 case 1: 334 case 2: es |= (1<<AC97_EI_DACS_SLOT_SHIFT); break; 335 case 3: es |= (2<<AC97_EI_DACS_SLOT_SHIFT); break; 336 } 337 snd_ac97_write_cache(ac97, AC97_EXTENDED_ID, es); 338 } 339 switch (ac97->addr) { 340 case 0: 341 slots |= (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT); 342 if (ac97->scaps & AC97_SCAP_SURROUND_DAC) 343 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT); 344 if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC) 345 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 346 if (ac97->ext_id & AC97_EI_SPDIF) { 347 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC)) 348 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT); 349 else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)) 350 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1); 351 else 352 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 353 } 354 *rate_table = 0; 355 break; 356 case 1: 357 case 2: 358 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT); 359 if (ac97->scaps & AC97_SCAP_SURROUND_DAC) 360 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 361 if (ac97->ext_id & AC97_EI_SPDIF) { 362 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC)) 363 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1); 364 else 365 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 366 } 367 *rate_table = 1; 368 break; 369 case 3: 370 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 371 if (ac97->ext_id & AC97_EI_SPDIF) 372 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 373 *rate_table = 2; 374 break; 375 } 376 return slots; 377 } else { 378 unsigned short slots; 379 slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT); 380 if (ac97->scaps & AC97_SCAP_SURROUND_DAC) 381 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT); 382 if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC) 383 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE); 384 if (ac97->ext_id & AC97_EI_SPDIF) { 385 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC)) 386 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT); 387 else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)) 388 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1); 389 else 390 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2); 391 } 392 *rate_table = 0; 393 return slots; 394 } 395 } 396 397 static unsigned short get_cslots(struct snd_ac97 *ac97) 398 { 399 unsigned short slots; 400 401 if (!ac97_is_audio(ac97)) 402 return 0; 403 slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT); 404 slots |= (1<<AC97_SLOT_MIC); 405 return slots; 406 } 407 408 static unsigned int get_rates(struct ac97_pcm *pcm, unsigned int cidx, unsigned short slots, int dbl) 409 { 410 int i, idx; 411 unsigned int rates = ~0; 412 unsigned char reg; 413 414 for (i = 3; i < 12; i++) { 415 if (!(slots & (1 << i))) 416 continue; 417 reg = get_slot_reg(pcm, cidx, i, dbl); 418 switch (reg) { 419 case AC97_PCM_FRONT_DAC_RATE: idx = AC97_RATES_FRONT_DAC; break; 420 case AC97_PCM_SURR_DAC_RATE: idx = AC97_RATES_SURR_DAC; break; 421 case AC97_PCM_LFE_DAC_RATE: idx = AC97_RATES_LFE_DAC; break; 422 case AC97_PCM_LR_ADC_RATE: idx = AC97_RATES_ADC; break; 423 case AC97_PCM_MIC_ADC_RATE: idx = AC97_RATES_MIC_ADC; break; 424 default: idx = AC97_RATES_SPDIF; break; 425 } 426 rates &= pcm->r[dbl].codec[cidx]->rates[idx]; 427 } 428 if (!dbl) 429 rates &= ~(SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | 430 SNDRV_PCM_RATE_96000); 431 return rates; 432 } 433 434 /** 435 * snd_ac97_pcm_assign - assign AC97 slots to given PCM streams 436 * @bus: the ac97 bus instance 437 * @pcms_count: count of PCMs to be assigned 438 * @pcms: PCMs to be assigned 439 * 440 * It assigns available AC97 slots for given PCMs. If none or only 441 * some slots are available, pcm->xxx.slots and pcm->xxx.rslots[] members 442 * are reduced and might be zero. 443 */ 444 int snd_ac97_pcm_assign(struct snd_ac97_bus *bus, 445 unsigned short pcms_count, 446 const struct ac97_pcm *pcms) 447 { 448 int i, j, k; 449 const struct ac97_pcm *pcm; 450 struct ac97_pcm *rpcms, *rpcm; 451 unsigned short avail_slots[2][4]; 452 unsigned char rate_table[2][4]; 453 unsigned short tmp, slots; 454 unsigned short spdif_slots[4]; 455 unsigned int rates; 456 struct snd_ac97 *codec; 457 458 rpcms = kcalloc(pcms_count, sizeof(struct ac97_pcm), GFP_KERNEL); 459 if (rpcms == NULL) 460 return -ENOMEM; 461 memset(avail_slots, 0, sizeof(avail_slots)); 462 memset(rate_table, 0, sizeof(rate_table)); 463 memset(spdif_slots, 0, sizeof(spdif_slots)); 464 for (i = 0; i < 4; i++) { 465 codec = bus->codec[i]; 466 if (!codec) 467 continue; 468 avail_slots[0][i] = get_pslots(codec, &rate_table[0][i], &spdif_slots[i]); 469 avail_slots[1][i] = get_cslots(codec); 470 if (!(codec->scaps & AC97_SCAP_INDEP_SDIN)) { 471 for (j = 0; j < i; j++) { 472 if (bus->codec[j]) 473 avail_slots[1][i] &= ~avail_slots[1][j]; 474 } 475 } 476 } 477 /* first step - exclusive devices */ 478 for (i = 0; i < pcms_count; i++) { 479 pcm = &pcms[i]; 480 rpcm = &rpcms[i]; 481 /* low-level driver thinks that it's more clever */ 482 if (pcm->copy_flag) { 483 *rpcm = *pcm; 484 continue; 485 } 486 rpcm->stream = pcm->stream; 487 rpcm->exclusive = pcm->exclusive; 488 rpcm->spdif = pcm->spdif; 489 rpcm->private_value = pcm->private_value; 490 rpcm->bus = bus; 491 rpcm->rates = ~0; 492 slots = pcm->r[0].slots; 493 for (j = 0; j < 4 && slots; j++) { 494 if (!bus->codec[j]) 495 continue; 496 rates = ~0; 497 if (pcm->spdif && pcm->stream == 0) 498 tmp = spdif_slots[j]; 499 else 500 tmp = avail_slots[pcm->stream][j]; 501 if (pcm->exclusive) { 502 /* exclusive access */ 503 tmp &= slots; 504 for (k = 0; k < i; k++) { 505 if (rpcm->stream == rpcms[k].stream) 506 tmp &= ~rpcms[k].r[0].rslots[j]; 507 } 508 } else { 509 /* non-exclusive access */ 510 tmp &= pcm->r[0].slots; 511 } 512 if (tmp) { 513 rpcm->r[0].rslots[j] = tmp; 514 rpcm->r[0].codec[j] = bus->codec[j]; 515 rpcm->r[0].rate_table[j] = rate_table[pcm->stream][j]; 516 if (bus->no_vra) 517 rates = SNDRV_PCM_RATE_48000; 518 else 519 rates = get_rates(rpcm, j, tmp, 0); 520 if (pcm->exclusive) 521 avail_slots[pcm->stream][j] &= ~tmp; 522 } 523 slots &= ~tmp; 524 rpcm->r[0].slots |= tmp; 525 rpcm->rates &= rates; 526 } 527 /* for double rate, we check the first codec only */ 528 if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK && 529 bus->codec[0] && (bus->codec[0]->flags & AC97_DOUBLE_RATE) && 530 rate_table[pcm->stream][0] == 0) { 531 tmp = (1<<AC97_SLOT_PCM_LEFT) | (1<<AC97_SLOT_PCM_RIGHT) | 532 (1<<AC97_SLOT_PCM_LEFT_0) | (1<<AC97_SLOT_PCM_RIGHT_0); 533 if ((tmp & pcm->r[1].slots) == tmp) { 534 rpcm->r[1].slots = tmp; 535 rpcm->r[1].rslots[0] = tmp; 536 rpcm->r[1].rate_table[0] = 0; 537 rpcm->r[1].codec[0] = bus->codec[0]; 538 if (pcm->exclusive) 539 avail_slots[pcm->stream][0] &= ~tmp; 540 if (bus->no_vra) 541 rates = SNDRV_PCM_RATE_96000; 542 else 543 rates = get_rates(rpcm, 0, tmp, 1); 544 rpcm->rates |= rates; 545 } 546 } 547 if (rpcm->rates == ~0) 548 rpcm->rates = 0; /* not used */ 549 } 550 bus->pcms_count = pcms_count; 551 bus->pcms = rpcms; 552 return 0; 553 } 554 555 EXPORT_SYMBOL(snd_ac97_pcm_assign); 556 557 /** 558 * snd_ac97_pcm_open - opens the given AC97 pcm 559 * @pcm: the ac97 pcm instance 560 * @rate: rate in Hz, if codec does not support VRA, this value must be 48000Hz 561 * @cfg: output stream characteristics 562 * @slots: a subset of allocated slots (snd_ac97_pcm_assign) for this pcm 563 * 564 * It locks the specified slots and sets the given rate to AC97 registers. 565 */ 566 int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate, 567 enum ac97_pcm_cfg cfg, unsigned short slots) 568 { 569 struct snd_ac97_bus *bus; 570 int i, cidx, r, ok_flag; 571 unsigned int reg_ok[4] = {0,0,0,0}; 572 unsigned char reg; 573 int err = 0; 574 575 r = rate > 48000; 576 bus = pcm->bus; 577 if (cfg == AC97_PCM_CFG_SPDIF) { 578 int err; 579 for (cidx = 0; cidx < 4; cidx++) 580 if (bus->codec[cidx] && (bus->codec[cidx]->ext_id & AC97_EI_SPDIF)) { 581 err = set_spdif_rate(bus->codec[cidx], rate); 582 if (err < 0) 583 return err; 584 } 585 } 586 spin_lock_irq(&pcm->bus->bus_lock); 587 for (i = 3; i < 12; i++) { 588 if (!(slots & (1 << i))) 589 continue; 590 ok_flag = 0; 591 for (cidx = 0; cidx < 4; cidx++) { 592 if (bus->used_slots[pcm->stream][cidx] & (1 << i)) { 593 spin_unlock_irq(&pcm->bus->bus_lock); 594 err = -EBUSY; 595 goto error; 596 } 597 if (pcm->r[r].rslots[cidx] & (1 << i)) { 598 bus->used_slots[pcm->stream][cidx] |= (1 << i); 599 ok_flag++; 600 } 601 } 602 if (!ok_flag) { 603 spin_unlock_irq(&pcm->bus->bus_lock); 604 snd_printk(KERN_ERR "cannot find configuration for AC97 slot %i\n", i); 605 err = -EAGAIN; 606 goto error; 607 } 608 } 609 spin_unlock_irq(&pcm->bus->bus_lock); 610 for (i = 3; i < 12; i++) { 611 if (!(slots & (1 << i))) 612 continue; 613 for (cidx = 0; cidx < 4; cidx++) { 614 if (pcm->r[r].rslots[cidx] & (1 << i)) { 615 reg = get_slot_reg(pcm, cidx, i, r); 616 if (reg == 0xff) { 617 snd_printk(KERN_ERR "invalid AC97 slot %i?\n", i); 618 continue; 619 } 620 if (reg_ok[cidx] & (1 << (reg - AC97_PCM_FRONT_DAC_RATE))) 621 continue; 622 //printk(KERN_DEBUG "setting ac97 reg 0x%x to rate %d\n", reg, rate); 623 err = snd_ac97_set_rate(pcm->r[r].codec[cidx], reg, rate); 624 if (err < 0) 625 snd_printk(KERN_ERR "error in snd_ac97_set_rate: cidx=%d, reg=0x%x, rate=%d, err=%d\n", cidx, reg, rate, err); 626 else 627 reg_ok[cidx] |= (1 << (reg - AC97_PCM_FRONT_DAC_RATE)); 628 } 629 } 630 } 631 pcm->aslots = slots; 632 return 0; 633 634 error: 635 pcm->aslots = slots; 636 snd_ac97_pcm_close(pcm); 637 return err; 638 } 639 640 EXPORT_SYMBOL(snd_ac97_pcm_open); 641 642 /** 643 * snd_ac97_pcm_close - closes the given AC97 pcm 644 * @pcm: the ac97 pcm instance 645 * 646 * It frees the locked AC97 slots. 647 */ 648 int snd_ac97_pcm_close(struct ac97_pcm *pcm) 649 { 650 struct snd_ac97_bus *bus; 651 unsigned short slots = pcm->aslots; 652 int i, cidx; 653 654 bus = pcm->bus; 655 spin_lock_irq(&pcm->bus->bus_lock); 656 for (i = 3; i < 12; i++) { 657 if (!(slots & (1 << i))) 658 continue; 659 for (cidx = 0; cidx < 4; cidx++) 660 bus->used_slots[pcm->stream][cidx] &= ~(1 << i); 661 } 662 pcm->aslots = 0; 663 spin_unlock_irq(&pcm->bus->bus_lock); 664 return 0; 665 } 666 667 EXPORT_SYMBOL(snd_ac97_pcm_close); 668 669 static int double_rate_hw_constraint_rate(struct snd_pcm_hw_params *params, 670 struct snd_pcm_hw_rule *rule) 671 { 672 struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 673 if (channels->min > 2) { 674 static const struct snd_interval single_rates = { 675 .min = 1, 676 .max = 48000, 677 }; 678 struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 679 return snd_interval_refine(rate, &single_rates); 680 } 681 return 0; 682 } 683 684 static int double_rate_hw_constraint_channels(struct snd_pcm_hw_params *params, 685 struct snd_pcm_hw_rule *rule) 686 { 687 struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); 688 if (rate->min > 48000) { 689 static const struct snd_interval double_rate_channels = { 690 .min = 2, 691 .max = 2, 692 }; 693 struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); 694 return snd_interval_refine(channels, &double_rate_channels); 695 } 696 return 0; 697 } 698 699 /** 700 * snd_ac97_pcm_double_rate_rules - set double rate constraints 701 * @runtime: the runtime of the ac97 front playback pcm 702 * 703 * Installs the hardware constraint rules to prevent using double rates and 704 * more than two channels at the same time. 705 */ 706 int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime) 707 { 708 int err; 709 710 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 711 double_rate_hw_constraint_rate, NULL, 712 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 713 if (err < 0) 714 return err; 715 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 716 double_rate_hw_constraint_channels, NULL, 717 SNDRV_PCM_HW_PARAM_RATE, -1); 718 return err; 719 } 720 721 EXPORT_SYMBOL(snd_ac97_pcm_double_rate_rules); 722