xref: /linux/scripts/dtc/include-prefixes/arm/ti/keystone/keystone-k2l-evm.dts (revision 79790b6818e96c58fe2bffee1b418c16e64e7b80)
1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2724ba675SRob Herring/*
3724ba675SRob Herring * Keystone 2 Lamarr EVM device tree
4724ba675SRob Herring *
5*11621bedSNishanth Menon * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/
6724ba675SRob Herring */
7724ba675SRob Herring/dts-v1/;
8724ba675SRob Herring
9724ba675SRob Herring#include "keystone.dtsi"
10724ba675SRob Herring#include "keystone-k2l.dtsi"
11724ba675SRob Herring
12724ba675SRob Herring/ {
13724ba675SRob Herring	compatible = "ti,k2l-evm", "ti,k2l", "ti,keystone";
14724ba675SRob Herring	model = "Texas Instruments Keystone 2 Lamarr EVM";
15724ba675SRob Herring
16724ba675SRob Herring	reserved-memory {
17724ba675SRob Herring		#address-cells = <2>;
18724ba675SRob Herring		#size-cells = <2>;
19724ba675SRob Herring		ranges;
20724ba675SRob Herring
21724ba675SRob Herring		dsp_common_memory: dsp-common-memory@81f800000 {
22724ba675SRob Herring			compatible = "shared-dma-pool";
23724ba675SRob Herring			reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
24724ba675SRob Herring			reusable;
25724ba675SRob Herring			status = "okay";
26724ba675SRob Herring		};
27724ba675SRob Herring	};
28724ba675SRob Herring};
29724ba675SRob Herring
30724ba675SRob Herring&soc0 {
31724ba675SRob Herring		clocks {
32724ba675SRob Herring			refclksys: refclksys {
33724ba675SRob Herring				#clock-cells = <0>;
34724ba675SRob Herring				compatible = "fixed-clock";
35724ba675SRob Herring				clock-frequency = <122880000>;
36724ba675SRob Herring				clock-output-names = "refclk-sys";
37724ba675SRob Herring			};
38724ba675SRob Herring		};
39724ba675SRob Herring};
40724ba675SRob Herring
41724ba675SRob Herring&usb_phy {
42724ba675SRob Herring	status = "okay";
43724ba675SRob Herring};
44724ba675SRob Herring
45724ba675SRob Herring&keystone_usb0 {
46724ba675SRob Herring	status = "okay";
47724ba675SRob Herring};
48724ba675SRob Herring
49724ba675SRob Herring&usb0 {
50724ba675SRob Herring	dr_mode = "host";
51724ba675SRob Herring};
52724ba675SRob Herring
53724ba675SRob Herring&i2c0 {
54724ba675SRob Herring	eeprom@50 {
55724ba675SRob Herring		compatible = "atmel,24c1024";
56724ba675SRob Herring		reg = <0x50>;
57724ba675SRob Herring	};
58724ba675SRob Herring};
59724ba675SRob Herring
60724ba675SRob Herring&aemif {
61724ba675SRob Herring	cs0 {
62724ba675SRob Herring		#address-cells = <2>;
63724ba675SRob Herring		#size-cells = <1>;
64724ba675SRob Herring		clock-ranges;
65724ba675SRob Herring		ranges;
66724ba675SRob Herring
67724ba675SRob Herring		ti,cs-chipselect = <0>;
68724ba675SRob Herring		/* all timings in nanoseconds */
69724ba675SRob Herring		ti,cs-min-turnaround-ns = <12>;
70724ba675SRob Herring		ti,cs-read-hold-ns = <6>;
71724ba675SRob Herring		ti,cs-read-strobe-ns = <23>;
72724ba675SRob Herring		ti,cs-read-setup-ns = <9>;
73724ba675SRob Herring		ti,cs-write-hold-ns = <8>;
74724ba675SRob Herring		ti,cs-write-strobe-ns = <23>;
75724ba675SRob Herring		ti,cs-write-setup-ns = <8>;
76724ba675SRob Herring
77724ba675SRob Herring		nand@0,0 {
78724ba675SRob Herring			compatible = "ti,keystone-nand","ti,davinci-nand";
79724ba675SRob Herring			#address-cells = <1>;
80724ba675SRob Herring			#size-cells = <1>;
81724ba675SRob Herring			reg = <0 0 0x4000000
82724ba675SRob Herring			       1 0 0x0000100>;
83724ba675SRob Herring
84724ba675SRob Herring			ti,davinci-chipselect = <0>;
85724ba675SRob Herring			ti,davinci-mask-ale = <0x2000>;
86724ba675SRob Herring			ti,davinci-mask-cle = <0x4000>;
87724ba675SRob Herring			ti,davinci-mask-chipsel = <0>;
88724ba675SRob Herring			nand-ecc-mode = "hw";
89724ba675SRob Herring			ti,davinci-ecc-bits = <4>;
90724ba675SRob Herring			nand-on-flash-bbt;
91724ba675SRob Herring
92724ba675SRob Herring			partition@0 {
93724ba675SRob Herring				label = "u-boot";
94724ba675SRob Herring				reg = <0x0 0x100000>;
95724ba675SRob Herring				read-only;
96724ba675SRob Herring			};
97724ba675SRob Herring
98724ba675SRob Herring			partition@100000 {
99724ba675SRob Herring				label = "params";
100724ba675SRob Herring				reg = <0x100000 0x80000>;
101724ba675SRob Herring				read-only;
102724ba675SRob Herring			};
103724ba675SRob Herring
104724ba675SRob Herring			partition@180000 {
105724ba675SRob Herring				label = "ubifs";
106724ba675SRob Herring				reg = <0x180000 0x7fe80000>;
107724ba675SRob Herring			};
108724ba675SRob Herring		};
109724ba675SRob Herring	};
110724ba675SRob Herring};
111724ba675SRob Herring
112724ba675SRob Herring&spi0 {
113724ba675SRob Herring	nor_flash: flash@0 {
114724ba675SRob Herring		#address-cells = <1>;
115724ba675SRob Herring		#size-cells = <1>;
116724ba675SRob Herring		compatible = "micron,n25q128a11", "jedec,spi-nor";
117724ba675SRob Herring		spi-max-frequency = <54000000>;
118724ba675SRob Herring		m25p,fast-read;
119724ba675SRob Herring		reg = <0>;
120724ba675SRob Herring
121724ba675SRob Herring		partition@0 {
122724ba675SRob Herring			label = "u-boot-spl";
123724ba675SRob Herring			reg = <0x0 0x80000>;
124724ba675SRob Herring			read-only;
125724ba675SRob Herring		};
126724ba675SRob Herring
127724ba675SRob Herring		partition@1 {
128724ba675SRob Herring			label = "misc";
129724ba675SRob Herring			reg = <0x80000 0xf80000>;
130724ba675SRob Herring		};
131724ba675SRob Herring	};
132724ba675SRob Herring};
133724ba675SRob Herring
134724ba675SRob Herring&mdio {
135724ba675SRob Herring	status = "okay";
136724ba675SRob Herring	ethphy0: ethernet-phy@0 {
137724ba675SRob Herring		compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
138724ba675SRob Herring		reg = <0>;
139724ba675SRob Herring	};
140724ba675SRob Herring
141724ba675SRob Herring	ethphy1: ethernet-phy@1 {
142724ba675SRob Herring		compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
143724ba675SRob Herring		reg = <1>;
144724ba675SRob Herring	};
145724ba675SRob Herring};
146724ba675SRob Herring
147724ba675SRob Herring&dsp0 {
148724ba675SRob Herring	memory-region = <&dsp_common_memory>;
149724ba675SRob Herring	status = "okay";
150724ba675SRob Herring};
151724ba675SRob Herring
152724ba675SRob Herring&dsp1 {
153724ba675SRob Herring	memory-region = <&dsp_common_memory>;
154724ba675SRob Herring	status = "okay";
155724ba675SRob Herring};
156724ba675SRob Herring
157724ba675SRob Herring&dsp2 {
158724ba675SRob Herring	memory-region = <&dsp_common_memory>;
159724ba675SRob Herring	status = "okay";
160724ba675SRob Herring};
161724ba675SRob Herring
162724ba675SRob Herring&dsp3 {
163724ba675SRob Herring	memory-region = <&dsp_common_memory>;
164724ba675SRob Herring	status = "okay";
165724ba675SRob Herring};
166