xref: /linux/scripts/dtc/include-prefixes/arm/ti/keystone/keystone-clocks.dtsi (revision 79790b6818e96c58fe2bffee1b418c16e64e7b80)
1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2724ba675SRob Herring/*
3724ba675SRob Herring * Device Tree Source for Keystone 2 clock tree
4724ba675SRob Herring *
5*11621bedSNishanth Menon * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/
6724ba675SRob Herring */
7724ba675SRob Herring
8724ba675SRob Herringclocks {
9724ba675SRob Herring	#address-cells = <1>;
10724ba675SRob Herring	#size-cells = <1>;
11724ba675SRob Herring	ranges;
12724ba675SRob Herring
13724ba675SRob Herring	mainmuxclk: mainmuxclk@2310108 {
14724ba675SRob Herring		#clock-cells = <0>;
15724ba675SRob Herring		compatible = "ti,keystone,pll-mux-clock";
16724ba675SRob Herring		clocks = <&mainpllclk>, <&refclksys>;
17724ba675SRob Herring		reg = <0x02310108 4>;
18724ba675SRob Herring		bit-shift = <23>;
19724ba675SRob Herring		bit-mask = <1>;
20724ba675SRob Herring		clock-output-names = "mainmuxclk";
21724ba675SRob Herring	};
22724ba675SRob Herring
23724ba675SRob Herring	chipclk1: chipclk1 {
24724ba675SRob Herring		#clock-cells = <0>;
25724ba675SRob Herring		compatible = "fixed-factor-clock";
26724ba675SRob Herring		clocks = <&mainmuxclk>;
27724ba675SRob Herring		clock-div = <1>;
28724ba675SRob Herring		clock-mult = <1>;
29724ba675SRob Herring		clock-output-names = "chipclk1";
30724ba675SRob Herring	};
31724ba675SRob Herring
32724ba675SRob Herring	chipclk1rstiso: chipclk1rstiso {
33724ba675SRob Herring		#clock-cells = <0>;
34724ba675SRob Herring		compatible = "fixed-factor-clock";
35724ba675SRob Herring		clocks = <&mainmuxclk>;
36724ba675SRob Herring		clock-div = <1>;
37724ba675SRob Herring		clock-mult = <1>;
38724ba675SRob Herring		clock-output-names = "chipclk1rstiso";
39724ba675SRob Herring	};
40724ba675SRob Herring
41724ba675SRob Herring	gemtraceclk: gemtraceclk@2310120 {
42724ba675SRob Herring		#clock-cells = <0>;
43724ba675SRob Herring		compatible = "ti,keystone,pll-divider-clock";
44724ba675SRob Herring		clocks = <&mainmuxclk>;
45724ba675SRob Herring		reg = <0x02310120 4>;
46724ba675SRob Herring		bit-shift = <0>;
47724ba675SRob Herring		bit-mask = <8>;
48724ba675SRob Herring		clock-output-names = "gemtraceclk";
49724ba675SRob Herring	};
50724ba675SRob Herring
51724ba675SRob Herring	chipstmxptclk: chipstmxptclk@2310164 {
52724ba675SRob Herring		#clock-cells = <0>;
53724ba675SRob Herring		compatible = "ti,keystone,pll-divider-clock";
54724ba675SRob Herring		clocks = <&mainmuxclk>;
55724ba675SRob Herring		reg = <0x02310164 4>;
56724ba675SRob Herring		bit-shift = <0>;
57724ba675SRob Herring		bit-mask = <8>;
58724ba675SRob Herring		clock-output-names = "chipstmxptclk";
59724ba675SRob Herring	};
60724ba675SRob Herring
61724ba675SRob Herring	chipclk12: chipclk12 {
62724ba675SRob Herring		#clock-cells = <0>;
63724ba675SRob Herring		compatible = "fixed-factor-clock";
64724ba675SRob Herring		clocks = <&chipclk1>;
65724ba675SRob Herring		clock-div = <2>;
66724ba675SRob Herring		clock-mult = <1>;
67724ba675SRob Herring		clock-output-names = "chipclk12";
68724ba675SRob Herring	};
69724ba675SRob Herring
70724ba675SRob Herring	chipclk13: chipclk13 {
71724ba675SRob Herring		#clock-cells = <0>;
72724ba675SRob Herring		compatible = "fixed-factor-clock";
73724ba675SRob Herring		clocks = <&chipclk1>;
74724ba675SRob Herring		clock-div = <3>;
75724ba675SRob Herring		clock-mult = <1>;
76724ba675SRob Herring		clock-output-names = "chipclk13";
77724ba675SRob Herring	};
78724ba675SRob Herring
79724ba675SRob Herring	paclk13: paclk13 {
80724ba675SRob Herring		#clock-cells = <0>;
81724ba675SRob Herring		compatible = "fixed-factor-clock";
82724ba675SRob Herring		clocks = <&papllclk>;
83724ba675SRob Herring		clock-div = <3>;
84724ba675SRob Herring		clock-mult = <1>;
85724ba675SRob Herring		clock-output-names = "paclk13";
86724ba675SRob Herring	};
87724ba675SRob Herring
88724ba675SRob Herring	chipclk14: chipclk14 {
89724ba675SRob Herring		#clock-cells = <0>;
90724ba675SRob Herring		compatible = "fixed-factor-clock";
91724ba675SRob Herring		clocks = <&chipclk1>;
92724ba675SRob Herring		clock-div = <4>;
93724ba675SRob Herring		clock-mult = <1>;
94724ba675SRob Herring		clock-output-names = "chipclk14";
95724ba675SRob Herring	};
96724ba675SRob Herring
97724ba675SRob Herring	chipclk16: chipclk16 {
98724ba675SRob Herring		#clock-cells = <0>;
99724ba675SRob Herring		compatible = "fixed-factor-clock";
100724ba675SRob Herring		clocks = <&chipclk1>;
101724ba675SRob Herring		clock-div = <6>;
102724ba675SRob Herring		clock-mult = <1>;
103724ba675SRob Herring		clock-output-names = "chipclk16";
104724ba675SRob Herring	};
105724ba675SRob Herring
106724ba675SRob Herring	chipclk112: chipclk112 {
107724ba675SRob Herring		#clock-cells = <0>;
108724ba675SRob Herring		compatible = "fixed-factor-clock";
109724ba675SRob Herring		clocks = <&chipclk1>;
110724ba675SRob Herring		clock-div = <12>;
111724ba675SRob Herring		clock-mult = <1>;
112724ba675SRob Herring		clock-output-names = "chipclk112";
113724ba675SRob Herring	};
114724ba675SRob Herring
115724ba675SRob Herring	chipclk124: chipclk124 {
116724ba675SRob Herring		#clock-cells = <0>;
117724ba675SRob Herring		compatible = "fixed-factor-clock";
118724ba675SRob Herring		clocks = <&chipclk1>;
119724ba675SRob Herring		clock-div = <24>;
120724ba675SRob Herring		clock-mult = <1>;
121724ba675SRob Herring		clock-output-names = "chipclk114";
122724ba675SRob Herring	};
123724ba675SRob Herring
124724ba675SRob Herring	chipclk1rstiso13: chipclk1rstiso13 {
125724ba675SRob Herring		#clock-cells = <0>;
126724ba675SRob Herring		compatible = "fixed-factor-clock";
127724ba675SRob Herring		clocks = <&chipclk1rstiso>;
128724ba675SRob Herring		clock-div = <3>;
129724ba675SRob Herring		clock-mult = <1>;
130724ba675SRob Herring		clock-output-names = "chipclk1rstiso13";
131724ba675SRob Herring	};
132724ba675SRob Herring
133724ba675SRob Herring	chipclk1rstiso14: chipclk1rstiso14 {
134724ba675SRob Herring		#clock-cells = <0>;
135724ba675SRob Herring		compatible = "fixed-factor-clock";
136724ba675SRob Herring		clocks = <&chipclk1rstiso>;
137724ba675SRob Herring		clock-div = <4>;
138724ba675SRob Herring		clock-mult = <1>;
139724ba675SRob Herring		clock-output-names = "chipclk1rstiso14";
140724ba675SRob Herring	};
141724ba675SRob Herring
142724ba675SRob Herring	chipclk1rstiso16: chipclk1rstiso16 {
143724ba675SRob Herring		#clock-cells = <0>;
144724ba675SRob Herring		compatible = "fixed-factor-clock";
145724ba675SRob Herring		clocks = <&chipclk1rstiso>;
146724ba675SRob Herring		clock-div = <6>;
147724ba675SRob Herring		clock-mult = <1>;
148724ba675SRob Herring		clock-output-names = "chipclk1rstiso16";
149724ba675SRob Herring	};
150724ba675SRob Herring
151724ba675SRob Herring	chipclk1rstiso112: chipclk1rstiso112 {
152724ba675SRob Herring		#clock-cells = <0>;
153724ba675SRob Herring		compatible = "fixed-factor-clock";
154724ba675SRob Herring		clocks = <&chipclk1rstiso>;
155724ba675SRob Herring		clock-div = <12>;
156724ba675SRob Herring		clock-mult = <1>;
157724ba675SRob Herring		clock-output-names = "chipclk1rstiso112";
158724ba675SRob Herring	};
159724ba675SRob Herring
160724ba675SRob Herring	clkmodrst0: clkmodrst0@2350000 {
161724ba675SRob Herring		#clock-cells = <0>;
162724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
163724ba675SRob Herring		clocks = <&chipclk16>;
164724ba675SRob Herring		clock-output-names = "modrst0";
165724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
166724ba675SRob Herring		reg-names = "control", "domain";
167724ba675SRob Herring		domain-id = <0>;
168724ba675SRob Herring	};
169724ba675SRob Herring
170724ba675SRob Herring
171724ba675SRob Herring	clkusb: clkusb@2350008 {
172724ba675SRob Herring		#clock-cells = <0>;
173724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
174724ba675SRob Herring		clocks = <&chipclk16>;
175724ba675SRob Herring		clock-output-names = "usb";
176724ba675SRob Herring		reg = <0x02350008 0xb00>, <0x02350000 0x400>;
177724ba675SRob Herring		reg-names = "control", "domain";
178724ba675SRob Herring		domain-id = <0>;
179724ba675SRob Herring	};
180724ba675SRob Herring
181724ba675SRob Herring	clkaemifspi: clkaemifspi@235000c {
182724ba675SRob Herring		#clock-cells = <0>;
183724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
184724ba675SRob Herring		clocks = <&chipclk16>;
185724ba675SRob Herring		clock-output-names = "aemif-spi";
186724ba675SRob Herring		reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
187724ba675SRob Herring		reg-names = "control", "domain";
188724ba675SRob Herring		domain-id = <0>;
189724ba675SRob Herring	};
190724ba675SRob Herring
191724ba675SRob Herring
192724ba675SRob Herring	clkdebugsstrc: clkdebugsstrc@2350014 {
193724ba675SRob Herring		#clock-cells = <0>;
194724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
195724ba675SRob Herring		clocks = <&chipclk13>;
196724ba675SRob Herring		clock-output-names = "debugss-trc";
197724ba675SRob Herring		reg = <0x02350014 0xb00>, <0x02350000 0x400>;
198724ba675SRob Herring		reg-names = "control", "domain";
199724ba675SRob Herring		domain-id = <1>;
200724ba675SRob Herring	};
201724ba675SRob Herring
202724ba675SRob Herring	clktetbtrc: clktetbtrc@2350018 {
203724ba675SRob Herring		#clock-cells = <0>;
204724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
205724ba675SRob Herring		clocks = <&chipclk13>;
206724ba675SRob Herring		clock-output-names = "tetb-trc";
207724ba675SRob Herring		reg = <0x02350018 0xb00>, <0x02350004 0x400>;
208724ba675SRob Herring		reg-names = "control", "domain";
209724ba675SRob Herring		domain-id = <1>;
210724ba675SRob Herring	};
211724ba675SRob Herring
212724ba675SRob Herring	clkpa: clkpa@235001c {
213724ba675SRob Herring		#clock-cells = <0>;
214724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
215724ba675SRob Herring		clocks = <&paclk13>;
216724ba675SRob Herring		clock-output-names = "pa";
217724ba675SRob Herring		reg = <0x0235001c 0xb00>, <0x02350008 0x400>;
218724ba675SRob Herring		reg-names = "control", "domain";
219724ba675SRob Herring		domain-id = <2>;
220724ba675SRob Herring	};
221724ba675SRob Herring
222724ba675SRob Herring	clkcpgmac: clkcpgmac@2350020 {
223724ba675SRob Herring		#clock-cells = <0>;
224724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
225724ba675SRob Herring		clocks = <&clkpa>;
226724ba675SRob Herring		clock-output-names = "cpgmac";
227724ba675SRob Herring		reg = <0x02350020 0xb00>, <0x02350008 0x400>;
228724ba675SRob Herring		reg-names = "control", "domain";
229724ba675SRob Herring		domain-id = <2>;
230724ba675SRob Herring	};
231724ba675SRob Herring
232724ba675SRob Herring	clksa: clksa@2350024 {
233724ba675SRob Herring		#clock-cells = <0>;
234724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
235724ba675SRob Herring		clocks = <&clkpa>;
236724ba675SRob Herring		clock-output-names = "sa";
237724ba675SRob Herring		reg = <0x02350024 0xb00>, <0x02350008 0x400>;
238724ba675SRob Herring		reg-names = "control", "domain";
239724ba675SRob Herring		domain-id = <2>;
240724ba675SRob Herring	};
241724ba675SRob Herring
242724ba675SRob Herring	clkpcie: clkpcie@2350028 {
243724ba675SRob Herring		#clock-cells = <0>;
244724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
245724ba675SRob Herring		clocks = <&chipclk12>;
246724ba675SRob Herring		clock-output-names = "pcie";
247724ba675SRob Herring		reg = <0x02350028 0xb00>, <0x0235000c 0x400>;
248724ba675SRob Herring		reg-names = "control", "domain";
249724ba675SRob Herring		domain-id = <3>;
250724ba675SRob Herring	};
251724ba675SRob Herring
252724ba675SRob Herring	clksr: clksr@2350034 {
253724ba675SRob Herring		#clock-cells = <0>;
254724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
255724ba675SRob Herring		clocks = <&chipclk1rstiso112>;
256724ba675SRob Herring		clock-output-names = "sr";
257724ba675SRob Herring		reg = <0x02350034 0xb00>, <0x02350018 0x400>;
258724ba675SRob Herring		reg-names = "control", "domain";
259724ba675SRob Herring		domain-id = <6>;
260724ba675SRob Herring	};
261724ba675SRob Herring
262724ba675SRob Herring	clkgem0: clkgem0@235003c {
263724ba675SRob Herring		#clock-cells = <0>;
264724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
265724ba675SRob Herring		clocks = <&chipclk1>;
266724ba675SRob Herring		clock-output-names = "gem0";
267724ba675SRob Herring		reg = <0x0235003c 0xb00>, <0x02350020 0x400>;
268724ba675SRob Herring		reg-names = "control", "domain";
269724ba675SRob Herring		domain-id = <8>;
270724ba675SRob Herring	};
271724ba675SRob Herring
272724ba675SRob Herring	clkddr30: clkddr30@235005c {
273724ba675SRob Herring		#clock-cells = <0>;
274724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
275724ba675SRob Herring		clocks = <&chipclk12>;
276724ba675SRob Herring		clock-output-names = "ddr3-0";
277724ba675SRob Herring		reg = <0x0235005c 0xb00>, <0x02350040 0x400>;
278724ba675SRob Herring		reg-names = "control", "domain";
279724ba675SRob Herring		domain-id = <16>;
280724ba675SRob Herring	};
281724ba675SRob Herring
282724ba675SRob Herring	clkwdtimer0: clkwdtimer0@2350000 {
283724ba675SRob Herring		#clock-cells = <0>;
284724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
285724ba675SRob Herring		clocks = <&clkmodrst0>;
286724ba675SRob Herring		clock-output-names = "timer0";
287724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
288724ba675SRob Herring		reg-names = "control", "domain";
289724ba675SRob Herring		domain-id = <0>;
290724ba675SRob Herring	};
291724ba675SRob Herring
292724ba675SRob Herring	clkwdtimer1: clkwdtimer1@2350000 {
293724ba675SRob Herring		#clock-cells = <0>;
294724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
295724ba675SRob Herring		clocks = <&clkmodrst0>;
296724ba675SRob Herring		clock-output-names = "timer1";
297724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
298724ba675SRob Herring		reg-names = "control", "domain";
299724ba675SRob Herring		domain-id = <0>;
300724ba675SRob Herring	};
301724ba675SRob Herring
302724ba675SRob Herring	clkwdtimer2: clkwdtimer2@2350000 {
303724ba675SRob Herring		#clock-cells = <0>;
304724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
305724ba675SRob Herring		clocks = <&clkmodrst0>;
306724ba675SRob Herring		clock-output-names = "timer2";
307724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
308724ba675SRob Herring		reg-names = "control", "domain";
309724ba675SRob Herring		domain-id = <0>;
310724ba675SRob Herring	};
311724ba675SRob Herring
312724ba675SRob Herring	clkwdtimer3: clkwdtimer3@2350000 {
313724ba675SRob Herring		#clock-cells = <0>;
314724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
315724ba675SRob Herring		clocks = <&clkmodrst0>;
316724ba675SRob Herring		clock-output-names = "timer3";
317724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
318724ba675SRob Herring		reg-names = "control", "domain";
319724ba675SRob Herring		domain-id = <0>;
320724ba675SRob Herring	};
321724ba675SRob Herring
322724ba675SRob Herring	clktimer15: clktimer15@2350000 {
323724ba675SRob Herring		#clock-cells = <0>;
324724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
325724ba675SRob Herring		clocks = <&clkmodrst0>;
326724ba675SRob Herring		clock-output-names = "timer15";
327724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
328724ba675SRob Herring		reg-names = "control", "domain";
329724ba675SRob Herring		domain-id = <0>;
330724ba675SRob Herring	};
331724ba675SRob Herring
332724ba675SRob Herring	clkuart0: clkuart0@2350000 {
333724ba675SRob Herring		#clock-cells = <0>;
334724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
335724ba675SRob Herring		clocks = <&clkmodrst0>;
336724ba675SRob Herring		clock-output-names = "uart0";
337724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
338724ba675SRob Herring		reg-names = "control", "domain";
339724ba675SRob Herring		domain-id = <0>;
340724ba675SRob Herring	};
341724ba675SRob Herring
342724ba675SRob Herring	clkuart1: clkuart1@2350000 {
343724ba675SRob Herring		#clock-cells = <0>;
344724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
345724ba675SRob Herring		clocks = <&clkmodrst0>;
346724ba675SRob Herring		clock-output-names = "uart1";
347724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
348724ba675SRob Herring		reg-names = "control", "domain";
349724ba675SRob Herring		domain-id = <0>;
350724ba675SRob Herring	};
351724ba675SRob Herring
352724ba675SRob Herring	clkaemif: clkaemif@2350000 {
353724ba675SRob Herring		#clock-cells = <0>;
354724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
355724ba675SRob Herring		clocks = <&clkaemifspi>;
356724ba675SRob Herring		clock-output-names = "aemif";
357724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
358724ba675SRob Herring		reg-names = "control", "domain";
359724ba675SRob Herring		domain-id = <0>;
360724ba675SRob Herring	};
361724ba675SRob Herring
362724ba675SRob Herring	clkusim: clkusim@2350000 {
363724ba675SRob Herring		#clock-cells = <0>;
364724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
365724ba675SRob Herring		clocks = <&clkmodrst0>;
366724ba675SRob Herring		clock-output-names = "usim";
367724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
368724ba675SRob Herring		reg-names = "control", "domain";
369724ba675SRob Herring		domain-id = <0>;
370724ba675SRob Herring	};
371724ba675SRob Herring
372724ba675SRob Herring	clki2c: clki2c@2350000 {
373724ba675SRob Herring		#clock-cells = <0>;
374724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
375724ba675SRob Herring		clocks = <&clkmodrst0>;
376724ba675SRob Herring		clock-output-names = "i2c";
377724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
378724ba675SRob Herring		reg-names = "control", "domain";
379724ba675SRob Herring		domain-id = <0>;
380724ba675SRob Herring	};
381724ba675SRob Herring
382724ba675SRob Herring	clkspi: clkspi@2350000 {
383724ba675SRob Herring		#clock-cells = <0>;
384724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
385724ba675SRob Herring		clocks = <&clkaemifspi>;
386724ba675SRob Herring		clock-output-names = "spi";
387724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
388724ba675SRob Herring		reg-names = "control", "domain";
389724ba675SRob Herring		domain-id = <0>;
390724ba675SRob Herring	};
391724ba675SRob Herring
392724ba675SRob Herring	clkgpio: clkgpio@2350000 {
393724ba675SRob Herring		#clock-cells = <0>;
394724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
395724ba675SRob Herring		clocks = <&clkmodrst0>;
396724ba675SRob Herring		clock-output-names = "gpio";
397724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
398724ba675SRob Herring		reg-names = "control", "domain";
399724ba675SRob Herring		domain-id = <0>;
400724ba675SRob Herring	};
401724ba675SRob Herring
402724ba675SRob Herring	clkkeymgr: clkkeymgr@2350000 {
403724ba675SRob Herring		#clock-cells = <0>;
404724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
405724ba675SRob Herring		clocks = <&clkmodrst0>;
406724ba675SRob Herring		clock-output-names = "keymgr";
407724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
408724ba675SRob Herring		reg-names = "control", "domain";
409724ba675SRob Herring		domain-id = <0>;
410724ba675SRob Herring	};
411724ba675SRob Herring
412724ba675SRob Herring	/*
413724ba675SRob Herring	 * Below are set of fixed, input clocks definitions,
414724ba675SRob Herring	 * for which real frequencies have to be defined in board files.
415724ba675SRob Herring	 * Those clocks can be used as reference clocks for some HW modules
416724ba675SRob Herring	 * (as cpts, for example) by configuring corresponding clock muxes.
417724ba675SRob Herring	 */
418724ba675SRob Herring	timi0: timi0 {
419724ba675SRob Herring		#clock-cells = <0>;
420724ba675SRob Herring		compatible = "fixed-clock";
421724ba675SRob Herring		clock-frequency = <0>;
422724ba675SRob Herring		clock-output-names = "timi0";
423724ba675SRob Herring	};
424724ba675SRob Herring
425724ba675SRob Herring	timi1: timi1 {
426724ba675SRob Herring		#clock-cells = <0>;
427724ba675SRob Herring		compatible = "fixed-clock";
428724ba675SRob Herring		clock-frequency = <0>;
429724ba675SRob Herring		clock-output-names = "timi1";
430724ba675SRob Herring	};
431724ba675SRob Herring
432724ba675SRob Herring	tsrefclk: tsrefclk {
433724ba675SRob Herring		#clock-cells = <0>;
434724ba675SRob Herring		compatible = "fixed-clock";
435724ba675SRob Herring		clock-frequency = <0>;
436724ba675SRob Herring		clock-output-names = "tsrefclk";
437724ba675SRob Herring	};
438724ba675SRob Herring};
439