1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2*724ba675SRob Herring// Copyright (c) 2018, Robert Marko <robimarko@gmail.com> 3*724ba675SRob Herring 4*724ba675SRob Herring#include "qcom-ipq4019.dtsi" 5*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 6*724ba675SRob Herring#include <dt-bindings/input/input.h> 7*724ba675SRob Herring 8*724ba675SRob Herring/ { 9*724ba675SRob Herring model = "8devices Jalapeno"; 10*724ba675SRob Herring compatible = "8dev,jalapeno", "qcom,ipq4018"; 11*724ba675SRob Herring}; 12*724ba675SRob Herring 13*724ba675SRob Herring&tlmm { 14*724ba675SRob Herring mdio_pins: mdio_pinmux { 15*724ba675SRob Herring pinmux_1 { 16*724ba675SRob Herring pins = "gpio53"; 17*724ba675SRob Herring function = "mdio"; 18*724ba675SRob Herring }; 19*724ba675SRob Herring 20*724ba675SRob Herring pinmux_2 { 21*724ba675SRob Herring pins = "gpio52"; 22*724ba675SRob Herring function = "mdc"; 23*724ba675SRob Herring }; 24*724ba675SRob Herring 25*724ba675SRob Herring pinconf { 26*724ba675SRob Herring pins = "gpio52", "gpio53"; 27*724ba675SRob Herring bias-pull-up; 28*724ba675SRob Herring }; 29*724ba675SRob Herring }; 30*724ba675SRob Herring 31*724ba675SRob Herring serial_pins: serial_pinmux { 32*724ba675SRob Herring mux { 33*724ba675SRob Herring pins = "gpio60", "gpio61"; 34*724ba675SRob Herring function = "blsp_uart0"; 35*724ba675SRob Herring bias-disable; 36*724ba675SRob Herring }; 37*724ba675SRob Herring }; 38*724ba675SRob Herring 39*724ba675SRob Herring spi_0_pins: spi_0_pinmux { 40*724ba675SRob Herring pin { 41*724ba675SRob Herring function = "blsp_spi0"; 42*724ba675SRob Herring pins = "gpio55", "gpio56", "gpio57"; 43*724ba675SRob Herring drive-strength = <2>; 44*724ba675SRob Herring bias-disable; 45*724ba675SRob Herring }; 46*724ba675SRob Herring 47*724ba675SRob Herring pin_cs { 48*724ba675SRob Herring function = "gpio"; 49*724ba675SRob Herring pins = "gpio54", "gpio59"; 50*724ba675SRob Herring drive-strength = <2>; 51*724ba675SRob Herring bias-disable; 52*724ba675SRob Herring output-high; 53*724ba675SRob Herring }; 54*724ba675SRob Herring }; 55*724ba675SRob Herring}; 56*724ba675SRob Herring 57*724ba675SRob Herring&watchdog { 58*724ba675SRob Herring status = "okay"; 59*724ba675SRob Herring}; 60*724ba675SRob Herring 61*724ba675SRob Herring&prng { 62*724ba675SRob Herring status = "okay"; 63*724ba675SRob Herring}; 64*724ba675SRob Herring 65*724ba675SRob Herring&blsp_dma { 66*724ba675SRob Herring status = "okay"; 67*724ba675SRob Herring}; 68*724ba675SRob Herring 69*724ba675SRob Herring&blsp1_spi1 { 70*724ba675SRob Herring status = "okay"; 71*724ba675SRob Herring 72*724ba675SRob Herring pinctrl-0 = <&spi_0_pins>; 73*724ba675SRob Herring pinctrl-names = "default"; 74*724ba675SRob Herring cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>; 75*724ba675SRob Herring 76*724ba675SRob Herring flash@0 { 77*724ba675SRob Herring status = "okay"; 78*724ba675SRob Herring 79*724ba675SRob Herring compatible = "jedec,spi-nor"; 80*724ba675SRob Herring reg = <0>; 81*724ba675SRob Herring spi-max-frequency = <24000000>; 82*724ba675SRob Herring 83*724ba675SRob Herring partitions { 84*724ba675SRob Herring compatible = "fixed-partitions"; 85*724ba675SRob Herring #address-cells = <1>; 86*724ba675SRob Herring #size-cells = <1>; 87*724ba675SRob Herring 88*724ba675SRob Herring partition@0 { 89*724ba675SRob Herring label = "SBL1"; 90*724ba675SRob Herring reg = <0x00000000 0x00040000>; 91*724ba675SRob Herring read-only; 92*724ba675SRob Herring }; 93*724ba675SRob Herring 94*724ba675SRob Herring partition@40000 { 95*724ba675SRob Herring label = "MIBIB"; 96*724ba675SRob Herring reg = <0x00040000 0x00020000>; 97*724ba675SRob Herring read-only; 98*724ba675SRob Herring }; 99*724ba675SRob Herring 100*724ba675SRob Herring partition@60000 { 101*724ba675SRob Herring label = "QSEE"; 102*724ba675SRob Herring reg = <0x00060000 0x00060000>; 103*724ba675SRob Herring read-only; 104*724ba675SRob Herring }; 105*724ba675SRob Herring 106*724ba675SRob Herring partition@c0000 { 107*724ba675SRob Herring label = "CDT"; 108*724ba675SRob Herring reg = <0x000c0000 0x00010000>; 109*724ba675SRob Herring read-only; 110*724ba675SRob Herring }; 111*724ba675SRob Herring 112*724ba675SRob Herring partition@d0000 { 113*724ba675SRob Herring label = "DDRPARAMS"; 114*724ba675SRob Herring reg = <0x000d0000 0x00010000>; 115*724ba675SRob Herring read-only; 116*724ba675SRob Herring }; 117*724ba675SRob Herring 118*724ba675SRob Herring partition@e0000 { 119*724ba675SRob Herring label = "u-boot-env"; 120*724ba675SRob Herring reg = <0x000e0000 0x00010000>; 121*724ba675SRob Herring }; 122*724ba675SRob Herring 123*724ba675SRob Herring partition@f0000 { 124*724ba675SRob Herring label = "u-boot"; 125*724ba675SRob Herring reg = <0x000f0000 0x00080000>; 126*724ba675SRob Herring read-only; 127*724ba675SRob Herring }; 128*724ba675SRob Herring 129*724ba675SRob Herring partition@170000 { 130*724ba675SRob Herring label = "ART"; 131*724ba675SRob Herring reg = <0x00170000 0x00010000>; 132*724ba675SRob Herring read-only; 133*724ba675SRob Herring }; 134*724ba675SRob Herring }; 135*724ba675SRob Herring }; 136*724ba675SRob Herring 137*724ba675SRob Herring spi-nand@1 { 138*724ba675SRob Herring status = "okay"; 139*724ba675SRob Herring 140*724ba675SRob Herring compatible = "spi-nand"; 141*724ba675SRob Herring reg = <1>; 142*724ba675SRob Herring spi-max-frequency = <24000000>; 143*724ba675SRob Herring 144*724ba675SRob Herring partitions { 145*724ba675SRob Herring compatible = "fixed-partitions"; 146*724ba675SRob Herring #address-cells = <1>; 147*724ba675SRob Herring #size-cells = <1>; 148*724ba675SRob Herring 149*724ba675SRob Herring partition@0 { 150*724ba675SRob Herring label = "ubi1"; 151*724ba675SRob Herring reg = <0x00000000 0x04000000>; 152*724ba675SRob Herring }; 153*724ba675SRob Herring 154*724ba675SRob Herring partition@4000000 { 155*724ba675SRob Herring label = "ubi2"; 156*724ba675SRob Herring reg = <0x04000000 0x04000000>; 157*724ba675SRob Herring }; 158*724ba675SRob Herring }; 159*724ba675SRob Herring }; 160*724ba675SRob Herring}; 161*724ba675SRob Herring 162*724ba675SRob Herring&blsp1_uart1 { 163*724ba675SRob Herring status = "okay"; 164*724ba675SRob Herring 165*724ba675SRob Herring pinctrl-0 = <&serial_pins>; 166*724ba675SRob Herring pinctrl-names = "default"; 167*724ba675SRob Herring}; 168*724ba675SRob Herring 169*724ba675SRob Herring&cryptobam { 170*724ba675SRob Herring status = "okay"; 171*724ba675SRob Herring}; 172*724ba675SRob Herring 173*724ba675SRob Herring&crypto { 174*724ba675SRob Herring status = "okay"; 175*724ba675SRob Herring}; 176*724ba675SRob Herring 177*724ba675SRob Herring&mdio { 178*724ba675SRob Herring status = "okay"; 179*724ba675SRob Herring 180*724ba675SRob Herring pinctrl-0 = <&mdio_pins>; 181*724ba675SRob Herring pinctrl-names = "default"; 182*724ba675SRob Herring}; 183*724ba675SRob Herring 184*724ba675SRob Herring&wifi0 { 185*724ba675SRob Herring status = "okay"; 186*724ba675SRob Herring 187*724ba675SRob Herring qcom,ath10k-calibration-variant = "8devices-Jalapeno"; 188*724ba675SRob Herring}; 189*724ba675SRob Herring 190*724ba675SRob Herring&wifi1 { 191*724ba675SRob Herring status = "okay"; 192*724ba675SRob Herring 193*724ba675SRob Herring qcom,ath10k-calibration-variant = "8devices-Jalapeno"; 194*724ba675SRob Herring}; 195*724ba675SRob Herring 196*724ba675SRob Herring&usb3_ss_phy { 197*724ba675SRob Herring status = "okay"; 198*724ba675SRob Herring}; 199*724ba675SRob Herring 200*724ba675SRob Herring&usb3_hs_phy { 201*724ba675SRob Herring status = "okay"; 202*724ba675SRob Herring}; 203*724ba675SRob Herring 204*724ba675SRob Herring&usb3 { 205*724ba675SRob Herring status = "okay"; 206*724ba675SRob Herring}; 207*724ba675SRob Herring 208*724ba675SRob Herring&usb2_hs_phy { 209*724ba675SRob Herring status = "okay"; 210*724ba675SRob Herring}; 211*724ba675SRob Herring 212*724ba675SRob Herring&usb2 { 213*724ba675SRob Herring status = "okay"; 214*724ba675SRob Herring}; 215