1// SPDX-License-Identifier: GPL-2.0-or-later 2// Copyright 2019 IBM Corp. 3 4#include <dt-bindings/interrupt-controller/arm-gic.h> 5#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6#include <dt-bindings/clock/ast2600-clock.h> 7 8/ { 9 model = "Aspeed BMC"; 10 compatible = "aspeed,ast2600"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 14 15 aliases { 16 i2c0 = &i2c0; 17 i2c1 = &i2c1; 18 i2c2 = &i2c2; 19 i2c3 = &i2c3; 20 i2c4 = &i2c4; 21 i2c5 = &i2c5; 22 i2c6 = &i2c6; 23 i2c7 = &i2c7; 24 i2c8 = &i2c8; 25 i2c9 = &i2c9; 26 i2c10 = &i2c10; 27 i2c11 = &i2c11; 28 i2c12 = &i2c12; 29 i2c13 = &i2c13; 30 i2c14 = &i2c14; 31 i2c15 = &i2c15; 32 serial0 = &uart1; 33 serial1 = &uart2; 34 serial2 = &uart3; 35 serial3 = &uart4; 36 serial4 = &uart5; 37 serial5 = &vuart1; 38 serial6 = &vuart2; 39 mdio0 = &mdio0; 40 mdio1 = &mdio1; 41 mdio2 = &mdio2; 42 mdio3 = &mdio3; 43 }; 44 45 46 cpus { 47 #address-cells = <1>; 48 #size-cells = <0>; 49 enable-method = "aspeed,ast2600-smp"; 50 51 cpu@f00 { 52 compatible = "arm,cortex-a7"; 53 device_type = "cpu"; 54 reg = <0xf00>; 55 }; 56 57 cpu@f01 { 58 compatible = "arm,cortex-a7"; 59 device_type = "cpu"; 60 reg = <0xf01>; 61 }; 62 }; 63 64 timer { 65 compatible = "arm,armv7-timer"; 66 interrupt-parent = <&gic>; 67 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 68 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 69 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 70 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 71 clocks = <&syscon ASPEED_CLK_HPLL>; 72 arm,cpu-registers-not-fw-configured; 73 always-on; 74 }; 75 76 edac: sdram@1e6e0000 { 77 compatible = "aspeed,ast2600-sdram-edac", "syscon"; 78 reg = <0x1e6e0000 0x174>; 79 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 80 }; 81 82 ahb { 83 compatible = "simple-bus"; 84 #address-cells = <1>; 85 #size-cells = <1>; 86 device_type = "soc"; 87 ranges; 88 89 gic: interrupt-controller@40461000 { 90 compatible = "arm,cortex-a7-gic"; 91 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 92 #interrupt-cells = <3>; 93 interrupt-controller; 94 interrupt-parent = <&gic>; 95 reg = <0x40461000 0x1000>, 96 <0x40462000 0x1000>, 97 <0x40464000 0x2000>, 98 <0x40466000 0x2000>; 99 }; 100 101 ahbc: bus@1e600000 { 102 compatible = "aspeed,ast2600-ahbc", "syscon"; 103 reg = <0x1e600000 0x100>; 104 }; 105 106 fmc: spi@1e620000 { 107 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; 108 #address-cells = <1>; 109 #size-cells = <0>; 110 compatible = "aspeed,ast2600-fmc"; 111 clocks = <&syscon ASPEED_CLK_AHB>; 112 status = "disabled"; 113 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 114 flash@0 { 115 reg = < 0 >; 116 compatible = "jedec,spi-nor"; 117 spi-max-frequency = <50000000>; 118 spi-rx-bus-width = <2>; 119 status = "disabled"; 120 }; 121 flash@1 { 122 reg = < 1 >; 123 compatible = "jedec,spi-nor"; 124 spi-max-frequency = <50000000>; 125 spi-rx-bus-width = <2>; 126 status = "disabled"; 127 }; 128 flash@2 { 129 reg = < 2 >; 130 compatible = "jedec,spi-nor"; 131 spi-max-frequency = <50000000>; 132 spi-rx-bus-width = <2>; 133 status = "disabled"; 134 }; 135 }; 136 137 spi1: spi@1e630000 { 138 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>; 139 #address-cells = <1>; 140 #size-cells = <0>; 141 compatible = "aspeed,ast2600-spi"; 142 clocks = <&syscon ASPEED_CLK_AHB>; 143 status = "disabled"; 144 flash@0 { 145 reg = < 0 >; 146 compatible = "jedec,spi-nor"; 147 spi-max-frequency = <50000000>; 148 spi-rx-bus-width = <2>; 149 status = "disabled"; 150 }; 151 flash@1 { 152 reg = < 1 >; 153 compatible = "jedec,spi-nor"; 154 spi-max-frequency = <50000000>; 155 spi-rx-bus-width = <2>; 156 status = "disabled"; 157 }; 158 }; 159 160 spi2: spi@1e631000 { 161 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>; 162 #address-cells = <1>; 163 #size-cells = <0>; 164 compatible = "aspeed,ast2600-spi"; 165 clocks = <&syscon ASPEED_CLK_AHB>; 166 status = "disabled"; 167 flash@0 { 168 reg = < 0 >; 169 compatible = "jedec,spi-nor"; 170 spi-max-frequency = <50000000>; 171 spi-rx-bus-width = <2>; 172 status = "disabled"; 173 }; 174 flash@1 { 175 reg = < 1 >; 176 compatible = "jedec,spi-nor"; 177 spi-max-frequency = <50000000>; 178 spi-rx-bus-width = <2>; 179 status = "disabled"; 180 }; 181 flash@2 { 182 reg = < 2 >; 183 compatible = "jedec,spi-nor"; 184 spi-max-frequency = <50000000>; 185 spi-rx-bus-width = <2>; 186 status = "disabled"; 187 }; 188 }; 189 190 mdio0: mdio@1e650000 { 191 compatible = "aspeed,ast2600-mdio"; 192 reg = <0x1e650000 0x8>; 193 #address-cells = <1>; 194 #size-cells = <0>; 195 status = "disabled"; 196 pinctrl-names = "default"; 197 pinctrl-0 = <&pinctrl_mdio1_default>; 198 resets = <&syscon ASPEED_RESET_MII>; 199 }; 200 201 mdio1: mdio@1e650008 { 202 compatible = "aspeed,ast2600-mdio"; 203 reg = <0x1e650008 0x8>; 204 #address-cells = <1>; 205 #size-cells = <0>; 206 status = "disabled"; 207 pinctrl-names = "default"; 208 pinctrl-0 = <&pinctrl_mdio2_default>; 209 resets = <&syscon ASPEED_RESET_MII>; 210 }; 211 212 mdio2: mdio@1e650010 { 213 compatible = "aspeed,ast2600-mdio"; 214 reg = <0x1e650010 0x8>; 215 #address-cells = <1>; 216 #size-cells = <0>; 217 status = "disabled"; 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pinctrl_mdio3_default>; 220 resets = <&syscon ASPEED_RESET_MII>; 221 }; 222 223 mdio3: mdio@1e650018 { 224 compatible = "aspeed,ast2600-mdio"; 225 reg = <0x1e650018 0x8>; 226 #address-cells = <1>; 227 #size-cells = <0>; 228 status = "disabled"; 229 pinctrl-names = "default"; 230 pinctrl-0 = <&pinctrl_mdio4_default>; 231 resets = <&syscon ASPEED_RESET_MII>; 232 }; 233 234 mac0: ftgmac@1e660000 { 235 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 236 reg = <0x1e660000 0x180>; 237 #address-cells = <1>; 238 #size-cells = <0>; 239 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 240 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; 241 status = "disabled"; 242 }; 243 244 mac1: ftgmac@1e680000 { 245 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 246 reg = <0x1e680000 0x180>; 247 #address-cells = <1>; 248 #size-cells = <0>; 249 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 250 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; 251 status = "disabled"; 252 }; 253 254 mac2: ftgmac@1e670000 { 255 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 256 reg = <0x1e670000 0x180>; 257 #address-cells = <1>; 258 #size-cells = <0>; 259 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 260 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>; 261 status = "disabled"; 262 }; 263 264 mac3: ftgmac@1e690000 { 265 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 266 reg = <0x1e690000 0x180>; 267 #address-cells = <1>; 268 #size-cells = <0>; 269 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 270 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>; 271 status = "disabled"; 272 }; 273 274 ehci0: usb@1e6a1000 { 275 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 276 reg = <0x1e6a1000 0x100>; 277 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 278 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 279 pinctrl-names = "default"; 280 pinctrl-0 = <&pinctrl_usb2ah_default>; 281 status = "disabled"; 282 }; 283 284 ehci1: usb@1e6a3000 { 285 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 286 reg = <0x1e6a3000 0x100>; 287 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 288 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 289 pinctrl-names = "default"; 290 pinctrl-0 = <&pinctrl_usb2bh_default>; 291 status = "disabled"; 292 }; 293 294 uhci: usb@1e6b0000 { 295 compatible = "aspeed,ast2600-uhci", "generic-uhci"; 296 reg = <0x1e6b0000 0x100>; 297 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 298 #ports = <2>; 299 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; 300 status = "disabled"; 301 /* 302 * No default pinmux, it will follow EHCI, use an 303 * explicit pinmux override if EHCI is not enabled. 304 */ 305 }; 306 307 vhub: usb-vhub@1e6a0000 { 308 compatible = "aspeed,ast2600-usb-vhub"; 309 reg = <0x1e6a0000 0x350>; 310 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 311 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 312 aspeed,vhub-downstream-ports = <7>; 313 aspeed,vhub-generic-endpoints = <21>; 314 pinctrl-names = "default"; 315 pinctrl-0 = <&pinctrl_usb2ad_default>; 316 status = "disabled"; 317 }; 318 319 udc: usb@1e6a2000 { 320 compatible = "aspeed,ast2600-udc"; 321 reg = <0x1e6a2000 0x300>; 322 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 323 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 324 pinctrl-names = "default"; 325 pinctrl-0 = <&pinctrl_usb2bd_default>; 326 status = "disabled"; 327 }; 328 329 apb { 330 compatible = "simple-bus"; 331 #address-cells = <1>; 332 #size-cells = <1>; 333 ranges; 334 335 hace: crypto@1e6d0000 { 336 compatible = "aspeed,ast2600-hace"; 337 reg = <0x1e6d0000 0x200>; 338 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 339 clocks = <&syscon ASPEED_CLK_GATE_YCLK>; 340 resets = <&syscon ASPEED_RESET_HACE>; 341 }; 342 343 syscon: syscon@1e6e2000 { 344 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd"; 345 reg = <0x1e6e2000 0x1000>; 346 ranges = <0 0x1e6e2000 0x1000>; 347 #address-cells = <1>; 348 #size-cells = <1>; 349 #clock-cells = <1>; 350 #reset-cells = <1>; 351 352 pinctrl: pinctrl { 353 compatible = "aspeed,ast2600-pinctrl"; 354 }; 355 356 silicon-id@14 { 357 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id"; 358 reg = <0x14 0x4 0x5b0 0x8>; 359 }; 360 361 smp-memram@180 { 362 compatible = "aspeed,ast2600-smpmem"; 363 reg = <0x180 0x40>; 364 }; 365 366 scu_ic0: interrupt-controller@560 { 367 #interrupt-cells = <1>; 368 compatible = "aspeed,ast2600-scu-ic0"; 369 reg = <0x560 0x4>; 370 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 371 interrupt-controller; 372 }; 373 374 scu_ic1: interrupt-controller@570 { 375 #interrupt-cells = <1>; 376 compatible = "aspeed,ast2600-scu-ic1"; 377 reg = <0x570 0x4>; 378 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 379 interrupt-controller; 380 }; 381 }; 382 383 rng: hwrng@1e6e2524 { 384 compatible = "timeriomem_rng"; 385 reg = <0x1e6e2524 0x4>; 386 period = <1>; 387 quality = <100>; 388 }; 389 390 gfx: display@1e6e6000 { 391 compatible = "aspeed,ast2600-gfx", "syscon"; 392 reg = <0x1e6e6000 0x1000>; 393 reg-io-width = <4>; 394 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; 395 resets = <&syscon ASPEED_RESET_GRAPHICS>; 396 syscon = <&syscon>; 397 status = "disabled"; 398 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 399 }; 400 401 adc0: adc@1e6e9000 { 402 compatible = "aspeed,ast2600-adc0"; 403 reg = <0x1e6e9000 0x100>; 404 clocks = <&syscon ASPEED_CLK_APB2>; 405 resets = <&syscon ASPEED_RESET_ADC>; 406 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 407 #io-channel-cells = <1>; 408 status = "disabled"; 409 }; 410 411 adc1: adc@1e6e9100 { 412 compatible = "aspeed,ast2600-adc1"; 413 reg = <0x1e6e9100 0x100>; 414 clocks = <&syscon ASPEED_CLK_APB2>; 415 resets = <&syscon ASPEED_RESET_ADC>; 416 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 417 #io-channel-cells = <1>; 418 status = "disabled"; 419 }; 420 421 sbc: secure-boot-controller@1e6f2000 { 422 compatible = "aspeed,ast2600-sbc"; 423 reg = <0x1e6f2000 0x1000>; 424 }; 425 426 acry: crypto@1e6fa000 { 427 compatible = "aspeed,ast2600-acry"; 428 reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>; 429 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; 430 clocks = <&syscon ASPEED_CLK_GATE_RSACLK>; 431 aspeed,ahbc = <&ahbc>; 432 }; 433 434 video: video@1e700000 { 435 compatible = "aspeed,ast2600-video-engine"; 436 reg = <0x1e700000 0x1000>; 437 clocks = <&syscon ASPEED_CLK_GATE_VCLK>, 438 <&syscon ASPEED_CLK_GATE_ECLK>; 439 clock-names = "vclk", "eclk"; 440 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 441 status = "disabled"; 442 }; 443 444 gpio0: gpio@1e780000 { 445 #gpio-cells = <2>; 446 gpio-controller; 447 compatible = "aspeed,ast2600-gpio"; 448 reg = <0x1e780000 0x400>; 449 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 450 gpio-ranges = <&pinctrl 0 0 208>; 451 ngpios = <208>; 452 clocks = <&syscon ASPEED_CLK_APB2>; 453 interrupt-controller; 454 #interrupt-cells = <2>; 455 }; 456 457 sgpiom0: sgpiom@1e780500 { 458 #gpio-cells = <2>; 459 gpio-controller; 460 compatible = "aspeed,ast2600-sgpiom"; 461 reg = <0x1e780500 0x100>; 462 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 463 clocks = <&syscon ASPEED_CLK_APB2>; 464 #interrupt-cells = <2>; 465 interrupt-controller; 466 bus-frequency = <12000000>; 467 pinctrl-names = "default"; 468 pinctrl-0 = <&pinctrl_sgpm1_default>; 469 status = "disabled"; 470 }; 471 472 sgpiom1: sgpiom@1e780600 { 473 #gpio-cells = <2>; 474 gpio-controller; 475 compatible = "aspeed,ast2600-sgpiom"; 476 reg = <0x1e780600 0x100>; 477 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 478 clocks = <&syscon ASPEED_CLK_APB2>; 479 #interrupt-cells = <2>; 480 interrupt-controller; 481 bus-frequency = <12000000>; 482 pinctrl-names = "default"; 483 pinctrl-0 = <&pinctrl_sgpm2_default>; 484 status = "disabled"; 485 }; 486 487 gpio1: gpio@1e780800 { 488 #gpio-cells = <2>; 489 gpio-controller; 490 compatible = "aspeed,ast2600-gpio"; 491 reg = <0x1e780800 0x800>; 492 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 493 gpio-ranges = <&pinctrl 0 208 36>; 494 ngpios = <36>; 495 clocks = <&syscon ASPEED_CLK_APB1>; 496 interrupt-controller; 497 #interrupt-cells = <2>; 498 }; 499 500 rtc: rtc@1e781000 { 501 compatible = "aspeed,ast2600-rtc"; 502 reg = <0x1e781000 0x18>; 503 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 504 status = "disabled"; 505 }; 506 507 timer: timer@1e782000 { 508 compatible = "aspeed,ast2600-timer"; 509 reg = <0x1e782000 0x90>; 510 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 511 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 512 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 513 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 514 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 515 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 516 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 517 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 518 clocks = <&syscon ASPEED_CLK_APB1>; 519 clock-names = "PCLK"; 520 status = "disabled"; 521 }; 522 523 uart1: serial@1e783000 { 524 compatible = "ns16550a"; 525 reg = <0x1e783000 0x20>; 526 reg-shift = <2>; 527 reg-io-width = <4>; 528 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 529 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; 530 resets = <&lpc_reset 4>; 531 no-loopback-test; 532 pinctrl-names = "default"; 533 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>; 534 status = "disabled"; 535 }; 536 537 uart5: serial@1e784000 { 538 compatible = "ns16550a"; 539 reg = <0x1e784000 0x1000>; 540 reg-shift = <2>; 541 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 542 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>; 543 no-loopback-test; 544 }; 545 546 wdt1: watchdog@1e785000 { 547 compatible = "aspeed,ast2600-wdt"; 548 reg = <0x1e785000 0x40>; 549 }; 550 551 wdt2: watchdog@1e785040 { 552 compatible = "aspeed,ast2600-wdt"; 553 reg = <0x1e785040 0x40>; 554 status = "disabled"; 555 }; 556 557 wdt3: watchdog@1e785080 { 558 compatible = "aspeed,ast2600-wdt"; 559 reg = <0x1e785080 0x40>; 560 status = "disabled"; 561 }; 562 563 wdt4: watchdog@1e7850c0 { 564 compatible = "aspeed,ast2600-wdt"; 565 reg = <0x1e7850C0 0x40>; 566 status = "disabled"; 567 }; 568 569 peci0: peci-controller@1e78b000 { 570 compatible = "aspeed,ast2600-peci"; 571 reg = <0x1e78b000 0x100>; 572 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 573 clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; 574 resets = <&syscon ASPEED_RESET_PECI>; 575 cmd-timeout-ms = <1000>; 576 clock-frequency = <1000000>; 577 status = "disabled"; 578 }; 579 580 lpc: lpc@1e789000 { 581 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"; 582 reg = <0x1e789000 0x1000>; 583 reg-io-width = <4>; 584 585 #address-cells = <1>; 586 #size-cells = <1>; 587 ranges = <0x0 0x1e789000 0x1000>; 588 589 kcs1: kcs@24 { 590 compatible = "aspeed,ast2500-kcs-bmc-v2"; 591 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; 592 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 593 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 594 kcs_chan = <1>; 595 status = "disabled"; 596 }; 597 598 kcs2: kcs@28 { 599 compatible = "aspeed,ast2500-kcs-bmc-v2"; 600 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>; 601 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 602 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 603 status = "disabled"; 604 }; 605 606 kcs3: kcs@2c { 607 compatible = "aspeed,ast2500-kcs-bmc-v2"; 608 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>; 609 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 610 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 611 status = "disabled"; 612 }; 613 614 kcs4: kcs@114 { 615 compatible = "aspeed,ast2500-kcs-bmc-v2"; 616 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>; 617 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 618 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 619 status = "disabled"; 620 }; 621 622 lpc_ctrl: lpc-ctrl@80 { 623 compatible = "aspeed,ast2600-lpc-ctrl"; 624 reg = <0x80 0x80>; 625 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 626 status = "disabled"; 627 }; 628 629 lpc_snoop: lpc-snoop@80 { 630 compatible = "aspeed,ast2600-lpc-snoop"; 631 reg = <0x80 0x80>; 632 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 633 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 634 status = "disabled"; 635 }; 636 637 lhc: lhc@a0 { 638 compatible = "aspeed,ast2600-lhc"; 639 reg = <0xa0 0x24 0xc8 0x8>; 640 }; 641 642 lpc_reset: reset-controller@98 { 643 compatible = "aspeed,ast2600-lpc-reset"; 644 reg = <0x98 0x4>; 645 #reset-cells = <1>; 646 }; 647 648 uart_routing: uart-routing@98 { 649 compatible = "aspeed,ast2600-uart-routing"; 650 reg = <0x98 0x8>; 651 status = "disabled"; 652 }; 653 654 ibt: ibt@140 { 655 compatible = "aspeed,ast2600-ibt-bmc"; 656 reg = <0x140 0x18>; 657 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 658 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 659 status = "disabled"; 660 }; 661 }; 662 663 sdc: sdc@1e740000 { 664 compatible = "aspeed,ast2600-sd-controller"; 665 reg = <0x1e740000 0x100>; 666 #address-cells = <1>; 667 #size-cells = <1>; 668 ranges = <0 0x1e740000 0x10000>; 669 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 670 status = "disabled"; 671 672 sdhci0: sdhci@1e740100 { 673 compatible = "aspeed,ast2600-sdhci", "sdhci"; 674 reg = <0x100 0x100>; 675 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 676 sdhci,auto-cmd12; 677 clocks = <&syscon ASPEED_CLK_SDIO>; 678 status = "disabled"; 679 }; 680 681 sdhci1: sdhci@1e740200 { 682 compatible = "aspeed,ast2600-sdhci", "sdhci"; 683 reg = <0x200 0x100>; 684 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 685 sdhci,auto-cmd12; 686 clocks = <&syscon ASPEED_CLK_SDIO>; 687 status = "disabled"; 688 }; 689 }; 690 691 emmc_controller: sdc@1e750000 { 692 compatible = "aspeed,ast2600-sd-controller"; 693 reg = <0x1e750000 0x100>; 694 #address-cells = <1>; 695 #size-cells = <1>; 696 ranges = <0 0x1e750000 0x10000>; 697 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>; 698 status = "disabled"; 699 700 emmc: sdhci@1e750100 { 701 compatible = "aspeed,ast2600-sdhci"; 702 reg = <0x100 0x100>; 703 sdhci,auto-cmd12; 704 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 705 clocks = <&syscon ASPEED_CLK_EMMC>; 706 pinctrl-names = "default"; 707 pinctrl-0 = <&pinctrl_emmc_default>; 708 }; 709 }; 710 711 vuart1: serial@1e787000 { 712 compatible = "aspeed,ast2500-vuart"; 713 reg = <0x1e787000 0x40>; 714 reg-shift = <2>; 715 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 716 clocks = <&syscon ASPEED_CLK_APB1>; 717 no-loopback-test; 718 status = "disabled"; 719 }; 720 721 vuart3: serial@1e787800 { 722 compatible = "aspeed,ast2500-vuart"; 723 reg = <0x1e787800 0x40>; 724 reg-shift = <2>; 725 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; 726 clocks = <&syscon ASPEED_CLK_APB2>; 727 no-loopback-test; 728 status = "disabled"; 729 }; 730 731 vuart2: serial@1e788000 { 732 compatible = "aspeed,ast2500-vuart"; 733 reg = <0x1e788000 0x40>; 734 reg-shift = <2>; 735 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 736 clocks = <&syscon ASPEED_CLK_APB1>; 737 no-loopback-test; 738 status = "disabled"; 739 }; 740 741 vuart4: serial@1e788800 { 742 compatible = "aspeed,ast2500-vuart"; 743 reg = <0x1e788800 0x40>; 744 reg-shift = <2>; 745 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; 746 clocks = <&syscon ASPEED_CLK_APB2>; 747 no-loopback-test; 748 status = "disabled"; 749 }; 750 751 uart2: serial@1e78d000 { 752 compatible = "ns16550a"; 753 reg = <0x1e78d000 0x20>; 754 reg-shift = <2>; 755 reg-io-width = <4>; 756 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 757 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; 758 resets = <&lpc_reset 5>; 759 no-loopback-test; 760 pinctrl-names = "default"; 761 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 762 status = "disabled"; 763 }; 764 765 uart3: serial@1e78e000 { 766 compatible = "ns16550a"; 767 reg = <0x1e78e000 0x20>; 768 reg-shift = <2>; 769 reg-io-width = <4>; 770 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 771 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; 772 resets = <&lpc_reset 6>; 773 no-loopback-test; 774 pinctrl-names = "default"; 775 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; 776 status = "disabled"; 777 }; 778 779 uart4: serial@1e78f000 { 780 compatible = "ns16550a"; 781 reg = <0x1e78f000 0x20>; 782 reg-shift = <2>; 783 reg-io-width = <4>; 784 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 785 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; 786 resets = <&lpc_reset 7>; 787 no-loopback-test; 788 pinctrl-names = "default"; 789 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>; 790 status = "disabled"; 791 }; 792 793 uart6: serial@1e790000 { 794 compatible = "ns16550a"; 795 reg = <0x1e790000 0x20>; 796 reg-shift = <2>; 797 reg-io-width = <4>; 798 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 799 clocks = <&syscon ASPEED_CLK_GATE_UART6CLK>; 800 no-loopback-test; 801 pinctrl-names = "default"; 802 pinctrl-0 = <&pinctrl_uart6_default>; 803 804 status = "disabled"; 805 }; 806 807 uart7: serial@1e790100 { 808 compatible = "ns16550a"; 809 reg = <0x1e790100 0x20>; 810 reg-shift = <2>; 811 reg-io-width = <4>; 812 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 813 clocks = <&syscon ASPEED_CLK_GATE_UART7CLK>; 814 no-loopback-test; 815 pinctrl-names = "default"; 816 pinctrl-0 = <&pinctrl_uart7_default>; 817 818 status = "disabled"; 819 }; 820 821 uart8: serial@1e790200 { 822 compatible = "ns16550a"; 823 reg = <0x1e790200 0x20>; 824 reg-shift = <2>; 825 reg-io-width = <4>; 826 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 827 clocks = <&syscon ASPEED_CLK_GATE_UART8CLK>; 828 no-loopback-test; 829 pinctrl-names = "default"; 830 pinctrl-0 = <&pinctrl_uart8_default>; 831 832 status = "disabled"; 833 }; 834 835 uart9: serial@1e790300 { 836 compatible = "ns16550a"; 837 reg = <0x1e790300 0x20>; 838 reg-shift = <2>; 839 reg-io-width = <4>; 840 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 841 clocks = <&syscon ASPEED_CLK_GATE_UART9CLK>; 842 no-loopback-test; 843 pinctrl-names = "default"; 844 pinctrl-0 = <&pinctrl_uart9_default>; 845 846 status = "disabled"; 847 }; 848 849 i2c: bus@1e78a000 { 850 compatible = "simple-bus"; 851 #address-cells = <1>; 852 #size-cells = <1>; 853 ranges = <0 0x1e78a000 0x1000>; 854 }; 855 856 fsim0: fsi@1e79b000 { 857 #interrupt-cells = <1>; 858 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 859 reg = <0x1e79b000 0x94>; 860 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 861 pinctrl-names = "default"; 862 pinctrl-0 = <&pinctrl_fsi1_default>; 863 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 864 interrupt-controller; 865 status = "disabled"; 866 }; 867 868 fsim1: fsi@1e79b100 { 869 #interrupt-cells = <1>; 870 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 871 reg = <0x1e79b100 0x94>; 872 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 873 pinctrl-names = "default"; 874 pinctrl-0 = <&pinctrl_fsi2_default>; 875 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 876 interrupt-controller; 877 status = "disabled"; 878 }; 879 880 udma: dma-controller@1e79e000 { 881 compatible = "aspeed,ast2600-udma"; 882 reg = <0x1e79e000 0x1000>; 883 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 884 dma-channels = <28>; 885 #dma-cells = <1>; 886 status = "disabled"; 887 }; 888 }; 889 }; 890}; 891 892#include "aspeed-g6-pinctrl.dtsi" 893 894&i2c { 895 i2c0: i2c@80 { 896 #address-cells = <1>; 897 #size-cells = <0>; 898 reg = <0x80 0x80>; 899 compatible = "aspeed,ast2600-i2c-bus"; 900 clocks = <&syscon ASPEED_CLK_APB2>; 901 resets = <&syscon ASPEED_RESET_I2C>; 902 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 903 bus-frequency = <100000>; 904 pinctrl-names = "default"; 905 pinctrl-0 = <&pinctrl_i2c1_default>; 906 status = "disabled"; 907 }; 908 909 i2c1: i2c@100 { 910 #address-cells = <1>; 911 #size-cells = <0>; 912 reg = <0x100 0x80>; 913 compatible = "aspeed,ast2600-i2c-bus"; 914 clocks = <&syscon ASPEED_CLK_APB2>; 915 resets = <&syscon ASPEED_RESET_I2C>; 916 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 917 bus-frequency = <100000>; 918 pinctrl-names = "default"; 919 pinctrl-0 = <&pinctrl_i2c2_default>; 920 status = "disabled"; 921 }; 922 923 i2c2: i2c@180 { 924 #address-cells = <1>; 925 #size-cells = <0>; 926 reg = <0x180 0x80>; 927 compatible = "aspeed,ast2600-i2c-bus"; 928 clocks = <&syscon ASPEED_CLK_APB2>; 929 resets = <&syscon ASPEED_RESET_I2C>; 930 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 931 bus-frequency = <100000>; 932 pinctrl-names = "default"; 933 pinctrl-0 = <&pinctrl_i2c3_default>; 934 status = "disabled"; 935 }; 936 937 i2c3: i2c@200 { 938 #address-cells = <1>; 939 #size-cells = <0>; 940 reg = <0x200 0x80>; 941 compatible = "aspeed,ast2600-i2c-bus"; 942 clocks = <&syscon ASPEED_CLK_APB2>; 943 resets = <&syscon ASPEED_RESET_I2C>; 944 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 945 bus-frequency = <100000>; 946 pinctrl-names = "default"; 947 pinctrl-0 = <&pinctrl_i2c4_default>; 948 status = "disabled"; 949 }; 950 951 i2c4: i2c@280 { 952 #address-cells = <1>; 953 #size-cells = <0>; 954 reg = <0x280 0x80>; 955 compatible = "aspeed,ast2600-i2c-bus"; 956 clocks = <&syscon ASPEED_CLK_APB2>; 957 resets = <&syscon ASPEED_RESET_I2C>; 958 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 959 bus-frequency = <100000>; 960 pinctrl-names = "default"; 961 pinctrl-0 = <&pinctrl_i2c5_default>; 962 status = "disabled"; 963 }; 964 965 i2c5: i2c@300 { 966 #address-cells = <1>; 967 #size-cells = <0>; 968 reg = <0x300 0x80>; 969 compatible = "aspeed,ast2600-i2c-bus"; 970 clocks = <&syscon ASPEED_CLK_APB2>; 971 resets = <&syscon ASPEED_RESET_I2C>; 972 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 973 bus-frequency = <100000>; 974 pinctrl-names = "default"; 975 pinctrl-0 = <&pinctrl_i2c6_default>; 976 status = "disabled"; 977 }; 978 979 i2c6: i2c@380 { 980 #address-cells = <1>; 981 #size-cells = <0>; 982 reg = <0x380 0x80>; 983 compatible = "aspeed,ast2600-i2c-bus"; 984 clocks = <&syscon ASPEED_CLK_APB2>; 985 resets = <&syscon ASPEED_RESET_I2C>; 986 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 987 bus-frequency = <100000>; 988 pinctrl-names = "default"; 989 pinctrl-0 = <&pinctrl_i2c7_default>; 990 status = "disabled"; 991 }; 992 993 i2c7: i2c@400 { 994 #address-cells = <1>; 995 #size-cells = <0>; 996 reg = <0x400 0x80>; 997 compatible = "aspeed,ast2600-i2c-bus"; 998 clocks = <&syscon ASPEED_CLK_APB2>; 999 resets = <&syscon ASPEED_RESET_I2C>; 1000 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 1001 bus-frequency = <100000>; 1002 pinctrl-names = "default"; 1003 pinctrl-0 = <&pinctrl_i2c8_default>; 1004 status = "disabled"; 1005 }; 1006 1007 i2c8: i2c@480 { 1008 #address-cells = <1>; 1009 #size-cells = <0>; 1010 reg = <0x480 0x80>; 1011 compatible = "aspeed,ast2600-i2c-bus"; 1012 clocks = <&syscon ASPEED_CLK_APB2>; 1013 resets = <&syscon ASPEED_RESET_I2C>; 1014 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1015 bus-frequency = <100000>; 1016 pinctrl-names = "default"; 1017 pinctrl-0 = <&pinctrl_i2c9_default>; 1018 status = "disabled"; 1019 }; 1020 1021 i2c9: i2c@500 { 1022 #address-cells = <1>; 1023 #size-cells = <0>; 1024 reg = <0x500 0x80>; 1025 compatible = "aspeed,ast2600-i2c-bus"; 1026 clocks = <&syscon ASPEED_CLK_APB2>; 1027 resets = <&syscon ASPEED_RESET_I2C>; 1028 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 1029 bus-frequency = <100000>; 1030 pinctrl-names = "default"; 1031 pinctrl-0 = <&pinctrl_i2c10_default>; 1032 status = "disabled"; 1033 }; 1034 1035 i2c10: i2c@580 { 1036 #address-cells = <1>; 1037 #size-cells = <0>; 1038 reg = <0x580 0x80>; 1039 compatible = "aspeed,ast2600-i2c-bus"; 1040 clocks = <&syscon ASPEED_CLK_APB2>; 1041 resets = <&syscon ASPEED_RESET_I2C>; 1042 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 1043 bus-frequency = <100000>; 1044 pinctrl-names = "default"; 1045 pinctrl-0 = <&pinctrl_i2c11_default>; 1046 status = "disabled"; 1047 }; 1048 1049 i2c11: i2c@600 { 1050 #address-cells = <1>; 1051 #size-cells = <0>; 1052 reg = <0x600 0x80>; 1053 compatible = "aspeed,ast2600-i2c-bus"; 1054 clocks = <&syscon ASPEED_CLK_APB2>; 1055 resets = <&syscon ASPEED_RESET_I2C>; 1056 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 1057 bus-frequency = <100000>; 1058 pinctrl-names = "default"; 1059 pinctrl-0 = <&pinctrl_i2c12_default>; 1060 status = "disabled"; 1061 }; 1062 1063 i2c12: i2c@680 { 1064 #address-cells = <1>; 1065 #size-cells = <0>; 1066 reg = <0x680 0x80>; 1067 compatible = "aspeed,ast2600-i2c-bus"; 1068 clocks = <&syscon ASPEED_CLK_APB2>; 1069 resets = <&syscon ASPEED_RESET_I2C>; 1070 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 1071 bus-frequency = <100000>; 1072 pinctrl-names = "default"; 1073 pinctrl-0 = <&pinctrl_i2c13_default>; 1074 status = "disabled"; 1075 }; 1076 1077 i2c13: i2c@700 { 1078 #address-cells = <1>; 1079 #size-cells = <0>; 1080 reg = <0x700 0x80>; 1081 compatible = "aspeed,ast2600-i2c-bus"; 1082 clocks = <&syscon ASPEED_CLK_APB2>; 1083 resets = <&syscon ASPEED_RESET_I2C>; 1084 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 1085 bus-frequency = <100000>; 1086 pinctrl-names = "default"; 1087 pinctrl-0 = <&pinctrl_i2c14_default>; 1088 status = "disabled"; 1089 }; 1090 1091 i2c14: i2c@780 { 1092 #address-cells = <1>; 1093 #size-cells = <0>; 1094 reg = <0x780 0x80>; 1095 compatible = "aspeed,ast2600-i2c-bus"; 1096 clocks = <&syscon ASPEED_CLK_APB2>; 1097 resets = <&syscon ASPEED_RESET_I2C>; 1098 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; 1099 bus-frequency = <100000>; 1100 pinctrl-names = "default"; 1101 pinctrl-0 = <&pinctrl_i2c15_default>; 1102 status = "disabled"; 1103 }; 1104 1105 i2c15: i2c@800 { 1106 #address-cells = <1>; 1107 #size-cells = <0>; 1108 reg = <0x800 0x80>; 1109 compatible = "aspeed,ast2600-i2c-bus"; 1110 clocks = <&syscon ASPEED_CLK_APB2>; 1111 resets = <&syscon ASPEED_RESET_I2C>; 1112 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 1113 bus-frequency = <100000>; 1114 pinctrl-names = "default"; 1115 pinctrl-0 = <&pinctrl_i2c16_default>; 1116 status = "disabled"; 1117 }; 1118}; 1119