1// SPDX-License-Identifier: GPL-2.0-only 2// Copyright (c) 2022, Ampere Computing LLC 3 4/dts-v1/; 5 6#include "aspeed-g6.dtsi" 7#include <dt-bindings/i2c/i2c.h> 8#include <dt-bindings/gpio/aspeed-gpio.h> 9 10/ { 11 model = "Ampere Mt.Mitchell BMC"; 12 compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600"; 13 14 aliases { 15 serial7 = &uart8; 16 serial8 = &uart9; 17 18 /* 19 * I2C temperature alias port 20 */ 21 i2c20 = &i2c4_bus70_chn0; 22 i2c21 = &i2c4_bus70_chn1; 23 i2c22 = &i2c4_bus70_chn2; 24 i2c23 = &i2c4_bus70_chn3; 25 26 /* 27 * i2c bus 30-31 assigned to OCP slot 0-1 28 */ 29 i2c30 = &ocpslot_0; 30 i2c31 = &ocpslot_1; 31 32 /* 33 * i2c bus 32-33 assigned to Riser slot 0-1 34 */ 35 i2c32 = &i2c_riser0; 36 i2c33 = &i2c_riser1; 37 38 /* 39 * i2c bus 38-39 assigned to FRU on Riser slot 0-1 40 */ 41 i2c38 = &i2c_riser0_chn_0; 42 i2c39 = &i2c_riser1_chn_0; 43 44 /* 45 * I2C NVMe alias port 46 */ 47 i2c100 = &backplane_0; 48 i2c48 = &nvmeslot_0; 49 i2c49 = &nvmeslot_1; 50 i2c50 = &nvmeslot_2; 51 i2c51 = &nvmeslot_3; 52 i2c52 = &nvmeslot_4; 53 i2c53 = &nvmeslot_5; 54 i2c54 = &nvmeslot_6; 55 i2c55 = &nvmeslot_7; 56 57 i2c101 = &backplane_1; 58 i2c56 = &nvmeslot_8; 59 i2c57 = &nvmeslot_9; 60 i2c58 = &nvmeslot_10; 61 i2c59 = &nvmeslot_11; 62 i2c60 = &nvmeslot_12; 63 i2c61 = &nvmeslot_13; 64 i2c62 = &nvmeslot_14; 65 i2c63 = &nvmeslot_15; 66 67 i2c102 = &backplane_2; 68 i2c64 = &nvmeslot_16; 69 i2c65 = &nvmeslot_17; 70 i2c66 = &nvmeslot_18; 71 i2c67 = &nvmeslot_19; 72 i2c68 = &nvmeslot_20; 73 i2c69 = &nvmeslot_21; 74 i2c70 = &nvmeslot_22; 75 i2c71 = &nvmeslot_23; 76 77 i2c80 = &nvme_m2_0; 78 i2c81 = &nvme_m2_1; 79 }; 80 81 chosen { 82 stdout-path = &uart5; 83 }; 84 85 memory@80000000 { 86 device_type = "memory"; 87 reg = <0x80000000 0x80000000>; 88 }; 89 90 reserved-memory { 91 #address-cells = <1>; 92 #size-cells = <1>; 93 ranges; 94 95 gfx_memory: framebuffer { 96 size = <0x01000000>; 97 alignment = <0x01000000>; 98 compatible = "shared-dma-pool"; 99 reusable; 100 }; 101 102 video_engine_memory: video { 103 size = <0x04000000>; 104 alignment = <0x01000000>; 105 compatible = "shared-dma-pool"; 106 reusable; 107 }; 108 109 vga_memory: region@bf000000 { 110 no-map; 111 compatible = "shared-dma-pool"; 112 reg = <0xbf000000 0x01000000>; /* 16M */ 113 }; 114 }; 115 116 voltage_mon_reg: voltage-mon-regulator { 117 compatible = "regulator-fixed"; 118 regulator-name = "ltc2497_reg"; 119 regulator-min-microvolt = <3300000>; 120 regulator-max-microvolt = <3300000>; 121 regulator-always-on; 122 }; 123 124 gpioI5mux: mux-controller { 125 compatible = "gpio-mux"; 126 #mux-control-cells = <0>; 127 mux-gpios = <&gpio0 ASPEED_GPIO(I, 5) GPIO_ACTIVE_HIGH>; 128 }; 129 130 adc0mux: adc0mux { 131 compatible = "io-channel-mux"; 132 io-channels = <&adc_i2c_0 0>; 133 #io-channel-cells = <1>; 134 io-channel-names = "parent"; 135 mux-controls = <&gpioI5mux>; 136 settle-time-us = <10000>; 137 channels = "s0", "s1"; 138 }; 139 140 adc1mux: adc1mux { 141 compatible = "io-channel-mux"; 142 io-channels = <&adc_i2c_0 1>; 143 #io-channel-cells = <1>; 144 io-channel-names = "parent"; 145 mux-controls = <&gpioI5mux>; 146 settle-time-us = <10000>; 147 channels = "s0", "s1"; 148 }; 149 150 adc2mux: adc2mux { 151 compatible = "io-channel-mux"; 152 io-channels = <&adc_i2c_0 2>; 153 #io-channel-cells = <1>; 154 io-channel-names = "parent"; 155 mux-controls = <&gpioI5mux>; 156 settle-time-us = <10000>; 157 channels = "s0", "s1"; 158 }; 159 160 adc3mux: adc3mux { 161 compatible = "io-channel-mux"; 162 io-channels = <&adc_i2c_0 3>; 163 #io-channel-cells = <1>; 164 io-channel-names = "parent"; 165 mux-controls = <&gpioI5mux>; 166 settle-time-us = <10000>; 167 channels = "s0", "s1"; 168 }; 169 170 adc4mux: adc4mux { 171 compatible = "io-channel-mux"; 172 io-channels = <&adc_i2c_0 4>; 173 #io-channel-cells = <1>; 174 io-channel-names = "parent"; 175 mux-controls = <&gpioI5mux>; 176 settle-time-us = <10000>; 177 channels = "s0", "s1"; 178 }; 179 180 adc5mux: adc5mux { 181 compatible = "io-channel-mux"; 182 io-channels = <&adc_i2c_0 5>; 183 #io-channel-cells = <1>; 184 io-channel-names = "parent"; 185 mux-controls = <&gpioI5mux>; 186 settle-time-us = <10000>; 187 channels = "s0", "s1"; 188 }; 189 190 adc6mux: adc6mux { 191 compatible = "io-channel-mux"; 192 io-channels = <&adc_i2c_0 6>; 193 #io-channel-cells = <1>; 194 io-channel-names = "parent"; 195 mux-controls = <&gpioI5mux>; 196 settle-time-us = <10000>; 197 channels = "s0", "s1"; 198 }; 199 200 adc7mux: adc7mux { 201 compatible = "io-channel-mux"; 202 io-channels = <&adc_i2c_0 7>; 203 #io-channel-cells = <1>; 204 io-channel-names = "parent"; 205 mux-controls = <&gpioI5mux>; 206 settle-time-us = <10000>; 207 channels = "s0", "s1"; 208 }; 209 210 adc8mux: adc8mux { 211 compatible = "io-channel-mux"; 212 io-channels = <&adc_i2c_0 8>; 213 #io-channel-cells = <1>; 214 io-channel-names = "parent"; 215 mux-controls = <&gpioI5mux>; 216 settle-time-us = <10000>; 217 channels = "s0", "s1"; 218 }; 219 220 adc9mux: adc9mux { 221 compatible = "io-channel-mux"; 222 io-channels = <&adc_i2c_0 9>; 223 #io-channel-cells = <1>; 224 io-channel-names = "parent"; 225 mux-controls = <&gpioI5mux>; 226 settle-time-us = <10000>; 227 channels = "s0", "s1"; 228 }; 229 230 adc10mux: adc10mux { 231 compatible = "io-channel-mux"; 232 io-channels = <&adc_i2c_0 10>; 233 #io-channel-cells = <1>; 234 io-channel-names = "parent"; 235 mux-controls = <&gpioI5mux>; 236 settle-time-us = <10000>; 237 channels = "s0", "s1"; 238 }; 239 240 adc11mux: adc11mux { 241 compatible = "io-channel-mux"; 242 io-channels = <&adc_i2c_0 11>; 243 #io-channel-cells = <1>; 244 io-channel-names = "parent"; 245 mux-controls = <&gpioI5mux>; 246 settle-time-us = <10000>; 247 channels = "s0", "s1"; 248 }; 249 250 adc12mux: adc12mux { 251 compatible = "io-channel-mux"; 252 io-channels = <&adc_i2c_0 12>; 253 #io-channel-cells = <1>; 254 io-channel-names = "parent"; 255 mux-controls = <&gpioI5mux>; 256 settle-time-us = <10000>; 257 channels = "s0", "s1"; 258 }; 259 260 adc13mux: adc13mux { 261 compatible = "io-channel-mux"; 262 io-channels = <&adc_i2c_0 13>; 263 #io-channel-cells = <1>; 264 io-channel-names = "parent"; 265 mux-controls = <&gpioI5mux>; 266 settle-time-us = <10000>; 267 channels = "s0", "s1"; 268 }; 269 270 adc14mux: adc14mux { 271 compatible = "io-channel-mux"; 272 io-channels = <&adc_i2c_0 14>; 273 #io-channel-cells = <1>; 274 io-channel-names = "parent"; 275 mux-controls = <&gpioI5mux>; 276 settle-time-us = <10000>; 277 channels = "s0", "s1"; 278 }; 279 280 adc15mux: adc15mux { 281 compatible = "io-channel-mux"; 282 io-channels = <&adc_i2c_0 15>; 283 #io-channel-cells = <1>; 284 io-channel-names = "parent"; 285 mux-controls = <&gpioI5mux>; 286 settle-time-us = <10000>; 287 channels = "s0", "s1"; 288 }; 289 290 iio-hwmon { 291 compatible = "iio-hwmon"; 292 io-channels = <&adc0mux 0>, <&adc0mux 1>, 293 <&adc1mux 0>, <&adc1mux 1>, 294 <&adc2mux 0>, <&adc2mux 1>, 295 <&adc3mux 0>, <&adc3mux 1>, 296 <&adc4mux 0>, <&adc4mux 1>, 297 <&adc5mux 0>, <&adc5mux 1>, 298 <&adc6mux 0>, <&adc6mux 1>, 299 <&adc7mux 0>, <&adc7mux 1>, 300 <&adc8mux 0>, <&adc8mux 1>, 301 <&adc9mux 0>, <&adc9mux 1>, 302 <&adc10mux 0>, <&adc10mux 1>, 303 <&adc11mux 0>, <&adc11mux 1>, 304 <&adc12mux 0>, <&adc12mux 1>, 305 <&adc13mux 0>, <&adc13mux 1>, 306 <&adc14mux 0>, <&adc14mux 1>, 307 <&adc15mux 0>, <&adc15mux 1>, 308 <&adc_i2c_1 0>, <&adc_i2c_1 1>, 309 <&adc_i2c_1 2>, <&adc_i2c_1 3>, 310 <&adc_i2c_1 4>, <&adc_i2c_1 5>, 311 <&adc_i2c_1 6>, <&adc_i2c_1 7>, 312 <&adc_i2c_1 8>, <&adc_i2c_1 9>, 313 <&adc_i2c_1 10>, <&adc_i2c_1 11>, 314 <&adc_i2c_1 12>, <&adc_i2c_1 13>, 315 <&adc_i2c_1 14>, <&adc_i2c_1 15>, 316 <&adc0 0>, <&adc0 1>, 317 <&adc0 2>; 318 }; 319}; 320 321&mdio0 { 322 status = "okay"; 323 324 ethphy0: ethernet-phy@0 { 325 compatible = "ethernet-phy-ieee802.3-c22"; 326 reg = <0>; 327 }; 328}; 329 330&mac0 { 331 status = "okay"; 332 333 phy-mode = "rgmii"; 334 phy-handle = <ðphy0>; 335 336 pinctrl-names = "default"; 337 pinctrl-0 = <&pinctrl_rgmii1_default>; 338}; 339 340&mac3 { 341 status = "okay"; 342 pinctrl-names = "default"; 343 pinctrl-0 = <&pinctrl_rmii4_default>; 344 clock-names = "MACCLK", "RCLK"; 345 use-ncsi; 346}; 347 348&fmc { 349 status = "okay"; 350 flash@0 { 351 status = "okay"; 352 m25p,fast-read; 353 label = "bmc"; 354 spi-max-frequency = <50000000>; 355#include "openbmc-flash-layout-64.dtsi" 356 }; 357 358 flash@1 { 359 status = "okay"; 360 m25p,fast-read; 361 label = "alt-bmc"; 362 spi-max-frequency = <50000000>; 363#include "openbmc-flash-layout-64-alt.dtsi" 364 }; 365}; 366 367&spi1 { 368 status = "okay"; 369 pinctrl-names = "default"; 370 pinctrl-0 = <&pinctrl_spi1_default>; 371 372 flash@0 { 373 status = "okay"; 374 m25p,fast-read; 375 label = "pnor"; 376 spi-max-frequency = <20000000>; 377 }; 378}; 379 380&uart1 { 381 status = "okay"; 382}; 383 384&uart2 { 385 status = "okay"; 386}; 387 388&uart3 { 389 status = "okay"; 390}; 391 392&uart4 { 393 status = "okay"; 394}; 395 396&uart8 { 397 status = "okay"; 398}; 399 400&uart9 { 401 status = "okay"; 402}; 403 404&i2c0 { 405 status = "okay"; 406 407 temperature-sensor@2e { 408 compatible = "adi,adt7490"; 409 reg = <0x2e>; 410 }; 411}; 412 413&i2c1 { 414 status = "okay"; 415}; 416 417&i2c2 { 418 status = "okay"; 419 420 psu@58 { 421 compatible = "pmbus"; 422 reg = <0x58>; 423 }; 424 425 psu@59 { 426 compatible = "pmbus"; 427 reg = <0x59>; 428 }; 429}; 430 431&i2c3 { 432 status = "okay"; 433 bus-frequency = <1000000>; 434 multi-master; 435 mctp-controller; 436 437 mctp@10 { 438 compatible = "mctp-i2c-controller"; 439 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 440 }; 441}; 442 443&i2c4 { 444 status = "okay"; 445 446 adc_i2c_0: adc@14 { 447 compatible = "lltc,ltc2497"; 448 reg = <0x14>; 449 vref-supply = <&voltage_mon_reg>; 450 #io-channel-cells = <1>; 451 }; 452 453 adc_i2c_1: adc@16 { 454 compatible = "lltc,ltc2497"; 455 reg = <0x16>; 456 vref-supply = <&voltage_mon_reg>; 457 #io-channel-cells = <1>; 458 }; 459 460 eeprom@50 { 461 compatible = "atmel,24c64"; 462 reg = <0x50>; 463 pagesize = <32>; 464 }; 465 466 i2c-mux@70 { 467 compatible = "nxp,pca9545"; 468 #address-cells = <1>; 469 #size-cells = <0>; 470 reg = <0x70>; 471 i2c-mux-idle-disconnect; 472 473 i2c4_bus70_chn0: i2c@0 { 474 #address-cells = <1>; 475 #size-cells = <0>; 476 reg = <0x0>; 477 478 outlet_temp1: temperature-sensor@48 { 479 compatible = "ti,tmp75"; 480 reg = <0x48>; 481 }; 482 psu1_inlet_temp2: temperature-sensor@49 { 483 compatible = "ti,tmp75"; 484 reg = <0x49>; 485 }; 486 }; 487 488 i2c4_bus70_chn1: i2c@1 { 489 #address-cells = <1>; 490 #size-cells = <0>; 491 reg = <0x1>; 492 493 pcie_zone_temp1: temperature-sensor@48 { 494 compatible = "ti,tmp75"; 495 reg = <0x48>; 496 }; 497 psu0_inlet_temp2: temperature-sensor@49 { 498 compatible = "ti,tmp75"; 499 reg = <0x49>; 500 }; 501 }; 502 503 i2c4_bus70_chn2: i2c@2 { 504 #address-cells = <1>; 505 #size-cells = <0>; 506 reg = <0x2>; 507 508 pcie_zone_temp2: temperature-sensor@48 { 509 compatible = "ti,tmp75"; 510 reg = <0x48>; 511 }; 512 outlet_temp2: temperature-sensor@49 { 513 compatible = "ti,tmp75"; 514 reg = <0x49>; 515 }; 516 }; 517 518 i2c4_bus70_chn3: i2c@3 { 519 #address-cells = <1>; 520 #size-cells = <0>; 521 reg = <0x3>; 522 523 mb_inlet_temp1: temperature-sensor@7c { 524 compatible = "microchip,emc1413"; 525 reg = <0x7c>; 526 }; 527 mb_inlet_temp2: temperature-sensor@4c { 528 compatible = "microchip,emc1413"; 529 reg = <0x4c>; 530 }; 531 }; 532 }; 533}; 534 535&i2c5 { 536 status = "okay"; 537 538 i2c-mux@70 { 539 compatible = "nxp,pca9548"; 540 #address-cells = <1>; 541 #size-cells = <0>; 542 reg = <0x70>; 543 i2c-mux-idle-disconnect; 544 545 ocpslot_0: i2c@0 { 546 #address-cells = <1>; 547 #size-cells = <0>; 548 reg = <0x0>; 549 550 ocpslot_0_temp: temperature-sensor@1f { 551 compatible = "ti,tmp421"; 552 reg = <0x1f>; 553 }; 554 }; 555 556 ocpslot_1: i2c@1 { 557 #address-cells = <1>; 558 #size-cells = <0>; 559 reg = <0x1>; 560 561 ocpslot_1_temp: temperature-sensor@1f { 562 compatible = "ti,tmp421"; 563 reg = <0x1f>; 564 }; 565 }; 566 567 i2c_riser0: i2c@2 { 568 #address-cells = <1>; 569 #size-cells = <0>; 570 reg = <0x2>; 571 572 i2c-mux@72 { 573 compatible = "nxp,pca9546"; 574 #address-cells = <1>; 575 #size-cells = <0>; 576 reg = <0x72>; 577 i2c-mux-idle-disconnect; 578 579 i2c_riser0_chn_0: i2c@0 { 580 #address-cells = <1>; 581 #size-cells = <0>; 582 reg = <0x0>; 583 584 eeprom@50 { 585 compatible = "atmel,24c02"; 586 reg = <0x50>; 587 pagesize = <16>; 588 }; 589 }; 590 }; 591 }; 592 593 i2c_riser1: i2c@3 { 594 #address-cells = <1>; 595 #size-cells = <0>; 596 reg = <0x3>; 597 598 i2c-mux@72 { 599 compatible = "nxp,pca9546"; 600 #address-cells = <1>; 601 #size-cells = <0>; 602 reg = <0x72>; 603 i2c-mux-idle-disconnect; 604 605 i2c_riser1_chn_0: i2c@0 { 606 #address-cells = <1>; 607 #size-cells = <0>; 608 reg = <0x0>; 609 610 eeprom@50 { 611 compatible = "atmel,24c02"; 612 reg = <0x50>; 613 pagesize = <16>; 614 }; 615 }; 616 }; 617 }; 618 }; 619}; 620 621&i2c6 { 622 status = "okay"; 623 rtc@51 { 624 compatible = "nxp,pcf85063a"; 625 reg = <0x51>; 626 }; 627}; 628 629&i2c7 { 630 status = "okay"; 631}; 632 633&i2c8 { 634 status = "okay"; 635 636 temperature-sensor@48 { 637 compatible = "ti,tmp112"; 638 reg = <0x48>; 639 }; 640 641 gpio@77 { 642 compatible = "nxp,pca9539"; 643 reg = <0x77>; 644 gpio-controller; 645 #address-cells = <1>; 646 #size-cells = <0>; 647 #gpio-cells = <2>; 648 649 bmc-ocp0-en-hog { 650 gpio-hog; 651 gpios = <7 GPIO_ACTIVE_LOW>; 652 output-high; 653 line-name = "bmc-ocp0-en-n"; 654 }; 655 }; 656}; 657 658&i2c9 { 659 status = "okay"; 660 i2c-mux@70 { 661 compatible = "nxp,pca9548"; 662 #address-cells = <1>; 663 #size-cells = <0>; 664 reg = <0x70>; 665 i2c-mux-idle-disconnect; 666 667 backplane_1: i2c@0 { 668 #address-cells = <1>; 669 #size-cells = <0>; 670 reg = <0x0>; 671 672 eeprom@50 { 673 compatible = "atmel,24c64"; 674 reg = <0x50>; 675 pagesize = <32>; 676 }; 677 678 i2c-mux@71 { 679 compatible = "nxp,pca9548"; 680 #address-cells = <1>; 681 #size-cells = <0>; 682 reg = <0x71>; 683 i2c-mux-idle-disconnect; 684 685 nvmeslot_8: i2c@0 { 686 #address-cells = <1>; 687 #size-cells = <0>; 688 reg = <0x0>; 689 }; 690 nvmeslot_9: i2c@1 { 691 #address-cells = <1>; 692 #size-cells = <0>; 693 reg = <0x1>; 694 }; 695 nvmeslot_10: i2c@2 { 696 #address-cells = <1>; 697 #size-cells = <0>; 698 reg = <0x2>; 699 }; 700 nvmeslot_11: i2c@3 { 701 #address-cells = <1>; 702 #size-cells = <0>; 703 reg = <0x3>; 704 }; 705 nvmeslot_12: i2c@4 { 706 #address-cells = <1>; 707 #size-cells = <0>; 708 reg = <0x4>; 709 }; 710 nvmeslot_13: i2c@5 { 711 #address-cells = <1>; 712 #size-cells = <0>; 713 reg = <0x5>; 714 }; 715 nvmeslot_14: i2c@6 { 716 #address-cells = <1>; 717 #size-cells = <0>; 718 reg = <0x6>; 719 }; 720 nvmeslot_15: i2c@7 { 721 #address-cells = <1>; 722 #size-cells = <0>; 723 reg = <0x7>; 724 }; 725 }; 726 727 tmp432@4c { 728 compatible = "ti,tmp75"; 729 reg = <0x4c>; 730 }; 731 }; 732 733 backplane_2: i2c@2 { 734 #address-cells = <1>; 735 #size-cells = <0>; 736 reg = <0x2>; 737 738 eeprom@50 { 739 compatible = "atmel,24c64"; 740 reg = <0x50>; 741 pagesize = <32>; 742 }; 743 744 i2c-mux@71 { 745 compatible = "nxp,pca9548"; 746 #address-cells = <1>; 747 #size-cells = <0>; 748 reg = <0x71>; 749 i2c-mux-idle-disconnect; 750 751 nvmeslot_16: i2c@0 { 752 #address-cells = <1>; 753 #size-cells = <0>; 754 reg = <0x0>; 755 }; 756 nvmeslot_17: i2c@1 { 757 #address-cells = <1>; 758 #size-cells = <0>; 759 reg = <0x1>; 760 }; 761 nvmeslot_18: i2c@2 { 762 #address-cells = <1>; 763 #size-cells = <0>; 764 reg = <0x2>; 765 }; 766 nvmeslot_19: i2c@3 { 767 #address-cells = <1>; 768 #size-cells = <0>; 769 reg = <0x3>; 770 }; 771 nvmeslot_20: i2c@4 { 772 #address-cells = <1>; 773 #size-cells = <0>; 774 reg = <0x4>; 775 }; 776 nvmeslot_21: i2c@5 { 777 #address-cells = <1>; 778 #size-cells = <0>; 779 reg = <0x5>; 780 }; 781 nvmeslot_22: i2c@6 { 782 #address-cells = <1>; 783 #size-cells = <0>; 784 reg = <0x6>; 785 }; 786 nvmeslot_23: i2c@7 { 787 #address-cells = <1>; 788 #size-cells = <0>; 789 reg = <0x7>; 790 }; 791 }; 792 793 tmp432@4c { 794 compatible = "ti,tmp75"; 795 reg = <0x4c>; 796 }; 797 }; 798 799 backplane_0: i2c@4 { 800 #address-cells = <1>; 801 #size-cells = <0>; 802 reg = <0x4>; 803 804 eeprom@50 { 805 compatible = "atmel,24c64"; 806 reg = <0x50>; 807 pagesize = <32>; 808 }; 809 810 i2c-mux@71 { 811 compatible = "nxp,pca9548"; 812 #address-cells = <1>; 813 #size-cells = <0>; 814 reg = <0x71>; 815 i2c-mux-idle-disconnect; 816 817 nvmeslot_0: i2c@0 { 818 #address-cells = <1>; 819 #size-cells = <0>; 820 reg = <0x0>; 821 }; 822 nvmeslot_1: i2c@1 { 823 #address-cells = <1>; 824 #size-cells = <0>; 825 reg = <0x1>; 826 }; 827 nvmeslot_2: i2c@2 { 828 #address-cells = <1>; 829 #size-cells = <0>; 830 reg = <0x2>; 831 }; 832 nvmeslot_3: i2c@3 { 833 #address-cells = <1>; 834 #size-cells = <0>; 835 reg = <0x3>; 836 }; 837 nvmeslot_4: i2c@4 { 838 #address-cells = <1>; 839 #size-cells = <0>; 840 reg = <0x4>; 841 }; 842 nvmeslot_5: i2c@5 { 843 #address-cells = <1>; 844 #size-cells = <0>; 845 reg = <0x5>; 846 }; 847 nvmeslot_6: i2c@6 { 848 #address-cells = <1>; 849 #size-cells = <0>; 850 reg = <0x6>; 851 }; 852 nvmeslot_7: i2c@7 { 853 #address-cells = <1>; 854 #size-cells = <0>; 855 reg = <0x7>; 856 }; 857 }; 858 859 tmp432@4c { 860 compatible = "ti,tmp75"; 861 reg = <0x4c>; 862 }; 863 }; 864 865 i2c@7 { 866 #address-cells = <1>; 867 #size-cells = <0>; 868 reg = <0x7>; 869 870 i2c-mux@71 { 871 compatible = "nxp,pca9546"; 872 #address-cells = <1>; 873 #size-cells = <0>; 874 reg = <0x71>; 875 i2c-mux-idle-disconnect; 876 877 nvme_m2_0: i2c@0 { 878 #address-cells = <1>; 879 #size-cells = <0>; 880 reg = <0x0>; 881 }; 882 883 nvme_m2_1: i2c@1 { 884 #address-cells = <1>; 885 #size-cells = <0>; 886 reg = <0x1>; 887 }; 888 }; 889 }; 890 }; 891}; 892 893&i2c10 { 894 status = "okay"; 895}; 896 897&i2c11 { 898 status = "okay"; 899 ssif-bmc@10 { 900 compatible = "ssif-bmc"; 901 reg = <0x10>; 902 }; 903}; 904 905&i2c14 { 906 status = "okay"; 907 eeprom@50 { 908 compatible = "atmel,24c64"; 909 reg = <0x50>; 910 pagesize = <32>; 911 }; 912 913 bmc_ast2600_cpu: temperature-sensor@35 { 914 compatible = "ti,tmp175"; 915 reg = <0x35>; 916 }; 917}; 918 919&i2c15 { 920 status = "okay"; 921 gpio_expander1: gpio-expander@22 { 922 compatible = "nxp,pca9535"; 923 reg = <0x22>; 924 gpio-controller; 925 #gpio-cells = <2>; 926 gpio-line-names = 927 "fan-fault","psu-fault", 928 "","", 929 "","", 930 "","", 931 "","", 932 "","", 933 "","", 934 "",""; 935 }; 936}; 937 938&adc0 { 939 status = "okay"; 940 941 pinctrl-names = "default"; 942 pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default 943 &pinctrl_adc2_default>; 944}; 945 946&vhub { 947 status = "okay"; 948}; 949 950&video { 951 status = "okay"; 952 memory-region = <&video_engine_memory>; 953}; 954 955&gpio0 { 956 gpio-line-names = 957 /*A0-A7*/ "","","","","","i2c2-reset-n","i2c6-reset-n","i2c4-reset-n", 958 /*B0-B7*/ "","","","","host0-sysreset-n","host0-pmin-n","","", 959 /*C0-C7*/ "s0-vrd-fault-n","s1-vrd-fault-n","bmc-debug-mode","", 960 "irq-n","","vrd-sel","spd-sel", 961 /*D0-D7*/ "presence-ps0","presence-ps1","hsc-12vmain-alt2-n","ext-high-temp-n", 962 "","bmc-ncsi-txen","","", 963 /*E0-E7*/ "","eth-phy-int-n","clk50m-bmc-ncsi","","","","","", 964 /*F0-F7*/ "s0-pcp-oc-warn-n","s1-pcp-oc-warn-n","power-chassis-control", 965 "cpu-bios-recover","s0-heartbeat","hs-csout-prochot", 966 "s0-vr-hot-n","s1-vr-hot-n", 967 /*G0-G7*/ "","","hsc-12vmain-alt1-n","","","","","", 968 /*H0-H7*/ "jtag-program-sel","fpga-program-b","wd-disable-n", 969 "power-chassis-good","","","","", 970 /*I0-I7*/ "","","","","","adc-sw","power-button","rtc-battery-voltage-read-enable", 971 /*J0-J7*/ "","","","","","","","", 972 /*K0-K7*/ "","","","","","","","", 973 /*L0-L7*/ "","","","","","","","", 974 /*M0-M7*/ "","s0-ddr-save","soc-spi-nor-access","presence-cpu0", 975 "s0-rtc-lock","","","", 976 /*N0-N7*/ "hpm-fw-recovery","hpm-stby-rst-n","jtag-sel-s0","led-sw-hb", 977 "jtag-dbgr-prsnt-n","s1-heartbeat","","", 978 /*O0-O7*/ "","","","","","","","", 979 /*P0-P7*/ "ps0-ac-loss-n","ps1-ac-loss-n","","", 980 "led-fault","cpld-user-mode","jtag-srst-n","led-bmc-hb", 981 /*Q0-Q7*/ "","","","","","","","", 982 /*R0-R7*/ "","","","","","","","", 983 /*S0-S7*/ "","","identify-button","led-identify", 984 "s1-ddr-save","spi-nor-access","host0-ready","presence-cpu1", 985 /*T0-T7*/ "","","","","","","","", 986 /*U0-U7*/ "","","","","","","","", 987 /*V0-V7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n", 988 "host0-reboot-ack-n","s0-fw-boot-ok","host0-shd-req-n", 989 "host0-shd-ack-n","s0-overtemp-n", 990 /*W0-W7*/ "ocp-aux-pwren","ocp-main-pwren","ocp-pgood","s1-pcp-pgood", 991 "bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel", 992 /*X0-X7*/ "i2c-backup-sel","s1-fault-alert","s1-fw-boot-ok", 993 "s1-hightemp-n","s0-spi-auth-fail-n","s1-sys-auth-failure-n", 994 "s1-overtemp-n","cpld-s1-spi-auth-fail-n", 995 /*Y0-Y7*/ "","","","","","","","host0-special-boot", 996 /*Z0-Z7*/ "reset-button","ps0-pgood","ps1-pgood","","","","",""; 997 998 ocp-aux-pwren-hog { 999 gpio-hog; 1000 gpios = <ASPEED_GPIO(W, 0) GPIO_ACTIVE_HIGH>; 1001 output-high; 1002 line-name = "ocp-aux-pwren"; 1003 }; 1004}; 1005 1006&gpio1 { 1007 gpio-line-names = 1008 /*18A0-18A7*/ "","","","","","","","", 1009 /*18B0-18B7*/ "","","","","","","s0-soc-pgood","", 1010 /*18C0-18C7*/ "uart1-mode0","uart1-mode1","uart2-mode0","uart2-mode1", 1011 "uart3-mode0","uart3-mode1","uart4-mode0","uart4-mode1", 1012 /*18D0-18D7*/ "","","","","","","","", 1013 /*18E0-18E3*/ "","","",""; 1014}; 1015