xref: /linux/scripts/dtc/include-prefixes/arm/aspeed/aspeed-bmc-ampere-mtmitchell.dts (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only
2*724ba675SRob Herring// Copyright (c) 2022, Ampere Computing LLC
3*724ba675SRob Herring
4*724ba675SRob Herring/dts-v1/;
5*724ba675SRob Herring
6*724ba675SRob Herring#include "aspeed-g6.dtsi"
7*724ba675SRob Herring#include <dt-bindings/gpio/aspeed-gpio.h>
8*724ba675SRob Herring
9*724ba675SRob Herring/ {
10*724ba675SRob Herring	model = "Ampere Mt.Mitchell BMC";
11*724ba675SRob Herring	compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600";
12*724ba675SRob Herring
13*724ba675SRob Herring	chosen {
14*724ba675SRob Herring		stdout-path = &uart5;
15*724ba675SRob Herring	};
16*724ba675SRob Herring
17*724ba675SRob Herring	memory@80000000 {
18*724ba675SRob Herring		device_type = "memory";
19*724ba675SRob Herring		reg = <0x80000000 0x80000000>;
20*724ba675SRob Herring	};
21*724ba675SRob Herring
22*724ba675SRob Herring	reserved-memory {
23*724ba675SRob Herring		#address-cells = <1>;
24*724ba675SRob Herring		#size-cells = <1>;
25*724ba675SRob Herring		ranges;
26*724ba675SRob Herring
27*724ba675SRob Herring		gfx_memory: framebuffer {
28*724ba675SRob Herring			size = <0x01000000>;
29*724ba675SRob Herring			alignment = <0x01000000>;
30*724ba675SRob Herring			compatible = "shared-dma-pool";
31*724ba675SRob Herring			reusable;
32*724ba675SRob Herring		};
33*724ba675SRob Herring
34*724ba675SRob Herring		video_engine_memory: video {
35*724ba675SRob Herring			size = <0x04000000>;
36*724ba675SRob Herring			alignment = <0x01000000>;
37*724ba675SRob Herring			compatible = "shared-dma-pool";
38*724ba675SRob Herring			reusable;
39*724ba675SRob Herring		};
40*724ba675SRob Herring
41*724ba675SRob Herring		vga_memory: region@bf000000 {
42*724ba675SRob Herring			no-map;
43*724ba675SRob Herring			compatible = "shared-dma-pool";
44*724ba675SRob Herring			reg = <0xbf000000 0x01000000>;  /* 16M */
45*724ba675SRob Herring		};
46*724ba675SRob Herring	};
47*724ba675SRob Herring
48*724ba675SRob Herring	voltage_mon_reg: voltage-mon-regulator {
49*724ba675SRob Herring		compatible = "regulator-fixed";
50*724ba675SRob Herring		regulator-name = "ltc2497_reg";
51*724ba675SRob Herring		regulator-min-microvolt = <3300000>;
52*724ba675SRob Herring		regulator-max-microvolt = <3300000>;
53*724ba675SRob Herring		regulator-always-on;
54*724ba675SRob Herring	};
55*724ba675SRob Herring
56*724ba675SRob Herring	gpioI5mux: mux-controller {
57*724ba675SRob Herring		compatible = "gpio-mux";
58*724ba675SRob Herring		#mux-control-cells = <0>;
59*724ba675SRob Herring		mux-gpios = <&gpio0 ASPEED_GPIO(I, 5) GPIO_ACTIVE_HIGH>;
60*724ba675SRob Herring	};
61*724ba675SRob Herring
62*724ba675SRob Herring	adc0mux: adc0mux {
63*724ba675SRob Herring		compatible = "io-channel-mux";
64*724ba675SRob Herring		io-channels = <&adc0 0>;
65*724ba675SRob Herring		#io-channel-cells = <1>;
66*724ba675SRob Herring		io-channel-names = "parent";
67*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
68*724ba675SRob Herring		channels = "s0", "s1";
69*724ba675SRob Herring	};
70*724ba675SRob Herring
71*724ba675SRob Herring	adc1mux: adc1mux {
72*724ba675SRob Herring		compatible = "io-channel-mux";
73*724ba675SRob Herring		io-channels = <&adc0 1>;
74*724ba675SRob Herring		#io-channel-cells = <1>;
75*724ba675SRob Herring		io-channel-names = "parent";
76*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
77*724ba675SRob Herring		channels = "s0", "s1";
78*724ba675SRob Herring	};
79*724ba675SRob Herring
80*724ba675SRob Herring	adc2mux: adc2mux {
81*724ba675SRob Herring		compatible = "io-channel-mux";
82*724ba675SRob Herring		io-channels = <&adc0 2>;
83*724ba675SRob Herring		#io-channel-cells = <1>;
84*724ba675SRob Herring		io-channel-names = "parent";
85*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
86*724ba675SRob Herring		channels = "s0", "s1";
87*724ba675SRob Herring	};
88*724ba675SRob Herring
89*724ba675SRob Herring	adc3mux: adc3mux {
90*724ba675SRob Herring		compatible = "io-channel-mux";
91*724ba675SRob Herring		io-channels = <&adc0 3>;
92*724ba675SRob Herring		#io-channel-cells = <1>;
93*724ba675SRob Herring		io-channel-names = "parent";
94*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
95*724ba675SRob Herring		channels = "s0", "s1";
96*724ba675SRob Herring	};
97*724ba675SRob Herring
98*724ba675SRob Herring	adc4mux: adc4mux {
99*724ba675SRob Herring		compatible = "io-channel-mux";
100*724ba675SRob Herring		io-channels = <&adc0 4>;
101*724ba675SRob Herring		#io-channel-cells = <1>;
102*724ba675SRob Herring		io-channel-names = "parent";
103*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
104*724ba675SRob Herring		channels = "s0", "s1";
105*724ba675SRob Herring	};
106*724ba675SRob Herring
107*724ba675SRob Herring	adc5mux: adc5mux {
108*724ba675SRob Herring		compatible = "io-channel-mux";
109*724ba675SRob Herring		io-channels = <&adc0 5>;
110*724ba675SRob Herring		#io-channel-cells = <1>;
111*724ba675SRob Herring		io-channel-names = "parent";
112*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
113*724ba675SRob Herring		channels = "s0", "s1";
114*724ba675SRob Herring	};
115*724ba675SRob Herring
116*724ba675SRob Herring	adc6mux: adc6mux {
117*724ba675SRob Herring		compatible = "io-channel-mux";
118*724ba675SRob Herring		io-channels = <&adc0 6>;
119*724ba675SRob Herring		#io-channel-cells = <1>;
120*724ba675SRob Herring		io-channel-names = "parent";
121*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
122*724ba675SRob Herring		channels = "s0", "s1";
123*724ba675SRob Herring	};
124*724ba675SRob Herring
125*724ba675SRob Herring	adc7mux: adc7mux {
126*724ba675SRob Herring		compatible = "io-channel-mux";
127*724ba675SRob Herring		io-channels = <&adc0 7>;
128*724ba675SRob Herring		#io-channel-cells = <1>;
129*724ba675SRob Herring		io-channel-names = "parent";
130*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
131*724ba675SRob Herring		channels = "s0", "s1";
132*724ba675SRob Herring	};
133*724ba675SRob Herring
134*724ba675SRob Herring	adc8mux: adc8mux {
135*724ba675SRob Herring		compatible = "io-channel-mux";
136*724ba675SRob Herring		io-channels = <&adc1 0>;
137*724ba675SRob Herring		#io-channel-cells = <1>;
138*724ba675SRob Herring		io-channel-names = "parent";
139*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
140*724ba675SRob Herring		channels = "s0", "s1";
141*724ba675SRob Herring	};
142*724ba675SRob Herring
143*724ba675SRob Herring	adc9mux: adc9mux {
144*724ba675SRob Herring		compatible = "io-channel-mux";
145*724ba675SRob Herring		io-channels = <&adc1 1>;
146*724ba675SRob Herring		#io-channel-cells = <1>;
147*724ba675SRob Herring		io-channel-names = "parent";
148*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
149*724ba675SRob Herring		channels = "s0", "s1";
150*724ba675SRob Herring	};
151*724ba675SRob Herring
152*724ba675SRob Herring	adc10mux: adc10mux {
153*724ba675SRob Herring		compatible = "io-channel-mux";
154*724ba675SRob Herring		io-channels = <&adc1 2>;
155*724ba675SRob Herring		#io-channel-cells = <1>;
156*724ba675SRob Herring		io-channel-names = "parent";
157*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
158*724ba675SRob Herring		channels = "s0", "s1";
159*724ba675SRob Herring	};
160*724ba675SRob Herring
161*724ba675SRob Herring	adc11mux: adc11mux {
162*724ba675SRob Herring		compatible = "io-channel-mux";
163*724ba675SRob Herring		io-channels = <&adc1 3>;
164*724ba675SRob Herring		#io-channel-cells = <1>;
165*724ba675SRob Herring		io-channel-names = "parent";
166*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
167*724ba675SRob Herring		channels = "s0", "s1";
168*724ba675SRob Herring	};
169*724ba675SRob Herring
170*724ba675SRob Herring	adc12mux: adc12mux {
171*724ba675SRob Herring		compatible = "io-channel-mux";
172*724ba675SRob Herring		io-channels = <&adc1 4>;
173*724ba675SRob Herring		#io-channel-cells = <1>;
174*724ba675SRob Herring		io-channel-names = "parent";
175*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
176*724ba675SRob Herring		channels = "s0", "s1";
177*724ba675SRob Herring	};
178*724ba675SRob Herring
179*724ba675SRob Herring	adc13mux: adc13mux {
180*724ba675SRob Herring		compatible = "io-channel-mux";
181*724ba675SRob Herring		io-channels = <&adc1 5>;
182*724ba675SRob Herring		#io-channel-cells = <1>;
183*724ba675SRob Herring		io-channel-names = "parent";
184*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
185*724ba675SRob Herring		channels = "s0", "s1";
186*724ba675SRob Herring	};
187*724ba675SRob Herring
188*724ba675SRob Herring	adc14mux: adc14mux {
189*724ba675SRob Herring		compatible = "io-channel-mux";
190*724ba675SRob Herring		io-channels = <&adc1 6>;
191*724ba675SRob Herring		#io-channel-cells = <1>;
192*724ba675SRob Herring		io-channel-names = "parent";
193*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
194*724ba675SRob Herring		channels = "s0", "s1";
195*724ba675SRob Herring	};
196*724ba675SRob Herring
197*724ba675SRob Herring	adc15mux: adc15mux {
198*724ba675SRob Herring		compatible = "io-channel-mux";
199*724ba675SRob Herring		io-channels = <&adc1 7>;
200*724ba675SRob Herring		#io-channel-cells = <1>;
201*724ba675SRob Herring		io-channel-names = "parent";
202*724ba675SRob Herring		mux-controls = <&gpioI5mux>;
203*724ba675SRob Herring		channels = "s0", "s1";
204*724ba675SRob Herring	};
205*724ba675SRob Herring
206*724ba675SRob Herring	iio-hwmon {
207*724ba675SRob Herring		compatible = "iio-hwmon";
208*724ba675SRob Herring		io-channels = <&adc0mux 0>, <&adc0mux 1>,
209*724ba675SRob Herring			<&adc1mux 0>, <&adc1mux 1>,
210*724ba675SRob Herring			<&adc2mux 0>, <&adc2mux 1>,
211*724ba675SRob Herring			<&adc3mux 0>, <&adc3mux 1>,
212*724ba675SRob Herring			<&adc4mux 0>, <&adc4mux 1>,
213*724ba675SRob Herring			<&adc5mux 0>, <&adc5mux 1>,
214*724ba675SRob Herring			<&adc6mux 0>, <&adc6mux 1>,
215*724ba675SRob Herring			<&adc7mux 0>, <&adc7mux 1>,
216*724ba675SRob Herring			<&adc8mux 0>, <&adc8mux 1>,
217*724ba675SRob Herring			<&adc9mux 0>, <&adc9mux 1>,
218*724ba675SRob Herring			<&adc10mux 0>, <&adc10mux 1>,
219*724ba675SRob Herring			<&adc11mux 0>, <&adc11mux 1>,
220*724ba675SRob Herring			<&adc12mux 0>, <&adc12mux 1>,
221*724ba675SRob Herring			<&adc13mux 0>, <&adc13mux 1>,
222*724ba675SRob Herring			<&adc14mux 0>, <&adc14mux 1>,
223*724ba675SRob Herring			<&adc15mux 0>, <&adc15mux 1>,
224*724ba675SRob Herring			<&adc_i2c 0>, <&adc_i2c 1>,
225*724ba675SRob Herring			<&adc_i2c 2>, <&adc_i2c 3>,
226*724ba675SRob Herring			<&adc_i2c 4>, <&adc_i2c 5>,
227*724ba675SRob Herring			<&adc_i2c 6>, <&adc_i2c 7>,
228*724ba675SRob Herring			<&adc_i2c 8>, <&adc_i2c 9>,
229*724ba675SRob Herring			<&adc_i2c 10>, <&adc_i2c 11>,
230*724ba675SRob Herring			<&adc_i2c 12>, <&adc_i2c 13>,
231*724ba675SRob Herring			<&adc_i2c 14>, <&adc_i2c 15>;
232*724ba675SRob Herring	};
233*724ba675SRob Herring};
234*724ba675SRob Herring
235*724ba675SRob Herring&mdio0 {
236*724ba675SRob Herring	status = "okay";
237*724ba675SRob Herring
238*724ba675SRob Herring	ethphy0: ethernet-phy@0 {
239*724ba675SRob Herring		compatible = "ethernet-phy-ieee802.3-c22";
240*724ba675SRob Herring		reg = <0>;
241*724ba675SRob Herring	};
242*724ba675SRob Herring};
243*724ba675SRob Herring
244*724ba675SRob Herring&mac0 {
245*724ba675SRob Herring	status = "okay";
246*724ba675SRob Herring
247*724ba675SRob Herring	phy-mode = "rgmii";
248*724ba675SRob Herring	phy-handle = <&ethphy0>;
249*724ba675SRob Herring
250*724ba675SRob Herring	pinctrl-names = "default";
251*724ba675SRob Herring	pinctrl-0 = <&pinctrl_rgmii1_default>;
252*724ba675SRob Herring};
253*724ba675SRob Herring
254*724ba675SRob Herring&mac3 {
255*724ba675SRob Herring	status = "okay";
256*724ba675SRob Herring	pinctrl-names = "default";
257*724ba675SRob Herring	pinctrl-0 = <&pinctrl_rmii4_default>;
258*724ba675SRob Herring	clock-names = "MACCLK", "RCLK";
259*724ba675SRob Herring	use-ncsi;
260*724ba675SRob Herring};
261*724ba675SRob Herring
262*724ba675SRob Herring&fmc {
263*724ba675SRob Herring	status = "okay";
264*724ba675SRob Herring	flash@0 {
265*724ba675SRob Herring		status = "okay";
266*724ba675SRob Herring		m25p,fast-read;
267*724ba675SRob Herring		label = "bmc";
268*724ba675SRob Herring		spi-max-frequency = <50000000>;
269*724ba675SRob Herring#include "openbmc-flash-layout-64.dtsi"
270*724ba675SRob Herring	};
271*724ba675SRob Herring
272*724ba675SRob Herring	flash@1 {
273*724ba675SRob Herring		status = "okay";
274*724ba675SRob Herring		m25p,fast-read;
275*724ba675SRob Herring		label = "alt-bmc";
276*724ba675SRob Herring		spi-max-frequency = <50000000>;
277*724ba675SRob Herring#include "openbmc-flash-layout-64-alt.dtsi"
278*724ba675SRob Herring	};
279*724ba675SRob Herring};
280*724ba675SRob Herring
281*724ba675SRob Herring&spi1 {
282*724ba675SRob Herring	status = "okay";
283*724ba675SRob Herring	pinctrl-names = "default";
284*724ba675SRob Herring	pinctrl-0 = <&pinctrl_spi1_default>;
285*724ba675SRob Herring
286*724ba675SRob Herring	flash@0 {
287*724ba675SRob Herring		status = "okay";
288*724ba675SRob Herring		m25p,fast-read;
289*724ba675SRob Herring		label = "pnor";
290*724ba675SRob Herring		spi-max-frequency = <20000000>;
291*724ba675SRob Herring	};
292*724ba675SRob Herring};
293*724ba675SRob Herring
294*724ba675SRob Herring&uart1 {
295*724ba675SRob Herring	status = "okay";
296*724ba675SRob Herring};
297*724ba675SRob Herring
298*724ba675SRob Herring&uart2 {
299*724ba675SRob Herring	status = "okay";
300*724ba675SRob Herring};
301*724ba675SRob Herring
302*724ba675SRob Herring&uart3 {
303*724ba675SRob Herring	status = "okay";
304*724ba675SRob Herring};
305*724ba675SRob Herring
306*724ba675SRob Herring&uart4 {
307*724ba675SRob Herring	status = "okay";
308*724ba675SRob Herring};
309*724ba675SRob Herring
310*724ba675SRob Herring&i2c0 {
311*724ba675SRob Herring	status = "okay";
312*724ba675SRob Herring
313*724ba675SRob Herring	temperature-sensor@2e {
314*724ba675SRob Herring		compatible = "adi,adt7490";
315*724ba675SRob Herring		reg = <0x2e>;
316*724ba675SRob Herring	};
317*724ba675SRob Herring};
318*724ba675SRob Herring
319*724ba675SRob Herring&i2c1 {
320*724ba675SRob Herring	status = "okay";
321*724ba675SRob Herring};
322*724ba675SRob Herring
323*724ba675SRob Herring&i2c2 {
324*724ba675SRob Herring	status = "okay";
325*724ba675SRob Herring
326*724ba675SRob Herring	psu@58 {
327*724ba675SRob Herring		compatible = "pmbus";
328*724ba675SRob Herring		reg = <0x58>;
329*724ba675SRob Herring	};
330*724ba675SRob Herring
331*724ba675SRob Herring	psu@59 {
332*724ba675SRob Herring		compatible = "pmbus";
333*724ba675SRob Herring		reg = <0x59>;
334*724ba675SRob Herring	};
335*724ba675SRob Herring};
336*724ba675SRob Herring
337*724ba675SRob Herring&i2c3 {
338*724ba675SRob Herring	status = "okay";
339*724ba675SRob Herring};
340*724ba675SRob Herring
341*724ba675SRob Herring&i2c4 {
342*724ba675SRob Herring	status = "okay";
343*724ba675SRob Herring
344*724ba675SRob Herring	adc_i2c: adc@16 {
345*724ba675SRob Herring		compatible = "lltc,ltc2497";
346*724ba675SRob Herring		reg = <0x16>;
347*724ba675SRob Herring		vref-supply = <&voltage_mon_reg>;
348*724ba675SRob Herring		#io-channel-cells = <1>;
349*724ba675SRob Herring	 };
350*724ba675SRob Herring
351*724ba675SRob Herring	eeprom@50 {
352*724ba675SRob Herring		compatible = "atmel,24c64";
353*724ba675SRob Herring		reg = <0x50>;
354*724ba675SRob Herring		pagesize = <32>;
355*724ba675SRob Herring	};
356*724ba675SRob Herring
357*724ba675SRob Herring	i2c-mux@70 {
358*724ba675SRob Herring		compatible = "nxp,pca9545";
359*724ba675SRob Herring		#address-cells = <1>;
360*724ba675SRob Herring		#size-cells = <0>;
361*724ba675SRob Herring		reg = <0x70>;
362*724ba675SRob Herring		i2c-mux-idle-disconnect;
363*724ba675SRob Herring
364*724ba675SRob Herring		i2c4_bus70_chn0: i2c@0 {
365*724ba675SRob Herring			#address-cells = <1>;
366*724ba675SRob Herring			#size-cells = <0>;
367*724ba675SRob Herring			reg = <0x0>;
368*724ba675SRob Herring
369*724ba675SRob Herring			outlet_temp1: temperature-sensor@48 {
370*724ba675SRob Herring				compatible = "ti,tmp75";
371*724ba675SRob Herring				reg = <0x48>;
372*724ba675SRob Herring			};
373*724ba675SRob Herring			psu1_inlet_temp2: temperature-sensor@49 {
374*724ba675SRob Herring				compatible = "ti,tmp75";
375*724ba675SRob Herring				reg = <0x49>;
376*724ba675SRob Herring			};
377*724ba675SRob Herring		};
378*724ba675SRob Herring
379*724ba675SRob Herring		i2c4_bus70_chn1: i2c@1 {
380*724ba675SRob Herring			#address-cells = <1>;
381*724ba675SRob Herring			#size-cells = <0>;
382*724ba675SRob Herring			reg = <0x1>;
383*724ba675SRob Herring
384*724ba675SRob Herring			pcie_zone_temp1: temperature-sensor@48 {
385*724ba675SRob Herring				compatible = "ti,tmp75";
386*724ba675SRob Herring				reg = <0x48>;
387*724ba675SRob Herring			};
388*724ba675SRob Herring			psu0_inlet_temp2: temperature-sensor@49 {
389*724ba675SRob Herring				compatible = "ti,tmp75";
390*724ba675SRob Herring				reg = <0x49>;
391*724ba675SRob Herring			};
392*724ba675SRob Herring		};
393*724ba675SRob Herring
394*724ba675SRob Herring		i2c4_bus70_chn2: i2c@2 {
395*724ba675SRob Herring			#address-cells = <1>;
396*724ba675SRob Herring			#size-cells = <0>;
397*724ba675SRob Herring			reg = <0x2>;
398*724ba675SRob Herring
399*724ba675SRob Herring			pcie_zone_temp2: temperature-sensor@48 {
400*724ba675SRob Herring				compatible = "ti,tmp75";
401*724ba675SRob Herring				reg = <0x48>;
402*724ba675SRob Herring			};
403*724ba675SRob Herring			outlet_temp2: temperature-sensor@49 {
404*724ba675SRob Herring				compatible = "ti,tmp75";
405*724ba675SRob Herring				reg = <0x49>;
406*724ba675SRob Herring			};
407*724ba675SRob Herring		};
408*724ba675SRob Herring
409*724ba675SRob Herring		i2c4_bus70_chn3: i2c@3 {
410*724ba675SRob Herring			#address-cells = <1>;
411*724ba675SRob Herring			#size-cells = <0>;
412*724ba675SRob Herring			reg = <0x3>;
413*724ba675SRob Herring
414*724ba675SRob Herring			mb_inlet_temp1: temperature-sensor@7c {
415*724ba675SRob Herring				compatible = "microchip,emc1413";
416*724ba675SRob Herring				reg = <0x7c>;
417*724ba675SRob Herring			};
418*724ba675SRob Herring			mb_inlet_temp2: temperature-sensor@4c {
419*724ba675SRob Herring				compatible = "microchip,emc1413";
420*724ba675SRob Herring				reg = <0x4c>;
421*724ba675SRob Herring			};
422*724ba675SRob Herring		};
423*724ba675SRob Herring	};
424*724ba675SRob Herring};
425*724ba675SRob Herring
426*724ba675SRob Herring&i2c5 {
427*724ba675SRob Herring	status = "okay";
428*724ba675SRob Herring
429*724ba675SRob Herring	i2c-mux@70 {
430*724ba675SRob Herring		compatible = "nxp,pca9548";
431*724ba675SRob Herring		#address-cells = <1>;
432*724ba675SRob Herring		#size-cells = <0>;
433*724ba675SRob Herring		reg = <0x70>;
434*724ba675SRob Herring		i2c-mux-idle-disconnect;
435*724ba675SRob Herring	};
436*724ba675SRob Herring};
437*724ba675SRob Herring
438*724ba675SRob Herring&i2c6 {
439*724ba675SRob Herring	status = "okay";
440*724ba675SRob Herring	rtc@51 {
441*724ba675SRob Herring		compatible = "nxp,pcf85063a";
442*724ba675SRob Herring		reg = <0x51>;
443*724ba675SRob Herring	};
444*724ba675SRob Herring};
445*724ba675SRob Herring
446*724ba675SRob Herring&i2c7 {
447*724ba675SRob Herring	status = "okay";
448*724ba675SRob Herring};
449*724ba675SRob Herring
450*724ba675SRob Herring&i2c8 {
451*724ba675SRob Herring	status = "okay";
452*724ba675SRob Herring
453*724ba675SRob Herring	gpio@77 {
454*724ba675SRob Herring		compatible = "nxp,pca9539";
455*724ba675SRob Herring		reg = <0x77>;
456*724ba675SRob Herring		gpio-controller;
457*724ba675SRob Herring		#address-cells = <1>;
458*724ba675SRob Herring		#size-cells = <0>;
459*724ba675SRob Herring		#gpio-cells = <2>;
460*724ba675SRob Herring
461*724ba675SRob Herring		bmc-ocp0-en-hog {
462*724ba675SRob Herring			gpio-hog;
463*724ba675SRob Herring			gpios = <7 GPIO_ACTIVE_LOW>;
464*724ba675SRob Herring			output-high;
465*724ba675SRob Herring			line-name = "bmc-ocp0-en-n";
466*724ba675SRob Herring		};
467*724ba675SRob Herring	};
468*724ba675SRob Herring};
469*724ba675SRob Herring
470*724ba675SRob Herring&i2c9 {
471*724ba675SRob Herring	status = "okay";
472*724ba675SRob Herring};
473*724ba675SRob Herring
474*724ba675SRob Herring&i2c11 {
475*724ba675SRob Herring	status = "okay";
476*724ba675SRob Herring	ssif-bmc@10 {
477*724ba675SRob Herring		compatible = "ssif-bmc";
478*724ba675SRob Herring		reg = <0x10>;
479*724ba675SRob Herring	};
480*724ba675SRob Herring};
481*724ba675SRob Herring
482*724ba675SRob Herring&i2c14 {
483*724ba675SRob Herring	status = "okay";
484*724ba675SRob Herring	eeprom@50 {
485*724ba675SRob Herring		compatible = "atmel,24c64";
486*724ba675SRob Herring		reg = <0x50>;
487*724ba675SRob Herring		pagesize = <32>;
488*724ba675SRob Herring	};
489*724ba675SRob Herring
490*724ba675SRob Herring	bmc_ast2600_cpu: temperature-sensor@35 {
491*724ba675SRob Herring		compatible = "ti,tmp175";
492*724ba675SRob Herring		reg = <0x35>;
493*724ba675SRob Herring	};
494*724ba675SRob Herring};
495*724ba675SRob Herring
496*724ba675SRob Herring&adc0 {
497*724ba675SRob Herring	ref_voltage = <2500>;
498*724ba675SRob Herring	status = "okay";
499*724ba675SRob Herring
500*724ba675SRob Herring	pinctrl-names = "default";
501*724ba675SRob Herring	pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
502*724ba675SRob Herring		&pinctrl_adc2_default &pinctrl_adc3_default
503*724ba675SRob Herring		&pinctrl_adc4_default &pinctrl_adc5_default
504*724ba675SRob Herring		&pinctrl_adc6_default &pinctrl_adc7_default>;
505*724ba675SRob Herring};
506*724ba675SRob Herring
507*724ba675SRob Herring&adc1 {
508*724ba675SRob Herring	ref_voltage = <2500>;
509*724ba675SRob Herring	status = "okay";
510*724ba675SRob Herring
511*724ba675SRob Herring	pinctrl-names = "default";
512*724ba675SRob Herring	pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
513*724ba675SRob Herring		&pinctrl_adc10_default &pinctrl_adc11_default
514*724ba675SRob Herring		&pinctrl_adc12_default &pinctrl_adc13_default
515*724ba675SRob Herring		&pinctrl_adc14_default &pinctrl_adc15_default>;
516*724ba675SRob Herring};
517*724ba675SRob Herring
518*724ba675SRob Herring&vhub {
519*724ba675SRob Herring	status = "okay";
520*724ba675SRob Herring};
521*724ba675SRob Herring
522*724ba675SRob Herring&video {
523*724ba675SRob Herring	status = "okay";
524*724ba675SRob Herring	memory-region = <&video_engine_memory>;
525*724ba675SRob Herring};
526*724ba675SRob Herring
527*724ba675SRob Herring&gpio0 {
528*724ba675SRob Herring	gpio-line-names =
529*724ba675SRob Herring	/*A0-A7*/	"","","","","","i2c2-reset-n","i2c6-reset-n","i2c4-reset-n",
530*724ba675SRob Herring	/*B0-B7*/	"","","","","host0-sysreset-n","host0-pmin-n","","",
531*724ba675SRob Herring	/*C0-C7*/	"s0-vrd-fault-n","s1-vrd-fault-n","","",
532*724ba675SRob Herring			"irq-n","","vrd-sel","spd-sel",
533*724ba675SRob Herring	/*D0-D7*/	"presence-ps0","presence-ps1","hsc-12vmain-alt2-n","ext-high-temp-n",
534*724ba675SRob Herring			"","bmc-ncsi-txen","","",
535*724ba675SRob Herring	/*E0-E7*/	"","","clk50m-bmc-ncsi","","","","","",
536*724ba675SRob Herring	/*F0-F7*/	"s0-pcp-oc-warn-n","s1-pcp-oc-warn-n","power-chassis-control",
537*724ba675SRob Herring			"cpu-bios-recover","s0-heartbeat","hs-csout-prochot",
538*724ba675SRob Herring			"s0-vr-hot-n","s1-vr-hot-n",
539*724ba675SRob Herring	/*G0-G7*/	"","","hsc-12vmain-alt1-n","","","","","",
540*724ba675SRob Herring	/*H0-H7*/	"","","wd-disable-n","power-chassis-good","","","","",
541*724ba675SRob Herring	/*I0-I7*/	"","","","","","adc-sw","power-button","rtc-battery-voltage-read-enable",
542*724ba675SRob Herring	/*J0-J7*/	"","","","","","","","",
543*724ba675SRob Herring	/*K0-K7*/	"","","","","","","","",
544*724ba675SRob Herring	/*L0-L7*/	"","","","","","","","",
545*724ba675SRob Herring	/*M0-M7*/	"","s0-ddr-save","soc-spi-nor-access","presence-cpu0",
546*724ba675SRob Herring			"s0-rtc-lock","","","",
547*724ba675SRob Herring	/*N0-N7*/	"hpm-fw-recovery","hpm-stby-rst-n","jtag-sel-s0","led-sw-hb",
548*724ba675SRob Herring			"jtag-dbgr-prsnt-n","s1-heartbeat","","",
549*724ba675SRob Herring	/*O0-O7*/	"","","","","","","","",
550*724ba675SRob Herring	/*P0-P7*/	"ps0-ac-loss-n","ps1-ac-loss-n","","",
551*724ba675SRob Herring			"led-fault","cpld-user-mode","jtag-srst-n","led-bmc-hb",
552*724ba675SRob Herring	/*Q0-Q7*/	"","","","","","","","",
553*724ba675SRob Herring	/*R0-R7*/	"","","","","","","","",
554*724ba675SRob Herring	/*S0-S7*/	"","","identify-button","led-identify",
555*724ba675SRob Herring			"s1-ddr-save","spi-nor-access","sys-pgood","presence-cpu1",
556*724ba675SRob Herring	/*T0-T7*/	"","","","","","","","",
557*724ba675SRob Herring	/*U0-U7*/	"","","","","","","","",
558*724ba675SRob Herring	/*V0-V7*/	"s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",
559*724ba675SRob Herring			"host0-reboot-ack-n","host0-ready","host0-shd-req-n",
560*724ba675SRob Herring			"host0-shd-ack-n","s0-overtemp-n",
561*724ba675SRob Herring	/*W0-W7*/	"","ocp-main-pwren","ocp-pgood","",
562*724ba675SRob Herring			"bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel",
563*724ba675SRob Herring	/*X0-X7*/	"i2c-backup-sel","s1-fault-alert","s1-fw-boot-ok",
564*724ba675SRob Herring			"s1-hightemp-n","s0-spi-auth-fail-n","s1-sys-auth-failure-n",
565*724ba675SRob Herring			"s1-overtemp-n","s1-spi-auth-fail-n",
566*724ba675SRob Herring	/*Y0-Y7*/	"","","","","","","","host0-special-boot",
567*724ba675SRob Herring	/*Z0-Z7*/	"reset-button","ps0-pgood","ps1-pgood","","","","","";
568*724ba675SRob Herring
569*724ba675SRob Herring	ocp-aux-pwren-hog {
570*724ba675SRob Herring		gpio-hog;
571*724ba675SRob Herring		gpios = <ASPEED_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
572*724ba675SRob Herring		output-high;
573*724ba675SRob Herring		line-name = "ocp-aux-pwren";
574*724ba675SRob Herring	};
575*724ba675SRob Herring};
576*724ba675SRob Herring
577*724ba675SRob Herring&gpio1 {
578*724ba675SRob Herring	gpio-line-names =
579*724ba675SRob Herring	/*18A0-18A7*/	"","","","","","","","",
580*724ba675SRob Herring	/*18B0-18B7*/	"","","","","","","s0-soc-pgood","",
581*724ba675SRob Herring	/*18C0-18C7*/	"uart1-mode0","uart1-mode1","uart2-mode0","uart2-mode1",
582*724ba675SRob Herring			"uart3-mode0","uart3-mode1","uart4-mode0","uart4-mode1",
583*724ba675SRob Herring	/*18D0-18D7*/	"","","","","","","","",
584*724ba675SRob Herring	/*18E0-18E3*/	"","","","";
585*724ba675SRob Herring};
586