1# ========================================================================== 2# Building 3# ========================================================================== 4 5src := $(obj) 6 7PHONY := __build 8__build: 9 10# Read .config if it exist, otherwise ignore 11-include include/config/auto.conf 12 13include scripts/Kbuild.include 14 15# The filename Kbuild has precedence over Makefile 16kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src)) 17include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile) 18 19include scripts/Makefile.lib 20 21ifdef host-progs 22ifneq ($(hostprogs-y),$(host-progs)) 23$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!) 24hostprogs-y += $(host-progs) 25endif 26endif 27 28# Do not include host rules unles needed 29ifneq ($(hostprogs-y)$(hostprogs-m),) 30include scripts/Makefile.host 31endif 32 33ifneq ($(KBUILD_SRC),) 34# Create output directory if not already present 35_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj)) 36 37# Create directories for object files if directory does not exist 38# Needed when obj-y := dir/file.o syntax is used 39_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d))) 40endif 41 42 43ifdef EXTRA_TARGETS 44$(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!) 45endif 46 47ifdef build-targets 48$(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!) 49endif 50 51ifdef export-objs 52$(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!) 53endif 54 55ifdef O_TARGET 56$(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!) 57endif 58 59ifdef L_TARGET 60$(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!) 61endif 62 63ifdef list-multi 64$(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!) 65endif 66 67ifndef obj 68$(warning kbuild: Makefile.build is included improperly) 69endif 70 71# =========================================================================== 72 73ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),) 74lib-target := $(obj)/lib.a 75endif 76 77ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),) 78builtin-target := $(obj)/built-in.o 79endif 80 81# We keep a list of all modules in $(MODVERDIR) 82 83__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \ 84 $(if $(KBUILD_MODULES),$(obj-m)) \ 85 $(subdir-ym) $(always) 86 @: 87 88# Linus' kernel sanity checking tool 89ifneq ($(KBUILD_CHECKSRC),0) 90 ifeq ($(KBUILD_CHECKSRC),2) 91 quiet_cmd_force_checksrc = CHECK $< 92 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; 93 else 94 quiet_cmd_checksrc = CHECK $< 95 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; 96 endif 97endif 98 99 100# Compile C sources (.c) 101# --------------------------------------------------------------------------- 102 103# Default is built-in, unless we know otherwise 104modkern_cflags := $(CFLAGS_KERNEL) 105quiet_modtag := $(empty) $(empty) 106 107$(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE) 108$(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE) 109$(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE) 110$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE) 111 112$(real-objs-m) : quiet_modtag := [M] 113$(real-objs-m:.o=.i) : quiet_modtag := [M] 114$(real-objs-m:.o=.s) : quiet_modtag := [M] 115$(real-objs-m:.o=.lst): quiet_modtag := [M] 116 117$(obj-m) : quiet_modtag := [M] 118 119# Default for not multi-part modules 120modname = $(basetarget) 121 122$(multi-objs-m) : modname = $(modname-multi) 123$(multi-objs-m:.o=.i) : modname = $(modname-multi) 124$(multi-objs-m:.o=.s) : modname = $(modname-multi) 125$(multi-objs-m:.o=.lst) : modname = $(modname-multi) 126$(multi-objs-y) : modname = $(modname-multi) 127$(multi-objs-y:.o=.i) : modname = $(modname-multi) 128$(multi-objs-y:.o=.s) : modname = $(modname-multi) 129$(multi-objs-y:.o=.lst) : modname = $(modname-multi) 130 131quiet_cmd_cc_s_c = CC $(quiet_modtag) $@ 132cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $< 133 134%.s: %.c FORCE 135 $(call if_changed_dep,cc_s_c) 136 137quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@ 138cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $< 139 140%.i: %.c FORCE 141 $(call if_changed_dep,cc_i_c) 142 143quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@ 144cmd_cc_symtypes_c = \ 145 $(CPP) -D__GENKSYMS__ $(c_flags) $< \ 146 | $(GENKSYMS) -T $@ >/dev/null; \ 147 test -s $@ || rm -f $@ 148 149%.symtypes : %.c FORCE 150 $(call if_changed_dep,cc_symtypes_c) 151 152# C (.c) files 153# The C file is compiled and updated dependency information is generated. 154# (See cmd_cc_o_c + relevant part of rule_cc_o_c) 155 156quiet_cmd_cc_o_c = CC $(quiet_modtag) $@ 157 158ifndef CONFIG_MODVERSIONS 159cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $< 160 161else 162# When module versioning is enabled the following steps are executed: 163# o compile a .tmp_<file>.o from <file>.c 164# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does 165# not export symbols, we just rename .tmp_<file>.o to <file>.o and 166# are done. 167# o otherwise, we calculate symbol versions using the good old 168# genksyms on the preprocessed source and postprocess them in a way 169# that they are usable as a linker script 170# o generate <file>.o from .tmp_<file>.o using the linker to 171# replace the unresolved symbols __crc_exported_symbol with 172# the actual value of the checksum generated by genksyms 173 174cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $< 175cmd_modversions = \ 176 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \ 177 $(CPP) -D__GENKSYMS__ $(c_flags) $< \ 178 | $(GENKSYMS) $(if $(KBUILD_SYMTYPES), \ 179 -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH) \ 180 > $(@D)/.tmp_$(@F:.o=.ver); \ 181 \ 182 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \ 183 -T $(@D)/.tmp_$(@F:.o=.ver); \ 184 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \ 185 else \ 186 mv -f $(@D)/.tmp_$(@F) $@; \ 187 fi; 188endif 189 190define rule_cc_o_c 191 $(call echo-cmd,checksrc) $(cmd_checksrc) \ 192 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \ 193 $(cmd_modversions) \ 194 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \ 195 $(dot-target).tmp; \ 196 rm -f $(depfile); \ 197 mv -f $(dot-target).tmp $(dot-target).cmd 198endef 199 200# Built-in and composite module parts 201 202%.o: %.c FORCE 203 $(call cmd,force_checksrc) 204 $(call if_changed_rule,cc_o_c) 205 206# Single-part modules are special since we need to mark them in $(MODVERDIR) 207 208$(single-used-m): %.o: %.c FORCE 209 $(call cmd,force_checksrc) 210 $(call if_changed_rule,cc_o_c) 211 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod) 212 213quiet_cmd_cc_lst_c = MKLST $@ 214 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \ 215 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \ 216 System.map $(OBJDUMP) > $@ 217 218%.lst: %.c FORCE 219 $(call if_changed_dep,cc_lst_c) 220 221# Compile assembler sources (.S) 222# --------------------------------------------------------------------------- 223 224modkern_aflags := $(AFLAGS_KERNEL) 225 226$(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE) 227$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE) 228 229quiet_cmd_as_s_S = CPP $(quiet_modtag) $@ 230cmd_as_s_S = $(CPP) $(a_flags) -o $@ $< 231 232%.s: %.S FORCE 233 $(call if_changed_dep,as_s_S) 234 235quiet_cmd_as_o_S = AS $(quiet_modtag) $@ 236cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $< 237 238%.o: %.S FORCE 239 $(call if_changed_dep,as_o_S) 240 241targets += $(real-objs-y) $(real-objs-m) $(lib-y) 242targets += $(extra-y) $(MAKECMDGOALS) $(always) 243 244# Linker scripts preprocessor (.lds.S -> .lds) 245# --------------------------------------------------------------------------- 246quiet_cmd_cpp_lds_S = LDS $@ 247 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $< 248 249%.lds: %.lds.S FORCE 250 $(call if_changed_dep,cpp_lds_S) 251 252# Build the compiled-in targets 253# --------------------------------------------------------------------------- 254 255# To build objects in subdirs, we need to descend into the directories 256$(sort $(subdir-obj-y)): $(subdir-ym) ; 257 258# 259# Rule to compile a set of .o files into one .o file 260# 261ifdef builtin-target 262quiet_cmd_link_o_target = LD $@ 263# If the list of objects to link is empty, just create an empty built-in.o 264cmd_link_o_target = $(if $(strip $(obj-y)),\ 265 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\ 266 rm -f $@; $(AR) rcs $@) 267 268$(builtin-target): $(obj-y) FORCE 269 $(call if_changed,link_o_target) 270 271targets += $(builtin-target) 272endif # builtin-target 273 274# 275# Rule to compile a set of .o files into one .a file 276# 277ifdef lib-target 278quiet_cmd_link_l_target = AR $@ 279cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y) 280 281$(lib-target): $(lib-y) FORCE 282 $(call if_changed,link_l_target) 283 284targets += $(lib-target) 285endif 286 287# 288# Rule to link composite objects 289# 290# Composite objects are specified in kbuild makefile as follows: 291# <composite-object>-objs := <list of .o files> 292# or 293# <composite-object>-y := <list of .o files> 294link_multi_deps = \ 295$(filter $(addprefix $(obj)/, \ 296$($(subst $(obj)/,,$(@:.o=-objs))) \ 297$($(subst $(obj)/,,$(@:.o=-y)))), $^) 298 299quiet_cmd_link_multi-y = LD $@ 300cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) 301 302quiet_cmd_link_multi-m = LD [M] $@ 303cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps) 304 305# We would rather have a list of rules like 306# foo.o: $(foo-objs) 307# but that's not so easy, so we rather make all composite objects depend 308# on the set of all their parts 309$(multi-used-y) : %.o: $(multi-objs-y) FORCE 310 $(call if_changed,link_multi-y) 311 312$(multi-used-m) : %.o: $(multi-objs-m) FORCE 313 $(call if_changed,link_multi-m) 314 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod) 315 316targets += $(multi-used-y) $(multi-used-m) 317 318 319# Descending 320# --------------------------------------------------------------------------- 321 322PHONY += $(subdir-ym) 323$(subdir-ym): 324 $(Q)$(MAKE) $(build)=$@ 325 326# Add FORCE to the prequisites of a target to force it to be always rebuilt. 327# --------------------------------------------------------------------------- 328 329PHONY += FORCE 330 331FORCE: 332 333# Read all saved command lines and dependencies for the $(targets) we 334# may be building above, using $(if_changed{,_dep}). As an 335# optimization, we don't need to read them if the target does not 336# exist, we will rebuild anyway in that case. 337 338targets := $(wildcard $(sort $(targets))) 339cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd)) 340 341ifneq ($(cmd_files),) 342 include $(cmd_files) 343endif 344 345 346# Declare the contents of the .PHONY variable as phony. We keep that 347# information in a variable se we can use it in if_changed and friends. 348 349.PHONY: $(PHONY) 350