1 /* 2 * Copyright (C) 2011 Freescale Semiconductor, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10 #ifndef __DW_HDMI__ 11 #define __DW_HDMI__ 12 13 #include <drm/drmP.h> 14 15 struct dw_hdmi; 16 17 enum { 18 DW_HDMI_RES_8, 19 DW_HDMI_RES_10, 20 DW_HDMI_RES_12, 21 DW_HDMI_RES_MAX, 22 }; 23 24 enum dw_hdmi_phy_type { 25 DW_HDMI_PHY_DWC_HDMI_TX_PHY = 0x00, 26 DW_HDMI_PHY_DWC_MHL_PHY_HEAC = 0xb2, 27 DW_HDMI_PHY_DWC_MHL_PHY = 0xc2, 28 DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY_HEAC = 0xe2, 29 DW_HDMI_PHY_DWC_HDMI_3D_TX_PHY = 0xf2, 30 DW_HDMI_PHY_DWC_HDMI20_TX_PHY = 0xf3, 31 DW_HDMI_PHY_VENDOR_PHY = 0xfe, 32 }; 33 34 struct dw_hdmi_mpll_config { 35 unsigned long mpixelclock; 36 struct { 37 u16 cpce; 38 u16 gmp; 39 } res[DW_HDMI_RES_MAX]; 40 }; 41 42 struct dw_hdmi_curr_ctrl { 43 unsigned long mpixelclock; 44 u16 curr[DW_HDMI_RES_MAX]; 45 }; 46 47 struct dw_hdmi_phy_config { 48 unsigned long mpixelclock; 49 u16 sym_ctr; /*clock symbol and transmitter control*/ 50 u16 term; /*transmission termination value*/ 51 u16 vlev_ctr; /* voltage level control */ 52 }; 53 54 struct dw_hdmi_phy_ops { 55 int (*init)(struct dw_hdmi *hdmi, void *data, 56 struct drm_display_mode *mode); 57 void (*disable)(struct dw_hdmi *hdmi, void *data); 58 enum drm_connector_status (*read_hpd)(struct dw_hdmi *hdmi, void *data); 59 }; 60 61 struct dw_hdmi_plat_data { 62 struct regmap *regm; 63 enum drm_mode_status (*mode_valid)(struct drm_connector *connector, 64 struct drm_display_mode *mode); 65 66 /* Vendor PHY support */ 67 const struct dw_hdmi_phy_ops *phy_ops; 68 const char *phy_name; 69 void *phy_data; 70 71 /* Synopsys PHY support */ 72 const struct dw_hdmi_mpll_config *mpll_cfg; 73 const struct dw_hdmi_curr_ctrl *cur_ctr; 74 const struct dw_hdmi_phy_config *phy_config; 75 int (*configure_phy)(struct dw_hdmi *hdmi, 76 const struct dw_hdmi_plat_data *pdata, 77 unsigned long mpixelclock); 78 }; 79 80 int dw_hdmi_probe(struct platform_device *pdev, 81 const struct dw_hdmi_plat_data *plat_data); 82 void dw_hdmi_remove(struct platform_device *pdev); 83 void dw_hdmi_unbind(struct device *dev); 84 int dw_hdmi_bind(struct platform_device *pdev, struct drm_encoder *encoder, 85 const struct dw_hdmi_plat_data *plat_data); 86 87 void dw_hdmi_set_sample_rate(struct dw_hdmi *hdmi, unsigned int rate); 88 void dw_hdmi_audio_enable(struct dw_hdmi *hdmi); 89 void dw_hdmi_audio_disable(struct dw_hdmi *hdmi); 90 91 /* PHY configuration */ 92 void dw_hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, 93 unsigned char addr); 94 95 #endif /* __IMX_HDMI_H__ */ 96