1 /* 2 * HP WatchDog Driver 3 * based on 4 * 5 * SoftDog 0.05: A Software Watchdog Device 6 * 7 * (c) Copyright 2007 Hewlett-Packard Development Company, L.P. 8 * Thomas Mingarelli <thomas.mingarelli@hp.com> 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * version 2 as published by the Free Software Foundation 13 * 14 */ 15 16 #include <linux/device.h> 17 #include <linux/fs.h> 18 #include <linux/init.h> 19 #include <linux/io.h> 20 #include <linux/bitops.h> 21 #include <linux/kernel.h> 22 #include <linux/miscdevice.h> 23 #include <linux/module.h> 24 #include <linux/moduleparam.h> 25 #include <linux/pci.h> 26 #include <linux/pci_ids.h> 27 #include <linux/types.h> 28 #include <linux/uaccess.h> 29 #include <linux/watchdog.h> 30 #ifdef CONFIG_HPWDT_NMI_DECODING 31 #include <linux/dmi.h> 32 #include <linux/spinlock.h> 33 #include <linux/nmi.h> 34 #include <linux/kdebug.h> 35 #include <linux/notifier.h> 36 #include <asm/cacheflush.h> 37 #endif /* CONFIG_HPWDT_NMI_DECODING */ 38 #include <asm/nmi.h> 39 40 #define HPWDT_VERSION "1.3.0" 41 #define SECS_TO_TICKS(secs) ((secs) * 1000 / 128) 42 #define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000) 43 #define HPWDT_MAX_TIMER TICKS_TO_SECS(65535) 44 #define DEFAULT_MARGIN 30 45 46 static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */ 47 static unsigned int reload; /* the computed soft_margin */ 48 static int nowayout = WATCHDOG_NOWAYOUT; 49 static char expect_release; 50 static unsigned long hpwdt_is_open; 51 52 static void __iomem *pci_mem_addr; /* the PCI-memory address */ 53 static unsigned long __iomem *hpwdt_timer_reg; 54 static unsigned long __iomem *hpwdt_timer_con; 55 56 static DEFINE_PCI_DEVICE_TABLE(hpwdt_devices) = { 57 { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */ 58 { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */ 59 {0}, /* terminate list */ 60 }; 61 MODULE_DEVICE_TABLE(pci, hpwdt_devices); 62 63 #ifdef CONFIG_HPWDT_NMI_DECODING 64 #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */ 65 #define CRU_BIOS_SIGNATURE_VALUE 0x55524324 66 #define PCI_BIOS32_PARAGRAPH_LEN 16 67 #define PCI_ROM_BASE1 0x000F0000 68 #define ROM_SIZE 0x10000 69 70 struct bios32_service_dir { 71 u32 signature; 72 u32 entry_point; 73 u8 revision; 74 u8 length; 75 u8 checksum; 76 u8 reserved[5]; 77 }; 78 79 /* type 212 */ 80 struct smbios_cru64_info { 81 u8 type; 82 u8 byte_length; 83 u16 handle; 84 u32 signature; 85 u64 physical_address; 86 u32 double_length; 87 u32 double_offset; 88 }; 89 #define SMBIOS_CRU64_INFORMATION 212 90 91 /* type 219 */ 92 struct smbios_proliant_info { 93 u8 type; 94 u8 byte_length; 95 u16 handle; 96 u32 power_features; 97 u32 omega_features; 98 u32 reserved; 99 u32 misc_features; 100 }; 101 #define SMBIOS_ICRU_INFORMATION 219 102 103 104 struct cmn_registers { 105 union { 106 struct { 107 u8 ral; 108 u8 rah; 109 u16 rea2; 110 }; 111 u32 reax; 112 } u1; 113 union { 114 struct { 115 u8 rbl; 116 u8 rbh; 117 u8 reb2l; 118 u8 reb2h; 119 }; 120 u32 rebx; 121 } u2; 122 union { 123 struct { 124 u8 rcl; 125 u8 rch; 126 u16 rec2; 127 }; 128 u32 recx; 129 } u3; 130 union { 131 struct { 132 u8 rdl; 133 u8 rdh; 134 u16 red2; 135 }; 136 u32 redx; 137 } u4; 138 139 u32 resi; 140 u32 redi; 141 u16 rds; 142 u16 res; 143 u32 reflags; 144 } __attribute__((packed)); 145 146 static unsigned int hpwdt_nmi_decoding; 147 static unsigned int allow_kdump; 148 static unsigned int priority; /* hpwdt at end of die_notify list */ 149 static unsigned int is_icru; 150 static DEFINE_SPINLOCK(rom_lock); 151 static void *cru_rom_addr; 152 static struct cmn_registers cmn_regs; 153 154 extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs, 155 unsigned long *pRomEntry); 156 157 #ifdef CONFIG_X86_32 158 /* --32 Bit Bios------------------------------------------------------------ */ 159 160 #define HPWDT_ARCH 32 161 162 asm(".text \n\t" 163 ".align 4 \n" 164 "asminline_call: \n\t" 165 "pushl %ebp \n\t" 166 "movl %esp, %ebp \n\t" 167 "pusha \n\t" 168 "pushf \n\t" 169 "push %es \n\t" 170 "push %ds \n\t" 171 "pop %es \n\t" 172 "movl 8(%ebp),%eax \n\t" 173 "movl 4(%eax),%ebx \n\t" 174 "movl 8(%eax),%ecx \n\t" 175 "movl 12(%eax),%edx \n\t" 176 "movl 16(%eax),%esi \n\t" 177 "movl 20(%eax),%edi \n\t" 178 "movl (%eax),%eax \n\t" 179 "push %cs \n\t" 180 "call *12(%ebp) \n\t" 181 "pushf \n\t" 182 "pushl %eax \n\t" 183 "movl 8(%ebp),%eax \n\t" 184 "movl %ebx,4(%eax) \n\t" 185 "movl %ecx,8(%eax) \n\t" 186 "movl %edx,12(%eax) \n\t" 187 "movl %esi,16(%eax) \n\t" 188 "movl %edi,20(%eax) \n\t" 189 "movw %ds,24(%eax) \n\t" 190 "movw %es,26(%eax) \n\t" 191 "popl %ebx \n\t" 192 "movl %ebx,(%eax) \n\t" 193 "popl %ebx \n\t" 194 "movl %ebx,28(%eax) \n\t" 195 "pop %es \n\t" 196 "popf \n\t" 197 "popa \n\t" 198 "leave \n\t" 199 "ret \n\t" 200 ".previous"); 201 202 203 /* 204 * cru_detect 205 * 206 * Routine Description: 207 * This function uses the 32-bit BIOS Service Directory record to 208 * search for a $CRU record. 209 * 210 * Return Value: 211 * 0 : SUCCESS 212 * <0 : FAILURE 213 */ 214 static int __devinit cru_detect(unsigned long map_entry, 215 unsigned long map_offset) 216 { 217 void *bios32_map; 218 unsigned long *bios32_entrypoint; 219 unsigned long cru_physical_address; 220 unsigned long cru_length; 221 unsigned long physical_bios_base = 0; 222 unsigned long physical_bios_offset = 0; 223 int retval = -ENODEV; 224 225 bios32_map = ioremap(map_entry, (2 * PAGE_SIZE)); 226 227 if (bios32_map == NULL) 228 return -ENODEV; 229 230 bios32_entrypoint = bios32_map + map_offset; 231 232 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE; 233 234 set_memory_x((unsigned long)bios32_map, 2); 235 asminline_call(&cmn_regs, bios32_entrypoint); 236 237 if (cmn_regs.u1.ral != 0) { 238 printk(KERN_WARNING 239 "hpwdt: Call succeeded but with an error: 0x%x\n", 240 cmn_regs.u1.ral); 241 } else { 242 physical_bios_base = cmn_regs.u2.rebx; 243 physical_bios_offset = cmn_regs.u4.redx; 244 cru_length = cmn_regs.u3.recx; 245 cru_physical_address = 246 physical_bios_base + physical_bios_offset; 247 248 /* If the values look OK, then map it in. */ 249 if ((physical_bios_base + physical_bios_offset)) { 250 cru_rom_addr = 251 ioremap(cru_physical_address, cru_length); 252 if (cru_rom_addr) { 253 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK, 254 (cru_length + PAGE_SIZE - 1) >> PAGE_SHIFT); 255 retval = 0; 256 } 257 } 258 259 printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n", 260 physical_bios_base); 261 printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n", 262 physical_bios_offset); 263 printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n", 264 cru_length); 265 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: %p\n", 266 &cru_rom_addr); 267 } 268 iounmap(bios32_map); 269 return retval; 270 } 271 272 /* 273 * bios_checksum 274 */ 275 static int __devinit bios_checksum(const char __iomem *ptr, int len) 276 { 277 char sum = 0; 278 int i; 279 280 /* 281 * calculate checksum of size bytes. This should add up 282 * to zero if we have a valid header. 283 */ 284 for (i = 0; i < len; i++) 285 sum += ptr[i]; 286 287 return ((sum == 0) && (len > 0)); 288 } 289 290 /* 291 * bios32_present 292 * 293 * Routine Description: 294 * This function finds the 32-bit BIOS Service Directory 295 * 296 * Return Value: 297 * 0 : SUCCESS 298 * <0 : FAILURE 299 */ 300 static int __devinit bios32_present(const char __iomem *p) 301 { 302 struct bios32_service_dir *bios_32_ptr; 303 int length; 304 unsigned long map_entry, map_offset; 305 306 bios_32_ptr = (struct bios32_service_dir *) p; 307 308 /* 309 * Search for signature by checking equal to the swizzled value 310 * instead of calling another routine to perform a strcmp. 311 */ 312 if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) { 313 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN; 314 if (bios_checksum(p, length)) { 315 /* 316 * According to the spec, we're looking for the 317 * first 4KB-aligned address below the entrypoint 318 * listed in the header. The Service Directory code 319 * is guaranteed to occupy no more than 2 4KB pages. 320 */ 321 map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1); 322 map_offset = bios_32_ptr->entry_point - map_entry; 323 324 return cru_detect(map_entry, map_offset); 325 } 326 } 327 return -ENODEV; 328 } 329 330 static int __devinit detect_cru_service(void) 331 { 332 char __iomem *p, *q; 333 int rc = -1; 334 335 /* 336 * Search from 0x0f0000 through 0x0fffff, inclusive. 337 */ 338 p = ioremap(PCI_ROM_BASE1, ROM_SIZE); 339 if (p == NULL) 340 return -ENOMEM; 341 342 for (q = p; q < p + ROM_SIZE; q += 16) { 343 rc = bios32_present(q); 344 if (!rc) 345 break; 346 } 347 iounmap(p); 348 return rc; 349 } 350 /* ------------------------------------------------------------------------- */ 351 #endif /* CONFIG_X86_32 */ 352 #ifdef CONFIG_X86_64 353 /* --64 Bit Bios------------------------------------------------------------ */ 354 355 #define HPWDT_ARCH 64 356 357 asm(".text \n\t" 358 ".align 4 \n" 359 "asminline_call: \n\t" 360 "pushq %rbp \n\t" 361 "movq %rsp, %rbp \n\t" 362 "pushq %rax \n\t" 363 "pushq %rbx \n\t" 364 "pushq %rdx \n\t" 365 "pushq %r12 \n\t" 366 "pushq %r9 \n\t" 367 "movq %rsi, %r12 \n\t" 368 "movq %rdi, %r9 \n\t" 369 "movl 4(%r9),%ebx \n\t" 370 "movl 8(%r9),%ecx \n\t" 371 "movl 12(%r9),%edx \n\t" 372 "movl 16(%r9),%esi \n\t" 373 "movl 20(%r9),%edi \n\t" 374 "movl (%r9),%eax \n\t" 375 "call *%r12 \n\t" 376 "pushfq \n\t" 377 "popq %r12 \n\t" 378 "movl %eax, (%r9) \n\t" 379 "movl %ebx, 4(%r9) \n\t" 380 "movl %ecx, 8(%r9) \n\t" 381 "movl %edx, 12(%r9) \n\t" 382 "movl %esi, 16(%r9) \n\t" 383 "movl %edi, 20(%r9) \n\t" 384 "movq %r12, %rax \n\t" 385 "movl %eax, 28(%r9) \n\t" 386 "popq %r9 \n\t" 387 "popq %r12 \n\t" 388 "popq %rdx \n\t" 389 "popq %rbx \n\t" 390 "popq %rax \n\t" 391 "leave \n\t" 392 "ret \n\t" 393 ".previous"); 394 395 /* 396 * dmi_find_cru 397 * 398 * Routine Description: 399 * This function checks whether or not a SMBIOS/DMI record is 400 * the 64bit CRU info or not 401 */ 402 static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy) 403 { 404 struct smbios_cru64_info *smbios_cru64_ptr; 405 unsigned long cru_physical_address; 406 407 if (dm->type == SMBIOS_CRU64_INFORMATION) { 408 smbios_cru64_ptr = (struct smbios_cru64_info *) dm; 409 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) { 410 cru_physical_address = 411 smbios_cru64_ptr->physical_address + 412 smbios_cru64_ptr->double_offset; 413 cru_rom_addr = ioremap(cru_physical_address, 414 smbios_cru64_ptr->double_length); 415 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK, 416 smbios_cru64_ptr->double_length >> PAGE_SHIFT); 417 } 418 } 419 } 420 421 static int __devinit detect_cru_service(void) 422 { 423 cru_rom_addr = NULL; 424 425 dmi_walk(dmi_find_cru, NULL); 426 427 /* if cru_rom_addr has been set then we found a CRU service */ 428 return ((cru_rom_addr != NULL) ? 0 : -ENODEV); 429 } 430 /* ------------------------------------------------------------------------- */ 431 #endif /* CONFIG_X86_64 */ 432 #endif /* CONFIG_HPWDT_NMI_DECODING */ 433 434 /* 435 * Watchdog operations 436 */ 437 static void hpwdt_start(void) 438 { 439 reload = SECS_TO_TICKS(soft_margin); 440 iowrite16(reload, hpwdt_timer_reg); 441 iowrite16(0x85, hpwdt_timer_con); 442 } 443 444 static void hpwdt_stop(void) 445 { 446 unsigned long data; 447 448 data = ioread16(hpwdt_timer_con); 449 data &= 0xFE; 450 iowrite16(data, hpwdt_timer_con); 451 } 452 453 static void hpwdt_ping(void) 454 { 455 iowrite16(reload, hpwdt_timer_reg); 456 } 457 458 static int hpwdt_change_timer(int new_margin) 459 { 460 if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) { 461 printk(KERN_WARNING 462 "hpwdt: New value passed in is invalid: %d seconds.\n", 463 new_margin); 464 return -EINVAL; 465 } 466 467 soft_margin = new_margin; 468 printk(KERN_DEBUG 469 "hpwdt: New timer passed in is %d seconds.\n", 470 new_margin); 471 reload = SECS_TO_TICKS(soft_margin); 472 473 return 0; 474 } 475 476 static int hpwdt_time_left(void) 477 { 478 return TICKS_TO_SECS(ioread16(hpwdt_timer_reg)); 479 } 480 481 #ifdef CONFIG_HPWDT_NMI_DECODING 482 /* 483 * NMI Handler 484 */ 485 static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs) 486 { 487 unsigned long rom_pl; 488 static int die_nmi_called; 489 490 if (!hpwdt_nmi_decoding) 491 goto out; 492 493 spin_lock_irqsave(&rom_lock, rom_pl); 494 if (!die_nmi_called && !is_icru) 495 asminline_call(&cmn_regs, cru_rom_addr); 496 die_nmi_called = 1; 497 spin_unlock_irqrestore(&rom_lock, rom_pl); 498 499 if (allow_kdump) 500 hpwdt_stop(); 501 502 if (!is_icru) { 503 if (cmn_regs.u1.ral == 0) { 504 panic("An NMI occurred, " 505 "but unable to determine source.\n"); 506 } 507 } 508 panic("An NMI occurred, please see the Integrated " 509 "Management Log for details.\n"); 510 511 out: 512 return NMI_DONE; 513 } 514 #endif /* CONFIG_HPWDT_NMI_DECODING */ 515 516 /* 517 * /dev/watchdog handling 518 */ 519 static int hpwdt_open(struct inode *inode, struct file *file) 520 { 521 /* /dev/watchdog can only be opened once */ 522 if (test_and_set_bit(0, &hpwdt_is_open)) 523 return -EBUSY; 524 525 /* Start the watchdog */ 526 hpwdt_start(); 527 hpwdt_ping(); 528 529 return nonseekable_open(inode, file); 530 } 531 532 static int hpwdt_release(struct inode *inode, struct file *file) 533 { 534 /* Stop the watchdog */ 535 if (expect_release == 42) { 536 hpwdt_stop(); 537 } else { 538 printk(KERN_CRIT 539 "hpwdt: Unexpected close, not stopping watchdog!\n"); 540 hpwdt_ping(); 541 } 542 543 expect_release = 0; 544 545 /* /dev/watchdog is being closed, make sure it can be re-opened */ 546 clear_bit(0, &hpwdt_is_open); 547 548 return 0; 549 } 550 551 static ssize_t hpwdt_write(struct file *file, const char __user *data, 552 size_t len, loff_t *ppos) 553 { 554 /* See if we got the magic character 'V' and reload the timer */ 555 if (len) { 556 if (!nowayout) { 557 size_t i; 558 559 /* note: just in case someone wrote the magic character 560 * five months ago... */ 561 expect_release = 0; 562 563 /* scan to see whether or not we got the magic char. */ 564 for (i = 0; i != len; i++) { 565 char c; 566 if (get_user(c, data + i)) 567 return -EFAULT; 568 if (c == 'V') 569 expect_release = 42; 570 } 571 } 572 573 /* someone wrote to us, we should reload the timer */ 574 hpwdt_ping(); 575 } 576 577 return len; 578 } 579 580 static const struct watchdog_info ident = { 581 .options = WDIOF_SETTIMEOUT | 582 WDIOF_KEEPALIVEPING | 583 WDIOF_MAGICCLOSE, 584 .identity = "HP iLO2+ HW Watchdog Timer", 585 }; 586 587 static long hpwdt_ioctl(struct file *file, unsigned int cmd, 588 unsigned long arg) 589 { 590 void __user *argp = (void __user *)arg; 591 int __user *p = argp; 592 int new_margin; 593 int ret = -ENOTTY; 594 595 switch (cmd) { 596 case WDIOC_GETSUPPORT: 597 ret = 0; 598 if (copy_to_user(argp, &ident, sizeof(ident))) 599 ret = -EFAULT; 600 break; 601 602 case WDIOC_GETSTATUS: 603 case WDIOC_GETBOOTSTATUS: 604 ret = put_user(0, p); 605 break; 606 607 case WDIOC_KEEPALIVE: 608 hpwdt_ping(); 609 ret = 0; 610 break; 611 612 case WDIOC_SETTIMEOUT: 613 ret = get_user(new_margin, p); 614 if (ret) 615 break; 616 617 ret = hpwdt_change_timer(new_margin); 618 if (ret) 619 break; 620 621 hpwdt_ping(); 622 /* Fall */ 623 case WDIOC_GETTIMEOUT: 624 ret = put_user(soft_margin, p); 625 break; 626 627 case WDIOC_GETTIMELEFT: 628 ret = put_user(hpwdt_time_left(), p); 629 break; 630 } 631 return ret; 632 } 633 634 /* 635 * Kernel interfaces 636 */ 637 static const struct file_operations hpwdt_fops = { 638 .owner = THIS_MODULE, 639 .llseek = no_llseek, 640 .write = hpwdt_write, 641 .unlocked_ioctl = hpwdt_ioctl, 642 .open = hpwdt_open, 643 .release = hpwdt_release, 644 }; 645 646 static struct miscdevice hpwdt_miscdev = { 647 .minor = WATCHDOG_MINOR, 648 .name = "watchdog", 649 .fops = &hpwdt_fops, 650 }; 651 652 /* 653 * Init & Exit 654 */ 655 656 #ifdef CONFIG_HPWDT_NMI_DECODING 657 #ifdef CONFIG_X86_LOCAL_APIC 658 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev) 659 { 660 /* 661 * If nmi_watchdog is turned off then we can turn on 662 * our nmi decoding capability. 663 */ 664 hpwdt_nmi_decoding = 1; 665 } 666 #else 667 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev) 668 { 669 dev_warn(&dev->dev, "NMI decoding is disabled. " 670 "Your kernel does not support a NMI Watchdog.\n"); 671 } 672 #endif /* CONFIG_X86_LOCAL_APIC */ 673 674 /* 675 * dmi_find_icru 676 * 677 * Routine Description: 678 * This function checks whether or not we are on an iCRU-based server. 679 * This check is independent of architecture and needs to be made for 680 * any ProLiant system. 681 */ 682 static void __devinit dmi_find_icru(const struct dmi_header *dm, void *dummy) 683 { 684 struct smbios_proliant_info *smbios_proliant_ptr; 685 686 if (dm->type == SMBIOS_ICRU_INFORMATION) { 687 smbios_proliant_ptr = (struct smbios_proliant_info *) dm; 688 if (smbios_proliant_ptr->misc_features & 0x01) 689 is_icru = 1; 690 } 691 } 692 693 static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev) 694 { 695 int retval; 696 697 /* 698 * On typical CRU-based systems we need to map that service in 699 * the BIOS. For 32 bit Operating Systems we need to go through 700 * the 32 Bit BIOS Service Directory. For 64 bit Operating 701 * Systems we get that service through SMBIOS. 702 * 703 * On systems that support the new iCRU service all we need to 704 * do is call dmi_walk to get the supported flag value and skip 705 * the old cru detect code. 706 */ 707 dmi_walk(dmi_find_icru, NULL); 708 if (!is_icru) { 709 710 /* 711 * We need to map the ROM to get the CRU service. 712 * For 32 bit Operating Systems we need to go through the 32 Bit 713 * BIOS Service Directory 714 * For 64 bit Operating Systems we get that service through SMBIOS. 715 */ 716 retval = detect_cru_service(); 717 if (retval < 0) { 718 dev_warn(&dev->dev, 719 "Unable to detect the %d Bit CRU Service.\n", 720 HPWDT_ARCH); 721 return retval; 722 } 723 724 /* 725 * We know this is the only CRU call we need to make so lets keep as 726 * few instructions as possible once the NMI comes in. 727 */ 728 cmn_regs.u1.rah = 0x0D; 729 cmn_regs.u1.ral = 0x02; 730 } 731 732 /* 733 * If the priority is set to 1, then we will be put first on the 734 * die notify list to handle a critical NMI. The default is to 735 * be last so other users of the NMI signal can function. 736 */ 737 retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 738 (priority) ? NMI_FLAG_FIRST : 0, 739 "hpwdt"); 740 if (retval != 0) { 741 dev_warn(&dev->dev, 742 "Unable to register a die notifier (err=%d).\n", 743 retval); 744 if (cru_rom_addr) 745 iounmap(cru_rom_addr); 746 } 747 748 dev_info(&dev->dev, 749 "HP Watchdog Timer Driver: NMI decoding initialized" 750 ", allow kernel dump: %s (default = 0/OFF)" 751 ", priority: %s (default = 0/LAST).\n", 752 (allow_kdump == 0) ? "OFF" : "ON", 753 (priority == 0) ? "LAST" : "FIRST"); 754 return 0; 755 } 756 757 static void hpwdt_exit_nmi_decoding(void) 758 { 759 unregister_nmi_handler(NMI_UNKNOWN, "hpwdt"); 760 if (cru_rom_addr) 761 iounmap(cru_rom_addr); 762 } 763 #else /* !CONFIG_HPWDT_NMI_DECODING */ 764 static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev) 765 { 766 } 767 768 static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev) 769 { 770 return 0; 771 } 772 773 static void hpwdt_exit_nmi_decoding(void) 774 { 775 } 776 #endif /* CONFIG_HPWDT_NMI_DECODING */ 777 778 static int __devinit hpwdt_init_one(struct pci_dev *dev, 779 const struct pci_device_id *ent) 780 { 781 int retval; 782 783 /* 784 * Check if we can do NMI decoding or not 785 */ 786 hpwdt_check_nmi_decoding(dev); 787 788 /* 789 * First let's find out if we are on an iLO2+ server. We will 790 * not run on a legacy ASM box. 791 * So we only support the G5 ProLiant servers and higher. 792 */ 793 if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) { 794 dev_warn(&dev->dev, 795 "This server does not have an iLO2+ ASIC.\n"); 796 return -ENODEV; 797 } 798 799 if (pci_enable_device(dev)) { 800 dev_warn(&dev->dev, 801 "Not possible to enable PCI Device: 0x%x:0x%x.\n", 802 ent->vendor, ent->device); 803 return -ENODEV; 804 } 805 806 pci_mem_addr = pci_iomap(dev, 1, 0x80); 807 if (!pci_mem_addr) { 808 dev_warn(&dev->dev, 809 "Unable to detect the iLO2+ server memory.\n"); 810 retval = -ENOMEM; 811 goto error_pci_iomap; 812 } 813 hpwdt_timer_reg = pci_mem_addr + 0x70; 814 hpwdt_timer_con = pci_mem_addr + 0x72; 815 816 /* Make sure that we have a valid soft_margin */ 817 if (hpwdt_change_timer(soft_margin)) 818 hpwdt_change_timer(DEFAULT_MARGIN); 819 820 /* Initialize NMI Decoding functionality */ 821 retval = hpwdt_init_nmi_decoding(dev); 822 if (retval != 0) 823 goto error_init_nmi_decoding; 824 825 retval = misc_register(&hpwdt_miscdev); 826 if (retval < 0) { 827 dev_warn(&dev->dev, 828 "Unable to register miscdev on minor=%d (err=%d).\n", 829 WATCHDOG_MINOR, retval); 830 goto error_misc_register; 831 } 832 833 dev_info(&dev->dev, "HP Watchdog Timer Driver: %s" 834 ", timer margin: %d seconds (nowayout=%d).\n", 835 HPWDT_VERSION, soft_margin, nowayout); 836 return 0; 837 838 error_misc_register: 839 hpwdt_exit_nmi_decoding(); 840 error_init_nmi_decoding: 841 pci_iounmap(dev, pci_mem_addr); 842 error_pci_iomap: 843 pci_disable_device(dev); 844 return retval; 845 } 846 847 static void __devexit hpwdt_exit(struct pci_dev *dev) 848 { 849 if (!nowayout) 850 hpwdt_stop(); 851 852 misc_deregister(&hpwdt_miscdev); 853 hpwdt_exit_nmi_decoding(); 854 pci_iounmap(dev, pci_mem_addr); 855 pci_disable_device(dev); 856 } 857 858 static struct pci_driver hpwdt_driver = { 859 .name = "hpwdt", 860 .id_table = hpwdt_devices, 861 .probe = hpwdt_init_one, 862 .remove = __devexit_p(hpwdt_exit), 863 }; 864 865 static void __exit hpwdt_cleanup(void) 866 { 867 pci_unregister_driver(&hpwdt_driver); 868 } 869 870 static int __init hpwdt_init(void) 871 { 872 return pci_register_driver(&hpwdt_driver); 873 } 874 875 MODULE_AUTHOR("Tom Mingarelli"); 876 MODULE_DESCRIPTION("hp watchdog driver"); 877 MODULE_LICENSE("GPL"); 878 MODULE_VERSION(HPWDT_VERSION); 879 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); 880 881 module_param(soft_margin, int, 0); 882 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds"); 883 884 module_param(nowayout, int, 0); 885 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" 886 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 887 888 #ifdef CONFIG_HPWDT_NMI_DECODING 889 module_param(allow_kdump, int, 0); 890 MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs"); 891 892 module_param(priority, int, 0); 893 MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last" 894 " (default = 0/Last)\n"); 895 #endif /* !CONFIG_HPWDT_NMI_DECODING */ 896 897 module_init(hpwdt_init); 898 module_exit(hpwdt_cleanup); 899