1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * QLogic Fibre Channel HBA Driver
4 * Copyright (c) 2003-2014 QLogic Corporation
5 */
6 #include "qla_def.h"
7 #include "qla_gbl.h"
8
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/vmalloc.h>
12
13 #include "qla_devtbl.h"
14
15 #ifdef CONFIG_SPARC
16 #include <asm/prom.h>
17 #endif
18
19 #include "qla_target.h"
20
21 /*
22 * QLogic ISP2x00 Hardware Support Function Prototypes.
23 */
24 static int qla2x00_isp_firmware(scsi_qla_host_t *);
25 static int qla2x00_setup_chip(scsi_qla_host_t *);
26 static int qla2x00_fw_ready(scsi_qla_host_t *);
27 static int qla2x00_configure_hba(scsi_qla_host_t *);
28 static int qla2x00_configure_loop(scsi_qla_host_t *);
29 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
30 static int qla2x00_configure_fabric(scsi_qla_host_t *);
31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
32 static int qla2x00_restart_isp(scsi_qla_host_t *);
33
34 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
35 static int qla84xx_init_chip(scsi_qla_host_t *);
36 static int qla25xx_init_queues(struct qla_hw_data *);
37 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
38 struct event_arg *ea);
39 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
40 struct event_arg *);
41 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
42
43 /* SRB Extensions ---------------------------------------------------------- */
44
45 void
qla2x00_sp_timeout(struct timer_list * t)46 qla2x00_sp_timeout(struct timer_list *t)
47 {
48 srb_t *sp = timer_container_of(sp, t, u.iocb_cmd.timer);
49 struct srb_iocb *iocb;
50 scsi_qla_host_t *vha = sp->vha;
51
52 WARN_ON(irqs_disabled());
53 iocb = &sp->u.iocb_cmd;
54 iocb->timeout(sp);
55
56 /* ref: TMR */
57 kref_put(&sp->cmd_kref, qla2x00_sp_release);
58
59 if (vha && qla2x00_isp_reg_stat(vha->hw)) {
60 ql_log(ql_log_info, vha, 0x9008,
61 "PCI/Register disconnect.\n");
62 qla_pci_set_eeh_busy(vha);
63 }
64 }
65
qla2x00_sp_free(srb_t * sp)66 void qla2x00_sp_free(srb_t *sp)
67 {
68 struct srb_iocb *iocb = &sp->u.iocb_cmd;
69
70 timer_delete(&iocb->timer);
71 qla2x00_rel_sp(sp);
72 }
73
qla2xxx_rel_done_warning(srb_t * sp,int res)74 void qla2xxx_rel_done_warning(srb_t *sp, int res)
75 {
76 WARN_ONCE(1, "Calling done() of an already freed srb %p object\n", sp);
77 }
78
qla2xxx_rel_free_warning(srb_t * sp)79 void qla2xxx_rel_free_warning(srb_t *sp)
80 {
81 WARN_ONCE(1, "Calling free() of an already freed srb %p object\n", sp);
82 }
83
84 /* Asynchronous Login/Logout Routines -------------------------------------- */
85
86 unsigned long
qla2x00_get_async_timeout(struct scsi_qla_host * vha)87 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
88 {
89 unsigned long tmo;
90 struct qla_hw_data *ha = vha->hw;
91
92 /* Firmware should use switch negotiated r_a_tov for timeout. */
93 tmo = ha->r_a_tov / 10 * 2;
94 if (IS_QLAFX00(ha)) {
95 tmo = FX00_DEF_RATOV * 2;
96 } else if (!IS_FWI2_CAPABLE(ha)) {
97 /*
98 * Except for earlier ISPs where the timeout is seeded from the
99 * initialization control block.
100 */
101 tmo = ha->login_timeout;
102 }
103 return tmo;
104 }
105
qla24xx_abort_iocb_timeout(void * data)106 static void qla24xx_abort_iocb_timeout(void *data)
107 {
108 srb_t *sp = data;
109 struct srb_iocb *abt = &sp->u.iocb_cmd;
110 struct qla_qpair *qpair = sp->qpair;
111 u32 handle;
112 unsigned long flags;
113 int sp_found = 0, cmdsp_found = 0;
114
115 if (sp->cmd_sp)
116 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
117 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
118 sp->cmd_sp->handle, sp->cmd_sp->type,
119 sp->handle, sp->type);
120 else
121 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
122 "Abort timeout 2 - hdl=%x, type=%x\n",
123 sp->handle, sp->type);
124
125 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
126 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
127 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
128 sp->cmd_sp)) {
129 qpair->req->outstanding_cmds[handle] = NULL;
130 cmdsp_found = 1;
131 qla_put_fw_resources(qpair, &sp->cmd_sp->iores);
132 }
133
134 /* removing the abort */
135 if (qpair->req->outstanding_cmds[handle] == sp) {
136 qpair->req->outstanding_cmds[handle] = NULL;
137 sp_found = 1;
138 qla_put_fw_resources(qpair, &sp->iores);
139 break;
140 }
141 }
142 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
143
144 if (cmdsp_found && sp->cmd_sp) {
145 /*
146 * This done function should take care of
147 * original command ref: INIT
148 */
149 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
150 }
151
152 if (sp_found) {
153 abt->u.abt.comp_status = cpu_to_le16(CS_TIMEOUT);
154 sp->done(sp, QLA_OS_TIMER_EXPIRED);
155 }
156 }
157
qla24xx_abort_sp_done(srb_t * sp,int res)158 static void qla24xx_abort_sp_done(srb_t *sp, int res)
159 {
160 struct srb_iocb *abt = &sp->u.iocb_cmd;
161 srb_t *orig_sp = sp->cmd_sp;
162
163 if (orig_sp)
164 qla_wait_nvme_release_cmd_kref(orig_sp);
165
166 if (sp->flags & SRB_WAKEUP_ON_COMP)
167 complete(&abt->u.abt.comp);
168 else
169 /* ref: INIT */
170 kref_put(&sp->cmd_kref, qla2x00_sp_release);
171 }
172
qla24xx_async_abort_cmd(srb_t * cmd_sp,bool wait)173 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
174 {
175 scsi_qla_host_t *vha = cmd_sp->vha;
176 struct srb_iocb *abt_iocb;
177 srb_t *sp;
178 int rval = QLA_FUNCTION_FAILED;
179
180 /* ref: INIT for ABTS command */
181 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
182 GFP_ATOMIC);
183 if (!sp)
184 return QLA_MEMORY_ALLOC_FAILED;
185
186 qla_vha_mark_busy(vha);
187 abt_iocb = &sp->u.iocb_cmd;
188 sp->type = SRB_ABT_CMD;
189 sp->name = "abort";
190 sp->qpair = cmd_sp->qpair;
191 sp->cmd_sp = cmd_sp;
192 if (wait)
193 sp->flags = SRB_WAKEUP_ON_COMP;
194
195 init_completion(&abt_iocb->u.abt.comp);
196 /* FW can send 2 x ABTS's timeout/20s */
197 qla2x00_init_async_sp(sp, 42, qla24xx_abort_sp_done);
198 sp->u.iocb_cmd.timeout = qla24xx_abort_iocb_timeout;
199
200 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
201 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
202
203 ql_dbg(ql_dbg_async, vha, 0x507c,
204 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
205 cmd_sp->type);
206
207 rval = qla2x00_start_sp(sp);
208 if (rval != QLA_SUCCESS) {
209 /* ref: INIT */
210 kref_put(&sp->cmd_kref, qla2x00_sp_release);
211 return rval;
212 }
213
214 if (wait) {
215 wait_for_completion(&abt_iocb->u.abt.comp);
216 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
217 QLA_SUCCESS : QLA_ERR_FROM_FW;
218 /* ref: INIT */
219 kref_put(&sp->cmd_kref, qla2x00_sp_release);
220 }
221
222 return rval;
223 }
224
225 void
qla2x00_async_iocb_timeout(void * data)226 qla2x00_async_iocb_timeout(void *data)
227 {
228 srb_t *sp = data;
229 fc_port_t *fcport = sp->fcport;
230 struct srb_iocb *lio = &sp->u.iocb_cmd;
231 int rc, h;
232 unsigned long flags;
233
234 if (fcport) {
235 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
236 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
237 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
238
239 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
240 } else {
241 pr_info("Async-%s timeout - hdl=%x.\n",
242 sp->name, sp->handle);
243 }
244
245 switch (sp->type) {
246 case SRB_LOGIN_CMD:
247 rc = qla24xx_async_abort_cmd(sp, false);
248 if (rc) {
249 /* Retry as needed. */
250 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
251 lio->u.logio.data[1] =
252 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
253 QLA_LOGIO_LOGIN_RETRIED : 0;
254 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
255 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
256 h++) {
257 if (sp->qpair->req->outstanding_cmds[h] ==
258 sp) {
259 sp->qpair->req->outstanding_cmds[h] =
260 NULL;
261 break;
262 }
263 }
264 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
265 sp->done(sp, QLA_FUNCTION_TIMEOUT);
266 }
267 break;
268 case SRB_LOGOUT_CMD:
269 case SRB_CT_PTHRU_CMD:
270 case SRB_MB_IOCB:
271 case SRB_NACK_PLOGI:
272 case SRB_NACK_PRLI:
273 case SRB_NACK_LOGO:
274 case SRB_CTRL_VP:
275 default:
276 rc = qla24xx_async_abort_cmd(sp, false);
277 if (rc) {
278 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
279 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
280 h++) {
281 if (sp->qpair->req->outstanding_cmds[h] ==
282 sp) {
283 sp->qpair->req->outstanding_cmds[h] =
284 NULL;
285 break;
286 }
287 }
288 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
289 sp->done(sp, QLA_FUNCTION_TIMEOUT);
290 }
291 break;
292 }
293 }
294
qla2x00_async_login_sp_done(srb_t * sp,int res)295 static void qla2x00_async_login_sp_done(srb_t *sp, int res)
296 {
297 struct scsi_qla_host *vha = sp->vha;
298 struct srb_iocb *lio = &sp->u.iocb_cmd;
299 struct event_arg ea;
300
301 ql_dbg(ql_dbg_disc, vha, 0x20dd,
302 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
303
304 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
305
306 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
307 memset(&ea, 0, sizeof(ea));
308 ea.fcport = sp->fcport;
309 ea.data[0] = lio->u.logio.data[0];
310 ea.data[1] = lio->u.logio.data[1];
311 ea.iop[0] = lio->u.logio.iop[0];
312 ea.iop[1] = lio->u.logio.iop[1];
313 ea.sp = sp;
314 if (res)
315 ea.data[0] = MBS_COMMAND_ERROR;
316 qla24xx_handle_plogi_done_event(vha, &ea);
317 }
318
319 /* ref: INIT */
320 kref_put(&sp->cmd_kref, qla2x00_sp_release);
321 }
322
323 int
qla2x00_async_login(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)324 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
325 uint16_t *data)
326 {
327 srb_t *sp;
328 struct srb_iocb *lio;
329 int rval = QLA_FUNCTION_FAILED;
330
331 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
332 fcport->loop_id == FC_NO_LOOP_ID) {
333 ql_log(ql_log_warn, vha, 0xffff,
334 "%s: %8phC - not sending command.\n",
335 __func__, fcport->port_name);
336 return rval;
337 }
338
339 /* ref: INIT */
340 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
341 if (!sp)
342 goto done;
343
344 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
345 fcport->flags |= FCF_ASYNC_SENT;
346 fcport->logout_completed = 0;
347
348 sp->type = SRB_LOGIN_CMD;
349 sp->name = "login";
350 sp->gen1 = fcport->rscn_gen;
351 sp->gen2 = fcport->login_gen;
352 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
353 qla2x00_async_login_sp_done);
354
355 lio = &sp->u.iocb_cmd;
356 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) {
357 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
358 } else {
359 if (vha->hw->flags.edif_enabled &&
360 DBELL_ACTIVE(vha)) {
361 lio->u.logio.flags |=
362 (SRB_LOGIN_FCSP | SRB_LOGIN_SKIP_PRLI);
363 } else {
364 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
365 }
366 }
367
368 if (NVME_TARGET(vha->hw, fcport))
369 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
370
371 rval = qla2x00_start_sp(sp);
372
373 ql_dbg(ql_dbg_disc, vha, 0x2072,
374 "Async-login - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
375 fcport->port_name, sp->handle, fcport->loop_id,
376 fcport->d_id.b24, fcport->login_retry,
377 lio->u.logio.flags & SRB_LOGIN_FCSP ? "FCSP" : "");
378
379 if (rval != QLA_SUCCESS) {
380 fcport->flags |= FCF_LOGIN_NEEDED;
381 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
382 goto done_free_sp;
383 }
384
385 return rval;
386
387 done_free_sp:
388 /* ref: INIT */
389 kref_put(&sp->cmd_kref, qla2x00_sp_release);
390 fcport->flags &= ~FCF_ASYNC_SENT;
391 done:
392 fcport->flags &= ~FCF_ASYNC_ACTIVE;
393
394 /*
395 * async login failed. Could be due to iocb/exchange resource
396 * being low. Set state DELETED for re-login process to start again.
397 */
398 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
399 return rval;
400 }
401
qla2x00_async_logout_sp_done(srb_t * sp,int res)402 static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
403 {
404 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
405 sp->fcport->login_gen++;
406 qlt_logo_completion_handler(sp->fcport, sp->u.iocb_cmd.u.logio.data[0]);
407 /* ref: INIT */
408 kref_put(&sp->cmd_kref, qla2x00_sp_release);
409 }
410
411 int
qla2x00_async_logout(struct scsi_qla_host * vha,fc_port_t * fcport)412 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
413 {
414 srb_t *sp;
415 int rval = QLA_FUNCTION_FAILED;
416
417 fcport->flags |= FCF_ASYNC_SENT;
418 /* ref: INIT */
419 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
420 if (!sp)
421 goto done;
422
423 sp->type = SRB_LOGOUT_CMD;
424 sp->name = "logout";
425 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
426 qla2x00_async_logout_sp_done);
427
428 ql_dbg(ql_dbg_disc, vha, 0x2070,
429 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC explicit %d.\n",
430 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
431 fcport->d_id.b.area, fcport->d_id.b.al_pa,
432 fcport->port_name, fcport->explicit_logout);
433
434 rval = qla2x00_start_sp(sp);
435 if (rval != QLA_SUCCESS)
436 goto done_free_sp;
437 return rval;
438
439 done_free_sp:
440 /* ref: INIT */
441 kref_put(&sp->cmd_kref, qla2x00_sp_release);
442 done:
443 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
444 return rval;
445 }
446
447 void
qla2x00_async_prlo_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)448 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
449 uint16_t *data)
450 {
451 fcport->flags &= ~FCF_ASYNC_ACTIVE;
452 /* Don't re-login in target mode */
453 if (!fcport->tgt_session)
454 qla2x00_mark_device_lost(vha, fcport, 1);
455 qlt_logo_completion_handler(fcport, data[0]);
456 }
457
qla2x00_async_prlo_sp_done(srb_t * sp,int res)458 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
459 {
460 struct srb_iocb *lio = &sp->u.iocb_cmd;
461 struct scsi_qla_host *vha = sp->vha;
462
463 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
464 if (!test_bit(UNLOADING, &vha->dpc_flags))
465 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
466 lio->u.logio.data);
467 /* ref: INIT */
468 kref_put(&sp->cmd_kref, qla2x00_sp_release);
469 }
470
471 int
qla2x00_async_prlo(struct scsi_qla_host * vha,fc_port_t * fcport)472 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
473 {
474 srb_t *sp;
475 int rval;
476
477 rval = QLA_FUNCTION_FAILED;
478 /* ref: INIT */
479 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
480 if (!sp)
481 goto done;
482
483 sp->type = SRB_PRLO_CMD;
484 sp->name = "prlo";
485 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
486 qla2x00_async_prlo_sp_done);
487
488 ql_dbg(ql_dbg_disc, vha, 0x2070,
489 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
490 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
491 fcport->d_id.b.area, fcport->d_id.b.al_pa);
492
493 rval = qla2x00_start_sp(sp);
494 if (rval != QLA_SUCCESS)
495 goto done_free_sp;
496
497 return rval;
498
499 done_free_sp:
500 /* ref: INIT */
501 kref_put(&sp->cmd_kref, qla2x00_sp_release);
502 done:
503 fcport->flags &= ~FCF_ASYNC_ACTIVE;
504 return rval;
505 }
506
507 static
qla24xx_handle_adisc_event(scsi_qla_host_t * vha,struct event_arg * ea)508 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
509 {
510 struct fc_port *fcport = ea->fcport;
511 unsigned long flags;
512
513 ql_dbg(ql_dbg_disc, vha, 0x20d2,
514 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
515 __func__, fcport->port_name, fcport->disc_state,
516 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
517 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
518
519 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
520 ea->data[0]);
521
522 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
523 ql_dbg(ql_dbg_disc, vha, 0x2066,
524 "%s %8phC: adisc fail: post delete\n",
525 __func__, ea->fcport->port_name);
526
527 spin_lock_irqsave(&vha->work_lock, flags);
528 /* deleted = 0 & logout_on_delete = force fw cleanup */
529 if (fcport->deleted == QLA_SESS_DELETED)
530 fcport->deleted = 0;
531
532 fcport->logout_on_delete = 1;
533 spin_unlock_irqrestore(&vha->work_lock, flags);
534
535 qlt_schedule_sess_for_deletion(ea->fcport);
536 return;
537 }
538
539 if (ea->fcport->disc_state == DSC_DELETE_PEND)
540 return;
541
542 if (ea->sp->gen2 != ea->fcport->login_gen) {
543 /* target side must have changed it. */
544 ql_dbg(ql_dbg_disc, vha, 0x20d3,
545 "%s %8phC generation changed\n",
546 __func__, ea->fcport->port_name);
547 return;
548 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
549 qla_rscn_replay(fcport);
550 qlt_schedule_sess_for_deletion(fcport);
551 return;
552 }
553
554 __qla24xx_handle_gpdb_event(vha, ea);
555 }
556
qla_post_els_plogi_work(struct scsi_qla_host * vha,fc_port_t * fcport)557 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
558 {
559 struct qla_work_evt *e;
560
561 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
562 if (!e)
563 return QLA_FUNCTION_FAILED;
564
565 e->u.fcport.fcport = fcport;
566 fcport->flags |= FCF_ASYNC_ACTIVE;
567 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
568 return qla2x00_post_work(vha, e);
569 }
570
qla2x00_async_adisc_sp_done(srb_t * sp,int res)571 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
572 {
573 struct scsi_qla_host *vha = sp->vha;
574 struct event_arg ea;
575 struct srb_iocb *lio = &sp->u.iocb_cmd;
576
577 ql_dbg(ql_dbg_disc, vha, 0x2066,
578 "Async done-%s res %x %8phC\n",
579 sp->name, res, sp->fcport->port_name);
580
581 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
582
583 memset(&ea, 0, sizeof(ea));
584 ea.rc = res;
585 ea.data[0] = lio->u.logio.data[0];
586 ea.data[1] = lio->u.logio.data[1];
587 ea.iop[0] = lio->u.logio.iop[0];
588 ea.iop[1] = lio->u.logio.iop[1];
589 ea.fcport = sp->fcport;
590 ea.sp = sp;
591 if (res)
592 ea.data[0] = MBS_COMMAND_ERROR;
593
594 qla24xx_handle_adisc_event(vha, &ea);
595 /* ref: INIT */
596 kref_put(&sp->cmd_kref, qla2x00_sp_release);
597 }
598
599 int
qla2x00_async_adisc(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)600 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
601 uint16_t *data)
602 {
603 srb_t *sp;
604 struct srb_iocb *lio;
605 int rval = QLA_FUNCTION_FAILED;
606
607 if (IS_SESSION_DELETED(fcport)) {
608 ql_log(ql_log_warn, vha, 0xffff,
609 "%s: %8phC is being delete - not sending command.\n",
610 __func__, fcport->port_name);
611 fcport->flags &= ~FCF_ASYNC_ACTIVE;
612 return rval;
613 }
614
615 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
616 return rval;
617
618 fcport->flags |= FCF_ASYNC_SENT;
619 /* ref: INIT */
620 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
621 if (!sp)
622 goto done;
623
624 sp->type = SRB_ADISC_CMD;
625 sp->name = "adisc";
626 sp->gen1 = fcport->rscn_gen;
627 sp->gen2 = fcport->login_gen;
628 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
629 qla2x00_async_adisc_sp_done);
630
631 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) {
632 lio = &sp->u.iocb_cmd;
633 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
634 }
635
636 ql_dbg(ql_dbg_disc, vha, 0x206f,
637 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
638 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
639
640 rval = qla2x00_start_sp(sp);
641 if (rval != QLA_SUCCESS)
642 goto done_free_sp;
643
644 return rval;
645
646 done_free_sp:
647 /* ref: INIT */
648 kref_put(&sp->cmd_kref, qla2x00_sp_release);
649 done:
650 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
651 qla2x00_post_async_adisc_work(vha, fcport, data);
652 return rval;
653 }
654
qla2x00_is_reserved_id(scsi_qla_host_t * vha,uint16_t loop_id)655 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
656 {
657 struct qla_hw_data *ha = vha->hw;
658
659 if (IS_FWI2_CAPABLE(ha))
660 return loop_id > NPH_LAST_HANDLE;
661
662 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
663 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
664 }
665
666 /**
667 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
668 * @vha: adapter state pointer.
669 * @dev: port structure pointer.
670 *
671 * Returns:
672 * qla2x00 local function return status code.
673 *
674 * Context:
675 * Kernel context.
676 */
qla2x00_find_new_loop_id(scsi_qla_host_t * vha,fc_port_t * dev)677 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
678 {
679 int rval;
680 struct qla_hw_data *ha = vha->hw;
681 unsigned long flags = 0;
682
683 rval = QLA_SUCCESS;
684
685 spin_lock_irqsave(&ha->vport_slock, flags);
686
687 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
688 if (dev->loop_id >= LOOPID_MAP_SIZE ||
689 qla2x00_is_reserved_id(vha, dev->loop_id)) {
690 dev->loop_id = FC_NO_LOOP_ID;
691 rval = QLA_FUNCTION_FAILED;
692 } else {
693 set_bit(dev->loop_id, ha->loop_id_map);
694 }
695 spin_unlock_irqrestore(&ha->vport_slock, flags);
696
697 if (rval == QLA_SUCCESS)
698 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
699 "Assigning new loopid=%x, portid=%x.\n",
700 dev->loop_id, dev->d_id.b24);
701 else
702 ql_log(ql_log_warn, dev->vha, 0x2087,
703 "No loop_id's available, portid=%x.\n",
704 dev->d_id.b24);
705
706 return rval;
707 }
708
qla2x00_clear_loop_id(fc_port_t * fcport)709 void qla2x00_clear_loop_id(fc_port_t *fcport)
710 {
711 struct qla_hw_data *ha = fcport->vha->hw;
712
713 if (fcport->loop_id == FC_NO_LOOP_ID ||
714 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
715 return;
716
717 clear_bit(fcport->loop_id, ha->loop_id_map);
718 fcport->loop_id = FC_NO_LOOP_ID;
719 }
720
qla24xx_handle_gnl_done_event(scsi_qla_host_t * vha,struct event_arg * ea)721 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
722 struct event_arg *ea)
723 {
724 fc_port_t *fcport, *conflict_fcport;
725 struct get_name_list_extended *e;
726 u16 i, n, found = 0, loop_id;
727 port_id_t id;
728 u64 wwn;
729 u16 data[2];
730 u8 current_login_state, nvme_cls;
731
732 fcport = ea->fcport;
733 ql_dbg(ql_dbg_disc, vha, 0xffff,
734 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d edif %d\n",
735 __func__, fcport->port_name, fcport->disc_state,
736 fcport->fw_login_state, ea->rc,
737 fcport->login_gen, fcport->last_login_gen,
738 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id, fcport->edif.enable);
739
740 if (fcport->disc_state == DSC_DELETE_PEND)
741 return;
742
743 if (ea->rc) { /* rval */
744 if (fcport->login_retry == 0) {
745 ql_dbg(ql_dbg_disc, vha, 0x20de,
746 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
747 fcport->port_name, fcport->login_retry);
748 }
749 return;
750 }
751
752 if (fcport->last_rscn_gen != fcport->rscn_gen) {
753 qla_rscn_replay(fcport);
754 qlt_schedule_sess_for_deletion(fcport);
755 return;
756 } else if (fcport->last_login_gen != fcport->login_gen) {
757 ql_dbg(ql_dbg_disc, vha, 0x20e0,
758 "%s %8phC login gen changed\n",
759 __func__, fcport->port_name);
760 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
761 return;
762 }
763
764 n = ea->data[0] / sizeof(struct get_name_list_extended);
765
766 ql_dbg(ql_dbg_disc, vha, 0x20e1,
767 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
768 __func__, __LINE__, fcport->port_name, n,
769 fcport->d_id.b.domain, fcport->d_id.b.area,
770 fcport->d_id.b.al_pa, fcport->loop_id);
771
772 for (i = 0; i < n; i++) {
773 e = &vha->gnl.l[i];
774 wwn = wwn_to_u64(e->port_name);
775 id.b.domain = e->port_id[2];
776 id.b.area = e->port_id[1];
777 id.b.al_pa = e->port_id[0];
778 id.b.rsvd_1 = 0;
779
780 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
781 continue;
782
783 if (IS_SW_RESV_ADDR(id))
784 continue;
785
786 found = 1;
787
788 loop_id = le16_to_cpu(e->nport_handle);
789 loop_id = (loop_id & 0x7fff);
790 nvme_cls = e->current_login_state >> 4;
791 current_login_state = e->current_login_state & 0xf;
792
793 if (PRLI_PHASE(nvme_cls)) {
794 current_login_state = nvme_cls;
795 fcport->fc4_type &= ~FS_FC4TYPE_FCP;
796 fcport->fc4_type |= FS_FC4TYPE_NVME;
797 } else if (PRLI_PHASE(current_login_state)) {
798 fcport->fc4_type |= FS_FC4TYPE_FCP;
799 fcport->fc4_type &= ~FS_FC4TYPE_NVME;
800 }
801
802 ql_dbg(ql_dbg_disc, vha, 0x20e2,
803 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n",
804 __func__, fcport->port_name,
805 e->current_login_state, fcport->fw_login_state,
806 fcport->fc4_type, id.b24, fcport->d_id.b24,
807 loop_id, fcport->loop_id);
808
809 switch (fcport->disc_state) {
810 case DSC_DELETE_PEND:
811 case DSC_DELETED:
812 break;
813 default:
814 if ((id.b24 != fcport->d_id.b24 &&
815 fcport->d_id.b24 &&
816 fcport->loop_id != FC_NO_LOOP_ID) ||
817 (fcport->loop_id != FC_NO_LOOP_ID &&
818 fcport->loop_id != loop_id)) {
819 ql_dbg(ql_dbg_disc, vha, 0x20e3,
820 "%s %d %8phC post del sess\n",
821 __func__, __LINE__, fcport->port_name);
822 if (fcport->n2n_flag)
823 fcport->d_id.b24 = 0;
824 qlt_schedule_sess_for_deletion(fcport);
825 return;
826 }
827 break;
828 }
829
830 fcport->loop_id = loop_id;
831 if (fcport->n2n_flag)
832 fcport->d_id.b24 = id.b24;
833
834 wwn = wwn_to_u64(fcport->port_name);
835 qlt_find_sess_invalidate_other(vha, wwn,
836 id, loop_id, &conflict_fcport);
837
838 if (conflict_fcport) {
839 /*
840 * Another share fcport share the same loop_id &
841 * nport id. Conflict fcport needs to finish
842 * cleanup before this fcport can proceed to login.
843 */
844 conflict_fcport->conflict = fcport;
845 fcport->login_pause = 1;
846 }
847
848 switch (vha->hw->current_topology) {
849 default:
850 switch (current_login_state) {
851 case DSC_LS_PRLI_COMP:
852 ql_dbg(ql_dbg_disc,
853 vha, 0x20e4, "%s %d %8phC post gpdb\n",
854 __func__, __LINE__, fcport->port_name);
855
856 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
857 fcport->port_type = FCT_INITIATOR;
858 else
859 fcport->port_type = FCT_TARGET;
860 data[0] = data[1] = 0;
861 qla2x00_post_async_adisc_work(vha, fcport,
862 data);
863 break;
864 case DSC_LS_PLOGI_COMP:
865 if (vha->hw->flags.edif_enabled) {
866 /* check to see if App support Secure */
867 qla24xx_post_gpdb_work(vha, fcport, 0);
868 break;
869 }
870 fallthrough;
871 case DSC_LS_PORT_UNAVAIL:
872 default:
873 if (fcport->loop_id == FC_NO_LOOP_ID) {
874 qla2x00_find_new_loop_id(vha, fcport);
875 fcport->fw_login_state =
876 DSC_LS_PORT_UNAVAIL;
877 }
878 ql_dbg(ql_dbg_disc, vha, 0x20e5,
879 "%s %d %8phC\n", __func__, __LINE__,
880 fcport->port_name);
881 qla24xx_fcport_handle_login(vha, fcport);
882 break;
883 }
884 break;
885 case ISP_CFG_N:
886 fcport->fw_login_state = current_login_state;
887 fcport->d_id = id;
888 switch (current_login_state) {
889 case DSC_LS_PRLI_PEND:
890 /*
891 * In the middle of PRLI. Let it finish.
892 * Allow relogin code to recheck state again
893 * with GNL. Push disc_state back to DELETED
894 * so GNL can go out again
895 */
896 qla2x00_set_fcport_disc_state(fcport,
897 DSC_DELETED);
898 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
899 break;
900 case DSC_LS_PRLI_COMP:
901 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
902 fcport->port_type = FCT_INITIATOR;
903 else
904 fcport->port_type = FCT_TARGET;
905
906 data[0] = data[1] = 0;
907 qla2x00_post_async_adisc_work(vha, fcport,
908 data);
909 break;
910 case DSC_LS_PLOGI_COMP:
911 if (vha->hw->flags.edif_enabled &&
912 DBELL_ACTIVE(vha)) {
913 /* check to see if App support secure or not */
914 qla24xx_post_gpdb_work(vha, fcport, 0);
915 break;
916 }
917 if (fcport_is_bigger(fcport)) {
918 /* local adapter is smaller */
919 if (fcport->loop_id != FC_NO_LOOP_ID)
920 qla2x00_clear_loop_id(fcport);
921
922 fcport->loop_id = loop_id;
923 qla24xx_fcport_handle_login(vha,
924 fcport);
925 break;
926 }
927 fallthrough;
928 default:
929 if (fcport_is_smaller(fcport)) {
930 /* local adapter is bigger */
931 if (fcport->loop_id != FC_NO_LOOP_ID)
932 qla2x00_clear_loop_id(fcport);
933
934 fcport->loop_id = loop_id;
935 qla24xx_fcport_handle_login(vha,
936 fcport);
937 }
938 break;
939 }
940 break;
941 } /* switch (ha->current_topology) */
942 }
943
944 if (!found) {
945 switch (vha->hw->current_topology) {
946 case ISP_CFG_F:
947 case ISP_CFG_FL:
948 for (i = 0; i < n; i++) {
949 e = &vha->gnl.l[i];
950 id.b.domain = e->port_id[0];
951 id.b.area = e->port_id[1];
952 id.b.al_pa = e->port_id[2];
953 id.b.rsvd_1 = 0;
954 loop_id = le16_to_cpu(e->nport_handle);
955
956 if (fcport->d_id.b24 == id.b24) {
957 conflict_fcport =
958 qla2x00_find_fcport_by_wwpn(vha,
959 e->port_name, 0);
960 if (conflict_fcport) {
961 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
962 vha, 0x20e5,
963 "%s %d %8phC post del sess\n",
964 __func__, __LINE__,
965 conflict_fcport->port_name);
966 qlt_schedule_sess_for_deletion
967 (conflict_fcport);
968 }
969 }
970 /*
971 * FW already picked this loop id for
972 * another fcport
973 */
974 if (fcport->loop_id == loop_id)
975 fcport->loop_id = FC_NO_LOOP_ID;
976 }
977 qla24xx_fcport_handle_login(vha, fcport);
978 break;
979 case ISP_CFG_N:
980 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
981 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
982 if (fcport->n2n_link_reset_cnt < 2) {
983 fcport->n2n_link_reset_cnt++;
984 /*
985 * remote port is not sending PLOGI.
986 * Reset link to kick start his state
987 * machine
988 */
989 set_bit(N2N_LINK_RESET,
990 &vha->dpc_flags);
991 } else {
992 if (fcport->n2n_chip_reset < 1) {
993 ql_log(ql_log_info, vha, 0x705d,
994 "Chip reset to bring laser down");
995 set_bit(ISP_ABORT_NEEDED,
996 &vha->dpc_flags);
997 fcport->n2n_chip_reset++;
998 } else {
999 ql_log(ql_log_info, vha, 0x705d,
1000 "Remote port %8ph is not coming back\n",
1001 fcport->port_name);
1002 fcport->scan_state = 0;
1003 }
1004 }
1005 qla2xxx_wake_dpc(vha);
1006 } else {
1007 /*
1008 * report port suppose to do PLOGI. Give him
1009 * more time. FW will catch it.
1010 */
1011 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1012 }
1013 break;
1014 case ISP_CFG_NL:
1015 qla24xx_fcport_handle_login(vha, fcport);
1016 break;
1017 default:
1018 break;
1019 }
1020 }
1021 } /* gnl_event */
1022
qla24xx_async_gnl_sp_done(srb_t * sp,int res)1023 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
1024 {
1025 struct scsi_qla_host *vha = sp->vha;
1026 unsigned long flags;
1027 struct fc_port *fcport = NULL, *tf;
1028 u16 i, n = 0, loop_id;
1029 struct event_arg ea;
1030 struct get_name_list_extended *e;
1031 u64 wwn;
1032 struct list_head h;
1033 bool found = false;
1034
1035 ql_dbg(ql_dbg_disc, vha, 0x20e7,
1036 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
1037 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
1038 sp->u.iocb_cmd.u.mbx.in_mb[2]);
1039
1040
1041 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
1042 memset(&ea, 0, sizeof(ea));
1043 ea.sp = sp;
1044 ea.rc = res;
1045
1046 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
1047 sizeof(struct get_name_list_extended)) {
1048 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
1049 sizeof(struct get_name_list_extended);
1050 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
1051 }
1052
1053 for (i = 0; i < n; i++) {
1054 e = &vha->gnl.l[i];
1055 loop_id = le16_to_cpu(e->nport_handle);
1056 /* mask out reserve bit */
1057 loop_id = (loop_id & 0x7fff);
1058 set_bit(loop_id, vha->hw->loop_id_map);
1059 wwn = wwn_to_u64(e->port_name);
1060
1061 ql_dbg(ql_dbg_disc, vha, 0x20e8,
1062 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
1063 __func__, &wwn, e->port_id[2], e->port_id[1],
1064 e->port_id[0], e->current_login_state, e->last_login_state,
1065 (loop_id & 0x7fff));
1066 }
1067
1068 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1069
1070 INIT_LIST_HEAD(&h);
1071 fcport = tf = NULL;
1072 if (!list_empty(&vha->gnl.fcports))
1073 list_splice_init(&vha->gnl.fcports, &h);
1074 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1075
1076 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
1077 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1078 list_del_init(&fcport->gnl_entry);
1079 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1080 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1081 ea.fcport = fcport;
1082
1083 qla24xx_handle_gnl_done_event(vha, &ea);
1084 }
1085
1086 /* create new fcport if fw has knowledge of new sessions */
1087 for (i = 0; i < n; i++) {
1088 port_id_t id;
1089 u64 wwnn;
1090
1091 e = &vha->gnl.l[i];
1092 wwn = wwn_to_u64(e->port_name);
1093
1094 found = false;
1095 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
1096 if (!memcmp((u8 *)&wwn, fcport->port_name,
1097 WWN_SIZE)) {
1098 found = true;
1099 break;
1100 }
1101 }
1102
1103 id.b.domain = e->port_id[2];
1104 id.b.area = e->port_id[1];
1105 id.b.al_pa = e->port_id[0];
1106 id.b.rsvd_1 = 0;
1107
1108 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1109 ql_dbg(ql_dbg_disc, vha, 0x2065,
1110 "%s %d %8phC %06x post new sess\n",
1111 __func__, __LINE__, (u8 *)&wwn, id.b24);
1112 wwnn = wwn_to_u64(e->node_name);
1113 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1114 (u8 *)&wwnn, NULL, 0);
1115 }
1116 }
1117
1118 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1119 vha->gnl.sent = 0;
1120 if (!list_empty(&vha->gnl.fcports)) {
1121 /* retrigger gnl */
1122 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
1123 gnl_entry) {
1124 list_del_init(&fcport->gnl_entry);
1125 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1126 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
1127 break;
1128 }
1129 }
1130 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1131
1132 /* ref: INIT */
1133 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1134 }
1135
qla24xx_async_gnl(struct scsi_qla_host * vha,fc_port_t * fcport)1136 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1137 {
1138 srb_t *sp;
1139 int rval = QLA_FUNCTION_FAILED;
1140 unsigned long flags;
1141 u16 *mb;
1142
1143 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1144 goto done;
1145
1146 ql_dbg(ql_dbg_disc, vha, 0x20d9,
1147 "Async-gnlist WWPN %8phC \n", fcport->port_name);
1148
1149 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1150 fcport->flags |= FCF_ASYNC_SENT;
1151 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1152 fcport->last_rscn_gen = fcport->rscn_gen;
1153 fcport->last_login_gen = fcport->login_gen;
1154
1155 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
1156 if (vha->gnl.sent) {
1157 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1158 return QLA_SUCCESS;
1159 }
1160 vha->gnl.sent = 1;
1161 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1162
1163 /* ref: INIT */
1164 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1165 if (!sp)
1166 goto done;
1167
1168 sp->type = SRB_MB_IOCB;
1169 sp->name = "gnlist";
1170 sp->gen1 = fcport->rscn_gen;
1171 sp->gen2 = fcport->login_gen;
1172 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
1173 qla24xx_async_gnl_sp_done);
1174
1175 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1176 mb[0] = MBC_PORT_NODE_NAME_LIST;
1177 mb[1] = BIT_2 | BIT_3;
1178 mb[2] = MSW(vha->gnl.ldma);
1179 mb[3] = LSW(vha->gnl.ldma);
1180 mb[6] = MSW(MSD(vha->gnl.ldma));
1181 mb[7] = LSW(MSD(vha->gnl.ldma));
1182 mb[8] = vha->gnl.size;
1183 mb[9] = vha->vp_idx;
1184
1185 ql_dbg(ql_dbg_disc, vha, 0x20da,
1186 "Async-%s - OUT WWPN %8phC hndl %x\n",
1187 sp->name, fcport->port_name, sp->handle);
1188
1189 rval = qla2x00_start_sp(sp);
1190 if (rval != QLA_SUCCESS)
1191 goto done_free_sp;
1192
1193 return rval;
1194
1195 done_free_sp:
1196 /*
1197 * use qla24xx_async_gnl_sp_done to purge all pending gnl request.
1198 * kref_put is call behind the scene.
1199 */
1200 sp->u.iocb_cmd.u.mbx.in_mb[0] = MBS_COMMAND_ERROR;
1201 qla24xx_async_gnl_sp_done(sp, QLA_COMMAND_ERROR);
1202 fcport->flags &= ~(FCF_ASYNC_SENT);
1203 done:
1204 fcport->flags &= ~(FCF_ASYNC_ACTIVE);
1205 return rval;
1206 }
1207
qla24xx_post_gnl_work(struct scsi_qla_host * vha,fc_port_t * fcport)1208 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1209 {
1210 struct qla_work_evt *e;
1211
1212 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1213 if (!e)
1214 return QLA_FUNCTION_FAILED;
1215
1216 e->u.fcport.fcport = fcport;
1217 fcport->flags |= FCF_ASYNC_ACTIVE;
1218 return qla2x00_post_work(vha, e);
1219 }
1220
qla24xx_async_gpdb_sp_done(srb_t * sp,int res)1221 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
1222 {
1223 struct scsi_qla_host *vha = sp->vha;
1224 struct qla_hw_data *ha = vha->hw;
1225 fc_port_t *fcport = sp->fcport;
1226 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1227 struct event_arg ea;
1228
1229 ql_dbg(ql_dbg_disc, vha, 0x20db,
1230 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1231 sp->name, res, fcport->port_name, mb[1], mb[2]);
1232
1233 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1234
1235 if (res == QLA_FUNCTION_TIMEOUT)
1236 goto done;
1237
1238 memset(&ea, 0, sizeof(ea));
1239 ea.fcport = fcport;
1240 ea.sp = sp;
1241
1242 qla24xx_handle_gpdb_event(vha, &ea);
1243
1244 done:
1245 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1246 sp->u.iocb_cmd.u.mbx.in_dma);
1247
1248 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1249 }
1250
qla24xx_post_prli_work(struct scsi_qla_host * vha,fc_port_t * fcport)1251 int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1252 {
1253 struct qla_work_evt *e;
1254
1255 if (vha->host->active_mode == MODE_TARGET)
1256 return QLA_FUNCTION_FAILED;
1257
1258 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1259 if (!e)
1260 return QLA_FUNCTION_FAILED;
1261
1262 e->u.fcport.fcport = fcport;
1263
1264 return qla2x00_post_work(vha, e);
1265 }
1266
qla2x00_async_prli_sp_done(srb_t * sp,int res)1267 static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1268 {
1269 struct scsi_qla_host *vha = sp->vha;
1270 struct srb_iocb *lio = &sp->u.iocb_cmd;
1271 struct event_arg ea;
1272
1273 ql_dbg(ql_dbg_disc, vha, 0x2129,
1274 "%s %8phC res %x\n", __func__,
1275 sp->fcport->port_name, res);
1276
1277 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1278
1279 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1280 memset(&ea, 0, sizeof(ea));
1281 ea.fcport = sp->fcport;
1282 ea.data[0] = lio->u.logio.data[0];
1283 ea.data[1] = lio->u.logio.data[1];
1284 ea.iop[0] = lio->u.logio.iop[0];
1285 ea.iop[1] = lio->u.logio.iop[1];
1286 ea.sp = sp;
1287 if (res == QLA_OS_TIMER_EXPIRED)
1288 ea.data[0] = QLA_OS_TIMER_EXPIRED;
1289 else if (res)
1290 ea.data[0] = MBS_COMMAND_ERROR;
1291
1292 qla24xx_handle_prli_done_event(vha, &ea);
1293 }
1294
1295 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1296 }
1297
1298 int
qla24xx_async_prli(struct scsi_qla_host * vha,fc_port_t * fcport)1299 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1300 {
1301 srb_t *sp;
1302 struct srb_iocb *lio;
1303 int rval = QLA_FUNCTION_FAILED;
1304
1305 if (!vha->flags.online) {
1306 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1307 __func__, __LINE__, fcport->port_name);
1308 return rval;
1309 }
1310
1311 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1312 fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
1313 qla_dual_mode_enabled(vha)) {
1314 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1315 __func__, __LINE__, fcport->port_name);
1316 return rval;
1317 }
1318
1319 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1320 if (!sp)
1321 return rval;
1322
1323 fcport->flags |= FCF_ASYNC_SENT;
1324 fcport->logout_completed = 0;
1325
1326 sp->type = SRB_PRLI_CMD;
1327 sp->name = "prli";
1328 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
1329 qla2x00_async_prli_sp_done);
1330
1331 lio = &sp->u.iocb_cmd;
1332 lio->u.logio.flags = 0;
1333
1334 if (NVME_TARGET(vha->hw, fcport))
1335 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1336
1337 ql_dbg(ql_dbg_disc, vha, 0x211b,
1338 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d fc4type %x priority %x %s.\n",
1339 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1340 fcport->login_retry, fcport->fc4_type, vha->hw->fc4_type_priority,
1341 NVME_TARGET(vha->hw, fcport) ? "nvme" : "fcp");
1342
1343 rval = qla2x00_start_sp(sp);
1344 if (rval != QLA_SUCCESS) {
1345 fcport->flags |= FCF_LOGIN_NEEDED;
1346 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1347 goto done_free_sp;
1348 }
1349
1350 return rval;
1351
1352 done_free_sp:
1353 /* ref: INIT */
1354 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1355 fcport->flags &= ~FCF_ASYNC_SENT;
1356 return rval;
1357 }
1358
qla24xx_post_gpdb_work(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1359 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1360 {
1361 struct qla_work_evt *e;
1362
1363 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1364 if (!e)
1365 return QLA_FUNCTION_FAILED;
1366
1367 e->u.fcport.fcport = fcport;
1368 e->u.fcport.opt = opt;
1369 fcport->flags |= FCF_ASYNC_ACTIVE;
1370 return qla2x00_post_work(vha, e);
1371 }
1372
qla24xx_async_gpdb(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1373 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1374 {
1375 srb_t *sp;
1376 struct srb_iocb *mbx;
1377 int rval = QLA_FUNCTION_FAILED;
1378 u16 *mb;
1379 dma_addr_t pd_dma;
1380 struct port_database_24xx *pd;
1381 struct qla_hw_data *ha = vha->hw;
1382
1383 if (IS_SESSION_DELETED(fcport)) {
1384 ql_log(ql_log_warn, vha, 0xffff,
1385 "%s: %8phC is being delete - not sending command.\n",
1386 __func__, fcport->port_name);
1387 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1388 return rval;
1389 }
1390
1391 if (!vha->flags.online || fcport->flags & FCF_ASYNC_SENT) {
1392 ql_log(ql_log_warn, vha, 0xffff,
1393 "%s: %8phC online %d flags %x - not sending command.\n",
1394 __func__, fcport->port_name, vha->flags.online, fcport->flags);
1395 goto done;
1396 }
1397
1398 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1399 if (!sp)
1400 goto done;
1401
1402 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB);
1403
1404 fcport->flags |= FCF_ASYNC_SENT;
1405 sp->type = SRB_MB_IOCB;
1406 sp->name = "gpdb";
1407 sp->gen1 = fcport->rscn_gen;
1408 sp->gen2 = fcport->login_gen;
1409 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha) + 2,
1410 qla24xx_async_gpdb_sp_done);
1411
1412 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1413 if (pd == NULL) {
1414 ql_log(ql_log_warn, vha, 0xd043,
1415 "Failed to allocate port database structure.\n");
1416 goto done_free_sp;
1417 }
1418
1419 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1420 mb[0] = MBC_GET_PORT_DATABASE;
1421 mb[1] = fcport->loop_id;
1422 mb[2] = MSW(pd_dma);
1423 mb[3] = LSW(pd_dma);
1424 mb[6] = MSW(MSD(pd_dma));
1425 mb[7] = LSW(MSD(pd_dma));
1426 mb[9] = vha->vp_idx;
1427 mb[10] = opt;
1428
1429 mbx = &sp->u.iocb_cmd;
1430 mbx->u.mbx.in = (void *)pd;
1431 mbx->u.mbx.in_dma = pd_dma;
1432
1433 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1434 "Async-%s %8phC hndl %x opt %x\n",
1435 sp->name, fcport->port_name, sp->handle, opt);
1436
1437 rval = qla2x00_start_sp(sp);
1438 if (rval != QLA_SUCCESS)
1439 goto done_free_sp;
1440 return rval;
1441
1442 done_free_sp:
1443 if (pd)
1444 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1445
1446 kref_put(&sp->cmd_kref, qla2x00_sp_release);
1447 fcport->flags &= ~FCF_ASYNC_SENT;
1448 done:
1449 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1450 qla24xx_post_gpdb_work(vha, fcport, opt);
1451 return rval;
1452 }
1453
1454 static
__qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1455 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1456 {
1457 unsigned long flags;
1458
1459 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1460 ea->fcport->login_gen++;
1461 ea->fcport->logout_on_delete = 1;
1462
1463 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1464 vha->fcport_count++;
1465 ea->fcport->login_succ = 1;
1466
1467 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1468 qla24xx_sched_upd_fcport(ea->fcport);
1469 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1470 } else if (ea->fcport->login_succ) {
1471 /*
1472 * We have an existing session. A late RSCN delivery
1473 * must have triggered the session to be re-validate.
1474 * Session is still valid.
1475 */
1476 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1477 "%s %d %8phC session revalidate success\n",
1478 __func__, __LINE__, ea->fcport->port_name);
1479 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE);
1480 }
1481 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1482 }
1483
qla_chk_secure_login(scsi_qla_host_t * vha,fc_port_t * fcport,struct port_database_24xx * pd)1484 static int qla_chk_secure_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1485 struct port_database_24xx *pd)
1486 {
1487 int rc = 0;
1488
1489 if (pd->secure_login) {
1490 ql_dbg(ql_dbg_disc, vha, 0x104d,
1491 "Secure Login established on %8phC\n",
1492 fcport->port_name);
1493 fcport->flags |= FCF_FCSP_DEVICE;
1494 } else {
1495 ql_dbg(ql_dbg_disc, vha, 0x104d,
1496 "non-Secure Login %8phC",
1497 fcport->port_name);
1498 fcport->flags &= ~FCF_FCSP_DEVICE;
1499 }
1500 if (vha->hw->flags.edif_enabled) {
1501 if (fcport->flags & FCF_FCSP_DEVICE) {
1502 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_AUTH_PEND);
1503 /* Start edif prli timer & ring doorbell for app */
1504 fcport->edif.rx_sa_set = 0;
1505 fcport->edif.tx_sa_set = 0;
1506 fcport->edif.rx_sa_pending = 0;
1507 fcport->edif.tx_sa_pending = 0;
1508
1509 qla2x00_post_aen_work(vha, FCH_EVT_PORT_ONLINE,
1510 fcport->d_id.b24);
1511
1512 if (DBELL_ACTIVE(vha)) {
1513 ql_dbg(ql_dbg_disc, vha, 0x20ef,
1514 "%s %d %8phC EDIF: post DB_AUTH: AUTH needed\n",
1515 __func__, __LINE__, fcport->port_name);
1516 fcport->edif.app_sess_online = 1;
1517
1518 qla_edb_eventcreate(vha, VND_CMD_AUTH_STATE_NEEDED,
1519 fcport->d_id.b24, 0, fcport);
1520 }
1521
1522 rc = 1;
1523 } else if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
1524 ql_dbg(ql_dbg_disc, vha, 0x2117,
1525 "%s %d %8phC post prli\n",
1526 __func__, __LINE__, fcport->port_name);
1527 qla24xx_post_prli_work(vha, fcport);
1528 rc = 1;
1529 }
1530 }
1531 return rc;
1532 }
1533
1534 static
qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1535 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1536 {
1537 fc_port_t *fcport = ea->fcport;
1538 struct port_database_24xx *pd;
1539 struct srb *sp = ea->sp;
1540 uint8_t ls;
1541
1542 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1543
1544 fcport->flags &= ~FCF_ASYNC_SENT;
1545
1546 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1547 "%s %8phC DS %d LS %x fc4_type %x rc %x\n", __func__,
1548 fcport->port_name, fcport->disc_state, pd->current_login_state,
1549 fcport->fc4_type, ea->rc);
1550
1551 if (fcport->disc_state == DSC_DELETE_PEND) {
1552 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC\n",
1553 __func__, __LINE__, fcport->port_name);
1554 return;
1555 }
1556
1557 if (NVME_TARGET(vha->hw, fcport))
1558 ls = pd->current_login_state >> 4;
1559 else
1560 ls = pd->current_login_state & 0xf;
1561
1562 if (ea->sp->gen2 != fcport->login_gen) {
1563 /* target side must have changed it. */
1564
1565 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1566 "%s %8phC generation changed\n",
1567 __func__, fcport->port_name);
1568 return;
1569 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1570 qla_rscn_replay(fcport);
1571 qlt_schedule_sess_for_deletion(fcport);
1572 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
1573 __func__, __LINE__, fcport->port_name, ls);
1574 return;
1575 }
1576
1577 switch (ls) {
1578 case PDS_PRLI_COMPLETE:
1579 __qla24xx_parse_gpdb(vha, fcport, pd);
1580 break;
1581 case PDS_PLOGI_COMPLETE:
1582 if (qla_chk_secure_login(vha, fcport, pd)) {
1583 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
1584 __func__, __LINE__, fcport->port_name, ls);
1585 return;
1586 }
1587 fallthrough;
1588 case PDS_PLOGI_PENDING:
1589 case PDS_PRLI_PENDING:
1590 case PDS_PRLI2_PENDING:
1591 /* Set discovery state back to GNL to Relogin attempt */
1592 if (qla_dual_mode_enabled(vha) ||
1593 qla_ini_mode_enabled(vha)) {
1594 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1595 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1596 }
1597 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC, ls %x\n",
1598 __func__, __LINE__, fcport->port_name, ls);
1599 return;
1600 case PDS_LOGO_PENDING:
1601 case PDS_PORT_UNAVAILABLE:
1602 default:
1603 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1604 __func__, __LINE__, fcport->port_name);
1605 qlt_schedule_sess_for_deletion(fcport);
1606 return;
1607 }
1608 __qla24xx_handle_gpdb_event(vha, ea);
1609 } /* gpdb event */
1610
qla_chk_n2n_b4_login(struct scsi_qla_host * vha,fc_port_t * fcport)1611 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1612 {
1613 u8 login = 0;
1614 int rc;
1615
1616 ql_dbg(ql_dbg_disc, vha, 0x307b,
1617 "%s %8phC DS %d LS %d lid %d retries=%d\n",
1618 __func__, fcport->port_name, fcport->disc_state,
1619 fcport->fw_login_state, fcport->loop_id, fcport->login_retry);
1620
1621 if (qla_tgt_mode_enabled(vha))
1622 return;
1623
1624 if (qla_dual_mode_enabled(vha)) {
1625 if (N2N_TOPO(vha->hw)) {
1626 u64 mywwn, wwn;
1627
1628 mywwn = wwn_to_u64(vha->port_name);
1629 wwn = wwn_to_u64(fcport->port_name);
1630 if (mywwn > wwn)
1631 login = 1;
1632 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1633 && time_after_eq(jiffies,
1634 fcport->plogi_nack_done_deadline))
1635 login = 1;
1636 } else {
1637 login = 1;
1638 }
1639 } else {
1640 /* initiator mode */
1641 login = 1;
1642 }
1643
1644 if (login && fcport->login_retry) {
1645 fcport->login_retry--;
1646 if (fcport->loop_id == FC_NO_LOOP_ID) {
1647 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1648 rc = qla2x00_find_new_loop_id(vha, fcport);
1649 if (rc) {
1650 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1651 "%s %d %8phC post del sess - out of loopid\n",
1652 __func__, __LINE__, fcport->port_name);
1653 fcport->scan_state = 0;
1654 qlt_schedule_sess_for_deletion(fcport);
1655 return;
1656 }
1657 }
1658 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1659 "%s %d %8phC post login\n",
1660 __func__, __LINE__, fcport->port_name);
1661 qla2x00_post_async_login_work(vha, fcport, NULL);
1662 }
1663 }
1664
qla24xx_fcport_handle_login(struct scsi_qla_host * vha,fc_port_t * fcport)1665 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1666 {
1667 u16 data[2];
1668 u16 sec;
1669
1670 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1671 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d fc4type %x\n",
1672 __func__, fcport->port_name, fcport->disc_state,
1673 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1674 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1675 fcport->login_gen, fcport->loop_id, fcport->scan_state,
1676 fcport->fc4_type);
1677
1678 if (fcport->scan_state != QLA_FCPORT_FOUND ||
1679 fcport->disc_state == DSC_DELETE_PEND)
1680 return 0;
1681
1682 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1683 qla_dual_mode_enabled(vha) &&
1684 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1685 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1686 return 0;
1687
1688 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
1689 !N2N_TOPO(vha->hw)) {
1690 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1691 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1692 return 0;
1693 }
1694 }
1695
1696 /* Target won't initiate port login if fabric is present */
1697 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
1698 return 0;
1699
1700 if (fcport->flags & (FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE)) {
1701 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1702 return 0;
1703 }
1704
1705 switch (fcport->disc_state) {
1706 case DSC_DELETED:
1707 switch (vha->hw->current_topology) {
1708 case ISP_CFG_N:
1709 if (fcport_is_smaller(fcport)) {
1710 /* this adapter is bigger */
1711 if (fcport->login_retry) {
1712 if (fcport->loop_id == FC_NO_LOOP_ID) {
1713 qla2x00_find_new_loop_id(vha,
1714 fcport);
1715 fcport->fw_login_state =
1716 DSC_LS_PORT_UNAVAIL;
1717 }
1718 fcport->login_retry--;
1719 qla_post_els_plogi_work(vha, fcport);
1720 } else {
1721 ql_log(ql_log_info, vha, 0x705d,
1722 "Unable to reach remote port %8phC",
1723 fcport->port_name);
1724 }
1725 } else {
1726 qla24xx_post_gnl_work(vha, fcport);
1727 }
1728 break;
1729 default:
1730 if (fcport->loop_id == FC_NO_LOOP_ID) {
1731 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1732 "%s %d %8phC post gnl\n",
1733 __func__, __LINE__, fcport->port_name);
1734 qla24xx_post_gnl_work(vha, fcport);
1735 } else {
1736 qla_chk_n2n_b4_login(vha, fcport);
1737 }
1738 break;
1739 }
1740 break;
1741
1742 case DSC_GNL:
1743 switch (vha->hw->current_topology) {
1744 case ISP_CFG_N:
1745 if ((fcport->current_login_state & 0xf) == 0x6) {
1746 ql_dbg(ql_dbg_disc, vha, 0x2118,
1747 "%s %d %8phC post GPDB work\n",
1748 __func__, __LINE__, fcport->port_name);
1749 fcport->chip_reset =
1750 vha->hw->base_qpair->chip_reset;
1751 qla24xx_post_gpdb_work(vha, fcport, 0);
1752 } else {
1753 ql_dbg(ql_dbg_disc, vha, 0x2118,
1754 "%s %d %8phC post %s PRLI\n",
1755 __func__, __LINE__, fcport->port_name,
1756 NVME_TARGET(vha->hw, fcport) ? "NVME" :
1757 "FC");
1758 qla24xx_post_prli_work(vha, fcport);
1759 }
1760 break;
1761 default:
1762 if (fcport->login_pause) {
1763 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1764 "%s %d %8phC exit\n",
1765 __func__, __LINE__,
1766 fcport->port_name);
1767 fcport->last_rscn_gen = fcport->rscn_gen;
1768 fcport->last_login_gen = fcport->login_gen;
1769 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1770 break;
1771 }
1772 qla_chk_n2n_b4_login(vha, fcport);
1773 break;
1774 }
1775 break;
1776
1777 case DSC_LOGIN_FAILED:
1778 if (N2N_TOPO(vha->hw))
1779 qla_chk_n2n_b4_login(vha, fcport);
1780 else
1781 qlt_schedule_sess_for_deletion(fcport);
1782 break;
1783
1784 case DSC_LOGIN_COMPLETE:
1785 /* recheck login state */
1786 data[0] = data[1] = 0;
1787 qla2x00_post_async_adisc_work(vha, fcport, data);
1788 break;
1789
1790 case DSC_LOGIN_PEND:
1791 if (vha->hw->flags.edif_enabled)
1792 break;
1793
1794 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1795 ql_dbg(ql_dbg_disc, vha, 0x2118,
1796 "%s %d %8phC post %s PRLI\n",
1797 __func__, __LINE__, fcport->port_name,
1798 NVME_TARGET(vha->hw, fcport) ? "NVME" : "FC");
1799 qla24xx_post_prli_work(vha, fcport);
1800 }
1801 break;
1802
1803 case DSC_UPD_FCPORT:
1804 sec = jiffies_to_msecs(jiffies -
1805 fcport->jiffies_at_registration)/1000;
1806 if (fcport->sec_since_registration < sec && sec &&
1807 !(sec % 60)) {
1808 fcport->sec_since_registration = sec;
1809 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1810 "%s %8phC - Slow Rport registration(%d Sec)\n",
1811 __func__, fcport->port_name, sec);
1812 }
1813
1814 if (fcport->next_disc_state != DSC_DELETE_PEND)
1815 fcport->next_disc_state = DSC_ADISC;
1816 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1817 break;
1818
1819 default:
1820 break;
1821 }
1822
1823 return 0;
1824 }
1825
qla24xx_post_newsess_work(struct scsi_qla_host * vha,port_id_t * id,u8 * port_name,u8 * node_name,void * pla,u8 fc4_type)1826 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1827 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1828 {
1829 struct qla_work_evt *e;
1830
1831 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1832 if (!e)
1833 return QLA_FUNCTION_FAILED;
1834
1835 e->u.new_sess.id = *id;
1836 e->u.new_sess.pla = pla;
1837 e->u.new_sess.fc4_type = fc4_type;
1838 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1839 if (node_name)
1840 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1841
1842 return qla2x00_post_work(vha, e);
1843 }
1844
qla_rscn_gen_tick(scsi_qla_host_t * vha,u32 * ret_rscn_gen)1845 static void qla_rscn_gen_tick(scsi_qla_host_t *vha, u32 *ret_rscn_gen)
1846 {
1847 *ret_rscn_gen = atomic_inc_return(&vha->rscn_gen);
1848 /* memory barrier */
1849 wmb();
1850 }
1851
qla2x00_handle_rscn(scsi_qla_host_t * vha,struct event_arg * ea)1852 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
1853 {
1854 fc_port_t *fcport;
1855 unsigned long flags;
1856 u32 rscn_gen;
1857
1858 switch (ea->id.b.rsvd_1) {
1859 case RSCN_PORT_ADDR:
1860 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1861 if (fcport) {
1862 if (ql2xfc2target &&
1863 fcport->flags & FCF_FCP2_DEVICE &&
1864 atomic_read(&fcport->state) == FCS_ONLINE) {
1865 ql_dbg(ql_dbg_disc, vha, 0x2115,
1866 "Delaying session delete for FCP2 portid=%06x %8phC ",
1867 fcport->d_id.b24, fcport->port_name);
1868 return;
1869 }
1870
1871 if (vha->hw->flags.edif_enabled && DBELL_ACTIVE(vha)) {
1872 /*
1873 * On ipsec start by remote port, Target port
1874 * may use RSCN to trigger initiator to
1875 * relogin. If driver is already in the
1876 * process of a relogin, then ignore the RSCN
1877 * and allow the current relogin to continue.
1878 * This reduces thrashing of the connection.
1879 */
1880 if (atomic_read(&fcport->state) == FCS_ONLINE) {
1881 /*
1882 * If state = online, then set scan_needed=1 to do relogin.
1883 * Otherwise we're already in the middle of a relogin
1884 */
1885 fcport->scan_needed = 1;
1886 qla_rscn_gen_tick(vha, &fcport->rscn_gen);
1887 }
1888 } else {
1889 fcport->scan_needed = 1;
1890 qla_rscn_gen_tick(vha, &fcport->rscn_gen);
1891 }
1892 }
1893 break;
1894 case RSCN_AREA_ADDR:
1895 qla_rscn_gen_tick(vha, &rscn_gen);
1896 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1897 if (fcport->flags & FCF_FCP2_DEVICE &&
1898 atomic_read(&fcport->state) == FCS_ONLINE)
1899 continue;
1900
1901 if ((ea->id.b24 & 0xffff00) == (fcport->d_id.b24 & 0xffff00)) {
1902 fcport->scan_needed = 1;
1903 fcport->rscn_gen = rscn_gen;
1904 }
1905 }
1906 break;
1907 case RSCN_DOM_ADDR:
1908 qla_rscn_gen_tick(vha, &rscn_gen);
1909 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1910 if (fcport->flags & FCF_FCP2_DEVICE &&
1911 atomic_read(&fcport->state) == FCS_ONLINE)
1912 continue;
1913
1914 if ((ea->id.b24 & 0xff0000) == (fcport->d_id.b24 & 0xff0000)) {
1915 fcport->scan_needed = 1;
1916 fcport->rscn_gen = rscn_gen;
1917 }
1918 }
1919 break;
1920 case RSCN_FAB_ADDR:
1921 default:
1922 qla_rscn_gen_tick(vha, &rscn_gen);
1923 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1924 if (fcport->flags & FCF_FCP2_DEVICE &&
1925 atomic_read(&fcport->state) == FCS_ONLINE)
1926 continue;
1927
1928 fcport->scan_needed = 1;
1929 fcport->rscn_gen = rscn_gen;
1930 }
1931 break;
1932 }
1933
1934 spin_lock_irqsave(&vha->work_lock, flags);
1935 if (vha->scan.scan_flags == 0) {
1936 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__);
1937 vha->scan.scan_flags |= SF_QUEUED;
1938 vha->scan.rscn_gen_start = atomic_read(&vha->rscn_gen);
1939 schedule_delayed_work(&vha->scan.scan_work, 5);
1940 }
1941 spin_unlock_irqrestore(&vha->work_lock, flags);
1942 }
1943
qla24xx_handle_relogin_event(scsi_qla_host_t * vha,struct event_arg * ea)1944 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1945 struct event_arg *ea)
1946 {
1947 fc_port_t *fcport = ea->fcport;
1948
1949 if (test_bit(UNLOADING, &vha->dpc_flags))
1950 return;
1951
1952 ql_dbg(ql_dbg_disc, vha, 0x2102,
1953 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1954 __func__, fcport->port_name, fcport->disc_state,
1955 fcport->fw_login_state, fcport->login_pause,
1956 fcport->deleted, fcport->conflict,
1957 fcport->last_rscn_gen, fcport->rscn_gen,
1958 fcport->last_login_gen, fcport->login_gen,
1959 fcport->flags);
1960
1961 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1962 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n",
1963 __func__, __LINE__, fcport->port_name);
1964 qla24xx_post_gnl_work(vha, fcport);
1965 return;
1966 }
1967
1968 qla24xx_fcport_handle_login(vha, fcport);
1969 }
1970
qla_handle_els_plogi_done(scsi_qla_host_t * vha,struct event_arg * ea)1971 void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1972 struct event_arg *ea)
1973 {
1974 if (N2N_TOPO(vha->hw) && fcport_is_smaller(ea->fcport) &&
1975 vha->hw->flags.edif_enabled) {
1976 /* check to see if App support Secure */
1977 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1978 return;
1979 }
1980
1981 /* for pure Target Mode, PRLI will not be initiated */
1982 if (vha->host->active_mode == MODE_TARGET)
1983 return;
1984
1985 ql_dbg(ql_dbg_disc, vha, 0x2118,
1986 "%s %d %8phC post PRLI\n",
1987 __func__, __LINE__, ea->fcport->port_name);
1988 qla24xx_post_prli_work(vha, ea->fcport);
1989 }
1990
1991 /*
1992 * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1993 * to be consumed by the fcport
1994 */
qla_rscn_replay(fc_port_t * fcport)1995 void qla_rscn_replay(fc_port_t *fcport)
1996 {
1997 struct event_arg ea;
1998
1999 switch (fcport->disc_state) {
2000 case DSC_DELETE_PEND:
2001 return;
2002 default:
2003 break;
2004 }
2005
2006 if (fcport->scan_needed) {
2007 memset(&ea, 0, sizeof(ea));
2008 ea.id = fcport->d_id;
2009 ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
2010 qla2x00_handle_rscn(fcport->vha, &ea);
2011 }
2012 }
2013
2014 static void
qla2x00_tmf_iocb_timeout(void * data)2015 qla2x00_tmf_iocb_timeout(void *data)
2016 {
2017 srb_t *sp = data;
2018 struct srb_iocb *tmf = &sp->u.iocb_cmd;
2019 int rc, h;
2020 unsigned long flags;
2021
2022 if (sp->type == SRB_MARKER)
2023 rc = QLA_FUNCTION_FAILED;
2024 else
2025 rc = qla24xx_async_abort_cmd(sp, false);
2026
2027 if (rc) {
2028 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
2029 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
2030 if (sp->qpair->req->outstanding_cmds[h] == sp) {
2031 sp->qpair->req->outstanding_cmds[h] = NULL;
2032 qla_put_fw_resources(sp->qpair, &sp->iores);
2033 break;
2034 }
2035 }
2036 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
2037 tmf->u.tmf.comp_status = cpu_to_le16(CS_TIMEOUT);
2038 tmf->u.tmf.data = QLA_FUNCTION_FAILED;
2039 complete(&tmf->u.tmf.comp);
2040 }
2041 }
2042
qla_marker_sp_done(srb_t * sp,int res)2043 static void qla_marker_sp_done(srb_t *sp, int res)
2044 {
2045 struct srb_iocb *tmf = &sp->u.iocb_cmd;
2046
2047 if (res != QLA_SUCCESS)
2048 ql_dbg(ql_dbg_taskm, sp->vha, 0x8004,
2049 "Async-marker fail hdl=%x portid=%06x ctrl=%x lun=%lld qp=%d.\n",
2050 sp->handle, sp->fcport->d_id.b24, sp->u.iocb_cmd.u.tmf.flags,
2051 sp->u.iocb_cmd.u.tmf.lun, sp->qpair->id);
2052
2053 sp->u.iocb_cmd.u.tmf.data = res;
2054 complete(&tmf->u.tmf.comp);
2055 }
2056
2057 #define START_SP_W_RETRIES(_sp, _rval, _chip_gen, _login_gen) \
2058 {\
2059 int cnt = 5; \
2060 do { \
2061 if (_chip_gen != sp->vha->hw->chip_reset || _login_gen != sp->fcport->login_gen) {\
2062 _rval = -EINVAL; \
2063 break; \
2064 } \
2065 _rval = qla2x00_start_sp(_sp); \
2066 if (_rval == -EAGAIN) \
2067 msleep(1); \
2068 else \
2069 break; \
2070 cnt--; \
2071 } while (cnt); \
2072 }
2073
2074 /**
2075 * qla26xx_marker: send marker IOCB and wait for the completion of it.
2076 * @arg: pointer to argument list.
2077 * It is assume caller will provide an fcport pointer and modifier
2078 */
2079 static int
qla26xx_marker(struct tmf_arg * arg)2080 qla26xx_marker(struct tmf_arg *arg)
2081 {
2082 struct scsi_qla_host *vha = arg->vha;
2083 struct srb_iocb *tm_iocb;
2084 srb_t *sp;
2085 int rval = QLA_FUNCTION_FAILED;
2086 fc_port_t *fcport = arg->fcport;
2087 u32 chip_gen, login_gen;
2088
2089 if (TMF_NOT_READY(arg->fcport)) {
2090 ql_dbg(ql_dbg_taskm, vha, 0x8039,
2091 "FC port not ready for marker loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n",
2092 fcport->loop_id, fcport->d_id.b24,
2093 arg->modifier, arg->lun, arg->qpair->id);
2094 return QLA_SUSPENDED;
2095 }
2096
2097 chip_gen = vha->hw->chip_reset;
2098 login_gen = fcport->login_gen;
2099
2100 /* ref: INIT */
2101 sp = qla2xxx_get_qpair_sp(vha, arg->qpair, fcport, GFP_KERNEL);
2102 if (!sp)
2103 goto done;
2104
2105 sp->type = SRB_MARKER;
2106 sp->name = "marker";
2107 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha), qla_marker_sp_done);
2108 sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout;
2109
2110 tm_iocb = &sp->u.iocb_cmd;
2111 init_completion(&tm_iocb->u.tmf.comp);
2112 tm_iocb->u.tmf.modifier = arg->modifier;
2113 tm_iocb->u.tmf.lun = arg->lun;
2114 tm_iocb->u.tmf.loop_id = fcport->loop_id;
2115 tm_iocb->u.tmf.vp_index = vha->vp_idx;
2116
2117 START_SP_W_RETRIES(sp, rval, chip_gen, login_gen);
2118
2119 ql_dbg(ql_dbg_taskm, vha, 0x8006,
2120 "Async-marker hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n",
2121 sp->handle, fcport->loop_id, fcport->d_id.b24,
2122 arg->modifier, arg->lun, sp->qpair->id, rval);
2123
2124 if (rval != QLA_SUCCESS) {
2125 ql_log(ql_log_warn, vha, 0x8031,
2126 "Marker IOCB send failure (%x).\n", rval);
2127 goto done_free_sp;
2128 }
2129
2130 wait_for_completion(&tm_iocb->u.tmf.comp);
2131 rval = tm_iocb->u.tmf.data;
2132
2133 if (rval != QLA_SUCCESS) {
2134 ql_log(ql_log_warn, vha, 0x8019,
2135 "Marker failed hdl=%x loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d rval %d.\n",
2136 sp->handle, fcport->loop_id, fcport->d_id.b24,
2137 arg->modifier, arg->lun, sp->qpair->id, rval);
2138 }
2139
2140 done_free_sp:
2141 /* ref: INIT */
2142 kref_put(&sp->cmd_kref, qla2x00_sp_release);
2143 done:
2144 return rval;
2145 }
2146
qla2x00_tmf_sp_done(srb_t * sp,int res)2147 static void qla2x00_tmf_sp_done(srb_t *sp, int res)
2148 {
2149 struct srb_iocb *tmf = &sp->u.iocb_cmd;
2150
2151 if (res)
2152 tmf->u.tmf.data = res;
2153 complete(&tmf->u.tmf.comp);
2154 }
2155
qla_tmf_wait(struct tmf_arg * arg)2156 static int qla_tmf_wait(struct tmf_arg *arg)
2157 {
2158 /* there are only 2 types of error handling that reaches here, lun or target reset */
2159 if (arg->flags & (TCF_LUN_RESET | TCF_ABORT_TASK_SET | TCF_CLEAR_TASK_SET))
2160 return qla2x00_eh_wait_for_pending_commands(arg->vha,
2161 arg->fcport->d_id.b24, arg->lun, WAIT_LUN);
2162 else
2163 return qla2x00_eh_wait_for_pending_commands(arg->vha,
2164 arg->fcport->d_id.b24, arg->lun, WAIT_TARGET);
2165 }
2166
2167 static int
__qla2x00_async_tm_cmd(struct tmf_arg * arg)2168 __qla2x00_async_tm_cmd(struct tmf_arg *arg)
2169 {
2170 struct scsi_qla_host *vha = arg->vha;
2171 struct srb_iocb *tm_iocb;
2172 srb_t *sp;
2173 int rval = QLA_FUNCTION_FAILED;
2174 fc_port_t *fcport = arg->fcport;
2175 u32 chip_gen, login_gen;
2176 u64 jif;
2177
2178 if (TMF_NOT_READY(arg->fcport)) {
2179 ql_dbg(ql_dbg_taskm, vha, 0x8032,
2180 "FC port not ready for TM command loop-id=%x portid=%06x modifier=%x lun=%lld qp=%d.\n",
2181 fcport->loop_id, fcport->d_id.b24,
2182 arg->modifier, arg->lun, arg->qpair->id);
2183 return QLA_SUSPENDED;
2184 }
2185
2186 chip_gen = vha->hw->chip_reset;
2187 login_gen = fcport->login_gen;
2188
2189 /* ref: INIT */
2190 sp = qla2xxx_get_qpair_sp(vha, arg->qpair, fcport, GFP_KERNEL);
2191 if (!sp)
2192 goto done;
2193
2194 qla_vha_mark_busy(vha);
2195 sp->type = SRB_TM_CMD;
2196 sp->name = "tmf";
2197 qla2x00_init_async_sp(sp, qla2x00_get_async_timeout(vha),
2198 qla2x00_tmf_sp_done);
2199 sp->u.iocb_cmd.timeout = qla2x00_tmf_iocb_timeout;
2200
2201 tm_iocb = &sp->u.iocb_cmd;
2202 init_completion(&tm_iocb->u.tmf.comp);
2203 tm_iocb->u.tmf.flags = arg->flags;
2204 tm_iocb->u.tmf.lun = arg->lun;
2205
2206 START_SP_W_RETRIES(sp, rval, chip_gen, login_gen);
2207
2208 ql_dbg(ql_dbg_taskm, vha, 0x802f,
2209 "Async-tmf hdl=%x loop-id=%x portid=%06x ctrl=%x lun=%lld qp=%d rval=%x.\n",
2210 sp->handle, fcport->loop_id, fcport->d_id.b24,
2211 arg->flags, arg->lun, sp->qpair->id, rval);
2212
2213 if (rval != QLA_SUCCESS)
2214 goto done_free_sp;
2215 wait_for_completion(&tm_iocb->u.tmf.comp);
2216
2217 rval = tm_iocb->u.tmf.data;
2218
2219 if (rval != QLA_SUCCESS) {
2220 ql_log(ql_log_warn, vha, 0x8030,
2221 "TM IOCB failed (%x).\n", rval);
2222 }
2223
2224 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
2225 jif = jiffies;
2226 if (qla_tmf_wait(arg)) {
2227 ql_log(ql_log_info, vha, 0x803e,
2228 "Waited %u ms Nexus=%ld:%06x:%llu.\n",
2229 jiffies_to_msecs(jiffies - jif), vha->host_no,
2230 fcport->d_id.b24, arg->lun);
2231 }
2232
2233 if (chip_gen == vha->hw->chip_reset && login_gen == fcport->login_gen) {
2234 rval = qla26xx_marker(arg);
2235 } else {
2236 ql_log(ql_log_info, vha, 0x803e,
2237 "Skip Marker due to disruption. Nexus=%ld:%06x:%llu.\n",
2238 vha->host_no, fcport->d_id.b24, arg->lun);
2239 rval = QLA_FUNCTION_FAILED;
2240 }
2241 }
2242 if (tm_iocb->u.tmf.data)
2243 rval = tm_iocb->u.tmf.data;
2244
2245 done_free_sp:
2246 /* ref: INIT */
2247 kref_put(&sp->cmd_kref, qla2x00_sp_release);
2248 done:
2249 return rval;
2250 }
2251
qla_put_tmf(struct tmf_arg * arg)2252 static void qla_put_tmf(struct tmf_arg *arg)
2253 {
2254 struct scsi_qla_host *vha = arg->vha;
2255 struct qla_hw_data *ha = vha->hw;
2256 unsigned long flags;
2257
2258 spin_lock_irqsave(&ha->tgt.sess_lock, flags);
2259 ha->active_tmf--;
2260 list_del(&arg->tmf_elem);
2261 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
2262 }
2263
2264 static
qla_get_tmf(struct tmf_arg * arg)2265 int qla_get_tmf(struct tmf_arg *arg)
2266 {
2267 struct scsi_qla_host *vha = arg->vha;
2268 struct qla_hw_data *ha = vha->hw;
2269 unsigned long flags;
2270 fc_port_t *fcport = arg->fcport;
2271 int rc = 0;
2272 struct tmf_arg *t;
2273
2274 spin_lock_irqsave(&ha->tgt.sess_lock, flags);
2275 list_for_each_entry(t, &ha->tmf_active, tmf_elem) {
2276 if (t->fcport == arg->fcport && t->lun == arg->lun) {
2277 /* reject duplicate TMF */
2278 ql_log(ql_log_warn, vha, 0x802c,
2279 "found duplicate TMF. Nexus=%ld:%06x:%llu.\n",
2280 vha->host_no, fcport->d_id.b24, arg->lun);
2281 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
2282 return -EINVAL;
2283 }
2284 }
2285
2286 list_add_tail(&arg->tmf_elem, &ha->tmf_pending);
2287 while (ha->active_tmf >= MAX_ACTIVE_TMF) {
2288 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
2289
2290 msleep(1);
2291
2292 spin_lock_irqsave(&ha->tgt.sess_lock, flags);
2293 if (TMF_NOT_READY(fcport)) {
2294 ql_log(ql_log_warn, vha, 0x802c,
2295 "Unable to acquire TM resource due to disruption.\n");
2296 rc = EIO;
2297 break;
2298 }
2299 if (ha->active_tmf < MAX_ACTIVE_TMF &&
2300 list_is_first(&arg->tmf_elem, &ha->tmf_pending))
2301 break;
2302 }
2303
2304 list_del(&arg->tmf_elem);
2305
2306 if (!rc) {
2307 ha->active_tmf++;
2308 list_add_tail(&arg->tmf_elem, &ha->tmf_active);
2309 }
2310
2311 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
2312
2313 return rc;
2314 }
2315
2316 int
qla2x00_async_tm_cmd(fc_port_t * fcport,uint32_t flags,uint64_t lun,uint32_t tag)2317 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint64_t lun,
2318 uint32_t tag)
2319 {
2320 struct scsi_qla_host *vha = fcport->vha;
2321 struct tmf_arg a;
2322 int rval = QLA_SUCCESS;
2323
2324 if (TMF_NOT_READY(fcport))
2325 return QLA_SUSPENDED;
2326
2327 a.vha = fcport->vha;
2328 a.fcport = fcport;
2329 a.lun = lun;
2330 a.flags = flags;
2331 INIT_LIST_HEAD(&a.tmf_elem);
2332
2333 if (flags & (TCF_LUN_RESET|TCF_ABORT_TASK_SET|TCF_CLEAR_TASK_SET|TCF_CLEAR_ACA)) {
2334 a.modifier = MK_SYNC_ID_LUN;
2335 } else {
2336 a.modifier = MK_SYNC_ID;
2337 }
2338
2339 if (qla_get_tmf(&a))
2340 return QLA_FUNCTION_FAILED;
2341
2342 a.qpair = vha->hw->base_qpair;
2343 rval = __qla2x00_async_tm_cmd(&a);
2344
2345 qla_put_tmf(&a);
2346 return rval;
2347 }
2348
2349 int
qla24xx_async_abort_command(srb_t * sp)2350 qla24xx_async_abort_command(srb_t *sp)
2351 {
2352 unsigned long flags = 0;
2353
2354 uint32_t handle;
2355 fc_port_t *fcport = sp->fcport;
2356 struct qla_qpair *qpair = sp->qpair;
2357 struct scsi_qla_host *vha = fcport->vha;
2358 struct req_que *req = qpair->req;
2359
2360 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
2361 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2362 if (req->outstanding_cmds[handle] == sp)
2363 break;
2364 }
2365 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
2366
2367 if (handle == req->num_outstanding_cmds) {
2368 /* Command not found. */
2369 return QLA_ERR_NOT_FOUND;
2370 }
2371 if (sp->type == SRB_FXIOCB_DCMD)
2372 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
2373 FXDISC_ABORT_IOCTL);
2374
2375 return qla24xx_async_abort_cmd(sp, true);
2376 }
2377
2378 static void
qla24xx_handle_prli_done_event(struct scsi_qla_host * vha,struct event_arg * ea)2379 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2380 {
2381 struct srb *sp;
2382 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2383 ea->data[0]);
2384
2385 switch (ea->data[0]) {
2386 case MBS_COMMAND_COMPLETE:
2387 ql_dbg(ql_dbg_disc, vha, 0x2118,
2388 "%s %d %8phC post gpdb\n",
2389 __func__, __LINE__, ea->fcport->port_name);
2390
2391 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2392 ea->fcport->logout_on_delete = 1;
2393 ea->fcport->nvme_prli_service_param = ea->iop[0];
2394 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
2395 ea->fcport->nvme_first_burst_size =
2396 (ea->iop[1] & 0xffff) * 512;
2397 else
2398 ea->fcport->nvme_first_burst_size = 0;
2399 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2400 break;
2401 default:
2402 sp = ea->sp;
2403 ql_dbg(ql_dbg_disc, vha, 0x2118,
2404 "%s %d %8phC priority %s, fc4type %x prev try %s\n",
2405 __func__, __LINE__, ea->fcport->port_name,
2406 vha->hw->fc4_type_priority == FC4_PRIORITY_FCP ?
2407 "FCP" : "NVMe", ea->fcport->fc4_type,
2408 (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI) ?
2409 "NVME" : "FCP");
2410
2411 if (NVME_FCP_TARGET(ea->fcport)) {
2412 if (sp->u.iocb_cmd.u.logio.flags & SRB_LOGIN_NVME_PRLI)
2413 ea->fcport->do_prli_nvme = 0;
2414 else
2415 ea->fcport->do_prli_nvme = 1;
2416 } else {
2417 ea->fcport->do_prli_nvme = 0;
2418 }
2419
2420 if (N2N_TOPO(vha->hw)) {
2421 if (ea->fcport->n2n_link_reset_cnt ==
2422 vha->hw->login_retry_count &&
2423 ea->fcport->flags & FCF_FCSP_DEVICE) {
2424 /* remote authentication app just started */
2425 ea->fcport->n2n_link_reset_cnt = 0;
2426 }
2427
2428 if (ea->fcport->n2n_link_reset_cnt <
2429 vha->hw->login_retry_count) {
2430 ea->fcport->n2n_link_reset_cnt++;
2431 vha->relogin_jif = jiffies + 2 * HZ;
2432 /*
2433 * PRLI failed. Reset link to kick start
2434 * state machine
2435 */
2436 set_bit(N2N_LINK_RESET, &vha->dpc_flags);
2437 qla2xxx_wake_dpc(vha);
2438 } else {
2439 ql_log(ql_log_warn, vha, 0x2119,
2440 "%s %d %8phC Unable to reconnect\n",
2441 __func__, __LINE__,
2442 ea->fcport->port_name);
2443 }
2444 } else {
2445 /*
2446 * switch connect. login failed. Take connection down
2447 * and allow relogin to retrigger
2448 */
2449 ea->fcport->flags &= ~FCF_ASYNC_SENT;
2450 ea->fcport->keep_nport_handle = 0;
2451 ea->fcport->logout_on_delete = 1;
2452 qlt_schedule_sess_for_deletion(ea->fcport);
2453 }
2454 break;
2455 }
2456 }
2457
2458 void
qla24xx_handle_plogi_done_event(struct scsi_qla_host * vha,struct event_arg * ea)2459 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
2460 {
2461 port_id_t cid; /* conflict Nport id */
2462 u16 lid;
2463 struct fc_port *conflict_fcport;
2464 unsigned long flags;
2465 struct fc_port *fcport = ea->fcport;
2466
2467 ql_dbg(ql_dbg_disc, vha, 0xffff,
2468 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
2469 __func__, fcport->port_name, fcport->disc_state,
2470 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
2471 ea->sp->gen1, fcport->rscn_gen,
2472 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
2473
2474 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
2475 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
2476 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2477 "%s %d %8phC Remote is trying to login\n",
2478 __func__, __LINE__, fcport->port_name);
2479 return;
2480 }
2481
2482 if ((fcport->disc_state == DSC_DELETE_PEND) ||
2483 (fcport->disc_state == DSC_DELETED)) {
2484 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2485 return;
2486 }
2487
2488 if (ea->sp->gen2 != fcport->login_gen) {
2489 /* target side must have changed it. */
2490 ql_dbg(ql_dbg_disc, vha, 0x20d3,
2491 "%s %8phC generation changed\n",
2492 __func__, fcport->port_name);
2493 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2494 return;
2495 } else if (ea->sp->gen1 != fcport->rscn_gen) {
2496 ql_dbg(ql_dbg_disc, vha, 0x20d3,
2497 "%s %8phC RSCN generation changed\n",
2498 __func__, fcport->port_name);
2499 qla_rscn_replay(fcport);
2500 qlt_schedule_sess_for_deletion(fcport);
2501 return;
2502 }
2503
2504 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
2505 ea->data[0]);
2506
2507 switch (ea->data[0]) {
2508 case MBS_COMMAND_COMPLETE:
2509 /*
2510 * Driver must validate login state - If PRLI not complete,
2511 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
2512 * requests.
2513 */
2514 if (vha->hw->flags.edif_enabled) {
2515 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2516 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2517 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2518 ea->fcport->logout_on_delete = 1;
2519 ea->fcport->send_els_logo = 0;
2520 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
2521 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2522
2523 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2524 } else {
2525 if (NVME_TARGET(vha->hw, fcport)) {
2526 ql_dbg(ql_dbg_disc, vha, 0x2117,
2527 "%s %d %8phC post prli\n",
2528 __func__, __LINE__, fcport->port_name);
2529 qla24xx_post_prli_work(vha, fcport);
2530 } else {
2531 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2532 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
2533 __func__, __LINE__, fcport->port_name,
2534 fcport->loop_id, fcport->d_id.b24);
2535
2536 set_bit(fcport->loop_id, vha->hw->loop_id_map);
2537 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2538 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2539 fcport->logout_on_delete = 1;
2540 fcport->send_els_logo = 0;
2541 fcport->fw_login_state = DSC_LS_PRLI_COMP;
2542 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2543
2544 qla24xx_post_gpdb_work(vha, fcport, 0);
2545 }
2546 }
2547 break;
2548 case MBS_COMMAND_ERROR:
2549 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
2550 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2551
2552 qlt_schedule_sess_for_deletion(ea->fcport);
2553 break;
2554 case MBS_LOOP_ID_USED:
2555 /* data[1] = IO PARAM 1 = nport ID */
2556 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2557 cid.b.area = (ea->iop[1] >> 8) & 0xff;
2558 cid.b.al_pa = ea->iop[1] & 0xff;
2559 cid.b.rsvd_1 = 0;
2560
2561 ql_dbg(ql_dbg_disc, vha, 0x20ec,
2562 "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2563 __func__, __LINE__, ea->fcport->port_name,
2564 ea->fcport->loop_id, cid.b24);
2565
2566 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2567 ea->fcport->loop_id = FC_NO_LOOP_ID;
2568 qla24xx_post_gnl_work(vha, ea->fcport);
2569 break;
2570 case MBS_PORT_ID_USED:
2571 lid = ea->iop[1] & 0xffff;
2572 qlt_find_sess_invalidate_other(vha,
2573 wwn_to_u64(ea->fcport->port_name),
2574 ea->fcport->d_id, lid, &conflict_fcport);
2575
2576 if (conflict_fcport) {
2577 /*
2578 * Another fcport share the same loop_id/nport id.
2579 * Conflict fcport needs to finish cleanup before this
2580 * fcport can proceed to login.
2581 */
2582 conflict_fcport->conflict = ea->fcport;
2583 ea->fcport->login_pause = 1;
2584
2585 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2586 "%s %d %8phC NPortId %06x inuse with loopid 0x%x.\n",
2587 __func__, __LINE__, ea->fcport->port_name,
2588 ea->fcport->d_id.b24, lid);
2589 } else {
2590 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2591 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2592 __func__, __LINE__, ea->fcport->port_name,
2593 ea->fcport->d_id.b24, lid);
2594
2595 qla2x00_clear_loop_id(ea->fcport);
2596 set_bit(lid, vha->hw->loop_id_map);
2597 ea->fcport->loop_id = lid;
2598 ea->fcport->keep_nport_handle = 0;
2599 ea->fcport->logout_on_delete = 1;
2600 qlt_schedule_sess_for_deletion(ea->fcport);
2601 }
2602 break;
2603 }
2604 return;
2605 }
2606
2607 /****************************************************************************/
2608 /* QLogic ISP2x00 Hardware Support Functions. */
2609 /****************************************************************************/
2610
2611 static int
qla83xx_nic_core_fw_load(scsi_qla_host_t * vha)2612 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2613 {
2614 int rval = QLA_SUCCESS;
2615 struct qla_hw_data *ha = vha->hw;
2616 uint32_t idc_major_ver, idc_minor_ver;
2617 uint16_t config[4];
2618
2619 qla83xx_idc_lock(vha, 0);
2620
2621 /* SV: TODO: Assign initialization timeout from
2622 * flash-info / other param
2623 */
2624 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2625 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2626
2627 /* Set our fcoe function presence */
2628 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2629 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2630 "Error while setting DRV-Presence.\n");
2631 rval = QLA_FUNCTION_FAILED;
2632 goto exit;
2633 }
2634
2635 /* Decide the reset ownership */
2636 qla83xx_reset_ownership(vha);
2637
2638 /*
2639 * On first protocol driver load:
2640 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2641 * register.
2642 * Others: Check compatibility with current IDC Major version.
2643 */
2644 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2645 if (ha->flags.nic_core_reset_owner) {
2646 /* Set IDC Major version */
2647 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2648 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2649
2650 /* Clearing IDC-Lock-Recovery register */
2651 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2652 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2653 /*
2654 * Clear further IDC participation if we are not compatible with
2655 * the current IDC Major Version.
2656 */
2657 ql_log(ql_log_warn, vha, 0xb07d,
2658 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2659 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2660 __qla83xx_clear_drv_presence(vha);
2661 rval = QLA_FUNCTION_FAILED;
2662 goto exit;
2663 }
2664 /* Each function sets its supported Minor version. */
2665 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2666 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2667 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2668
2669 if (ha->flags.nic_core_reset_owner) {
2670 memset(config, 0, sizeof(config));
2671 if (!qla81xx_get_port_config(vha, config))
2672 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2673 QLA8XXX_DEV_READY);
2674 }
2675
2676 rval = qla83xx_idc_state_handler(vha);
2677
2678 exit:
2679 qla83xx_idc_unlock(vha, 0);
2680
2681 return rval;
2682 }
2683
qla_enable_fce_trace(scsi_qla_host_t * vha)2684 void qla_enable_fce_trace(scsi_qla_host_t *vha)
2685 {
2686 int rval;
2687 struct qla_hw_data *ha = vha->hw;
2688
2689 if (ha->fce) {
2690 ha->flags.fce_enabled = 1;
2691 memset(ha->fce, 0, fce_calc_size(ha->fce_bufs));
2692 rval = qla2x00_enable_fce_trace(vha,
2693 ha->fce_dma, ha->fce_bufs, ha->fce_mb, &ha->fce_bufs);
2694
2695 if (rval) {
2696 ql_log(ql_log_warn, vha, 0x8033,
2697 "Unable to reinitialize FCE (%d).\n", rval);
2698 ha->flags.fce_enabled = 0;
2699 }
2700 }
2701 }
2702
qla_enable_eft_trace(scsi_qla_host_t * vha)2703 static void qla_enable_eft_trace(scsi_qla_host_t *vha)
2704 {
2705 int rval;
2706 struct qla_hw_data *ha = vha->hw;
2707
2708 if (ha->eft) {
2709 memset(ha->eft, 0, EFT_SIZE);
2710 rval = qla2x00_enable_eft_trace(vha, ha->eft_dma, EFT_NUM_BUFFERS);
2711
2712 if (rval) {
2713 ql_log(ql_log_warn, vha, 0x8034,
2714 "Unable to reinitialize EFT (%d).\n", rval);
2715 }
2716 }
2717 }
2718 /*
2719 * qla2x00_initialize_adapter
2720 * Initialize board.
2721 *
2722 * Input:
2723 * ha = adapter block pointer.
2724 *
2725 * Returns:
2726 * 0 = success
2727 */
2728 int
qla2x00_initialize_adapter(scsi_qla_host_t * vha)2729 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2730 {
2731 int rval;
2732 struct qla_hw_data *ha = vha->hw;
2733 struct req_que *req = ha->req_q_map[0];
2734 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2735
2736 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2737 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2738
2739 /* Clear adapter flags. */
2740 vha->flags.online = 0;
2741 ha->flags.chip_reset_done = 0;
2742 vha->flags.reset_active = 0;
2743 ha->flags.pci_channel_io_perm_failure = 0;
2744 ha->flags.eeh_busy = 0;
2745 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2746 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2747 atomic_set(&vha->loop_state, LOOP_DOWN);
2748 vha->device_flags = DFLG_NO_CABLE;
2749 vha->dpc_flags = 0;
2750 vha->flags.management_server_logged_in = 0;
2751 vha->marker_needed = 0;
2752 ha->isp_abort_cnt = 0;
2753 ha->beacon_blink_led = 0;
2754
2755 set_bit(0, ha->req_qid_map);
2756 set_bit(0, ha->rsp_qid_map);
2757
2758 ql_dbg(ql_dbg_init, vha, 0x0040,
2759 "Configuring PCI space...\n");
2760 rval = ha->isp_ops->pci_config(vha);
2761 if (rval) {
2762 ql_log(ql_log_warn, vha, 0x0044,
2763 "Unable to configure PCI space.\n");
2764 return (rval);
2765 }
2766
2767 ha->isp_ops->reset_chip(vha);
2768
2769 /* Check for secure flash support */
2770 if (IS_QLA28XX(ha)) {
2771 if (rd_reg_word(®->mailbox12) & BIT_0)
2772 ha->flags.secure_adapter = 1;
2773 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n",
2774 (ha->flags.secure_adapter) ? "Yes" : "No");
2775 }
2776
2777
2778 rval = qla2xxx_get_flash_info(vha);
2779 if (rval) {
2780 ql_log(ql_log_fatal, vha, 0x004f,
2781 "Unable to validate FLASH data.\n");
2782 return rval;
2783 }
2784
2785 if (IS_QLA8044(ha)) {
2786 qla8044_read_reset_template(vha);
2787
2788 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2789 * If DONRESET_BIT0 is set, drivers should not set dev_state
2790 * to NEED_RESET. But if NEED_RESET is set, drivers should
2791 * should honor the reset. */
2792 if (ql2xdontresethba == 1)
2793 qla8044_set_idc_dontreset(vha);
2794 }
2795
2796 ha->isp_ops->get_flash_version(vha, req->ring);
2797 ql_dbg(ql_dbg_init, vha, 0x0061,
2798 "Configure NVRAM parameters...\n");
2799
2800 /* Let priority default to FCP, can be overridden by nvram_config */
2801 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2802
2803 ha->isp_ops->nvram_config(vha);
2804
2805 if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
2806 ha->fc4_type_priority != FC4_PRIORITY_NVME)
2807 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2808
2809 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n",
2810 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
2811
2812 if (ha->flags.disable_serdes) {
2813 /* Mask HBA via NVRAM settings? */
2814 ql_log(ql_log_info, vha, 0x0077,
2815 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2816 return QLA_FUNCTION_FAILED;
2817 }
2818
2819 ql_dbg(ql_dbg_init, vha, 0x0078,
2820 "Verifying loaded RISC code...\n");
2821
2822 /* If smartsan enabled then require fdmi and rdp enabled */
2823 if (ql2xsmartsan) {
2824 ql2xfdmienable = 1;
2825 ql2xrdpenable = 1;
2826 }
2827
2828 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2829 rval = ha->isp_ops->chip_diag(vha);
2830 if (rval)
2831 return (rval);
2832 rval = qla2x00_setup_chip(vha);
2833 if (rval)
2834 return (rval);
2835 }
2836
2837 if (IS_QLA84XX(ha)) {
2838 ha->cs84xx = qla84xx_get_chip(vha);
2839 if (!ha->cs84xx) {
2840 ql_log(ql_log_warn, vha, 0x00d0,
2841 "Unable to configure ISP84XX.\n");
2842 return QLA_FUNCTION_FAILED;
2843 }
2844 }
2845
2846 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2847 rval = qla2x00_init_rings(vha);
2848
2849 /* No point in continuing if firmware initialization failed. */
2850 if (rval != QLA_SUCCESS)
2851 return rval;
2852
2853 ha->flags.chip_reset_done = 1;
2854
2855 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2856 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
2857 rval = qla84xx_init_chip(vha);
2858 if (rval != QLA_SUCCESS) {
2859 ql_log(ql_log_warn, vha, 0x00d4,
2860 "Unable to initialize ISP84XX.\n");
2861 qla84xx_put_chip(vha);
2862 }
2863 }
2864
2865 /* Load the NIC Core f/w if we are the first protocol driver. */
2866 if (IS_QLA8031(ha)) {
2867 rval = qla83xx_nic_core_fw_load(vha);
2868 if (rval)
2869 ql_log(ql_log_warn, vha, 0x0124,
2870 "Error in initializing NIC Core f/w.\n");
2871 }
2872
2873 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2874 qla24xx_read_fcp_prio_cfg(vha);
2875
2876 if (IS_P3P_TYPE(ha))
2877 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2878 else
2879 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2880
2881 return (rval);
2882 }
2883
2884 /**
2885 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2886 * @vha: HA context
2887 *
2888 * Returns 0 on success.
2889 */
2890 int
qla2100_pci_config(scsi_qla_host_t * vha)2891 qla2100_pci_config(scsi_qla_host_t *vha)
2892 {
2893 uint16_t w;
2894 unsigned long flags;
2895 struct qla_hw_data *ha = vha->hw;
2896 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2897
2898 pci_set_master(ha->pdev);
2899 pci_try_set_mwi(ha->pdev);
2900
2901 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2902 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2903 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2904
2905 pci_disable_rom(ha->pdev);
2906
2907 /* Get PCI bus information. */
2908 spin_lock_irqsave(&ha->hardware_lock, flags);
2909 ha->pci_attr = rd_reg_word(®->ctrl_status);
2910 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2911
2912 return QLA_SUCCESS;
2913 }
2914
2915 /**
2916 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2917 * @vha: HA context
2918 *
2919 * Returns 0 on success.
2920 */
2921 int
qla2300_pci_config(scsi_qla_host_t * vha)2922 qla2300_pci_config(scsi_qla_host_t *vha)
2923 {
2924 uint16_t w;
2925 unsigned long flags = 0;
2926 uint32_t cnt;
2927 struct qla_hw_data *ha = vha->hw;
2928 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2929
2930 pci_set_master(ha->pdev);
2931 pci_try_set_mwi(ha->pdev);
2932
2933 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2934 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2935
2936 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2937 w &= ~PCI_COMMAND_INTX_DISABLE;
2938 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2939
2940 /*
2941 * If this is a 2300 card and not 2312, reset the
2942 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2943 * the 2310 also reports itself as a 2300 so we need to get the
2944 * fb revision level -- a 6 indicates it really is a 2300 and
2945 * not a 2310.
2946 */
2947 if (IS_QLA2300(ha)) {
2948 spin_lock_irqsave(&ha->hardware_lock, flags);
2949
2950 /* Pause RISC. */
2951 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC);
2952 for (cnt = 0; cnt < 30000; cnt++) {
2953 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0)
2954 break;
2955
2956 udelay(10);
2957 }
2958
2959 /* Select FPM registers. */
2960 wrt_reg_word(®->ctrl_status, 0x20);
2961 rd_reg_word(®->ctrl_status);
2962
2963 /* Get the fb rev level */
2964 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2965
2966 if (ha->fb_rev == FPM_2300)
2967 pci_clear_mwi(ha->pdev);
2968
2969 /* Deselect FPM registers. */
2970 wrt_reg_word(®->ctrl_status, 0x0);
2971 rd_reg_word(®->ctrl_status);
2972
2973 /* Release RISC module. */
2974 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
2975 for (cnt = 0; cnt < 30000; cnt++) {
2976 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0)
2977 break;
2978
2979 udelay(10);
2980 }
2981
2982 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2983 }
2984
2985 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2986
2987 pci_disable_rom(ha->pdev);
2988
2989 /* Get PCI bus information. */
2990 spin_lock_irqsave(&ha->hardware_lock, flags);
2991 ha->pci_attr = rd_reg_word(®->ctrl_status);
2992 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2993
2994 return QLA_SUCCESS;
2995 }
2996
2997 /**
2998 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2999 * @vha: HA context
3000 *
3001 * Returns 0 on success.
3002 */
3003 int
qla24xx_pci_config(scsi_qla_host_t * vha)3004 qla24xx_pci_config(scsi_qla_host_t *vha)
3005 {
3006 uint16_t w;
3007 unsigned long flags = 0;
3008 struct qla_hw_data *ha = vha->hw;
3009 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3010
3011 pci_set_master(ha->pdev);
3012 pci_try_set_mwi(ha->pdev);
3013
3014 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
3015 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
3016 w &= ~PCI_COMMAND_INTX_DISABLE;
3017 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
3018
3019 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
3020
3021 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
3022 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
3023 pcix_set_mmrbc(ha->pdev, 2048);
3024
3025 /* PCIe -- adjust Maximum Read Request Size (2048). */
3026 if (pci_is_pcie(ha->pdev))
3027 pcie_set_readrq(ha->pdev, 4096);
3028
3029 pci_disable_rom(ha->pdev);
3030
3031 ha->chip_revision = ha->pdev->revision;
3032
3033 /* Get PCI bus information. */
3034 spin_lock_irqsave(&ha->hardware_lock, flags);
3035 ha->pci_attr = rd_reg_dword(®->ctrl_status);
3036 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3037
3038 return QLA_SUCCESS;
3039 }
3040
3041 /**
3042 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
3043 * @vha: HA context
3044 *
3045 * Returns 0 on success.
3046 */
3047 int
qla25xx_pci_config(scsi_qla_host_t * vha)3048 qla25xx_pci_config(scsi_qla_host_t *vha)
3049 {
3050 uint16_t w;
3051 struct qla_hw_data *ha = vha->hw;
3052
3053 pci_set_master(ha->pdev);
3054 pci_try_set_mwi(ha->pdev);
3055
3056 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
3057 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
3058 w &= ~PCI_COMMAND_INTX_DISABLE;
3059 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
3060
3061 /* PCIe -- adjust Maximum Read Request Size (2048). */
3062 if (pci_is_pcie(ha->pdev))
3063 pcie_set_readrq(ha->pdev, 4096);
3064
3065 pci_disable_rom(ha->pdev);
3066
3067 ha->chip_revision = ha->pdev->revision;
3068
3069 return QLA_SUCCESS;
3070 }
3071
3072 /**
3073 * qla2x00_isp_firmware() - Choose firmware image.
3074 * @vha: HA context
3075 *
3076 * Returns 0 on success.
3077 */
3078 static int
qla2x00_isp_firmware(scsi_qla_host_t * vha)3079 qla2x00_isp_firmware(scsi_qla_host_t *vha)
3080 {
3081 int rval;
3082 uint16_t loop_id, topo, sw_cap;
3083 uint8_t domain, area, al_pa;
3084 struct qla_hw_data *ha = vha->hw;
3085
3086 /* Assume loading risc code */
3087 rval = QLA_FUNCTION_FAILED;
3088
3089 if (ha->flags.disable_risc_code_load) {
3090 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
3091
3092 /* Verify checksum of loaded RISC code. */
3093 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
3094 if (rval == QLA_SUCCESS) {
3095 /* And, verify we are not in ROM code. */
3096 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
3097 &area, &domain, &topo, &sw_cap);
3098 }
3099 }
3100
3101 if (rval)
3102 ql_dbg(ql_dbg_init, vha, 0x007a,
3103 "**** Load RISC code ****.\n");
3104
3105 return (rval);
3106 }
3107
3108 /**
3109 * qla2x00_reset_chip() - Reset ISP chip.
3110 * @vha: HA context
3111 *
3112 * Returns 0 on success.
3113 */
3114 int
qla2x00_reset_chip(scsi_qla_host_t * vha)3115 qla2x00_reset_chip(scsi_qla_host_t *vha)
3116 {
3117 unsigned long flags = 0;
3118 struct qla_hw_data *ha = vha->hw;
3119 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3120 uint32_t cnt;
3121 uint16_t cmd;
3122 int rval = QLA_FUNCTION_FAILED;
3123
3124 if (unlikely(pci_channel_offline(ha->pdev)))
3125 return rval;
3126
3127 ha->isp_ops->disable_intrs(ha);
3128
3129 spin_lock_irqsave(&ha->hardware_lock, flags);
3130
3131 /* Turn off master enable */
3132 cmd = 0;
3133 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
3134 cmd &= ~PCI_COMMAND_MASTER;
3135 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
3136
3137 if (!IS_QLA2100(ha)) {
3138 /* Pause RISC. */
3139 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC);
3140 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
3141 for (cnt = 0; cnt < 30000; cnt++) {
3142 if ((rd_reg_word(®->hccr) &
3143 HCCR_RISC_PAUSE) != 0)
3144 break;
3145 udelay(100);
3146 }
3147 } else {
3148 rd_reg_word(®->hccr); /* PCI Posting. */
3149 udelay(10);
3150 }
3151
3152 /* Select FPM registers. */
3153 wrt_reg_word(®->ctrl_status, 0x20);
3154 rd_reg_word(®->ctrl_status); /* PCI Posting. */
3155
3156 /* FPM Soft Reset. */
3157 wrt_reg_word(®->fpm_diag_config, 0x100);
3158 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */
3159
3160 /* Toggle Fpm Reset. */
3161 if (!IS_QLA2200(ha)) {
3162 wrt_reg_word(®->fpm_diag_config, 0x0);
3163 rd_reg_word(®->fpm_diag_config); /* PCI Posting. */
3164 }
3165
3166 /* Select frame buffer registers. */
3167 wrt_reg_word(®->ctrl_status, 0x10);
3168 rd_reg_word(®->ctrl_status); /* PCI Posting. */
3169
3170 /* Reset frame buffer FIFOs. */
3171 if (IS_QLA2200(ha)) {
3172 WRT_FB_CMD_REG(ha, reg, 0xa000);
3173 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
3174 } else {
3175 WRT_FB_CMD_REG(ha, reg, 0x00fc);
3176
3177 /* Read back fb_cmd until zero or 3 seconds max */
3178 for (cnt = 0; cnt < 3000; cnt++) {
3179 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
3180 break;
3181 udelay(100);
3182 }
3183 }
3184
3185 /* Select RISC module registers. */
3186 wrt_reg_word(®->ctrl_status, 0);
3187 rd_reg_word(®->ctrl_status); /* PCI Posting. */
3188
3189 /* Reset RISC processor. */
3190 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
3191 rd_reg_word(®->hccr); /* PCI Posting. */
3192
3193 /* Release RISC processor. */
3194 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
3195 rd_reg_word(®->hccr); /* PCI Posting. */
3196 }
3197
3198 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
3199 wrt_reg_word(®->hccr, HCCR_CLR_HOST_INT);
3200
3201 /* Reset ISP chip. */
3202 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET);
3203
3204 /* Wait for RISC to recover from reset. */
3205 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3206 /*
3207 * It is necessary to for a delay here since the card doesn't
3208 * respond to PCI reads during a reset. On some architectures
3209 * this will result in an MCA.
3210 */
3211 udelay(20);
3212 for (cnt = 30000; cnt; cnt--) {
3213 if ((rd_reg_word(®->ctrl_status) &
3214 CSR_ISP_SOFT_RESET) == 0)
3215 break;
3216 udelay(100);
3217 }
3218 } else
3219 udelay(10);
3220
3221 /* Reset RISC processor. */
3222 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
3223
3224 wrt_reg_word(®->semaphore, 0);
3225
3226 /* Release RISC processor. */
3227 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
3228 rd_reg_word(®->hccr); /* PCI Posting. */
3229
3230 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3231 for (cnt = 0; cnt < 30000; cnt++) {
3232 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
3233 break;
3234
3235 udelay(100);
3236 }
3237 } else
3238 udelay(100);
3239
3240 /* Turn on master enable */
3241 cmd |= PCI_COMMAND_MASTER;
3242 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
3243
3244 /* Disable RISC pause on FPM parity error. */
3245 if (!IS_QLA2100(ha)) {
3246 wrt_reg_word(®->hccr, HCCR_DISABLE_PARITY_PAUSE);
3247 rd_reg_word(®->hccr); /* PCI Posting. */
3248 }
3249
3250 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3251
3252 return QLA_SUCCESS;
3253 }
3254
3255 /**
3256 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
3257 * @vha: HA context
3258 *
3259 * Returns 0 on success.
3260 */
3261 static int
qla81xx_reset_mpi(scsi_qla_host_t * vha)3262 qla81xx_reset_mpi(scsi_qla_host_t *vha)
3263 {
3264 uint16_t mb[4] = {0x1010, 0, 1, 0};
3265
3266 if (!IS_QLA81XX(vha->hw))
3267 return QLA_SUCCESS;
3268
3269 return qla81xx_write_mpi_register(vha, mb);
3270 }
3271
3272 static int
qla_chk_risc_recovery(scsi_qla_host_t * vha)3273 qla_chk_risc_recovery(scsi_qla_host_t *vha)
3274 {
3275 struct qla_hw_data *ha = vha->hw;
3276 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3277 __le16 __iomem *mbptr = ®->mailbox0;
3278 int i;
3279 u16 mb[32];
3280 int rc = QLA_SUCCESS;
3281
3282 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3283 return rc;
3284
3285 /* this check is only valid after RISC reset */
3286 mb[0] = rd_reg_word(mbptr);
3287 mbptr++;
3288 if (mb[0] == 0xf) {
3289 rc = QLA_FUNCTION_FAILED;
3290
3291 for (i = 1; i < 32; i++) {
3292 mb[i] = rd_reg_word(mbptr);
3293 mbptr++;
3294 }
3295
3296 ql_log(ql_log_warn, vha, 0x1015,
3297 "RISC reset failed. mb[0-7] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3298 mb[0], mb[1], mb[2], mb[3], mb[4], mb[5], mb[6], mb[7]);
3299 ql_log(ql_log_warn, vha, 0x1015,
3300 "RISC reset failed. mb[8-15] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3301 mb[8], mb[9], mb[10], mb[11], mb[12], mb[13], mb[14],
3302 mb[15]);
3303 ql_log(ql_log_warn, vha, 0x1015,
3304 "RISC reset failed. mb[16-23] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3305 mb[16], mb[17], mb[18], mb[19], mb[20], mb[21], mb[22],
3306 mb[23]);
3307 ql_log(ql_log_warn, vha, 0x1015,
3308 "RISC reset failed. mb[24-31] %04xh %04xh %04xh %04xh %04xh %04xh %04xh %04xh\n",
3309 mb[24], mb[25], mb[26], mb[27], mb[28], mb[29], mb[30],
3310 mb[31]);
3311 }
3312 return rc;
3313 }
3314
3315 /**
3316 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
3317 * @vha: HA context
3318 *
3319 * Returns 0 on success.
3320 */
3321 static inline int
qla24xx_reset_risc(scsi_qla_host_t * vha)3322 qla24xx_reset_risc(scsi_qla_host_t *vha)
3323 {
3324 unsigned long flags = 0;
3325 struct qla_hw_data *ha = vha->hw;
3326 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3327 uint32_t cnt;
3328 uint16_t wd;
3329 static int abts_cnt; /* ISP abort retry counts */
3330 int rval = QLA_SUCCESS;
3331 int print = 1;
3332
3333 spin_lock_irqsave(&ha->hardware_lock, flags);
3334
3335 /* Reset RISC. */
3336 wrt_reg_dword(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
3337 for (cnt = 0; cnt < 30000; cnt++) {
3338 if ((rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
3339 break;
3340
3341 udelay(10);
3342 }
3343
3344 if (!(rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE))
3345 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
3346
3347 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
3348 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
3349 rd_reg_dword(®->hccr),
3350 rd_reg_dword(®->ctrl_status),
3351 (rd_reg_dword(®->ctrl_status) & CSRX_DMA_ACTIVE));
3352
3353 wrt_reg_dword(®->ctrl_status,
3354 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
3355 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
3356
3357 udelay(100);
3358
3359 /* Wait for firmware to complete NVRAM accesses. */
3360 rd_reg_word(®->mailbox0);
3361 for (cnt = 10000; rd_reg_word(®->mailbox0) != 0 &&
3362 rval == QLA_SUCCESS; cnt--) {
3363 barrier();
3364 if (cnt)
3365 udelay(5);
3366 else
3367 rval = QLA_FUNCTION_TIMEOUT;
3368 }
3369
3370 if (rval == QLA_SUCCESS)
3371 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
3372
3373 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
3374 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
3375 rd_reg_dword(®->hccr),
3376 rd_reg_word(®->mailbox0));
3377
3378 /* Wait for soft-reset to complete. */
3379 rd_reg_dword(®->ctrl_status);
3380 for (cnt = 0; cnt < 60; cnt++) {
3381 barrier();
3382 if ((rd_reg_dword(®->ctrl_status) &
3383 CSRX_ISP_SOFT_RESET) == 0)
3384 break;
3385
3386 udelay(5);
3387 }
3388 if (!(rd_reg_dword(®->ctrl_status) & CSRX_ISP_SOFT_RESET))
3389 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
3390
3391 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
3392 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
3393 rd_reg_dword(®->hccr),
3394 rd_reg_dword(®->ctrl_status));
3395
3396 /* If required, do an MPI FW reset now */
3397 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
3398 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
3399 if (++abts_cnt < 5) {
3400 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3401 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
3402 } else {
3403 /*
3404 * We exhausted the ISP abort retries. We have to
3405 * set the board offline.
3406 */
3407 abts_cnt = 0;
3408 vha->flags.online = 0;
3409 }
3410 }
3411 }
3412
3413 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET);
3414 rd_reg_dword(®->hccr);
3415
3416 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE);
3417 rd_reg_dword(®->hccr);
3418
3419 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_RESET);
3420 mdelay(10);
3421 rd_reg_dword(®->hccr);
3422
3423 wd = rd_reg_word(®->mailbox0);
3424 for (cnt = 300; wd != 0 && rval == QLA_SUCCESS; cnt--) {
3425 barrier();
3426 if (cnt) {
3427 mdelay(1);
3428 if (print && qla_chk_risc_recovery(vha))
3429 print = 0;
3430
3431 wd = rd_reg_word(®->mailbox0);
3432 } else {
3433 rval = QLA_FUNCTION_TIMEOUT;
3434
3435 ql_log(ql_log_warn, vha, 0x015e,
3436 "RISC reset timeout\n");
3437 }
3438 }
3439
3440 if (rval == QLA_SUCCESS)
3441 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
3442
3443 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
3444 "Host Risc 0x%x, mailbox0 0x%x\n",
3445 rd_reg_dword(®->hccr),
3446 rd_reg_word(®->mailbox0));
3447
3448 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3449
3450 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
3451 "Driver in %s mode\n",
3452 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
3453
3454 if (IS_NOPOLLING_TYPE(ha))
3455 ha->isp_ops->enable_intrs(ha);
3456
3457 return rval;
3458 }
3459
3460 static void
qla25xx_read_risc_sema_reg(scsi_qla_host_t * vha,uint32_t * data)3461 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
3462 {
3463 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
3464
3465 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
3466 *data = rd_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET);
3467 }
3468
3469 static void
qla25xx_write_risc_sema_reg(scsi_qla_host_t * vha,uint32_t data)3470 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
3471 {
3472 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
3473
3474 wrt_reg_dword(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
3475 wrt_reg_dword(®->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);
3476 }
3477
3478 static void
qla25xx_manipulate_risc_semaphore(scsi_qla_host_t * vha)3479 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
3480 {
3481 uint32_t wd32 = 0;
3482 uint delta_msec = 100;
3483 uint elapsed_msec = 0;
3484 uint timeout_msec;
3485 ulong n;
3486
3487 if (vha->hw->pdev->subsystem_device != 0x0175 &&
3488 vha->hw->pdev->subsystem_device != 0x0240)
3489 return;
3490
3491 wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
3492 udelay(100);
3493
3494 attempt:
3495 timeout_msec = TIMEOUT_SEMAPHORE;
3496 n = timeout_msec / delta_msec;
3497 while (n--) {
3498 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
3499 qla25xx_read_risc_sema_reg(vha, &wd32);
3500 if (wd32 & RISC_SEMAPHORE)
3501 break;
3502 msleep(delta_msec);
3503 elapsed_msec += delta_msec;
3504 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3505 goto force;
3506 }
3507
3508 if (!(wd32 & RISC_SEMAPHORE))
3509 goto force;
3510
3511 if (!(wd32 & RISC_SEMAPHORE_FORCE))
3512 goto acquired;
3513
3514 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
3515 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
3516 n = timeout_msec / delta_msec;
3517 while (n--) {
3518 qla25xx_read_risc_sema_reg(vha, &wd32);
3519 if (!(wd32 & RISC_SEMAPHORE_FORCE))
3520 break;
3521 msleep(delta_msec);
3522 elapsed_msec += delta_msec;
3523 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
3524 goto force;
3525 }
3526
3527 if (wd32 & RISC_SEMAPHORE_FORCE)
3528 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
3529
3530 goto attempt;
3531
3532 force:
3533 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
3534
3535 acquired:
3536 return;
3537 }
3538
3539 /**
3540 * qla24xx_reset_chip() - Reset ISP24xx chip.
3541 * @vha: HA context
3542 *
3543 * Returns 0 on success.
3544 */
3545 int
qla24xx_reset_chip(scsi_qla_host_t * vha)3546 qla24xx_reset_chip(scsi_qla_host_t *vha)
3547 {
3548 struct qla_hw_data *ha = vha->hw;
3549 int rval = QLA_FUNCTION_FAILED;
3550
3551 if (pci_channel_offline(ha->pdev) &&
3552 ha->flags.pci_channel_io_perm_failure) {
3553 return rval;
3554 }
3555
3556 ha->isp_ops->disable_intrs(ha);
3557
3558 qla25xx_manipulate_risc_semaphore(vha);
3559
3560 /* Perform RISC reset. */
3561 rval = qla24xx_reset_risc(vha);
3562
3563 return rval;
3564 }
3565
3566 /**
3567 * qla2x00_chip_diag() - Test chip for proper operation.
3568 * @vha: HA context
3569 *
3570 * Returns 0 on success.
3571 */
3572 int
qla2x00_chip_diag(scsi_qla_host_t * vha)3573 qla2x00_chip_diag(scsi_qla_host_t *vha)
3574 {
3575 int rval;
3576 struct qla_hw_data *ha = vha->hw;
3577 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3578 unsigned long flags = 0;
3579 uint16_t data;
3580 uint32_t cnt;
3581 uint16_t mb[5];
3582 struct req_que *req = ha->req_q_map[0];
3583
3584 /* Assume a failed state */
3585 rval = QLA_FUNCTION_FAILED;
3586
3587 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
3588 ®->flash_address);
3589
3590 spin_lock_irqsave(&ha->hardware_lock, flags);
3591
3592 /* Reset ISP chip. */
3593 wrt_reg_word(®->ctrl_status, CSR_ISP_SOFT_RESET);
3594
3595 /*
3596 * We need to have a delay here since the card will not respond while
3597 * in reset causing an MCA on some architectures.
3598 */
3599 udelay(20);
3600 data = qla2x00_debounce_register(®->ctrl_status);
3601 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
3602 udelay(5);
3603 data = rd_reg_word(®->ctrl_status);
3604 barrier();
3605 }
3606
3607 if (!cnt)
3608 goto chip_diag_failed;
3609
3610 ql_dbg(ql_dbg_init, vha, 0x007c,
3611 "Reset register cleared by chip reset.\n");
3612
3613 /* Reset RISC processor. */
3614 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
3615 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
3616
3617 /* Workaround for QLA2312 PCI parity error */
3618 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3619 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
3620 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
3621 udelay(5);
3622 data = RD_MAILBOX_REG(ha, reg, 0);
3623 barrier();
3624 }
3625 } else
3626 udelay(10);
3627
3628 if (!cnt)
3629 goto chip_diag_failed;
3630
3631 /* Check product ID of chip */
3632 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
3633
3634 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
3635 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3636 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3637 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3638 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3639 mb[3] != PROD_ID_3) {
3640 ql_log(ql_log_warn, vha, 0x0062,
3641 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3642 mb[1], mb[2], mb[3]);
3643
3644 goto chip_diag_failed;
3645 }
3646 ha->product_id[0] = mb[1];
3647 ha->product_id[1] = mb[2];
3648 ha->product_id[2] = mb[3];
3649 ha->product_id[3] = mb[4];
3650
3651 /* Adjust fw RISC transfer size */
3652 if (req->length > 1024)
3653 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3654 else
3655 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3656 req->length;
3657
3658 if (IS_QLA2200(ha) &&
3659 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3660 /* Limit firmware transfer size with a 2200A */
3661 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
3662
3663 ha->device_type |= DT_ISP2200A;
3664 ha->fw_transfer_size = 128;
3665 }
3666
3667 /* Wrap Incoming Mailboxes Test. */
3668 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3669
3670 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
3671 rval = qla2x00_mbx_reg_test(vha);
3672 if (rval)
3673 ql_log(ql_log_warn, vha, 0x0080,
3674 "Failed mailbox send register test.\n");
3675 else
3676 /* Flag a successful rval */
3677 rval = QLA_SUCCESS;
3678 spin_lock_irqsave(&ha->hardware_lock, flags);
3679
3680 chip_diag_failed:
3681 if (rval)
3682 ql_log(ql_log_info, vha, 0x0081,
3683 "Chip diagnostics **** FAILED ****.\n");
3684
3685 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3686
3687 return (rval);
3688 }
3689
3690 /**
3691 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
3692 * @vha: HA context
3693 *
3694 * Returns 0 on success.
3695 */
3696 int
qla24xx_chip_diag(scsi_qla_host_t * vha)3697 qla24xx_chip_diag(scsi_qla_host_t *vha)
3698 {
3699 int rval;
3700 struct qla_hw_data *ha = vha->hw;
3701 struct req_que *req = ha->req_q_map[0];
3702
3703 if (IS_P3P_TYPE(ha))
3704 return QLA_SUCCESS;
3705
3706 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3707
3708 rval = qla2x00_mbx_reg_test(vha);
3709 if (rval) {
3710 ql_log(ql_log_warn, vha, 0x0082,
3711 "Failed mailbox send register test.\n");
3712 } else {
3713 /* Flag a successful rval */
3714 rval = QLA_SUCCESS;
3715 }
3716
3717 return rval;
3718 }
3719
qla2x00_alloc_fce_trace(scsi_qla_host_t * vha)3720 int qla2x00_alloc_fce_trace(scsi_qla_host_t *vha)
3721 {
3722 dma_addr_t tc_dma;
3723 void *tc;
3724 struct qla_hw_data *ha = vha->hw;
3725
3726 if (!IS_FWI2_CAPABLE(ha))
3727 return -EINVAL;
3728
3729 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3730 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3731 return -EINVAL;
3732
3733 if (ha->fce) {
3734 ql_dbg(ql_dbg_init, vha, 0x00bd,
3735 "%s: FCE Mem is already allocated.\n",
3736 __func__);
3737 return -EIO;
3738 }
3739
3740 /* Allocate memory for Fibre Channel Event Buffer. */
3741 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3742 GFP_KERNEL);
3743 if (!tc) {
3744 ql_log(ql_log_warn, vha, 0x00be,
3745 "Unable to allocate (%d KB) for FCE.\n",
3746 FCE_SIZE / 1024);
3747 return -ENOMEM;
3748 }
3749
3750 ql_dbg(ql_dbg_init, vha, 0x00c0,
3751 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
3752
3753 ha->fce_dma = tc_dma;
3754 ha->fce = tc;
3755 ha->fce_bufs = FCE_NUM_BUFFERS;
3756 return 0;
3757 }
3758
qla2x00_free_fce_trace(struct qla_hw_data * ha)3759 void qla2x00_free_fce_trace(struct qla_hw_data *ha)
3760 {
3761 if (!ha->fce)
3762 return;
3763 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, ha->fce_dma);
3764 ha->fce = NULL;
3765 ha->fce_dma = 0;
3766 }
3767
3768 static void
qla2x00_alloc_eft_trace(scsi_qla_host_t * vha)3769 qla2x00_alloc_eft_trace(scsi_qla_host_t *vha)
3770 {
3771 dma_addr_t tc_dma;
3772 void *tc;
3773 struct qla_hw_data *ha = vha->hw;
3774
3775 if (!IS_FWI2_CAPABLE(ha))
3776 return;
3777
3778 if (ha->eft) {
3779 ql_dbg(ql_dbg_init, vha, 0x00bd,
3780 "%s: EFT Mem is already allocated.\n",
3781 __func__);
3782 return;
3783 }
3784
3785 /* Allocate memory for Extended Trace Buffer. */
3786 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3787 GFP_KERNEL);
3788 if (!tc) {
3789 ql_log(ql_log_warn, vha, 0x00c1,
3790 "Unable to allocate (%d KB) for EFT.\n",
3791 EFT_SIZE / 1024);
3792 return;
3793 }
3794
3795 ql_dbg(ql_dbg_init, vha, 0x00c3,
3796 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3797
3798 ha->eft_dma = tc_dma;
3799 ha->eft = tc;
3800 }
3801
3802 void
qla2x00_alloc_fw_dump(scsi_qla_host_t * vha)3803 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3804 {
3805 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3806 eft_size, fce_size, mq_size;
3807 struct qla_hw_data *ha = vha->hw;
3808 struct req_que *req = ha->req_q_map[0];
3809 struct rsp_que *rsp = ha->rsp_q_map[0];
3810 struct qla2xxx_fw_dump *fw_dump;
3811
3812 if (ha->fw_dump) {
3813 ql_dbg(ql_dbg_init, vha, 0x00bd,
3814 "Firmware dump already allocated.\n");
3815 return;
3816 }
3817
3818 ha->fw_dumped = 0;
3819 ha->fw_dump_cap_flags = 0;
3820 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3821 req_q_size = rsp_q_size = 0;
3822
3823 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3824 fixed_size = sizeof(struct qla2100_fw_dump);
3825 } else if (IS_QLA23XX(ha)) {
3826 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3827 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3828 sizeof(uint16_t);
3829 } else if (IS_FWI2_CAPABLE(ha)) {
3830 if (IS_QLA83XX(ha))
3831 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3832 else if (IS_QLA81XX(ha))
3833 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3834 else if (IS_QLA25XX(ha))
3835 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3836 else
3837 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3838
3839 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3840 sizeof(uint32_t);
3841 if (ha->mqenable) {
3842 if (!IS_QLA83XX(ha))
3843 mq_size = sizeof(struct qla2xxx_mq_chain);
3844 /*
3845 * Allocate maximum buffer size for all queues - Q0.
3846 * Resizing must be done at end-of-dump processing.
3847 */
3848 mq_size += (ha->max_req_queues - 1) *
3849 (req->length * sizeof(request_t));
3850 mq_size += (ha->max_rsp_queues - 1) *
3851 (rsp->length * sizeof(response_t));
3852 }
3853 if (ha->tgt.atio_ring)
3854 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3855
3856 if (ha->fce) {
3857 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3858 ha->flags.fce_dump_buf_alloced = 1;
3859 }
3860 qla2x00_alloc_eft_trace(vha);
3861 if (ha->eft)
3862 eft_size = EFT_SIZE;
3863 }
3864
3865 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3866 struct fwdt *fwdt = ha->fwdt;
3867 uint j;
3868
3869 for (j = 0; j < 2; j++, fwdt++) {
3870 if (!fwdt->template) {
3871 ql_dbg(ql_dbg_init, vha, 0x00ba,
3872 "-> fwdt%u no template\n", j);
3873 continue;
3874 }
3875 ql_dbg(ql_dbg_init, vha, 0x00fa,
3876 "-> fwdt%u calculating fwdump size...\n", j);
3877 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3878 vha, fwdt->template);
3879 ql_dbg(ql_dbg_init, vha, 0x00fa,
3880 "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3881 j, fwdt->dump_size);
3882 dump_size += fwdt->dump_size;
3883 }
3884 /* Add space for spare MPI fw dump. */
3885 dump_size += ha->fwdt[1].dump_size;
3886 } else {
3887 req_q_size = req->length * sizeof(request_t);
3888 rsp_q_size = rsp->length * sizeof(response_t);
3889 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3890 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
3891 + eft_size;
3892 ha->chain_offset = dump_size;
3893 dump_size += mq_size + fce_size;
3894 if (ha->exchoffld_buf)
3895 dump_size += sizeof(struct qla2xxx_offld_chain) +
3896 ha->exchoffld_size;
3897 if (ha->exlogin_buf)
3898 dump_size += sizeof(struct qla2xxx_offld_chain) +
3899 ha->exlogin_size;
3900 }
3901
3902 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3903
3904 ql_dbg(ql_dbg_init, vha, 0x00c5,
3905 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3906 __func__, dump_size, ha->fw_dump_len,
3907 ha->fw_dump_alloc_len);
3908
3909 fw_dump = vmalloc(dump_size);
3910 if (!fw_dump) {
3911 ql_log(ql_log_warn, vha, 0x00c4,
3912 "Unable to allocate (%d KB) for firmware dump.\n",
3913 dump_size / 1024);
3914 } else {
3915 mutex_lock(&ha->optrom_mutex);
3916 if (ha->fw_dumped) {
3917 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3918 vfree(ha->fw_dump);
3919 ha->fw_dump = fw_dump;
3920 ha->fw_dump_alloc_len = dump_size;
3921 ql_dbg(ql_dbg_init, vha, 0x00c5,
3922 "Re-Allocated (%d KB) and save firmware dump.\n",
3923 dump_size / 1024);
3924 } else {
3925 vfree(ha->fw_dump);
3926 ha->fw_dump = fw_dump;
3927
3928 ha->fw_dump_len = ha->fw_dump_alloc_len =
3929 dump_size;
3930 ql_dbg(ql_dbg_init, vha, 0x00c5,
3931 "Allocated (%d KB) for firmware dump.\n",
3932 dump_size / 1024);
3933
3934 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3935 ha->mpi_fw_dump = (char *)fw_dump +
3936 ha->fwdt[1].dump_size;
3937 mutex_unlock(&ha->optrom_mutex);
3938 return;
3939 }
3940
3941 ha->fw_dump->signature[0] = 'Q';
3942 ha->fw_dump->signature[1] = 'L';
3943 ha->fw_dump->signature[2] = 'G';
3944 ha->fw_dump->signature[3] = 'C';
3945 ha->fw_dump->version = htonl(1);
3946
3947 ha->fw_dump->fixed_size = htonl(fixed_size);
3948 ha->fw_dump->mem_size = htonl(mem_size);
3949 ha->fw_dump->req_q_size = htonl(req_q_size);
3950 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3951
3952 ha->fw_dump->eft_size = htonl(eft_size);
3953 ha->fw_dump->eft_addr_l =
3954 htonl(LSD(ha->eft_dma));
3955 ha->fw_dump->eft_addr_h =
3956 htonl(MSD(ha->eft_dma));
3957
3958 ha->fw_dump->header_size =
3959 htonl(offsetof
3960 (struct qla2xxx_fw_dump, isp));
3961 }
3962 mutex_unlock(&ha->optrom_mutex);
3963 }
3964 }
3965 }
3966
3967 static int
qla81xx_mpi_sync(scsi_qla_host_t * vha)3968 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3969 {
3970 #define MPS_MASK 0xe0
3971 int rval;
3972 uint16_t dc;
3973 uint32_t dw;
3974
3975 if (!IS_QLA81XX(vha->hw))
3976 return QLA_SUCCESS;
3977
3978 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3979 if (rval != QLA_SUCCESS) {
3980 ql_log(ql_log_warn, vha, 0x0105,
3981 "Unable to acquire semaphore.\n");
3982 goto done;
3983 }
3984
3985 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3986 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3987 if (rval != QLA_SUCCESS) {
3988 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3989 goto done_release;
3990 }
3991
3992 dc &= MPS_MASK;
3993 if (dc == (dw & MPS_MASK))
3994 goto done_release;
3995
3996 dw &= ~MPS_MASK;
3997 dw |= dc;
3998 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3999 if (rval != QLA_SUCCESS) {
4000 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
4001 }
4002
4003 done_release:
4004 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
4005 if (rval != QLA_SUCCESS) {
4006 ql_log(ql_log_warn, vha, 0x006d,
4007 "Unable to release semaphore.\n");
4008 }
4009
4010 done:
4011 return rval;
4012 }
4013
4014 int
qla2x00_alloc_outstanding_cmds(struct qla_hw_data * ha,struct req_que * req)4015 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
4016 {
4017 /* Don't try to reallocate the array */
4018 if (req->outstanding_cmds)
4019 return QLA_SUCCESS;
4020
4021 if (!IS_FWI2_CAPABLE(ha))
4022 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
4023 else {
4024 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
4025 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
4026 else
4027 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
4028 }
4029
4030 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
4031 sizeof(srb_t *),
4032 GFP_KERNEL);
4033
4034 if (!req->outstanding_cmds) {
4035 /*
4036 * Try to allocate a minimal size just so we can get through
4037 * initialization.
4038 */
4039 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
4040 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
4041 sizeof(srb_t *),
4042 GFP_KERNEL);
4043
4044 if (!req->outstanding_cmds) {
4045 ql_log(ql_log_fatal, NULL, 0x0126,
4046 "Failed to allocate memory for "
4047 "outstanding_cmds for req_que %p.\n", req);
4048 req->num_outstanding_cmds = 0;
4049 return QLA_FUNCTION_FAILED;
4050 }
4051 }
4052
4053 return QLA_SUCCESS;
4054 }
4055
4056 #define PRINT_FIELD(_field, _flag, _str) { \
4057 if (a0->_field & _flag) {\
4058 if (p) {\
4059 strcat(ptr, "|");\
4060 ptr++;\
4061 leftover--;\
4062 } \
4063 len = snprintf(ptr, leftover, "%s", _str); \
4064 p = 1;\
4065 leftover -= len;\
4066 ptr += len; \
4067 } \
4068 }
4069
qla2xxx_print_sfp_info(struct scsi_qla_host * vha)4070 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
4071 {
4072 #define STR_LEN 64
4073 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
4074 u8 str[STR_LEN], *ptr, p;
4075 int leftover, len;
4076
4077 memset(str, 0, STR_LEN);
4078 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
4079 ql_dbg(ql_dbg_init, vha, 0x015a,
4080 "SFP MFG Name: %s\n", str);
4081
4082 memset(str, 0, STR_LEN);
4083 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
4084 ql_dbg(ql_dbg_init, vha, 0x015c,
4085 "SFP Part Name: %s\n", str);
4086
4087 /* media */
4088 memset(str, 0, STR_LEN);
4089 ptr = str;
4090 leftover = STR_LEN;
4091 p = len = 0;
4092 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
4093 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
4094 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
4095 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
4096 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
4097 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
4098 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
4099 ql_dbg(ql_dbg_init, vha, 0x0160,
4100 "SFP Media: %s\n", str);
4101
4102 /* link length */
4103 memset(str, 0, STR_LEN);
4104 ptr = str;
4105 leftover = STR_LEN;
4106 p = len = 0;
4107 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
4108 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
4109 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
4110 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
4111 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
4112 ql_dbg(ql_dbg_init, vha, 0x0196,
4113 "SFP Link Length: %s\n", str);
4114
4115 memset(str, 0, STR_LEN);
4116 ptr = str;
4117 leftover = STR_LEN;
4118 p = len = 0;
4119 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
4120 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
4121 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
4122 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
4123 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
4124 ql_dbg(ql_dbg_init, vha, 0x016e,
4125 "SFP FC Link Tech: %s\n", str);
4126
4127 if (a0->length_km)
4128 ql_dbg(ql_dbg_init, vha, 0x016f,
4129 "SFP Distant: %d km\n", a0->length_km);
4130 if (a0->length_100m)
4131 ql_dbg(ql_dbg_init, vha, 0x0170,
4132 "SFP Distant: %d m\n", a0->length_100m*100);
4133 if (a0->length_50um_10m)
4134 ql_dbg(ql_dbg_init, vha, 0x0189,
4135 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
4136 if (a0->length_62um_10m)
4137 ql_dbg(ql_dbg_init, vha, 0x018a,
4138 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
4139 if (a0->length_om4_10m)
4140 ql_dbg(ql_dbg_init, vha, 0x0194,
4141 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
4142 if (a0->length_om3_10m)
4143 ql_dbg(ql_dbg_init, vha, 0x0195,
4144 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
4145 }
4146
4147
4148 /**
4149 * qla24xx_detect_sfp()
4150 *
4151 * @vha: adapter state pointer.
4152 *
4153 * @return
4154 * 0 -- Configure firmware to use short-range settings -- normal
4155 * buffer-to-buffer credits.
4156 *
4157 * 1 -- Configure firmware to use long-range settings -- extra
4158 * buffer-to-buffer credits should be allocated with
4159 * ha->lr_distance containing distance settings from NVRAM or SFP
4160 * (if supported).
4161 */
4162 int
qla24xx_detect_sfp(scsi_qla_host_t * vha)4163 qla24xx_detect_sfp(scsi_qla_host_t *vha)
4164 {
4165 int rc, used_nvram;
4166 struct sff_8247_a0 *a;
4167 struct qla_hw_data *ha = vha->hw;
4168 struct nvram_81xx *nv = ha->nvram;
4169 #define LR_DISTANCE_UNKNOWN 2
4170 static const char * const types[] = { "Short", "Long" };
4171 static const char * const lengths[] = { "(10km)", "(5km)", "" };
4172 u8 ll = 0;
4173
4174 /* Seed with NVRAM settings. */
4175 used_nvram = 0;
4176 ha->flags.lr_detected = 0;
4177 if (IS_BPM_RANGE_CAPABLE(ha) &&
4178 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) {
4179 used_nvram = 1;
4180 ha->flags.lr_detected = 1;
4181 ha->lr_distance =
4182 (nv->enhanced_features >> LR_DIST_NV_POS)
4183 & LR_DIST_NV_MASK;
4184 }
4185
4186 if (!IS_BPM_ENABLED(vha))
4187 goto out;
4188 /* Determine SR/LR capabilities of SFP/Transceiver. */
4189 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
4190 if (rc)
4191 goto out;
4192
4193 used_nvram = 0;
4194 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
4195 qla2xxx_print_sfp_info(vha);
4196
4197 ha->flags.lr_detected = 0;
4198 ll = a->fc_ll_cc7;
4199 if (ll & FC_LL_VL || ll & FC_LL_L) {
4200 /* Long range, track length. */
4201 ha->flags.lr_detected = 1;
4202
4203 if (a->length_km > 5 || a->length_100m > 50)
4204 ha->lr_distance = LR_DISTANCE_10K;
4205 else
4206 ha->lr_distance = LR_DISTANCE_5K;
4207 }
4208
4209 out:
4210 ql_dbg(ql_dbg_async, vha, 0x507b,
4211 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",
4212 types[ha->flags.lr_detected],
4213 ha->flags.lr_detected ? lengths[ha->lr_distance] :
4214 lengths[LR_DISTANCE_UNKNOWN],
4215 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance);
4216 return ha->flags.lr_detected;
4217 }
4218
__qla_adjust_iocb_limit(struct qla_qpair * qpair)4219 static void __qla_adjust_iocb_limit(struct qla_qpair *qpair)
4220 {
4221 u8 num_qps;
4222 u16 limit;
4223 struct qla_hw_data *ha = qpair->vha->hw;
4224
4225 num_qps = ha->num_qpairs + 1;
4226 limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
4227
4228 qpair->fwres.iocbs_total = ha->orig_fw_iocb_count;
4229 qpair->fwres.iocbs_limit = limit;
4230 qpair->fwres.iocbs_qp_limit = limit / num_qps;
4231
4232 qpair->fwres.exch_total = ha->orig_fw_xcb_count;
4233 qpair->fwres.exch_limit = (ha->orig_fw_xcb_count *
4234 QLA_IOCB_PCT_LIMIT) / 100;
4235 }
4236
qla_init_iocb_limit(scsi_qla_host_t * vha)4237 void qla_init_iocb_limit(scsi_qla_host_t *vha)
4238 {
4239 u8 i;
4240 struct qla_hw_data *ha = vha->hw;
4241
4242 __qla_adjust_iocb_limit(ha->base_qpair);
4243 ha->base_qpair->fwres.iocbs_used = 0;
4244 ha->base_qpair->fwres.exch_used = 0;
4245
4246 for (i = 0; i < ha->max_qpairs; i++) {
4247 if (ha->queue_pair_map[i]) {
4248 __qla_adjust_iocb_limit(ha->queue_pair_map[i]);
4249 ha->queue_pair_map[i]->fwres.iocbs_used = 0;
4250 ha->queue_pair_map[i]->fwres.exch_used = 0;
4251 }
4252 }
4253
4254 ha->fwres.iocb_total = ha->orig_fw_iocb_count;
4255 ha->fwres.iocb_limit = (ha->orig_fw_iocb_count * QLA_IOCB_PCT_LIMIT) / 100;
4256 ha->fwres.exch_total = ha->orig_fw_xcb_count;
4257 ha->fwres.exch_limit = (ha->orig_fw_xcb_count * QLA_IOCB_PCT_LIMIT) / 100;
4258
4259 atomic_set(&ha->fwres.iocb_used, 0);
4260 atomic_set(&ha->fwres.exch_used, 0);
4261 }
4262
qla_adjust_iocb_limit(scsi_qla_host_t * vha)4263 void qla_adjust_iocb_limit(scsi_qla_host_t *vha)
4264 {
4265 u8 i;
4266 struct qla_hw_data *ha = vha->hw;
4267
4268 __qla_adjust_iocb_limit(ha->base_qpair);
4269
4270 for (i = 0; i < ha->max_qpairs; i++) {
4271 if (ha->queue_pair_map[i])
4272 __qla_adjust_iocb_limit(ha->queue_pair_map[i]);
4273 }
4274 }
4275
4276 /**
4277 * qla2x00_setup_chip() - Load and start RISC firmware.
4278 * @vha: HA context
4279 *
4280 * Returns 0 on success.
4281 */
4282 static int
qla2x00_setup_chip(scsi_qla_host_t * vha)4283 qla2x00_setup_chip(scsi_qla_host_t *vha)
4284 {
4285 int rval;
4286 uint32_t srisc_address = 0;
4287 struct qla_hw_data *ha = vha->hw;
4288 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4289 unsigned long flags;
4290 int done_once = 0;
4291
4292 if (IS_P3P_TYPE(ha)) {
4293 rval = ha->isp_ops->load_risc(vha, &srisc_address);
4294 if (rval == QLA_SUCCESS) {
4295 qla2x00_stop_firmware(vha);
4296 goto enable_82xx_npiv;
4297 } else
4298 goto failed;
4299 }
4300
4301 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
4302 /* Disable SRAM, Instruction RAM and GP RAM parity. */
4303 spin_lock_irqsave(&ha->hardware_lock, flags);
4304 wrt_reg_word(®->hccr, (HCCR_ENABLE_PARITY + 0x0));
4305 rd_reg_word(®->hccr);
4306 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4307 }
4308
4309 qla81xx_mpi_sync(vha);
4310
4311 execute_fw_with_lr:
4312 /* Load firmware sequences */
4313 rval = ha->isp_ops->load_risc(vha, &srisc_address);
4314 if (rval == QLA_SUCCESS) {
4315 ql_dbg(ql_dbg_init, vha, 0x00c9,
4316 "Verifying Checksum of loaded RISC code.\n");
4317
4318 rval = qla2x00_verify_checksum(vha, srisc_address);
4319 if (rval == QLA_SUCCESS) {
4320 /* Start firmware execution. */
4321 ql_dbg(ql_dbg_init, vha, 0x00ca,
4322 "Starting firmware.\n");
4323
4324 if (ql2xexlogins)
4325 ha->flags.exlogins_enabled = 1;
4326
4327 if (qla_is_exch_offld_enabled(vha))
4328 ha->flags.exchoffld_enabled = 1;
4329
4330 rval = qla2x00_execute_fw(vha, srisc_address);
4331 /* Retrieve firmware information. */
4332 if (rval == QLA_SUCCESS) {
4333 /* Enable BPM support? */
4334 if (!done_once++ && qla24xx_detect_sfp(vha)) {
4335 ql_dbg(ql_dbg_init, vha, 0x00ca,
4336 "Re-starting firmware -- BPM.\n");
4337 /* Best-effort - re-init. */
4338 ha->isp_ops->reset_chip(vha);
4339 ha->isp_ops->chip_diag(vha);
4340 goto execute_fw_with_lr;
4341 }
4342
4343 if (IS_ZIO_THRESHOLD_CAPABLE(ha))
4344 qla27xx_set_zio_threshold(vha,
4345 ha->last_zio_threshold);
4346
4347 rval = qla2x00_set_exlogins_buffer(vha);
4348 if (rval != QLA_SUCCESS)
4349 goto failed;
4350
4351 rval = qla2x00_set_exchoffld_buffer(vha);
4352 if (rval != QLA_SUCCESS)
4353 goto failed;
4354
4355 enable_82xx_npiv:
4356 if (IS_P3P_TYPE(ha))
4357 qla82xx_check_md_needed(vha);
4358 else
4359 rval = qla2x00_get_fw_version(vha);
4360 if (rval != QLA_SUCCESS)
4361 goto failed;
4362 ha->flags.npiv_supported = 0;
4363 if (IS_QLA2XXX_MIDTYPE(ha) &&
4364 (ha->fw_attributes & BIT_2)) {
4365 ha->flags.npiv_supported = 1;
4366 if ((!ha->max_npiv_vports) ||
4367 ((ha->max_npiv_vports + 1) %
4368 MIN_MULTI_ID_FABRIC))
4369 ha->max_npiv_vports =
4370 MIN_MULTI_ID_FABRIC - 1;
4371 }
4372 qlt_config_nvram_with_fw_version(vha);
4373 qla2x00_get_resource_cnts(vha);
4374 qla_init_iocb_limit(vha);
4375
4376 /*
4377 * Allocate the array of outstanding commands
4378 * now that we know the firmware resources.
4379 */
4380 rval = qla2x00_alloc_outstanding_cmds(ha,
4381 vha->req);
4382 if (rval != QLA_SUCCESS)
4383 goto failed;
4384
4385 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
4386 qla2x00_alloc_fw_dump(vha);
4387
4388 qla_enable_fce_trace(vha);
4389 qla_enable_eft_trace(vha);
4390 } else {
4391 goto failed;
4392 }
4393 } else {
4394 ql_log(ql_log_fatal, vha, 0x00cd,
4395 "ISP Firmware failed checksum.\n");
4396 goto failed;
4397 }
4398
4399 /* Enable PUREX PASSTHRU */
4400 if (ql2xrdpenable || ha->flags.scm_supported_f ||
4401 ha->flags.edif_enabled)
4402 qla25xx_set_els_cmds_supported(vha);
4403 } else
4404 goto failed;
4405
4406 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
4407 /* Enable proper parity. */
4408 spin_lock_irqsave(&ha->hardware_lock, flags);
4409 if (IS_QLA2300(ha))
4410 /* SRAM parity */
4411 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x1);
4412 else
4413 /* SRAM, Instruction RAM and GP RAM parity */
4414 wrt_reg_word(®->hccr, HCCR_ENABLE_PARITY + 0x7);
4415 rd_reg_word(®->hccr);
4416 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4417 }
4418
4419 if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
4420 ha->flags.fac_supported = 1;
4421 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
4422 uint32_t size;
4423
4424 rval = qla81xx_fac_get_sector_size(vha, &size);
4425 if (rval == QLA_SUCCESS) {
4426 ha->flags.fac_supported = 1;
4427 ha->fdt_block_size = size << 2;
4428 } else {
4429 ql_log(ql_log_warn, vha, 0x00ce,
4430 "Unsupported FAC firmware (%d.%02d.%02d).\n",
4431 ha->fw_major_version, ha->fw_minor_version,
4432 ha->fw_subminor_version);
4433
4434 if (IS_QLA83XX(ha)) {
4435 ha->flags.fac_supported = 0;
4436 rval = QLA_SUCCESS;
4437 }
4438 }
4439 }
4440 failed:
4441 if (rval) {
4442 ql_log(ql_log_fatal, vha, 0x00cf,
4443 "Setup chip ****FAILED****.\n");
4444 }
4445
4446 return (rval);
4447 }
4448
4449 /**
4450 * qla2x00_init_response_q_entries() - Initializes response queue entries.
4451 * @rsp: response queue
4452 *
4453 * Beginning of request ring has initialization control block already built
4454 * by nvram config routine.
4455 *
4456 * Returns 0 on success.
4457 */
4458 void
qla2x00_init_response_q_entries(struct rsp_que * rsp)4459 qla2x00_init_response_q_entries(struct rsp_que *rsp)
4460 {
4461 uint16_t cnt;
4462 response_t *pkt;
4463
4464 rsp->ring_ptr = rsp->ring;
4465 rsp->ring_index = 0;
4466 rsp->status_srb = NULL;
4467 pkt = rsp->ring_ptr;
4468 for (cnt = 0; cnt < rsp->length; cnt++) {
4469 pkt->signature = RESPONSE_PROCESSED;
4470 pkt++;
4471 }
4472 }
4473
4474 /**
4475 * qla2x00_update_fw_options() - Read and process firmware options.
4476 * @vha: HA context
4477 *
4478 * Returns 0 on success.
4479 */
4480 void
qla2x00_update_fw_options(scsi_qla_host_t * vha)4481 qla2x00_update_fw_options(scsi_qla_host_t *vha)
4482 {
4483 uint16_t swing, emphasis, tx_sens, rx_sens;
4484 struct qla_hw_data *ha = vha->hw;
4485
4486 memset(ha->fw_options, 0, sizeof(ha->fw_options));
4487 qla2x00_get_fw_options(vha, ha->fw_options);
4488
4489 if (IS_QLA2100(ha) || IS_QLA2200(ha))
4490 return;
4491
4492 /* Serial Link options. */
4493 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
4494 "Serial link options.\n");
4495 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
4496 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
4497
4498 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
4499 if (ha->fw_seriallink_options[3] & BIT_2) {
4500 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
4501
4502 /* 1G settings */
4503 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
4504 emphasis = (ha->fw_seriallink_options[2] &
4505 (BIT_4 | BIT_3)) >> 3;
4506 tx_sens = ha->fw_seriallink_options[0] &
4507 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4508 rx_sens = (ha->fw_seriallink_options[0] &
4509 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4510 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
4511 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4512 if (rx_sens == 0x0)
4513 rx_sens = 0x3;
4514 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
4515 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4516 ha->fw_options[10] |= BIT_5 |
4517 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
4518 (tx_sens & (BIT_1 | BIT_0));
4519
4520 /* 2G settings */
4521 swing = (ha->fw_seriallink_options[2] &
4522 (BIT_7 | BIT_6 | BIT_5)) >> 5;
4523 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
4524 tx_sens = ha->fw_seriallink_options[1] &
4525 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4526 rx_sens = (ha->fw_seriallink_options[1] &
4527 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
4528 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
4529 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4530 if (rx_sens == 0x0)
4531 rx_sens = 0x3;
4532 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
4533 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
4534 ha->fw_options[11] |= BIT_5 |
4535 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
4536 (tx_sens & (BIT_1 | BIT_0));
4537 }
4538
4539 /* FCP2 options. */
4540 /* Return command IOCBs without waiting for an ABTS to complete. */
4541 ha->fw_options[3] |= BIT_13;
4542
4543 /* LED scheme. */
4544 if (ha->flags.enable_led_scheme)
4545 ha->fw_options[2] |= BIT_12;
4546
4547 /* Detect ISP6312. */
4548 if (IS_QLA6312(ha))
4549 ha->fw_options[2] |= BIT_13;
4550
4551 /* Set Retry FLOGI in case of P2P connection */
4552 if (ha->operating_mode == P2P) {
4553 ha->fw_options[2] |= BIT_3;
4554 ql_dbg(ql_dbg_disc, vha, 0x2100,
4555 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4556 __func__, ha->fw_options[2]);
4557 }
4558
4559 /* Update firmware options. */
4560 qla2x00_set_fw_options(vha, ha->fw_options);
4561 }
4562
4563 void
qla24xx_update_fw_options(scsi_qla_host_t * vha)4564 qla24xx_update_fw_options(scsi_qla_host_t *vha)
4565 {
4566 int rval;
4567 struct qla_hw_data *ha = vha->hw;
4568
4569 if (IS_P3P_TYPE(ha))
4570 return;
4571
4572 /* Hold status IOCBs until ABTS response received. */
4573 if (ql2xfwholdabts)
4574 ha->fw_options[3] |= BIT_12;
4575
4576 /* Set Retry FLOGI in case of P2P connection */
4577 if (ha->operating_mode == P2P) {
4578 ha->fw_options[2] |= BIT_3;
4579 ql_dbg(ql_dbg_disc, vha, 0x2101,
4580 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
4581 __func__, ha->fw_options[2]);
4582 }
4583
4584 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
4585 if (ql2xmvasynctoatio && !ha->flags.edif_enabled &&
4586 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
4587 if (qla_tgt_mode_enabled(vha) ||
4588 qla_dual_mode_enabled(vha))
4589 ha->fw_options[2] |= BIT_11;
4590 else
4591 ha->fw_options[2] &= ~BIT_11;
4592 }
4593
4594 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4595 IS_QLA28XX(ha)) {
4596 /*
4597 * Tell FW to track each exchange to prevent
4598 * driver from using stale exchange.
4599 */
4600 if (qla_tgt_mode_enabled(vha) ||
4601 qla_dual_mode_enabled(vha))
4602 ha->fw_options[2] |= BIT_4;
4603 else
4604 ha->fw_options[2] &= ~(BIT_4);
4605
4606 /* Reserve 1/2 of emergency exchanges for ELS.*/
4607 if (qla2xuseresexchforels)
4608 ha->fw_options[2] |= BIT_8;
4609 else
4610 ha->fw_options[2] &= ~BIT_8;
4611
4612 /*
4613 * N2N: set Secure=1 for PLOGI ACC and
4614 * fw shal not send PRLI after PLOGI Acc
4615 */
4616 if (ha->flags.edif_enabled &&
4617 DBELL_ACTIVE(vha)) {
4618 ha->fw_options[3] |= BIT_15;
4619 ha->flags.n2n_fw_acc_sec = 1;
4620 } else {
4621 ha->fw_options[3] &= ~BIT_15;
4622 ha->flags.n2n_fw_acc_sec = 0;
4623 }
4624 }
4625
4626 if (ql2xrdpenable || ha->flags.scm_supported_f ||
4627 ha->flags.edif_enabled)
4628 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB;
4629
4630 /* Enable Async 8130/8131 events -- transceiver insertion/removal */
4631 if (IS_BPM_RANGE_CAPABLE(ha))
4632 ha->fw_options[3] |= BIT_10;
4633
4634 ql_dbg(ql_dbg_init, vha, 0x00e8,
4635 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
4636 __func__, ha->fw_options[1], ha->fw_options[2],
4637 ha->fw_options[3], vha->host->active_mode);
4638
4639 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
4640 qla2x00_set_fw_options(vha, ha->fw_options);
4641
4642 /* Update Serial Link options. */
4643 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
4644 return;
4645
4646 rval = qla2x00_set_serdes_params(vha,
4647 le16_to_cpu(ha->fw_seriallink_options24[1]),
4648 le16_to_cpu(ha->fw_seriallink_options24[2]),
4649 le16_to_cpu(ha->fw_seriallink_options24[3]));
4650 if (rval != QLA_SUCCESS) {
4651 ql_log(ql_log_warn, vha, 0x0104,
4652 "Unable to update Serial Link options (%x).\n", rval);
4653 }
4654 }
4655
4656 void
qla2x00_config_rings(struct scsi_qla_host * vha)4657 qla2x00_config_rings(struct scsi_qla_host *vha)
4658 {
4659 struct qla_hw_data *ha = vha->hw;
4660 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4661 struct req_que *req = ha->req_q_map[0];
4662 struct rsp_que *rsp = ha->rsp_q_map[0];
4663
4664 /* Setup ring parameters in initialization control block. */
4665 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
4666 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
4667 ha->init_cb->request_q_length = cpu_to_le16(req->length);
4668 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
4669 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
4670 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
4671
4672 wrt_reg_word(ISP_REQ_Q_IN(ha, reg), 0);
4673 wrt_reg_word(ISP_REQ_Q_OUT(ha, reg), 0);
4674 wrt_reg_word(ISP_RSP_Q_IN(ha, reg), 0);
4675 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), 0);
4676 rd_reg_word(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
4677 }
4678
4679 void
qla24xx_config_rings(struct scsi_qla_host * vha)4680 qla24xx_config_rings(struct scsi_qla_host *vha)
4681 {
4682 struct qla_hw_data *ha = vha->hw;
4683 device_reg_t *reg = ISP_QUE_REG(ha, 0);
4684 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
4685 struct qla_msix_entry *msix;
4686 struct init_cb_24xx *icb;
4687 uint16_t rid = 0;
4688 struct req_que *req = ha->req_q_map[0];
4689 struct rsp_que *rsp = ha->rsp_q_map[0];
4690
4691 /* Setup ring parameters in initialization control block. */
4692 icb = (struct init_cb_24xx *)ha->init_cb;
4693 icb->request_q_outpointer = cpu_to_le16(0);
4694 icb->response_q_inpointer = cpu_to_le16(0);
4695 icb->request_q_length = cpu_to_le16(req->length);
4696 icb->response_q_length = cpu_to_le16(rsp->length);
4697 put_unaligned_le64(req->dma, &icb->request_q_address);
4698 put_unaligned_le64(rsp->dma, &icb->response_q_address);
4699
4700 /* Setup ATIO queue dma pointers for target mode */
4701 icb->atio_q_inpointer = cpu_to_le16(0);
4702 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
4703 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
4704
4705 if (IS_SHADOW_REG_CAPABLE(ha))
4706 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
4707
4708 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4709 IS_QLA28XX(ha)) {
4710 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
4711 icb->rid = cpu_to_le16(rid);
4712 if (ha->flags.msix_enabled) {
4713 msix = &ha->msix_entries[1];
4714 ql_dbg(ql_dbg_init, vha, 0x0019,
4715 "Registering vector 0x%x for base que.\n",
4716 msix->entry);
4717 icb->msix = cpu_to_le16(msix->entry);
4718 }
4719 /* Use alternate PCI bus number */
4720 if (MSB(rid))
4721 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
4722 /* Use alternate PCI devfn */
4723 if (LSB(rid))
4724 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
4725
4726 /* Use Disable MSIX Handshake mode for capable adapters */
4727 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
4728 (ha->flags.msix_enabled)) {
4729 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
4730 ha->flags.disable_msix_handshake = 1;
4731 ql_dbg(ql_dbg_init, vha, 0x00fe,
4732 "MSIX Handshake Disable Mode turned on.\n");
4733 } else {
4734 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
4735 }
4736 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
4737
4738 wrt_reg_dword(®->isp25mq.req_q_in, 0);
4739 wrt_reg_dword(®->isp25mq.req_q_out, 0);
4740 wrt_reg_dword(®->isp25mq.rsp_q_in, 0);
4741 wrt_reg_dword(®->isp25mq.rsp_q_out, 0);
4742 } else {
4743 wrt_reg_dword(®->isp24.req_q_in, 0);
4744 wrt_reg_dword(®->isp24.req_q_out, 0);
4745 wrt_reg_dword(®->isp24.rsp_q_in, 0);
4746 wrt_reg_dword(®->isp24.rsp_q_out, 0);
4747 }
4748
4749 qlt_24xx_config_rings(vha);
4750
4751 /* If the user has configured the speed, set it here */
4752 if (ha->set_data_rate) {
4753 ql_dbg(ql_dbg_init, vha, 0x00fd,
4754 "Speed set by user : %s Gbps \n",
4755 qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4756 icb->firmware_options_3 = cpu_to_le32(ha->set_data_rate << 13);
4757 }
4758
4759 /* PCI posting */
4760 rd_reg_word(&ioreg->hccr);
4761 }
4762
4763 /**
4764 * qla2x00_init_rings() - Initializes firmware.
4765 * @vha: HA context
4766 *
4767 * Beginning of request ring has initialization control block already built
4768 * by nvram config routine.
4769 *
4770 * Returns 0 on success.
4771 */
4772 int
qla2x00_init_rings(scsi_qla_host_t * vha)4773 qla2x00_init_rings(scsi_qla_host_t *vha)
4774 {
4775 int rval;
4776 unsigned long flags = 0;
4777 int cnt, que;
4778 struct qla_hw_data *ha = vha->hw;
4779 struct req_que *req;
4780 struct rsp_que *rsp;
4781 struct mid_init_cb_24xx *mid_init_cb =
4782 (struct mid_init_cb_24xx *) ha->init_cb;
4783
4784 spin_lock_irqsave(&ha->hardware_lock, flags);
4785
4786 /* Clear outstanding commands array. */
4787 for (que = 0; que < ha->max_req_queues; que++) {
4788 req = ha->req_q_map[que];
4789 if (!req || !test_bit(que, ha->req_qid_map))
4790 continue;
4791 req->out_ptr = (uint16_t *)(req->ring + req->length);
4792 *req->out_ptr = 0;
4793 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4794 req->outstanding_cmds[cnt] = NULL;
4795
4796 req->current_outstanding_cmd = 1;
4797
4798 /* Initialize firmware. */
4799 req->ring_ptr = req->ring;
4800 req->ring_index = 0;
4801 req->cnt = req->length;
4802 }
4803
4804 for (que = 0; que < ha->max_rsp_queues; que++) {
4805 rsp = ha->rsp_q_map[que];
4806 if (!rsp || !test_bit(que, ha->rsp_qid_map))
4807 continue;
4808 rsp->in_ptr = (uint16_t *)(rsp->ring + rsp->length);
4809 *rsp->in_ptr = 0;
4810 /* Initialize response queue entries */
4811 if (IS_QLAFX00(ha))
4812 qlafx00_init_response_q_entries(rsp);
4813 else
4814 qla2x00_init_response_q_entries(rsp);
4815 }
4816
4817 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4818 ha->tgt.atio_ring_index = 0;
4819 /* Initialize ATIO queue entries */
4820 qlt_init_atio_q_entries(vha);
4821
4822 ha->isp_ops->config_rings(vha);
4823
4824 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4825
4826 if (IS_QLAFX00(ha)) {
4827 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4828 goto next_check;
4829 }
4830
4831 /* Update any ISP specific firmware options before initialization. */
4832 ha->isp_ops->update_fw_options(vha);
4833
4834 ql_dbg(ql_dbg_init, vha, 0x00d1,
4835 "Issue init firmware FW opt 1-3= %08x %08x %08x.\n",
4836 le32_to_cpu(mid_init_cb->init_cb.firmware_options_1),
4837 le32_to_cpu(mid_init_cb->init_cb.firmware_options_2),
4838 le32_to_cpu(mid_init_cb->init_cb.firmware_options_3));
4839
4840 if (ha->flags.npiv_supported) {
4841 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4842 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4843 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4844 }
4845
4846 if (IS_FWI2_CAPABLE(ha)) {
4847 mid_init_cb->options = cpu_to_le16(BIT_1);
4848 mid_init_cb->init_cb.execution_throttle =
4849 cpu_to_le16(ha->cur_fw_xcb_count);
4850 ha->flags.dport_enabled =
4851 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4852 BIT_7) != 0;
4853 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4854 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4855 /* FA-WWPN Status */
4856 ha->flags.fawwpn_enabled =
4857 (le32_to_cpu(mid_init_cb->init_cb.firmware_options_1) &
4858 BIT_6) != 0;
4859 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4860 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4861 /* Init_cb will be reused for other command(s). Save a backup copy of port_name */
4862 memcpy(ha->port_name, ha->init_cb->port_name, WWN_SIZE);
4863 }
4864
4865 /* ELS pass through payload is limit by frame size. */
4866 if (ha->flags.edif_enabled)
4867 mid_init_cb->init_cb.frame_payload_size = cpu_to_le16(ELS_MAX_PAYLOAD);
4868
4869 QLA_FW_STARTED(ha);
4870 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4871 next_check:
4872 if (rval) {
4873 QLA_FW_STOPPED(ha);
4874 ql_log(ql_log_fatal, vha, 0x00d2,
4875 "Init Firmware **** FAILED ****.\n");
4876 } else {
4877 ql_dbg(ql_dbg_init, vha, 0x00d3,
4878 "Init Firmware -- success.\n");
4879 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4880 }
4881
4882 return (rval);
4883 }
4884
4885 /**
4886 * qla2x00_fw_ready() - Waits for firmware ready.
4887 * @vha: HA context
4888 *
4889 * Returns 0 on success.
4890 */
4891 static int
qla2x00_fw_ready(scsi_qla_host_t * vha)4892 qla2x00_fw_ready(scsi_qla_host_t *vha)
4893 {
4894 int rval;
4895 unsigned long wtime, mtime, cs84xx_time;
4896 uint16_t min_wait; /* Minimum wait time if loop is down */
4897 uint16_t wait_time; /* Wait time if loop is coming ready */
4898 uint16_t state[6];
4899 struct qla_hw_data *ha = vha->hw;
4900
4901 if (IS_QLAFX00(vha->hw))
4902 return qlafx00_fw_ready(vha);
4903
4904 /* Time to wait for loop down */
4905 if (IS_P3P_TYPE(ha))
4906 min_wait = 30;
4907 else
4908 min_wait = 20;
4909
4910 /*
4911 * Firmware should take at most one RATOV to login, plus 5 seconds for
4912 * our own processing.
4913 */
4914 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4915 wait_time = min_wait;
4916 }
4917
4918 /* Min wait time if loop down */
4919 mtime = jiffies + (min_wait * HZ);
4920
4921 /* wait time before firmware ready */
4922 wtime = jiffies + (wait_time * HZ);
4923
4924 /* Wait for ISP to finish LIP */
4925 if (!vha->flags.init_done)
4926 ql_log(ql_log_info, vha, 0x801e,
4927 "Waiting for LIP to complete.\n");
4928
4929 do {
4930 memset(state, -1, sizeof(state));
4931 rval = qla2x00_get_firmware_state(vha, state);
4932 if (rval == QLA_SUCCESS) {
4933 if (state[0] < FSTATE_LOSS_OF_SYNC) {
4934 vha->device_flags &= ~DFLG_NO_CABLE;
4935 }
4936 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4937 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4938 "fw_state=%x 84xx=%x.\n", state[0],
4939 state[2]);
4940 if ((state[2] & FSTATE_LOGGED_IN) &&
4941 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4942 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4943 "Sending verify iocb.\n");
4944
4945 cs84xx_time = jiffies;
4946 rval = qla84xx_init_chip(vha);
4947 if (rval != QLA_SUCCESS) {
4948 ql_log(ql_log_warn,
4949 vha, 0x8007,
4950 "Init chip failed.\n");
4951 break;
4952 }
4953
4954 /* Add time taken to initialize. */
4955 cs84xx_time = jiffies - cs84xx_time;
4956 wtime += cs84xx_time;
4957 mtime += cs84xx_time;
4958 ql_dbg(ql_dbg_taskm, vha, 0x8008,
4959 "Increasing wait time by %ld. "
4960 "New time %ld.\n", cs84xx_time,
4961 wtime);
4962 }
4963 } else if (state[0] == FSTATE_READY) {
4964 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4965 "F/W Ready - OK.\n");
4966
4967 qla2x00_get_retry_cnt(vha, &ha->retry_count,
4968 &ha->login_timeout, &ha->r_a_tov);
4969
4970 rval = QLA_SUCCESS;
4971 break;
4972 }
4973
4974 rval = QLA_FUNCTION_FAILED;
4975
4976 if (atomic_read(&vha->loop_down_timer) &&
4977 state[0] != FSTATE_READY) {
4978 /* Loop down. Timeout on min_wait for states
4979 * other than Wait for Login.
4980 */
4981 if (time_after_eq(jiffies, mtime)) {
4982 ql_log(ql_log_info, vha, 0x8038,
4983 "Cable is unplugged...\n");
4984
4985 vha->device_flags |= DFLG_NO_CABLE;
4986 break;
4987 }
4988 }
4989 } else {
4990 /* Mailbox cmd failed. Timeout on min_wait. */
4991 if (time_after_eq(jiffies, mtime) ||
4992 ha->flags.isp82xx_fw_hung)
4993 break;
4994 }
4995
4996 if (time_after_eq(jiffies, wtime))
4997 break;
4998
4999 /* Delay for a while */
5000 msleep(500);
5001 } while (1);
5002
5003 ql_dbg(ql_dbg_taskm, vha, 0x803a,
5004 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
5005 state[1], state[2], state[3], state[4], state[5], jiffies);
5006
5007 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
5008 ql_log(ql_log_warn, vha, 0x803b,
5009 "Firmware ready **** FAILED ****.\n");
5010 }
5011
5012 return (rval);
5013 }
5014
5015 /*
5016 * qla2x00_configure_hba
5017 * Setup adapter context.
5018 *
5019 * Input:
5020 * ha = adapter state pointer.
5021 *
5022 * Returns:
5023 * 0 = success
5024 *
5025 * Context:
5026 * Kernel context.
5027 */
5028 static int
qla2x00_configure_hba(scsi_qla_host_t * vha)5029 qla2x00_configure_hba(scsi_qla_host_t *vha)
5030 {
5031 int rval;
5032 uint16_t loop_id;
5033 uint16_t topo;
5034 uint16_t sw_cap;
5035 uint8_t al_pa;
5036 uint8_t area;
5037 uint8_t domain;
5038 char connect_type[22];
5039 struct qla_hw_data *ha = vha->hw;
5040 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5041 port_id_t id;
5042 unsigned long flags;
5043
5044 /* Get host addresses. */
5045 rval = qla2x00_get_adapter_id(vha,
5046 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
5047 if (rval != QLA_SUCCESS) {
5048 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
5049 IS_CNA_CAPABLE(ha) ||
5050 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
5051 ql_dbg(ql_dbg_disc, vha, 0x2008,
5052 "Loop is in a transition state.\n");
5053 } else {
5054 ql_log(ql_log_warn, vha, 0x2009,
5055 "Unable to get host loop ID.\n");
5056 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
5057 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
5058 ql_log(ql_log_warn, vha, 0x1151,
5059 "Doing link init.\n");
5060 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
5061 return rval;
5062 }
5063 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
5064 }
5065 return (rval);
5066 }
5067
5068 if (topo == 4) {
5069 ql_log(ql_log_info, vha, 0x200a,
5070 "Cannot get topology - retrying.\n");
5071 return (QLA_FUNCTION_FAILED);
5072 }
5073
5074 vha->loop_id = loop_id;
5075
5076 /* initialize */
5077 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
5078 ha->operating_mode = LOOP;
5079
5080 switch (topo) {
5081 case 0:
5082 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
5083 ha->switch_cap = 0;
5084 ha->current_topology = ISP_CFG_NL;
5085 strcpy(connect_type, "(Loop)");
5086 break;
5087
5088 case 1:
5089 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
5090 ha->switch_cap = sw_cap;
5091 ha->current_topology = ISP_CFG_FL;
5092 strcpy(connect_type, "(FL_Port)");
5093 break;
5094
5095 case 2:
5096 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
5097 ha->switch_cap = 0;
5098 ha->operating_mode = P2P;
5099 ha->current_topology = ISP_CFG_N;
5100 strcpy(connect_type, "(N_Port-to-N_Port)");
5101 break;
5102
5103 case 3:
5104 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
5105 ha->switch_cap = sw_cap;
5106 ha->operating_mode = P2P;
5107 ha->current_topology = ISP_CFG_F;
5108 strcpy(connect_type, "(F_Port)");
5109 break;
5110
5111 default:
5112 ql_dbg(ql_dbg_disc, vha, 0x200f,
5113 "HBA in unknown topology %x, using NL.\n", topo);
5114 ha->switch_cap = 0;
5115 ha->current_topology = ISP_CFG_NL;
5116 strcpy(connect_type, "(Loop)");
5117 break;
5118 }
5119
5120 /* Save Host port and loop ID. */
5121 /* byte order - Big Endian */
5122 id.b.domain = domain;
5123 id.b.area = area;
5124 id.b.al_pa = al_pa;
5125 id.b.rsvd_1 = 0;
5126 spin_lock_irqsave(&ha->hardware_lock, flags);
5127 if (vha->hw->flags.edif_enabled) {
5128 if (topo != 2)
5129 qla_update_host_map(vha, id);
5130 } else if (!(topo == 2 && ha->flags.n2n_bigger))
5131 qla_update_host_map(vha, id);
5132 spin_unlock_irqrestore(&ha->hardware_lock, flags);
5133
5134 if (!vha->flags.init_done)
5135 ql_log(ql_log_info, vha, 0x2010,
5136 "Topology - %s, Host Loop address 0x%x.\n",
5137 connect_type, vha->loop_id);
5138
5139 return(rval);
5140 }
5141
5142 inline void
qla2x00_set_model_info(scsi_qla_host_t * vha,uint8_t * model,size_t len,const char * def)5143 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
5144 const char *def)
5145 {
5146 char *st, *en;
5147 uint16_t index;
5148 uint64_t zero[2] = { 0 };
5149 struct qla_hw_data *ha = vha->hw;
5150 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
5151 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
5152
5153 if (len > sizeof(zero))
5154 len = sizeof(zero);
5155 if (memcmp(model, &zero, len) != 0) {
5156 memcpy(ha->model_number, model, len);
5157 st = en = ha->model_number;
5158 en += len - 1;
5159 while (en > st) {
5160 if (*en != 0x20 && *en != 0x00)
5161 break;
5162 *en-- = '\0';
5163 }
5164
5165 index = (ha->pdev->subsystem_device & 0xff);
5166 if (use_tbl &&
5167 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5168 index < QLA_MODEL_NAMES)
5169 strscpy(ha->model_desc,
5170 qla2x00_model_name[index * 2 + 1],
5171 sizeof(ha->model_desc));
5172 } else {
5173 index = (ha->pdev->subsystem_device & 0xff);
5174 if (use_tbl &&
5175 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
5176 index < QLA_MODEL_NAMES) {
5177 strscpy(ha->model_number,
5178 qla2x00_model_name[index * 2],
5179 sizeof(ha->model_number));
5180 strscpy(ha->model_desc,
5181 qla2x00_model_name[index * 2 + 1],
5182 sizeof(ha->model_desc));
5183 } else {
5184 strscpy(ha->model_number, def,
5185 sizeof(ha->model_number));
5186 }
5187 }
5188 if (IS_FWI2_CAPABLE(ha))
5189 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
5190 sizeof(ha->model_desc));
5191 }
5192
5193 /* On sparc systems, obtain port and node WWN from firmware
5194 * properties.
5195 */
qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,nvram_t * nv)5196 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
5197 {
5198 #ifdef CONFIG_SPARC
5199 struct qla_hw_data *ha = vha->hw;
5200 struct pci_dev *pdev = ha->pdev;
5201 struct device_node *dp = pci_device_to_OF_node(pdev);
5202 const u8 *val;
5203 int len;
5204
5205 val = of_get_property(dp, "port-wwn", &len);
5206 if (val && len >= WWN_SIZE)
5207 memcpy(nv->port_name, val, WWN_SIZE);
5208
5209 val = of_get_property(dp, "node-wwn", &len);
5210 if (val && len >= WWN_SIZE)
5211 memcpy(nv->node_name, val, WWN_SIZE);
5212 #endif
5213 }
5214
5215 /*
5216 * NVRAM configuration for ISP 2xxx
5217 *
5218 * Input:
5219 * ha = adapter block pointer.
5220 *
5221 * Output:
5222 * initialization control block in response_ring
5223 * host adapters parameters in host adapter block
5224 *
5225 * Returns:
5226 * 0 = success.
5227 */
5228 int
qla2x00_nvram_config(scsi_qla_host_t * vha)5229 qla2x00_nvram_config(scsi_qla_host_t *vha)
5230 {
5231 int rval;
5232 uint8_t chksum = 0;
5233 uint16_t cnt;
5234 uint8_t *dptr1, *dptr2;
5235 struct qla_hw_data *ha = vha->hw;
5236 init_cb_t *icb = ha->init_cb;
5237 nvram_t *nv = ha->nvram;
5238 uint8_t *ptr = ha->nvram;
5239 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5240
5241 rval = QLA_SUCCESS;
5242
5243 /* Determine NVRAM starting address. */
5244 ha->nvram_size = sizeof(*nv);
5245 ha->nvram_base = 0;
5246 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
5247 if ((rd_reg_word(®->ctrl_status) >> 14) == 1)
5248 ha->nvram_base = 0x80;
5249
5250 /* Get NVRAM data and calculate checksum. */
5251 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
5252 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
5253 chksum += *ptr++;
5254
5255 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
5256 "Contents of NVRAM.\n");
5257 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
5258 nv, ha->nvram_size);
5259
5260 /* Bad NVRAM data, set defaults parameters. */
5261 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
5262 nv->nvram_version < 1) {
5263 /* Reset NVRAM data. */
5264 ql_log(ql_log_warn, vha, 0x0064,
5265 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
5266 chksum, nv->id, nv->nvram_version);
5267 ql_log(ql_log_warn, vha, 0x0065,
5268 "Falling back to "
5269 "functioning (yet invalid -- WWPN) defaults.\n");
5270
5271 /*
5272 * Set default initialization control block.
5273 */
5274 memset(nv, 0, ha->nvram_size);
5275 nv->parameter_block_version = ICB_VERSION;
5276
5277 if (IS_QLA23XX(ha)) {
5278 nv->firmware_options[0] = BIT_2 | BIT_1;
5279 nv->firmware_options[1] = BIT_7 | BIT_5;
5280 nv->add_firmware_options[0] = BIT_5;
5281 nv->add_firmware_options[1] = BIT_5 | BIT_4;
5282 nv->frame_payload_size = cpu_to_le16(2048);
5283 nv->special_options[1] = BIT_7;
5284 } else if (IS_QLA2200(ha)) {
5285 nv->firmware_options[0] = BIT_2 | BIT_1;
5286 nv->firmware_options[1] = BIT_7 | BIT_5;
5287 nv->add_firmware_options[0] = BIT_5;
5288 nv->add_firmware_options[1] = BIT_5 | BIT_4;
5289 nv->frame_payload_size = cpu_to_le16(1024);
5290 } else if (IS_QLA2100(ha)) {
5291 nv->firmware_options[0] = BIT_3 | BIT_1;
5292 nv->firmware_options[1] = BIT_5;
5293 nv->frame_payload_size = cpu_to_le16(1024);
5294 }
5295
5296 nv->max_iocb_allocation = cpu_to_le16(256);
5297 nv->execution_throttle = cpu_to_le16(16);
5298 nv->retry_count = 8;
5299 nv->retry_delay = 1;
5300
5301 nv->port_name[0] = 33;
5302 nv->port_name[3] = 224;
5303 nv->port_name[4] = 139;
5304
5305 qla2xxx_nvram_wwn_from_ofw(vha, nv);
5306
5307 nv->login_timeout = 4;
5308
5309 /*
5310 * Set default host adapter parameters
5311 */
5312 nv->host_p[1] = BIT_2;
5313 nv->reset_delay = 5;
5314 nv->port_down_retry_count = 8;
5315 nv->max_luns_per_target = cpu_to_le16(8);
5316 nv->link_down_timeout = 60;
5317
5318 rval = 1;
5319 }
5320
5321 /* Reset Initialization control block */
5322 memset(icb, 0, ha->init_cb_size);
5323
5324 /*
5325 * Setup driver NVRAM options.
5326 */
5327 nv->firmware_options[0] |= (BIT_6 | BIT_1);
5328 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
5329 nv->firmware_options[1] |= (BIT_5 | BIT_0);
5330 nv->firmware_options[1] &= ~BIT_4;
5331
5332 if (IS_QLA23XX(ha)) {
5333 nv->firmware_options[0] |= BIT_2;
5334 nv->firmware_options[0] &= ~BIT_3;
5335 nv->special_options[0] &= ~BIT_6;
5336 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
5337
5338 if (IS_QLA2300(ha)) {
5339 if (ha->fb_rev == FPM_2310) {
5340 strcpy(ha->model_number, "QLA2310");
5341 } else {
5342 strcpy(ha->model_number, "QLA2300");
5343 }
5344 } else {
5345 qla2x00_set_model_info(vha, nv->model_number,
5346 sizeof(nv->model_number), "QLA23xx");
5347 }
5348 } else if (IS_QLA2200(ha)) {
5349 nv->firmware_options[0] |= BIT_2;
5350 /*
5351 * 'Point-to-point preferred, else loop' is not a safe
5352 * connection mode setting.
5353 */
5354 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
5355 (BIT_5 | BIT_4)) {
5356 /* Force 'loop preferred, else point-to-point'. */
5357 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
5358 nv->add_firmware_options[0] |= BIT_5;
5359 }
5360 strcpy(ha->model_number, "QLA22xx");
5361 } else /*if (IS_QLA2100(ha))*/ {
5362 strcpy(ha->model_number, "QLA2100");
5363 }
5364
5365 /*
5366 * Copy over NVRAM RISC parameter block to initialization control block.
5367 */
5368 dptr1 = (uint8_t *)icb;
5369 dptr2 = (uint8_t *)&nv->parameter_block_version;
5370 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
5371 while (cnt--)
5372 *dptr1++ = *dptr2++;
5373
5374 /* Copy 2nd half. */
5375 dptr1 = (uint8_t *)icb->add_firmware_options;
5376 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
5377 while (cnt--)
5378 *dptr1++ = *dptr2++;
5379 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
5380 /* Use alternate WWN? */
5381 if (nv->host_p[1] & BIT_7) {
5382 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5383 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5384 }
5385
5386 /* Prepare nodename */
5387 if ((icb->firmware_options[1] & BIT_6) == 0) {
5388 /*
5389 * Firmware will apply the following mask if the nodename was
5390 * not provided.
5391 */
5392 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5393 icb->node_name[0] &= 0xF0;
5394 }
5395
5396 /*
5397 * Set host adapter parameters.
5398 */
5399
5400 /*
5401 * BIT_7 in the host-parameters section allows for modification to
5402 * internal driver logging.
5403 */
5404 if (nv->host_p[0] & BIT_7)
5405 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
5406 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
5407 /* Always load RISC code on non ISP2[12]00 chips. */
5408 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
5409 ha->flags.disable_risc_code_load = 0;
5410 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
5411 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
5412 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
5413 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
5414 ha->flags.disable_serdes = 0;
5415
5416 ha->operating_mode =
5417 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
5418
5419 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
5420 sizeof(ha->fw_seriallink_options));
5421
5422 /* save HBA serial number */
5423 ha->serial0 = icb->port_name[5];
5424 ha->serial1 = icb->port_name[6];
5425 ha->serial2 = icb->port_name[7];
5426 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5427 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5428
5429 icb->execution_throttle = cpu_to_le16(0xFFFF);
5430
5431 ha->retry_count = nv->retry_count;
5432
5433 /* Set minimum login_timeout to 4 seconds. */
5434 if (nv->login_timeout != ql2xlogintimeout)
5435 nv->login_timeout = ql2xlogintimeout;
5436 if (nv->login_timeout < 4)
5437 nv->login_timeout = 4;
5438 ha->login_timeout = nv->login_timeout;
5439
5440 /* Set minimum RATOV to 100 tenths of a second. */
5441 ha->r_a_tov = 100;
5442
5443 ha->loop_reset_delay = nv->reset_delay;
5444
5445 /* Link Down Timeout = 0:
5446 *
5447 * When Port Down timer expires we will start returning
5448 * I/O's to OS with "DID_NO_CONNECT".
5449 *
5450 * Link Down Timeout != 0:
5451 *
5452 * The driver waits for the link to come up after link down
5453 * before returning I/Os to OS with "DID_NO_CONNECT".
5454 */
5455 if (nv->link_down_timeout == 0) {
5456 ha->loop_down_abort_time =
5457 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5458 } else {
5459 ha->link_down_timeout = nv->link_down_timeout;
5460 ha->loop_down_abort_time =
5461 (LOOP_DOWN_TIME - ha->link_down_timeout);
5462 }
5463
5464 /*
5465 * Need enough time to try and get the port back.
5466 */
5467 ha->port_down_retry_count = nv->port_down_retry_count;
5468 if (qlport_down_retry)
5469 ha->port_down_retry_count = qlport_down_retry;
5470 /* Set login_retry_count */
5471 ha->login_retry_count = nv->retry_count;
5472 if (ha->port_down_retry_count == nv->port_down_retry_count &&
5473 ha->port_down_retry_count > 3)
5474 ha->login_retry_count = ha->port_down_retry_count;
5475 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5476 ha->login_retry_count = ha->port_down_retry_count;
5477 if (ql2xloginretrycount)
5478 ha->login_retry_count = ql2xloginretrycount;
5479
5480 icb->lun_enables = cpu_to_le16(0);
5481 icb->command_resource_count = 0;
5482 icb->immediate_notify_resource_count = 0;
5483 icb->timeout = cpu_to_le16(0);
5484
5485 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5486 /* Enable RIO */
5487 icb->firmware_options[0] &= ~BIT_3;
5488 icb->add_firmware_options[0] &=
5489 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5490 icb->add_firmware_options[0] |= BIT_2;
5491 icb->response_accumulation_timer = 3;
5492 icb->interrupt_delay_timer = 5;
5493
5494 vha->flags.process_response_queue = 1;
5495 } else {
5496 /* Enable ZIO. */
5497 if (!vha->flags.init_done) {
5498 ha->zio_mode = icb->add_firmware_options[0] &
5499 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5500 ha->zio_timer = icb->interrupt_delay_timer ?
5501 icb->interrupt_delay_timer : 2;
5502 }
5503 icb->add_firmware_options[0] &=
5504 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
5505 vha->flags.process_response_queue = 0;
5506 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5507 ha->zio_mode = QLA_ZIO_MODE_6;
5508
5509 ql_log(ql_log_info, vha, 0x0068,
5510 "ZIO mode %d enabled; timer delay (%d us).\n",
5511 ha->zio_mode, ha->zio_timer * 100);
5512
5513 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
5514 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
5515 vha->flags.process_response_queue = 1;
5516 }
5517 }
5518
5519 if (rval) {
5520 ql_log(ql_log_warn, vha, 0x0069,
5521 "NVRAM configuration failed.\n");
5522 }
5523 return (rval);
5524 }
5525
qla2x00_set_fcport_state(fc_port_t * fcport,int state)5526 void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
5527 {
5528 int old_state;
5529
5530 old_state = atomic_read(&fcport->state);
5531 atomic_set(&fcport->state, state);
5532
5533 /* Don't print state transitions during initial allocation of fcport */
5534 if (old_state && old_state != state) {
5535 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
5536 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
5537 fcport->port_name, port_state_str[old_state],
5538 port_state_str[state], fcport->d_id.b.domain,
5539 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5540 }
5541 }
5542
5543 /**
5544 * qla2x00_alloc_fcport() - Allocate a generic fcport.
5545 * @vha: HA context
5546 * @flags: allocation flags
5547 *
5548 * Returns a pointer to the allocated fcport, or NULL, if none available.
5549 */
5550 fc_port_t *
qla2x00_alloc_fcport(scsi_qla_host_t * vha,gfp_t flags)5551 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
5552 {
5553 fc_port_t *fcport;
5554
5555 fcport = kzalloc(sizeof(fc_port_t), flags);
5556 if (!fcport)
5557 return NULL;
5558
5559 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
5560 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
5561 flags);
5562 if (!fcport->ct_desc.ct_sns) {
5563 ql_log(ql_log_warn, vha, 0xd049,
5564 "Failed to allocate ct_sns request.\n");
5565 kfree(fcport);
5566 return NULL;
5567 }
5568
5569 /* Setup fcport template structure. */
5570 fcport->vha = vha;
5571 fcport->port_type = FCT_UNKNOWN;
5572 fcport->loop_id = FC_NO_LOOP_ID;
5573 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
5574 fcport->supported_classes = FC_COS_UNSPECIFIED;
5575 fcport->fp_speed = PORT_SPEED_UNKNOWN;
5576
5577 fcport->disc_state = DSC_DELETED;
5578 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
5579 fcport->deleted = QLA_SESS_DELETED;
5580 fcport->login_retry = vha->hw->login_retry_count;
5581 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5582 fcport->logout_on_delete = 1;
5583 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
5584 fcport->tgt_short_link_down_cnt = 0;
5585 fcport->dev_loss_tmo = 0;
5586
5587 if (!fcport->ct_desc.ct_sns) {
5588 ql_log(ql_log_warn, vha, 0xd049,
5589 "Failed to allocate ct_sns request.\n");
5590 kfree(fcport);
5591 return NULL;
5592 }
5593
5594 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
5595 INIT_WORK(&fcport->free_work, qlt_free_session_done);
5596 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
5597 INIT_LIST_HEAD(&fcport->gnl_entry);
5598 INIT_LIST_HEAD(&fcport->list);
5599 INIT_LIST_HEAD(&fcport->unsol_ctx_head);
5600
5601 INIT_LIST_HEAD(&fcport->sess_cmd_list);
5602 spin_lock_init(&fcport->sess_cmd_lock);
5603
5604 spin_lock_init(&fcport->edif.sa_list_lock);
5605 INIT_LIST_HEAD(&fcport->edif.tx_sa_list);
5606 INIT_LIST_HEAD(&fcport->edif.rx_sa_list);
5607
5608 spin_lock_init(&fcport->edif.indx_list_lock);
5609 INIT_LIST_HEAD(&fcport->edif.edif_indx_list);
5610
5611 return fcport;
5612 }
5613
5614 void
qla2x00_free_fcport(fc_port_t * fcport)5615 qla2x00_free_fcport(fc_port_t *fcport)
5616 {
5617 if (fcport->ct_desc.ct_sns) {
5618 dma_free_coherent(&fcport->vha->hw->pdev->dev,
5619 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
5620 fcport->ct_desc.ct_sns_dma);
5621
5622 fcport->ct_desc.ct_sns = NULL;
5623 }
5624
5625 qla_edif_flush_sa_ctl_lists(fcport);
5626 list_del(&fcport->list);
5627 qla2x00_clear_loop_id(fcport);
5628
5629 qla_edif_list_del(fcport);
5630
5631 kfree(fcport);
5632 }
5633
qla_get_login_template(scsi_qla_host_t * vha)5634 static void qla_get_login_template(scsi_qla_host_t *vha)
5635 {
5636 struct qla_hw_data *ha = vha->hw;
5637 int rval;
5638 u32 *bp, sz;
5639 __be32 *q;
5640
5641 memset(ha->init_cb, 0, ha->init_cb_size);
5642 sz = min_t(int, sizeof(struct fc_els_flogi), ha->init_cb_size);
5643 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
5644 ha->init_cb, sz);
5645 if (rval != QLA_SUCCESS) {
5646 ql_dbg(ql_dbg_init, vha, 0x00d1,
5647 "PLOGI ELS param read fail.\n");
5648 return;
5649 }
5650 q = (__be32 *)&ha->plogi_els_payld.fl_csp;
5651
5652 bp = (uint32_t *)ha->init_cb;
5653 cpu_to_be32_array(q, bp, sz / 4);
5654 ha->flags.plogi_template_valid = 1;
5655 }
5656
5657 /*
5658 * qla2x00_configure_loop
5659 * Updates Fibre Channel Device Database with what is actually on loop.
5660 *
5661 * Input:
5662 * ha = adapter block pointer.
5663 *
5664 * Returns:
5665 * 0 = success.
5666 * 1 = error.
5667 * 2 = database was full and device was not configured.
5668 */
5669 static int
qla2x00_configure_loop(scsi_qla_host_t * vha)5670 qla2x00_configure_loop(scsi_qla_host_t *vha)
5671 {
5672 int rval;
5673 unsigned long flags, save_flags;
5674 struct qla_hw_data *ha = vha->hw;
5675
5676 rval = QLA_SUCCESS;
5677
5678 /* Get Initiator ID */
5679 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
5680 rval = qla2x00_configure_hba(vha);
5681 if (rval != QLA_SUCCESS) {
5682 ql_dbg(ql_dbg_disc, vha, 0x2013,
5683 "Unable to configure HBA.\n");
5684 return (rval);
5685 }
5686 }
5687
5688 save_flags = flags = vha->dpc_flags;
5689 ql_dbg(ql_dbg_disc, vha, 0x2014,
5690 "Configure loop -- dpc flags = 0x%lx.\n", flags);
5691
5692 /*
5693 * If we have both an RSCN and PORT UPDATE pending then handle them
5694 * both at the same time.
5695 */
5696 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5697 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
5698
5699 qla2x00_get_data_rate(vha);
5700 qla_get_login_template(vha);
5701
5702 /* Determine what we need to do */
5703 if ((ha->current_topology == ISP_CFG_FL ||
5704 ha->current_topology == ISP_CFG_F) &&
5705 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
5706
5707 set_bit(RSCN_UPDATE, &flags);
5708 clear_bit(LOCAL_LOOP_UPDATE, &flags);
5709
5710 } else if (ha->current_topology == ISP_CFG_NL ||
5711 ha->current_topology == ISP_CFG_N) {
5712 clear_bit(RSCN_UPDATE, &flags);
5713 set_bit(LOCAL_LOOP_UPDATE, &flags);
5714 } else if (!vha->flags.online ||
5715 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
5716 set_bit(RSCN_UPDATE, &flags);
5717 set_bit(LOCAL_LOOP_UPDATE, &flags);
5718 }
5719
5720 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
5721 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5722 ql_dbg(ql_dbg_disc, vha, 0x2015,
5723 "Loop resync needed, failing.\n");
5724 rval = QLA_FUNCTION_FAILED;
5725 } else
5726 rval = qla2x00_configure_local_loop(vha);
5727 }
5728
5729 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
5730 if (LOOP_TRANSITION(vha)) {
5731 ql_dbg(ql_dbg_disc, vha, 0x2099,
5732 "Needs RSCN update and loop transition.\n");
5733 rval = QLA_FUNCTION_FAILED;
5734 }
5735 else
5736 rval = qla2x00_configure_fabric(vha);
5737 }
5738
5739 if (rval == QLA_SUCCESS) {
5740 if (atomic_read(&vha->loop_down_timer) ||
5741 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5742 rval = QLA_FUNCTION_FAILED;
5743 } else {
5744 atomic_set(&vha->loop_state, LOOP_READY);
5745 ql_dbg(ql_dbg_disc, vha, 0x2069,
5746 "LOOP READY.\n");
5747 ha->flags.fw_init_done = 1;
5748
5749 /*
5750 * use link up to wake up app to get ready for
5751 * authentication.
5752 */
5753 if (ha->flags.edif_enabled && DBELL_INACTIVE(vha))
5754 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP,
5755 ha->link_data_rate);
5756
5757 /*
5758 * Process any ATIO queue entries that came in
5759 * while we weren't online.
5760 */
5761 if (qla_tgt_mode_enabled(vha) ||
5762 qla_dual_mode_enabled(vha)) {
5763 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
5764 qlt_24xx_process_atio_queue(vha, 0);
5765 spin_unlock_irqrestore(&ha->tgt.atio_lock,
5766 flags);
5767 }
5768 }
5769 }
5770
5771 if (rval) {
5772 ql_dbg(ql_dbg_disc, vha, 0x206a,
5773 "%s *** FAILED ***.\n", __func__);
5774 } else {
5775 ql_dbg(ql_dbg_disc, vha, 0x206b,
5776 "%s: exiting normally. local port wwpn %8phN id %06x)\n",
5777 __func__, vha->port_name, vha->d_id.b24);
5778 }
5779
5780 /* Restore state if a resync event occurred during processing */
5781 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5782 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
5783 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5784 if (test_bit(RSCN_UPDATE, &save_flags)) {
5785 set_bit(RSCN_UPDATE, &vha->dpc_flags);
5786 }
5787 }
5788
5789 return (rval);
5790 }
5791
qla2x00_configure_n2n_loop(scsi_qla_host_t * vha)5792 static int qla2x00_configure_n2n_loop(scsi_qla_host_t *vha)
5793 {
5794 unsigned long flags;
5795 fc_port_t *fcport;
5796
5797 ql_dbg(ql_dbg_disc, vha, 0x206a, "%s %d.\n", __func__, __LINE__);
5798
5799 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags))
5800 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5801
5802 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5803 if (fcport->n2n_flag) {
5804 qla24xx_fcport_handle_login(vha, fcport);
5805 return QLA_SUCCESS;
5806 }
5807 }
5808
5809 spin_lock_irqsave(&vha->work_lock, flags);
5810 vha->scan.scan_retry++;
5811 spin_unlock_irqrestore(&vha->work_lock, flags);
5812
5813 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5814 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5815 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5816 }
5817 return QLA_FUNCTION_FAILED;
5818 }
5819
5820 static void
qla_reinitialize_link(scsi_qla_host_t * vha)5821 qla_reinitialize_link(scsi_qla_host_t *vha)
5822 {
5823 int rval;
5824
5825 atomic_set(&vha->loop_state, LOOP_DOWN);
5826 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
5827 rval = qla2x00_full_login_lip(vha);
5828 if (rval == QLA_SUCCESS) {
5829 ql_dbg(ql_dbg_disc, vha, 0xd050, "Link reinitialized\n");
5830 } else {
5831 ql_dbg(ql_dbg_disc, vha, 0xd051,
5832 "Link reinitialization failed (%d)\n", rval);
5833 }
5834 }
5835
5836 /*
5837 * qla2x00_configure_local_loop
5838 * Updates Fibre Channel Device Database with local loop devices.
5839 *
5840 * Input:
5841 * ha = adapter block pointer.
5842 *
5843 * Returns:
5844 * 0 = success.
5845 */
5846 static int
qla2x00_configure_local_loop(scsi_qla_host_t * vha)5847 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5848 {
5849 int rval, rval2;
5850 int found;
5851 fc_port_t *fcport, *new_fcport;
5852 uint16_t index;
5853 uint16_t entries;
5854 struct gid_list_info *gid;
5855 uint16_t loop_id;
5856 uint8_t domain, area, al_pa;
5857 struct qla_hw_data *ha = vha->hw;
5858 unsigned long flags;
5859
5860 /* Inititae N2N login. */
5861 if (N2N_TOPO(ha))
5862 return qla2x00_configure_n2n_loop(vha);
5863
5864 new_fcport = NULL;
5865 entries = MAX_FIBRE_DEVICES_LOOP;
5866
5867 /* Get list of logged in devices. */
5868 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5869 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5870 &entries);
5871 if (rval != QLA_SUCCESS)
5872 goto err;
5873
5874 ql_dbg(ql_dbg_disc, vha, 0x2011,
5875 "Entries in ID list (%d).\n", entries);
5876 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5877 ha->gid_list, entries * sizeof(*ha->gid_list));
5878
5879 if (entries == 0) {
5880 spin_lock_irqsave(&vha->work_lock, flags);
5881 vha->scan.scan_retry++;
5882 spin_unlock_irqrestore(&vha->work_lock, flags);
5883
5884 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5885 u8 loop_map_entries = 0;
5886 int rc;
5887
5888 rc = qla2x00_get_fcal_position_map(vha, NULL,
5889 &loop_map_entries);
5890 if (rc == QLA_SUCCESS && loop_map_entries > 1) {
5891 /*
5892 * There are devices that are still not logged
5893 * in. Reinitialize to give them a chance.
5894 */
5895 qla_reinitialize_link(vha);
5896 return QLA_FUNCTION_FAILED;
5897 }
5898 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5899 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5900 }
5901 } else {
5902 vha->scan.scan_retry = 0;
5903 }
5904
5905 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5906 fcport->scan_state = QLA_FCPORT_SCAN;
5907 }
5908
5909 /* Allocate temporary fcport for any new fcports discovered. */
5910 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5911 if (new_fcport == NULL) {
5912 ql_log(ql_log_warn, vha, 0x2012,
5913 "Memory allocation failed for fcport.\n");
5914 rval = QLA_MEMORY_ALLOC_FAILED;
5915 goto err;
5916 }
5917 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5918
5919 /* Add devices to port list. */
5920 gid = ha->gid_list;
5921 for (index = 0; index < entries; index++) {
5922 domain = gid->domain;
5923 area = gid->area;
5924 al_pa = gid->al_pa;
5925 if (IS_QLA2100(ha) || IS_QLA2200(ha))
5926 loop_id = gid->loop_id_2100;
5927 else
5928 loop_id = le16_to_cpu(gid->loop_id);
5929 gid = (void *)gid + ha->gid_list_info_size;
5930
5931 /* Bypass reserved domain fields. */
5932 if ((domain & 0xf0) == 0xf0)
5933 continue;
5934
5935 /* Bypass if not same domain and area of adapter. */
5936 if (area && domain && ((area != vha->d_id.b.area) ||
5937 (domain != vha->d_id.b.domain)) &&
5938 (ha->current_topology == ISP_CFG_NL))
5939 continue;
5940
5941
5942 /* Bypass invalid local loop ID. */
5943 if (loop_id > LAST_LOCAL_LOOP_ID)
5944 continue;
5945
5946 memset(new_fcport->port_name, 0, WWN_SIZE);
5947
5948 /* Fill in member data. */
5949 new_fcport->d_id.b.domain = domain;
5950 new_fcport->d_id.b.area = area;
5951 new_fcport->d_id.b.al_pa = al_pa;
5952 new_fcport->loop_id = loop_id;
5953 new_fcport->scan_state = QLA_FCPORT_FOUND;
5954
5955 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5956 if (rval2 != QLA_SUCCESS) {
5957 ql_dbg(ql_dbg_disc, vha, 0x2097,
5958 "Failed to retrieve fcport information "
5959 "-- get_port_database=%x, loop_id=0x%04x.\n",
5960 rval2, new_fcport->loop_id);
5961 /* Skip retry if N2N */
5962 if (ha->current_topology != ISP_CFG_N) {
5963 ql_dbg(ql_dbg_disc, vha, 0x2105,
5964 "Scheduling resync.\n");
5965 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5966 continue;
5967 }
5968 }
5969
5970 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5971 /* Check for matching device in port list. */
5972 found = 0;
5973 fcport = NULL;
5974 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5975 if (memcmp(new_fcport->port_name, fcport->port_name,
5976 WWN_SIZE))
5977 continue;
5978
5979 fcport->flags &= ~FCF_FABRIC_DEVICE;
5980 fcport->loop_id = new_fcport->loop_id;
5981 fcport->port_type = new_fcport->port_type;
5982 fcport->d_id.b24 = new_fcport->d_id.b24;
5983 memcpy(fcport->node_name, new_fcport->node_name,
5984 WWN_SIZE);
5985 fcport->scan_state = QLA_FCPORT_FOUND;
5986 if (fcport->login_retry == 0) {
5987 fcport->login_retry = vha->hw->login_retry_count;
5988 ql_dbg(ql_dbg_disc, vha, 0x2135,
5989 "Port login retry %8phN, lid 0x%04x retry cnt=%d.\n",
5990 fcport->port_name, fcport->loop_id,
5991 fcport->login_retry);
5992 }
5993 found++;
5994 break;
5995 }
5996
5997 if (!found) {
5998 /* New device, add to fcports list. */
5999 list_add_tail(&new_fcport->list, &vha->vp_fcports);
6000
6001 /* Allocate a new replacement fcport. */
6002 fcport = new_fcport;
6003
6004 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6005
6006 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6007
6008 if (new_fcport == NULL) {
6009 ql_log(ql_log_warn, vha, 0xd031,
6010 "Failed to allocate memory for fcport.\n");
6011 rval = QLA_MEMORY_ALLOC_FAILED;
6012 goto err;
6013 }
6014 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
6015 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
6016 }
6017
6018 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6019
6020 /* Base iIDMA settings on HBA port speed. */
6021 fcport->fp_speed = ha->link_data_rate;
6022 }
6023
6024 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6025 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6026 break;
6027
6028 if (fcport->scan_state == QLA_FCPORT_SCAN) {
6029 if ((qla_dual_mode_enabled(vha) ||
6030 qla_ini_mode_enabled(vha)) &&
6031 atomic_read(&fcport->state) == FCS_ONLINE) {
6032 qla2x00_mark_device_lost(vha, fcport,
6033 ql2xplogiabsentdevice);
6034 if (fcport->loop_id != FC_NO_LOOP_ID &&
6035 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6036 fcport->port_type != FCT_INITIATOR &&
6037 fcport->port_type != FCT_BROADCAST) {
6038 ql_dbg(ql_dbg_disc, vha, 0x20f0,
6039 "%s %d %8phC post del sess\n",
6040 __func__, __LINE__,
6041 fcport->port_name);
6042
6043 qlt_schedule_sess_for_deletion(fcport);
6044 continue;
6045 }
6046 }
6047 }
6048
6049 if (fcport->scan_state == QLA_FCPORT_FOUND)
6050 qla24xx_fcport_handle_login(vha, fcport);
6051 }
6052
6053 qla2x00_free_fcport(new_fcport);
6054
6055 return rval;
6056
6057 err:
6058 ql_dbg(ql_dbg_disc, vha, 0x2098,
6059 "Configure local loop error exit: rval=%x.\n", rval);
6060 return rval;
6061 }
6062
6063 static void
qla2x00_iidma_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)6064 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
6065 {
6066 int rval;
6067 uint16_t mb[MAILBOX_REGISTER_COUNT];
6068 struct qla_hw_data *ha = vha->hw;
6069
6070 if (!IS_IIDMA_CAPABLE(ha))
6071 return;
6072
6073 if (atomic_read(&fcport->state) != FCS_ONLINE)
6074 return;
6075
6076 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
6077 fcport->fp_speed > ha->link_data_rate ||
6078 !ha->flags.gpsc_supported)
6079 return;
6080
6081 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
6082 mb);
6083 if (rval != QLA_SUCCESS) {
6084 ql_dbg(ql_dbg_disc, vha, 0x2004,
6085 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
6086 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
6087 } else {
6088 ql_dbg(ql_dbg_disc, vha, 0x2005,
6089 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
6090 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
6091 fcport->fp_speed, fcport->port_name);
6092 }
6093 }
6094
qla_do_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)6095 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
6096 {
6097 qla2x00_iidma_fcport(vha, fcport);
6098 qla24xx_update_fcport_fcp_prio(vha, fcport);
6099 }
6100
qla_post_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)6101 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
6102 {
6103 struct qla_work_evt *e;
6104
6105 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
6106 if (!e)
6107 return QLA_FUNCTION_FAILED;
6108
6109 e->u.fcport.fcport = fcport;
6110 return qla2x00_post_work(vha, e);
6111 }
6112
6113 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
6114 static void
qla2x00_reg_remote_port(scsi_qla_host_t * vha,fc_port_t * fcport)6115 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
6116 {
6117 struct fc_rport_identifiers rport_ids;
6118 struct fc_rport *rport;
6119 unsigned long flags;
6120
6121 if (atomic_read(&fcport->state) == FCS_ONLINE)
6122 return;
6123
6124 rport_ids.node_name = wwn_to_u64(fcport->node_name);
6125 rport_ids.port_name = wwn_to_u64(fcport->port_name);
6126 rport_ids.port_id = fcport->d_id.b.domain << 16 |
6127 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
6128 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
6129 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
6130 if (!rport) {
6131 ql_log(ql_log_warn, vha, 0x2006,
6132 "Unable to allocate fc remote port.\n");
6133 return;
6134 }
6135
6136 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
6137 *((fc_port_t **)rport->dd_data) = fcport;
6138 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
6139 fcport->dev_loss_tmo = rport->dev_loss_tmo;
6140
6141 rport->supported_classes = fcport->supported_classes;
6142
6143 rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
6144 if (fcport->port_type == FCT_INITIATOR)
6145 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
6146 if (fcport->port_type == FCT_TARGET)
6147 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
6148 if (fcport->port_type & FCT_NVME_INITIATOR)
6149 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
6150 if (fcport->port_type & FCT_NVME_TARGET)
6151 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
6152 if (fcport->port_type & FCT_NVME_DISCOVERY)
6153 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
6154
6155 fc_remote_port_rolechg(rport, rport_ids.roles);
6156
6157 ql_dbg(ql_dbg_disc, vha, 0x20ee,
6158 "%s: %8phN. rport %ld:0:%d (%p) is %s mode\n",
6159 __func__, fcport->port_name, vha->host_no,
6160 rport->scsi_target_id, rport,
6161 (fcport->port_type == FCT_TARGET) ? "tgt" :
6162 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
6163 }
6164
6165 /*
6166 * qla2x00_update_fcport
6167 * Updates device on list.
6168 *
6169 * Input:
6170 * ha = adapter block pointer.
6171 * fcport = port structure pointer.
6172 *
6173 * Return:
6174 * 0 - Success
6175 * BIT_0 - error
6176 *
6177 * Context:
6178 * Kernel context.
6179 */
6180 void
qla2x00_update_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)6181 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
6182 {
6183 unsigned long flags;
6184
6185 if (IS_SW_RESV_ADDR(fcport->d_id))
6186 return;
6187
6188 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
6189 __func__, fcport->port_name);
6190
6191 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
6192 fcport->login_retry = vha->hw->login_retry_count;
6193 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6194
6195 spin_lock_irqsave(&vha->work_lock, flags);
6196 fcport->deleted = 0;
6197 spin_unlock_irqrestore(&vha->work_lock, flags);
6198
6199 if (vha->hw->current_topology == ISP_CFG_NL)
6200 fcport->logout_on_delete = 0;
6201 else
6202 fcport->logout_on_delete = 1;
6203 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
6204
6205 if (fcport->tgt_link_down_time < fcport->dev_loss_tmo) {
6206 fcport->tgt_short_link_down_cnt++;
6207 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
6208 }
6209
6210 switch (vha->hw->current_topology) {
6211 case ISP_CFG_N:
6212 case ISP_CFG_NL:
6213 fcport->keep_nport_handle = 1;
6214 break;
6215 default:
6216 break;
6217 }
6218
6219 qla2x00_iidma_fcport(vha, fcport);
6220
6221 qla2x00_dfs_create_rport(vha, fcport);
6222
6223 qla24xx_update_fcport_fcp_prio(vha, fcport);
6224
6225 switch (vha->host->active_mode) {
6226 case MODE_INITIATOR:
6227 qla2x00_reg_remote_port(vha, fcport);
6228 break;
6229 case MODE_TARGET:
6230 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
6231 !vha->vha_tgt.qla_tgt->tgt_stopped)
6232 qlt_fc_port_added(vha, fcport);
6233 break;
6234 case MODE_DUAL:
6235 qla2x00_reg_remote_port(vha, fcport);
6236 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
6237 !vha->vha_tgt.qla_tgt->tgt_stopped)
6238 qlt_fc_port_added(vha, fcport);
6239 break;
6240 default:
6241 break;
6242 }
6243
6244 if (NVME_TARGET(vha->hw, fcport))
6245 qla_nvme_register_remote(vha, fcport);
6246
6247 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
6248
6249 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
6250 if (fcport->id_changed) {
6251 fcport->id_changed = 0;
6252 ql_dbg(ql_dbg_disc, vha, 0x20d7,
6253 "%s %d %8phC post gfpnid fcp_cnt %d\n",
6254 __func__, __LINE__, fcport->port_name,
6255 vha->fcport_count);
6256 qla24xx_post_gfpnid_work(vha, fcport);
6257 } else {
6258 ql_dbg(ql_dbg_disc, vha, 0x20d7,
6259 "%s %d %8phC post gpsc fcp_cnt %d\n",
6260 __func__, __LINE__, fcport->port_name,
6261 vha->fcport_count);
6262 qla24xx_post_gpsc_work(vha, fcport);
6263 }
6264 }
6265
6266 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
6267 }
6268
qla_register_fcport_fn(struct work_struct * work)6269 void qla_register_fcport_fn(struct work_struct *work)
6270 {
6271 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
6272 u32 rscn_gen = fcport->rscn_gen;
6273 u16 data[2];
6274
6275 if (IS_SW_RESV_ADDR(fcport->d_id))
6276 return;
6277
6278 qla2x00_update_fcport(fcport->vha, fcport);
6279
6280 ql_dbg(ql_dbg_disc, fcport->vha, 0x911e,
6281 "%s rscn gen %d/%d next DS %d\n", __func__,
6282 rscn_gen, fcport->rscn_gen, fcport->next_disc_state);
6283
6284 if (rscn_gen != fcport->rscn_gen) {
6285 /* RSCN(s) came in while registration */
6286 switch (fcport->next_disc_state) {
6287 case DSC_DELETE_PEND:
6288 qlt_schedule_sess_for_deletion(fcport);
6289 break;
6290 case DSC_ADISC:
6291 data[0] = data[1] = 0;
6292 qla2x00_post_async_adisc_work(fcport->vha, fcport,
6293 data);
6294 break;
6295 default:
6296 break;
6297 }
6298 }
6299 }
6300
6301 /*
6302 * qla2x00_configure_fabric
6303 * Setup SNS devices with loop ID's.
6304 *
6305 * Input:
6306 * ha = adapter block pointer.
6307 *
6308 * Returns:
6309 * 0 = success.
6310 * BIT_0 = error
6311 */
6312 static int
qla2x00_configure_fabric(scsi_qla_host_t * vha)6313 qla2x00_configure_fabric(scsi_qla_host_t *vha)
6314 {
6315 int rval;
6316 fc_port_t *fcport;
6317 uint16_t mb[MAILBOX_REGISTER_COUNT];
6318 uint16_t loop_id;
6319 struct qla_hw_data *ha = vha->hw;
6320 int discovery_gen;
6321
6322 /* If FL port exists, then SNS is present */
6323 if (IS_FWI2_CAPABLE(ha))
6324 loop_id = NPH_F_PORT;
6325 else
6326 loop_id = SNS_FL_PORT;
6327 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
6328 if (rval != QLA_SUCCESS) {
6329 ql_dbg(ql_dbg_disc, vha, 0x20a0,
6330 "MBX_GET_PORT_NAME failed, No FL Port.\n");
6331
6332 vha->device_flags &= ~SWITCH_FOUND;
6333 return (QLA_SUCCESS);
6334 }
6335 vha->device_flags |= SWITCH_FOUND;
6336
6337 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0);
6338 if (rval != QLA_SUCCESS)
6339 ql_dbg(ql_dbg_disc, vha, 0x20ff,
6340 "Failed to get Fabric Port Name\n");
6341
6342 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
6343 rval = qla2x00_send_change_request(vha, 0x3, 0);
6344 if (rval != QLA_SUCCESS)
6345 ql_log(ql_log_warn, vha, 0x121,
6346 "Failed to enable receiving of RSCN requests: 0x%x.\n",
6347 rval);
6348 }
6349
6350 do {
6351 qla2x00_mgmt_svr_login(vha);
6352
6353 /* Ensure we are logged into the SNS. */
6354 loop_id = NPH_SNS_LID(ha);
6355 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
6356 0xfc, mb, BIT_1|BIT_0);
6357 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
6358 ql_dbg(ql_dbg_disc, vha, 0x20a1,
6359 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
6360 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
6361 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6362 return rval;
6363 }
6364
6365 /* FDMI support. */
6366 if (ql2xfdmienable &&
6367 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
6368 qla2x00_fdmi_register(vha);
6369
6370 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
6371 if (qla2x00_rft_id(vha)) {
6372 /* EMPTY */
6373 ql_dbg(ql_dbg_disc, vha, 0x20a2,
6374 "Register FC-4 TYPE failed.\n");
6375 if (test_bit(LOOP_RESYNC_NEEDED,
6376 &vha->dpc_flags))
6377 break;
6378 }
6379 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
6380 /* EMPTY */
6381 ql_dbg(ql_dbg_disc, vha, 0x209a,
6382 "Register FC-4 Features failed.\n");
6383 if (test_bit(LOOP_RESYNC_NEEDED,
6384 &vha->dpc_flags))
6385 break;
6386 }
6387 if (vha->flags.nvme_enabled) {
6388 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
6389 ql_dbg(ql_dbg_disc, vha, 0x2049,
6390 "Register NVME FC Type Features failed.\n");
6391 }
6392 }
6393 if (qla2x00_rnn_id(vha)) {
6394 /* EMPTY */
6395 ql_dbg(ql_dbg_disc, vha, 0x2104,
6396 "Register Node Name failed.\n");
6397 if (test_bit(LOOP_RESYNC_NEEDED,
6398 &vha->dpc_flags))
6399 break;
6400 } else if (qla2x00_rsnn_nn(vha)) {
6401 /* EMPTY */
6402 ql_dbg(ql_dbg_disc, vha, 0x209b,
6403 "Register Symbolic Node Name failed.\n");
6404 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6405 break;
6406 }
6407 }
6408
6409
6410 /* Mark the time right before querying FW for connected ports.
6411 * This process is long, asynchronous and by the time it's done,
6412 * collected information might not be accurate anymore. E.g.
6413 * disconnected port might have re-connected and a brand new
6414 * session has been created. In this case session's generation
6415 * will be newer than discovery_gen. */
6416 qlt_do_generation_tick(vha, &discovery_gen);
6417
6418 if (USE_ASYNC_SCAN(ha)) {
6419 /* start of scan begins here */
6420 vha->scan.rscn_gen_end = atomic_read(&vha->rscn_gen);
6421 qla_fab_scan_start(vha);
6422 } else {
6423 list_for_each_entry(fcport, &vha->vp_fcports, list)
6424 fcport->scan_state = QLA_FCPORT_SCAN;
6425
6426 rval = qla2x00_find_all_fabric_devs(vha);
6427 }
6428 if (rval != QLA_SUCCESS)
6429 break;
6430 } while (0);
6431
6432 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
6433 qla_nvme_register_hba(vha);
6434
6435 if (rval)
6436 ql_dbg(ql_dbg_disc, vha, 0x2068,
6437 "Configure fabric error exit rval=%d.\n", rval);
6438
6439 return (rval);
6440 }
6441
6442 /*
6443 * qla2x00_find_all_fabric_devs
6444 *
6445 * Input:
6446 * ha = adapter block pointer.
6447 * dev = database device entry pointer.
6448 *
6449 * Returns:
6450 * 0 = success.
6451 *
6452 * Context:
6453 * Kernel context.
6454 */
6455 static int
qla2x00_find_all_fabric_devs(scsi_qla_host_t * vha)6456 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
6457 {
6458 int rval;
6459 uint16_t loop_id;
6460 fc_port_t *fcport, *new_fcport;
6461 int found;
6462
6463 sw_info_t *swl;
6464 int swl_idx;
6465 int first_dev, last_dev;
6466 port_id_t wrap = {}, nxt_d_id;
6467 struct qla_hw_data *ha = vha->hw;
6468 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6469 unsigned long flags;
6470
6471 rval = QLA_SUCCESS;
6472
6473 /* Try GID_PT to get device list, else GAN. */
6474 if (!ha->swl)
6475 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
6476 GFP_KERNEL);
6477 swl = ha->swl;
6478 if (!swl) {
6479 /*EMPTY*/
6480 ql_dbg(ql_dbg_disc, vha, 0x209c,
6481 "GID_PT allocations failed, fallback on GA_NXT.\n");
6482 } else {
6483 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
6484 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
6485 swl = NULL;
6486 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6487 return rval;
6488 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
6489 swl = NULL;
6490 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6491 return rval;
6492 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
6493 swl = NULL;
6494 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6495 return rval;
6496 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
6497 swl = NULL;
6498 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6499 return rval;
6500 }
6501
6502 /* If other queries succeeded probe for FC-4 type */
6503 if (swl) {
6504 qla2x00_gff_id(vha, swl);
6505 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6506 return rval;
6507 }
6508 }
6509 swl_idx = 0;
6510
6511 /* Allocate temporary fcport for any new fcports discovered. */
6512 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6513 if (new_fcport == NULL) {
6514 ql_log(ql_log_warn, vha, 0x209d,
6515 "Failed to allocate memory for fcport.\n");
6516 return (QLA_MEMORY_ALLOC_FAILED);
6517 }
6518 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6519 /* Set start port ID scan at adapter ID. */
6520 first_dev = 1;
6521 last_dev = 0;
6522
6523 /* Starting free loop ID. */
6524 loop_id = ha->min_external_loopid;
6525 for (; loop_id <= ha->max_loop_id; loop_id++) {
6526 if (qla2x00_is_reserved_id(vha, loop_id))
6527 continue;
6528
6529 if (ha->current_topology == ISP_CFG_FL &&
6530 (atomic_read(&vha->loop_down_timer) ||
6531 LOOP_TRANSITION(vha))) {
6532 atomic_set(&vha->loop_down_timer, 0);
6533 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6534 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
6535 break;
6536 }
6537
6538 if (swl != NULL) {
6539 if (last_dev) {
6540 wrap.b24 = new_fcport->d_id.b24;
6541 } else {
6542 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
6543 memcpy(new_fcport->node_name,
6544 swl[swl_idx].node_name, WWN_SIZE);
6545 memcpy(new_fcport->port_name,
6546 swl[swl_idx].port_name, WWN_SIZE);
6547 memcpy(new_fcport->fabric_port_name,
6548 swl[swl_idx].fabric_port_name, WWN_SIZE);
6549 new_fcport->fp_speed = swl[swl_idx].fp_speed;
6550 new_fcport->fc4_type = swl[swl_idx].fc4_type;
6551
6552 new_fcport->nvme_flag = 0;
6553 if (vha->flags.nvme_enabled &&
6554 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
6555 ql_log(ql_log_info, vha, 0x2131,
6556 "FOUND: NVME port %8phC as FC Type 28h\n",
6557 new_fcport->port_name);
6558 }
6559
6560 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
6561 last_dev = 1;
6562 }
6563 swl_idx++;
6564 }
6565 } else {
6566 /* Send GA_NXT to the switch */
6567 rval = qla2x00_ga_nxt(vha, new_fcport);
6568 if (rval != QLA_SUCCESS) {
6569 ql_log(ql_log_warn, vha, 0x209e,
6570 "SNS scan failed -- assuming "
6571 "zero-entry result.\n");
6572 rval = QLA_SUCCESS;
6573 break;
6574 }
6575 }
6576
6577 /* If wrap on switch device list, exit. */
6578 if (first_dev) {
6579 wrap.b24 = new_fcport->d_id.b24;
6580 first_dev = 0;
6581 } else if (new_fcport->d_id.b24 == wrap.b24) {
6582 ql_dbg(ql_dbg_disc, vha, 0x209f,
6583 "Device wrap (%02x%02x%02x).\n",
6584 new_fcport->d_id.b.domain,
6585 new_fcport->d_id.b.area,
6586 new_fcport->d_id.b.al_pa);
6587 break;
6588 }
6589
6590 /* Bypass if same physical adapter. */
6591 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
6592 continue;
6593
6594 /* Bypass virtual ports of the same host. */
6595 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
6596 continue;
6597
6598 /* Bypass if same domain and area of adapter. */
6599 if (((new_fcport->d_id.b24 & 0xffff00) ==
6600 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
6601 ISP_CFG_FL)
6602 continue;
6603
6604 /* Bypass reserved domain fields. */
6605 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
6606 continue;
6607
6608 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
6609 if (ql2xgffidenable &&
6610 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
6611 new_fcport->fc4_type != 0))
6612 continue;
6613
6614 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
6615
6616 /* Locate matching device in database. */
6617 found = 0;
6618 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6619 if (memcmp(new_fcport->port_name, fcport->port_name,
6620 WWN_SIZE))
6621 continue;
6622
6623 fcport->scan_state = QLA_FCPORT_FOUND;
6624
6625 found++;
6626
6627 /* Update port state. */
6628 memcpy(fcport->fabric_port_name,
6629 new_fcport->fabric_port_name, WWN_SIZE);
6630 fcport->fp_speed = new_fcport->fp_speed;
6631
6632 /*
6633 * If address the same and state FCS_ONLINE
6634 * (or in target mode), nothing changed.
6635 */
6636 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
6637 (atomic_read(&fcport->state) == FCS_ONLINE ||
6638 (vha->host->active_mode == MODE_TARGET))) {
6639 break;
6640 }
6641
6642 if (fcport->login_retry == 0)
6643 fcport->login_retry =
6644 vha->hw->login_retry_count;
6645 /*
6646 * If device was not a fabric device before.
6647 */
6648 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
6649 fcport->d_id.b24 = new_fcport->d_id.b24;
6650 qla2x00_clear_loop_id(fcport);
6651 fcport->flags |= (FCF_FABRIC_DEVICE |
6652 FCF_LOGIN_NEEDED);
6653 break;
6654 }
6655
6656 /*
6657 * Port ID changed or device was marked to be updated;
6658 * Log it out if still logged in and mark it for
6659 * relogin later.
6660 */
6661 if (qla_tgt_mode_enabled(base_vha)) {
6662 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
6663 "port changed FC ID, %8phC"
6664 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
6665 fcport->port_name,
6666 fcport->d_id.b.domain,
6667 fcport->d_id.b.area,
6668 fcport->d_id.b.al_pa,
6669 fcport->loop_id,
6670 new_fcport->d_id.b.domain,
6671 new_fcport->d_id.b.area,
6672 new_fcport->d_id.b.al_pa);
6673 fcport->d_id.b24 = new_fcport->d_id.b24;
6674 break;
6675 }
6676
6677 fcport->d_id.b24 = new_fcport->d_id.b24;
6678 fcport->flags |= FCF_LOGIN_NEEDED;
6679 break;
6680 }
6681
6682 if (found && NVME_TARGET(vha->hw, fcport)) {
6683 if (fcport->disc_state == DSC_DELETE_PEND) {
6684 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
6685 vha->fcport_count--;
6686 fcport->login_succ = 0;
6687 }
6688 }
6689
6690 if (found) {
6691 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6692 continue;
6693 }
6694 /* If device was not in our fcports list, then add it. */
6695 new_fcport->scan_state = QLA_FCPORT_FOUND;
6696 list_add_tail(&new_fcport->list, &vha->vp_fcports);
6697
6698 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
6699
6700
6701 /* Allocate a new replacement fcport. */
6702 nxt_d_id.b24 = new_fcport->d_id.b24;
6703 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
6704 if (new_fcport == NULL) {
6705 ql_log(ql_log_warn, vha, 0xd032,
6706 "Memory allocation failed for fcport.\n");
6707 return (QLA_MEMORY_ALLOC_FAILED);
6708 }
6709 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
6710 new_fcport->d_id.b24 = nxt_d_id.b24;
6711 }
6712
6713 qla2x00_free_fcport(new_fcport);
6714
6715 /*
6716 * Logout all previous fabric dev marked lost, except FCP2 devices.
6717 */
6718 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6719 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
6720 break;
6721
6722 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
6723 continue;
6724
6725 if (fcport->scan_state == QLA_FCPORT_SCAN) {
6726 if ((qla_dual_mode_enabled(vha) ||
6727 qla_ini_mode_enabled(vha)) &&
6728 atomic_read(&fcport->state) == FCS_ONLINE) {
6729 qla2x00_mark_device_lost(vha, fcport,
6730 ql2xplogiabsentdevice);
6731 if (fcport->loop_id != FC_NO_LOOP_ID &&
6732 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
6733 fcport->port_type != FCT_INITIATOR &&
6734 fcport->port_type != FCT_BROADCAST) {
6735 ql_dbg(ql_dbg_disc, vha, 0x20f0,
6736 "%s %d %8phC post del sess\n",
6737 __func__, __LINE__,
6738 fcport->port_name);
6739 qlt_schedule_sess_for_deletion(fcport);
6740 continue;
6741 }
6742 }
6743 }
6744
6745 if (fcport->scan_state == QLA_FCPORT_FOUND &&
6746 (fcport->flags & FCF_LOGIN_NEEDED) != 0)
6747 qla24xx_fcport_handle_login(vha, fcport);
6748 }
6749 return (rval);
6750 }
6751
6752 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */
6753 int
qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t * vha)6754 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
6755 {
6756 int loop_id = FC_NO_LOOP_ID;
6757 int lid = NPH_MGMT_SERVER - vha->vp_idx;
6758 unsigned long flags;
6759 struct qla_hw_data *ha = vha->hw;
6760
6761 if (vha->vp_idx == 0) {
6762 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
6763 return NPH_MGMT_SERVER;
6764 }
6765
6766 /* pick id from high and work down to low */
6767 spin_lock_irqsave(&ha->vport_slock, flags);
6768 for (; lid > 0; lid--) {
6769 if (!test_bit(lid, vha->hw->loop_id_map)) {
6770 set_bit(lid, vha->hw->loop_id_map);
6771 loop_id = lid;
6772 break;
6773 }
6774 }
6775 spin_unlock_irqrestore(&ha->vport_slock, flags);
6776
6777 return loop_id;
6778 }
6779
6780 /*
6781 * qla2x00_fabric_login
6782 * Issue fabric login command.
6783 *
6784 * Input:
6785 * ha = adapter block pointer.
6786 * device = pointer to FC device type structure.
6787 *
6788 * Returns:
6789 * 0 - Login successfully
6790 * 1 - Login failed
6791 * 2 - Initiator device
6792 * 3 - Fatal error
6793 */
6794 int
qla2x00_fabric_login(scsi_qla_host_t * vha,fc_port_t * fcport,uint16_t * next_loopid)6795 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
6796 uint16_t *next_loopid)
6797 {
6798 int rval;
6799 int retry;
6800 uint16_t tmp_loopid;
6801 uint16_t mb[MAILBOX_REGISTER_COUNT];
6802 struct qla_hw_data *ha = vha->hw;
6803
6804 retry = 0;
6805 tmp_loopid = 0;
6806
6807 for (;;) {
6808 ql_dbg(ql_dbg_disc, vha, 0x2000,
6809 "Trying Fabric Login w/loop id 0x%04x for port "
6810 "%02x%02x%02x.\n",
6811 fcport->loop_id, fcport->d_id.b.domain,
6812 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6813
6814 /* Login fcport on switch. */
6815 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
6816 fcport->d_id.b.domain, fcport->d_id.b.area,
6817 fcport->d_id.b.al_pa, mb, BIT_0);
6818 if (rval != QLA_SUCCESS) {
6819 return rval;
6820 }
6821 if (mb[0] == MBS_PORT_ID_USED) {
6822 /*
6823 * Device has another loop ID. The firmware team
6824 * recommends the driver perform an implicit login with
6825 * the specified ID again. The ID we just used is save
6826 * here so we return with an ID that can be tried by
6827 * the next login.
6828 */
6829 retry++;
6830 tmp_loopid = fcport->loop_id;
6831 fcport->loop_id = mb[1];
6832
6833 ql_dbg(ql_dbg_disc, vha, 0x2001,
6834 "Fabric Login: port in use - next loop "
6835 "id=0x%04x, port id= %02x%02x%02x.\n",
6836 fcport->loop_id, fcport->d_id.b.domain,
6837 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6838
6839 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
6840 /*
6841 * Login succeeded.
6842 */
6843 if (retry) {
6844 /* A retry occurred before. */
6845 *next_loopid = tmp_loopid;
6846 } else {
6847 /*
6848 * No retry occurred before. Just increment the
6849 * ID value for next login.
6850 */
6851 *next_loopid = (fcport->loop_id + 1);
6852 }
6853
6854 if (mb[1] & BIT_0) {
6855 fcport->port_type = FCT_INITIATOR;
6856 } else {
6857 fcport->port_type = FCT_TARGET;
6858 if (mb[1] & BIT_1) {
6859 fcport->flags |= FCF_FCP2_DEVICE;
6860 }
6861 }
6862
6863 if (mb[10] & BIT_0)
6864 fcport->supported_classes |= FC_COS_CLASS2;
6865 if (mb[10] & BIT_1)
6866 fcport->supported_classes |= FC_COS_CLASS3;
6867
6868 if (IS_FWI2_CAPABLE(ha)) {
6869 if (mb[10] & BIT_7)
6870 fcport->flags |=
6871 FCF_CONF_COMP_SUPPORTED;
6872 }
6873
6874 rval = QLA_SUCCESS;
6875 break;
6876 } else if (mb[0] == MBS_LOOP_ID_USED) {
6877 /*
6878 * Loop ID already used, try next loop ID.
6879 */
6880 fcport->loop_id++;
6881 rval = qla2x00_find_new_loop_id(vha, fcport);
6882 if (rval != QLA_SUCCESS) {
6883 /* Ran out of loop IDs to use */
6884 break;
6885 }
6886 } else if (mb[0] == MBS_COMMAND_ERROR) {
6887 /*
6888 * Firmware possibly timed out during login. If NO
6889 * retries are left to do then the device is declared
6890 * dead.
6891 */
6892 *next_loopid = fcport->loop_id;
6893 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6894 fcport->d_id.b.domain, fcport->d_id.b.area,
6895 fcport->d_id.b.al_pa);
6896 qla2x00_mark_device_lost(vha, fcport, 1);
6897
6898 rval = 1;
6899 break;
6900 } else {
6901 /*
6902 * unrecoverable / not handled error
6903 */
6904 ql_dbg(ql_dbg_disc, vha, 0x2002,
6905 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6906 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6907 fcport->d_id.b.area, fcport->d_id.b.al_pa,
6908 fcport->loop_id, jiffies);
6909
6910 *next_loopid = fcport->loop_id;
6911 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6912 fcport->d_id.b.domain, fcport->d_id.b.area,
6913 fcport->d_id.b.al_pa);
6914 qla2x00_clear_loop_id(fcport);
6915 fcport->login_retry = 0;
6916
6917 rval = 3;
6918 break;
6919 }
6920 }
6921
6922 return (rval);
6923 }
6924
6925 /*
6926 * qla2x00_local_device_login
6927 * Issue local device login command.
6928 *
6929 * Input:
6930 * ha = adapter block pointer.
6931 * loop_id = loop id of device to login to.
6932 *
6933 * Returns (Where's the #define!!!!):
6934 * 0 - Login successfully
6935 * 1 - Login failed
6936 * 3 - Fatal error
6937 */
6938 int
qla2x00_local_device_login(scsi_qla_host_t * vha,fc_port_t * fcport)6939 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6940 {
6941 int rval;
6942 uint16_t mb[MAILBOX_REGISTER_COUNT];
6943
6944 memset(mb, 0, sizeof(mb));
6945 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6946 if (rval == QLA_SUCCESS) {
6947 /* Interrogate mailbox registers for any errors */
6948 if (mb[0] == MBS_COMMAND_ERROR)
6949 rval = 1;
6950 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6951 /* device not in PCB table */
6952 rval = 3;
6953 }
6954
6955 return (rval);
6956 }
6957
6958 /*
6959 * qla2x00_loop_resync
6960 * Resync with fibre channel devices.
6961 *
6962 * Input:
6963 * ha = adapter block pointer.
6964 *
6965 * Returns:
6966 * 0 = success
6967 */
6968 int
qla2x00_loop_resync(scsi_qla_host_t * vha)6969 qla2x00_loop_resync(scsi_qla_host_t *vha)
6970 {
6971 int rval = QLA_SUCCESS;
6972 uint32_t wait_time;
6973
6974 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6975 if (vha->flags.online) {
6976 if (!(rval = qla2x00_fw_ready(vha))) {
6977 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6978 wait_time = 256;
6979 do {
6980 if (!IS_QLAFX00(vha->hw)) {
6981 /*
6982 * Issue a marker after FW becomes
6983 * ready.
6984 */
6985 qla2x00_marker(vha, vha->hw->base_qpair,
6986 0, 0, MK_SYNC_ALL);
6987 vha->marker_needed = 0;
6988 }
6989
6990 /* Remap devices on Loop. */
6991 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6992
6993 if (IS_QLAFX00(vha->hw))
6994 qlafx00_configure_devices(vha);
6995 else
6996 qla2x00_configure_loop(vha);
6997
6998 wait_time--;
6999 } while (!atomic_read(&vha->loop_down_timer) &&
7000 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
7001 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
7002 &vha->dpc_flags)));
7003 }
7004 }
7005
7006 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
7007 return (QLA_FUNCTION_FAILED);
7008
7009 if (rval)
7010 ql_dbg(ql_dbg_disc, vha, 0x206c,
7011 "%s *** FAILED ***.\n", __func__);
7012
7013 return (rval);
7014 }
7015
7016 /*
7017 * qla2x00_perform_loop_resync
7018 * Description: This function will set the appropriate flags and call
7019 * qla2x00_loop_resync. If successful loop will be resynced
7020 * Arguments : scsi_qla_host_t pointer
7021 * returm : Success or Failure
7022 */
7023
qla2x00_perform_loop_resync(scsi_qla_host_t * ha)7024 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
7025 {
7026 int32_t rval = 0;
7027
7028 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
7029 /*Configure the flags so that resync happens properly*/
7030 atomic_set(&ha->loop_down_timer, 0);
7031 if (!(ha->device_flags & DFLG_NO_CABLE)) {
7032 atomic_set(&ha->loop_state, LOOP_UP);
7033 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
7034 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
7035 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
7036
7037 rval = qla2x00_loop_resync(ha);
7038 } else
7039 atomic_set(&ha->loop_state, LOOP_DEAD);
7040
7041 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
7042 }
7043
7044 return rval;
7045 }
7046
7047 /* Assumes idc_lock always held on entry */
7048 void
qla83xx_reset_ownership(scsi_qla_host_t * vha)7049 qla83xx_reset_ownership(scsi_qla_host_t *vha)
7050 {
7051 struct qla_hw_data *ha = vha->hw;
7052 uint32_t drv_presence, drv_presence_mask;
7053 uint32_t dev_part_info1, dev_part_info2, class_type;
7054 uint32_t class_type_mask = 0x3;
7055 uint16_t fcoe_other_function = 0xffff, i;
7056
7057 if (IS_QLA8044(ha)) {
7058 drv_presence = qla8044_rd_direct(vha,
7059 QLA8044_CRB_DRV_ACTIVE_INDEX);
7060 dev_part_info1 = qla8044_rd_direct(vha,
7061 QLA8044_CRB_DEV_PART_INFO_INDEX);
7062 dev_part_info2 = qla8044_rd_direct(vha,
7063 QLA8044_CRB_DEV_PART_INFO2);
7064 } else {
7065 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
7066 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
7067 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
7068 }
7069 for (i = 0; i < 8; i++) {
7070 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
7071 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
7072 (i != ha->portnum)) {
7073 fcoe_other_function = i;
7074 break;
7075 }
7076 }
7077 if (fcoe_other_function == 0xffff) {
7078 for (i = 0; i < 8; i++) {
7079 class_type = ((dev_part_info2 >> (i * 4)) &
7080 class_type_mask);
7081 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
7082 ((i + 8) != ha->portnum)) {
7083 fcoe_other_function = i + 8;
7084 break;
7085 }
7086 }
7087 }
7088 /*
7089 * Prepare drv-presence mask based on fcoe functions present.
7090 * However consider only valid physical fcoe function numbers (0-15).
7091 */
7092 drv_presence_mask = ~((1 << (ha->portnum)) |
7093 ((fcoe_other_function == 0xffff) ?
7094 0 : (1 << (fcoe_other_function))));
7095
7096 /* We are the reset owner iff:
7097 * - No other protocol drivers present.
7098 * - This is the lowest among fcoe functions. */
7099 if (!(drv_presence & drv_presence_mask) &&
7100 (ha->portnum < fcoe_other_function)) {
7101 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
7102 "This host is Reset owner.\n");
7103 ha->flags.nic_core_reset_owner = 1;
7104 }
7105 }
7106
7107 static int
__qla83xx_set_drv_ack(scsi_qla_host_t * vha)7108 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
7109 {
7110 int rval = QLA_SUCCESS;
7111 struct qla_hw_data *ha = vha->hw;
7112 uint32_t drv_ack;
7113
7114 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
7115 if (rval == QLA_SUCCESS) {
7116 drv_ack |= (1 << ha->portnum);
7117 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
7118 }
7119
7120 return rval;
7121 }
7122
7123 static int
__qla83xx_clear_drv_ack(scsi_qla_host_t * vha)7124 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
7125 {
7126 int rval = QLA_SUCCESS;
7127 struct qla_hw_data *ha = vha->hw;
7128 uint32_t drv_ack;
7129
7130 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
7131 if (rval == QLA_SUCCESS) {
7132 drv_ack &= ~(1 << ha->portnum);
7133 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
7134 }
7135
7136 return rval;
7137 }
7138
7139 /* Assumes idc-lock always held on entry */
7140 void
qla83xx_idc_audit(scsi_qla_host_t * vha,int audit_type)7141 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
7142 {
7143 struct qla_hw_data *ha = vha->hw;
7144 uint32_t idc_audit_reg = 0, duration_secs = 0;
7145
7146 switch (audit_type) {
7147 case IDC_AUDIT_TIMESTAMP:
7148 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
7149 idc_audit_reg = (ha->portnum) |
7150 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
7151 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
7152 break;
7153
7154 case IDC_AUDIT_COMPLETION:
7155 duration_secs = ((jiffies_to_msecs(jiffies) -
7156 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
7157 idc_audit_reg = (ha->portnum) |
7158 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
7159 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
7160 break;
7161
7162 default:
7163 ql_log(ql_log_warn, vha, 0xb078,
7164 "Invalid audit type specified.\n");
7165 break;
7166 }
7167 }
7168
7169 /* Assumes idc_lock always held on entry */
7170 static int
qla83xx_initiating_reset(scsi_qla_host_t * vha)7171 qla83xx_initiating_reset(scsi_qla_host_t *vha)
7172 {
7173 struct qla_hw_data *ha = vha->hw;
7174 uint32_t idc_control, dev_state;
7175
7176 __qla83xx_get_idc_control(vha, &idc_control);
7177 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
7178 ql_log(ql_log_info, vha, 0xb080,
7179 "NIC Core reset has been disabled. idc-control=0x%x\n",
7180 idc_control);
7181 return QLA_FUNCTION_FAILED;
7182 }
7183
7184 /* Set NEED-RESET iff in READY state and we are the reset-owner */
7185 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
7186 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
7187 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
7188 QLA8XXX_DEV_NEED_RESET);
7189 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
7190 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
7191 } else {
7192 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n",
7193 qdev_state(dev_state));
7194
7195 /* SV: XXX: Is timeout required here? */
7196 /* Wait for IDC state change READY -> NEED_RESET */
7197 while (dev_state == QLA8XXX_DEV_READY) {
7198 qla83xx_idc_unlock(vha, 0);
7199 msleep(200);
7200 qla83xx_idc_lock(vha, 0);
7201 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
7202 }
7203 }
7204
7205 /* Send IDC ack by writing to drv-ack register */
7206 __qla83xx_set_drv_ack(vha);
7207
7208 return QLA_SUCCESS;
7209 }
7210
7211 int
__qla83xx_set_idc_control(scsi_qla_host_t * vha,uint32_t idc_control)7212 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
7213 {
7214 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
7215 }
7216
7217 int
__qla83xx_get_idc_control(scsi_qla_host_t * vha,uint32_t * idc_control)7218 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
7219 {
7220 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
7221 }
7222
7223 static int
qla83xx_check_driver_presence(scsi_qla_host_t * vha)7224 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
7225 {
7226 uint32_t drv_presence = 0;
7227 struct qla_hw_data *ha = vha->hw;
7228
7229 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
7230 if (drv_presence & (1 << ha->portnum))
7231 return QLA_SUCCESS;
7232 else
7233 return QLA_TEST_FAILED;
7234 }
7235
7236 int
qla83xx_nic_core_reset(scsi_qla_host_t * vha)7237 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
7238 {
7239 int rval = QLA_SUCCESS;
7240 struct qla_hw_data *ha = vha->hw;
7241
7242 ql_dbg(ql_dbg_p3p, vha, 0xb058,
7243 "Entered %s().\n", __func__);
7244
7245 if (vha->device_flags & DFLG_DEV_FAILED) {
7246 ql_log(ql_log_warn, vha, 0xb059,
7247 "Device in unrecoverable FAILED state.\n");
7248 return QLA_FUNCTION_FAILED;
7249 }
7250
7251 qla83xx_idc_lock(vha, 0);
7252
7253 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
7254 ql_log(ql_log_warn, vha, 0xb05a,
7255 "Function=0x%x has been removed from IDC participation.\n",
7256 ha->portnum);
7257 rval = QLA_FUNCTION_FAILED;
7258 goto exit;
7259 }
7260
7261 qla83xx_reset_ownership(vha);
7262
7263 rval = qla83xx_initiating_reset(vha);
7264
7265 /*
7266 * Perform reset if we are the reset-owner,
7267 * else wait till IDC state changes to READY/FAILED.
7268 */
7269 if (rval == QLA_SUCCESS) {
7270 rval = qla83xx_idc_state_handler(vha);
7271
7272 if (rval == QLA_SUCCESS)
7273 ha->flags.nic_core_hung = 0;
7274 __qla83xx_clear_drv_ack(vha);
7275 }
7276
7277 exit:
7278 qla83xx_idc_unlock(vha, 0);
7279
7280 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
7281
7282 return rval;
7283 }
7284
7285 int
qla2xxx_mctp_dump(scsi_qla_host_t * vha)7286 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
7287 {
7288 struct qla_hw_data *ha = vha->hw;
7289 int rval = QLA_FUNCTION_FAILED;
7290
7291 if (!IS_MCTP_CAPABLE(ha)) {
7292 /* This message can be removed from the final version */
7293 ql_log(ql_log_info, vha, 0x506d,
7294 "This board is not MCTP capable\n");
7295 return rval;
7296 }
7297
7298 if (!ha->mctp_dump) {
7299 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
7300 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
7301
7302 if (!ha->mctp_dump) {
7303 ql_log(ql_log_warn, vha, 0x506e,
7304 "Failed to allocate memory for mctp dump\n");
7305 return rval;
7306 }
7307 }
7308
7309 #define MCTP_DUMP_STR_ADDR 0x00000000
7310 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
7311 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
7312 if (rval != QLA_SUCCESS) {
7313 ql_log(ql_log_warn, vha, 0x506f,
7314 "Failed to capture mctp dump\n");
7315 } else {
7316 ql_log(ql_log_info, vha, 0x5070,
7317 "Mctp dump capture for host (%ld/%p).\n",
7318 vha->host_no, ha->mctp_dump);
7319 ha->mctp_dumped = 1;
7320 }
7321
7322 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
7323 ha->flags.nic_core_reset_hdlr_active = 1;
7324 rval = qla83xx_restart_nic_firmware(vha);
7325 if (rval)
7326 /* NIC Core reset failed. */
7327 ql_log(ql_log_warn, vha, 0x5071,
7328 "Failed to restart nic firmware\n");
7329 else
7330 ql_dbg(ql_dbg_p3p, vha, 0xb084,
7331 "Restarted NIC firmware successfully.\n");
7332 ha->flags.nic_core_reset_hdlr_active = 0;
7333 }
7334
7335 return rval;
7336
7337 }
7338
7339 /*
7340 * qla2x00_quiesce_io
7341 * Description: This function will block the new I/Os
7342 * Its not aborting any I/Os as context
7343 * is not destroyed during quiescence
7344 * Arguments: scsi_qla_host_t
7345 * return : void
7346 */
7347 void
qla2x00_quiesce_io(scsi_qla_host_t * vha)7348 qla2x00_quiesce_io(scsi_qla_host_t *vha)
7349 {
7350 struct qla_hw_data *ha = vha->hw;
7351 struct scsi_qla_host *vp, *tvp;
7352 unsigned long flags;
7353
7354 ql_dbg(ql_dbg_dpc, vha, 0x401d,
7355 "Quiescing I/O - ha=%p.\n", ha);
7356
7357 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
7358 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
7359 atomic_set(&vha->loop_state, LOOP_DOWN);
7360 qla2x00_mark_all_devices_lost(vha);
7361
7362 spin_lock_irqsave(&ha->vport_slock, flags);
7363 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7364 atomic_inc(&vp->vref_count);
7365 spin_unlock_irqrestore(&ha->vport_slock, flags);
7366
7367 qla2x00_mark_all_devices_lost(vp);
7368
7369 spin_lock_irqsave(&ha->vport_slock, flags);
7370 atomic_dec(&vp->vref_count);
7371 }
7372 spin_unlock_irqrestore(&ha->vport_slock, flags);
7373 } else {
7374 if (!atomic_read(&vha->loop_down_timer))
7375 atomic_set(&vha->loop_down_timer,
7376 LOOP_DOWN_TIME);
7377 }
7378 /* Wait for pending cmds to complete */
7379 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
7380 != QLA_SUCCESS);
7381 }
7382
7383 void
qla2x00_abort_isp_cleanup(scsi_qla_host_t * vha)7384 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
7385 {
7386 struct qla_hw_data *ha = vha->hw;
7387 struct scsi_qla_host *vp, *tvp;
7388 unsigned long flags;
7389 fc_port_t *fcport;
7390 u16 i;
7391
7392 /* For ISP82XX, driver waits for completion of the commands.
7393 * online flag should be set.
7394 */
7395 if (!(IS_P3P_TYPE(ha)))
7396 vha->flags.online = 0;
7397 ha->flags.chip_reset_done = 0;
7398 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
7399 vha->qla_stats.total_isp_aborts++;
7400
7401 ql_log(ql_log_info, vha, 0x00af,
7402 "Performing ISP error recovery - ha=%p.\n", ha);
7403
7404 ha->flags.purge_mbox = 1;
7405 /* For ISP82XX, reset_chip is just disabling interrupts.
7406 * Driver waits for the completion of the commands.
7407 * the interrupts need to be enabled.
7408 */
7409 if (!(IS_P3P_TYPE(ha)))
7410 ha->isp_ops->reset_chip(vha);
7411
7412 ha->link_data_rate = PORT_SPEED_UNKNOWN;
7413 SAVE_TOPO(ha);
7414 ha->flags.rida_fmt2 = 0;
7415 ha->flags.n2n_ae = 0;
7416 ha->flags.lip_ae = 0;
7417 ha->current_topology = 0;
7418 QLA_FW_STOPPED(ha);
7419 ha->flags.fw_init_done = 0;
7420 ha->chip_reset++;
7421 ha->base_qpair->chip_reset = ha->chip_reset;
7422 ha->base_qpair->cmd_cnt = ha->base_qpair->cmd_completion_cnt = 0;
7423 ha->base_qpair->prev_completion_cnt = 0;
7424 for (i = 0; i < ha->max_qpairs; i++) {
7425 if (ha->queue_pair_map[i]) {
7426 ha->queue_pair_map[i]->chip_reset =
7427 ha->base_qpair->chip_reset;
7428 ha->queue_pair_map[i]->cmd_cnt =
7429 ha->queue_pair_map[i]->cmd_completion_cnt = 0;
7430 ha->base_qpair->prev_completion_cnt = 0;
7431 }
7432 }
7433
7434 /* purge MBox commands */
7435 spin_lock_irqsave(&ha->hardware_lock, flags);
7436 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) {
7437 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
7438 complete(&ha->mbx_intr_comp);
7439 }
7440 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7441
7442 i = 0;
7443 while (atomic_read(&ha->num_pend_mbx_stage2) ||
7444 atomic_read(&ha->num_pend_mbx_stage1)) {
7445 msleep(20);
7446 i++;
7447 if (i > 50)
7448 break;
7449 }
7450 ha->flags.purge_mbox = 0;
7451
7452 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
7453 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
7454 atomic_set(&vha->loop_state, LOOP_DOWN);
7455 qla2x00_mark_all_devices_lost(vha);
7456
7457 spin_lock_irqsave(&ha->vport_slock, flags);
7458 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7459 atomic_inc(&vp->vref_count);
7460 spin_unlock_irqrestore(&ha->vport_slock, flags);
7461
7462 qla2x00_mark_all_devices_lost(vp);
7463
7464 spin_lock_irqsave(&ha->vport_slock, flags);
7465 atomic_dec(&vp->vref_count);
7466 }
7467 spin_unlock_irqrestore(&ha->vport_slock, flags);
7468 } else {
7469 if (!atomic_read(&vha->loop_down_timer))
7470 atomic_set(&vha->loop_down_timer,
7471 LOOP_DOWN_TIME);
7472 }
7473
7474 /* Clear all async request states across all VPs. */
7475 list_for_each_entry(fcport, &vha->vp_fcports, list) {
7476 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7477 fcport->scan_state = 0;
7478 }
7479 spin_lock_irqsave(&ha->vport_slock, flags);
7480 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7481 atomic_inc(&vp->vref_count);
7482 spin_unlock_irqrestore(&ha->vport_slock, flags);
7483
7484 list_for_each_entry(fcport, &vp->vp_fcports, list)
7485 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
7486
7487 spin_lock_irqsave(&ha->vport_slock, flags);
7488 atomic_dec(&vp->vref_count);
7489 }
7490 spin_unlock_irqrestore(&ha->vport_slock, flags);
7491
7492 /* Make sure for ISP 82XX IO DMA is complete */
7493 if (IS_P3P_TYPE(ha)) {
7494 qla82xx_chip_reset_cleanup(vha);
7495 ql_log(ql_log_info, vha, 0x00b4,
7496 "Done chip reset cleanup.\n");
7497
7498 /* Done waiting for pending commands. Reset online flag */
7499 vha->flags.online = 0;
7500 }
7501
7502 /* Requeue all commands in outstanding command list. */
7503 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
7504 /* memory barrier */
7505 wmb();
7506 }
7507
7508 /*
7509 * qla2x00_abort_isp
7510 * Resets ISP and aborts all outstanding commands.
7511 *
7512 * Input:
7513 * ha = adapter block pointer.
7514 *
7515 * Returns:
7516 * 0 = success
7517 */
7518 int
qla2x00_abort_isp(scsi_qla_host_t * vha)7519 qla2x00_abort_isp(scsi_qla_host_t *vha)
7520 {
7521 uint8_t status = 0;
7522 struct qla_hw_data *ha = vha->hw;
7523 struct scsi_qla_host *vp, *tvp;
7524 struct req_que *req = ha->req_q_map[0];
7525 unsigned long flags;
7526 fc_port_t *fcport;
7527
7528 if (vha->flags.online) {
7529 qla2x00_abort_isp_cleanup(vha);
7530
7531 vha->dport_status |= DPORT_DIAG_CHIP_RESET_IN_PROGRESS;
7532 vha->dport_status &= ~DPORT_DIAG_IN_PROGRESS;
7533
7534 if (vha->hw->flags.port_isolated)
7535 return status;
7536
7537 if (qla2x00_isp_reg_stat(ha)) {
7538 ql_log(ql_log_info, vha, 0x803f,
7539 "ISP Abort - ISP reg disconnect, exiting.\n");
7540 return status;
7541 }
7542
7543 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
7544 ha->flags.chip_reset_done = 1;
7545 vha->flags.online = 1;
7546 status = 0;
7547 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7548 return status;
7549 }
7550
7551 if (IS_QLA8031(ha)) {
7552 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
7553 "Clearing fcoe driver presence.\n");
7554 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
7555 ql_dbg(ql_dbg_p3p, vha, 0xb073,
7556 "Error while clearing DRV-Presence.\n");
7557 }
7558
7559 if (unlikely(pci_channel_offline(ha->pdev) &&
7560 ha->flags.pci_channel_io_perm_failure)) {
7561 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7562 status = 0;
7563 return status;
7564 }
7565
7566 switch (vha->qlini_mode) {
7567 case QLA2XXX_INI_MODE_DISABLED:
7568 if (!qla_tgt_mode_enabled(vha))
7569 return 0;
7570 break;
7571 case QLA2XXX_INI_MODE_DUAL:
7572 if (!qla_dual_mode_enabled(vha) &&
7573 !qla_ini_mode_enabled(vha))
7574 return 0;
7575 break;
7576 case QLA2XXX_INI_MODE_ENABLED:
7577 default:
7578 break;
7579 }
7580
7581 ha->isp_ops->get_flash_version(vha, req->ring);
7582
7583 if (qla2x00_isp_reg_stat(ha)) {
7584 ql_log(ql_log_info, vha, 0x803f,
7585 "ISP Abort - ISP reg disconnect pre nvram config, exiting.\n");
7586 return status;
7587 }
7588 ha->isp_ops->nvram_config(vha);
7589
7590 if (qla2x00_isp_reg_stat(ha)) {
7591 ql_log(ql_log_info, vha, 0x803f,
7592 "ISP Abort - ISP reg disconnect post nvmram config, exiting.\n");
7593 return status;
7594 }
7595
7596 /* User may have updated [fcp|nvme] prefer in flash */
7597 list_for_each_entry(fcport, &vha->vp_fcports, list) {
7598 if (NVME_PRIORITY(ha, fcport))
7599 fcport->do_prli_nvme = 1;
7600 else
7601 fcport->do_prli_nvme = 0;
7602 }
7603
7604 if (!qla2x00_restart_isp(vha)) {
7605 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7606
7607 if (!atomic_read(&vha->loop_down_timer)) {
7608 /*
7609 * Issue marker command only when we are going
7610 * to start the I/O .
7611 */
7612 vha->marker_needed = 1;
7613 }
7614
7615 vha->flags.online = 1;
7616
7617 ha->isp_ops->enable_intrs(ha);
7618
7619 ha->isp_abort_cnt = 0;
7620 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7621
7622 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
7623 qla2x00_get_fw_version(vha);
7624
7625 } else { /* failed the ISP abort */
7626 vha->flags.online = 1;
7627 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
7628 if (ha->isp_abort_cnt == 0) {
7629 ql_log(ql_log_fatal, vha, 0x8035,
7630 "ISP error recover failed - "
7631 "board disabled.\n");
7632 /*
7633 * The next call disables the board
7634 * completely.
7635 */
7636 qla2x00_abort_isp_cleanup(vha);
7637 vha->flags.online = 0;
7638 clear_bit(ISP_ABORT_RETRY,
7639 &vha->dpc_flags);
7640 status = 0;
7641 } else { /* schedule another ISP abort */
7642 ha->isp_abort_cnt--;
7643 ql_dbg(ql_dbg_taskm, vha, 0x8020,
7644 "ISP abort - retry remaining %d.\n",
7645 ha->isp_abort_cnt);
7646 status = 1;
7647 }
7648 } else {
7649 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7650 ql_dbg(ql_dbg_taskm, vha, 0x8021,
7651 "ISP error recovery - retrying (%d) "
7652 "more times.\n", ha->isp_abort_cnt);
7653 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7654 status = 1;
7655 }
7656 }
7657
7658 }
7659
7660 if (vha->hw->flags.port_isolated) {
7661 qla2x00_abort_isp_cleanup(vha);
7662 return status;
7663 }
7664
7665 if (!status) {
7666 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
7667 qla2x00_configure_hba(vha);
7668 spin_lock_irqsave(&ha->vport_slock, flags);
7669 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
7670 if (vp->vp_idx) {
7671 atomic_inc(&vp->vref_count);
7672 spin_unlock_irqrestore(&ha->vport_slock, flags);
7673
7674 /* User may have updated [fcp|nvme] prefer in flash */
7675 list_for_each_entry(fcport, &vp->vp_fcports, list) {
7676 if (NVME_PRIORITY(ha, fcport))
7677 fcport->do_prli_nvme = 1;
7678 else
7679 fcport->do_prli_nvme = 0;
7680 }
7681
7682 qla2x00_vp_abort_isp(vp);
7683
7684 spin_lock_irqsave(&ha->vport_slock, flags);
7685 atomic_dec(&vp->vref_count);
7686 }
7687 }
7688 spin_unlock_irqrestore(&ha->vport_slock, flags);
7689
7690 if (IS_QLA8031(ha)) {
7691 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
7692 "Setting back fcoe driver presence.\n");
7693 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
7694 ql_dbg(ql_dbg_p3p, vha, 0xb074,
7695 "Error while setting DRV-Presence.\n");
7696 }
7697 } else {
7698 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
7699 __func__);
7700 }
7701
7702 return(status);
7703 }
7704
7705 /*
7706 * qla2x00_restart_isp
7707 * restarts the ISP after a reset
7708 *
7709 * Input:
7710 * ha = adapter block pointer.
7711 *
7712 * Returns:
7713 * 0 = success
7714 */
7715 static int
qla2x00_restart_isp(scsi_qla_host_t * vha)7716 qla2x00_restart_isp(scsi_qla_host_t *vha)
7717 {
7718 int status;
7719 struct qla_hw_data *ha = vha->hw;
7720
7721 /* If firmware needs to be loaded */
7722 if (qla2x00_isp_firmware(vha)) {
7723 vha->flags.online = 0;
7724 status = ha->isp_ops->chip_diag(vha);
7725 if (status)
7726 return status;
7727 status = qla2x00_setup_chip(vha);
7728 if (status)
7729 return status;
7730 }
7731
7732 status = qla2x00_init_rings(vha);
7733 if (status)
7734 return status;
7735
7736 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7737 ha->flags.chip_reset_done = 1;
7738
7739 /* Initialize the queues in use */
7740 qla25xx_init_queues(ha);
7741
7742 status = qla2x00_fw_ready(vha);
7743 if (status) {
7744 /* if no cable then assume it's good */
7745 return vha->device_flags & DFLG_NO_CABLE ? 0 : status;
7746 }
7747
7748 /* Issue a marker after FW becomes ready. */
7749 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
7750 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7751
7752 return 0;
7753 }
7754
7755 static int
qla25xx_init_queues(struct qla_hw_data * ha)7756 qla25xx_init_queues(struct qla_hw_data *ha)
7757 {
7758 struct rsp_que *rsp = NULL;
7759 struct req_que *req = NULL;
7760 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7761 int ret = -1;
7762 int i;
7763
7764 for (i = 1; i < ha->max_rsp_queues; i++) {
7765 rsp = ha->rsp_q_map[i];
7766 if (rsp && test_bit(i, ha->rsp_qid_map)) {
7767 rsp->options &= ~BIT_0;
7768 ret = qla25xx_init_rsp_que(base_vha, rsp);
7769 if (ret != QLA_SUCCESS)
7770 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
7771 "%s Rsp que: %d init failed.\n",
7772 __func__, rsp->id);
7773 else
7774 ql_dbg(ql_dbg_init, base_vha, 0x0100,
7775 "%s Rsp que: %d inited.\n",
7776 __func__, rsp->id);
7777 }
7778 }
7779 for (i = 1; i < ha->max_req_queues; i++) {
7780 req = ha->req_q_map[i];
7781 if (req && test_bit(i, ha->req_qid_map)) {
7782 /* Clear outstanding commands array. */
7783 req->options &= ~BIT_0;
7784 ret = qla25xx_init_req_que(base_vha, req);
7785 if (ret != QLA_SUCCESS)
7786 ql_dbg(ql_dbg_init, base_vha, 0x0101,
7787 "%s Req que: %d init failed.\n",
7788 __func__, req->id);
7789 else
7790 ql_dbg(ql_dbg_init, base_vha, 0x0102,
7791 "%s Req que: %d inited.\n",
7792 __func__, req->id);
7793 }
7794 }
7795 return ret;
7796 }
7797
7798 /*
7799 * qla2x00_reset_adapter
7800 * Reset adapter.
7801 *
7802 * Input:
7803 * ha = adapter block pointer.
7804 */
7805 int
qla2x00_reset_adapter(scsi_qla_host_t * vha)7806 qla2x00_reset_adapter(scsi_qla_host_t *vha)
7807 {
7808 unsigned long flags = 0;
7809 struct qla_hw_data *ha = vha->hw;
7810 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7811
7812 vha->flags.online = 0;
7813 ha->isp_ops->disable_intrs(ha);
7814
7815 spin_lock_irqsave(&ha->hardware_lock, flags);
7816 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
7817 rd_reg_word(®->hccr); /* PCI Posting. */
7818 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC);
7819 rd_reg_word(®->hccr); /* PCI Posting. */
7820 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7821
7822 return QLA_SUCCESS;
7823 }
7824
7825 int
qla24xx_reset_adapter(scsi_qla_host_t * vha)7826 qla24xx_reset_adapter(scsi_qla_host_t *vha)
7827 {
7828 unsigned long flags = 0;
7829 struct qla_hw_data *ha = vha->hw;
7830 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7831
7832 if (IS_P3P_TYPE(ha))
7833 return QLA_SUCCESS;
7834
7835 vha->flags.online = 0;
7836 ha->isp_ops->disable_intrs(ha);
7837
7838 spin_lock_irqsave(&ha->hardware_lock, flags);
7839 wrt_reg_dword(®->hccr, HCCRX_SET_RISC_RESET);
7840 rd_reg_dword(®->hccr);
7841 wrt_reg_dword(®->hccr, HCCRX_REL_RISC_PAUSE);
7842 rd_reg_dword(®->hccr);
7843 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7844
7845 if (IS_NOPOLLING_TYPE(ha))
7846 ha->isp_ops->enable_intrs(ha);
7847
7848 return QLA_SUCCESS;
7849 }
7850
7851 /* On sparc systems, obtain port and node WWN from firmware
7852 * properties.
7853 */
qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,struct nvram_24xx * nv)7854 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7855 struct nvram_24xx *nv)
7856 {
7857 #ifdef CONFIG_SPARC
7858 struct qla_hw_data *ha = vha->hw;
7859 struct pci_dev *pdev = ha->pdev;
7860 struct device_node *dp = pci_device_to_OF_node(pdev);
7861 const u8 *val;
7862 int len;
7863
7864 val = of_get_property(dp, "port-wwn", &len);
7865 if (val && len >= WWN_SIZE)
7866 memcpy(nv->port_name, val, WWN_SIZE);
7867
7868 val = of_get_property(dp, "node-wwn", &len);
7869 if (val && len >= WWN_SIZE)
7870 memcpy(nv->node_name, val, WWN_SIZE);
7871 #endif
7872 }
7873
7874 int
qla24xx_nvram_config(scsi_qla_host_t * vha)7875 qla24xx_nvram_config(scsi_qla_host_t *vha)
7876 {
7877 int rval;
7878 struct init_cb_24xx *icb;
7879 struct nvram_24xx *nv;
7880 __le32 *dptr;
7881 uint8_t *dptr1, *dptr2;
7882 uint32_t chksum;
7883 uint16_t cnt;
7884 struct qla_hw_data *ha = vha->hw;
7885
7886 rval = QLA_SUCCESS;
7887 icb = (struct init_cb_24xx *)ha->init_cb;
7888 nv = ha->nvram;
7889
7890 /* Determine NVRAM starting address. */
7891 if (ha->port_no == 0) {
7892 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7893 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7894 } else {
7895 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7896 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7897 }
7898
7899 ha->nvram_size = sizeof(*nv);
7900 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7901
7902 /* Get VPD data into cache */
7903 ha->vpd = ha->nvram + VPD_OFFSET;
7904 ha->isp_ops->read_nvram(vha, ha->vpd,
7905 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7906
7907 /* Get NVRAM data into cache and calculate checksum. */
7908 dptr = (__force __le32 *)nv;
7909 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7910 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7911 chksum += le32_to_cpu(*dptr);
7912
7913 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7914 "Contents of NVRAM\n");
7915 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7916 nv, ha->nvram_size);
7917
7918 /* Bad NVRAM data, set defaults parameters. */
7919 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
7920 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7921 /* Reset NVRAM data. */
7922 ql_log(ql_log_warn, vha, 0x006b,
7923 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7924 chksum, nv->id, nv->nvram_version);
7925 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7926 ql_log(ql_log_warn, vha, 0x006c,
7927 "Falling back to functioning (yet invalid -- WWPN) "
7928 "defaults.\n");
7929
7930 /*
7931 * Set default initialization control block.
7932 */
7933 memset(nv, 0, ha->nvram_size);
7934 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7935 nv->version = cpu_to_le16(ICB_VERSION);
7936 nv->frame_payload_size = cpu_to_le16(2048);
7937 nv->execution_throttle = cpu_to_le16(0xFFFF);
7938 nv->exchange_count = cpu_to_le16(0);
7939 nv->hard_address = cpu_to_le16(124);
7940 nv->port_name[0] = 0x21;
7941 nv->port_name[1] = 0x00 + ha->port_no + 1;
7942 nv->port_name[2] = 0x00;
7943 nv->port_name[3] = 0xe0;
7944 nv->port_name[4] = 0x8b;
7945 nv->port_name[5] = 0x1c;
7946 nv->port_name[6] = 0x55;
7947 nv->port_name[7] = 0x86;
7948 nv->node_name[0] = 0x20;
7949 nv->node_name[1] = 0x00;
7950 nv->node_name[2] = 0x00;
7951 nv->node_name[3] = 0xe0;
7952 nv->node_name[4] = 0x8b;
7953 nv->node_name[5] = 0x1c;
7954 nv->node_name[6] = 0x55;
7955 nv->node_name[7] = 0x86;
7956 qla24xx_nvram_wwn_from_ofw(vha, nv);
7957 nv->login_retry_count = cpu_to_le16(8);
7958 nv->interrupt_delay_timer = cpu_to_le16(0);
7959 nv->login_timeout = cpu_to_le16(0);
7960 nv->firmware_options_1 =
7961 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7962 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7963 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7964 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7965 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7966 nv->efi_parameters = cpu_to_le32(0);
7967 nv->reset_delay = 5;
7968 nv->max_luns_per_target = cpu_to_le16(128);
7969 nv->port_down_retry_count = cpu_to_le16(30);
7970 nv->link_down_timeout = cpu_to_le16(30);
7971
7972 rval = 1;
7973 }
7974
7975 if (qla_tgt_mode_enabled(vha)) {
7976 /* Don't enable full login after initial LIP */
7977 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7978 /* Don't enable LIP full login for initiator */
7979 nv->host_p &= cpu_to_le32(~BIT_10);
7980 }
7981
7982 qlt_24xx_config_nvram_stage1(vha, nv);
7983
7984 /* Reset Initialization control block */
7985 memset(icb, 0, ha->init_cb_size);
7986
7987 /* Copy 1st segment. */
7988 dptr1 = (uint8_t *)icb;
7989 dptr2 = (uint8_t *)&nv->version;
7990 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7991 while (cnt--)
7992 *dptr1++ = *dptr2++;
7993
7994 icb->login_retry_count = nv->login_retry_count;
7995 icb->link_down_on_nos = nv->link_down_on_nos;
7996
7997 /* Copy 2nd segment. */
7998 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7999 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8000 cnt = (uint8_t *)&icb->reserved_3 -
8001 (uint8_t *)&icb->interrupt_delay_timer;
8002 while (cnt--)
8003 *dptr1++ = *dptr2++;
8004 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8005 /*
8006 * Setup driver NVRAM options.
8007 */
8008 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8009 "QLA2462");
8010
8011 qlt_24xx_config_nvram_stage2(vha, icb);
8012
8013 if (nv->host_p & cpu_to_le32(BIT_15)) {
8014 /* Use alternate WWN? */
8015 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8016 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8017 }
8018
8019 /* Prepare nodename */
8020 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8021 /*
8022 * Firmware will apply the following mask if the nodename was
8023 * not provided.
8024 */
8025 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8026 icb->node_name[0] &= 0xF0;
8027 }
8028
8029 /* Set host adapter parameters. */
8030 ha->flags.disable_risc_code_load = 0;
8031 ha->flags.enable_lip_reset = 0;
8032 ha->flags.enable_lip_full_login =
8033 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8034 ha->flags.enable_target_reset =
8035 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8036 ha->flags.enable_led_scheme = 0;
8037 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8038
8039 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8040 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8041
8042 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
8043 sizeof(ha->fw_seriallink_options24));
8044
8045 /* save HBA serial number */
8046 ha->serial0 = icb->port_name[5];
8047 ha->serial1 = icb->port_name[6];
8048 ha->serial2 = icb->port_name[7];
8049 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8050 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8051
8052 icb->execution_throttle = cpu_to_le16(0xFFFF);
8053
8054 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8055
8056 /* Set minimum login_timeout to 4 seconds. */
8057 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8058 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8059 if (le16_to_cpu(nv->login_timeout) < 4)
8060 nv->login_timeout = cpu_to_le16(4);
8061 ha->login_timeout = le16_to_cpu(nv->login_timeout);
8062
8063 /* Set minimum RATOV to 100 tenths of a second. */
8064 ha->r_a_tov = 100;
8065
8066 ha->loop_reset_delay = nv->reset_delay;
8067
8068 /* Link Down Timeout = 0:
8069 *
8070 * When Port Down timer expires we will start returning
8071 * I/O's to OS with "DID_NO_CONNECT".
8072 *
8073 * Link Down Timeout != 0:
8074 *
8075 * The driver waits for the link to come up after link down
8076 * before returning I/Os to OS with "DID_NO_CONNECT".
8077 */
8078 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8079 ha->loop_down_abort_time =
8080 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8081 } else {
8082 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8083 ha->loop_down_abort_time =
8084 (LOOP_DOWN_TIME - ha->link_down_timeout);
8085 }
8086
8087 /* Need enough time to try and get the port back. */
8088 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8089 if (qlport_down_retry)
8090 ha->port_down_retry_count = qlport_down_retry;
8091
8092 /* Set login_retry_count */
8093 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8094 if (ha->port_down_retry_count ==
8095 le16_to_cpu(nv->port_down_retry_count) &&
8096 ha->port_down_retry_count > 3)
8097 ha->login_retry_count = ha->port_down_retry_count;
8098 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8099 ha->login_retry_count = ha->port_down_retry_count;
8100 if (ql2xloginretrycount)
8101 ha->login_retry_count = ql2xloginretrycount;
8102
8103 /* N2N: driver will initiate Login instead of FW */
8104 icb->firmware_options_3 |= cpu_to_le32(BIT_8);
8105
8106 /* Enable ZIO. */
8107 if (!vha->flags.init_done) {
8108 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8109 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8110 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8111 le16_to_cpu(icb->interrupt_delay_timer) : 2;
8112 }
8113 icb->firmware_options_2 &= cpu_to_le32(
8114 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8115 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8116 ha->zio_mode = QLA_ZIO_MODE_6;
8117
8118 ql_log(ql_log_info, vha, 0x006f,
8119 "ZIO mode %d enabled; timer delay (%d us).\n",
8120 ha->zio_mode, ha->zio_timer * 100);
8121
8122 icb->firmware_options_2 |= cpu_to_le32(
8123 (uint32_t)ha->zio_mode);
8124 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8125 }
8126
8127 if (rval) {
8128 ql_log(ql_log_warn, vha, 0x0070,
8129 "NVRAM configuration failed.\n");
8130 }
8131 return (rval);
8132 }
8133
8134 static void
qla27xx_print_image(struct scsi_qla_host * vha,char * name,struct qla27xx_image_status * image_status)8135 qla27xx_print_image(struct scsi_qla_host *vha, char *name,
8136 struct qla27xx_image_status *image_status)
8137 {
8138 ql_dbg(ql_dbg_init, vha, 0x018b,
8139 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
8140 name, "status",
8141 image_status->image_status_mask,
8142 le16_to_cpu(image_status->generation),
8143 image_status->ver_major,
8144 image_status->ver_minor,
8145 image_status->bitmap,
8146 le32_to_cpu(image_status->checksum),
8147 le32_to_cpu(image_status->signature));
8148 }
8149
8150 static bool
qla28xx_check_aux_image_status_signature(struct qla27xx_image_status * image_status)8151 qla28xx_check_aux_image_status_signature(
8152 struct qla27xx_image_status *image_status)
8153 {
8154 ulong signature = le32_to_cpu(image_status->signature);
8155
8156 return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
8157 }
8158
8159 static bool
qla27xx_check_image_status_signature(struct qla27xx_image_status * image_status)8160 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
8161 {
8162 ulong signature = le32_to_cpu(image_status->signature);
8163
8164 return
8165 signature != QLA27XX_IMG_STATUS_SIGN &&
8166 signature != QLA28XX_IMG_STATUS_SIGN;
8167 }
8168
8169 static ulong
qla27xx_image_status_checksum(struct qla27xx_image_status * image_status)8170 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
8171 {
8172 __le32 *p = (__force __le32 *)image_status;
8173 uint n = sizeof(*image_status) / sizeof(*p);
8174 uint32_t sum = 0;
8175
8176 for ( ; n--; p++)
8177 sum += le32_to_cpup(p);
8178
8179 return sum;
8180 }
8181
8182 static inline uint
qla28xx_component_bitmask(struct qla27xx_image_status * aux,uint bitmask)8183 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
8184 {
8185 return aux->bitmap & bitmask ?
8186 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
8187 }
8188
8189 static void
qla28xx_component_status(struct active_regions * active_regions,struct qla27xx_image_status * aux)8190 qla28xx_component_status(
8191 struct active_regions *active_regions, struct qla27xx_image_status *aux)
8192 {
8193 active_regions->aux.board_config =
8194 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
8195
8196 active_regions->aux.vpd_nvram =
8197 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
8198
8199 active_regions->aux.npiv_config_0_1 =
8200 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
8201
8202 active_regions->aux.npiv_config_2_3 =
8203 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
8204
8205 active_regions->aux.nvme_params =
8206 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NVME_PARAMS);
8207 }
8208
8209 static int
qla27xx_compare_image_generation(struct qla27xx_image_status * pri_image_status,struct qla27xx_image_status * sec_image_status)8210 qla27xx_compare_image_generation(
8211 struct qla27xx_image_status *pri_image_status,
8212 struct qla27xx_image_status *sec_image_status)
8213 {
8214 /* calculate generation delta as uint16 (this accounts for wrap) */
8215 int16_t delta =
8216 le16_to_cpu(pri_image_status->generation) -
8217 le16_to_cpu(sec_image_status->generation);
8218
8219 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
8220
8221 return delta;
8222 }
8223
8224 void
qla28xx_get_aux_images(struct scsi_qla_host * vha,struct active_regions * active_regions)8225 qla28xx_get_aux_images(
8226 struct scsi_qla_host *vha, struct active_regions *active_regions)
8227 {
8228 struct qla_hw_data *ha = vha->hw;
8229 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
8230 bool valid_pri_image = false, valid_sec_image = false;
8231 bool active_pri_image = false, active_sec_image = false;
8232 int rc;
8233
8234 if (!ha->flt_region_aux_img_status_pri) {
8235 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
8236 goto check_sec_image;
8237 }
8238
8239 rc = qla24xx_read_flash_data(vha, (uint32_t *)&pri_aux_image_status,
8240 ha->flt_region_aux_img_status_pri,
8241 sizeof(pri_aux_image_status) >> 2);
8242 if (rc) {
8243 ql_log(ql_log_info, vha, 0x01a1,
8244 "Unable to read Primary aux image(%x).\n", rc);
8245 goto check_sec_image;
8246 }
8247 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
8248
8249 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
8250 ql_dbg(ql_dbg_init, vha, 0x018b,
8251 "Primary aux image signature (%#x) not valid\n",
8252 le32_to_cpu(pri_aux_image_status.signature));
8253 goto check_sec_image;
8254 }
8255
8256 if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
8257 ql_dbg(ql_dbg_init, vha, 0x018c,
8258 "Primary aux image checksum failed\n");
8259 goto check_sec_image;
8260 }
8261
8262 valid_pri_image = true;
8263
8264 if (pri_aux_image_status.image_status_mask & 1) {
8265 ql_dbg(ql_dbg_init, vha, 0x018d,
8266 "Primary aux image is active\n");
8267 active_pri_image = true;
8268 }
8269
8270 check_sec_image:
8271 if (!ha->flt_region_aux_img_status_sec) {
8272 ql_dbg(ql_dbg_init, vha, 0x018a,
8273 "Secondary aux image not addressed\n");
8274 goto check_valid_image;
8275 }
8276
8277 rc = qla24xx_read_flash_data(vha, (uint32_t *)&sec_aux_image_status,
8278 ha->flt_region_aux_img_status_sec,
8279 sizeof(sec_aux_image_status) >> 2);
8280 if (rc) {
8281 ql_log(ql_log_info, vha, 0x01a2,
8282 "Unable to read Secondary aux image(%x).\n", rc);
8283 goto check_valid_image;
8284 }
8285
8286 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
8287
8288 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
8289 ql_dbg(ql_dbg_init, vha, 0x018b,
8290 "Secondary aux image signature (%#x) not valid\n",
8291 le32_to_cpu(sec_aux_image_status.signature));
8292 goto check_valid_image;
8293 }
8294
8295 if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
8296 ql_dbg(ql_dbg_init, vha, 0x018c,
8297 "Secondary aux image checksum failed\n");
8298 goto check_valid_image;
8299 }
8300
8301 valid_sec_image = true;
8302
8303 if (sec_aux_image_status.image_status_mask & 1) {
8304 ql_dbg(ql_dbg_init, vha, 0x018d,
8305 "Secondary aux image is active\n");
8306 active_sec_image = true;
8307 }
8308
8309 check_valid_image:
8310 if (valid_pri_image && active_pri_image &&
8311 valid_sec_image && active_sec_image) {
8312 if (qla27xx_compare_image_generation(&pri_aux_image_status,
8313 &sec_aux_image_status) >= 0) {
8314 qla28xx_component_status(active_regions,
8315 &pri_aux_image_status);
8316 } else {
8317 qla28xx_component_status(active_regions,
8318 &sec_aux_image_status);
8319 }
8320 } else if (valid_pri_image && active_pri_image) {
8321 qla28xx_component_status(active_regions, &pri_aux_image_status);
8322 } else if (valid_sec_image && active_sec_image) {
8323 qla28xx_component_status(active_regions, &sec_aux_image_status);
8324 }
8325
8326 ql_dbg(ql_dbg_init, vha, 0x018f,
8327 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u, NVME=%u\n",
8328 active_regions->aux.board_config,
8329 active_regions->aux.vpd_nvram,
8330 active_regions->aux.npiv_config_0_1,
8331 active_regions->aux.npiv_config_2_3,
8332 active_regions->aux.nvme_params);
8333 }
8334
8335 void
qla27xx_get_active_image(struct scsi_qla_host * vha,struct active_regions * active_regions)8336 qla27xx_get_active_image(struct scsi_qla_host *vha,
8337 struct active_regions *active_regions)
8338 {
8339 struct qla_hw_data *ha = vha->hw;
8340 struct qla27xx_image_status pri_image_status, sec_image_status;
8341 bool valid_pri_image = false, valid_sec_image = false;
8342 bool active_pri_image = false, active_sec_image = false;
8343 int rc;
8344
8345 if (!ha->flt_region_img_status_pri) {
8346 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
8347 goto check_sec_image;
8348 }
8349
8350 if (qla24xx_read_flash_data(vha, (uint32_t *)&pri_image_status,
8351 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
8352 QLA_SUCCESS) {
8353 WARN_ON_ONCE(true);
8354 goto check_sec_image;
8355 }
8356 qla27xx_print_image(vha, "Primary image", &pri_image_status);
8357
8358 if (qla27xx_check_image_status_signature(&pri_image_status)) {
8359 ql_dbg(ql_dbg_init, vha, 0x018b,
8360 "Primary image signature (%#x) not valid\n",
8361 le32_to_cpu(pri_image_status.signature));
8362 goto check_sec_image;
8363 }
8364
8365 if (qla27xx_image_status_checksum(&pri_image_status)) {
8366 ql_dbg(ql_dbg_init, vha, 0x018c,
8367 "Primary image checksum failed\n");
8368 goto check_sec_image;
8369 }
8370
8371 valid_pri_image = true;
8372
8373 if (pri_image_status.image_status_mask & 1) {
8374 ql_dbg(ql_dbg_init, vha, 0x018d,
8375 "Primary image is active\n");
8376 active_pri_image = true;
8377 }
8378
8379 check_sec_image:
8380 if (!ha->flt_region_img_status_sec) {
8381 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
8382 goto check_valid_image;
8383 }
8384
8385 rc = qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
8386 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
8387 if (rc) {
8388 ql_log(ql_log_info, vha, 0x01a3,
8389 "Unable to read Secondary image status(%x).\n", rc);
8390 goto check_valid_image;
8391 }
8392
8393 qla27xx_print_image(vha, "Secondary image", &sec_image_status);
8394
8395 if (qla27xx_check_image_status_signature(&sec_image_status)) {
8396 ql_dbg(ql_dbg_init, vha, 0x018b,
8397 "Secondary image signature (%#x) not valid\n",
8398 le32_to_cpu(sec_image_status.signature));
8399 goto check_valid_image;
8400 }
8401
8402 if (qla27xx_image_status_checksum(&sec_image_status)) {
8403 ql_dbg(ql_dbg_init, vha, 0x018c,
8404 "Secondary image checksum failed\n");
8405 goto check_valid_image;
8406 }
8407
8408 valid_sec_image = true;
8409
8410 if (sec_image_status.image_status_mask & 1) {
8411 ql_dbg(ql_dbg_init, vha, 0x018d,
8412 "Secondary image is active\n");
8413 active_sec_image = true;
8414 }
8415
8416 check_valid_image:
8417 if (valid_pri_image && active_pri_image)
8418 active_regions->global = QLA27XX_PRIMARY_IMAGE;
8419
8420 if (valid_sec_image && active_sec_image) {
8421 if (!active_regions->global ||
8422 qla27xx_compare_image_generation(
8423 &pri_image_status, &sec_image_status) < 0) {
8424 active_regions->global = QLA27XX_SECONDARY_IMAGE;
8425 }
8426 }
8427
8428 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
8429 active_regions->global == QLA27XX_DEFAULT_IMAGE ?
8430 "default (boot/fw)" :
8431 active_regions->global == QLA27XX_PRIMARY_IMAGE ?
8432 "primary" :
8433 active_regions->global == QLA27XX_SECONDARY_IMAGE ?
8434 "secondary" : "invalid",
8435 active_regions->global);
8436 }
8437
qla24xx_risc_firmware_invalid(uint32_t * dword)8438 bool qla24xx_risc_firmware_invalid(uint32_t *dword)
8439 {
8440 return
8441 !(dword[4] | dword[5] | dword[6] | dword[7]) ||
8442 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
8443 }
8444
8445 static int
qla24xx_load_risc_flash(scsi_qla_host_t * vha,uint32_t * srisc_addr,uint32_t faddr)8446 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
8447 uint32_t faddr)
8448 {
8449 int rval;
8450 uint templates, segments, fragment;
8451 ulong i;
8452 uint j;
8453 ulong dlen;
8454 uint32_t *dcode;
8455 uint32_t risc_addr, risc_size, risc_attr = 0;
8456 struct qla_hw_data *ha = vha->hw;
8457 struct req_que *req = ha->req_q_map[0];
8458 struct fwdt *fwdt = ha->fwdt;
8459
8460 ql_dbg(ql_dbg_init, vha, 0x008b,
8461 "FW: Loading firmware from flash (%x).\n", faddr);
8462
8463 dcode = (uint32_t *)req->ring;
8464 rval = qla24xx_read_flash_data(vha, dcode, faddr, 8);
8465 if (rval || qla24xx_risc_firmware_invalid(dcode)) {
8466 ql_log(ql_log_fatal, vha, 0x008c,
8467 "Unable to verify the integrity of flash firmware image (rval %x).\n", rval);
8468 ql_log(ql_log_fatal, vha, 0x008d,
8469 "Firmware data: %08x %08x %08x %08x.\n",
8470 dcode[0], dcode[1], dcode[2], dcode[3]);
8471
8472 return QLA_FUNCTION_FAILED;
8473 }
8474
8475 dcode = (uint32_t *)req->ring;
8476 *srisc_addr = 0;
8477 segments = FA_RISC_CODE_SEGMENTS;
8478 for (j = 0; j < segments; j++) {
8479 ql_dbg(ql_dbg_init, vha, 0x008d,
8480 "-> Loading segment %u...\n", j);
8481 rval = qla24xx_read_flash_data(vha, dcode, faddr, 10);
8482 if (rval) {
8483 ql_log(ql_log_fatal, vha, 0x016a,
8484 "-> Unable to read segment addr + size .\n");
8485 return QLA_FUNCTION_FAILED;
8486 }
8487 risc_addr = be32_to_cpu((__force __be32)dcode[2]);
8488 risc_size = be32_to_cpu((__force __be32)dcode[3]);
8489 if (!*srisc_addr) {
8490 *srisc_addr = risc_addr;
8491 risc_attr = be32_to_cpu((__force __be32)dcode[9]);
8492 }
8493
8494 dlen = ha->fw_transfer_size >> 2;
8495 for (fragment = 0; risc_size; fragment++) {
8496 if (dlen > risc_size)
8497 dlen = risc_size;
8498
8499 ql_dbg(ql_dbg_init, vha, 0x008e,
8500 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
8501 fragment, risc_addr, faddr, dlen);
8502 rval = qla24xx_read_flash_data(vha, dcode, faddr, dlen);
8503 if (rval) {
8504 ql_log(ql_log_fatal, vha, 0x016b,
8505 "-> Unable to read fragment(faddr %#x dlen %#lx).\n",
8506 faddr, dlen);
8507 return QLA_FUNCTION_FAILED;
8508 }
8509 for (i = 0; i < dlen; i++)
8510 dcode[i] = swab32(dcode[i]);
8511
8512 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8513 if (rval) {
8514 ql_log(ql_log_fatal, vha, 0x008f,
8515 "-> Failed load firmware fragment %u.\n",
8516 fragment);
8517 return QLA_FUNCTION_FAILED;
8518 }
8519
8520 faddr += dlen;
8521 risc_addr += dlen;
8522 risc_size -= dlen;
8523 }
8524 }
8525
8526 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8527 return QLA_SUCCESS;
8528
8529 templates = (risc_attr & BIT_9) ? 2 : 1;
8530 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
8531 for (j = 0; j < templates; j++, fwdt++) {
8532 vfree(fwdt->template);
8533 fwdt->template = NULL;
8534 fwdt->length = 0;
8535
8536 dcode = (uint32_t *)req->ring;
8537
8538 rval = qla24xx_read_flash_data(vha, dcode, faddr, 7);
8539 if (rval) {
8540 ql_log(ql_log_fatal, vha, 0x016c,
8541 "-> Unable to read template size.\n");
8542 goto failed;
8543 }
8544
8545 risc_size = be32_to_cpu((__force __be32)dcode[2]);
8546 ql_dbg(ql_dbg_init, vha, 0x0161,
8547 "-> fwdt%u template array at %#x (%#x dwords)\n",
8548 j, faddr, risc_size);
8549 if (!risc_size || !~risc_size) {
8550 ql_dbg(ql_dbg_init, vha, 0x0162,
8551 "-> fwdt%u failed to read array\n", j);
8552 goto failed;
8553 }
8554
8555 /* skip header and ignore checksum */
8556 faddr += 7;
8557 risc_size -= 8;
8558
8559 ql_dbg(ql_dbg_init, vha, 0x0163,
8560 "-> fwdt%u template allocate template %#x words...\n",
8561 j, risc_size);
8562 fwdt->template = vmalloc_array(risc_size, sizeof(*dcode));
8563 if (!fwdt->template) {
8564 ql_log(ql_log_warn, vha, 0x0164,
8565 "-> fwdt%u failed allocate template.\n", j);
8566 goto failed;
8567 }
8568
8569 dcode = fwdt->template;
8570 rval = qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
8571
8572 if (rval || !qla27xx_fwdt_template_valid(dcode)) {
8573 ql_log(ql_log_warn, vha, 0x0165,
8574 "-> fwdt%u failed template validate (rval %x)\n",
8575 j, rval);
8576 goto failed;
8577 }
8578
8579 dlen = qla27xx_fwdt_template_size(dcode);
8580 ql_dbg(ql_dbg_init, vha, 0x0166,
8581 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8582 j, dlen, dlen / sizeof(*dcode));
8583 if (dlen > risc_size * sizeof(*dcode)) {
8584 ql_log(ql_log_warn, vha, 0x0167,
8585 "-> fwdt%u template exceeds array (%-lu bytes)\n",
8586 j, dlen - risc_size * sizeof(*dcode));
8587 goto failed;
8588 }
8589
8590 fwdt->length = dlen;
8591 ql_dbg(ql_dbg_init, vha, 0x0168,
8592 "-> fwdt%u loaded template ok\n", j);
8593
8594 faddr += risc_size + 1;
8595 }
8596
8597 return QLA_SUCCESS;
8598
8599 failed:
8600 vfree(fwdt->template);
8601 fwdt->template = NULL;
8602 fwdt->length = 0;
8603
8604 return QLA_SUCCESS;
8605 }
8606
8607 int
qla2x00_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8608 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8609 {
8610 int rval;
8611 int i, fragment;
8612 uint16_t *wcode;
8613 __be16 *fwcode;
8614 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
8615 struct fw_blob *blob;
8616 struct qla_hw_data *ha = vha->hw;
8617 struct req_que *req = ha->req_q_map[0];
8618
8619 /* Load firmware blob. */
8620 blob = qla2x00_request_firmware(vha);
8621 if (!blob) {
8622 ql_log(ql_log_info, vha, 0x0083,
8623 "Firmware image unavailable.\n");
8624 return QLA_FUNCTION_FAILED;
8625 }
8626
8627 rval = QLA_SUCCESS;
8628
8629 wcode = (uint16_t *)req->ring;
8630 *srisc_addr = 0;
8631 fwcode = (__force __be16 *)blob->fw->data;
8632 fwclen = 0;
8633
8634 /* Validate firmware image by checking version. */
8635 if (blob->fw->size < 8 * sizeof(uint16_t)) {
8636 ql_log(ql_log_fatal, vha, 0x0085,
8637 "Unable to verify integrity of firmware image (%zd).\n",
8638 blob->fw->size);
8639 goto fail_fw_integrity;
8640 }
8641 for (i = 0; i < 4; i++)
8642 wcode[i] = be16_to_cpu(fwcode[i + 4]);
8643 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
8644 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
8645 wcode[2] == 0 && wcode[3] == 0)) {
8646 ql_log(ql_log_fatal, vha, 0x0086,
8647 "Unable to verify integrity of firmware image.\n");
8648 ql_log(ql_log_fatal, vha, 0x0087,
8649 "Firmware data: %04x %04x %04x %04x.\n",
8650 wcode[0], wcode[1], wcode[2], wcode[3]);
8651 goto fail_fw_integrity;
8652 }
8653
8654 seg = blob->segs;
8655 while (*seg && rval == QLA_SUCCESS) {
8656 risc_addr = *seg;
8657 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
8658 risc_size = be16_to_cpu(fwcode[3]);
8659
8660 /* Validate firmware image size. */
8661 fwclen += risc_size * sizeof(uint16_t);
8662 if (blob->fw->size < fwclen) {
8663 ql_log(ql_log_fatal, vha, 0x0088,
8664 "Unable to verify integrity of firmware image "
8665 "(%zd).\n", blob->fw->size);
8666 goto fail_fw_integrity;
8667 }
8668
8669 fragment = 0;
8670 while (risc_size > 0 && rval == QLA_SUCCESS) {
8671 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
8672 if (wlen > risc_size)
8673 wlen = risc_size;
8674 ql_dbg(ql_dbg_init, vha, 0x0089,
8675 "Loading risc segment@ risc addr %x number of "
8676 "words 0x%x.\n", risc_addr, wlen);
8677
8678 for (i = 0; i < wlen; i++)
8679 wcode[i] = swab16((__force u32)fwcode[i]);
8680
8681 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
8682 wlen);
8683 if (rval) {
8684 ql_log(ql_log_fatal, vha, 0x008a,
8685 "Failed to load segment %d of firmware.\n",
8686 fragment);
8687 break;
8688 }
8689
8690 fwcode += wlen;
8691 risc_addr += wlen;
8692 risc_size -= wlen;
8693 fragment++;
8694 }
8695
8696 /* Next segment. */
8697 seg++;
8698 }
8699 return rval;
8700
8701 fail_fw_integrity:
8702 return QLA_FUNCTION_FAILED;
8703 }
8704
8705 static int
qla24xx_load_risc_blob(scsi_qla_host_t * vha,uint32_t * srisc_addr)8706 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8707 {
8708 int rval;
8709 uint templates, segments, fragment;
8710 uint32_t *dcode;
8711 ulong dlen;
8712 uint32_t risc_addr, risc_size, risc_attr = 0;
8713 ulong i;
8714 uint j;
8715 struct fw_blob *blob;
8716 __be32 *fwcode;
8717 struct qla_hw_data *ha = vha->hw;
8718 struct req_que *req = ha->req_q_map[0];
8719 struct fwdt *fwdt = ha->fwdt;
8720
8721 ql_dbg(ql_dbg_init, vha, 0x0090,
8722 "-> FW: Loading via request-firmware.\n");
8723
8724 blob = qla2x00_request_firmware(vha);
8725 if (!blob) {
8726 ql_log(ql_log_warn, vha, 0x0092,
8727 "-> Firmware file not found.\n");
8728
8729 return QLA_FUNCTION_FAILED;
8730 }
8731
8732 fwcode = (__force __be32 *)blob->fw->data;
8733 dcode = (__force uint32_t *)fwcode;
8734 if (qla24xx_risc_firmware_invalid(dcode)) {
8735 ql_log(ql_log_fatal, vha, 0x0093,
8736 "Unable to verify integrity of firmware image (%zd).\n",
8737 blob->fw->size);
8738 ql_log(ql_log_fatal, vha, 0x0095,
8739 "Firmware data: %08x %08x %08x %08x.\n",
8740 dcode[0], dcode[1], dcode[2], dcode[3]);
8741 return QLA_FUNCTION_FAILED;
8742 }
8743
8744 dcode = (uint32_t *)req->ring;
8745 *srisc_addr = 0;
8746 segments = FA_RISC_CODE_SEGMENTS;
8747 for (j = 0; j < segments; j++) {
8748 ql_dbg(ql_dbg_init, vha, 0x0096,
8749 "-> Loading segment %u...\n", j);
8750 risc_addr = be32_to_cpu(fwcode[2]);
8751 risc_size = be32_to_cpu(fwcode[3]);
8752
8753 if (!*srisc_addr) {
8754 *srisc_addr = risc_addr;
8755 risc_attr = be32_to_cpu(fwcode[9]);
8756 }
8757
8758 dlen = ha->fw_transfer_size >> 2;
8759 for (fragment = 0; risc_size; fragment++) {
8760 if (dlen > risc_size)
8761 dlen = risc_size;
8762
8763 ql_dbg(ql_dbg_init, vha, 0x0097,
8764 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
8765 fragment, risc_addr,
8766 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
8767 dlen);
8768
8769 for (i = 0; i < dlen; i++)
8770 dcode[i] = swab32((__force u32)fwcode[i]);
8771
8772 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8773 if (rval) {
8774 ql_log(ql_log_fatal, vha, 0x0098,
8775 "-> Failed load firmware fragment %u.\n",
8776 fragment);
8777 return QLA_FUNCTION_FAILED;
8778 }
8779
8780 fwcode += dlen;
8781 risc_addr += dlen;
8782 risc_size -= dlen;
8783 }
8784 }
8785
8786 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8787 return QLA_SUCCESS;
8788
8789 templates = (risc_attr & BIT_9) ? 2 : 1;
8790 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
8791 for (j = 0; j < templates; j++, fwdt++) {
8792 vfree(fwdt->template);
8793 fwdt->template = NULL;
8794 fwdt->length = 0;
8795
8796 risc_size = be32_to_cpu(fwcode[2]);
8797 ql_dbg(ql_dbg_init, vha, 0x0171,
8798 "-> fwdt%u template array at %#x (%#x dwords)\n",
8799 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
8800 risc_size);
8801 if (!risc_size || !~risc_size) {
8802 ql_dbg(ql_dbg_init, vha, 0x0172,
8803 "-> fwdt%u failed to read array\n", j);
8804 goto failed;
8805 }
8806
8807 /* skip header and ignore checksum */
8808 fwcode += 7;
8809 risc_size -= 8;
8810
8811 ql_dbg(ql_dbg_init, vha, 0x0173,
8812 "-> fwdt%u template allocate template %#x words...\n",
8813 j, risc_size);
8814 fwdt->template = vmalloc_array(risc_size, sizeof(*dcode));
8815 if (!fwdt->template) {
8816 ql_log(ql_log_warn, vha, 0x0174,
8817 "-> fwdt%u failed allocate template.\n", j);
8818 goto failed;
8819 }
8820
8821 dcode = fwdt->template;
8822 for (i = 0; i < risc_size; i++)
8823 dcode[i] = (__force u32)fwcode[i];
8824
8825 if (!qla27xx_fwdt_template_valid(dcode)) {
8826 ql_log(ql_log_warn, vha, 0x0175,
8827 "-> fwdt%u failed template validate\n", j);
8828 goto failed;
8829 }
8830
8831 dlen = qla27xx_fwdt_template_size(dcode);
8832 ql_dbg(ql_dbg_init, vha, 0x0176,
8833 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8834 j, dlen, dlen / sizeof(*dcode));
8835 if (dlen > risc_size * sizeof(*dcode)) {
8836 ql_log(ql_log_warn, vha, 0x0177,
8837 "-> fwdt%u template exceeds array (%-lu bytes)\n",
8838 j, dlen - risc_size * sizeof(*dcode));
8839 goto failed;
8840 }
8841
8842 fwdt->length = dlen;
8843 ql_dbg(ql_dbg_init, vha, 0x0178,
8844 "-> fwdt%u loaded template ok\n", j);
8845
8846 fwcode += risc_size + 1;
8847 }
8848
8849 return QLA_SUCCESS;
8850
8851 failed:
8852 vfree(fwdt->template);
8853 fwdt->template = NULL;
8854 fwdt->length = 0;
8855
8856 return QLA_SUCCESS;
8857 }
8858
8859 int
qla24xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8860 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8861 {
8862 int rval;
8863
8864 if (ql2xfwloadbin == 1)
8865 return qla81xx_load_risc(vha, srisc_addr);
8866
8867 /*
8868 * FW Load priority:
8869 * 1) Firmware via request-firmware interface (.bin file).
8870 * 2) Firmware residing in flash.
8871 */
8872 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8873 if (rval == QLA_SUCCESS)
8874 return rval;
8875
8876 return qla24xx_load_risc_flash(vha, srisc_addr,
8877 vha->hw->flt_region_fw);
8878 }
8879
8880 int
qla81xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)8881 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8882 {
8883 int rval;
8884 struct qla_hw_data *ha = vha->hw;
8885 struct active_regions active_regions = { };
8886
8887 if (ql2xfwloadbin == 2)
8888 goto try_blob_fw;
8889
8890 /* FW Load priority:
8891 * 1) Firmware residing in flash.
8892 * 2) Firmware via request-firmware interface (.bin file).
8893 * 3) Golden-Firmware residing in flash -- (limited operation).
8894 */
8895
8896 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8897 goto try_primary_fw;
8898
8899 qla27xx_get_active_image(vha, &active_regions);
8900
8901 if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8902 goto try_primary_fw;
8903
8904 ql_dbg(ql_dbg_init, vha, 0x008b,
8905 "Loading secondary firmware image.\n");
8906 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
8907 if (!rval)
8908 return rval;
8909
8910 try_primary_fw:
8911 ql_dbg(ql_dbg_init, vha, 0x008b,
8912 "Loading primary firmware image.\n");
8913 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
8914 if (!rval)
8915 return rval;
8916
8917 try_blob_fw:
8918 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8919 if (!rval || !ha->flt_region_gold_fw)
8920 return rval;
8921
8922 ql_log(ql_log_info, vha, 0x0099,
8923 "Attempting to fallback to golden firmware.\n");
8924 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
8925 if (rval)
8926 return rval;
8927
8928 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
8929 ha->flags.running_gold_fw = 1;
8930 return rval;
8931 }
8932
8933 void
qla2x00_try_to_stop_firmware(scsi_qla_host_t * vha)8934 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8935 {
8936 int ret, retries;
8937 struct qla_hw_data *ha = vha->hw;
8938
8939 if (ha->flags.pci_channel_io_perm_failure)
8940 return;
8941 if (!IS_FWI2_CAPABLE(ha))
8942 return;
8943 if (!ha->fw_major_version)
8944 return;
8945 if (!ha->flags.fw_started)
8946 return;
8947
8948 ret = qla2x00_stop_firmware(vha);
8949 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8950 ret != QLA_INVALID_COMMAND && retries ; retries--) {
8951 ha->isp_ops->reset_chip(vha);
8952 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8953 continue;
8954 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8955 continue;
8956 ql_log(ql_log_info, vha, 0x8015,
8957 "Attempting retry of stop-firmware command.\n");
8958 ret = qla2x00_stop_firmware(vha);
8959 }
8960
8961 QLA_FW_STOPPED(ha);
8962 ha->flags.fw_init_done = 0;
8963 }
8964
8965 int
qla24xx_configure_vhba(scsi_qla_host_t * vha)8966 qla24xx_configure_vhba(scsi_qla_host_t *vha)
8967 {
8968 int rval = QLA_SUCCESS;
8969 int rval2;
8970 uint16_t mb[MAILBOX_REGISTER_COUNT];
8971 struct qla_hw_data *ha = vha->hw;
8972 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
8973
8974 if (!vha->vp_idx)
8975 return -EINVAL;
8976
8977 rval = qla2x00_fw_ready(base_vha);
8978
8979 if (rval == QLA_SUCCESS) {
8980 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8981 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8982 }
8983
8984 vha->flags.management_server_logged_in = 0;
8985
8986 /* Login to SNS first */
8987 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
8988 BIT_1);
8989 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
8990 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
8991 ql_dbg(ql_dbg_init, vha, 0x0120,
8992 "Failed SNS login: loop_id=%x, rval2=%d\n",
8993 NPH_SNS, rval2);
8994 else
8995 ql_dbg(ql_dbg_init, vha, 0x0103,
8996 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
8997 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
8998 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
8999 return (QLA_FUNCTION_FAILED);
9000 }
9001
9002 atomic_set(&vha->loop_down_timer, 0);
9003 atomic_set(&vha->loop_state, LOOP_UP);
9004 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
9005 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
9006 rval = qla2x00_loop_resync(base_vha);
9007
9008 return rval;
9009 }
9010
9011 /* 84XX Support **************************************************************/
9012
9013 static LIST_HEAD(qla_cs84xx_list);
9014 static DEFINE_MUTEX(qla_cs84xx_mutex);
9015
9016 static struct qla_chip_state_84xx *
qla84xx_get_chip(struct scsi_qla_host * vha)9017 qla84xx_get_chip(struct scsi_qla_host *vha)
9018 {
9019 struct qla_chip_state_84xx *cs84xx;
9020 struct qla_hw_data *ha = vha->hw;
9021
9022 mutex_lock(&qla_cs84xx_mutex);
9023
9024 /* Find any shared 84xx chip. */
9025 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
9026 if (cs84xx->bus == ha->pdev->bus) {
9027 kref_get(&cs84xx->kref);
9028 goto done;
9029 }
9030 }
9031
9032 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
9033 if (!cs84xx)
9034 goto done;
9035
9036 kref_init(&cs84xx->kref);
9037 spin_lock_init(&cs84xx->access_lock);
9038 mutex_init(&cs84xx->fw_update_mutex);
9039 cs84xx->bus = ha->pdev->bus;
9040
9041 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
9042 done:
9043 mutex_unlock(&qla_cs84xx_mutex);
9044 return cs84xx;
9045 }
9046
9047 static void
__qla84xx_chip_release(struct kref * kref)9048 __qla84xx_chip_release(struct kref *kref)
9049 {
9050 struct qla_chip_state_84xx *cs84xx =
9051 container_of(kref, struct qla_chip_state_84xx, kref);
9052
9053 mutex_lock(&qla_cs84xx_mutex);
9054 list_del(&cs84xx->list);
9055 mutex_unlock(&qla_cs84xx_mutex);
9056 kfree(cs84xx);
9057 }
9058
9059 void
qla84xx_put_chip(struct scsi_qla_host * vha)9060 qla84xx_put_chip(struct scsi_qla_host *vha)
9061 {
9062 struct qla_hw_data *ha = vha->hw;
9063
9064 if (ha->cs84xx)
9065 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
9066 }
9067
9068 static int
qla84xx_init_chip(scsi_qla_host_t * vha)9069 qla84xx_init_chip(scsi_qla_host_t *vha)
9070 {
9071 int rval;
9072 uint16_t status[2];
9073 struct qla_hw_data *ha = vha->hw;
9074
9075 mutex_lock(&ha->cs84xx->fw_update_mutex);
9076
9077 rval = qla84xx_verify_chip(vha, status);
9078
9079 mutex_unlock(&ha->cs84xx->fw_update_mutex);
9080
9081 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
9082 QLA_SUCCESS;
9083 }
9084
9085 /* 81XX Support **************************************************************/
9086
9087 int
qla81xx_nvram_config(scsi_qla_host_t * vha)9088 qla81xx_nvram_config(scsi_qla_host_t *vha)
9089 {
9090 int rval;
9091 struct init_cb_81xx *icb;
9092 struct nvram_81xx *nv;
9093 __le32 *dptr;
9094 uint8_t *dptr1, *dptr2;
9095 uint32_t chksum;
9096 uint16_t cnt;
9097 struct qla_hw_data *ha = vha->hw;
9098 uint32_t faddr;
9099 struct active_regions active_regions = { };
9100
9101 rval = QLA_SUCCESS;
9102 icb = (struct init_cb_81xx *)ha->init_cb;
9103 nv = ha->nvram;
9104
9105 /* Determine NVRAM starting address. */
9106 ha->nvram_size = sizeof(*nv);
9107 ha->vpd_size = FA_NVRAM_VPD_SIZE;
9108 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
9109 ha->vpd_size = FA_VPD_SIZE_82XX;
9110
9111 if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
9112 qla28xx_get_aux_images(vha, &active_regions);
9113
9114 /* Get VPD data into cache */
9115 ha->vpd = ha->nvram + VPD_OFFSET;
9116
9117 faddr = ha->flt_region_vpd;
9118 if (IS_QLA28XX(ha)) {
9119 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
9120 faddr = ha->flt_region_vpd_sec;
9121 ql_dbg(ql_dbg_init, vha, 0x0110,
9122 "Loading %s nvram image.\n",
9123 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
9124 "primary" : "secondary");
9125 }
9126 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
9127
9128 /* Get NVRAM data into cache and calculate checksum. */
9129 faddr = ha->flt_region_nvram;
9130 if (IS_QLA28XX(ha)) {
9131 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
9132 faddr = ha->flt_region_nvram_sec;
9133 }
9134 ql_dbg(ql_dbg_init, vha, 0x0110,
9135 "Loading %s nvram image.\n",
9136 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
9137 "primary" : "secondary");
9138 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
9139
9140 dptr = (__force __le32 *)nv;
9141 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
9142 chksum += le32_to_cpu(*dptr);
9143
9144 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
9145 "Contents of NVRAM:\n");
9146 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
9147 nv, ha->nvram_size);
9148
9149 /* Bad NVRAM data, set defaults parameters. */
9150 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
9151 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
9152 /* Reset NVRAM data. */
9153 ql_log(ql_log_info, vha, 0x0073,
9154 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
9155 chksum, nv->id, le16_to_cpu(nv->nvram_version));
9156 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
9157 ql_log(ql_log_info, vha, 0x0074,
9158 "Falling back to functioning (yet invalid -- WWPN) "
9159 "defaults.\n");
9160
9161 /*
9162 * Set default initialization control block.
9163 */
9164 memset(nv, 0, ha->nvram_size);
9165 nv->nvram_version = cpu_to_le16(ICB_VERSION);
9166 nv->version = cpu_to_le16(ICB_VERSION);
9167 nv->frame_payload_size = cpu_to_le16(2048);
9168 nv->execution_throttle = cpu_to_le16(0xFFFF);
9169 nv->exchange_count = cpu_to_le16(0);
9170 nv->port_name[0] = 0x21;
9171 nv->port_name[1] = 0x00 + ha->port_no + 1;
9172 nv->port_name[2] = 0x00;
9173 nv->port_name[3] = 0xe0;
9174 nv->port_name[4] = 0x8b;
9175 nv->port_name[5] = 0x1c;
9176 nv->port_name[6] = 0x55;
9177 nv->port_name[7] = 0x86;
9178 nv->node_name[0] = 0x20;
9179 nv->node_name[1] = 0x00;
9180 nv->node_name[2] = 0x00;
9181 nv->node_name[3] = 0xe0;
9182 nv->node_name[4] = 0x8b;
9183 nv->node_name[5] = 0x1c;
9184 nv->node_name[6] = 0x55;
9185 nv->node_name[7] = 0x86;
9186 nv->login_retry_count = cpu_to_le16(8);
9187 nv->interrupt_delay_timer = cpu_to_le16(0);
9188 nv->login_timeout = cpu_to_le16(0);
9189 nv->firmware_options_1 =
9190 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
9191 nv->firmware_options_2 = cpu_to_le32(2 << 4);
9192 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
9193 nv->firmware_options_3 = cpu_to_le32(2 << 13);
9194 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
9195 nv->efi_parameters = cpu_to_le32(0);
9196 nv->reset_delay = 5;
9197 nv->max_luns_per_target = cpu_to_le16(128);
9198 nv->port_down_retry_count = cpu_to_le16(30);
9199 nv->link_down_timeout = cpu_to_le16(180);
9200 nv->enode_mac[0] = 0x00;
9201 nv->enode_mac[1] = 0xC0;
9202 nv->enode_mac[2] = 0xDD;
9203 nv->enode_mac[3] = 0x04;
9204 nv->enode_mac[4] = 0x05;
9205 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
9206
9207 rval = 1;
9208 }
9209
9210 if (IS_T10_PI_CAPABLE(ha))
9211 nv->frame_payload_size &= cpu_to_le16(~7);
9212
9213 qlt_81xx_config_nvram_stage1(vha, nv);
9214
9215 /* Reset Initialization control block */
9216 memset(icb, 0, ha->init_cb_size);
9217
9218 /* Copy 1st segment. */
9219 dptr1 = (uint8_t *)icb;
9220 dptr2 = (uint8_t *)&nv->version;
9221 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
9222 while (cnt--)
9223 *dptr1++ = *dptr2++;
9224
9225 icb->login_retry_count = nv->login_retry_count;
9226
9227 /* Copy 2nd segment. */
9228 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
9229 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
9230 cnt = (uint8_t *)&icb->reserved_5 -
9231 (uint8_t *)&icb->interrupt_delay_timer;
9232 while (cnt--)
9233 *dptr1++ = *dptr2++;
9234
9235 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
9236 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
9237 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
9238 icb->enode_mac[0] = 0x00;
9239 icb->enode_mac[1] = 0xC0;
9240 icb->enode_mac[2] = 0xDD;
9241 icb->enode_mac[3] = 0x04;
9242 icb->enode_mac[4] = 0x05;
9243 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
9244 }
9245
9246 /* Use extended-initialization control block. */
9247 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
9248 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
9249 /*
9250 * Setup driver NVRAM options.
9251 */
9252 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
9253 "QLE8XXX");
9254
9255 qlt_81xx_config_nvram_stage2(vha, icb);
9256
9257 /* Use alternate WWN? */
9258 if (nv->host_p & cpu_to_le32(BIT_15)) {
9259 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
9260 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
9261 }
9262
9263 /* Prepare nodename */
9264 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
9265 /*
9266 * Firmware will apply the following mask if the nodename was
9267 * not provided.
9268 */
9269 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
9270 icb->node_name[0] &= 0xF0;
9271 }
9272
9273 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) {
9274 if ((nv->enhanced_features & BIT_7) == 0)
9275 ha->flags.scm_supported_a = 1;
9276 }
9277
9278 /* Set host adapter parameters. */
9279 ha->flags.disable_risc_code_load = 0;
9280 ha->flags.enable_lip_reset = 0;
9281 ha->flags.enable_lip_full_login =
9282 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
9283 ha->flags.enable_target_reset =
9284 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
9285 ha->flags.enable_led_scheme = 0;
9286 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
9287
9288 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
9289 (BIT_6 | BIT_5 | BIT_4)) >> 4;
9290
9291 /* save HBA serial number */
9292 ha->serial0 = icb->port_name[5];
9293 ha->serial1 = icb->port_name[6];
9294 ha->serial2 = icb->port_name[7];
9295 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
9296 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
9297
9298 icb->execution_throttle = cpu_to_le16(0xFFFF);
9299
9300 ha->retry_count = le16_to_cpu(nv->login_retry_count);
9301
9302 /* Set minimum login_timeout to 4 seconds. */
9303 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
9304 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
9305 if (le16_to_cpu(nv->login_timeout) < 4)
9306 nv->login_timeout = cpu_to_le16(4);
9307 ha->login_timeout = le16_to_cpu(nv->login_timeout);
9308
9309 /* Set minimum RATOV to 100 tenths of a second. */
9310 ha->r_a_tov = 100;
9311
9312 ha->loop_reset_delay = nv->reset_delay;
9313
9314 /* Link Down Timeout = 0:
9315 *
9316 * When Port Down timer expires we will start returning
9317 * I/O's to OS with "DID_NO_CONNECT".
9318 *
9319 * Link Down Timeout != 0:
9320 *
9321 * The driver waits for the link to come up after link down
9322 * before returning I/Os to OS with "DID_NO_CONNECT".
9323 */
9324 if (le16_to_cpu(nv->link_down_timeout) == 0) {
9325 ha->loop_down_abort_time =
9326 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
9327 } else {
9328 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
9329 ha->loop_down_abort_time =
9330 (LOOP_DOWN_TIME - ha->link_down_timeout);
9331 }
9332
9333 /* Need enough time to try and get the port back. */
9334 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
9335 if (qlport_down_retry)
9336 ha->port_down_retry_count = qlport_down_retry;
9337
9338 /* Set login_retry_count */
9339 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
9340 if (ha->port_down_retry_count ==
9341 le16_to_cpu(nv->port_down_retry_count) &&
9342 ha->port_down_retry_count > 3)
9343 ha->login_retry_count = ha->port_down_retry_count;
9344 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
9345 ha->login_retry_count = ha->port_down_retry_count;
9346 if (ql2xloginretrycount)
9347 ha->login_retry_count = ql2xloginretrycount;
9348
9349 /* if not running MSI-X we need handshaking on interrupts */
9350 if (!vha->hw->flags.msix_enabled &&
9351 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
9352 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
9353
9354 /* Enable ZIO. */
9355 if (!vha->flags.init_done) {
9356 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
9357 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
9358 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
9359 le16_to_cpu(icb->interrupt_delay_timer) : 2;
9360 }
9361 icb->firmware_options_2 &= cpu_to_le32(
9362 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
9363 vha->flags.process_response_queue = 0;
9364 if (ha->zio_mode != QLA_ZIO_DISABLED) {
9365 ha->zio_mode = QLA_ZIO_MODE_6;
9366
9367 ql_log(ql_log_info, vha, 0x0075,
9368 "ZIO mode %d enabled; timer delay (%d us).\n",
9369 ha->zio_mode,
9370 ha->zio_timer * 100);
9371
9372 icb->firmware_options_2 |= cpu_to_le32(
9373 (uint32_t)ha->zio_mode);
9374 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
9375 vha->flags.process_response_queue = 1;
9376 }
9377
9378 /* enable RIDA Format2 */
9379 icb->firmware_options_3 |= cpu_to_le32(BIT_0);
9380
9381 /* N2N: driver will initiate Login instead of FW */
9382 icb->firmware_options_3 |= cpu_to_le32(BIT_8);
9383
9384 /* Determine NVMe/FCP priority for target ports */
9385 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
9386
9387 if (rval) {
9388 ql_log(ql_log_warn, vha, 0x0076,
9389 "NVRAM configuration failed.\n");
9390 }
9391 return (rval);
9392 }
9393
9394 int
qla82xx_restart_isp(scsi_qla_host_t * vha)9395 qla82xx_restart_isp(scsi_qla_host_t *vha)
9396 {
9397 int status, rval;
9398 struct qla_hw_data *ha = vha->hw;
9399 struct scsi_qla_host *vp, *tvp;
9400 unsigned long flags;
9401
9402 status = qla2x00_init_rings(vha);
9403 if (!status) {
9404 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
9405 ha->flags.chip_reset_done = 1;
9406
9407 status = qla2x00_fw_ready(vha);
9408 if (!status) {
9409 /* Issue a marker after FW becomes ready. */
9410 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
9411 vha->flags.online = 1;
9412 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
9413 }
9414
9415 /* if no cable then assume it's good */
9416 if ((vha->device_flags & DFLG_NO_CABLE))
9417 status = 0;
9418 }
9419
9420 if (!status) {
9421 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
9422
9423 if (!atomic_read(&vha->loop_down_timer)) {
9424 /*
9425 * Issue marker command only when we are going
9426 * to start the I/O .
9427 */
9428 vha->marker_needed = 1;
9429 }
9430
9431 ha->isp_ops->enable_intrs(ha);
9432
9433 ha->isp_abort_cnt = 0;
9434 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
9435
9436 /* Update the firmware version */
9437 status = qla82xx_check_md_needed(vha);
9438
9439 if (ha->fce) {
9440 ha->flags.fce_enabled = 1;
9441 memset(ha->fce, 0,
9442 fce_calc_size(ha->fce_bufs));
9443 rval = qla2x00_enable_fce_trace(vha,
9444 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
9445 &ha->fce_bufs);
9446 if (rval) {
9447 ql_log(ql_log_warn, vha, 0x8001,
9448 "Unable to reinitialize FCE (%d).\n",
9449 rval);
9450 ha->flags.fce_enabled = 0;
9451 }
9452 }
9453
9454 if (ha->eft) {
9455 memset(ha->eft, 0, EFT_SIZE);
9456 rval = qla2x00_enable_eft_trace(vha,
9457 ha->eft_dma, EFT_NUM_BUFFERS);
9458 if (rval) {
9459 ql_log(ql_log_warn, vha, 0x8010,
9460 "Unable to reinitialize EFT (%d).\n",
9461 rval);
9462 }
9463 }
9464 }
9465
9466 if (!status) {
9467 ql_dbg(ql_dbg_taskm, vha, 0x8011,
9468 "qla82xx_restart_isp succeeded.\n");
9469
9470 spin_lock_irqsave(&ha->vport_slock, flags);
9471 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
9472 if (vp->vp_idx) {
9473 atomic_inc(&vp->vref_count);
9474 spin_unlock_irqrestore(&ha->vport_slock, flags);
9475
9476 qla2x00_vp_abort_isp(vp);
9477
9478 spin_lock_irqsave(&ha->vport_slock, flags);
9479 atomic_dec(&vp->vref_count);
9480 }
9481 }
9482 spin_unlock_irqrestore(&ha->vport_slock, flags);
9483
9484 } else {
9485 ql_log(ql_log_warn, vha, 0x8016,
9486 "qla82xx_restart_isp **** FAILED ****.\n");
9487 }
9488
9489 return status;
9490 }
9491
9492 /*
9493 * qla24xx_get_fcp_prio
9494 * Gets the fcp cmd priority value for the logged in port.
9495 * Looks for a match of the port descriptors within
9496 * each of the fcp prio config entries. If a match is found,
9497 * the tag (priority) value is returned.
9498 *
9499 * Input:
9500 * vha = scsi host structure pointer.
9501 * fcport = port structure pointer.
9502 *
9503 * Return:
9504 * non-zero (if found)
9505 * -1 (if not found)
9506 *
9507 * Context:
9508 * Kernel context
9509 */
9510 static int
qla24xx_get_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)9511 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9512 {
9513 int i, entries;
9514 uint8_t pid_match, wwn_match;
9515 int priority;
9516 uint32_t pid1, pid2;
9517 uint64_t wwn1, wwn2;
9518 struct qla_fcp_prio_entry *pri_entry;
9519 struct qla_hw_data *ha = vha->hw;
9520
9521 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
9522 return -1;
9523
9524 priority = -1;
9525 entries = ha->fcp_prio_cfg->num_entries;
9526 pri_entry = &ha->fcp_prio_cfg->entry[0];
9527
9528 for (i = 0; i < entries; i++) {
9529 pid_match = wwn_match = 0;
9530
9531 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
9532 pri_entry++;
9533 continue;
9534 }
9535
9536 /* check source pid for a match */
9537 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
9538 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
9539 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
9540 if (pid1 == INVALID_PORT_ID)
9541 pid_match++;
9542 else if (pid1 == pid2)
9543 pid_match++;
9544 }
9545
9546 /* check destination pid for a match */
9547 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
9548 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
9549 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
9550 if (pid1 == INVALID_PORT_ID)
9551 pid_match++;
9552 else if (pid1 == pid2)
9553 pid_match++;
9554 }
9555
9556 /* check source WWN for a match */
9557 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
9558 wwn1 = wwn_to_u64(vha->port_name);
9559 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
9560 if (wwn2 == (uint64_t)-1)
9561 wwn_match++;
9562 else if (wwn1 == wwn2)
9563 wwn_match++;
9564 }
9565
9566 /* check destination WWN for a match */
9567 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
9568 wwn1 = wwn_to_u64(fcport->port_name);
9569 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
9570 if (wwn2 == (uint64_t)-1)
9571 wwn_match++;
9572 else if (wwn1 == wwn2)
9573 wwn_match++;
9574 }
9575
9576 if (pid_match == 2 || wwn_match == 2) {
9577 /* Found a matching entry */
9578 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
9579 priority = pri_entry->tag;
9580 break;
9581 }
9582
9583 pri_entry++;
9584 }
9585
9586 return priority;
9587 }
9588
9589 /*
9590 * qla24xx_update_fcport_fcp_prio
9591 * Activates fcp priority for the logged in fc port
9592 *
9593 * Input:
9594 * vha = scsi host structure pointer.
9595 * fcp = port structure pointer.
9596 *
9597 * Return:
9598 * QLA_SUCCESS or QLA_FUNCTION_FAILED
9599 *
9600 * Context:
9601 * Kernel context.
9602 */
9603 int
qla24xx_update_fcport_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)9604 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
9605 {
9606 int ret;
9607 int priority;
9608 uint16_t mb[5];
9609
9610 if (fcport->port_type != FCT_TARGET ||
9611 fcport->loop_id == FC_NO_LOOP_ID)
9612 return QLA_FUNCTION_FAILED;
9613
9614 priority = qla24xx_get_fcp_prio(vha, fcport);
9615 if (priority < 0)
9616 return QLA_FUNCTION_FAILED;
9617
9618 if (IS_P3P_TYPE(vha->hw)) {
9619 fcport->fcp_prio = priority & 0xf;
9620 return QLA_SUCCESS;
9621 }
9622
9623 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
9624 if (ret == QLA_SUCCESS) {
9625 if (fcport->fcp_prio != priority)
9626 ql_dbg(ql_dbg_user, vha, 0x709e,
9627 "Updated FCP_CMND priority - value=%d loop_id=%d "
9628 "port_id=%02x%02x%02x.\n", priority,
9629 fcport->loop_id, fcport->d_id.b.domain,
9630 fcport->d_id.b.area, fcport->d_id.b.al_pa);
9631 fcport->fcp_prio = priority & 0xf;
9632 } else
9633 ql_dbg(ql_dbg_user, vha, 0x704f,
9634 "Unable to update FCP_CMND priority - ret=0x%x for "
9635 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
9636 fcport->d_id.b.domain, fcport->d_id.b.area,
9637 fcport->d_id.b.al_pa);
9638 return ret;
9639 }
9640
9641 /*
9642 * qla24xx_update_all_fcp_prio
9643 * Activates fcp priority for all the logged in ports
9644 *
9645 * Input:
9646 * ha = adapter block pointer.
9647 *
9648 * Return:
9649 * QLA_SUCCESS or QLA_FUNCTION_FAILED
9650 *
9651 * Context:
9652 * Kernel context.
9653 */
9654 int
qla24xx_update_all_fcp_prio(scsi_qla_host_t * vha)9655 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
9656 {
9657 int ret;
9658 fc_port_t *fcport;
9659
9660 ret = QLA_FUNCTION_FAILED;
9661 /* We need to set priority for all logged in ports */
9662 list_for_each_entry(fcport, &vha->vp_fcports, list)
9663 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
9664
9665 return ret;
9666 }
9667
qla2xxx_create_qpair(struct scsi_qla_host * vha,int qos,int vp_idx,bool startqp)9668 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
9669 int vp_idx, bool startqp)
9670 {
9671 int rsp_id = 0;
9672 int req_id = 0;
9673 int i;
9674 struct qla_hw_data *ha = vha->hw;
9675 uint16_t qpair_id = 0;
9676 struct qla_qpair *qpair = NULL;
9677 struct qla_msix_entry *msix;
9678
9679 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
9680 ql_log(ql_log_warn, vha, 0x00181,
9681 "FW/Driver is not multi-queue capable.\n");
9682 return NULL;
9683 }
9684
9685 if (ql2xmqsupport || ql2xnvmeenable) {
9686 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
9687 if (qpair == NULL) {
9688 ql_log(ql_log_warn, vha, 0x0182,
9689 "Failed to allocate memory for queue pair.\n");
9690 return NULL;
9691 }
9692
9693 qpair->hw = vha->hw;
9694 qpair->vha = vha;
9695 qpair->qp_lock_ptr = &qpair->qp_lock;
9696 spin_lock_init(&qpair->qp_lock);
9697 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
9698
9699 /* Assign available que pair id */
9700 mutex_lock(&ha->mq_lock);
9701 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
9702 if (ha->num_qpairs >= ha->max_qpairs) {
9703 mutex_unlock(&ha->mq_lock);
9704 ql_log(ql_log_warn, vha, 0x0183,
9705 "No resources to create additional q pair.\n");
9706 goto fail_qid_map;
9707 }
9708 ha->num_qpairs++;
9709 set_bit(qpair_id, ha->qpair_qid_map);
9710 ha->queue_pair_map[qpair_id] = qpair;
9711 qpair->id = qpair_id;
9712 qpair->vp_idx = vp_idx;
9713 qpair->fw_started = ha->flags.fw_started;
9714 INIT_LIST_HEAD(&qpair->hints_list);
9715 INIT_LIST_HEAD(&qpair->dsd_list);
9716 qpair->chip_reset = ha->base_qpair->chip_reset;
9717 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
9718 qpair->enable_explicit_conf =
9719 ha->base_qpair->enable_explicit_conf;
9720
9721 for (i = 0; i < ha->msix_count; i++) {
9722 msix = &ha->msix_entries[i];
9723 if (msix->in_use)
9724 continue;
9725 qpair->msix = msix;
9726 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
9727 "Vector %x selected for qpair\n", msix->vector);
9728 break;
9729 }
9730 if (!qpair->msix) {
9731 ql_log(ql_log_warn, vha, 0x0184,
9732 "Out of MSI-X vectors!.\n");
9733 goto fail_msix;
9734 }
9735
9736 qpair->msix->in_use = 1;
9737 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
9738 qpair->pdev = ha->pdev;
9739 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
9740 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
9741
9742 mutex_unlock(&ha->mq_lock);
9743
9744 /* Create response queue first */
9745 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
9746 if (!rsp_id) {
9747 ql_log(ql_log_warn, vha, 0x0185,
9748 "Failed to create response queue.\n");
9749 goto fail_rsp;
9750 }
9751
9752 qpair->rsp = ha->rsp_q_map[rsp_id];
9753
9754 /* Create request queue */
9755 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
9756 startqp);
9757 if (!req_id) {
9758 ql_log(ql_log_warn, vha, 0x0186,
9759 "Failed to create request queue.\n");
9760 goto fail_req;
9761 }
9762
9763 qpair->req = ha->req_q_map[req_id];
9764 qpair->rsp->req = qpair->req;
9765 qpair->rsp->qpair = qpair;
9766
9767 if (!qpair->cpu_mapped)
9768 qla_cpu_update(qpair, raw_smp_processor_id());
9769
9770 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
9771 if (ha->fw_attributes & BIT_4)
9772 qpair->difdix_supported = 1;
9773 }
9774
9775 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
9776 if (!qpair->srb_mempool) {
9777 ql_log(ql_log_warn, vha, 0xd036,
9778 "Failed to create srb mempool for qpair %d\n",
9779 qpair->id);
9780 goto fail_mempool;
9781 }
9782
9783 if (qla_create_buf_pool(vha, qpair)) {
9784 ql_log(ql_log_warn, vha, 0xd036,
9785 "Failed to initialize buf pool for qpair %d\n",
9786 qpair->id);
9787 goto fail_bufpool;
9788 }
9789
9790 /* Mark as online */
9791 qpair->online = 1;
9792
9793 if (!vha->flags.qpairs_available)
9794 vha->flags.qpairs_available = 1;
9795
9796 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
9797 "Request/Response queue pair created, id %d\n",
9798 qpair->id);
9799 ql_dbg(ql_dbg_init, vha, 0x0187,
9800 "Request/Response queue pair created, id %d\n",
9801 qpair->id);
9802 }
9803 return qpair;
9804
9805 fail_bufpool:
9806 mempool_destroy(qpair->srb_mempool);
9807 fail_mempool:
9808 qla25xx_delete_req_que(vha, qpair->req);
9809 fail_req:
9810 qla25xx_delete_rsp_que(vha, qpair->rsp);
9811 fail_rsp:
9812 mutex_lock(&ha->mq_lock);
9813 qpair->msix->in_use = 0;
9814 list_del(&qpair->qp_list_elem);
9815 if (list_empty(&vha->qp_list))
9816 vha->flags.qpairs_available = 0;
9817 fail_msix:
9818 ha->queue_pair_map[qpair_id] = NULL;
9819 clear_bit(qpair_id, ha->qpair_qid_map);
9820 ha->num_qpairs--;
9821 mutex_unlock(&ha->mq_lock);
9822 fail_qid_map:
9823 kfree(qpair);
9824 return NULL;
9825 }
9826
qla2xxx_delete_qpair(struct scsi_qla_host * vha,struct qla_qpair * qpair)9827 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9828 {
9829 int ret = QLA_FUNCTION_FAILED;
9830 struct qla_hw_data *ha = qpair->hw;
9831
9832 qpair->delete_in_progress = 1;
9833
9834 qla_free_buf_pool(qpair);
9835
9836 ret = qla25xx_delete_req_que(vha, qpair->req);
9837 if (ret != QLA_SUCCESS)
9838 goto fail;
9839
9840 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9841 if (ret != QLA_SUCCESS)
9842 goto fail;
9843
9844 if (!list_empty(&qpair->dsd_list)) {
9845 struct dsd_dma *dsd_ptr, *tdsd_ptr;
9846
9847 /* clean up allocated prev pool */
9848 list_for_each_entry_safe(dsd_ptr, tdsd_ptr,
9849 &qpair->dsd_list, list) {
9850 dma_pool_free(ha->dl_dma_pool, dsd_ptr->dsd_addr,
9851 dsd_ptr->dsd_list_dma);
9852 list_del(&dsd_ptr->list);
9853 kfree(dsd_ptr);
9854 }
9855 }
9856
9857 mutex_lock(&ha->mq_lock);
9858 ha->queue_pair_map[qpair->id] = NULL;
9859 clear_bit(qpair->id, ha->qpair_qid_map);
9860 ha->num_qpairs--;
9861 list_del(&qpair->qp_list_elem);
9862 if (list_empty(&vha->qp_list)) {
9863 vha->flags.qpairs_available = 0;
9864 vha->flags.qpairs_req_created = 0;
9865 vha->flags.qpairs_rsp_created = 0;
9866 }
9867 mempool_destroy(qpair->srb_mempool);
9868 kfree(qpair);
9869 mutex_unlock(&ha->mq_lock);
9870
9871 return QLA_SUCCESS;
9872 fail:
9873 return ret;
9874 }
9875
9876 uint64_t
qla2x00_count_set_bits(uint32_t num)9877 qla2x00_count_set_bits(uint32_t num)
9878 {
9879 /* Brian Kernighan's Algorithm */
9880 u64 count = 0;
9881
9882 while (num) {
9883 num &= (num - 1);
9884 count++;
9885 }
9886 return count;
9887 }
9888
9889 uint64_t
qla2x00_get_num_tgts(scsi_qla_host_t * vha)9890 qla2x00_get_num_tgts(scsi_qla_host_t *vha)
9891 {
9892 fc_port_t *f, *tf;
9893 u64 count = 0;
9894
9895 f = NULL;
9896 tf = NULL;
9897
9898 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
9899 if (f->port_type != FCT_TARGET)
9900 continue;
9901 count++;
9902 }
9903 return count;
9904 }
9905
qla2xxx_reset_stats(struct Scsi_Host * host,u32 flags)9906 int qla2xxx_reset_stats(struct Scsi_Host *host, u32 flags)
9907 {
9908 scsi_qla_host_t *vha = shost_priv(host);
9909 fc_port_t *fcport = NULL;
9910 unsigned long int_flags;
9911
9912 if (flags & QLA2XX_HW_ERROR)
9913 vha->hw_err_cnt = 0;
9914 if (flags & QLA2XX_SHT_LNK_DWN)
9915 vha->short_link_down_cnt = 0;
9916 if (flags & QLA2XX_INT_ERR)
9917 vha->interface_err_cnt = 0;
9918 if (flags & QLA2XX_CMD_TIMEOUT)
9919 vha->cmd_timeout_cnt = 0;
9920 if (flags & QLA2XX_RESET_CMD_ERR)
9921 vha->reset_cmd_err_cnt = 0;
9922 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
9923 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
9924 list_for_each_entry(fcport, &vha->vp_fcports, list) {
9925 fcport->tgt_short_link_down_cnt = 0;
9926 fcport->tgt_link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
9927 }
9928 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags);
9929 }
9930 vha->link_down_time = QLA2XX_MAX_LINK_DOWN_TIME;
9931 return 0;
9932 }
9933
qla2xxx_start_stats(struct Scsi_Host * host,u32 flags)9934 int qla2xxx_start_stats(struct Scsi_Host *host, u32 flags)
9935 {
9936 return qla2xxx_reset_stats(host, flags);
9937 }
9938
qla2xxx_stop_stats(struct Scsi_Host * host,u32 flags)9939 int qla2xxx_stop_stats(struct Scsi_Host *host, u32 flags)
9940 {
9941 return qla2xxx_reset_stats(host, flags);
9942 }
9943
qla2xxx_get_ini_stats(struct Scsi_Host * host,u32 flags,void * data,u64 size)9944 int qla2xxx_get_ini_stats(struct Scsi_Host *host, u32 flags,
9945 void *data, u64 size)
9946 {
9947 scsi_qla_host_t *vha = shost_priv(host);
9948 struct ql_vnd_host_stats_resp *resp = (struct ql_vnd_host_stats_resp *)data;
9949 struct ql_vnd_stats *rsp_data = &resp->stats;
9950 u64 ini_entry_count = 0;
9951 u64 i = 0;
9952 u64 entry_count = 0;
9953 u64 num_tgt = 0;
9954 u32 tmp_stat_type = 0;
9955 fc_port_t *fcport = NULL;
9956 unsigned long int_flags;
9957
9958 /* Copy stat type to work on it */
9959 tmp_stat_type = flags;
9960
9961 if (tmp_stat_type & BIT_17) {
9962 num_tgt = qla2x00_get_num_tgts(vha);
9963 /* unset BIT_17 */
9964 tmp_stat_type &= ~(1 << 17);
9965 }
9966 ini_entry_count = qla2x00_count_set_bits(tmp_stat_type);
9967
9968 entry_count = ini_entry_count + num_tgt;
9969
9970 rsp_data->entry_count = entry_count;
9971
9972 i = 0;
9973 if (flags & QLA2XX_HW_ERROR) {
9974 rsp_data->entry[i].stat_type = QLA2XX_HW_ERROR;
9975 rsp_data->entry[i].tgt_num = 0x0;
9976 rsp_data->entry[i].cnt = vha->hw_err_cnt;
9977 i++;
9978 }
9979
9980 if (flags & QLA2XX_SHT_LNK_DWN) {
9981 rsp_data->entry[i].stat_type = QLA2XX_SHT_LNK_DWN;
9982 rsp_data->entry[i].tgt_num = 0x0;
9983 rsp_data->entry[i].cnt = vha->short_link_down_cnt;
9984 i++;
9985 }
9986
9987 if (flags & QLA2XX_INT_ERR) {
9988 rsp_data->entry[i].stat_type = QLA2XX_INT_ERR;
9989 rsp_data->entry[i].tgt_num = 0x0;
9990 rsp_data->entry[i].cnt = vha->interface_err_cnt;
9991 i++;
9992 }
9993
9994 if (flags & QLA2XX_CMD_TIMEOUT) {
9995 rsp_data->entry[i].stat_type = QLA2XX_CMD_TIMEOUT;
9996 rsp_data->entry[i].tgt_num = 0x0;
9997 rsp_data->entry[i].cnt = vha->cmd_timeout_cnt;
9998 i++;
9999 }
10000
10001 if (flags & QLA2XX_RESET_CMD_ERR) {
10002 rsp_data->entry[i].stat_type = QLA2XX_RESET_CMD_ERR;
10003 rsp_data->entry[i].tgt_num = 0x0;
10004 rsp_data->entry[i].cnt = vha->reset_cmd_err_cnt;
10005 i++;
10006 }
10007
10008 /* i will continue from previous loop, as target
10009 * entries are after initiator
10010 */
10011 if (flags & QLA2XX_TGT_SHT_LNK_DOWN) {
10012 spin_lock_irqsave(&vha->hw->tgt.sess_lock, int_flags);
10013 list_for_each_entry(fcport, &vha->vp_fcports, list) {
10014 if (fcport->port_type != FCT_TARGET)
10015 continue;
10016 if (!fcport->rport)
10017 continue;
10018 rsp_data->entry[i].stat_type = QLA2XX_TGT_SHT_LNK_DOWN;
10019 rsp_data->entry[i].tgt_num = fcport->rport->number;
10020 rsp_data->entry[i].cnt = fcport->tgt_short_link_down_cnt;
10021 i++;
10022 }
10023 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, int_flags);
10024 }
10025 resp->status = EXT_STATUS_OK;
10026
10027 return 0;
10028 }
10029
qla2xxx_get_tgt_stats(struct Scsi_Host * host,u32 flags,struct fc_rport * rport,void * data,u64 size)10030 int qla2xxx_get_tgt_stats(struct Scsi_Host *host, u32 flags,
10031 struct fc_rport *rport, void *data, u64 size)
10032 {
10033 struct ql_vnd_tgt_stats_resp *tgt_data = data;
10034 fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
10035
10036 tgt_data->status = 0;
10037 tgt_data->stats.entry_count = 1;
10038 tgt_data->stats.entry[0].stat_type = flags;
10039 tgt_data->stats.entry[0].tgt_num = rport->number;
10040 tgt_data->stats.entry[0].cnt = fcport->tgt_short_link_down_cnt;
10041
10042 return 0;
10043 }
10044
qla2xxx_disable_port(struct Scsi_Host * host)10045 int qla2xxx_disable_port(struct Scsi_Host *host)
10046 {
10047 scsi_qla_host_t *vha = shost_priv(host);
10048
10049 vha->hw->flags.port_isolated = 1;
10050
10051 if (qla2x00_isp_reg_stat(vha->hw)) {
10052 ql_log(ql_log_info, vha, 0x9006,
10053 "PCI/Register disconnect, exiting.\n");
10054 qla_pci_set_eeh_busy(vha);
10055 return FAILED;
10056 }
10057 if (qla2x00_chip_is_down(vha))
10058 return 0;
10059
10060 if (vha->flags.online) {
10061 qla2x00_abort_isp_cleanup(vha);
10062 qla2x00_wait_for_sess_deletion(vha);
10063 }
10064
10065 return 0;
10066 }
10067
qla2xxx_enable_port(struct Scsi_Host * host)10068 int qla2xxx_enable_port(struct Scsi_Host *host)
10069 {
10070 scsi_qla_host_t *vha = shost_priv(host);
10071
10072 if (qla2x00_isp_reg_stat(vha->hw)) {
10073 ql_log(ql_log_info, vha, 0x9001,
10074 "PCI/Register disconnect, exiting.\n");
10075 qla_pci_set_eeh_busy(vha);
10076 return FAILED;
10077 }
10078
10079 vha->hw->flags.port_isolated = 0;
10080 /* Set the flag to 1, so that isp_abort can proceed */
10081 vha->flags.online = 1;
10082 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
10083 qla2xxx_wake_dpc(vha);
10084
10085 return 0;
10086 }
10087