109c434b8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
24f672ce2SGeert Uytterhoeven /*
34f672ce2SGeert Uytterhoeven * Ricoh RP5C01 RTC Driver
44f672ce2SGeert Uytterhoeven *
54f672ce2SGeert Uytterhoeven * Copyright 2009 Geert Uytterhoeven
64f672ce2SGeert Uytterhoeven *
74f672ce2SGeert Uytterhoeven * Based on the A3000 TOD code in arch/m68k/amiga/config.c
84f672ce2SGeert Uytterhoeven * Copyright (C) 1993 Hamish Macdonald
94f672ce2SGeert Uytterhoeven */
104f672ce2SGeert Uytterhoeven
114f672ce2SGeert Uytterhoeven #include <linux/io.h>
124f672ce2SGeert Uytterhoeven #include <linux/kernel.h>
134f672ce2SGeert Uytterhoeven #include <linux/module.h>
144f672ce2SGeert Uytterhoeven #include <linux/platform_device.h>
154f672ce2SGeert Uytterhoeven #include <linux/rtc.h>
165a0e3ad6STejun Heo #include <linux/slab.h>
174f672ce2SGeert Uytterhoeven
184f672ce2SGeert Uytterhoeven
194f672ce2SGeert Uytterhoeven enum {
204f672ce2SGeert Uytterhoeven RP5C01_1_SECOND = 0x0, /* MODE 00 */
214f672ce2SGeert Uytterhoeven RP5C01_10_SECOND = 0x1, /* MODE 00 */
224f672ce2SGeert Uytterhoeven RP5C01_1_MINUTE = 0x2, /* MODE 00 and MODE 01 */
234f672ce2SGeert Uytterhoeven RP5C01_10_MINUTE = 0x3, /* MODE 00 and MODE 01 */
244f672ce2SGeert Uytterhoeven RP5C01_1_HOUR = 0x4, /* MODE 00 and MODE 01 */
254f672ce2SGeert Uytterhoeven RP5C01_10_HOUR = 0x5, /* MODE 00 and MODE 01 */
264f672ce2SGeert Uytterhoeven RP5C01_DAY_OF_WEEK = 0x6, /* MODE 00 and MODE 01 */
274f672ce2SGeert Uytterhoeven RP5C01_1_DAY = 0x7, /* MODE 00 and MODE 01 */
284f672ce2SGeert Uytterhoeven RP5C01_10_DAY = 0x8, /* MODE 00 and MODE 01 */
294f672ce2SGeert Uytterhoeven RP5C01_1_MONTH = 0x9, /* MODE 00 */
304f672ce2SGeert Uytterhoeven RP5C01_10_MONTH = 0xa, /* MODE 00 */
314f672ce2SGeert Uytterhoeven RP5C01_1_YEAR = 0xb, /* MODE 00 */
324f672ce2SGeert Uytterhoeven RP5C01_10_YEAR = 0xc, /* MODE 00 */
334f672ce2SGeert Uytterhoeven
344f672ce2SGeert Uytterhoeven RP5C01_12_24_SELECT = 0xa, /* MODE 01 */
354f672ce2SGeert Uytterhoeven RP5C01_LEAP_YEAR = 0xb, /* MODE 01 */
364f672ce2SGeert Uytterhoeven
374f672ce2SGeert Uytterhoeven RP5C01_MODE = 0xd, /* all modes */
384f672ce2SGeert Uytterhoeven RP5C01_TEST = 0xe, /* all modes */
394f672ce2SGeert Uytterhoeven RP5C01_RESET = 0xf, /* all modes */
404f672ce2SGeert Uytterhoeven };
414f672ce2SGeert Uytterhoeven
424f672ce2SGeert Uytterhoeven #define RP5C01_12_24_SELECT_12 (0 << 0)
434f672ce2SGeert Uytterhoeven #define RP5C01_12_24_SELECT_24 (1 << 0)
444f672ce2SGeert Uytterhoeven
454f672ce2SGeert Uytterhoeven #define RP5C01_10_HOUR_AM (0 << 1)
464f672ce2SGeert Uytterhoeven #define RP5C01_10_HOUR_PM (1 << 1)
474f672ce2SGeert Uytterhoeven
484f672ce2SGeert Uytterhoeven #define RP5C01_MODE_TIMER_EN (1 << 3) /* timer enable */
494f672ce2SGeert Uytterhoeven #define RP5C01_MODE_ALARM_EN (1 << 2) /* alarm enable */
504f672ce2SGeert Uytterhoeven
514f672ce2SGeert Uytterhoeven #define RP5C01_MODE_MODE_MASK (3 << 0)
524f672ce2SGeert Uytterhoeven #define RP5C01_MODE_MODE00 (0 << 0) /* time */
534f672ce2SGeert Uytterhoeven #define RP5C01_MODE_MODE01 (1 << 0) /* alarm, 12h/24h, leap year */
544f672ce2SGeert Uytterhoeven #define RP5C01_MODE_RAM_BLOCK10 (2 << 0) /* RAM 4 bits x 13 */
554f672ce2SGeert Uytterhoeven #define RP5C01_MODE_RAM_BLOCK11 (3 << 0) /* RAM 4 bits x 13 */
564f672ce2SGeert Uytterhoeven
574f672ce2SGeert Uytterhoeven #define RP5C01_RESET_1HZ_PULSE (1 << 3)
584f672ce2SGeert Uytterhoeven #define RP5C01_RESET_16HZ_PULSE (1 << 2)
594f672ce2SGeert Uytterhoeven #define RP5C01_RESET_SECOND (1 << 1) /* reset divider stages for */
604f672ce2SGeert Uytterhoeven /* seconds or smaller units */
614f672ce2SGeert Uytterhoeven #define RP5C01_RESET_ALARM (1 << 0) /* reset all alarm registers */
624f672ce2SGeert Uytterhoeven
634f672ce2SGeert Uytterhoeven
644f672ce2SGeert Uytterhoeven struct rp5c01_priv {
654f672ce2SGeert Uytterhoeven u32 __iomem *regs;
664f672ce2SGeert Uytterhoeven struct rtc_device *rtc;
6722e3d631SGeert Uytterhoeven spinlock_t lock; /* against concurrent RTC/NVRAM access */
684f672ce2SGeert Uytterhoeven };
694f672ce2SGeert Uytterhoeven
rp5c01_read(struct rp5c01_priv * priv,unsigned int reg)704f672ce2SGeert Uytterhoeven static inline unsigned int rp5c01_read(struct rp5c01_priv *priv,
714f672ce2SGeert Uytterhoeven unsigned int reg)
724f672ce2SGeert Uytterhoeven {
734f672ce2SGeert Uytterhoeven return __raw_readl(&priv->regs[reg]) & 0xf;
744f672ce2SGeert Uytterhoeven }
754f672ce2SGeert Uytterhoeven
rp5c01_write(struct rp5c01_priv * priv,unsigned int val,unsigned int reg)764f672ce2SGeert Uytterhoeven static inline void rp5c01_write(struct rp5c01_priv *priv, unsigned int val,
774f672ce2SGeert Uytterhoeven unsigned int reg)
784f672ce2SGeert Uytterhoeven {
79d8ce1481SJohn Stultz __raw_writel(val, &priv->regs[reg]);
804f672ce2SGeert Uytterhoeven }
814f672ce2SGeert Uytterhoeven
rp5c01_lock(struct rp5c01_priv * priv)824f672ce2SGeert Uytterhoeven static void rp5c01_lock(struct rp5c01_priv *priv)
834f672ce2SGeert Uytterhoeven {
844f672ce2SGeert Uytterhoeven rp5c01_write(priv, RP5C01_MODE_MODE00, RP5C01_MODE);
854f672ce2SGeert Uytterhoeven }
864f672ce2SGeert Uytterhoeven
rp5c01_unlock(struct rp5c01_priv * priv)874f672ce2SGeert Uytterhoeven static void rp5c01_unlock(struct rp5c01_priv *priv)
884f672ce2SGeert Uytterhoeven {
894f672ce2SGeert Uytterhoeven rp5c01_write(priv, RP5C01_MODE_TIMER_EN | RP5C01_MODE_MODE01,
904f672ce2SGeert Uytterhoeven RP5C01_MODE);
914f672ce2SGeert Uytterhoeven }
924f672ce2SGeert Uytterhoeven
rp5c01_read_time(struct device * dev,struct rtc_time * tm)934f672ce2SGeert Uytterhoeven static int rp5c01_read_time(struct device *dev, struct rtc_time *tm)
944f672ce2SGeert Uytterhoeven {
954f672ce2SGeert Uytterhoeven struct rp5c01_priv *priv = dev_get_drvdata(dev);
964f672ce2SGeert Uytterhoeven
9722e3d631SGeert Uytterhoeven spin_lock_irq(&priv->lock);
984f672ce2SGeert Uytterhoeven rp5c01_lock(priv);
994f672ce2SGeert Uytterhoeven
1004f672ce2SGeert Uytterhoeven tm->tm_sec = rp5c01_read(priv, RP5C01_10_SECOND) * 10 +
1014f672ce2SGeert Uytterhoeven rp5c01_read(priv, RP5C01_1_SECOND);
1024f672ce2SGeert Uytterhoeven tm->tm_min = rp5c01_read(priv, RP5C01_10_MINUTE) * 10 +
1034f672ce2SGeert Uytterhoeven rp5c01_read(priv, RP5C01_1_MINUTE);
1044f672ce2SGeert Uytterhoeven tm->tm_hour = rp5c01_read(priv, RP5C01_10_HOUR) * 10 +
1054f672ce2SGeert Uytterhoeven rp5c01_read(priv, RP5C01_1_HOUR);
1064f672ce2SGeert Uytterhoeven tm->tm_mday = rp5c01_read(priv, RP5C01_10_DAY) * 10 +
1074f672ce2SGeert Uytterhoeven rp5c01_read(priv, RP5C01_1_DAY);
1084f672ce2SGeert Uytterhoeven tm->tm_wday = rp5c01_read(priv, RP5C01_DAY_OF_WEEK);
1094f672ce2SGeert Uytterhoeven tm->tm_mon = rp5c01_read(priv, RP5C01_10_MONTH) * 10 +
1104f672ce2SGeert Uytterhoeven rp5c01_read(priv, RP5C01_1_MONTH) - 1;
1114f672ce2SGeert Uytterhoeven tm->tm_year = rp5c01_read(priv, RP5C01_10_YEAR) * 10 +
1124f672ce2SGeert Uytterhoeven rp5c01_read(priv, RP5C01_1_YEAR);
1134f672ce2SGeert Uytterhoeven if (tm->tm_year <= 69)
1144f672ce2SGeert Uytterhoeven tm->tm_year += 100;
1154f672ce2SGeert Uytterhoeven
1164f672ce2SGeert Uytterhoeven rp5c01_unlock(priv);
11722e3d631SGeert Uytterhoeven spin_unlock_irq(&priv->lock);
1184f672ce2SGeert Uytterhoeven
11922652ba7SAlexandre Belloni return 0;
1204f672ce2SGeert Uytterhoeven }
1214f672ce2SGeert Uytterhoeven
rp5c01_set_time(struct device * dev,struct rtc_time * tm)1224f672ce2SGeert Uytterhoeven static int rp5c01_set_time(struct device *dev, struct rtc_time *tm)
1234f672ce2SGeert Uytterhoeven {
1244f672ce2SGeert Uytterhoeven struct rp5c01_priv *priv = dev_get_drvdata(dev);
1254f672ce2SGeert Uytterhoeven
12622e3d631SGeert Uytterhoeven spin_lock_irq(&priv->lock);
1274f672ce2SGeert Uytterhoeven rp5c01_lock(priv);
1284f672ce2SGeert Uytterhoeven
1294f672ce2SGeert Uytterhoeven rp5c01_write(priv, tm->tm_sec / 10, RP5C01_10_SECOND);
1304f672ce2SGeert Uytterhoeven rp5c01_write(priv, tm->tm_sec % 10, RP5C01_1_SECOND);
1314f672ce2SGeert Uytterhoeven rp5c01_write(priv, tm->tm_min / 10, RP5C01_10_MINUTE);
1324f672ce2SGeert Uytterhoeven rp5c01_write(priv, tm->tm_min % 10, RP5C01_1_MINUTE);
1334f672ce2SGeert Uytterhoeven rp5c01_write(priv, tm->tm_hour / 10, RP5C01_10_HOUR);
1344f672ce2SGeert Uytterhoeven rp5c01_write(priv, tm->tm_hour % 10, RP5C01_1_HOUR);
1354f672ce2SGeert Uytterhoeven rp5c01_write(priv, tm->tm_mday / 10, RP5C01_10_DAY);
1364f672ce2SGeert Uytterhoeven rp5c01_write(priv, tm->tm_mday % 10, RP5C01_1_DAY);
1374f672ce2SGeert Uytterhoeven if (tm->tm_wday != -1)
1384f672ce2SGeert Uytterhoeven rp5c01_write(priv, tm->tm_wday, RP5C01_DAY_OF_WEEK);
1394f672ce2SGeert Uytterhoeven rp5c01_write(priv, (tm->tm_mon + 1) / 10, RP5C01_10_MONTH);
1404f672ce2SGeert Uytterhoeven rp5c01_write(priv, (tm->tm_mon + 1) % 10, RP5C01_1_MONTH);
1414f672ce2SGeert Uytterhoeven if (tm->tm_year >= 100)
1424f672ce2SGeert Uytterhoeven tm->tm_year -= 100;
1434f672ce2SGeert Uytterhoeven rp5c01_write(priv, tm->tm_year / 10, RP5C01_10_YEAR);
1444f672ce2SGeert Uytterhoeven rp5c01_write(priv, tm->tm_year % 10, RP5C01_1_YEAR);
1454f672ce2SGeert Uytterhoeven
1464f672ce2SGeert Uytterhoeven rp5c01_unlock(priv);
14722e3d631SGeert Uytterhoeven spin_unlock_irq(&priv->lock);
1484f672ce2SGeert Uytterhoeven return 0;
1494f672ce2SGeert Uytterhoeven }
1504f672ce2SGeert Uytterhoeven
1514f672ce2SGeert Uytterhoeven static const struct rtc_class_ops rp5c01_rtc_ops = {
1524f672ce2SGeert Uytterhoeven .read_time = rp5c01_read_time,
1534f672ce2SGeert Uytterhoeven .set_time = rp5c01_set_time,
1544f672ce2SGeert Uytterhoeven };
1554f672ce2SGeert Uytterhoeven
15622e3d631SGeert Uytterhoeven
15722e3d631SGeert Uytterhoeven /*
15822e3d631SGeert Uytterhoeven * The NVRAM is organized as 2 blocks of 13 nibbles of 4 bits.
15922e3d631SGeert Uytterhoeven * We provide access to them like AmigaOS does: the high nibble of each 8-bit
16022e3d631SGeert Uytterhoeven * byte is stored in BLOCK10, the low nibble in BLOCK11.
16122e3d631SGeert Uytterhoeven */
16222e3d631SGeert Uytterhoeven
rp5c01_nvram_read(void * _priv,unsigned int pos,void * val,size_t bytes)1637335fb9bSAlexandre Belloni static int rp5c01_nvram_read(void *_priv, unsigned int pos, void *val,
1647335fb9bSAlexandre Belloni size_t bytes)
16522e3d631SGeert Uytterhoeven {
1667335fb9bSAlexandre Belloni struct rp5c01_priv *priv = _priv;
1677335fb9bSAlexandre Belloni u8 *buf = val;
16822e3d631SGeert Uytterhoeven
16922e3d631SGeert Uytterhoeven spin_lock_irq(&priv->lock);
17022e3d631SGeert Uytterhoeven
1717335fb9bSAlexandre Belloni for (; bytes; bytes--) {
17222e3d631SGeert Uytterhoeven u8 data;
17322e3d631SGeert Uytterhoeven
17422e3d631SGeert Uytterhoeven rp5c01_write(priv,
17522e3d631SGeert Uytterhoeven RP5C01_MODE_TIMER_EN | RP5C01_MODE_RAM_BLOCK10,
17622e3d631SGeert Uytterhoeven RP5C01_MODE);
17722e3d631SGeert Uytterhoeven data = rp5c01_read(priv, pos) << 4;
17822e3d631SGeert Uytterhoeven rp5c01_write(priv,
17922e3d631SGeert Uytterhoeven RP5C01_MODE_TIMER_EN | RP5C01_MODE_RAM_BLOCK11,
18022e3d631SGeert Uytterhoeven RP5C01_MODE);
18122e3d631SGeert Uytterhoeven data |= rp5c01_read(priv, pos++);
18222e3d631SGeert Uytterhoeven rp5c01_write(priv, RP5C01_MODE_TIMER_EN | RP5C01_MODE_MODE01,
18322e3d631SGeert Uytterhoeven RP5C01_MODE);
18422e3d631SGeert Uytterhoeven *buf++ = data;
18522e3d631SGeert Uytterhoeven }
18622e3d631SGeert Uytterhoeven
18722e3d631SGeert Uytterhoeven spin_unlock_irq(&priv->lock);
1887335fb9bSAlexandre Belloni return 0;
18922e3d631SGeert Uytterhoeven }
19022e3d631SGeert Uytterhoeven
rp5c01_nvram_write(void * _priv,unsigned int pos,void * val,size_t bytes)1917335fb9bSAlexandre Belloni static int rp5c01_nvram_write(void *_priv, unsigned int pos, void *val,
1927335fb9bSAlexandre Belloni size_t bytes)
19322e3d631SGeert Uytterhoeven {
1947335fb9bSAlexandre Belloni struct rp5c01_priv *priv = _priv;
1957335fb9bSAlexandre Belloni u8 *buf = val;
19622e3d631SGeert Uytterhoeven
19722e3d631SGeert Uytterhoeven spin_lock_irq(&priv->lock);
19822e3d631SGeert Uytterhoeven
1997335fb9bSAlexandre Belloni for (; bytes; bytes--) {
20022e3d631SGeert Uytterhoeven u8 data = *buf++;
20122e3d631SGeert Uytterhoeven
20222e3d631SGeert Uytterhoeven rp5c01_write(priv,
20322e3d631SGeert Uytterhoeven RP5C01_MODE_TIMER_EN | RP5C01_MODE_RAM_BLOCK10,
20422e3d631SGeert Uytterhoeven RP5C01_MODE);
20522e3d631SGeert Uytterhoeven rp5c01_write(priv, data >> 4, pos);
20622e3d631SGeert Uytterhoeven rp5c01_write(priv,
20722e3d631SGeert Uytterhoeven RP5C01_MODE_TIMER_EN | RP5C01_MODE_RAM_BLOCK11,
20822e3d631SGeert Uytterhoeven RP5C01_MODE);
20922e3d631SGeert Uytterhoeven rp5c01_write(priv, data & 0xf, pos++);
21022e3d631SGeert Uytterhoeven rp5c01_write(priv, RP5C01_MODE_TIMER_EN | RP5C01_MODE_MODE01,
21122e3d631SGeert Uytterhoeven RP5C01_MODE);
21222e3d631SGeert Uytterhoeven }
21322e3d631SGeert Uytterhoeven
21422e3d631SGeert Uytterhoeven spin_unlock_irq(&priv->lock);
2157335fb9bSAlexandre Belloni return 0;
21622e3d631SGeert Uytterhoeven }
21722e3d631SGeert Uytterhoeven
rp5c01_rtc_probe(struct platform_device * dev)2184f672ce2SGeert Uytterhoeven static int __init rp5c01_rtc_probe(struct platform_device *dev)
2194f672ce2SGeert Uytterhoeven {
2204f672ce2SGeert Uytterhoeven struct resource *res;
2214f672ce2SGeert Uytterhoeven struct rp5c01_priv *priv;
2224f672ce2SGeert Uytterhoeven struct rtc_device *rtc;
2234f672ce2SGeert Uytterhoeven int error;
2247335fb9bSAlexandre Belloni struct nvmem_config nvmem_cfg = {
2257335fb9bSAlexandre Belloni .name = "rp5c01_nvram",
2267335fb9bSAlexandre Belloni .word_size = 1,
2277335fb9bSAlexandre Belloni .stride = 1,
2287335fb9bSAlexandre Belloni .size = RP5C01_MODE,
2297335fb9bSAlexandre Belloni .reg_read = rp5c01_nvram_read,
2307335fb9bSAlexandre Belloni .reg_write = rp5c01_nvram_write,
2317335fb9bSAlexandre Belloni };
2324f672ce2SGeert Uytterhoeven
2334f672ce2SGeert Uytterhoeven res = platform_get_resource(dev, IORESOURCE_MEM, 0);
2344f672ce2SGeert Uytterhoeven if (!res)
2354f672ce2SGeert Uytterhoeven return -ENODEV;
2364f672ce2SGeert Uytterhoeven
237ddb396f1SJingoo Han priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
2384f672ce2SGeert Uytterhoeven if (!priv)
2394f672ce2SGeert Uytterhoeven return -ENOMEM;
2404f672ce2SGeert Uytterhoeven
241ddb396f1SJingoo Han priv->regs = devm_ioremap(&dev->dev, res->start, resource_size(res));
242ddb396f1SJingoo Han if (!priv->regs)
243ddb396f1SJingoo Han return -ENOMEM;
2444f672ce2SGeert Uytterhoeven
24522e3d631SGeert Uytterhoeven spin_lock_init(&priv->lock);
24622e3d631SGeert Uytterhoeven
247130107b2SJohn Stultz platform_set_drvdata(dev, priv);
248130107b2SJohn Stultz
249bcdd5592SAlexandre Belloni rtc = devm_rtc_allocate_device(&dev->dev);
250a81de207SJingoo Han if (IS_ERR(rtc))
251a81de207SJingoo Han return PTR_ERR(rtc);
252bcdd5592SAlexandre Belloni
253bcdd5592SAlexandre Belloni rtc->ops = &rp5c01_rtc_ops;
254bcdd5592SAlexandre Belloni
2554f672ce2SGeert Uytterhoeven priv->rtc = rtc;
25622e3d631SGeert Uytterhoeven
2577335fb9bSAlexandre Belloni nvmem_cfg.priv = priv;
2583a905c2dSBartosz Golaszewski error = devm_rtc_nvmem_register(rtc, &nvmem_cfg);
25922e3d631SGeert Uytterhoeven if (error)
260a81de207SJingoo Han return error;
26122e3d631SGeert Uytterhoeven
262*fdcfd854SBartosz Golaszewski return devm_rtc_register_device(rtc);
2634f672ce2SGeert Uytterhoeven }
2644f672ce2SGeert Uytterhoeven
2654f672ce2SGeert Uytterhoeven static struct platform_driver rp5c01_rtc_driver = {
2664f672ce2SGeert Uytterhoeven .driver = {
2674f672ce2SGeert Uytterhoeven .name = "rtc-rp5c01",
2684f672ce2SGeert Uytterhoeven },
2694f672ce2SGeert Uytterhoeven };
2704f672ce2SGeert Uytterhoeven
2719842eaffSJingoo Han module_platform_driver_probe(rp5c01_rtc_driver, rp5c01_rtc_probe);
2724f672ce2SGeert Uytterhoeven
2734f672ce2SGeert Uytterhoeven MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>");
2744f672ce2SGeert Uytterhoeven MODULE_LICENSE("GPL");
2754f672ce2SGeert Uytterhoeven MODULE_DESCRIPTION("Ricoh RP5C01 RTC driver");
2764f672ce2SGeert Uytterhoeven MODULE_ALIAS("platform:rtc-rp5c01");
277