1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996 4 * 5 * Copyright (C) 2016 Linaro Ltd 6 * Copyright (C) 2014 Sony Mobile Communications AB 7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. 8 */ 9 10 #include <linux/clk.h> 11 #include <linux/delay.h> 12 #include <linux/firmware.h> 13 #include <linux/interrupt.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/of.h> 17 #include <linux/of_address.h> 18 #include <linux/of_reserved_mem.h> 19 #include <linux/platform_device.h> 20 #include <linux/pm_domain.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/firmware/qcom/qcom_scm.h> 23 #include <linux/regulator/consumer.h> 24 #include <linux/remoteproc.h> 25 #include <linux/soc/qcom/mdt_loader.h> 26 #include <linux/soc/qcom/smem.h> 27 #include <linux/soc/qcom/smem_state.h> 28 29 #include "qcom_common.h" 30 #include "qcom_pil_info.h" 31 #include "qcom_q6v5.h" 32 #include "remoteproc_internal.h" 33 34 #define ADSP_DECRYPT_SHUTDOWN_DELAY_MS 100 35 36 #define MAX_ASSIGN_COUNT 3 37 38 struct adsp_data { 39 int crash_reason_smem; 40 const char *firmware_name; 41 const char *dtb_firmware_name; 42 int pas_id; 43 int dtb_pas_id; 44 int lite_pas_id; 45 unsigned int minidump_id; 46 bool auto_boot; 47 bool decrypt_shutdown; 48 49 char **proxy_pd_names; 50 51 const char *load_state; 52 const char *ssr_name; 53 const char *sysmon_name; 54 int ssctl_id; 55 unsigned int smem_host_id; 56 57 int region_assign_idx; 58 int region_assign_count; 59 bool region_assign_shared; 60 int region_assign_vmid; 61 }; 62 63 struct qcom_adsp { 64 struct device *dev; 65 struct rproc *rproc; 66 67 struct qcom_q6v5 q6v5; 68 69 struct clk *xo; 70 struct clk *aggre2_clk; 71 72 struct regulator *cx_supply; 73 struct regulator *px_supply; 74 75 struct device *proxy_pds[3]; 76 77 int proxy_pd_count; 78 79 const char *dtb_firmware_name; 80 int pas_id; 81 int dtb_pas_id; 82 int lite_pas_id; 83 unsigned int minidump_id; 84 int crash_reason_smem; 85 unsigned int smem_host_id; 86 bool decrypt_shutdown; 87 const char *info_name; 88 89 const struct firmware *firmware; 90 const struct firmware *dtb_firmware; 91 92 struct completion start_done; 93 struct completion stop_done; 94 95 phys_addr_t mem_phys; 96 phys_addr_t dtb_mem_phys; 97 phys_addr_t mem_reloc; 98 phys_addr_t dtb_mem_reloc; 99 phys_addr_t region_assign_phys[MAX_ASSIGN_COUNT]; 100 void *mem_region; 101 void *dtb_mem_region; 102 size_t mem_size; 103 size_t dtb_mem_size; 104 size_t region_assign_size[MAX_ASSIGN_COUNT]; 105 106 int region_assign_idx; 107 int region_assign_count; 108 bool region_assign_shared; 109 int region_assign_vmid; 110 u64 region_assign_owners[MAX_ASSIGN_COUNT]; 111 112 struct qcom_rproc_glink glink_subdev; 113 struct qcom_rproc_subdev smd_subdev; 114 struct qcom_rproc_pdm pdm_subdev; 115 struct qcom_rproc_ssr ssr_subdev; 116 struct qcom_sysmon *sysmon; 117 118 struct qcom_scm_pas_metadata pas_metadata; 119 struct qcom_scm_pas_metadata dtb_pas_metadata; 120 }; 121 122 static void adsp_segment_dump(struct rproc *rproc, struct rproc_dump_segment *segment, 123 void *dest, size_t offset, size_t size) 124 { 125 struct qcom_adsp *adsp = rproc->priv; 126 int total_offset; 127 128 total_offset = segment->da + segment->offset + offset - adsp->mem_phys; 129 if (total_offset < 0 || total_offset + size > adsp->mem_size) { 130 dev_err(adsp->dev, 131 "invalid copy request for segment %pad with offset %zu and size %zu)\n", 132 &segment->da, offset, size); 133 memset(dest, 0xff, size); 134 return; 135 } 136 137 memcpy_fromio(dest, adsp->mem_region + total_offset, size); 138 } 139 140 static void adsp_minidump(struct rproc *rproc) 141 { 142 struct qcom_adsp *adsp = rproc->priv; 143 144 if (rproc->dump_conf == RPROC_COREDUMP_DISABLED) 145 return; 146 147 qcom_minidump(rproc, adsp->minidump_id, adsp_segment_dump); 148 } 149 150 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds, 151 size_t pd_count) 152 { 153 int ret; 154 int i; 155 156 for (i = 0; i < pd_count; i++) { 157 dev_pm_genpd_set_performance_state(pds[i], INT_MAX); 158 ret = pm_runtime_get_sync(pds[i]); 159 if (ret < 0) { 160 pm_runtime_put_noidle(pds[i]); 161 dev_pm_genpd_set_performance_state(pds[i], 0); 162 goto unroll_pd_votes; 163 } 164 } 165 166 return 0; 167 168 unroll_pd_votes: 169 for (i--; i >= 0; i--) { 170 dev_pm_genpd_set_performance_state(pds[i], 0); 171 pm_runtime_put(pds[i]); 172 } 173 174 return ret; 175 }; 176 177 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds, 178 size_t pd_count) 179 { 180 int i; 181 182 for (i = 0; i < pd_count; i++) { 183 dev_pm_genpd_set_performance_state(pds[i], 0); 184 pm_runtime_put(pds[i]); 185 } 186 } 187 188 static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp) 189 { 190 unsigned int retry_num = 50; 191 int ret; 192 193 do { 194 msleep(ADSP_DECRYPT_SHUTDOWN_DELAY_MS); 195 ret = qcom_scm_pas_shutdown(adsp->pas_id); 196 } while (ret == -EINVAL && --retry_num); 197 198 return ret; 199 } 200 201 static int adsp_unprepare(struct rproc *rproc) 202 { 203 struct qcom_adsp *adsp = rproc->priv; 204 205 /* 206 * adsp_load() did pass pas_metadata to the SCM driver for storing 207 * metadata context. It might have been released already if 208 * auth_and_reset() was successful, but in other cases clean it up 209 * here. 210 */ 211 qcom_scm_pas_metadata_release(&adsp->pas_metadata); 212 if (adsp->dtb_pas_id) 213 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); 214 215 return 0; 216 } 217 218 static int adsp_load(struct rproc *rproc, const struct firmware *fw) 219 { 220 struct qcom_adsp *adsp = rproc->priv; 221 int ret; 222 223 /* Store firmware handle to be used in adsp_start() */ 224 adsp->firmware = fw; 225 226 if (adsp->lite_pas_id) 227 ret = qcom_scm_pas_shutdown(adsp->lite_pas_id); 228 229 if (adsp->dtb_pas_id) { 230 ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev); 231 if (ret) { 232 dev_err(adsp->dev, "request_firmware failed for %s: %d\n", 233 adsp->dtb_firmware_name, ret); 234 return ret; 235 } 236 237 ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name, 238 adsp->dtb_pas_id, adsp->dtb_mem_phys, 239 &adsp->dtb_pas_metadata); 240 if (ret) 241 goto release_dtb_firmware; 242 243 ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name, 244 adsp->dtb_pas_id, adsp->dtb_mem_region, 245 adsp->dtb_mem_phys, adsp->dtb_mem_size, 246 &adsp->dtb_mem_reloc); 247 if (ret) 248 goto release_dtb_metadata; 249 } 250 251 return 0; 252 253 release_dtb_metadata: 254 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); 255 256 release_dtb_firmware: 257 release_firmware(adsp->dtb_firmware); 258 259 return ret; 260 } 261 262 static int adsp_start(struct rproc *rproc) 263 { 264 struct qcom_adsp *adsp = rproc->priv; 265 int ret; 266 267 ret = qcom_q6v5_prepare(&adsp->q6v5); 268 if (ret) 269 return ret; 270 271 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 272 if (ret < 0) 273 goto disable_irqs; 274 275 ret = clk_prepare_enable(adsp->xo); 276 if (ret) 277 goto disable_proxy_pds; 278 279 ret = clk_prepare_enable(adsp->aggre2_clk); 280 if (ret) 281 goto disable_xo_clk; 282 283 if (adsp->cx_supply) { 284 ret = regulator_enable(adsp->cx_supply); 285 if (ret) 286 goto disable_aggre2_clk; 287 } 288 289 if (adsp->px_supply) { 290 ret = regulator_enable(adsp->px_supply); 291 if (ret) 292 goto disable_cx_supply; 293 } 294 295 if (adsp->dtb_pas_id) { 296 ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id); 297 if (ret) { 298 dev_err(adsp->dev, 299 "failed to authenticate dtb image and release reset\n"); 300 goto disable_px_supply; 301 } 302 } 303 304 ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id, 305 adsp->mem_phys, &adsp->pas_metadata); 306 if (ret) 307 goto disable_px_supply; 308 309 ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id, 310 adsp->mem_region, adsp->mem_phys, adsp->mem_size, 311 &adsp->mem_reloc); 312 if (ret) 313 goto release_pas_metadata; 314 315 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size); 316 317 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id); 318 if (ret) { 319 dev_err(adsp->dev, 320 "failed to authenticate image and release reset\n"); 321 goto release_pas_metadata; 322 } 323 324 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000)); 325 if (ret == -ETIMEDOUT) { 326 dev_err(adsp->dev, "start timed out\n"); 327 qcom_scm_pas_shutdown(adsp->pas_id); 328 goto release_pas_metadata; 329 } 330 331 qcom_scm_pas_metadata_release(&adsp->pas_metadata); 332 if (adsp->dtb_pas_id) 333 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); 334 335 /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */ 336 adsp->firmware = NULL; 337 338 return 0; 339 340 release_pas_metadata: 341 qcom_scm_pas_metadata_release(&adsp->pas_metadata); 342 if (adsp->dtb_pas_id) 343 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); 344 disable_px_supply: 345 if (adsp->px_supply) 346 regulator_disable(adsp->px_supply); 347 disable_cx_supply: 348 if (adsp->cx_supply) 349 regulator_disable(adsp->cx_supply); 350 disable_aggre2_clk: 351 clk_disable_unprepare(adsp->aggre2_clk); 352 disable_xo_clk: 353 clk_disable_unprepare(adsp->xo); 354 disable_proxy_pds: 355 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 356 disable_irqs: 357 qcom_q6v5_unprepare(&adsp->q6v5); 358 359 /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */ 360 adsp->firmware = NULL; 361 362 return ret; 363 } 364 365 static void qcom_pas_handover(struct qcom_q6v5 *q6v5) 366 { 367 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5); 368 369 if (adsp->px_supply) 370 regulator_disable(adsp->px_supply); 371 if (adsp->cx_supply) 372 regulator_disable(adsp->cx_supply); 373 clk_disable_unprepare(adsp->aggre2_clk); 374 clk_disable_unprepare(adsp->xo); 375 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 376 } 377 378 static int adsp_stop(struct rproc *rproc) 379 { 380 struct qcom_adsp *adsp = rproc->priv; 381 int handover; 382 int ret; 383 384 ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon); 385 if (ret == -ETIMEDOUT) 386 dev_err(adsp->dev, "timed out on wait\n"); 387 388 ret = qcom_scm_pas_shutdown(adsp->pas_id); 389 if (ret && adsp->decrypt_shutdown) 390 ret = adsp_shutdown_poll_decrypt(adsp); 391 392 if (ret) 393 dev_err(adsp->dev, "failed to shutdown: %d\n", ret); 394 395 if (adsp->dtb_pas_id) { 396 ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id); 397 if (ret) 398 dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret); 399 } 400 401 handover = qcom_q6v5_unprepare(&adsp->q6v5); 402 if (handover) 403 qcom_pas_handover(&adsp->q6v5); 404 405 if (adsp->smem_host_id) 406 ret = qcom_smem_bust_hwspin_lock_by_host(adsp->smem_host_id); 407 408 return ret; 409 } 410 411 static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem) 412 { 413 struct qcom_adsp *adsp = rproc->priv; 414 int offset; 415 416 offset = da - adsp->mem_reloc; 417 if (offset < 0 || offset + len > adsp->mem_size) 418 return NULL; 419 420 if (is_iomem) 421 *is_iomem = true; 422 423 return adsp->mem_region + offset; 424 } 425 426 static unsigned long adsp_panic(struct rproc *rproc) 427 { 428 struct qcom_adsp *adsp = rproc->priv; 429 430 return qcom_q6v5_panic(&adsp->q6v5); 431 } 432 433 static const struct rproc_ops adsp_ops = { 434 .unprepare = adsp_unprepare, 435 .start = adsp_start, 436 .stop = adsp_stop, 437 .da_to_va = adsp_da_to_va, 438 .parse_fw = qcom_register_dump_segments, 439 .load = adsp_load, 440 .panic = adsp_panic, 441 }; 442 443 static const struct rproc_ops adsp_minidump_ops = { 444 .unprepare = adsp_unprepare, 445 .start = adsp_start, 446 .stop = adsp_stop, 447 .da_to_va = adsp_da_to_va, 448 .parse_fw = qcom_register_dump_segments, 449 .load = adsp_load, 450 .panic = adsp_panic, 451 .coredump = adsp_minidump, 452 }; 453 454 static int adsp_init_clock(struct qcom_adsp *adsp) 455 { 456 int ret; 457 458 adsp->xo = devm_clk_get(adsp->dev, "xo"); 459 if (IS_ERR(adsp->xo)) { 460 ret = PTR_ERR(adsp->xo); 461 if (ret != -EPROBE_DEFER) 462 dev_err(adsp->dev, "failed to get xo clock"); 463 return ret; 464 } 465 466 adsp->aggre2_clk = devm_clk_get_optional(adsp->dev, "aggre2"); 467 if (IS_ERR(adsp->aggre2_clk)) { 468 ret = PTR_ERR(adsp->aggre2_clk); 469 if (ret != -EPROBE_DEFER) 470 dev_err(adsp->dev, 471 "failed to get aggre2 clock"); 472 return ret; 473 } 474 475 return 0; 476 } 477 478 static int adsp_init_regulator(struct qcom_adsp *adsp) 479 { 480 adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx"); 481 if (IS_ERR(adsp->cx_supply)) { 482 if (PTR_ERR(adsp->cx_supply) == -ENODEV) 483 adsp->cx_supply = NULL; 484 else 485 return PTR_ERR(adsp->cx_supply); 486 } 487 488 if (adsp->cx_supply) 489 regulator_set_load(adsp->cx_supply, 100000); 490 491 adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px"); 492 if (IS_ERR(adsp->px_supply)) { 493 if (PTR_ERR(adsp->px_supply) == -ENODEV) 494 adsp->px_supply = NULL; 495 else 496 return PTR_ERR(adsp->px_supply); 497 } 498 499 return 0; 500 } 501 502 static int adsp_pds_attach(struct device *dev, struct device **devs, 503 char **pd_names) 504 { 505 size_t num_pds = 0; 506 int ret; 507 int i; 508 509 if (!pd_names) 510 return 0; 511 512 /* Handle single power domain */ 513 if (dev->pm_domain) { 514 devs[0] = dev; 515 pm_runtime_enable(dev); 516 return 1; 517 } 518 519 while (pd_names[num_pds]) 520 num_pds++; 521 522 for (i = 0; i < num_pds; i++) { 523 devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]); 524 if (IS_ERR_OR_NULL(devs[i])) { 525 ret = PTR_ERR(devs[i]) ? : -ENODATA; 526 goto unroll_attach; 527 } 528 } 529 530 return num_pds; 531 532 unroll_attach: 533 for (i--; i >= 0; i--) 534 dev_pm_domain_detach(devs[i], false); 535 536 return ret; 537 }; 538 539 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds, 540 size_t pd_count) 541 { 542 struct device *dev = adsp->dev; 543 int i; 544 545 /* Handle single power domain */ 546 if (dev->pm_domain && pd_count) { 547 pm_runtime_disable(dev); 548 return; 549 } 550 551 for (i = 0; i < pd_count; i++) 552 dev_pm_domain_detach(pds[i], false); 553 } 554 555 static int adsp_alloc_memory_region(struct qcom_adsp *adsp) 556 { 557 struct reserved_mem *rmem; 558 struct device_node *node; 559 560 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0); 561 if (!node) { 562 dev_err(adsp->dev, "no memory-region specified\n"); 563 return -EINVAL; 564 } 565 566 rmem = of_reserved_mem_lookup(node); 567 of_node_put(node); 568 if (!rmem) { 569 dev_err(adsp->dev, "unable to resolve memory-region\n"); 570 return -EINVAL; 571 } 572 573 adsp->mem_phys = adsp->mem_reloc = rmem->base; 574 adsp->mem_size = rmem->size; 575 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size); 576 if (!adsp->mem_region) { 577 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n", 578 &rmem->base, adsp->mem_size); 579 return -EBUSY; 580 } 581 582 if (!adsp->dtb_pas_id) 583 return 0; 584 585 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1); 586 if (!node) { 587 dev_err(adsp->dev, "no dtb memory-region specified\n"); 588 return -EINVAL; 589 } 590 591 rmem = of_reserved_mem_lookup(node); 592 of_node_put(node); 593 if (!rmem) { 594 dev_err(adsp->dev, "unable to resolve dtb memory-region\n"); 595 return -EINVAL; 596 } 597 598 adsp->dtb_mem_phys = adsp->dtb_mem_reloc = rmem->base; 599 adsp->dtb_mem_size = rmem->size; 600 adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size); 601 if (!adsp->dtb_mem_region) { 602 dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n", 603 &rmem->base, adsp->dtb_mem_size); 604 return -EBUSY; 605 } 606 607 return 0; 608 } 609 610 static int adsp_assign_memory_region(struct qcom_adsp *adsp) 611 { 612 struct qcom_scm_vmperm perm[MAX_ASSIGN_COUNT]; 613 struct device_node *node; 614 unsigned int perm_size; 615 int offset; 616 int ret; 617 618 if (!adsp->region_assign_idx) 619 return 0; 620 621 for (offset = 0; offset < adsp->region_assign_count; ++offset) { 622 struct reserved_mem *rmem = NULL; 623 624 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 625 adsp->region_assign_idx + offset); 626 if (node) 627 rmem = of_reserved_mem_lookup(node); 628 of_node_put(node); 629 if (!rmem) { 630 dev_err(adsp->dev, "unable to resolve shareable memory-region index %d\n", 631 offset); 632 return -EINVAL; 633 } 634 635 if (adsp->region_assign_shared) { 636 perm[0].vmid = QCOM_SCM_VMID_HLOS; 637 perm[0].perm = QCOM_SCM_PERM_RW; 638 perm[1].vmid = adsp->region_assign_vmid; 639 perm[1].perm = QCOM_SCM_PERM_RW; 640 perm_size = 2; 641 } else { 642 perm[0].vmid = adsp->region_assign_vmid; 643 perm[0].perm = QCOM_SCM_PERM_RW; 644 perm_size = 1; 645 } 646 647 adsp->region_assign_phys[offset] = rmem->base; 648 adsp->region_assign_size[offset] = rmem->size; 649 adsp->region_assign_owners[offset] = BIT(QCOM_SCM_VMID_HLOS); 650 651 ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset], 652 adsp->region_assign_size[offset], 653 &adsp->region_assign_owners[offset], 654 perm, perm_size); 655 if (ret < 0) { 656 dev_err(adsp->dev, "assign memory %d failed\n", offset); 657 return ret; 658 } 659 } 660 661 return 0; 662 } 663 664 static void adsp_unassign_memory_region(struct qcom_adsp *adsp) 665 { 666 struct qcom_scm_vmperm perm; 667 int offset; 668 int ret; 669 670 if (!adsp->region_assign_idx || adsp->region_assign_shared) 671 return; 672 673 for (offset = 0; offset < adsp->region_assign_count; ++offset) { 674 perm.vmid = QCOM_SCM_VMID_HLOS; 675 perm.perm = QCOM_SCM_PERM_RW; 676 677 ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset], 678 adsp->region_assign_size[offset], 679 &adsp->region_assign_owners[offset], 680 &perm, 1); 681 if (ret < 0) 682 dev_err(adsp->dev, "unassign memory %d failed\n", offset); 683 } 684 } 685 686 static int adsp_probe(struct platform_device *pdev) 687 { 688 const struct adsp_data *desc; 689 struct qcom_adsp *adsp; 690 struct rproc *rproc; 691 const char *fw_name, *dtb_fw_name = NULL; 692 const struct rproc_ops *ops = &adsp_ops; 693 int ret; 694 695 desc = of_device_get_match_data(&pdev->dev); 696 if (!desc) 697 return -EINVAL; 698 699 if (!qcom_scm_is_available()) 700 return -EPROBE_DEFER; 701 702 fw_name = desc->firmware_name; 703 ret = of_property_read_string(pdev->dev.of_node, "firmware-name", 704 &fw_name); 705 if (ret < 0 && ret != -EINVAL) 706 return ret; 707 708 if (desc->dtb_firmware_name) { 709 dtb_fw_name = desc->dtb_firmware_name; 710 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", 1, 711 &dtb_fw_name); 712 if (ret < 0 && ret != -EINVAL) 713 return ret; 714 } 715 716 if (desc->minidump_id) 717 ops = &adsp_minidump_ops; 718 719 rproc = devm_rproc_alloc(&pdev->dev, pdev->name, ops, fw_name, sizeof(*adsp)); 720 721 if (!rproc) { 722 dev_err(&pdev->dev, "unable to allocate remoteproc\n"); 723 return -ENOMEM; 724 } 725 726 rproc->auto_boot = desc->auto_boot; 727 rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE); 728 729 adsp = rproc->priv; 730 adsp->dev = &pdev->dev; 731 adsp->rproc = rproc; 732 adsp->minidump_id = desc->minidump_id; 733 adsp->pas_id = desc->pas_id; 734 adsp->lite_pas_id = desc->lite_pas_id; 735 adsp->info_name = desc->sysmon_name; 736 adsp->smem_host_id = desc->smem_host_id; 737 adsp->decrypt_shutdown = desc->decrypt_shutdown; 738 adsp->region_assign_idx = desc->region_assign_idx; 739 adsp->region_assign_count = min_t(int, MAX_ASSIGN_COUNT, desc->region_assign_count); 740 adsp->region_assign_vmid = desc->region_assign_vmid; 741 adsp->region_assign_shared = desc->region_assign_shared; 742 if (dtb_fw_name) { 743 adsp->dtb_firmware_name = dtb_fw_name; 744 adsp->dtb_pas_id = desc->dtb_pas_id; 745 } 746 platform_set_drvdata(pdev, adsp); 747 748 ret = device_init_wakeup(adsp->dev, true); 749 if (ret) 750 goto free_rproc; 751 752 ret = adsp_alloc_memory_region(adsp); 753 if (ret) 754 goto free_rproc; 755 756 ret = adsp_assign_memory_region(adsp); 757 if (ret) 758 goto free_rproc; 759 760 ret = adsp_init_clock(adsp); 761 if (ret) 762 goto free_rproc; 763 764 ret = adsp_init_regulator(adsp); 765 if (ret) 766 goto free_rproc; 767 768 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds, 769 desc->proxy_pd_names); 770 if (ret < 0) 771 goto free_rproc; 772 adsp->proxy_pd_count = ret; 773 774 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state, 775 qcom_pas_handover); 776 if (ret) 777 goto detach_proxy_pds; 778 779 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name); 780 qcom_add_smd_subdev(rproc, &adsp->smd_subdev); 781 qcom_add_pdm_subdev(rproc, &adsp->pdm_subdev); 782 adsp->sysmon = qcom_add_sysmon_subdev(rproc, 783 desc->sysmon_name, 784 desc->ssctl_id); 785 if (IS_ERR(adsp->sysmon)) { 786 ret = PTR_ERR(adsp->sysmon); 787 goto detach_proxy_pds; 788 } 789 790 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name); 791 ret = rproc_add(rproc); 792 if (ret) 793 goto detach_proxy_pds; 794 795 return 0; 796 797 detach_proxy_pds: 798 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 799 free_rproc: 800 device_init_wakeup(adsp->dev, false); 801 802 return ret; 803 } 804 805 static void adsp_remove(struct platform_device *pdev) 806 { 807 struct qcom_adsp *adsp = platform_get_drvdata(pdev); 808 809 rproc_del(adsp->rproc); 810 811 qcom_q6v5_deinit(&adsp->q6v5); 812 adsp_unassign_memory_region(adsp); 813 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev); 814 qcom_remove_sysmon_subdev(adsp->sysmon); 815 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev); 816 qcom_remove_pdm_subdev(adsp->rproc, &adsp->pdm_subdev); 817 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev); 818 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 819 device_init_wakeup(adsp->dev, false); 820 } 821 822 static const struct adsp_data adsp_resource_init = { 823 .crash_reason_smem = 423, 824 .firmware_name = "adsp.mdt", 825 .pas_id = 1, 826 .auto_boot = true, 827 .ssr_name = "lpass", 828 .sysmon_name = "adsp", 829 .ssctl_id = 0x14, 830 }; 831 832 static const struct adsp_data sdm845_adsp_resource_init = { 833 .crash_reason_smem = 423, 834 .firmware_name = "adsp.mdt", 835 .pas_id = 1, 836 .auto_boot = true, 837 .load_state = "adsp", 838 .ssr_name = "lpass", 839 .sysmon_name = "adsp", 840 .ssctl_id = 0x14, 841 }; 842 843 static const struct adsp_data sm6350_adsp_resource = { 844 .crash_reason_smem = 423, 845 .firmware_name = "adsp.mdt", 846 .pas_id = 1, 847 .auto_boot = true, 848 .proxy_pd_names = (char*[]){ 849 "lcx", 850 "lmx", 851 NULL 852 }, 853 .load_state = "adsp", 854 .ssr_name = "lpass", 855 .sysmon_name = "adsp", 856 .ssctl_id = 0x14, 857 }; 858 859 static const struct adsp_data sm6375_mpss_resource = { 860 .crash_reason_smem = 421, 861 .firmware_name = "modem.mdt", 862 .pas_id = 4, 863 .minidump_id = 3, 864 .auto_boot = false, 865 .proxy_pd_names = (char*[]){ 866 "cx", 867 NULL 868 }, 869 .ssr_name = "mpss", 870 .sysmon_name = "modem", 871 .ssctl_id = 0x12, 872 }; 873 874 static const struct adsp_data sm8150_adsp_resource = { 875 .crash_reason_smem = 423, 876 .firmware_name = "adsp.mdt", 877 .pas_id = 1, 878 .auto_boot = true, 879 .proxy_pd_names = (char*[]){ 880 "cx", 881 NULL 882 }, 883 .load_state = "adsp", 884 .ssr_name = "lpass", 885 .sysmon_name = "adsp", 886 .ssctl_id = 0x14, 887 }; 888 889 static const struct adsp_data sm8250_adsp_resource = { 890 .crash_reason_smem = 423, 891 .firmware_name = "adsp.mdt", 892 .pas_id = 1, 893 .auto_boot = true, 894 .proxy_pd_names = (char*[]){ 895 "lcx", 896 "lmx", 897 NULL 898 }, 899 .load_state = "adsp", 900 .ssr_name = "lpass", 901 .sysmon_name = "adsp", 902 .ssctl_id = 0x14, 903 }; 904 905 static const struct adsp_data sm8350_adsp_resource = { 906 .crash_reason_smem = 423, 907 .firmware_name = "adsp.mdt", 908 .pas_id = 1, 909 .auto_boot = true, 910 .proxy_pd_names = (char*[]){ 911 "lcx", 912 "lmx", 913 NULL 914 }, 915 .load_state = "adsp", 916 .ssr_name = "lpass", 917 .sysmon_name = "adsp", 918 .ssctl_id = 0x14, 919 }; 920 921 static const struct adsp_data msm8996_adsp_resource = { 922 .crash_reason_smem = 423, 923 .firmware_name = "adsp.mdt", 924 .pas_id = 1, 925 .auto_boot = true, 926 .proxy_pd_names = (char*[]){ 927 "cx", 928 NULL 929 }, 930 .ssr_name = "lpass", 931 .sysmon_name = "adsp", 932 .ssctl_id = 0x14, 933 }; 934 935 static const struct adsp_data cdsp_resource_init = { 936 .crash_reason_smem = 601, 937 .firmware_name = "cdsp.mdt", 938 .pas_id = 18, 939 .auto_boot = true, 940 .ssr_name = "cdsp", 941 .sysmon_name = "cdsp", 942 .ssctl_id = 0x17, 943 }; 944 945 static const struct adsp_data sdm845_cdsp_resource_init = { 946 .crash_reason_smem = 601, 947 .firmware_name = "cdsp.mdt", 948 .pas_id = 18, 949 .auto_boot = true, 950 .load_state = "cdsp", 951 .ssr_name = "cdsp", 952 .sysmon_name = "cdsp", 953 .ssctl_id = 0x17, 954 }; 955 956 static const struct adsp_data sm6350_cdsp_resource = { 957 .crash_reason_smem = 601, 958 .firmware_name = "cdsp.mdt", 959 .pas_id = 18, 960 .auto_boot = true, 961 .proxy_pd_names = (char*[]){ 962 "cx", 963 "mx", 964 NULL 965 }, 966 .load_state = "cdsp", 967 .ssr_name = "cdsp", 968 .sysmon_name = "cdsp", 969 .ssctl_id = 0x17, 970 }; 971 972 static const struct adsp_data sm8150_cdsp_resource = { 973 .crash_reason_smem = 601, 974 .firmware_name = "cdsp.mdt", 975 .pas_id = 18, 976 .auto_boot = true, 977 .proxy_pd_names = (char*[]){ 978 "cx", 979 NULL 980 }, 981 .load_state = "cdsp", 982 .ssr_name = "cdsp", 983 .sysmon_name = "cdsp", 984 .ssctl_id = 0x17, 985 }; 986 987 static const struct adsp_data sm8250_cdsp_resource = { 988 .crash_reason_smem = 601, 989 .firmware_name = "cdsp.mdt", 990 .pas_id = 18, 991 .auto_boot = true, 992 .proxy_pd_names = (char*[]){ 993 "cx", 994 NULL 995 }, 996 .load_state = "cdsp", 997 .ssr_name = "cdsp", 998 .sysmon_name = "cdsp", 999 .ssctl_id = 0x17, 1000 }; 1001 1002 static const struct adsp_data sc8280xp_nsp0_resource = { 1003 .crash_reason_smem = 601, 1004 .firmware_name = "cdsp.mdt", 1005 .pas_id = 18, 1006 .auto_boot = true, 1007 .proxy_pd_names = (char*[]){ 1008 "nsp", 1009 NULL 1010 }, 1011 .ssr_name = "cdsp0", 1012 .sysmon_name = "cdsp", 1013 .ssctl_id = 0x17, 1014 }; 1015 1016 static const struct adsp_data sc8280xp_nsp1_resource = { 1017 .crash_reason_smem = 633, 1018 .firmware_name = "cdsp.mdt", 1019 .pas_id = 30, 1020 .auto_boot = true, 1021 .proxy_pd_names = (char*[]){ 1022 "nsp", 1023 NULL 1024 }, 1025 .ssr_name = "cdsp1", 1026 .sysmon_name = "cdsp1", 1027 .ssctl_id = 0x20, 1028 }; 1029 1030 static const struct adsp_data x1e80100_adsp_resource = { 1031 .crash_reason_smem = 423, 1032 .firmware_name = "adsp.mdt", 1033 .dtb_firmware_name = "adsp_dtb.mdt", 1034 .pas_id = 1, 1035 .dtb_pas_id = 0x24, 1036 .lite_pas_id = 0x1f, 1037 .minidump_id = 5, 1038 .auto_boot = true, 1039 .proxy_pd_names = (char*[]){ 1040 "lcx", 1041 "lmx", 1042 NULL 1043 }, 1044 .load_state = "adsp", 1045 .ssr_name = "lpass", 1046 .sysmon_name = "adsp", 1047 .ssctl_id = 0x14, 1048 }; 1049 1050 static const struct adsp_data x1e80100_cdsp_resource = { 1051 .crash_reason_smem = 601, 1052 .firmware_name = "cdsp.mdt", 1053 .dtb_firmware_name = "cdsp_dtb.mdt", 1054 .pas_id = 18, 1055 .dtb_pas_id = 0x25, 1056 .minidump_id = 7, 1057 .auto_boot = true, 1058 .proxy_pd_names = (char*[]){ 1059 "cx", 1060 "mxc", 1061 "nsp", 1062 NULL 1063 }, 1064 .load_state = "cdsp", 1065 .ssr_name = "cdsp", 1066 .sysmon_name = "cdsp", 1067 .ssctl_id = 0x17, 1068 }; 1069 1070 static const struct adsp_data sm8350_cdsp_resource = { 1071 .crash_reason_smem = 601, 1072 .firmware_name = "cdsp.mdt", 1073 .pas_id = 18, 1074 .auto_boot = true, 1075 .proxy_pd_names = (char*[]){ 1076 "cx", 1077 "mxc", 1078 NULL 1079 }, 1080 .load_state = "cdsp", 1081 .ssr_name = "cdsp", 1082 .sysmon_name = "cdsp", 1083 .ssctl_id = 0x17, 1084 }; 1085 1086 static const struct adsp_data mpss_resource_init = { 1087 .crash_reason_smem = 421, 1088 .firmware_name = "modem.mdt", 1089 .pas_id = 4, 1090 .minidump_id = 3, 1091 .auto_boot = false, 1092 .proxy_pd_names = (char*[]){ 1093 "cx", 1094 "mss", 1095 NULL 1096 }, 1097 .load_state = "modem", 1098 .ssr_name = "mpss", 1099 .sysmon_name = "modem", 1100 .ssctl_id = 0x12, 1101 }; 1102 1103 static const struct adsp_data sc8180x_mpss_resource = { 1104 .crash_reason_smem = 421, 1105 .firmware_name = "modem.mdt", 1106 .pas_id = 4, 1107 .auto_boot = false, 1108 .proxy_pd_names = (char*[]){ 1109 "cx", 1110 NULL 1111 }, 1112 .load_state = "modem", 1113 .ssr_name = "mpss", 1114 .sysmon_name = "modem", 1115 .ssctl_id = 0x12, 1116 }; 1117 1118 static const struct adsp_data msm8996_slpi_resource_init = { 1119 .crash_reason_smem = 424, 1120 .firmware_name = "slpi.mdt", 1121 .pas_id = 12, 1122 .auto_boot = true, 1123 .proxy_pd_names = (char*[]){ 1124 "ssc_cx", 1125 NULL 1126 }, 1127 .ssr_name = "dsps", 1128 .sysmon_name = "slpi", 1129 .ssctl_id = 0x16, 1130 }; 1131 1132 static const struct adsp_data sdm845_slpi_resource_init = { 1133 .crash_reason_smem = 424, 1134 .firmware_name = "slpi.mdt", 1135 .pas_id = 12, 1136 .auto_boot = true, 1137 .proxy_pd_names = (char*[]){ 1138 "lcx", 1139 "lmx", 1140 NULL 1141 }, 1142 .load_state = "slpi", 1143 .ssr_name = "dsps", 1144 .sysmon_name = "slpi", 1145 .ssctl_id = 0x16, 1146 }; 1147 1148 static const struct adsp_data wcss_resource_init = { 1149 .crash_reason_smem = 421, 1150 .firmware_name = "wcnss.mdt", 1151 .pas_id = 6, 1152 .auto_boot = true, 1153 .ssr_name = "mpss", 1154 .sysmon_name = "wcnss", 1155 .ssctl_id = 0x12, 1156 }; 1157 1158 static const struct adsp_data sdx55_mpss_resource = { 1159 .crash_reason_smem = 421, 1160 .firmware_name = "modem.mdt", 1161 .pas_id = 4, 1162 .auto_boot = true, 1163 .proxy_pd_names = (char*[]){ 1164 "cx", 1165 "mss", 1166 NULL 1167 }, 1168 .ssr_name = "mpss", 1169 .sysmon_name = "modem", 1170 .ssctl_id = 0x22, 1171 }; 1172 1173 static const struct adsp_data sm8450_mpss_resource = { 1174 .crash_reason_smem = 421, 1175 .firmware_name = "modem.mdt", 1176 .pas_id = 4, 1177 .minidump_id = 3, 1178 .auto_boot = false, 1179 .decrypt_shutdown = true, 1180 .proxy_pd_names = (char*[]){ 1181 "cx", 1182 "mss", 1183 NULL 1184 }, 1185 .load_state = "modem", 1186 .ssr_name = "mpss", 1187 .sysmon_name = "modem", 1188 .ssctl_id = 0x12, 1189 }; 1190 1191 static const struct adsp_data sm8550_adsp_resource = { 1192 .crash_reason_smem = 423, 1193 .firmware_name = "adsp.mdt", 1194 .dtb_firmware_name = "adsp_dtb.mdt", 1195 .pas_id = 1, 1196 .dtb_pas_id = 0x24, 1197 .minidump_id = 5, 1198 .auto_boot = true, 1199 .proxy_pd_names = (char*[]){ 1200 "lcx", 1201 "lmx", 1202 NULL 1203 }, 1204 .load_state = "adsp", 1205 .ssr_name = "lpass", 1206 .sysmon_name = "adsp", 1207 .ssctl_id = 0x14, 1208 .smem_host_id = 2, 1209 }; 1210 1211 static const struct adsp_data sm8550_cdsp_resource = { 1212 .crash_reason_smem = 601, 1213 .firmware_name = "cdsp.mdt", 1214 .dtb_firmware_name = "cdsp_dtb.mdt", 1215 .pas_id = 18, 1216 .dtb_pas_id = 0x25, 1217 .minidump_id = 7, 1218 .auto_boot = true, 1219 .proxy_pd_names = (char*[]){ 1220 "cx", 1221 "mxc", 1222 "nsp", 1223 NULL 1224 }, 1225 .load_state = "cdsp", 1226 .ssr_name = "cdsp", 1227 .sysmon_name = "cdsp", 1228 .ssctl_id = 0x17, 1229 .smem_host_id = 5, 1230 }; 1231 1232 static const struct adsp_data sm8550_mpss_resource = { 1233 .crash_reason_smem = 421, 1234 .firmware_name = "modem.mdt", 1235 .dtb_firmware_name = "modem_dtb.mdt", 1236 .pas_id = 4, 1237 .dtb_pas_id = 0x26, 1238 .minidump_id = 3, 1239 .auto_boot = false, 1240 .decrypt_shutdown = true, 1241 .proxy_pd_names = (char*[]){ 1242 "cx", 1243 "mss", 1244 NULL 1245 }, 1246 .load_state = "modem", 1247 .ssr_name = "mpss", 1248 .sysmon_name = "modem", 1249 .ssctl_id = 0x12, 1250 .smem_host_id = 1, 1251 .region_assign_idx = 2, 1252 .region_assign_count = 1, 1253 .region_assign_vmid = QCOM_SCM_VMID_MSS_MSA, 1254 }; 1255 1256 static const struct adsp_data sc7280_wpss_resource = { 1257 .crash_reason_smem = 626, 1258 .firmware_name = "wpss.mdt", 1259 .pas_id = 6, 1260 .auto_boot = true, 1261 .proxy_pd_names = (char*[]){ 1262 "cx", 1263 "mx", 1264 NULL 1265 }, 1266 .load_state = "wpss", 1267 .ssr_name = "wpss", 1268 .sysmon_name = "wpss", 1269 .ssctl_id = 0x19, 1270 }; 1271 1272 static const struct adsp_data sm8650_cdsp_resource = { 1273 .crash_reason_smem = 601, 1274 .firmware_name = "cdsp.mdt", 1275 .dtb_firmware_name = "cdsp_dtb.mdt", 1276 .pas_id = 18, 1277 .dtb_pas_id = 0x25, 1278 .minidump_id = 7, 1279 .auto_boot = true, 1280 .proxy_pd_names = (char*[]){ 1281 "cx", 1282 "mxc", 1283 "nsp", 1284 NULL 1285 }, 1286 .load_state = "cdsp", 1287 .ssr_name = "cdsp", 1288 .sysmon_name = "cdsp", 1289 .ssctl_id = 0x17, 1290 .smem_host_id = 5, 1291 .region_assign_idx = 2, 1292 .region_assign_count = 1, 1293 .region_assign_shared = true, 1294 .region_assign_vmid = QCOM_SCM_VMID_CDSP, 1295 }; 1296 1297 static const struct adsp_data sm8650_mpss_resource = { 1298 .crash_reason_smem = 421, 1299 .firmware_name = "modem.mdt", 1300 .dtb_firmware_name = "modem_dtb.mdt", 1301 .pas_id = 4, 1302 .dtb_pas_id = 0x26, 1303 .minidump_id = 3, 1304 .auto_boot = false, 1305 .decrypt_shutdown = true, 1306 .proxy_pd_names = (char*[]){ 1307 "cx", 1308 "mss", 1309 NULL 1310 }, 1311 .load_state = "modem", 1312 .ssr_name = "mpss", 1313 .sysmon_name = "modem", 1314 .ssctl_id = 0x12, 1315 .smem_host_id = 1, 1316 .region_assign_idx = 2, 1317 .region_assign_count = 3, 1318 .region_assign_vmid = QCOM_SCM_VMID_MSS_MSA, 1319 }; 1320 1321 static const struct of_device_id adsp_of_match[] = { 1322 { .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init}, 1323 { .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource}, 1324 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init}, 1325 { .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource}, 1326 { .compatible = "qcom,msm8996-slpi-pil", .data = &msm8996_slpi_resource_init}, 1327 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource}, 1328 { .compatible = "qcom,msm8998-slpi-pas", .data = &msm8996_slpi_resource_init}, 1329 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init }, 1330 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init }, 1331 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init }, 1332 { .compatible = "qcom,sc7180-adsp-pas", .data = &sm8250_adsp_resource}, 1333 { .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init}, 1334 { .compatible = "qcom,sc7280-adsp-pas", .data = &sm8350_adsp_resource}, 1335 { .compatible = "qcom,sc7280-cdsp-pas", .data = &sm6350_cdsp_resource}, 1336 { .compatible = "qcom,sc7280-mpss-pas", .data = &mpss_resource_init}, 1337 { .compatible = "qcom,sc7280-wpss-pas", .data = &sc7280_wpss_resource}, 1338 { .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource}, 1339 { .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource}, 1340 { .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource}, 1341 { .compatible = "qcom,sc8280xp-adsp-pas", .data = &sm8250_adsp_resource}, 1342 { .compatible = "qcom,sc8280xp-nsp0-pas", .data = &sc8280xp_nsp0_resource}, 1343 { .compatible = "qcom,sc8280xp-nsp1-pas", .data = &sc8280xp_nsp1_resource}, 1344 { .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init}, 1345 { .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init}, 1346 { .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init}, 1347 { .compatible = "qcom,sdm845-slpi-pas", .data = &sdm845_slpi_resource_init}, 1348 { .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource}, 1349 { .compatible = "qcom,sm6115-adsp-pas", .data = &adsp_resource_init}, 1350 { .compatible = "qcom,sm6115-cdsp-pas", .data = &cdsp_resource_init}, 1351 { .compatible = "qcom,sm6115-mpss-pas", .data = &sc8180x_mpss_resource}, 1352 { .compatible = "qcom,sm6350-adsp-pas", .data = &sm6350_adsp_resource}, 1353 { .compatible = "qcom,sm6350-cdsp-pas", .data = &sm6350_cdsp_resource}, 1354 { .compatible = "qcom,sm6350-mpss-pas", .data = &mpss_resource_init}, 1355 { .compatible = "qcom,sm6375-adsp-pas", .data = &sm6350_adsp_resource}, 1356 { .compatible = "qcom,sm6375-cdsp-pas", .data = &sm8150_cdsp_resource}, 1357 { .compatible = "qcom,sm6375-mpss-pas", .data = &sm6375_mpss_resource}, 1358 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource}, 1359 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource}, 1360 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init}, 1361 { .compatible = "qcom,sm8150-slpi-pas", .data = &sdm845_slpi_resource_init}, 1362 { .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource}, 1363 { .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource}, 1364 { .compatible = "qcom,sm8250-slpi-pas", .data = &sdm845_slpi_resource_init}, 1365 { .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource}, 1366 { .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource}, 1367 { .compatible = "qcom,sm8350-slpi-pas", .data = &sdm845_slpi_resource_init}, 1368 { .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init}, 1369 { .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource}, 1370 { .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource}, 1371 { .compatible = "qcom,sm8450-slpi-pas", .data = &sdm845_slpi_resource_init}, 1372 { .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource}, 1373 { .compatible = "qcom,sm8550-adsp-pas", .data = &sm8550_adsp_resource}, 1374 { .compatible = "qcom,sm8550-cdsp-pas", .data = &sm8550_cdsp_resource}, 1375 { .compatible = "qcom,sm8550-mpss-pas", .data = &sm8550_mpss_resource}, 1376 { .compatible = "qcom,sm8650-adsp-pas", .data = &sm8550_adsp_resource}, 1377 { .compatible = "qcom,sm8650-cdsp-pas", .data = &sm8650_cdsp_resource}, 1378 { .compatible = "qcom,sm8650-mpss-pas", .data = &sm8650_mpss_resource}, 1379 { .compatible = "qcom,x1e80100-adsp-pas", .data = &x1e80100_adsp_resource}, 1380 { .compatible = "qcom,x1e80100-cdsp-pas", .data = &x1e80100_cdsp_resource}, 1381 { }, 1382 }; 1383 MODULE_DEVICE_TABLE(of, adsp_of_match); 1384 1385 static struct platform_driver adsp_driver = { 1386 .probe = adsp_probe, 1387 .remove_new = adsp_remove, 1388 .driver = { 1389 .name = "qcom_q6v5_pas", 1390 .of_match_table = adsp_of_match, 1391 }, 1392 }; 1393 1394 module_platform_driver(adsp_driver); 1395 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver"); 1396 MODULE_LICENSE("GPL v2"); 1397