xref: /linux/drivers/pinctrl/aspeed/pinctrl-aspeed.h (revision 8dd06ef34b6e2f41b29fbf5fc1663780f2524285)
12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
24d3d0e42SAndrew Jeffery /*
34d3d0e42SAndrew Jeffery  * Copyright (C) 2016 IBM Corp.
44d3d0e42SAndrew Jeffery  */
54d3d0e42SAndrew Jeffery 
64d3d0e42SAndrew Jeffery #ifndef PINCTRL_ASPEED
74d3d0e42SAndrew Jeffery #define PINCTRL_ASPEED
84d3d0e42SAndrew Jeffery 
94d3d0e42SAndrew Jeffery #include <linux/pinctrl/pinctrl.h>
104d3d0e42SAndrew Jeffery #include <linux/pinctrl/pinmux.h>
114d3d0e42SAndrew Jeffery #include <linux/pinctrl/pinconf.h>
124d3d0e42SAndrew Jeffery #include <linux/pinctrl/pinconf-generic.h>
134d3d0e42SAndrew Jeffery #include <linux/regmap.h>
144d3d0e42SAndrew Jeffery 
15a1cd6c8bSLinus Walleij #include "pinmux-aspeed.h"
164d3d0e42SAndrew Jeffery 
177f354fd1SAndrew Jeffery /**
187f354fd1SAndrew Jeffery  * @param The pinconf parameter type
197f354fd1SAndrew Jeffery  * @pins The pin range this config struct covers, [low, high]
207f354fd1SAndrew Jeffery  * @reg The register housing the configuration bits
217f354fd1SAndrew Jeffery  * @mask The mask to select the bits of interest in @reg
227f354fd1SAndrew Jeffery  */
237f354fd1SAndrew Jeffery struct aspeed_pin_config {
247f354fd1SAndrew Jeffery 	enum pin_config_param param;
257f354fd1SAndrew Jeffery 	unsigned int pins[2];
267f354fd1SAndrew Jeffery 	unsigned int reg;
275f52c853SJohnny Huang 	u32 mask;
287f354fd1SAndrew Jeffery };
297f354fd1SAndrew Jeffery 
304d3d0e42SAndrew Jeffery #define ASPEED_PINCTRL_PIN(name_) \
314d3d0e42SAndrew Jeffery 	[name_] = { \
324d3d0e42SAndrew Jeffery 		.number = name_, \
334d3d0e42SAndrew Jeffery 		.name = #name_, \
344d3d0e42SAndrew Jeffery 		.drv_data = (void *) &(PIN_SYM(name_)) \
354d3d0e42SAndrew Jeffery 	}
364d3d0e42SAndrew Jeffery 
37a79bcd51SJohnny Huang #define ASPEED_SB_PINCONF(param_, pin0_, pin1_, reg_, bit_) { \
38a79bcd51SJohnny Huang 	.param = param_, \
39a79bcd51SJohnny Huang 	.pins = {pin0_, pin1_}, \
40a79bcd51SJohnny Huang 	.reg = reg_, \
415f52c853SJohnny Huang 	.mask = BIT_MASK(bit_) \
42a79bcd51SJohnny Huang }
43a79bcd51SJohnny Huang 
44*15711ba6SJohnny Huang #define ASPEED_PULL_DOWN_PINCONF(pin_, reg_, bit_) \
45*15711ba6SJohnny Huang 	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, pin_, pin_, reg_, bit_), \
46*15711ba6SJohnny Huang 	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE,   pin_, pin_, reg_, bit_)
47*15711ba6SJohnny Huang 
48*15711ba6SJohnny Huang #define ASPEED_PULL_UP_PINCONF(pin_, reg_, bit_) \
49*15711ba6SJohnny Huang 	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_UP, pin_, pin_, reg_, bit_), \
50*15711ba6SJohnny Huang 	ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, pin_, pin_, reg_, bit_)
515b854f28SJohnny Huang /*
525b854f28SJohnny Huang  * Aspeed pin configuration description.
535b854f28SJohnny Huang  *
545b854f28SJohnny Huang  * @param: pinconf configuration parameter
555b854f28SJohnny Huang  * @arg: The supported argument for @param, or -1 if any value is supported
565b854f28SJohnny Huang  * @val: The register value to write to configure @arg for @param
575f52c853SJohnny Huang  * @mask: The bitfield mask for @val
585b854f28SJohnny Huang  *
595b854f28SJohnny Huang  * The map is to be used in conjunction with the configuration array supplied
605b854f28SJohnny Huang  * by the driver implementation.
615b854f28SJohnny Huang  */
625b854f28SJohnny Huang struct aspeed_pin_config_map {
635b854f28SJohnny Huang 	enum pin_config_param param;
645b854f28SJohnny Huang 	s32 arg;
655b854f28SJohnny Huang 	u32 val;
665f52c853SJohnny Huang 	u32 mask;
675b854f28SJohnny Huang };
685b854f28SJohnny Huang 
69efa56239SAndrew Jeffery struct aspeed_pinctrl_data {
70efa56239SAndrew Jeffery 	struct regmap *scu;
71efa56239SAndrew Jeffery 
72efa56239SAndrew Jeffery 	const struct pinctrl_pin_desc *pins;
734d3d0e42SAndrew Jeffery 	const unsigned int npins;
74efa56239SAndrew Jeffery 
75efa56239SAndrew Jeffery 	const struct aspeed_pin_config *configs;
76efa56239SAndrew Jeffery 	const unsigned int nconfigs;
77efa56239SAndrew Jeffery 
78efa56239SAndrew Jeffery 	struct aspeed_pinmux_data pinmux;
795b854f28SJohnny Huang 
805b854f28SJohnny Huang 	const struct aspeed_pin_config_map *confmaps;
815b854f28SJohnny Huang 	const unsigned int nconfmaps;
824d3d0e42SAndrew Jeffery };
834d3d0e42SAndrew Jeffery 
84efa56239SAndrew Jeffery /* Aspeed pinctrl helpers */
854d3d0e42SAndrew Jeffery int aspeed_pinctrl_get_groups_count(struct pinctrl_dev *pctldev);
864d3d0e42SAndrew Jeffery const char *aspeed_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
874d3d0e42SAndrew Jeffery 		unsigned int group);
884d3d0e42SAndrew Jeffery int aspeed_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
894d3d0e42SAndrew Jeffery 		unsigned int group, const unsigned int **pins,
904d3d0e42SAndrew Jeffery 		unsigned int *npins);
914d3d0e42SAndrew Jeffery void aspeed_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
924d3d0e42SAndrew Jeffery 		struct seq_file *s, unsigned int offset);
934d3d0e42SAndrew Jeffery int aspeed_pinmux_get_fn_count(struct pinctrl_dev *pctldev);
944d3d0e42SAndrew Jeffery const char *aspeed_pinmux_get_fn_name(struct pinctrl_dev *pctldev,
954d3d0e42SAndrew Jeffery 		unsigned int function);
964d3d0e42SAndrew Jeffery int aspeed_pinmux_get_fn_groups(struct pinctrl_dev *pctldev,
974d3d0e42SAndrew Jeffery 		unsigned int function, const char * const **groups,
984d3d0e42SAndrew Jeffery 		unsigned int * const num_groups);
994d3d0e42SAndrew Jeffery int aspeed_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function,
1004d3d0e42SAndrew Jeffery 		unsigned int group);
1014d3d0e42SAndrew Jeffery int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev,
1024d3d0e42SAndrew Jeffery 		struct pinctrl_gpio_range *range,
1034d3d0e42SAndrew Jeffery 		unsigned int offset);
1044d3d0e42SAndrew Jeffery int aspeed_pinctrl_probe(struct platform_device *pdev,
1054d3d0e42SAndrew Jeffery 		struct pinctrl_desc *pdesc,
1064d3d0e42SAndrew Jeffery 		struct aspeed_pinctrl_data *pdata);
1077f354fd1SAndrew Jeffery int aspeed_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset,
1087f354fd1SAndrew Jeffery 		unsigned long *config);
1097f354fd1SAndrew Jeffery int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
1107f354fd1SAndrew Jeffery 		unsigned long *configs, unsigned int num_configs);
1117f354fd1SAndrew Jeffery int aspeed_pin_config_group_get(struct pinctrl_dev *pctldev,
1127f354fd1SAndrew Jeffery 		unsigned int selector,
1137f354fd1SAndrew Jeffery 		unsigned long *config);
1147f354fd1SAndrew Jeffery int aspeed_pin_config_group_set(struct pinctrl_dev *pctldev,
1157f354fd1SAndrew Jeffery 		unsigned int selector,
1167f354fd1SAndrew Jeffery 		unsigned long *configs,
1177f354fd1SAndrew Jeffery 		unsigned int num_configs);
1184d3d0e42SAndrew Jeffery 
1194d3d0e42SAndrew Jeffery #endif /* PINCTRL_ASPEED */
120