1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6 #ifndef QCOM_PHY_QMP_USB43_PCS_V8_H_ 7 #define QCOM_PHY_QMP_USB43_PCS_V8_H_ 8 9 #define QPHY_V8_USB43_PCS_SW_RESET 0x000 10 #define QPHY_V8_USB43_PCS_PCS_STATUS1 0x014 11 #define QPHY_V8_USB43_PCS_POWER_DOWN_CONTROL 0x040 12 #define QPHY_V8_USB43_PCS_START_CONTROL 0x044 13 #define QPHY_V8_USB43_PCS_POWER_STATE_CONFIG1 0x090 14 #define QPHY_V8_USB43_PCS_LOCK_DETECT_CONFIG1 0x0c4 15 #define QPHY_V8_USB43_PCS_LOCK_DETECT_CONFIG2 0x0c8 16 #define QPHY_V8_USB43_PCS_LOCK_DETECT_CONFIG3 0x0cc 17 #define QPHY_V8_USB43_PCS_LOCK_DETECT_CONFIG6 0x0d8 18 #define QPHY_V8_USB43_PCS_REFGEN_REQ_CONFIG1 0x0dc 19 #define QPHY_V8_USB43_PCS_RX_SIGDET_LVL 0x188 20 #define QPHY_V8_USB43_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 21 #define QPHY_V8_USB43_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 22 #define QPHY_V8_USB43_PCS_RATE_SLEW_CNTRL1 0x198 23 #define QPHY_V8_USB43_PCS_TSYNC_RSYNC_TIME 0x1ac 24 #define QPHY_V8_USB43_PCS_RX_CONFIG 0x1b0 25 #define QPHY_V8_USB43_PCS_TSYNC_DLY_TIME 0x1b4 26 #define QPHY_V8_USB43_PCS_ALIGN_DETECT_CONFIG1 0x1c0 27 #define QPHY_V8_USB43_PCS_ALIGN_DETECT_CONFIG2 0x1c4 28 #define QPHY_V8_USB43_PCS_PCS_TX_RX_CONFIG 0x1d0 29 #define QPHY_V8_USB43_PCS_EQ_CONFIG1 0x1dc 30 #define QPHY_V8_USB43_PCS_EQ_CONFIG2 0x1e0 31 #define QPHY_V8_USB43_PCS_EQ_CONFIG5 0x1ec 32 33 #endif 34