1 /* 2 * ti113x.h 1.16 1999/10/25 20:03:34 3 * 4 * The contents of this file are subject to the Mozilla Public License 5 * Version 1.1 (the "License"); you may not use this file except in 6 * compliance with the License. You may obtain a copy of the License 7 * at http://www.mozilla.org/MPL/ 8 * 9 * Software distributed under the License is distributed on an "AS IS" 10 * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See 11 * the License for the specific language governing rights and 12 * limitations under the License. 13 * 14 * The initial developer of the original code is David A. Hinds 15 * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 16 * are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 17 * 18 * Alternatively, the contents of this file may be used under the 19 * terms of the GNU General Public License version 2 (the "GPL"), in which 20 * case the provisions of the GPL are applicable instead of the 21 * above. If you wish to allow the use of your version of this file 22 * only under the terms of the GPL and not to allow others to use 23 * your version of this file under the MPL, indicate your decision by 24 * deleting the provisions above and replace them with the notice and 25 * other provisions required by the GPL. If you do not delete the 26 * provisions above, a recipient may use your version of this file 27 * under either the MPL or the GPL. 28 */ 29 30 #ifndef _LINUX_TI113X_H 31 #define _LINUX_TI113X_H 32 33 #include <linux/config.h> 34 35 /* Register definitions for TI 113X PCI-to-CardBus bridges */ 36 37 /* System Control Register */ 38 #define TI113X_SYSTEM_CONTROL 0x0080 /* 32 bit */ 39 #define TI113X_SCR_SMIROUTE 0x04000000 40 #define TI113X_SCR_SMISTATUS 0x02000000 41 #define TI113X_SCR_SMIENB 0x01000000 42 #define TI113X_SCR_VCCPROT 0x00200000 43 #define TI113X_SCR_REDUCEZV 0x00100000 44 #define TI113X_SCR_CDREQEN 0x00080000 45 #define TI113X_SCR_CDMACHAN 0x00070000 46 #define TI113X_SCR_SOCACTIVE 0x00002000 47 #define TI113X_SCR_PWRSTREAM 0x00000800 48 #define TI113X_SCR_DELAYUP 0x00000400 49 #define TI113X_SCR_DELAYDOWN 0x00000200 50 #define TI113X_SCR_INTERROGATE 0x00000100 51 #define TI113X_SCR_CLKRUN_SEL 0x00000080 52 #define TI113X_SCR_PWRSAVINGS 0x00000040 53 #define TI113X_SCR_SUBSYSRW 0x00000020 54 #define TI113X_SCR_CB_DPAR 0x00000010 55 #define TI113X_SCR_CDMA_EN 0x00000008 56 #define TI113X_SCR_ASYNC_IRQ 0x00000004 57 #define TI113X_SCR_KEEPCLK 0x00000002 58 #define TI113X_SCR_CLKRUN_ENA 0x00000001 59 60 #define TI122X_SCR_SER_STEP 0xc0000000 61 #define TI122X_SCR_INTRTIE 0x20000000 62 #define TI122X_SCR_CBRSVD 0x00400000 63 #define TI122X_SCR_MRBURSTDN 0x00008000 64 #define TI122X_SCR_MRBURSTUP 0x00004000 65 #define TI122X_SCR_RIMUX 0x00000001 66 67 /* Multimedia Control Register */ 68 #define TI1250_MULTIMEDIA_CTL 0x0084 /* 8 bit */ 69 #define TI1250_MMC_ZVOUTEN 0x80 70 #define TI1250_MMC_PORTSEL 0x40 71 #define TI1250_MMC_ZVEN1 0x02 72 #define TI1250_MMC_ZVEN0 0x01 73 74 #define TI1250_GENERAL_STATUS 0x0085 /* 8 bit */ 75 #define TI1250_GPIO0_CONTROL 0x0088 /* 8 bit */ 76 #define TI1250_GPIO1_CONTROL 0x0089 /* 8 bit */ 77 #define TI1250_GPIO2_CONTROL 0x008a /* 8 bit */ 78 #define TI1250_GPIO3_CONTROL 0x008b /* 8 bit */ 79 #define TI1250_GPIO_MODE_MASK 0xc0 80 81 /* IRQMUX/MFUNC Register */ 82 #define TI122X_MFUNC 0x008c /* 32 bit */ 83 #define TI122X_MFUNC0_MASK 0x0000000f 84 #define TI122X_MFUNC1_MASK 0x000000f0 85 #define TI122X_MFUNC2_MASK 0x00000f00 86 #define TI122X_MFUNC3_MASK 0x0000f000 87 #define TI122X_MFUNC4_MASK 0x000f0000 88 #define TI122X_MFUNC5_MASK 0x00f00000 89 #define TI122X_MFUNC6_MASK 0x0f000000 90 91 #define TI122X_MFUNC0_INTA 0x00000002 92 #define TI125X_MFUNC0_INTB 0x00000001 93 #define TI122X_MFUNC1_INTB 0x00000020 94 #define TI122X_MFUNC3_IRQSER 0x00001000 95 96 97 /* Retry Status Register */ 98 #define TI113X_RETRY_STATUS 0x0090 /* 8 bit */ 99 #define TI113X_RSR_PCIRETRY 0x80 100 #define TI113X_RSR_CBRETRY 0x40 101 #define TI113X_RSR_TEXP_CBB 0x20 102 #define TI113X_RSR_MEXP_CBB 0x10 103 #define TI113X_RSR_TEXP_CBA 0x08 104 #define TI113X_RSR_MEXP_CBA 0x04 105 #define TI113X_RSR_TEXP_PCI 0x02 106 #define TI113X_RSR_MEXP_PCI 0x01 107 108 /* Card Control Register */ 109 #define TI113X_CARD_CONTROL 0x0091 /* 8 bit */ 110 #define TI113X_CCR_RIENB 0x80 111 #define TI113X_CCR_ZVENABLE 0x40 112 #define TI113X_CCR_PCI_IRQ_ENA 0x20 113 #define TI113X_CCR_PCI_IREQ 0x10 114 #define TI113X_CCR_PCI_CSC 0x08 115 #define TI113X_CCR_SPKROUTEN 0x02 116 #define TI113X_CCR_IFG 0x01 117 118 #define TI1220_CCR_PORT_SEL 0x20 119 #define TI122X_CCR_AUD2MUX 0x04 120 121 /* Device Control Register */ 122 #define TI113X_DEVICE_CONTROL 0x0092 /* 8 bit */ 123 #define TI113X_DCR_5V_FORCE 0x40 124 #define TI113X_DCR_3V_FORCE 0x20 125 #define TI113X_DCR_IMODE_MASK 0x06 126 #define TI113X_DCR_IMODE_ISA 0x02 127 #define TI113X_DCR_IMODE_SERIAL 0x04 128 129 #define TI12XX_DCR_IMODE_PCI_ONLY 0x00 130 #define TI12XX_DCR_IMODE_ALL_SERIAL 0x06 131 132 /* Buffer Control Register */ 133 #define TI113X_BUFFER_CONTROL 0x0093 /* 8 bit */ 134 #define TI113X_BCR_CB_READ_DEPTH 0x08 135 #define TI113X_BCR_CB_WRITE_DEPTH 0x04 136 #define TI113X_BCR_PCI_READ_DEPTH 0x02 137 #define TI113X_BCR_PCI_WRITE_DEPTH 0x01 138 139 /* Diagnostic Register */ 140 #define TI1250_DIAGNOSTIC 0x0093 /* 8 bit */ 141 #define TI1250_DIAG_TRUE_VALUE 0x80 142 #define TI1250_DIAG_PCI_IREQ 0x40 143 #define TI1250_DIAG_PCI_CSC 0x20 144 #define TI1250_DIAG_ASYNC_CSC 0x01 145 146 /* DMA Registers */ 147 #define TI113X_DMA_0 0x0094 /* 32 bit */ 148 #define TI113X_DMA_1 0x0098 /* 32 bit */ 149 150 /* ExCA IO offset registers */ 151 #define TI113X_IO_OFFSET(map) (0x36+((map)<<1)) 152 153 /* EnE test register */ 154 #define ENE_TEST_C9 0xc9 /* 8bit */ 155 #define ENE_TEST_C9_TLTENABLE 0x02 156 157 /* 158 * Texas Instruments CardBus controller overrides. 159 */ 160 #define ti_sysctl(socket) ((socket)->private[0]) 161 #define ti_cardctl(socket) ((socket)->private[1]) 162 #define ti_devctl(socket) ((socket)->private[2]) 163 #define ti_diag(socket) ((socket)->private[3]) 164 #define ti_mfunc(socket) ((socket)->private[4]) 165 #define ene_test_c9(socket) ((socket)->private[5]) 166 167 /* 168 * These are the TI specific power management handlers. 169 */ 170 static void ti_save_state(struct yenta_socket *socket) 171 { 172 ti_sysctl(socket) = config_readl(socket, TI113X_SYSTEM_CONTROL); 173 ti_mfunc(socket) = config_readl(socket, TI122X_MFUNC); 174 ti_cardctl(socket) = config_readb(socket, TI113X_CARD_CONTROL); 175 ti_devctl(socket) = config_readb(socket, TI113X_DEVICE_CONTROL); 176 ti_diag(socket) = config_readb(socket, TI1250_DIAGNOSTIC); 177 178 if (socket->dev->vendor == PCI_VENDOR_ID_ENE) 179 ene_test_c9(socket) = config_readb(socket, ENE_TEST_C9); 180 } 181 182 static void ti_restore_state(struct yenta_socket *socket) 183 { 184 config_writel(socket, TI113X_SYSTEM_CONTROL, ti_sysctl(socket)); 185 config_writel(socket, TI122X_MFUNC, ti_mfunc(socket)); 186 config_writeb(socket, TI113X_CARD_CONTROL, ti_cardctl(socket)); 187 config_writeb(socket, TI113X_DEVICE_CONTROL, ti_devctl(socket)); 188 config_writeb(socket, TI1250_DIAGNOSTIC, ti_diag(socket)); 189 190 if (socket->dev->vendor == PCI_VENDOR_ID_ENE) 191 config_writeb(socket, ENE_TEST_C9, ene_test_c9(socket)); 192 } 193 194 /* 195 * Zoom video control for TI122x/113x chips 196 */ 197 198 static void ti_zoom_video(struct pcmcia_socket *sock, int onoff) 199 { 200 u8 reg; 201 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 202 203 /* If we don't have a Zoom Video switch this is harmless, 204 we just tristate the unused (ZV) lines */ 205 reg = config_readb(socket, TI113X_CARD_CONTROL); 206 if (onoff) 207 /* Zoom zoom, we will all go together, zoom zoom, zoom zoom */ 208 reg |= TI113X_CCR_ZVENABLE; 209 else 210 reg &= ~TI113X_CCR_ZVENABLE; 211 config_writeb(socket, TI113X_CARD_CONTROL, reg); 212 } 213 214 /* 215 * The 145x series can also use this. They have an additional 216 * ZV autodetect mode we don't use but don't actually need. 217 * FIXME: manual says its in func0 and func1 but disagrees with 218 * itself about this - do we need to force func0, if so we need 219 * to know a lot more about socket pairings in pcmcia_socket than 220 * we do now.. uggh. 221 */ 222 223 static void ti1250_zoom_video(struct pcmcia_socket *sock, int onoff) 224 { 225 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 226 int shift = 0; 227 u8 reg; 228 229 ti_zoom_video(sock, onoff); 230 231 reg = config_readb(socket, TI1250_MULTIMEDIA_CTL); 232 reg |= TI1250_MMC_ZVOUTEN; /* ZV bus enable */ 233 234 if(PCI_FUNC(socket->dev->devfn)==1) 235 shift = 1; 236 237 if(onoff) 238 { 239 reg &= ~(1<<6); /* Clear select bit */ 240 reg |= shift<<6; /* Favour our socket */ 241 reg |= 1<<shift; /* Socket zoom video on */ 242 } 243 else 244 { 245 reg &= ~(1<<6); /* Clear select bit */ 246 reg |= (1^shift)<<6; /* Favour other socket */ 247 reg &= ~(1<<shift); /* Socket zoon video off */ 248 } 249 250 config_writeb(socket, TI1250_MULTIMEDIA_CTL, reg); 251 } 252 253 static void ti_set_zv(struct yenta_socket *socket) 254 { 255 if(socket->dev->vendor == PCI_VENDOR_ID_TI) 256 { 257 switch(socket->dev->device) 258 { 259 /* There may be more .. */ 260 case PCI_DEVICE_ID_TI_1220: 261 case PCI_DEVICE_ID_TI_1221: 262 case PCI_DEVICE_ID_TI_1225: 263 case PCI_DEVICE_ID_TI_4510: 264 socket->socket.zoom_video = ti_zoom_video; 265 break; 266 case PCI_DEVICE_ID_TI_1250: 267 case PCI_DEVICE_ID_TI_1251A: 268 case PCI_DEVICE_ID_TI_1251B: 269 case PCI_DEVICE_ID_TI_1450: 270 socket->socket.zoom_video = ti1250_zoom_video; 271 } 272 } 273 } 274 275 276 /* 277 * Generic TI init - TI has an extension for the 278 * INTCTL register that sets the PCI CSC interrupt. 279 * Make sure we set it correctly at open and init 280 * time 281 * - override: disable the PCI CSC interrupt. This makes 282 * it possible to use the CSC interrupt to probe the 283 * ISA interrupts. 284 * - init: set the interrupt to match our PCI state. 285 * This makes us correctly get PCI CSC interrupt 286 * events. 287 */ 288 static int ti_init(struct yenta_socket *socket) 289 { 290 u8 new, reg = exca_readb(socket, I365_INTCTL); 291 292 new = reg & ~I365_INTR_ENA; 293 if (socket->cb_irq) 294 new |= I365_INTR_ENA; 295 if (new != reg) 296 exca_writeb(socket, I365_INTCTL, new); 297 return 0; 298 } 299 300 static int ti_override(struct yenta_socket *socket) 301 { 302 u8 new, reg = exca_readb(socket, I365_INTCTL); 303 304 new = reg & ~I365_INTR_ENA; 305 if (new != reg) 306 exca_writeb(socket, I365_INTCTL, new); 307 308 ti_set_zv(socket); 309 310 return 0; 311 } 312 313 static int ti113x_override(struct yenta_socket *socket) 314 { 315 u8 cardctl; 316 317 cardctl = config_readb(socket, TI113X_CARD_CONTROL); 318 cardctl &= ~(TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_IREQ | TI113X_CCR_PCI_CSC); 319 if (socket->cb_irq) 320 cardctl |= TI113X_CCR_PCI_IRQ_ENA | TI113X_CCR_PCI_CSC | TI113X_CCR_PCI_IREQ; 321 config_writeb(socket, TI113X_CARD_CONTROL, cardctl); 322 323 return ti_override(socket); 324 } 325 326 327 /* irqrouting for func0, probes PCI interrupt and ISA interrupts */ 328 static void ti12xx_irqroute_func0(struct yenta_socket *socket) 329 { 330 u32 mfunc, mfunc_old, devctl; 331 u8 gpio3, gpio3_old; 332 int pci_irq_status; 333 334 mfunc = mfunc_old = config_readl(socket, TI122X_MFUNC); 335 devctl = config_readb(socket, TI113X_DEVICE_CONTROL); 336 printk(KERN_INFO "Yenta TI: socket %s, mfunc 0x%08x, devctl 0x%02x\n", 337 pci_name(socket->dev), mfunc, devctl); 338 339 /* make sure PCI interrupts are enabled before probing */ 340 ti_init(socket); 341 342 /* test PCI interrupts first. only try fixing if return value is 0! */ 343 pci_irq_status = yenta_probe_cb_irq(socket); 344 if (pci_irq_status) 345 goto out; 346 347 /* 348 * We're here which means PCI interrupts are _not_ delivered. try to 349 * find the right setting (all serial or parallel) 350 */ 351 printk(KERN_INFO "Yenta TI: socket %s probing PCI interrupt failed, trying to fix\n", 352 pci_name(socket->dev)); 353 354 /* for serial PCI make sure MFUNC3 is set to IRQSER */ 355 if ((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) { 356 switch (socket->dev->device) { 357 case PCI_DEVICE_ID_TI_1250: 358 case PCI_DEVICE_ID_TI_1251A: 359 case PCI_DEVICE_ID_TI_1251B: 360 case PCI_DEVICE_ID_TI_1450: 361 case PCI_DEVICE_ID_TI_1451A: 362 case PCI_DEVICE_ID_TI_4450: 363 case PCI_DEVICE_ID_TI_4451: 364 /* these chips have no IRQSER setting in MFUNC3 */ 365 break; 366 367 default: 368 mfunc = (mfunc & ~TI122X_MFUNC3_MASK) | TI122X_MFUNC3_IRQSER; 369 370 /* write down if changed, probe */ 371 if (mfunc != mfunc_old) { 372 config_writel(socket, TI122X_MFUNC, mfunc); 373 374 pci_irq_status = yenta_probe_cb_irq(socket); 375 if (pci_irq_status == 1) { 376 printk(KERN_INFO "Yenta TI: socket %s all-serial interrupts ok\n", 377 pci_name(socket->dev)); 378 mfunc_old = mfunc; 379 goto out; 380 } 381 382 /* not working, back to old value */ 383 mfunc = mfunc_old; 384 config_writel(socket, TI122X_MFUNC, mfunc); 385 386 if (pci_irq_status == -1) 387 goto out; 388 } 389 } 390 391 /* serial PCI interrupts not working fall back to parallel */ 392 printk(KERN_INFO "Yenta TI: socket %s falling back to parallel PCI interrupts\n", 393 pci_name(socket->dev)); 394 devctl &= ~TI113X_DCR_IMODE_MASK; 395 devctl |= TI113X_DCR_IMODE_SERIAL; /* serial ISA could be right */ 396 config_writeb(socket, TI113X_DEVICE_CONTROL, devctl); 397 } 398 399 /* parallel PCI interrupts: route INTA */ 400 switch (socket->dev->device) { 401 case PCI_DEVICE_ID_TI_1250: 402 case PCI_DEVICE_ID_TI_1251A: 403 case PCI_DEVICE_ID_TI_1251B: 404 case PCI_DEVICE_ID_TI_1450: 405 /* make sure GPIO3 is set to INTA */ 406 gpio3 = gpio3_old = config_readb(socket, TI1250_GPIO3_CONTROL); 407 gpio3 &= ~TI1250_GPIO_MODE_MASK; 408 if (gpio3 != gpio3_old) 409 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3); 410 break; 411 412 default: 413 gpio3 = gpio3_old = 0; 414 415 mfunc = (mfunc & ~TI122X_MFUNC0_MASK) | TI122X_MFUNC0_INTA; 416 if (mfunc != mfunc_old) 417 config_writel(socket, TI122X_MFUNC, mfunc); 418 } 419 420 /* time to probe again */ 421 pci_irq_status = yenta_probe_cb_irq(socket); 422 if (pci_irq_status == 1) { 423 mfunc_old = mfunc; 424 printk(KERN_INFO "Yenta TI: socket %s parallel PCI interrupts ok\n", 425 pci_name(socket->dev)); 426 } else { 427 /* not working, back to old value */ 428 mfunc = mfunc_old; 429 config_writel(socket, TI122X_MFUNC, mfunc); 430 if (gpio3 != gpio3_old) 431 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3_old); 432 } 433 434 out: 435 if (pci_irq_status < 1) { 436 socket->cb_irq = 0; 437 printk(KERN_INFO "Yenta TI: socket %s no PCI interrupts. Fish. Please report.\n", 438 pci_name(socket->dev)); 439 } 440 } 441 442 443 /* changes the irq of func1 to match that of func0 */ 444 static int ti12xx_align_irqs(struct yenta_socket *socket, int *old_irq) 445 { 446 struct pci_dev *func0; 447 448 /* find func0 device */ 449 func0 = pci_get_slot(socket->dev->bus, socket->dev->devfn & ~0x07); 450 if (!func0) 451 return 0; 452 453 if (old_irq) 454 *old_irq = socket->cb_irq; 455 socket->cb_irq = socket->dev->irq = func0->irq; 456 457 pci_dev_put(func0); 458 459 return 1; 460 } 461 462 /* 463 * ties INTA and INTB together. also changes the devices irq to that of 464 * the function 0 device. call from func1 only. 465 * returns 1 if INTRTIE changed, 0 otherwise. 466 */ 467 static int ti12xx_tie_interrupts(struct yenta_socket *socket, int *old_irq) 468 { 469 u32 sysctl; 470 int ret; 471 472 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 473 if (sysctl & TI122X_SCR_INTRTIE) 474 return 0; 475 476 /* align */ 477 ret = ti12xx_align_irqs(socket, old_irq); 478 if (!ret) 479 return 0; 480 481 /* tie */ 482 sysctl |= TI122X_SCR_INTRTIE; 483 config_writel(socket, TI113X_SYSTEM_CONTROL, sysctl); 484 485 return 1; 486 } 487 488 /* undo what ti12xx_tie_interrupts() did */ 489 static void ti12xx_untie_interrupts(struct yenta_socket *socket, int old_irq) 490 { 491 u32 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 492 sysctl &= ~TI122X_SCR_INTRTIE; 493 config_writel(socket, TI113X_SYSTEM_CONTROL, sysctl); 494 495 socket->cb_irq = socket->dev->irq = old_irq; 496 } 497 498 /* 499 * irqrouting for func1, plays with INTB routing 500 * only touches MFUNC for INTB routing. all other bits are taken 501 * care of in func0 already. 502 */ 503 static void ti12xx_irqroute_func1(struct yenta_socket *socket) 504 { 505 u32 mfunc, mfunc_old, devctl, sysctl; 506 int pci_irq_status; 507 508 mfunc = mfunc_old = config_readl(socket, TI122X_MFUNC); 509 devctl = config_readb(socket, TI113X_DEVICE_CONTROL); 510 printk(KERN_INFO "Yenta TI: socket %s, mfunc 0x%08x, devctl 0x%02x\n", 511 pci_name(socket->dev), mfunc, devctl); 512 513 /* if IRQs are configured as tied, align irq of func1 with func0 */ 514 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 515 if (sysctl & TI122X_SCR_INTRTIE) 516 ti12xx_align_irqs(socket, NULL); 517 518 /* make sure PCI interrupts are enabled before probing */ 519 ti_init(socket); 520 521 /* test PCI interrupts first. only try fixing if return value is 0! */ 522 pci_irq_status = yenta_probe_cb_irq(socket); 523 if (pci_irq_status) 524 goto out; 525 526 /* 527 * We're here which means PCI interrupts are _not_ delivered. try to 528 * find the right setting 529 */ 530 printk(KERN_INFO "Yenta TI: socket %s probing PCI interrupt failed, trying to fix\n", 531 pci_name(socket->dev)); 532 533 534 /* if all serial: set INTRTIE, probe again */ 535 if ((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) { 536 int old_irq; 537 538 if (ti12xx_tie_interrupts(socket, &old_irq)) { 539 pci_irq_status = yenta_probe_cb_irq(socket); 540 if (pci_irq_status == 1) { 541 printk(KERN_INFO "Yenta TI: socket %s all-serial interrupts, tied ok\n", 542 pci_name(socket->dev)); 543 goto out; 544 } 545 546 ti12xx_untie_interrupts(socket, old_irq); 547 } 548 } 549 /* parallel PCI: route INTB, probe again */ 550 else { 551 int old_irq; 552 553 switch (socket->dev->device) { 554 case PCI_DEVICE_ID_TI_1250: 555 /* the 1250 has one pin for IRQSER/INTB depending on devctl */ 556 break; 557 558 case PCI_DEVICE_ID_TI_1251A: 559 case PCI_DEVICE_ID_TI_1251B: 560 case PCI_DEVICE_ID_TI_1450: 561 /* 562 * those have a pin for IRQSER/INTB plus INTB in MFUNC0 563 * we alread probed the shared pin, now go for MFUNC0 564 */ 565 mfunc = (mfunc & ~TI122X_MFUNC0_MASK) | TI125X_MFUNC0_INTB; 566 break; 567 568 default: 569 mfunc = (mfunc & ~TI122X_MFUNC1_MASK) | TI122X_MFUNC1_INTB; 570 break; 571 } 572 573 /* write, probe */ 574 if (mfunc != mfunc_old) { 575 config_writel(socket, TI122X_MFUNC, mfunc); 576 577 pci_irq_status = yenta_probe_cb_irq(socket); 578 if (pci_irq_status == 1) { 579 printk(KERN_INFO "Yenta TI: socket %s parallel PCI interrupts ok\n", 580 pci_name(socket->dev)); 581 goto out; 582 } 583 584 mfunc = mfunc_old; 585 config_writel(socket, TI122X_MFUNC, mfunc); 586 587 if (pci_irq_status == -1) 588 goto out; 589 } 590 591 /* still nothing: set INTRTIE */ 592 if (ti12xx_tie_interrupts(socket, &old_irq)) { 593 pci_irq_status = yenta_probe_cb_irq(socket); 594 if (pci_irq_status == 1) { 595 printk(KERN_INFO "Yenta TI: socket %s parallel PCI interrupts, tied ok\n", 596 pci_name(socket->dev)); 597 goto out; 598 } 599 600 ti12xx_untie_interrupts(socket, old_irq); 601 } 602 } 603 604 out: 605 if (pci_irq_status < 1) { 606 socket->cb_irq = 0; 607 printk(KERN_INFO "Yenta TI: socket %s no PCI interrupts. Fish. Please report.\n", 608 pci_name(socket->dev)); 609 } 610 } 611 612 613 /* Returns true value if the second slot of a two-slot controller is empty */ 614 static int ti12xx_2nd_slot_empty(struct yenta_socket *socket) 615 { 616 struct pci_dev *func; 617 struct yenta_socket *slot2; 618 int devfn; 619 unsigned int state; 620 int ret = 1; 621 622 /* catch the two-slot controllers */ 623 switch (socket->dev->device) { 624 case PCI_DEVICE_ID_TI_1220: 625 case PCI_DEVICE_ID_TI_1221: 626 case PCI_DEVICE_ID_TI_1225: 627 case PCI_DEVICE_ID_TI_1251A: 628 case PCI_DEVICE_ID_TI_1251B: 629 case PCI_DEVICE_ID_TI_1420: 630 case PCI_DEVICE_ID_TI_1450: 631 case PCI_DEVICE_ID_TI_1451A: 632 case PCI_DEVICE_ID_TI_1520: 633 case PCI_DEVICE_ID_TI_1620: 634 case PCI_DEVICE_ID_TI_4520: 635 case PCI_DEVICE_ID_TI_4450: 636 case PCI_DEVICE_ID_TI_4451: 637 /* 638 * there are way more, but they need to be added in yenta_socket.c 639 * and pci_ids.h first anyway. 640 */ 641 break; 642 643 /* single-slot controllers have the 2nd slot empty always :) */ 644 default: 645 return 1; 646 } 647 648 /* get other slot */ 649 devfn = socket->dev->devfn & ~0x07; 650 func = pci_get_slot(socket->dev->bus, 651 (socket->dev->devfn & 0x07) ? devfn : devfn | 0x01); 652 if (!func) 653 return 1; 654 655 slot2 = pci_get_drvdata(func); 656 if (!slot2) 657 goto out; 658 659 /* check state */ 660 yenta_get_status(&socket->socket, &state); 661 if (state & SS_DETECT) { 662 ret = 0; 663 goto out; 664 } 665 666 out: 667 pci_dev_put(func); 668 return ret; 669 } 670 671 /* 672 * TI specifiy parts for the power hook. 673 * 674 * some TI's with some CB's produces interrupt storm on power on. it has been 675 * seen with atheros wlan cards on TI1225 and TI1410. solution is simply to 676 * disable any CB interrupts during this time. 677 */ 678 static int ti12xx_power_hook(struct pcmcia_socket *sock, int operation) 679 { 680 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); 681 u32 mfunc, devctl, sysctl; 682 u8 gpio3; 683 684 /* only POWER_PRE and POWER_POST are interesting */ 685 if ((operation != HOOK_POWER_PRE) && (operation != HOOK_POWER_POST)) 686 return 0; 687 688 devctl = config_readb(socket, TI113X_DEVICE_CONTROL); 689 sysctl = config_readl(socket, TI113X_SYSTEM_CONTROL); 690 mfunc = config_readl(socket, TI122X_MFUNC); 691 692 /* 693 * all serial/tied: only disable when modparm set. always doing it 694 * would mean a regression for working setups 'cos it disables the 695 * interrupts for both both slots on 2-slot controllers 696 * (and users of single slot controllers where it's save have to 697 * live with setting the modparm, most don't have to anyway) 698 */ 699 if (((devctl & TI113X_DCR_IMODE_MASK) == TI12XX_DCR_IMODE_ALL_SERIAL) && 700 (pwr_irqs_off || ti12xx_2nd_slot_empty(socket))) { 701 switch (socket->dev->device) { 702 case PCI_DEVICE_ID_TI_1250: 703 case PCI_DEVICE_ID_TI_1251A: 704 case PCI_DEVICE_ID_TI_1251B: 705 case PCI_DEVICE_ID_TI_1450: 706 case PCI_DEVICE_ID_TI_1451A: 707 case PCI_DEVICE_ID_TI_4450: 708 case PCI_DEVICE_ID_TI_4451: 709 /* these chips have no IRQSER setting in MFUNC3 */ 710 break; 711 712 default: 713 if (operation == HOOK_POWER_PRE) 714 mfunc = (mfunc & ~TI122X_MFUNC3_MASK); 715 else 716 mfunc = (mfunc & ~TI122X_MFUNC3_MASK) | TI122X_MFUNC3_IRQSER; 717 } 718 719 return 0; 720 } 721 722 /* do the job differently for func0/1 */ 723 if ((PCI_FUNC(socket->dev->devfn) == 0) || 724 ((sysctl & TI122X_SCR_INTRTIE) && 725 (pwr_irqs_off || ti12xx_2nd_slot_empty(socket)))) { 726 /* some bridges are different */ 727 switch (socket->dev->device) { 728 case PCI_DEVICE_ID_TI_1250: 729 case PCI_DEVICE_ID_TI_1251A: 730 case PCI_DEVICE_ID_TI_1251B: 731 case PCI_DEVICE_ID_TI_1450: 732 /* those oldies use gpio3 for INTA */ 733 gpio3 = config_readb(socket, TI1250_GPIO3_CONTROL); 734 if (operation == HOOK_POWER_PRE) 735 gpio3 = (gpio3 & ~TI1250_GPIO_MODE_MASK) | 0x40; 736 else 737 gpio3 &= ~TI1250_GPIO_MODE_MASK; 738 config_writeb(socket, TI1250_GPIO3_CONTROL, gpio3); 739 break; 740 741 default: 742 /* all new bridges are the same */ 743 if (operation == HOOK_POWER_PRE) 744 mfunc &= ~TI122X_MFUNC0_MASK; 745 else 746 mfunc |= TI122X_MFUNC0_INTA; 747 config_writel(socket, TI122X_MFUNC, mfunc); 748 } 749 } else { 750 switch (socket->dev->device) { 751 case PCI_DEVICE_ID_TI_1251A: 752 case PCI_DEVICE_ID_TI_1251B: 753 case PCI_DEVICE_ID_TI_1450: 754 /* those have INTA elsewhere and INTB in MFUNC0 */ 755 if (operation == HOOK_POWER_PRE) 756 mfunc &= ~TI122X_MFUNC0_MASK; 757 else 758 mfunc |= TI125X_MFUNC0_INTB; 759 config_writel(socket, TI122X_MFUNC, mfunc); 760 761 break; 762 763 default: 764 /* all new bridges are the same */ 765 if (operation == HOOK_POWER_PRE) 766 mfunc &= ~TI122X_MFUNC1_MASK; 767 else 768 mfunc |= TI122X_MFUNC1_INTB; 769 config_writel(socket, TI122X_MFUNC, mfunc); 770 } 771 } 772 773 return 0; 774 } 775 776 static int ti12xx_override(struct yenta_socket *socket) 777 { 778 u32 val, val_orig; 779 780 /* make sure that memory burst is active */ 781 val_orig = val = config_readl(socket, TI113X_SYSTEM_CONTROL); 782 if (disable_clkrun && PCI_FUNC(socket->dev->devfn) == 0) { 783 printk(KERN_INFO "Yenta: Disabling CLKRUN feature\n"); 784 val |= TI113X_SCR_KEEPCLK; 785 } 786 if (!(val & TI122X_SCR_MRBURSTUP)) { 787 printk(KERN_INFO "Yenta: Enabling burst memory read transactions\n"); 788 val |= TI122X_SCR_MRBURSTUP; 789 } 790 if (val_orig != val) 791 config_writel(socket, TI113X_SYSTEM_CONTROL, val); 792 793 /* 794 * for EnE bridges only: clear testbit TLTEnable. this makes the 795 * RME Hammerfall DSP sound card working. 796 */ 797 if (socket->dev->vendor == PCI_VENDOR_ID_ENE) { 798 u8 test_c9 = config_readb(socket, ENE_TEST_C9); 799 test_c9 &= ~ENE_TEST_C9_TLTENABLE; 800 config_writeb(socket, ENE_TEST_C9, test_c9); 801 } 802 803 /* 804 * Yenta expects controllers to use CSCINT to route 805 * CSC interrupts to PCI rather than INTVAL. 806 */ 807 val = config_readb(socket, TI1250_DIAGNOSTIC); 808 printk(KERN_INFO "Yenta: Using %s to route CSC interrupts to PCI\n", 809 (val & TI1250_DIAG_PCI_CSC) ? "CSCINT" : "INTVAL"); 810 printk(KERN_INFO "Yenta: Routing CardBus interrupts to %s\n", 811 (val & TI1250_DIAG_PCI_IREQ) ? "PCI" : "ISA"); 812 813 /* do irqrouting, depending on function */ 814 if (PCI_FUNC(socket->dev->devfn) == 0) 815 ti12xx_irqroute_func0(socket); 816 else 817 ti12xx_irqroute_func1(socket); 818 819 /* install power hook */ 820 socket->socket.power_hook = ti12xx_power_hook; 821 822 return ti_override(socket); 823 } 824 825 826 static int ti1250_override(struct yenta_socket *socket) 827 { 828 u8 old, diag; 829 830 old = config_readb(socket, TI1250_DIAGNOSTIC); 831 diag = old & ~(TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ); 832 if (socket->cb_irq) 833 diag |= TI1250_DIAG_PCI_CSC | TI1250_DIAG_PCI_IREQ; 834 835 if (diag != old) { 836 printk(KERN_INFO "Yenta: adjusting diagnostic: %02x -> %02x\n", 837 old, diag); 838 config_writeb(socket, TI1250_DIAGNOSTIC, diag); 839 } 840 841 return ti12xx_override(socket); 842 } 843 844 #endif /* _LINUX_TI113X_H */ 845 846