xref: /linux/drivers/pci/pci-sysfs.c (revision 5e8d780d745c1619aba81fe7166c5a4b5cad2b84)
1 /*
2  * drivers/pci/pci-sysfs.c
3  *
4  * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5  * (C) Copyright 2002-2004 IBM Corp.
6  * (C) Copyright 2003 Matthew Wilcox
7  * (C) Copyright 2003 Hewlett-Packard
8  * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9  * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10  *
11  * File attributes for PCI devices
12  *
13  * Modeled after usb's driverfs.c
14  *
15  */
16 
17 
18 #include <linux/config.h>
19 #include <linux/kernel.h>
20 #include <linux/pci.h>
21 #include <linux/stat.h>
22 #include <linux/topology.h>
23 #include <linux/mm.h>
24 
25 #include "pci.h"
26 
27 static int sysfs_initialized;	/* = 0 */
28 
29 /* show configuration fields */
30 #define pci_config_attr(field, format_string)				\
31 static ssize_t								\
32 field##_show(struct device *dev, struct device_attribute *attr, char *buf)				\
33 {									\
34 	struct pci_dev *pdev;						\
35 									\
36 	pdev = to_pci_dev (dev);					\
37 	return sprintf (buf, format_string, pdev->field);		\
38 }
39 
40 pci_config_attr(vendor, "0x%04x\n");
41 pci_config_attr(device, "0x%04x\n");
42 pci_config_attr(subsystem_vendor, "0x%04x\n");
43 pci_config_attr(subsystem_device, "0x%04x\n");
44 pci_config_attr(class, "0x%06x\n");
45 pci_config_attr(irq, "%u\n");
46 pci_config_attr(is_enabled, "%u\n");
47 
48 static ssize_t broken_parity_status_show(struct device *dev,
49 					 struct device_attribute *attr,
50 					 char *buf)
51 {
52 	struct pci_dev *pdev = to_pci_dev(dev);
53 	return sprintf (buf, "%u\n", pdev->broken_parity_status);
54 }
55 
56 static ssize_t broken_parity_status_store(struct device *dev,
57 					  struct device_attribute *attr,
58 					  const char *buf, size_t count)
59 {
60 	struct pci_dev *pdev = to_pci_dev(dev);
61 	ssize_t consumed = -EINVAL;
62 
63 	if ((count > 0) && (*buf == '0' || *buf == '1')) {
64 		pdev->broken_parity_status = *buf == '1' ? 1 : 0;
65 		consumed = count;
66 	}
67 	return consumed;
68 }
69 
70 static ssize_t local_cpus_show(struct device *dev,
71 			struct device_attribute *attr, char *buf)
72 {
73 	cpumask_t mask;
74 	int len;
75 
76 	mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
77 	len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
78 	strcat(buf,"\n");
79 	return 1+len;
80 }
81 
82 /* show resources */
83 static ssize_t
84 resource_show(struct device * dev, struct device_attribute *attr, char * buf)
85 {
86 	struct pci_dev * pci_dev = to_pci_dev(dev);
87 	char * str = buf;
88 	int i;
89 	int max = 7;
90 	resource_size_t start, end;
91 
92 	if (pci_dev->subordinate)
93 		max = DEVICE_COUNT_RESOURCE;
94 
95 	for (i = 0; i < max; i++) {
96 		struct resource *res =  &pci_dev->resource[i];
97 		pci_resource_to_user(pci_dev, i, res, &start, &end);
98 		str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
99 			       (unsigned long long)start,
100 			       (unsigned long long)end,
101 			       (unsigned long long)res->flags);
102 	}
103 	return (str - buf);
104 }
105 
106 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
107 {
108 	struct pci_dev *pci_dev = to_pci_dev(dev);
109 
110 	return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
111 		       pci_dev->vendor, pci_dev->device,
112 		       pci_dev->subsystem_vendor, pci_dev->subsystem_device,
113 		       (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
114 		       (u8)(pci_dev->class));
115 }
116 static ssize_t
117 is_enabled_store(struct device *dev, struct device_attribute *attr,
118 		const char *buf, size_t count)
119 {
120 	struct pci_dev *pdev = to_pci_dev(dev);
121 
122 	/* this can crash the machine when done on the "wrong" device */
123 	if (!capable(CAP_SYS_ADMIN))
124 		return count;
125 
126 	if (*buf == '0')
127 		pci_disable_device(pdev);
128 
129 	if (*buf == '1')
130 		pci_enable_device(pdev);
131 
132 	return count;
133 }
134 
135 
136 struct device_attribute pci_dev_attrs[] = {
137 	__ATTR_RO(resource),
138 	__ATTR_RO(vendor),
139 	__ATTR_RO(device),
140 	__ATTR_RO(subsystem_vendor),
141 	__ATTR_RO(subsystem_device),
142 	__ATTR_RO(class),
143 	__ATTR_RO(irq),
144 	__ATTR_RO(local_cpus),
145 	__ATTR_RO(modalias),
146 	__ATTR(enable, 0600, is_enabled_show, is_enabled_store),
147 	__ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
148 		broken_parity_status_show,broken_parity_status_store),
149 	__ATTR_NULL,
150 };
151 
152 static ssize_t
153 pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
154 {
155 	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
156 	unsigned int size = 64;
157 	loff_t init_off = off;
158 	u8 *data = (u8*) buf;
159 
160 	/* Several chips lock up trying to read undefined config space */
161 	if (capable(CAP_SYS_ADMIN)) {
162 		size = dev->cfg_size;
163 	} else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
164 		size = 128;
165 	}
166 
167 	if (off > size)
168 		return 0;
169 	if (off + count > size) {
170 		size -= off;
171 		count = size;
172 	} else {
173 		size = count;
174 	}
175 
176 	if ((off & 1) && size) {
177 		u8 val;
178 		pci_user_read_config_byte(dev, off, &val);
179 		data[off - init_off] = val;
180 		off++;
181 		size--;
182 	}
183 
184 	if ((off & 3) && size > 2) {
185 		u16 val;
186 		pci_user_read_config_word(dev, off, &val);
187 		data[off - init_off] = val & 0xff;
188 		data[off - init_off + 1] = (val >> 8) & 0xff;
189 		off += 2;
190 		size -= 2;
191 	}
192 
193 	while (size > 3) {
194 		u32 val;
195 		pci_user_read_config_dword(dev, off, &val);
196 		data[off - init_off] = val & 0xff;
197 		data[off - init_off + 1] = (val >> 8) & 0xff;
198 		data[off - init_off + 2] = (val >> 16) & 0xff;
199 		data[off - init_off + 3] = (val >> 24) & 0xff;
200 		off += 4;
201 		size -= 4;
202 	}
203 
204 	if (size >= 2) {
205 		u16 val;
206 		pci_user_read_config_word(dev, off, &val);
207 		data[off - init_off] = val & 0xff;
208 		data[off - init_off + 1] = (val >> 8) & 0xff;
209 		off += 2;
210 		size -= 2;
211 	}
212 
213 	if (size > 0) {
214 		u8 val;
215 		pci_user_read_config_byte(dev, off, &val);
216 		data[off - init_off] = val;
217 		off++;
218 		--size;
219 	}
220 
221 	return count;
222 }
223 
224 static ssize_t
225 pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
226 {
227 	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
228 	unsigned int size = count;
229 	loff_t init_off = off;
230 	u8 *data = (u8*) buf;
231 
232 	if (off > dev->cfg_size)
233 		return 0;
234 	if (off + count > dev->cfg_size) {
235 		size = dev->cfg_size - off;
236 		count = size;
237 	}
238 
239 	if ((off & 1) && size) {
240 		pci_user_write_config_byte(dev, off, data[off - init_off]);
241 		off++;
242 		size--;
243 	}
244 
245 	if ((off & 3) && size > 2) {
246 		u16 val = data[off - init_off];
247 		val |= (u16) data[off - init_off + 1] << 8;
248                 pci_user_write_config_word(dev, off, val);
249                 off += 2;
250                 size -= 2;
251         }
252 
253 	while (size > 3) {
254 		u32 val = data[off - init_off];
255 		val |= (u32) data[off - init_off + 1] << 8;
256 		val |= (u32) data[off - init_off + 2] << 16;
257 		val |= (u32) data[off - init_off + 3] << 24;
258 		pci_user_write_config_dword(dev, off, val);
259 		off += 4;
260 		size -= 4;
261 	}
262 
263 	if (size >= 2) {
264 		u16 val = data[off - init_off];
265 		val |= (u16) data[off - init_off + 1] << 8;
266 		pci_user_write_config_word(dev, off, val);
267 		off += 2;
268 		size -= 2;
269 	}
270 
271 	if (size) {
272 		pci_user_write_config_byte(dev, off, data[off - init_off]);
273 		off++;
274 		--size;
275 	}
276 
277 	return count;
278 }
279 
280 #ifdef HAVE_PCI_LEGACY
281 /**
282  * pci_read_legacy_io - read byte(s) from legacy I/O port space
283  * @kobj: kobject corresponding to file to read from
284  * @buf: buffer to store results
285  * @off: offset into legacy I/O port space
286  * @count: number of bytes to read
287  *
288  * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
289  * callback routine (pci_legacy_read).
290  */
291 ssize_t
292 pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
293 {
294         struct pci_bus *bus = to_pci_bus(container_of(kobj,
295                                                       struct class_device,
296 						      kobj));
297 
298         /* Only support 1, 2 or 4 byte accesses */
299         if (count != 1 && count != 2 && count != 4)
300                 return -EINVAL;
301 
302         return pci_legacy_read(bus, off, (u32 *)buf, count);
303 }
304 
305 /**
306  * pci_write_legacy_io - write byte(s) to legacy I/O port space
307  * @kobj: kobject corresponding to file to read from
308  * @buf: buffer containing value to be written
309  * @off: offset into legacy I/O port space
310  * @count: number of bytes to write
311  *
312  * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
313  * callback routine (pci_legacy_write).
314  */
315 ssize_t
316 pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
317 {
318         struct pci_bus *bus = to_pci_bus(container_of(kobj,
319 						      struct class_device,
320 						      kobj));
321         /* Only support 1, 2 or 4 byte accesses */
322         if (count != 1 && count != 2 && count != 4)
323                 return -EINVAL;
324 
325         return pci_legacy_write(bus, off, *(u32 *)buf, count);
326 }
327 
328 /**
329  * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
330  * @kobj: kobject corresponding to device to be mapped
331  * @attr: struct bin_attribute for this file
332  * @vma: struct vm_area_struct passed to mmap
333  *
334  * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
335  * legacy memory space (first meg of bus space) into application virtual
336  * memory space.
337  */
338 int
339 pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
340                     struct vm_area_struct *vma)
341 {
342         struct pci_bus *bus = to_pci_bus(container_of(kobj,
343                                                       struct class_device,
344 						      kobj));
345 
346         return pci_mmap_legacy_page_range(bus, vma);
347 }
348 #endif /* HAVE_PCI_LEGACY */
349 
350 #ifdef HAVE_PCI_MMAP
351 /**
352  * pci_mmap_resource - map a PCI resource into user memory space
353  * @kobj: kobject for mapping
354  * @attr: struct bin_attribute for the file being mapped
355  * @vma: struct vm_area_struct passed into the mmap
356  *
357  * Use the regular PCI mapping routines to map a PCI resource into userspace.
358  * FIXME: write combining?  maybe automatic for prefetchable regions?
359  */
360 static int
361 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
362 		  struct vm_area_struct *vma)
363 {
364 	struct pci_dev *pdev = to_pci_dev(container_of(kobj,
365 						       struct device, kobj));
366 	struct resource *res = (struct resource *)attr->private;
367 	enum pci_mmap_state mmap_type;
368 	resource_size_t start, end;
369 	int i;
370 
371 	for (i = 0; i < PCI_ROM_RESOURCE; i++)
372 		if (res == &pdev->resource[i])
373 			break;
374 	if (i >= PCI_ROM_RESOURCE)
375 		return -ENODEV;
376 
377 	/* pci_mmap_page_range() expects the same kind of entry as coming
378 	 * from /proc/bus/pci/ which is a "user visible" value. If this is
379 	 * different from the resource itself, arch will do necessary fixup.
380 	 */
381 	pci_resource_to_user(pdev, i, res, &start, &end);
382 	vma->vm_pgoff += start >> PAGE_SHIFT;
383 	mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
384 
385 	return pci_mmap_page_range(pdev, vma, mmap_type, 0);
386 }
387 
388 /**
389  * pci_create_resource_files - create resource files in sysfs for @dev
390  * @dev: dev in question
391  *
392  * Walk the resources in @dev creating files for each resource available.
393  */
394 static void
395 pci_create_resource_files(struct pci_dev *pdev)
396 {
397 	int i;
398 
399 	/* Expose the PCI resources from this device as files */
400 	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
401 		struct bin_attribute *res_attr;
402 
403 		/* skip empty resources */
404 		if (!pci_resource_len(pdev, i))
405 			continue;
406 
407 		/* allocate attribute structure, piggyback attribute name */
408 		res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
409 		if (res_attr) {
410 			char *res_attr_name = (char *)(res_attr + 1);
411 
412 			pdev->res_attr[i] = res_attr;
413 			sprintf(res_attr_name, "resource%d", i);
414 			res_attr->attr.name = res_attr_name;
415 			res_attr->attr.mode = S_IRUSR | S_IWUSR;
416 			res_attr->attr.owner = THIS_MODULE;
417 			res_attr->size = pci_resource_len(pdev, i);
418 			res_attr->mmap = pci_mmap_resource;
419 			res_attr->private = &pdev->resource[i];
420 			sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
421 		}
422 	}
423 }
424 
425 /**
426  * pci_remove_resource_files - cleanup resource files
427  * @dev: dev to cleanup
428  *
429  * If we created resource files for @dev, remove them from sysfs and
430  * free their resources.
431  */
432 static void
433 pci_remove_resource_files(struct pci_dev *pdev)
434 {
435 	int i;
436 
437 	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
438 		struct bin_attribute *res_attr;
439 
440 		res_attr = pdev->res_attr[i];
441 		if (res_attr) {
442 			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
443 			kfree(res_attr);
444 		}
445 	}
446 }
447 #else /* !HAVE_PCI_MMAP */
448 static inline void pci_create_resource_files(struct pci_dev *dev) { return; }
449 static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
450 #endif /* HAVE_PCI_MMAP */
451 
452 /**
453  * pci_write_rom - used to enable access to the PCI ROM display
454  * @kobj: kernel object handle
455  * @buf: user input
456  * @off: file offset
457  * @count: number of byte in input
458  *
459  * writing anything except 0 enables it
460  */
461 static ssize_t
462 pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
463 {
464 	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
465 
466 	if ((off ==  0) && (*buf == '0') && (count == 2))
467 		pdev->rom_attr_enabled = 0;
468 	else
469 		pdev->rom_attr_enabled = 1;
470 
471 	return count;
472 }
473 
474 /**
475  * pci_read_rom - read a PCI ROM
476  * @kobj: kernel object handle
477  * @buf: where to put the data we read from the ROM
478  * @off: file offset
479  * @count: number of bytes to read
480  *
481  * Put @count bytes starting at @off into @buf from the ROM in the PCI
482  * device corresponding to @kobj.
483  */
484 static ssize_t
485 pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
486 {
487 	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
488 	void __iomem *rom;
489 	size_t size;
490 
491 	if (!pdev->rom_attr_enabled)
492 		return -EINVAL;
493 
494 	rom = pci_map_rom(pdev, &size);	/* size starts out as PCI window size */
495 	if (!rom)
496 		return 0;
497 
498 	if (off >= size)
499 		count = 0;
500 	else {
501 		if (off + count > size)
502 			count = size - off;
503 
504 		memcpy_fromio(buf, rom + off, count);
505 	}
506 	pci_unmap_rom(pdev, rom);
507 
508 	return count;
509 }
510 
511 static struct bin_attribute pci_config_attr = {
512 	.attr =	{
513 		.name = "config",
514 		.mode = S_IRUGO | S_IWUSR,
515 		.owner = THIS_MODULE,
516 	},
517 	.size = 256,
518 	.read = pci_read_config,
519 	.write = pci_write_config,
520 };
521 
522 static struct bin_attribute pcie_config_attr = {
523 	.attr =	{
524 		.name = "config",
525 		.mode = S_IRUGO | S_IWUSR,
526 		.owner = THIS_MODULE,
527 	},
528 	.size = 4096,
529 	.read = pci_read_config,
530 	.write = pci_write_config,
531 };
532 
533 int pci_create_sysfs_dev_files (struct pci_dev *pdev)
534 {
535 	if (!sysfs_initialized)
536 		return -EACCES;
537 
538 	if (pdev->cfg_size < 4096)
539 		sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
540 	else
541 		sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
542 
543 	pci_create_resource_files(pdev);
544 
545 	/* If the device has a ROM, try to expose it in sysfs. */
546 	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
547 		struct bin_attribute *rom_attr;
548 
549 		rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
550 		if (rom_attr) {
551 			pdev->rom_attr = rom_attr;
552 			rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
553 			rom_attr->attr.name = "rom";
554 			rom_attr->attr.mode = S_IRUSR;
555 			rom_attr->attr.owner = THIS_MODULE;
556 			rom_attr->read = pci_read_rom;
557 			rom_attr->write = pci_write_rom;
558 			sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
559 		}
560 	}
561 	/* add platform-specific attributes */
562 	pcibios_add_platform_entries(pdev);
563 
564 	return 0;
565 }
566 
567 /**
568  * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
569  * @pdev: device whose entries we should free
570  *
571  * Cleanup when @pdev is removed from sysfs.
572  */
573 void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
574 {
575 	if (pdev->cfg_size < 4096)
576 		sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
577 	else
578 		sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
579 
580 	pci_remove_resource_files(pdev);
581 
582 	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
583 		if (pdev->rom_attr) {
584 			sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
585 			kfree(pdev->rom_attr);
586 		}
587 	}
588 }
589 
590 static int __init pci_sysfs_init(void)
591 {
592 	struct pci_dev *pdev = NULL;
593 
594 	sysfs_initialized = 1;
595 	for_each_pci_dev(pdev)
596 		pci_create_sysfs_dev_files(pdev);
597 
598 	return 0;
599 }
600 
601 __initcall(pci_sysfs_init);
602