xref: /linux/drivers/pci/iov.c (revision 5a8eb24292ffd68604cedeb24ad2b4bc02cfc037)
1d1b054daSYu Zhao /*
2d1b054daSYu Zhao  * drivers/pci/iov.c
3d1b054daSYu Zhao  *
4d1b054daSYu Zhao  * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5d1b054daSYu Zhao  *
6d1b054daSYu Zhao  * PCI Express I/O Virtualization (IOV) support.
7d1b054daSYu Zhao  *   Single Root IOV 1.0
8302b4215SYu Zhao  *   Address Translation Service 1.0
9d1b054daSYu Zhao  */
10d1b054daSYu Zhao 
11d1b054daSYu Zhao #include <linux/pci.h>
125a0e3ad6STejun Heo #include <linux/slab.h>
13d1b054daSYu Zhao #include <linux/mutex.h>
14363c75dbSPaul Gortmaker #include <linux/export.h>
15d1b054daSYu Zhao #include <linux/string.h>
16d1b054daSYu Zhao #include <linux/delay.h>
175cdede24SJoerg Roedel #include <linux/pci-ats.h>
18d1b054daSYu Zhao #include "pci.h"
19d1b054daSYu Zhao 
20dd7cc44dSYu Zhao #define VIRTFN_ID_LEN	16
21d1b054daSYu Zhao 
22a28724b0SYu Zhao static inline u8 virtfn_bus(struct pci_dev *dev, int id)
23a28724b0SYu Zhao {
24a28724b0SYu Zhao 	return dev->bus->number + ((dev->devfn + dev->sriov->offset +
25a28724b0SYu Zhao 				    dev->sriov->stride * id) >> 8);
26a28724b0SYu Zhao }
27a28724b0SYu Zhao 
28a28724b0SYu Zhao static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
29a28724b0SYu Zhao {
30a28724b0SYu Zhao 	return (dev->devfn + dev->sriov->offset +
31a28724b0SYu Zhao 		dev->sriov->stride * id) & 0xff;
32a28724b0SYu Zhao }
33a28724b0SYu Zhao 
34dd7cc44dSYu Zhao static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
35dd7cc44dSYu Zhao {
36dd7cc44dSYu Zhao 	struct pci_bus *child;
37dd7cc44dSYu Zhao 
38dd7cc44dSYu Zhao 	if (bus->number == busnr)
39dd7cc44dSYu Zhao 		return bus;
40dd7cc44dSYu Zhao 
41dd7cc44dSYu Zhao 	child = pci_find_bus(pci_domain_nr(bus), busnr);
42dd7cc44dSYu Zhao 	if (child)
43dd7cc44dSYu Zhao 		return child;
44dd7cc44dSYu Zhao 
45dd7cc44dSYu Zhao 	child = pci_add_new_bus(bus, NULL, busnr);
46dd7cc44dSYu Zhao 	if (!child)
47dd7cc44dSYu Zhao 		return NULL;
48dd7cc44dSYu Zhao 
49b7eac055SYinghai Lu 	pci_bus_insert_busn_res(child, busnr, busnr);
504f535093SYinghai Lu 	bus->is_added = 1;
51dd7cc44dSYu Zhao 
52dd7cc44dSYu Zhao 	return child;
53dd7cc44dSYu Zhao }
54dd7cc44dSYu Zhao 
55dd7cc44dSYu Zhao static void virtfn_remove_bus(struct pci_bus *bus, int busnr)
56dd7cc44dSYu Zhao {
57dd7cc44dSYu Zhao 	struct pci_bus *child;
58dd7cc44dSYu Zhao 
59dd7cc44dSYu Zhao 	if (bus->number == busnr)
60dd7cc44dSYu Zhao 		return;
61dd7cc44dSYu Zhao 
62dd7cc44dSYu Zhao 	child = pci_find_bus(pci_domain_nr(bus), busnr);
63dd7cc44dSYu Zhao 	BUG_ON(!child);
64dd7cc44dSYu Zhao 
65dd7cc44dSYu Zhao 	if (list_empty(&child->devices))
66dd7cc44dSYu Zhao 		pci_remove_bus(child);
67dd7cc44dSYu Zhao }
68dd7cc44dSYu Zhao 
69dd7cc44dSYu Zhao static int virtfn_add(struct pci_dev *dev, int id, int reset)
70dd7cc44dSYu Zhao {
71dd7cc44dSYu Zhao 	int i;
72dd7cc44dSYu Zhao 	int rc;
73dd7cc44dSYu Zhao 	u64 size;
74dd7cc44dSYu Zhao 	char buf[VIRTFN_ID_LEN];
75dd7cc44dSYu Zhao 	struct pci_dev *virtfn;
76dd7cc44dSYu Zhao 	struct resource *res;
77dd7cc44dSYu Zhao 	struct pci_sriov *iov = dev->sriov;
78dd7cc44dSYu Zhao 
79dd7cc44dSYu Zhao 	virtfn = alloc_pci_dev();
80dd7cc44dSYu Zhao 	if (!virtfn)
81dd7cc44dSYu Zhao 		return -ENOMEM;
82dd7cc44dSYu Zhao 
83dd7cc44dSYu Zhao 	mutex_lock(&iov->dev->sriov->lock);
84dd7cc44dSYu Zhao 	virtfn->bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
85dd7cc44dSYu Zhao 	if (!virtfn->bus) {
86dd7cc44dSYu Zhao 		kfree(virtfn);
87dd7cc44dSYu Zhao 		mutex_unlock(&iov->dev->sriov->lock);
88dd7cc44dSYu Zhao 		return -ENOMEM;
89dd7cc44dSYu Zhao 	}
90dd7cc44dSYu Zhao 	virtfn->devfn = virtfn_devfn(dev, id);
91dd7cc44dSYu Zhao 	virtfn->vendor = dev->vendor;
92dd7cc44dSYu Zhao 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
93dd7cc44dSYu Zhao 	pci_setup_device(virtfn);
94dd7cc44dSYu Zhao 	virtfn->dev.parent = dev->dev.parent;
95dd7cc44dSYu Zhao 
96dd7cc44dSYu Zhao 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
97dd7cc44dSYu Zhao 		res = dev->resource + PCI_IOV_RESOURCES + i;
98dd7cc44dSYu Zhao 		if (!res->parent)
99dd7cc44dSYu Zhao 			continue;
100dd7cc44dSYu Zhao 		virtfn->resource[i].name = pci_name(virtfn);
101dd7cc44dSYu Zhao 		virtfn->resource[i].flags = res->flags;
102dd7cc44dSYu Zhao 		size = resource_size(res);
1036b136724SBjorn Helgaas 		do_div(size, iov->total_VFs);
104dd7cc44dSYu Zhao 		virtfn->resource[i].start = res->start + size * id;
105dd7cc44dSYu Zhao 		virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
106dd7cc44dSYu Zhao 		rc = request_resource(res, &virtfn->resource[i]);
107dd7cc44dSYu Zhao 		BUG_ON(rc);
108dd7cc44dSYu Zhao 	}
109dd7cc44dSYu Zhao 
110dd7cc44dSYu Zhao 	if (reset)
1118c1c699fSYu Zhao 		__pci_reset_function(virtfn);
112dd7cc44dSYu Zhao 
113dd7cc44dSYu Zhao 	pci_device_add(virtfn, virtfn->bus);
114dd7cc44dSYu Zhao 	mutex_unlock(&iov->dev->sriov->lock);
115dd7cc44dSYu Zhao 
116dd7cc44dSYu Zhao 	virtfn->physfn = pci_dev_get(dev);
117dd7cc44dSYu Zhao 	virtfn->is_virtfn = 1;
118dd7cc44dSYu Zhao 
119dd7cc44dSYu Zhao 	rc = pci_bus_add_device(virtfn);
120dd7cc44dSYu Zhao 	sprintf(buf, "virtfn%u", id);
121dd7cc44dSYu Zhao 	rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
122dd7cc44dSYu Zhao 	if (rc)
123dd7cc44dSYu Zhao 		goto failed1;
124dd7cc44dSYu Zhao 	rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
125dd7cc44dSYu Zhao 	if (rc)
126dd7cc44dSYu Zhao 		goto failed2;
127dd7cc44dSYu Zhao 
128dd7cc44dSYu Zhao 	kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
129dd7cc44dSYu Zhao 
130dd7cc44dSYu Zhao 	return 0;
131dd7cc44dSYu Zhao 
132dd7cc44dSYu Zhao failed2:
133dd7cc44dSYu Zhao 	sysfs_remove_link(&dev->dev.kobj, buf);
134dd7cc44dSYu Zhao failed1:
135dd7cc44dSYu Zhao 	pci_dev_put(dev);
136dd7cc44dSYu Zhao 	mutex_lock(&iov->dev->sriov->lock);
137210647afSYinghai Lu 	pci_stop_and_remove_bus_device(virtfn);
138dd7cc44dSYu Zhao 	virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
139dd7cc44dSYu Zhao 	mutex_unlock(&iov->dev->sriov->lock);
140dd7cc44dSYu Zhao 
141dd7cc44dSYu Zhao 	return rc;
142dd7cc44dSYu Zhao }
143dd7cc44dSYu Zhao 
144dd7cc44dSYu Zhao static void virtfn_remove(struct pci_dev *dev, int id, int reset)
145dd7cc44dSYu Zhao {
146dd7cc44dSYu Zhao 	char buf[VIRTFN_ID_LEN];
14794bb3464SBjorn Helgaas 	struct pci_bus *bus;
148dd7cc44dSYu Zhao 	struct pci_dev *virtfn;
149dd7cc44dSYu Zhao 	struct pci_sriov *iov = dev->sriov;
150dd7cc44dSYu Zhao 
15194bb3464SBjorn Helgaas 	bus = pci_find_bus(pci_domain_nr(dev->bus), virtfn_bus(dev, id));
15294bb3464SBjorn Helgaas 	if (!bus)
15394bb3464SBjorn Helgaas 		return;
15494bb3464SBjorn Helgaas 
15594bb3464SBjorn Helgaas 	virtfn = pci_get_slot(bus, virtfn_devfn(dev, id));
156dd7cc44dSYu Zhao 	if (!virtfn)
157dd7cc44dSYu Zhao 		return;
158dd7cc44dSYu Zhao 
159dd7cc44dSYu Zhao 	pci_dev_put(virtfn);
160dd7cc44dSYu Zhao 
161dd7cc44dSYu Zhao 	if (reset) {
162dd7cc44dSYu Zhao 		device_release_driver(&virtfn->dev);
1638c1c699fSYu Zhao 		__pci_reset_function(virtfn);
164dd7cc44dSYu Zhao 	}
165dd7cc44dSYu Zhao 
166dd7cc44dSYu Zhao 	sprintf(buf, "virtfn%u", id);
167dd7cc44dSYu Zhao 	sysfs_remove_link(&dev->dev.kobj, buf);
16809cedbefSYinghai Lu 	/*
16909cedbefSYinghai Lu 	 * pci_stop_dev() could have been called for this virtfn already,
17009cedbefSYinghai Lu 	 * so the directory for the virtfn may have been removed before.
17109cedbefSYinghai Lu 	 * Double check to avoid spurious sysfs warnings.
17209cedbefSYinghai Lu 	 */
17309cedbefSYinghai Lu 	if (virtfn->dev.kobj.sd)
174dd7cc44dSYu Zhao 		sysfs_remove_link(&virtfn->dev.kobj, "physfn");
175dd7cc44dSYu Zhao 
176dd7cc44dSYu Zhao 	mutex_lock(&iov->dev->sriov->lock);
177210647afSYinghai Lu 	pci_stop_and_remove_bus_device(virtfn);
178dd7cc44dSYu Zhao 	virtfn_remove_bus(dev->bus, virtfn_bus(dev, id));
179dd7cc44dSYu Zhao 	mutex_unlock(&iov->dev->sriov->lock);
180dd7cc44dSYu Zhao 
181dd7cc44dSYu Zhao 	pci_dev_put(dev);
182dd7cc44dSYu Zhao }
183dd7cc44dSYu Zhao 
18474bb1bccSYu Zhao static int sriov_migration(struct pci_dev *dev)
18574bb1bccSYu Zhao {
18674bb1bccSYu Zhao 	u16 status;
18774bb1bccSYu Zhao 	struct pci_sriov *iov = dev->sriov;
18874bb1bccSYu Zhao 
1896b136724SBjorn Helgaas 	if (!iov->num_VFs)
19074bb1bccSYu Zhao 		return 0;
19174bb1bccSYu Zhao 
19274bb1bccSYu Zhao 	if (!(iov->cap & PCI_SRIOV_CAP_VFM))
19374bb1bccSYu Zhao 		return 0;
19474bb1bccSYu Zhao 
19574bb1bccSYu Zhao 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_STATUS, &status);
19674bb1bccSYu Zhao 	if (!(status & PCI_SRIOV_STATUS_VFM))
19774bb1bccSYu Zhao 		return 0;
19874bb1bccSYu Zhao 
19974bb1bccSYu Zhao 	schedule_work(&iov->mtask);
20074bb1bccSYu Zhao 
20174bb1bccSYu Zhao 	return 1;
20274bb1bccSYu Zhao }
20374bb1bccSYu Zhao 
20474bb1bccSYu Zhao static void sriov_migration_task(struct work_struct *work)
20574bb1bccSYu Zhao {
20674bb1bccSYu Zhao 	int i;
20774bb1bccSYu Zhao 	u8 state;
20874bb1bccSYu Zhao 	u16 status;
20974bb1bccSYu Zhao 	struct pci_sriov *iov = container_of(work, struct pci_sriov, mtask);
21074bb1bccSYu Zhao 
2116b136724SBjorn Helgaas 	for (i = iov->initial_VFs; i < iov->num_VFs; i++) {
21274bb1bccSYu Zhao 		state = readb(iov->mstate + i);
21374bb1bccSYu Zhao 		if (state == PCI_SRIOV_VFM_MI) {
21474bb1bccSYu Zhao 			writeb(PCI_SRIOV_VFM_AV, iov->mstate + i);
21574bb1bccSYu Zhao 			state = readb(iov->mstate + i);
21674bb1bccSYu Zhao 			if (state == PCI_SRIOV_VFM_AV)
21774bb1bccSYu Zhao 				virtfn_add(iov->self, i, 1);
21874bb1bccSYu Zhao 		} else if (state == PCI_SRIOV_VFM_MO) {
21974bb1bccSYu Zhao 			virtfn_remove(iov->self, i, 1);
22074bb1bccSYu Zhao 			writeb(PCI_SRIOV_VFM_UA, iov->mstate + i);
22174bb1bccSYu Zhao 			state = readb(iov->mstate + i);
22274bb1bccSYu Zhao 			if (state == PCI_SRIOV_VFM_AV)
22374bb1bccSYu Zhao 				virtfn_add(iov->self, i, 0);
22474bb1bccSYu Zhao 		}
22574bb1bccSYu Zhao 	}
22674bb1bccSYu Zhao 
22774bb1bccSYu Zhao 	pci_read_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, &status);
22874bb1bccSYu Zhao 	status &= ~PCI_SRIOV_STATUS_VFM;
22974bb1bccSYu Zhao 	pci_write_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, status);
23074bb1bccSYu Zhao }
23174bb1bccSYu Zhao 
23274bb1bccSYu Zhao static int sriov_enable_migration(struct pci_dev *dev, int nr_virtfn)
23374bb1bccSYu Zhao {
23474bb1bccSYu Zhao 	int bir;
23574bb1bccSYu Zhao 	u32 table;
23674bb1bccSYu Zhao 	resource_size_t pa;
23774bb1bccSYu Zhao 	struct pci_sriov *iov = dev->sriov;
23874bb1bccSYu Zhao 
2396b136724SBjorn Helgaas 	if (nr_virtfn <= iov->initial_VFs)
24074bb1bccSYu Zhao 		return 0;
24174bb1bccSYu Zhao 
24274bb1bccSYu Zhao 	pci_read_config_dword(dev, iov->pos + PCI_SRIOV_VFM, &table);
24374bb1bccSYu Zhao 	bir = PCI_SRIOV_VFM_BIR(table);
24474bb1bccSYu Zhao 	if (bir > PCI_STD_RESOURCE_END)
24574bb1bccSYu Zhao 		return -EIO;
24674bb1bccSYu Zhao 
24774bb1bccSYu Zhao 	table = PCI_SRIOV_VFM_OFFSET(table);
24874bb1bccSYu Zhao 	if (table + nr_virtfn > pci_resource_len(dev, bir))
24974bb1bccSYu Zhao 		return -EIO;
25074bb1bccSYu Zhao 
25174bb1bccSYu Zhao 	pa = pci_resource_start(dev, bir) + table;
25274bb1bccSYu Zhao 	iov->mstate = ioremap(pa, nr_virtfn);
25374bb1bccSYu Zhao 	if (!iov->mstate)
25474bb1bccSYu Zhao 		return -ENOMEM;
25574bb1bccSYu Zhao 
25674bb1bccSYu Zhao 	INIT_WORK(&iov->mtask, sriov_migration_task);
25774bb1bccSYu Zhao 
25874bb1bccSYu Zhao 	iov->ctrl |= PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR;
25974bb1bccSYu Zhao 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
26074bb1bccSYu Zhao 
26174bb1bccSYu Zhao 	return 0;
26274bb1bccSYu Zhao }
26374bb1bccSYu Zhao 
26474bb1bccSYu Zhao static void sriov_disable_migration(struct pci_dev *dev)
26574bb1bccSYu Zhao {
26674bb1bccSYu Zhao 	struct pci_sriov *iov = dev->sriov;
26774bb1bccSYu Zhao 
26874bb1bccSYu Zhao 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR);
26974bb1bccSYu Zhao 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
27074bb1bccSYu Zhao 
27174bb1bccSYu Zhao 	cancel_work_sync(&iov->mtask);
27274bb1bccSYu Zhao 	iounmap(iov->mstate);
27374bb1bccSYu Zhao }
27474bb1bccSYu Zhao 
275dd7cc44dSYu Zhao static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
276dd7cc44dSYu Zhao {
277dd7cc44dSYu Zhao 	int rc;
278dd7cc44dSYu Zhao 	int i, j;
279dd7cc44dSYu Zhao 	int nres;
280dd7cc44dSYu Zhao 	u16 offset, stride, initial;
281dd7cc44dSYu Zhao 	struct resource *res;
282dd7cc44dSYu Zhao 	struct pci_dev *pdev;
283dd7cc44dSYu Zhao 	struct pci_sriov *iov = dev->sriov;
284bbef98abSRam Pai 	int bars = 0;
285dd7cc44dSYu Zhao 
286dd7cc44dSYu Zhao 	if (!nr_virtfn)
287dd7cc44dSYu Zhao 		return 0;
288dd7cc44dSYu Zhao 
2896b136724SBjorn Helgaas 	if (iov->num_VFs)
290dd7cc44dSYu Zhao 		return -EINVAL;
291dd7cc44dSYu Zhao 
292dd7cc44dSYu Zhao 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
2936b136724SBjorn Helgaas 	if (initial > iov->total_VFs ||
2946b136724SBjorn Helgaas 	    (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
295dd7cc44dSYu Zhao 		return -EIO;
296dd7cc44dSYu Zhao 
2976b136724SBjorn Helgaas 	if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
298dd7cc44dSYu Zhao 	    (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
299dd7cc44dSYu Zhao 		return -EINVAL;
300dd7cc44dSYu Zhao 
301dd7cc44dSYu Zhao 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
302dd7cc44dSYu Zhao 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
303dd7cc44dSYu Zhao 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
304dd7cc44dSYu Zhao 	if (!offset || (nr_virtfn > 1 && !stride))
305dd7cc44dSYu Zhao 		return -EIO;
306dd7cc44dSYu Zhao 
307dd7cc44dSYu Zhao 	nres = 0;
308dd7cc44dSYu Zhao 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
309bbef98abSRam Pai 		bars |= (1 << (i + PCI_IOV_RESOURCES));
310dd7cc44dSYu Zhao 		res = dev->resource + PCI_IOV_RESOURCES + i;
311dd7cc44dSYu Zhao 		if (res->parent)
312dd7cc44dSYu Zhao 			nres++;
313dd7cc44dSYu Zhao 	}
314dd7cc44dSYu Zhao 	if (nres != iov->nres) {
315dd7cc44dSYu Zhao 		dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
316dd7cc44dSYu Zhao 		return -ENOMEM;
317dd7cc44dSYu Zhao 	}
318dd7cc44dSYu Zhao 
319dd7cc44dSYu Zhao 	iov->offset = offset;
320dd7cc44dSYu Zhao 	iov->stride = stride;
321dd7cc44dSYu Zhao 
322b918c62eSYinghai Lu 	if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->busn_res.end) {
323dd7cc44dSYu Zhao 		dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
324dd7cc44dSYu Zhao 		return -ENOMEM;
325dd7cc44dSYu Zhao 	}
326dd7cc44dSYu Zhao 
327bbef98abSRam Pai 	if (pci_enable_resources(dev, bars)) {
328bbef98abSRam Pai 		dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
329bbef98abSRam Pai 		return -ENOMEM;
330bbef98abSRam Pai 	}
331bbef98abSRam Pai 
332dd7cc44dSYu Zhao 	if (iov->link != dev->devfn) {
333dd7cc44dSYu Zhao 		pdev = pci_get_slot(dev->bus, iov->link);
334dd7cc44dSYu Zhao 		if (!pdev)
335dd7cc44dSYu Zhao 			return -ENODEV;
336dd7cc44dSYu Zhao 
337dd7cc44dSYu Zhao 		pci_dev_put(pdev);
338dd7cc44dSYu Zhao 
339dd7cc44dSYu Zhao 		if (!pdev->is_physfn)
340dd7cc44dSYu Zhao 			return -ENODEV;
341dd7cc44dSYu Zhao 
342dd7cc44dSYu Zhao 		rc = sysfs_create_link(&dev->dev.kobj,
343dd7cc44dSYu Zhao 					&pdev->dev.kobj, "dep_link");
344dd7cc44dSYu Zhao 		if (rc)
345dd7cc44dSYu Zhao 			return rc;
346dd7cc44dSYu Zhao 	}
347dd7cc44dSYu Zhao 
348dd7cc44dSYu Zhao 	iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
349fb51ccbfSJan Kiszka 	pci_cfg_access_lock(dev);
350dd7cc44dSYu Zhao 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
351dd7cc44dSYu Zhao 	msleep(100);
352fb51ccbfSJan Kiszka 	pci_cfg_access_unlock(dev);
353dd7cc44dSYu Zhao 
3546b136724SBjorn Helgaas 	iov->initial_VFs = initial;
355dd7cc44dSYu Zhao 	if (nr_virtfn < initial)
356dd7cc44dSYu Zhao 		initial = nr_virtfn;
357dd7cc44dSYu Zhao 
358dd7cc44dSYu Zhao 	for (i = 0; i < initial; i++) {
359dd7cc44dSYu Zhao 		rc = virtfn_add(dev, i, 0);
360dd7cc44dSYu Zhao 		if (rc)
361dd7cc44dSYu Zhao 			goto failed;
362dd7cc44dSYu Zhao 	}
363dd7cc44dSYu Zhao 
36474bb1bccSYu Zhao 	if (iov->cap & PCI_SRIOV_CAP_VFM) {
36574bb1bccSYu Zhao 		rc = sriov_enable_migration(dev, nr_virtfn);
36674bb1bccSYu Zhao 		if (rc)
36774bb1bccSYu Zhao 			goto failed;
36874bb1bccSYu Zhao 	}
36974bb1bccSYu Zhao 
370dd7cc44dSYu Zhao 	kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
3716b136724SBjorn Helgaas 	iov->num_VFs = nr_virtfn;
372dd7cc44dSYu Zhao 
373dd7cc44dSYu Zhao 	return 0;
374dd7cc44dSYu Zhao 
375dd7cc44dSYu Zhao failed:
376dd7cc44dSYu Zhao 	for (j = 0; j < i; j++)
377dd7cc44dSYu Zhao 		virtfn_remove(dev, j, 0);
378dd7cc44dSYu Zhao 
379dd7cc44dSYu Zhao 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
380fb51ccbfSJan Kiszka 	pci_cfg_access_lock(dev);
381dd7cc44dSYu Zhao 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
382dd7cc44dSYu Zhao 	ssleep(1);
383fb51ccbfSJan Kiszka 	pci_cfg_access_unlock(dev);
384dd7cc44dSYu Zhao 
385dd7cc44dSYu Zhao 	if (iov->link != dev->devfn)
386dd7cc44dSYu Zhao 		sysfs_remove_link(&dev->dev.kobj, "dep_link");
387dd7cc44dSYu Zhao 
388dd7cc44dSYu Zhao 	return rc;
389dd7cc44dSYu Zhao }
390dd7cc44dSYu Zhao 
391dd7cc44dSYu Zhao static void sriov_disable(struct pci_dev *dev)
392dd7cc44dSYu Zhao {
393dd7cc44dSYu Zhao 	int i;
394dd7cc44dSYu Zhao 	struct pci_sriov *iov = dev->sriov;
395dd7cc44dSYu Zhao 
3966b136724SBjorn Helgaas 	if (!iov->num_VFs)
397dd7cc44dSYu Zhao 		return;
398dd7cc44dSYu Zhao 
39974bb1bccSYu Zhao 	if (iov->cap & PCI_SRIOV_CAP_VFM)
40074bb1bccSYu Zhao 		sriov_disable_migration(dev);
40174bb1bccSYu Zhao 
4026b136724SBjorn Helgaas 	for (i = 0; i < iov->num_VFs; i++)
403dd7cc44dSYu Zhao 		virtfn_remove(dev, i, 0);
404dd7cc44dSYu Zhao 
405dd7cc44dSYu Zhao 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
406fb51ccbfSJan Kiszka 	pci_cfg_access_lock(dev);
407dd7cc44dSYu Zhao 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
408dd7cc44dSYu Zhao 	ssleep(1);
409fb51ccbfSJan Kiszka 	pci_cfg_access_unlock(dev);
410dd7cc44dSYu Zhao 
411dd7cc44dSYu Zhao 	if (iov->link != dev->devfn)
412dd7cc44dSYu Zhao 		sysfs_remove_link(&dev->dev.kobj, "dep_link");
413dd7cc44dSYu Zhao 
4146b136724SBjorn Helgaas 	iov->num_VFs = 0;
415dd7cc44dSYu Zhao }
416dd7cc44dSYu Zhao 
417d1b054daSYu Zhao static int sriov_init(struct pci_dev *dev, int pos)
418d1b054daSYu Zhao {
419d1b054daSYu Zhao 	int i;
420d1b054daSYu Zhao 	int rc;
421d1b054daSYu Zhao 	int nres;
422d1b054daSYu Zhao 	u32 pgsz;
423d1b054daSYu Zhao 	u16 ctrl, total, offset, stride;
424d1b054daSYu Zhao 	struct pci_sriov *iov;
425d1b054daSYu Zhao 	struct resource *res;
426d1b054daSYu Zhao 	struct pci_dev *pdev;
427d1b054daSYu Zhao 
42862f87c0eSYijing Wang 	if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
42962f87c0eSYijing Wang 	    pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
430d1b054daSYu Zhao 		return -ENODEV;
431d1b054daSYu Zhao 
432d1b054daSYu Zhao 	pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
433d1b054daSYu Zhao 	if (ctrl & PCI_SRIOV_CTRL_VFE) {
434d1b054daSYu Zhao 		pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
435d1b054daSYu Zhao 		ssleep(1);
436d1b054daSYu Zhao 	}
437d1b054daSYu Zhao 
438d1b054daSYu Zhao 	pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
439d1b054daSYu Zhao 	if (!total)
440d1b054daSYu Zhao 		return 0;
441d1b054daSYu Zhao 
442d1b054daSYu Zhao 	ctrl = 0;
443d1b054daSYu Zhao 	list_for_each_entry(pdev, &dev->bus->devices, bus_list)
444d1b054daSYu Zhao 		if (pdev->is_physfn)
445d1b054daSYu Zhao 			goto found;
446d1b054daSYu Zhao 
447d1b054daSYu Zhao 	pdev = NULL;
448d1b054daSYu Zhao 	if (pci_ari_enabled(dev->bus))
449d1b054daSYu Zhao 		ctrl |= PCI_SRIOV_CTRL_ARI;
450d1b054daSYu Zhao 
451d1b054daSYu Zhao found:
452d1b054daSYu Zhao 	pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
453d1b054daSYu Zhao 	pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
454d1b054daSYu Zhao 	pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
455d1b054daSYu Zhao 	if (!offset || (total > 1 && !stride))
456d1b054daSYu Zhao 		return -EIO;
457d1b054daSYu Zhao 
458d1b054daSYu Zhao 	pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
459d1b054daSYu Zhao 	i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
460d1b054daSYu Zhao 	pgsz &= ~((1 << i) - 1);
461d1b054daSYu Zhao 	if (!pgsz)
462d1b054daSYu Zhao 		return -EIO;
463d1b054daSYu Zhao 
464d1b054daSYu Zhao 	pgsz &= ~(pgsz - 1);
4658161fe91SVaidyanathan Srinivasan 	pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
466d1b054daSYu Zhao 
467d1b054daSYu Zhao 	nres = 0;
468d1b054daSYu Zhao 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
469d1b054daSYu Zhao 		res = dev->resource + PCI_IOV_RESOURCES + i;
470d1b054daSYu Zhao 		i += __pci_read_base(dev, pci_bar_unknown, res,
471d1b054daSYu Zhao 				     pos + PCI_SRIOV_BAR + i * 4);
472d1b054daSYu Zhao 		if (!res->flags)
473d1b054daSYu Zhao 			continue;
474d1b054daSYu Zhao 		if (resource_size(res) & (PAGE_SIZE - 1)) {
475d1b054daSYu Zhao 			rc = -EIO;
476d1b054daSYu Zhao 			goto failed;
477d1b054daSYu Zhao 		}
478d1b054daSYu Zhao 		res->end = res->start + resource_size(res) * total - 1;
479d1b054daSYu Zhao 		nres++;
480d1b054daSYu Zhao 	}
481d1b054daSYu Zhao 
482d1b054daSYu Zhao 	iov = kzalloc(sizeof(*iov), GFP_KERNEL);
483d1b054daSYu Zhao 	if (!iov) {
484d1b054daSYu Zhao 		rc = -ENOMEM;
485d1b054daSYu Zhao 		goto failed;
486d1b054daSYu Zhao 	}
487d1b054daSYu Zhao 
488d1b054daSYu Zhao 	iov->pos = pos;
489d1b054daSYu Zhao 	iov->nres = nres;
490d1b054daSYu Zhao 	iov->ctrl = ctrl;
4916b136724SBjorn Helgaas 	iov->total_VFs = total;
492d1b054daSYu Zhao 	iov->offset = offset;
493d1b054daSYu Zhao 	iov->stride = stride;
494d1b054daSYu Zhao 	iov->pgsz = pgsz;
495d1b054daSYu Zhao 	iov->self = dev;
496d1b054daSYu Zhao 	pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
497d1b054daSYu Zhao 	pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
49862f87c0eSYijing Wang 	if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
4994d135dbeSYu Zhao 		iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
500d1b054daSYu Zhao 
501d1b054daSYu Zhao 	if (pdev)
502d1b054daSYu Zhao 		iov->dev = pci_dev_get(pdev);
503e277d2fcSYu Zhao 	else
504d1b054daSYu Zhao 		iov->dev = dev;
505e277d2fcSYu Zhao 
506d1b054daSYu Zhao 	mutex_init(&iov->lock);
507d1b054daSYu Zhao 
508d1b054daSYu Zhao 	dev->sriov = iov;
509d1b054daSYu Zhao 	dev->is_physfn = 1;
510d1b054daSYu Zhao 
511d1b054daSYu Zhao 	return 0;
512d1b054daSYu Zhao 
513d1b054daSYu Zhao failed:
514d1b054daSYu Zhao 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
515d1b054daSYu Zhao 		res = dev->resource + PCI_IOV_RESOURCES + i;
516d1b054daSYu Zhao 		res->flags = 0;
517d1b054daSYu Zhao 	}
518d1b054daSYu Zhao 
519d1b054daSYu Zhao 	return rc;
520d1b054daSYu Zhao }
521d1b054daSYu Zhao 
522d1b054daSYu Zhao static void sriov_release(struct pci_dev *dev)
523d1b054daSYu Zhao {
5246b136724SBjorn Helgaas 	BUG_ON(dev->sriov->num_VFs);
525dd7cc44dSYu Zhao 
526e277d2fcSYu Zhao 	if (dev != dev->sriov->dev)
527d1b054daSYu Zhao 		pci_dev_put(dev->sriov->dev);
528d1b054daSYu Zhao 
529e277d2fcSYu Zhao 	mutex_destroy(&dev->sriov->lock);
530e277d2fcSYu Zhao 
531d1b054daSYu Zhao 	kfree(dev->sriov);
532d1b054daSYu Zhao 	dev->sriov = NULL;
533d1b054daSYu Zhao }
534d1b054daSYu Zhao 
5358c5cdb6aSYu Zhao static void sriov_restore_state(struct pci_dev *dev)
5368c5cdb6aSYu Zhao {
5378c5cdb6aSYu Zhao 	int i;
5388c5cdb6aSYu Zhao 	u16 ctrl;
5398c5cdb6aSYu Zhao 	struct pci_sriov *iov = dev->sriov;
5408c5cdb6aSYu Zhao 
5418c5cdb6aSYu Zhao 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
5428c5cdb6aSYu Zhao 	if (ctrl & PCI_SRIOV_CTRL_VFE)
5438c5cdb6aSYu Zhao 		return;
5448c5cdb6aSYu Zhao 
5458c5cdb6aSYu Zhao 	for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
5468c5cdb6aSYu Zhao 		pci_update_resource(dev, i);
5478c5cdb6aSYu Zhao 
5488c5cdb6aSYu Zhao 	pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
5496b136724SBjorn Helgaas 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs);
5508c5cdb6aSYu Zhao 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
5518c5cdb6aSYu Zhao 	if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
5528c5cdb6aSYu Zhao 		msleep(100);
5538c5cdb6aSYu Zhao }
5548c5cdb6aSYu Zhao 
555d1b054daSYu Zhao /**
556d1b054daSYu Zhao  * pci_iov_init - initialize the IOV capability
557d1b054daSYu Zhao  * @dev: the PCI device
558d1b054daSYu Zhao  *
559d1b054daSYu Zhao  * Returns 0 on success, or negative on failure.
560d1b054daSYu Zhao  */
561d1b054daSYu Zhao int pci_iov_init(struct pci_dev *dev)
562d1b054daSYu Zhao {
563d1b054daSYu Zhao 	int pos;
564d1b054daSYu Zhao 
5655f4d91a1SKenji Kaneshige 	if (!pci_is_pcie(dev))
566d1b054daSYu Zhao 		return -ENODEV;
567d1b054daSYu Zhao 
568d1b054daSYu Zhao 	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
569d1b054daSYu Zhao 	if (pos)
570d1b054daSYu Zhao 		return sriov_init(dev, pos);
571d1b054daSYu Zhao 
572d1b054daSYu Zhao 	return -ENODEV;
573d1b054daSYu Zhao }
574d1b054daSYu Zhao 
575d1b054daSYu Zhao /**
576d1b054daSYu Zhao  * pci_iov_release - release resources used by the IOV capability
577d1b054daSYu Zhao  * @dev: the PCI device
578d1b054daSYu Zhao  */
579d1b054daSYu Zhao void pci_iov_release(struct pci_dev *dev)
580d1b054daSYu Zhao {
581d1b054daSYu Zhao 	if (dev->is_physfn)
582d1b054daSYu Zhao 		sriov_release(dev);
583d1b054daSYu Zhao }
584d1b054daSYu Zhao 
585d1b054daSYu Zhao /**
586d1b054daSYu Zhao  * pci_iov_resource_bar - get position of the SR-IOV BAR
587d1b054daSYu Zhao  * @dev: the PCI device
588d1b054daSYu Zhao  * @resno: the resource number
589d1b054daSYu Zhao  * @type: the BAR type to be filled in
590d1b054daSYu Zhao  *
591d1b054daSYu Zhao  * Returns position of the BAR encapsulated in the SR-IOV capability.
592d1b054daSYu Zhao  */
593d1b054daSYu Zhao int pci_iov_resource_bar(struct pci_dev *dev, int resno,
594d1b054daSYu Zhao 			 enum pci_bar_type *type)
595d1b054daSYu Zhao {
596d1b054daSYu Zhao 	if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
597d1b054daSYu Zhao 		return 0;
598d1b054daSYu Zhao 
599d1b054daSYu Zhao 	BUG_ON(!dev->is_physfn);
600d1b054daSYu Zhao 
601d1b054daSYu Zhao 	*type = pci_bar_unknown;
602d1b054daSYu Zhao 
603d1b054daSYu Zhao 	return dev->sriov->pos + PCI_SRIOV_BAR +
604d1b054daSYu Zhao 		4 * (resno - PCI_IOV_RESOURCES);
605d1b054daSYu Zhao }
6068c5cdb6aSYu Zhao 
6078c5cdb6aSYu Zhao /**
6086faf17f6SChris Wright  * pci_sriov_resource_alignment - get resource alignment for VF BAR
6096faf17f6SChris Wright  * @dev: the PCI device
6106faf17f6SChris Wright  * @resno: the resource number
6116faf17f6SChris Wright  *
6126faf17f6SChris Wright  * Returns the alignment of the VF BAR found in the SR-IOV capability.
6136faf17f6SChris Wright  * This is not the same as the resource size which is defined as
6146faf17f6SChris Wright  * the VF BAR size multiplied by the number of VFs.  The alignment
6156faf17f6SChris Wright  * is just the VF BAR size.
6166faf17f6SChris Wright  */
6170e52247aSCam Macdonell resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
6186faf17f6SChris Wright {
6196faf17f6SChris Wright 	struct resource tmp;
6206faf17f6SChris Wright 	enum pci_bar_type type;
6216faf17f6SChris Wright 	int reg = pci_iov_resource_bar(dev, resno, &type);
6226faf17f6SChris Wright 
6236faf17f6SChris Wright 	if (!reg)
6246faf17f6SChris Wright 		return 0;
6256faf17f6SChris Wright 
6266faf17f6SChris Wright 	 __pci_read_base(dev, type, &tmp, reg);
6276faf17f6SChris Wright 	return resource_alignment(&tmp);
6286faf17f6SChris Wright }
6296faf17f6SChris Wright 
6306faf17f6SChris Wright /**
6318c5cdb6aSYu Zhao  * pci_restore_iov_state - restore the state of the IOV capability
6328c5cdb6aSYu Zhao  * @dev: the PCI device
6338c5cdb6aSYu Zhao  */
6348c5cdb6aSYu Zhao void pci_restore_iov_state(struct pci_dev *dev)
6358c5cdb6aSYu Zhao {
6368c5cdb6aSYu Zhao 	if (dev->is_physfn)
6378c5cdb6aSYu Zhao 		sriov_restore_state(dev);
6388c5cdb6aSYu Zhao }
639a28724b0SYu Zhao 
640a28724b0SYu Zhao /**
641a28724b0SYu Zhao  * pci_iov_bus_range - find bus range used by Virtual Function
642a28724b0SYu Zhao  * @bus: the PCI bus
643a28724b0SYu Zhao  *
644a28724b0SYu Zhao  * Returns max number of buses (exclude current one) used by Virtual
645a28724b0SYu Zhao  * Functions.
646a28724b0SYu Zhao  */
647a28724b0SYu Zhao int pci_iov_bus_range(struct pci_bus *bus)
648a28724b0SYu Zhao {
649a28724b0SYu Zhao 	int max = 0;
650a28724b0SYu Zhao 	u8 busnr;
651a28724b0SYu Zhao 	struct pci_dev *dev;
652a28724b0SYu Zhao 
653a28724b0SYu Zhao 	list_for_each_entry(dev, &bus->devices, bus_list) {
654a28724b0SYu Zhao 		if (!dev->is_physfn)
655a28724b0SYu Zhao 			continue;
6566b136724SBjorn Helgaas 		busnr = virtfn_bus(dev, dev->sriov->total_VFs - 1);
657a28724b0SYu Zhao 		if (busnr > max)
658a28724b0SYu Zhao 			max = busnr;
659a28724b0SYu Zhao 	}
660a28724b0SYu Zhao 
661a28724b0SYu Zhao 	return max ? max - bus->number : 0;
662a28724b0SYu Zhao }
663dd7cc44dSYu Zhao 
664dd7cc44dSYu Zhao /**
665dd7cc44dSYu Zhao  * pci_enable_sriov - enable the SR-IOV capability
666dd7cc44dSYu Zhao  * @dev: the PCI device
66752a8873bSRandy Dunlap  * @nr_virtfn: number of virtual functions to enable
668dd7cc44dSYu Zhao  *
669dd7cc44dSYu Zhao  * Returns 0 on success, or negative on failure.
670dd7cc44dSYu Zhao  */
671dd7cc44dSYu Zhao int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
672dd7cc44dSYu Zhao {
673dd7cc44dSYu Zhao 	might_sleep();
674dd7cc44dSYu Zhao 
675dd7cc44dSYu Zhao 	if (!dev->is_physfn)
676dd7cc44dSYu Zhao 		return -ENODEV;
677dd7cc44dSYu Zhao 
678dd7cc44dSYu Zhao 	return sriov_enable(dev, nr_virtfn);
679dd7cc44dSYu Zhao }
680dd7cc44dSYu Zhao EXPORT_SYMBOL_GPL(pci_enable_sriov);
681dd7cc44dSYu Zhao 
682dd7cc44dSYu Zhao /**
683dd7cc44dSYu Zhao  * pci_disable_sriov - disable the SR-IOV capability
684dd7cc44dSYu Zhao  * @dev: the PCI device
685dd7cc44dSYu Zhao  */
686dd7cc44dSYu Zhao void pci_disable_sriov(struct pci_dev *dev)
687dd7cc44dSYu Zhao {
688dd7cc44dSYu Zhao 	might_sleep();
689dd7cc44dSYu Zhao 
690dd7cc44dSYu Zhao 	if (!dev->is_physfn)
691dd7cc44dSYu Zhao 		return;
692dd7cc44dSYu Zhao 
693dd7cc44dSYu Zhao 	sriov_disable(dev);
694dd7cc44dSYu Zhao }
695dd7cc44dSYu Zhao EXPORT_SYMBOL_GPL(pci_disable_sriov);
69674bb1bccSYu Zhao 
69774bb1bccSYu Zhao /**
69874bb1bccSYu Zhao  * pci_sriov_migration - notify SR-IOV core of Virtual Function Migration
69974bb1bccSYu Zhao  * @dev: the PCI device
70074bb1bccSYu Zhao  *
70174bb1bccSYu Zhao  * Returns IRQ_HANDLED if the IRQ is handled, or IRQ_NONE if not.
70274bb1bccSYu Zhao  *
70374bb1bccSYu Zhao  * Physical Function driver is responsible to register IRQ handler using
70474bb1bccSYu Zhao  * VF Migration Interrupt Message Number, and call this function when the
70574bb1bccSYu Zhao  * interrupt is generated by the hardware.
70674bb1bccSYu Zhao  */
70774bb1bccSYu Zhao irqreturn_t pci_sriov_migration(struct pci_dev *dev)
70874bb1bccSYu Zhao {
70974bb1bccSYu Zhao 	if (!dev->is_physfn)
71074bb1bccSYu Zhao 		return IRQ_NONE;
71174bb1bccSYu Zhao 
71274bb1bccSYu Zhao 	return sriov_migration(dev) ? IRQ_HANDLED : IRQ_NONE;
71374bb1bccSYu Zhao }
71474bb1bccSYu Zhao EXPORT_SYMBOL_GPL(pci_sriov_migration);
715302b4215SYu Zhao 
716fb8a0d9dSWilliams, Mitch A /**
717fb8a0d9dSWilliams, Mitch A  * pci_num_vf - return number of VFs associated with a PF device_release_driver
718fb8a0d9dSWilliams, Mitch A  * @dev: the PCI device
719fb8a0d9dSWilliams, Mitch A  *
720fb8a0d9dSWilliams, Mitch A  * Returns number of VFs, or 0 if SR-IOV is not enabled.
721fb8a0d9dSWilliams, Mitch A  */
722fb8a0d9dSWilliams, Mitch A int pci_num_vf(struct pci_dev *dev)
723fb8a0d9dSWilliams, Mitch A {
7241452cd76SBjorn Helgaas 	if (!dev->is_physfn)
725fb8a0d9dSWilliams, Mitch A 		return 0;
7261452cd76SBjorn Helgaas 
7276b136724SBjorn Helgaas 	return dev->sriov->num_VFs;
728fb8a0d9dSWilliams, Mitch A }
729fb8a0d9dSWilliams, Mitch A EXPORT_SYMBOL_GPL(pci_num_vf);
730bff73156SDonald Dutile 
731bff73156SDonald Dutile /**
732*5a8eb242SAlexander Duyck  * pci_vfs_assigned - returns number of VFs are assigned to a guest
733*5a8eb242SAlexander Duyck  * @dev: the PCI device
734*5a8eb242SAlexander Duyck  *
735*5a8eb242SAlexander Duyck  * Returns number of VFs belonging to this device that are assigned to a guest.
736*5a8eb242SAlexander Duyck  * If device is not a physical function returns -ENODEV.
737*5a8eb242SAlexander Duyck  */
738*5a8eb242SAlexander Duyck int pci_vfs_assigned(struct pci_dev *dev)
739*5a8eb242SAlexander Duyck {
740*5a8eb242SAlexander Duyck 	struct pci_dev *vfdev;
741*5a8eb242SAlexander Duyck 	unsigned int vfs_assigned = 0;
742*5a8eb242SAlexander Duyck 	unsigned short dev_id;
743*5a8eb242SAlexander Duyck 
744*5a8eb242SAlexander Duyck 	/* only search if we are a PF */
745*5a8eb242SAlexander Duyck 	if (!dev->is_physfn)
746*5a8eb242SAlexander Duyck 		return 0;
747*5a8eb242SAlexander Duyck 
748*5a8eb242SAlexander Duyck 	/*
749*5a8eb242SAlexander Duyck 	 * determine the device ID for the VFs, the vendor ID will be the
750*5a8eb242SAlexander Duyck 	 * same as the PF so there is no need to check for that one
751*5a8eb242SAlexander Duyck 	 */
752*5a8eb242SAlexander Duyck 	pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
753*5a8eb242SAlexander Duyck 
754*5a8eb242SAlexander Duyck 	/* loop through all the VFs to see if we own any that are assigned */
755*5a8eb242SAlexander Duyck 	vfdev = pci_get_device(dev->vendor, dev_id, NULL);
756*5a8eb242SAlexander Duyck 	while (vfdev) {
757*5a8eb242SAlexander Duyck 		/*
758*5a8eb242SAlexander Duyck 		 * It is considered assigned if it is a virtual function with
759*5a8eb242SAlexander Duyck 		 * our dev as the physical function and the assigned bit is set
760*5a8eb242SAlexander Duyck 		 */
761*5a8eb242SAlexander Duyck 		if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
762*5a8eb242SAlexander Duyck 		    (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED))
763*5a8eb242SAlexander Duyck 			vfs_assigned++;
764*5a8eb242SAlexander Duyck 
765*5a8eb242SAlexander Duyck 		vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
766*5a8eb242SAlexander Duyck 	}
767*5a8eb242SAlexander Duyck 
768*5a8eb242SAlexander Duyck 	return vfs_assigned;
769*5a8eb242SAlexander Duyck }
770*5a8eb242SAlexander Duyck EXPORT_SYMBOL_GPL(pci_vfs_assigned);
771*5a8eb242SAlexander Duyck 
772*5a8eb242SAlexander Duyck /**
773bff73156SDonald Dutile  * pci_sriov_set_totalvfs -- reduce the TotalVFs available
774bff73156SDonald Dutile  * @dev: the PCI PF device
7752094f167SRandy Dunlap  * @numvfs: number that should be used for TotalVFs supported
776bff73156SDonald Dutile  *
777bff73156SDonald Dutile  * Should be called from PF driver's probe routine with
778bff73156SDonald Dutile  * device's mutex held.
779bff73156SDonald Dutile  *
780bff73156SDonald Dutile  * Returns 0 if PF is an SRIOV-capable device and
781bff73156SDonald Dutile  * value of numvfs valid. If not a PF with VFS, return -EINVAL;
782bff73156SDonald Dutile  * if VFs already enabled, return -EBUSY.
783bff73156SDonald Dutile  */
784bff73156SDonald Dutile int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
785bff73156SDonald Dutile {
7861452cd76SBjorn Helgaas 	if (!dev->is_physfn || (numvfs > dev->sriov->total_VFs))
787bff73156SDonald Dutile 		return -EINVAL;
788bff73156SDonald Dutile 
789bff73156SDonald Dutile 	/* Shouldn't change if VFs already enabled */
790bff73156SDonald Dutile 	if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
791bff73156SDonald Dutile 		return -EBUSY;
792bff73156SDonald Dutile 	else
7936b136724SBjorn Helgaas 		dev->sriov->driver_max_VFs = numvfs;
794bff73156SDonald Dutile 
795bff73156SDonald Dutile 	return 0;
796bff73156SDonald Dutile }
797bff73156SDonald Dutile EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
798bff73156SDonald Dutile 
799bff73156SDonald Dutile /**
800bff73156SDonald Dutile  * pci_sriov_get_totalvfs -- get total VFs supported on this devic3
801bff73156SDonald Dutile  * @dev: the PCI PF device
802bff73156SDonald Dutile  *
803bff73156SDonald Dutile  * For a PCIe device with SRIOV support, return the PCIe
8046b136724SBjorn Helgaas  * SRIOV capability value of TotalVFs or the value of driver_max_VFs
805bff73156SDonald Dutile  * if the driver reduced it.  Otherwise, -EINVAL.
806bff73156SDonald Dutile  */
807bff73156SDonald Dutile int pci_sriov_get_totalvfs(struct pci_dev *dev)
808bff73156SDonald Dutile {
8091452cd76SBjorn Helgaas 	if (!dev->is_physfn)
810bff73156SDonald Dutile 		return -EINVAL;
811bff73156SDonald Dutile 
8126b136724SBjorn Helgaas 	if (dev->sriov->driver_max_VFs)
8136b136724SBjorn Helgaas 		return dev->sriov->driver_max_VFs;
8141452cd76SBjorn Helgaas 
8156b136724SBjorn Helgaas 	return dev->sriov->total_VFs;
816bff73156SDonald Dutile }
817bff73156SDonald Dutile EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
818