xref: /linux/drivers/pci/hotplug/cpqphp_core.c (revision 858259cf7d1c443c836a2022b78cb281f0a9b95e)
1 /*
2  * Compaq Hot Plug Controller Driver
3  *
4  * Copyright (C) 1995,2001 Compaq Computer Corporation
5  * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
6  * Copyright (C) 2001 IBM Corp.
7  *
8  * All rights reserved.
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or (at
13  * your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful, but
16  * WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18  * NON INFRINGEMENT.  See the GNU General Public License for more
19  * details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24  *
25  * Send feedback to <greg@kroah.com>
26  *
27  * Jan 12, 2003 -	Added 66/100/133MHz PCI-X support,
28  * 			Torben Mathiasen <torben.mathiasen@hp.com>
29  *
30  */
31 
32 #include <linux/config.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/kernel.h>
36 #include <linux/types.h>
37 #include <linux/proc_fs.h>
38 #include <linux/slab.h>
39 #include <linux/workqueue.h>
40 #include <linux/pci.h>
41 #include <linux/init.h>
42 #include <linux/interrupt.h>
43 
44 #include <asm/uaccess.h>
45 
46 #include "cpqphp.h"
47 #include "cpqphp_nvram.h"
48 #include "../../../arch/i386/pci/pci.h"	/* horrible hack showing how processor dependent we are... */
49 
50 
51 /* Global variables */
52 int cpqhp_debug;
53 int cpqhp_legacy_mode;
54 struct controller *cpqhp_ctrl_list;	/* = NULL */
55 struct pci_func *cpqhp_slot_list[256];
56 
57 /* local variables */
58 static void __iomem *smbios_table;
59 static void __iomem *smbios_start;
60 static void __iomem *cpqhp_rom_start;
61 static int power_mode;
62 static int debug;
63 static int initialized;
64 
65 #define DRIVER_VERSION	"0.9.8"
66 #define DRIVER_AUTHOR	"Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
67 #define DRIVER_DESC	"Compaq Hot Plug PCI Controller Driver"
68 
69 MODULE_AUTHOR(DRIVER_AUTHOR);
70 MODULE_DESCRIPTION(DRIVER_DESC);
71 MODULE_LICENSE("GPL");
72 
73 module_param(power_mode, bool, 0644);
74 MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
75 
76 module_param(debug, bool, 0644);
77 MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
78 
79 #define CPQHPC_MODULE_MINOR 208
80 
81 static int one_time_init	(void);
82 static int set_attention_status	(struct hotplug_slot *slot, u8 value);
83 static int process_SI		(struct hotplug_slot *slot);
84 static int process_SS		(struct hotplug_slot *slot);
85 static int hardware_test	(struct hotplug_slot *slot, u32 value);
86 static int get_power_status	(struct hotplug_slot *slot, u8 *value);
87 static int get_attention_status	(struct hotplug_slot *slot, u8 *value);
88 static int get_latch_status	(struct hotplug_slot *slot, u8 *value);
89 static int get_adapter_status	(struct hotplug_slot *slot, u8 *value);
90 static int get_max_bus_speed	(struct hotplug_slot *slot, enum pci_bus_speed *value);
91 static int get_cur_bus_speed	(struct hotplug_slot *slot, enum pci_bus_speed *value);
92 
93 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
94 	.owner =		THIS_MODULE,
95 	.set_attention_status =	set_attention_status,
96 	.enable_slot =		process_SI,
97 	.disable_slot =		process_SS,
98 	.hardware_test =	hardware_test,
99 	.get_power_status =	get_power_status,
100 	.get_attention_status =	get_attention_status,
101 	.get_latch_status =	get_latch_status,
102 	.get_adapter_status =	get_adapter_status,
103   	.get_max_bus_speed =	get_max_bus_speed,
104   	.get_cur_bus_speed =	get_cur_bus_speed,
105 };
106 
107 
108 static inline int is_slot64bit(struct slot *slot)
109 {
110 	return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
111 }
112 
113 static inline int is_slot66mhz(struct slot *slot)
114 {
115 	return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
116 }
117 
118 /**
119  * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
120  *
121  * @begin: begin pointer for region to be scanned.
122  * @end: end pointer for region to be scanned.
123  *
124  * Returns pointer to the head of the SMBIOS tables (or NULL)
125  *
126  */
127 static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
128 {
129 	void __iomem *fp;
130 	void __iomem *endp;
131 	u8 temp1, temp2, temp3, temp4;
132 	int status = 0;
133 
134 	endp = (end - sizeof(u32) + 1);
135 
136 	for (fp = begin; fp <= endp; fp += 16) {
137 		temp1 = readb(fp);
138 		temp2 = readb(fp+1);
139 		temp3 = readb(fp+2);
140 		temp4 = readb(fp+3);
141 		if (temp1 == '_' &&
142 		    temp2 == 'S' &&
143 		    temp3 == 'M' &&
144 		    temp4 == '_') {
145 			status = 1;
146 			break;
147 		}
148 	}
149 
150 	if (!status)
151 		fp = NULL;
152 
153 	dbg("Discovered SMBIOS Entry point at %p\n", fp);
154 
155 	return fp;
156 }
157 
158 /**
159  * init_SERR - Initializes the per slot SERR generation.
160  *
161  * For unexpected switch opens
162  *
163  */
164 static int init_SERR(struct controller * ctrl)
165 {
166 	u32 tempdword;
167 	u32 number_of_slots;
168 	u8 physical_slot;
169 
170 	if (!ctrl)
171 		return 1;
172 
173 	tempdword = ctrl->first_slot;
174 
175 	number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
176 	// Loop through slots
177 	while (number_of_slots) {
178 		physical_slot = tempdword;
179 		writeb(0, ctrl->hpc_reg + SLOT_SERR);
180 		tempdword++;
181 		number_of_slots--;
182 	}
183 
184 	return 0;
185 }
186 
187 
188 /* nice debugging output */
189 static int pci_print_IRQ_route (void)
190 {
191 	struct irq_routing_table *routing_table;
192 	int len;
193 	int loop;
194 
195 	u8 tbus, tdevice, tslot;
196 
197 	routing_table = pcibios_get_irq_routing_table();
198 	if (routing_table == NULL) {
199 		err("No BIOS Routing Table??? Not good\n");
200 		return -ENOMEM;
201 	}
202 
203 	len = (routing_table->size - sizeof(struct irq_routing_table)) /
204 			sizeof(struct irq_info);
205 	// Make sure I got at least one entry
206 	if (len == 0) {
207 		kfree(routing_table);
208 		return -1;
209 	}
210 
211 	dbg("bus dev func slot\n");
212 
213 	for (loop = 0; loop < len; ++loop) {
214 		tbus = routing_table->slots[loop].bus;
215 		tdevice = routing_table->slots[loop].devfn;
216 		tslot = routing_table->slots[loop].slot;
217 		dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
218 
219 	}
220 	kfree(routing_table);
221 	return 0;
222 }
223 
224 
225 /**
226  * get_subsequent_smbios_entry: get the next entry from bios table.
227  *
228  * Gets the first entry if previous == NULL
229  * Otherwise, returns the next entry
230  * Uses global SMBIOS Table pointer
231  *
232  * @curr: %NULL or pointer to previously returned structure
233  *
234  * returns a pointer to an SMBIOS structure or NULL if none found
235  */
236 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
237 						void __iomem *smbios_table,
238 						void __iomem *curr)
239 {
240 	u8 bail = 0;
241 	u8 previous_byte = 1;
242 	void __iomem *p_temp;
243 	void __iomem *p_max;
244 
245 	if (!smbios_table || !curr)
246 		return(NULL);
247 
248 	// set p_max to the end of the table
249 	p_max = smbios_start + readw(smbios_table + ST_LENGTH);
250 
251 	p_temp = curr;
252 	p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
253 
254 	while ((p_temp < p_max) && !bail) {
255 		/* Look for the double NULL terminator
256 		 * The first condition is the previous byte
257 		 * and the second is the curr */
258 		if (!previous_byte && !(readb(p_temp))) {
259 			bail = 1;
260 		}
261 
262 		previous_byte = readb(p_temp);
263 		p_temp++;
264 	}
265 
266 	if (p_temp < p_max) {
267 		return p_temp;
268 	} else {
269 		return NULL;
270 	}
271 }
272 
273 
274 /**
275  * get_SMBIOS_entry
276  *
277  * @type:SMBIOS structure type to be returned
278  * @previous: %NULL or pointer to previously returned structure
279  *
280  * Gets the first entry of the specified type if previous == NULL
281  * Otherwise, returns the next entry of the given type.
282  * Uses global SMBIOS Table pointer
283  * Uses get_subsequent_smbios_entry
284  *
285  * returns a pointer to an SMBIOS structure or %NULL if none found
286  */
287 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
288 					void __iomem *smbios_table,
289 					u8 type,
290 					void __iomem *previous)
291 {
292 	if (!smbios_table)
293 		return NULL;
294 
295 	if (!previous) {
296 		previous = smbios_start;
297 	} else {
298 		previous = get_subsequent_smbios_entry(smbios_start,
299 					smbios_table, previous);
300 	}
301 
302 	while (previous) {
303 	       	if (readb(previous + SMBIOS_GENERIC_TYPE) != type) {
304 			previous = get_subsequent_smbios_entry(smbios_start,
305 						smbios_table, previous);
306 		} else {
307 			break;
308 		}
309 	}
310 
311 	return previous;
312 }
313 
314 static void release_slot(struct hotplug_slot *hotplug_slot)
315 {
316 	struct slot *slot = hotplug_slot->private;
317 
318 	dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
319 
320 	kfree(slot->hotplug_slot->info);
321 	kfree(slot->hotplug_slot->name);
322 	kfree(slot->hotplug_slot);
323 	kfree(slot);
324 }
325 
326 static int ctrl_slot_setup(struct controller *ctrl,
327 			void __iomem *smbios_start,
328 			void __iomem *smbios_table)
329 {
330 	struct slot *new_slot;
331 	u8 number_of_slots;
332 	u8 slot_device;
333 	u8 slot_number;
334 	u8 ctrl_slot;
335 	u32 tempdword;
336 	void __iomem *slot_entry= NULL;
337 	int result = -ENOMEM;
338 
339 	dbg("%s\n", __FUNCTION__);
340 
341 	tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
342 
343 	number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
344 	slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
345 	slot_number = ctrl->first_slot;
346 
347 	while (number_of_slots) {
348 		new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL);
349 		if (!new_slot)
350 			goto error;
351 
352 		memset(new_slot, 0, sizeof(struct slot));
353 		new_slot->hotplug_slot = kmalloc(sizeof(*(new_slot->hotplug_slot)),
354 						GFP_KERNEL);
355 		if (!new_slot->hotplug_slot)
356 			goto error_slot;
357 		memset(new_slot->hotplug_slot, 0, sizeof(struct hotplug_slot));
358 
359 		new_slot->hotplug_slot->info =
360 				kmalloc(sizeof(*(new_slot->hotplug_slot->info)),
361 							GFP_KERNEL);
362 		if (!new_slot->hotplug_slot->info)
363 			goto error_hpslot;
364 		memset(new_slot->hotplug_slot->info, 0,
365 				sizeof(struct hotplug_slot_info));
366 		new_slot->hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL);
367 		if (!new_slot->hotplug_slot->name)
368 			goto error_info;
369 
370 		new_slot->ctrl = ctrl;
371 		new_slot->bus = ctrl->bus;
372 		new_slot->device = slot_device;
373 		new_slot->number = slot_number;
374 		dbg("slot->number = %d\n",new_slot->number);
375 
376 		slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
377 					slot_entry);
378 
379 		while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) != new_slot->number)) {
380 			slot_entry = get_SMBIOS_entry(smbios_start,
381 						smbios_table, 9, slot_entry);
382 		}
383 
384 		new_slot->p_sm_slot = slot_entry;
385 
386 		init_timer(&new_slot->task_event);
387 		new_slot->task_event.expires = jiffies + 5 * HZ;
388 		new_slot->task_event.function = cpqhp_pushbutton_thread;
389 
390 		//FIXME: these capabilities aren't used but if they are
391 		//       they need to be correctly implemented
392 		new_slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
393 		new_slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
394 
395 		if (is_slot64bit(new_slot))
396 			new_slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
397 		if (is_slot66mhz(new_slot))
398 			new_slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
399 		if (ctrl->speed == PCI_SPEED_66MHz)
400 			new_slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
401 
402 		ctrl_slot = slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
403 
404 		// Check presence
405 		new_slot->capabilities |= ((((~tempdword) >> 23) | ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
406 		// Check the switch state
407 		new_slot->capabilities |= ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
408 		// Check the slot enable
409 		new_slot->capabilities |= ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
410 
411 		/* register this slot with the hotplug pci core */
412 		new_slot->hotplug_slot->release = &release_slot;
413 		new_slot->hotplug_slot->private = new_slot;
414 		make_slot_name(new_slot->hotplug_slot->name, SLOT_NAME_SIZE, new_slot);
415 		new_slot->hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
416 
417 		new_slot->hotplug_slot->info->power_status = get_slot_enabled(ctrl, new_slot);
418 		new_slot->hotplug_slot->info->attention_status = cpq_get_attention_status(ctrl, new_slot);
419 		new_slot->hotplug_slot->info->latch_status = cpq_get_latch_status(ctrl, new_slot);
420 		new_slot->hotplug_slot->info->adapter_status = get_presence_status(ctrl, new_slot);
421 
422 		dbg ("registering bus %d, dev %d, number %d, "
423 				"ctrl->slot_device_offset %d, slot %d\n",
424 				new_slot->bus, new_slot->device,
425 				new_slot->number, ctrl->slot_device_offset,
426 				slot_number);
427 		result = pci_hp_register (new_slot->hotplug_slot);
428 		if (result) {
429 			err ("pci_hp_register failed with error %d\n", result);
430 			goto error_name;
431 		}
432 
433 		new_slot->next = ctrl->slot;
434 		ctrl->slot = new_slot;
435 
436 		number_of_slots--;
437 		slot_device++;
438 		slot_number++;
439 	}
440 
441 	return 0;
442 
443 error_name:
444 	kfree(new_slot->hotplug_slot->name);
445 error_info:
446 	kfree(new_slot->hotplug_slot->info);
447 error_hpslot:
448 	kfree(new_slot->hotplug_slot);
449 error_slot:
450 	kfree(new_slot);
451 error:
452 	return result;
453 }
454 
455 static int ctrl_slot_cleanup (struct controller * ctrl)
456 {
457 	struct slot *old_slot, *next_slot;
458 
459 	old_slot = ctrl->slot;
460 	ctrl->slot = NULL;
461 
462 	while (old_slot) {
463 		/* memory will be freed by the release_slot callback */
464 		next_slot = old_slot->next;
465 		pci_hp_deregister (old_slot->hotplug_slot);
466 		old_slot = next_slot;
467 	}
468 
469 	//Free IRQ associated with hot plug device
470 	free_irq(ctrl->interrupt, ctrl);
471 	//Unmap the memory
472 	iounmap(ctrl->hpc_reg);
473 	//Finally reclaim PCI mem
474 	release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
475 			   pci_resource_len(ctrl->pci_dev, 0));
476 
477 	return(0);
478 }
479 
480 
481 //============================================================================
482 // function:	get_slot_mapping
483 //
484 // Description: Attempts to determine a logical slot mapping for a PCI
485 //		device.  Won't work for more than one PCI-PCI bridge
486 //		in a slot.
487 //
488 // Input:	u8 bus_num - bus number of PCI device
489 //		u8 dev_num - device number of PCI device
490 //		u8 *slot - Pointer to u8 where slot number will
491 //			be returned
492 //
493 // Output:	SUCCESS or FAILURE
494 //=============================================================================
495 static int
496 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
497 {
498 	struct irq_routing_table *PCIIRQRoutingInfoLength;
499 	u32 work;
500 	long len;
501 	long loop;
502 
503 	u8 tbus, tdevice, tslot, bridgeSlot;
504 
505 	dbg("%s: %p, %d, %d, %p\n", __FUNCTION__, bus, bus_num, dev_num, slot);
506 
507 	bridgeSlot = 0xFF;
508 
509 	PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
510 	if (!PCIIRQRoutingInfoLength)
511 		return -1;
512 
513 	len = (PCIIRQRoutingInfoLength->size -
514 	       sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
515 	// Make sure I got at least one entry
516 	if (len == 0) {
517 		kfree(PCIIRQRoutingInfoLength);
518 		return -1;
519 	}
520 
521 	for (loop = 0; loop < len; ++loop) {
522 		tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
523 		tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
524 		tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
525 
526 		if ((tbus == bus_num) && (tdevice == dev_num)) {
527 			*slot = tslot;
528 			kfree(PCIIRQRoutingInfoLength);
529 			return 0;
530 		} else {
531 			/* Did not get a match on the target PCI device. Check
532 			 * if the current IRQ table entry is a PCI-to-PCI bridge
533 			 * device.  If so, and it's secondary bus matches the
534 			 * bus number for the target device, I need to save the
535 			 * bridge's slot number.  If I can not find an entry for
536 			 * the target device, I will have to assume it's on the
537 			 * other side of the bridge, and assign it the bridge's
538 			 * slot. */
539 			bus->number = tbus;
540 			pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
541 						PCI_REVISION_ID, &work);
542 
543 			if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
544 				pci_bus_read_config_dword(bus,
545 							PCI_DEVFN(tdevice, 0),
546 							PCI_PRIMARY_BUS, &work);
547 				// See if bridge's secondary bus matches target bus.
548 				if (((work >> 8) & 0x000000FF) == (long) bus_num) {
549 					bridgeSlot = tslot;
550 				}
551 			}
552 		}
553 
554 	}
555 
556 	// If we got here, we didn't find an entry in the IRQ mapping table
557 	// for the target PCI device.  If we did determine that the target
558 	// device is on the other side of a PCI-to-PCI bridge, return the
559 	// slot number for the bridge.
560 	if (bridgeSlot != 0xFF) {
561 		*slot = bridgeSlot;
562 		kfree(PCIIRQRoutingInfoLength);
563 		return 0;
564 	}
565 	kfree(PCIIRQRoutingInfoLength);
566 	// Couldn't find an entry in the routing table for this PCI device
567 	return -1;
568 }
569 
570 
571 /**
572  * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
573  *
574  */
575 static int
576 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
577 				u32 status)
578 {
579 	u8 hp_slot;
580 
581 	if (func == NULL)
582 		return(1);
583 
584 	hp_slot = func->device - ctrl->slot_device_offset;
585 
586 	// Wait for exclusive access to hardware
587 	down(&ctrl->crit_sect);
588 
589 	if (status == 1) {
590 		amber_LED_on (ctrl, hp_slot);
591 	} else if (status == 0) {
592 		amber_LED_off (ctrl, hp_slot);
593 	} else {
594 		// Done with exclusive hardware access
595 		up(&ctrl->crit_sect);
596 		return(1);
597 	}
598 
599 	set_SOGO(ctrl);
600 
601 	// Wait for SOBS to be unset
602 	wait_for_ctrl_irq (ctrl);
603 
604 	// Done with exclusive hardware access
605 	up(&ctrl->crit_sect);
606 
607 	return(0);
608 }
609 
610 
611 /**
612  * set_attention_status - Turns the Amber LED for a slot on or off
613  *
614  */
615 static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
616 {
617 	struct pci_func *slot_func;
618 	struct slot *slot = hotplug_slot->private;
619 	struct controller *ctrl = slot->ctrl;
620 	u8 bus;
621 	u8 devfn;
622 	u8 device;
623 	u8 function;
624 
625 	dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
626 
627 	if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
628 		return -ENODEV;
629 
630 	device = devfn >> 3;
631 	function = devfn & 0x7;
632 	dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
633 
634 	slot_func = cpqhp_slot_find(bus, device, function);
635 	if (!slot_func)
636 		return -ENODEV;
637 
638 	return cpqhp_set_attention_status(ctrl, slot_func, status);
639 }
640 
641 
642 static int process_SI(struct hotplug_slot *hotplug_slot)
643 {
644 	struct pci_func *slot_func;
645 	struct slot *slot = hotplug_slot->private;
646 	struct controller *ctrl = slot->ctrl;
647 	u8 bus;
648 	u8 devfn;
649 	u8 device;
650 	u8 function;
651 
652 	dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
653 
654 	if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
655 		return -ENODEV;
656 
657 	device = devfn >> 3;
658 	function = devfn & 0x7;
659 	dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
660 
661 	slot_func = cpqhp_slot_find(bus, device, function);
662 	if (!slot_func)
663 		return -ENODEV;
664 
665 	slot_func->bus = bus;
666 	slot_func->device = device;
667 	slot_func->function = function;
668 	slot_func->configured = 0;
669 	dbg("board_added(%p, %p)\n", slot_func, ctrl);
670 	return cpqhp_process_SI(ctrl, slot_func);
671 }
672 
673 
674 static int process_SS(struct hotplug_slot *hotplug_slot)
675 {
676 	struct pci_func *slot_func;
677 	struct slot *slot = hotplug_slot->private;
678 	struct controller *ctrl = slot->ctrl;
679 	u8 bus;
680 	u8 devfn;
681 	u8 device;
682 	u8 function;
683 
684 	dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
685 
686 	if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
687 		return -ENODEV;
688 
689 	device = devfn >> 3;
690 	function = devfn & 0x7;
691 	dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
692 
693 	slot_func = cpqhp_slot_find(bus, device, function);
694 	if (!slot_func)
695 		return -ENODEV;
696 
697 	dbg("In %s, slot_func = %p, ctrl = %p\n", __FUNCTION__, slot_func, ctrl);
698 	return cpqhp_process_SS(ctrl, slot_func);
699 }
700 
701 
702 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
703 {
704 	struct slot *slot = hotplug_slot->private;
705 	struct controller *ctrl = slot->ctrl;
706 
707 	dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
708 
709 	return cpqhp_hardware_test(ctrl, value);
710 }
711 
712 
713 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
714 {
715 	struct slot *slot = hotplug_slot->private;
716 	struct controller *ctrl = slot->ctrl;
717 
718 	dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
719 
720 	*value = get_slot_enabled(ctrl, slot);
721 	return 0;
722 }
723 
724 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
725 {
726 	struct slot *slot = hotplug_slot->private;
727 	struct controller *ctrl = slot->ctrl;
728 
729 	dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
730 
731 	*value = cpq_get_attention_status(ctrl, slot);
732 	return 0;
733 }
734 
735 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
736 {
737 	struct slot *slot = hotplug_slot->private;
738 	struct controller *ctrl = slot->ctrl;
739 
740 	dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
741 
742 	*value = cpq_get_latch_status(ctrl, slot);
743 
744 	return 0;
745 }
746 
747 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
748 {
749 	struct slot *slot = hotplug_slot->private;
750 	struct controller *ctrl = slot->ctrl;
751 
752 	dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
753 
754 	*value = get_presence_status(ctrl, slot);
755 
756 	return 0;
757 }
758 
759 static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
760 {
761 	struct slot *slot = hotplug_slot->private;
762 	struct controller *ctrl = slot->ctrl;
763 
764 	dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
765 
766 	*value = ctrl->speed_capability;
767 
768 	return 0;
769 }
770 
771 static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
772 {
773 	struct slot *slot = hotplug_slot->private;
774 	struct controller *ctrl = slot->ctrl;
775 
776 	dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
777 
778 	*value = ctrl->speed;
779 
780 	return 0;
781 }
782 
783 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
784 {
785 	u8 num_of_slots = 0;
786 	u8 hp_slot = 0;
787 	u8 device;
788 	u8 rev;
789 	u8 bus_cap;
790 	u16 temp_word;
791 	u16 vendor_id;
792 	u16 subsystem_vid;
793 	u16 subsystem_deviceid;
794 	u32 rc;
795 	struct controller *ctrl;
796 	struct pci_func *func;
797 	int err;
798 
799 	err = pci_enable_device(pdev);
800 	if (err) {
801 		printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
802 			pci_name(pdev), err);
803 		return err;
804 	}
805 
806 	// Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
807 	rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
808 	if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
809 		err(msg_HPC_non_compaq_or_intel);
810 		rc = -ENODEV;
811 		goto err_disable_device;
812 	}
813 	dbg("Vendor ID: %x\n", vendor_id);
814 
815 	rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
816 	dbg("revision: %d\n", rev);
817 	if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) {
818 		err(msg_HPC_rev_error);
819 		rc = -ENODEV;
820 		goto err_disable_device;
821 	}
822 
823 	/* Check for the proper subsytem ID's
824 	 * Intel uses a different SSID programming model than Compaq.
825 	 * For Intel, each SSID bit identifies a PHP capability.
826 	 * Also Intel HPC's may have RID=0.
827 	 */
828 	if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
829 		// TODO: This code can be made to support non-Compaq or Intel subsystem IDs
830 		rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
831 		if (rc) {
832 			err("%s : pci_read_config_word failed\n", __FUNCTION__);
833 			goto err_disable_device;
834 		}
835 		dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
836 		if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
837 			err(msg_HPC_non_compaq_or_intel);
838 			rc = -ENODEV;
839 			goto err_disable_device;
840 		}
841 
842 		ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL);
843 		if (!ctrl) {
844 			err("%s : out of memory\n", __FUNCTION__);
845 			rc = -ENOMEM;
846 			goto err_disable_device;
847 		}
848 		memset(ctrl, 0, sizeof(struct controller));
849 
850 		rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
851 		if (rc) {
852 			err("%s : pci_read_config_word failed\n", __FUNCTION__);
853 			goto err_free_ctrl;
854 		}
855 
856 		info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
857 
858 		/* Set Vendor ID, so it can be accessed later from other functions */
859 		ctrl->vendor_id = vendor_id;
860 
861 		switch (subsystem_vid) {
862 			case PCI_VENDOR_ID_COMPAQ:
863 				if (rev >= 0x13) { /* CIOBX */
864 					ctrl->push_flag = 1;
865 					ctrl->slot_switch_type = 1;
866 					ctrl->push_button = 1;
867 					ctrl->pci_config_space = 1;
868 					ctrl->defeature_PHP = 1;
869 					ctrl->pcix_support = 1;
870 					ctrl->pcix_speed_capability = 1;
871 					pci_read_config_byte(pdev, 0x41, &bus_cap);
872 					if (bus_cap & 0x80) {
873 						dbg("bus max supports 133MHz PCI-X\n");
874 						ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
875 						break;
876 					}
877 					if (bus_cap & 0x40) {
878 						dbg("bus max supports 100MHz PCI-X\n");
879 						ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
880 						break;
881 					}
882 					if (bus_cap & 20) {
883 						dbg("bus max supports 66MHz PCI-X\n");
884 						ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
885 						break;
886 					}
887 					if (bus_cap & 10) {
888 						dbg("bus max supports 66MHz PCI\n");
889 						ctrl->speed_capability = PCI_SPEED_66MHz;
890 						break;
891 					}
892 
893 					break;
894 				}
895 
896 				switch (subsystem_deviceid) {
897 					case PCI_SUB_HPC_ID:
898 						/* Original 6500/7000 implementation */
899 						ctrl->slot_switch_type = 1;
900 						ctrl->speed_capability = PCI_SPEED_33MHz;
901 						ctrl->push_button = 0;
902 						ctrl->pci_config_space = 1;
903 						ctrl->defeature_PHP = 1;
904 						ctrl->pcix_support = 0;
905 						ctrl->pcix_speed_capability = 0;
906 						break;
907 					case PCI_SUB_HPC_ID2:
908 						/* First Pushbutton implementation */
909 						ctrl->push_flag = 1;
910 						ctrl->slot_switch_type = 1;
911 						ctrl->speed_capability = PCI_SPEED_33MHz;
912 						ctrl->push_button = 1;
913 						ctrl->pci_config_space = 1;
914 						ctrl->defeature_PHP = 1;
915 						ctrl->pcix_support = 0;
916 						ctrl->pcix_speed_capability = 0;
917 						break;
918 					case PCI_SUB_HPC_ID_INTC:
919 						/* Third party (6500/7000) */
920 						ctrl->slot_switch_type = 1;
921 						ctrl->speed_capability = PCI_SPEED_33MHz;
922 						ctrl->push_button = 0;
923 						ctrl->pci_config_space = 1;
924 						ctrl->defeature_PHP = 1;
925 						ctrl->pcix_support = 0;
926 						ctrl->pcix_speed_capability = 0;
927 						break;
928 					case PCI_SUB_HPC_ID3:
929 						/* First 66 Mhz implementation */
930 						ctrl->push_flag = 1;
931 						ctrl->slot_switch_type = 1;
932 						ctrl->speed_capability = PCI_SPEED_66MHz;
933 						ctrl->push_button = 1;
934 						ctrl->pci_config_space = 1;
935 						ctrl->defeature_PHP = 1;
936 						ctrl->pcix_support = 0;
937 						ctrl->pcix_speed_capability = 0;
938 						break;
939 					case PCI_SUB_HPC_ID4:
940 						/* First PCI-X implementation, 100MHz */
941 						ctrl->push_flag = 1;
942 						ctrl->slot_switch_type = 1;
943 						ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
944 						ctrl->push_button = 1;
945 						ctrl->pci_config_space = 1;
946 						ctrl->defeature_PHP = 1;
947 						ctrl->pcix_support = 1;
948 						ctrl->pcix_speed_capability = 0;
949 						break;
950 					default:
951 						err(msg_HPC_not_supported);
952 						rc = -ENODEV;
953 						goto err_free_ctrl;
954 				}
955 				break;
956 
957 			case PCI_VENDOR_ID_INTEL:
958 				/* Check for speed capability (0=33, 1=66) */
959 				if (subsystem_deviceid & 0x0001) {
960 					ctrl->speed_capability = PCI_SPEED_66MHz;
961 				} else {
962 					ctrl->speed_capability = PCI_SPEED_33MHz;
963 				}
964 
965 				/* Check for push button */
966 				if (subsystem_deviceid & 0x0002) {
967 					/* no push button */
968 					ctrl->push_button = 0;
969 				} else {
970 					/* push button supported */
971 					ctrl->push_button = 1;
972 				}
973 
974 				/* Check for slot switch type (0=mechanical, 1=not mechanical) */
975 				if (subsystem_deviceid & 0x0004) {
976 					/* no switch */
977 					ctrl->slot_switch_type = 0;
978 				} else {
979 					/* switch */
980 					ctrl->slot_switch_type = 1;
981 				}
982 
983 				/* PHP Status (0=De-feature PHP, 1=Normal operation) */
984 				if (subsystem_deviceid & 0x0008) {
985 					ctrl->defeature_PHP = 1;	// PHP supported
986 				} else {
987 					ctrl->defeature_PHP = 0;	// PHP not supported
988 				}
989 
990 				/* Alternate Base Address Register Interface (0=not supported, 1=supported) */
991 				if (subsystem_deviceid & 0x0010) {
992 					ctrl->alternate_base_address = 1;	// supported
993 				} else {
994 					ctrl->alternate_base_address = 0;	// not supported
995 				}
996 
997 				/* PCI Config Space Index (0=not supported, 1=supported) */
998 				if (subsystem_deviceid & 0x0020) {
999 					ctrl->pci_config_space = 1;		// supported
1000 				} else {
1001 					ctrl->pci_config_space = 0;		// not supported
1002 				}
1003 
1004 				/* PCI-X support */
1005 				if (subsystem_deviceid & 0x0080) {
1006 					/* PCI-X capable */
1007 					ctrl->pcix_support = 1;
1008 					/* Frequency of operation in PCI-X mode */
1009 					if (subsystem_deviceid & 0x0040) {
1010 						/* 133MHz PCI-X if bit 7 is 1 */
1011 						ctrl->pcix_speed_capability = 1;
1012 					} else {
1013 						/* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
1014 						/* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
1015 						ctrl->pcix_speed_capability = 0;
1016 					}
1017 				} else {
1018 					/* Conventional PCI */
1019 					ctrl->pcix_support = 0;
1020 					ctrl->pcix_speed_capability = 0;
1021 				}
1022 				break;
1023 
1024 			default:
1025 				err(msg_HPC_not_supported);
1026 				rc = -ENODEV;
1027 				goto err_free_ctrl;
1028 		}
1029 
1030 	} else {
1031 		err(msg_HPC_not_supported);
1032 		return -ENODEV;
1033 	}
1034 
1035 	// Tell the user that we found one.
1036 	info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1037 					pdev->bus->number);
1038 
1039 	dbg("Hotplug controller capabilities:\n");
1040 	dbg("    speed_capability       %d\n", ctrl->speed_capability);
1041 	dbg("    slot_switch_type       %s\n", ctrl->slot_switch_type ?
1042 					"switch present" : "no switch");
1043 	dbg("    defeature_PHP          %s\n", ctrl->defeature_PHP ?
1044 					"PHP supported" : "PHP not supported");
1045 	dbg("    alternate_base_address %s\n", ctrl->alternate_base_address ?
1046 					"supported" : "not supported");
1047 	dbg("    pci_config_space       %s\n", ctrl->pci_config_space ?
1048 					"supported" : "not supported");
1049 	dbg("    pcix_speed_capability  %s\n", ctrl->pcix_speed_capability ?
1050 					"supported" : "not supported");
1051 	dbg("    pcix_support           %s\n", ctrl->pcix_support ?
1052 					"supported" : "not supported");
1053 
1054 	ctrl->pci_dev = pdev;
1055 	pci_set_drvdata(pdev, ctrl);
1056 
1057 	/* make our own copy of the pci bus structure,
1058 	 * as we like tweaking it a lot */
1059 	ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
1060 	if (!ctrl->pci_bus) {
1061 		err("out of memory\n");
1062 		rc = -ENOMEM;
1063 		goto err_free_ctrl;
1064 	}
1065 	memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
1066 
1067 	ctrl->bus = pdev->bus->number;
1068 	ctrl->rev = rev;
1069 	dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1070 		PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1071 
1072 	init_MUTEX(&ctrl->crit_sect);
1073 	init_waitqueue_head(&ctrl->queue);
1074 
1075 	/* initialize our threads if they haven't already been started up */
1076 	rc = one_time_init();
1077 	if (rc) {
1078 		goto err_free_bus;
1079 	}
1080 
1081 	dbg("pdev = %p\n", pdev);
1082 	dbg("pci resource start %lx\n", pci_resource_start(pdev, 0));
1083 	dbg("pci resource len %lx\n", pci_resource_len(pdev, 0));
1084 
1085 	if (!request_mem_region(pci_resource_start(pdev, 0),
1086 				pci_resource_len(pdev, 0), MY_NAME)) {
1087 		err("cannot reserve MMIO region\n");
1088 		rc = -ENOMEM;
1089 		goto err_free_bus;
1090 	}
1091 
1092 	ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1093 					pci_resource_len(pdev, 0));
1094 	if (!ctrl->hpc_reg) {
1095 		err("cannot remap MMIO region %lx @ %lx\n",
1096 				pci_resource_len(pdev, 0),
1097 				pci_resource_start(pdev, 0));
1098 		rc = -ENODEV;
1099 		goto err_free_mem_region;
1100 	}
1101 
1102 	// Check for 66Mhz operation
1103 	ctrl->speed = get_controller_speed(ctrl);
1104 
1105 
1106 	/********************************************************
1107 	 *
1108 	 *              Save configuration headers for this and
1109 	 *              subordinate PCI buses
1110 	 *
1111 	 ********************************************************/
1112 
1113 	// find the physical slot number of the first hot plug slot
1114 
1115 	/* Get slot won't work for devices behind bridges, but
1116 	 * in this case it will always be called for the "base"
1117 	 * bus/dev/func of a slot.
1118 	 * CS: this is leveraging the PCIIRQ routing code from the kernel
1119 	 * (pci-pc.c: get_irq_routing_table) */
1120 	rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1121 				(readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1122 				&(ctrl->first_slot));
1123 	dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1124 				ctrl->first_slot, rc);
1125 	if (rc) {
1126 		err(msg_initialization_err, rc);
1127 		goto err_iounmap;
1128 	}
1129 
1130 	// Store PCI Config Space for all devices on this bus
1131 	rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1132 	if (rc) {
1133 		err("%s: unable to save PCI configuration data, error %d\n",
1134 				__FUNCTION__, rc);
1135 		goto err_iounmap;
1136 	}
1137 
1138 	/*
1139 	 * Get IO, memory, and IRQ resources for new devices
1140 	 */
1141 	// The next line is required for cpqhp_find_available_resources
1142 	ctrl->interrupt = pdev->irq;
1143 	if (ctrl->interrupt < 0x10) {
1144 		cpqhp_legacy_mode = 1;
1145 		dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1146 	}
1147 
1148 	ctrl->cfgspc_irq = 0;
1149 	pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1150 
1151 	rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1152 	ctrl->add_support = !rc;
1153 	if (rc) {
1154 		dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1155 		err("unable to locate PCI configuration resources for hot plug add.\n");
1156 		goto err_iounmap;
1157 	}
1158 
1159 	/*
1160 	 * Finish setting up the hot plug ctrl device
1161 	 */
1162 	ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1163 	dbg("NumSlots %d \n", ctrl->slot_device_offset);
1164 
1165 	ctrl->next_event = 0;
1166 
1167 	/* Setup the slot information structures */
1168 	rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1169 	if (rc) {
1170 		err(msg_initialization_err, 6);
1171 		err("%s: unable to save PCI configuration data, error %d\n",
1172 			__FUNCTION__, rc);
1173 		goto err_iounmap;
1174 	}
1175 
1176 	/* Mask all general input interrupts */
1177 	writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1178 
1179 	/* set up the interrupt */
1180 	dbg("HPC interrupt = %d \n", ctrl->interrupt);
1181 	if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1182 			SA_SHIRQ, MY_NAME, ctrl)) {
1183 		err("Can't get irq %d for the hotplug pci controller\n",
1184 			ctrl->interrupt);
1185 		rc = -ENODEV;
1186 		goto err_iounmap;
1187 	}
1188 
1189 	/* Enable Shift Out interrupt and clear it, also enable SERR on power fault */
1190 	temp_word = readw(ctrl->hpc_reg + MISC);
1191 	temp_word |= 0x4006;
1192 	writew(temp_word, ctrl->hpc_reg + MISC);
1193 
1194 	// Changed 05/05/97 to clear all interrupts at start
1195 	writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1196 
1197 	ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1198 
1199 	writel(0x0L, ctrl->hpc_reg + INT_MASK);
1200 
1201 	if (!cpqhp_ctrl_list) {
1202 		cpqhp_ctrl_list = ctrl;
1203 		ctrl->next = NULL;
1204 	} else {
1205 		ctrl->next = cpqhp_ctrl_list;
1206 		cpqhp_ctrl_list = ctrl;
1207 	}
1208 
1209 	// turn off empty slots here unless command line option "ON" set
1210 	// Wait for exclusive access to hardware
1211 	down(&ctrl->crit_sect);
1212 
1213 	num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1214 
1215 	// find first device number for the ctrl
1216 	device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1217 
1218 	while (num_of_slots) {
1219 		dbg("num_of_slots: %d\n", num_of_slots);
1220 		func = cpqhp_slot_find(ctrl->bus, device, 0);
1221 		if (!func)
1222 			break;
1223 
1224 		hp_slot = func->device - ctrl->slot_device_offset;
1225 		dbg("hp_slot: %d\n", hp_slot);
1226 
1227 		// We have to save the presence info for these slots
1228 		temp_word = ctrl->ctrl_int_comp >> 16;
1229 		func->presence_save = (temp_word >> hp_slot) & 0x01;
1230 		func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1231 
1232 		if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
1233 			func->switch_save = 0;
1234 		} else {
1235 			func->switch_save = 0x10;
1236 		}
1237 
1238 		if (!power_mode) {
1239 			if (!func->is_a_board) {
1240 				green_LED_off(ctrl, hp_slot);
1241 				slot_disable(ctrl, hp_slot);
1242 			}
1243 		}
1244 
1245 		device++;
1246 		num_of_slots--;
1247 	}
1248 
1249 	if (!power_mode) {
1250 		set_SOGO(ctrl);
1251 		// Wait for SOBS to be unset
1252 		wait_for_ctrl_irq(ctrl);
1253 	}
1254 
1255 	rc = init_SERR(ctrl);
1256 	if (rc) {
1257 		err("init_SERR failed\n");
1258 		up(&ctrl->crit_sect);
1259 		goto err_free_irq;
1260 	}
1261 
1262 	// Done with exclusive hardware access
1263 	up(&ctrl->crit_sect);
1264 
1265 	cpqhp_create_ctrl_files(ctrl);
1266 
1267 	return 0;
1268 
1269 err_free_irq:
1270 	free_irq(ctrl->interrupt, ctrl);
1271 err_iounmap:
1272 	iounmap(ctrl->hpc_reg);
1273 err_free_mem_region:
1274 	release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1275 err_free_bus:
1276 	kfree(ctrl->pci_bus);
1277 err_free_ctrl:
1278 	kfree(ctrl);
1279 err_disable_device:
1280 	pci_disable_device(pdev);
1281 	return rc;
1282 }
1283 
1284 
1285 static int one_time_init(void)
1286 {
1287 	int loop;
1288 	int retval = 0;
1289 
1290 	if (initialized)
1291 		return 0;
1292 
1293 	power_mode = 0;
1294 
1295 	retval = pci_print_IRQ_route();
1296 	if (retval)
1297 		goto error;
1298 
1299 	dbg("Initialize + Start the notification mechanism \n");
1300 
1301 	retval = cpqhp_event_start_thread();
1302 	if (retval)
1303 		goto error;
1304 
1305 	dbg("Initialize slot lists\n");
1306 	for (loop = 0; loop < 256; loop++) {
1307 		cpqhp_slot_list[loop] = NULL;
1308 	}
1309 
1310 	// FIXME: We also need to hook the NMI handler eventually.
1311 	// this also needs to be worked with Christoph
1312 	// register_NMI_handler();
1313 
1314 	// Map rom address
1315 	cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
1316 	if (!cpqhp_rom_start) {
1317 		err ("Could not ioremap memory region for ROM\n");
1318 		retval = -EIO;
1319 		goto error;
1320 	}
1321 
1322 	/* Now, map the int15 entry point if we are on compaq specific hardware */
1323 	compaq_nvram_init(cpqhp_rom_start);
1324 
1325 	/* Map smbios table entry point structure */
1326 	smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
1327 					cpqhp_rom_start + ROM_PHY_LEN);
1328 	if (!smbios_table) {
1329 		err ("Could not find the SMBIOS pointer in memory\n");
1330 		retval = -EIO;
1331 		goto error_rom_start;
1332 	}
1333 
1334 	smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
1335 					readw(smbios_table + ST_LENGTH));
1336 	if (!smbios_start) {
1337 		err ("Could not ioremap memory region taken from SMBIOS values\n");
1338 		retval = -EIO;
1339 		goto error_smbios_start;
1340 	}
1341 
1342 	initialized = 1;
1343 
1344 	return retval;
1345 
1346 error_smbios_start:
1347 	iounmap(smbios_start);
1348 error_rom_start:
1349 	iounmap(cpqhp_rom_start);
1350 error:
1351 	return retval;
1352 }
1353 
1354 
1355 static void __exit unload_cpqphpd(void)
1356 {
1357 	struct pci_func *next;
1358 	struct pci_func *TempSlot;
1359 	int loop;
1360 	u32 rc;
1361 	struct controller *ctrl;
1362 	struct controller *tctrl;
1363 	struct pci_resource *res;
1364 	struct pci_resource *tres;
1365 
1366 	rc = compaq_nvram_store(cpqhp_rom_start);
1367 
1368 	ctrl = cpqhp_ctrl_list;
1369 
1370 	while (ctrl) {
1371 		if (ctrl->hpc_reg) {
1372 			u16 misc;
1373 			rc = read_slot_enable (ctrl);
1374 
1375 			writeb(0, ctrl->hpc_reg + SLOT_SERR);
1376 			writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1377 
1378 			misc = readw(ctrl->hpc_reg + MISC);
1379 			misc &= 0xFFFD;
1380 			writew(misc, ctrl->hpc_reg + MISC);
1381 		}
1382 
1383 		ctrl_slot_cleanup(ctrl);
1384 
1385 		res = ctrl->io_head;
1386 		while (res) {
1387 			tres = res;
1388 			res = res->next;
1389 			kfree(tres);
1390 		}
1391 
1392 		res = ctrl->mem_head;
1393 		while (res) {
1394 			tres = res;
1395 			res = res->next;
1396 			kfree(tres);
1397 		}
1398 
1399 		res = ctrl->p_mem_head;
1400 		while (res) {
1401 			tres = res;
1402 			res = res->next;
1403 			kfree(tres);
1404 		}
1405 
1406 		res = ctrl->bus_head;
1407 		while (res) {
1408 			tres = res;
1409 			res = res->next;
1410 			kfree(tres);
1411 		}
1412 
1413 		kfree (ctrl->pci_bus);
1414 
1415 		tctrl = ctrl;
1416 		ctrl = ctrl->next;
1417 		kfree(tctrl);
1418 	}
1419 
1420 	for (loop = 0; loop < 256; loop++) {
1421 		next = cpqhp_slot_list[loop];
1422 		while (next != NULL) {
1423 			res = next->io_head;
1424 			while (res) {
1425 				tres = res;
1426 				res = res->next;
1427 				kfree(tres);
1428 			}
1429 
1430 			res = next->mem_head;
1431 			while (res) {
1432 				tres = res;
1433 				res = res->next;
1434 				kfree(tres);
1435 			}
1436 
1437 			res = next->p_mem_head;
1438 			while (res) {
1439 				tres = res;
1440 				res = res->next;
1441 				kfree(tres);
1442 			}
1443 
1444 			res = next->bus_head;
1445 			while (res) {
1446 				tres = res;
1447 				res = res->next;
1448 				kfree(tres);
1449 			}
1450 
1451 			TempSlot = next;
1452 			next = next->next;
1453 			kfree(TempSlot);
1454 		}
1455 	}
1456 
1457 	// Stop the notification mechanism
1458 	if (initialized)
1459 		cpqhp_event_stop_thread();
1460 
1461 	//unmap the rom address
1462 	if (cpqhp_rom_start)
1463 		iounmap(cpqhp_rom_start);
1464 	if (smbios_start)
1465 		iounmap(smbios_start);
1466 }
1467 
1468 
1469 
1470 static struct pci_device_id hpcd_pci_tbl[] = {
1471 	{
1472 	/* handle any PCI Hotplug controller */
1473 	.class =        ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1474 	.class_mask =   ~0,
1475 
1476 	/* no matter who makes it */
1477 	.vendor =       PCI_ANY_ID,
1478 	.device =       PCI_ANY_ID,
1479 	.subvendor =    PCI_ANY_ID,
1480 	.subdevice =    PCI_ANY_ID,
1481 
1482 	}, { /* end: all zeroes */ }
1483 };
1484 
1485 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1486 
1487 
1488 
1489 static struct pci_driver cpqhpc_driver = {
1490 	.name =		"compaq_pci_hotplug",
1491 	.id_table =	hpcd_pci_tbl,
1492 	.probe =	cpqhpc_probe,
1493 	/* remove:	cpqhpc_remove_one, */
1494 };
1495 
1496 
1497 
1498 static int __init cpqhpc_init(void)
1499 {
1500 	int result;
1501 
1502 	cpqhp_debug = debug;
1503 
1504 	info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
1505 	result = pci_register_driver(&cpqhpc_driver);
1506 	dbg("pci_register_driver = %d\n", result);
1507 	return result;
1508 }
1509 
1510 
1511 static void __exit cpqhpc_cleanup(void)
1512 {
1513 	dbg("unload_cpqphpd()\n");
1514 	unload_cpqphpd();
1515 
1516 	dbg("pci_unregister_driver\n");
1517 	pci_unregister_driver(&cpqhpc_driver);
1518 }
1519 
1520 
1521 module_init(cpqhpc_init);
1522 module_exit(cpqhpc_cleanup);
1523 
1524 
1525