xref: /linux/drivers/net/wireless/rsi/rsi_hal.h (revision 19844c0a9a19ab6e9139b5e988449de9d2f559e1)
1b78e91bcSPrameela Rani Garnepudi /**
2b78e91bcSPrameela Rani Garnepudi  * Copyright (c) 2017 Redpine Signals Inc.
3b78e91bcSPrameela Rani Garnepudi  *
4b78e91bcSPrameela Rani Garnepudi  * Permission to use, copy, modify, and/or distribute this software for any
5b78e91bcSPrameela Rani Garnepudi  * purpose with or without fee is hereby granted, provided that the above
6b78e91bcSPrameela Rani Garnepudi  * copyright notice and this permission notice appear in all copies.
7b78e91bcSPrameela Rani Garnepudi  *
8b78e91bcSPrameela Rani Garnepudi  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9b78e91bcSPrameela Rani Garnepudi  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10b78e91bcSPrameela Rani Garnepudi  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11b78e91bcSPrameela Rani Garnepudi  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12b78e91bcSPrameela Rani Garnepudi  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13b78e91bcSPrameela Rani Garnepudi  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14b78e91bcSPrameela Rani Garnepudi  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15b78e91bcSPrameela Rani Garnepudi  */
16b78e91bcSPrameela Rani Garnepudi 
17b78e91bcSPrameela Rani Garnepudi #ifndef __RSI_HAL_H__
18b78e91bcSPrameela Rani Garnepudi #define __RSI_HAL_H__
19b78e91bcSPrameela Rani Garnepudi 
20b78e91bcSPrameela Rani Garnepudi #define FLASH_WRITE_CHUNK_SIZE		(4 * 1024)
21b78e91bcSPrameela Rani Garnepudi #define FLASH_SECTOR_SIZE		(4 * 1024)
22b78e91bcSPrameela Rani Garnepudi 
23b78e91bcSPrameela Rani Garnepudi #define FLASH_SIZE_ADDR			0x04000016
24b78e91bcSPrameela Rani Garnepudi #define PING_BUFFER_ADDRESS		0x19000
25b78e91bcSPrameela Rani Garnepudi #define PONG_BUFFER_ADDRESS		0x1a000
26b78e91bcSPrameela Rani Garnepudi #define SWBL_REGIN			0x41050034
27b78e91bcSPrameela Rani Garnepudi #define SWBL_REGOUT			0x4105003c
28b78e91bcSPrameela Rani Garnepudi #define PING_WRITE			0x1
29b78e91bcSPrameela Rani Garnepudi #define PONG_WRITE			0x2
30b78e91bcSPrameela Rani Garnepudi 
31b78e91bcSPrameela Rani Garnepudi #define BL_CMD_TIMEOUT			2000
32b78e91bcSPrameela Rani Garnepudi #define BL_BURN_TIMEOUT			(50 * 1000)
33b78e91bcSPrameela Rani Garnepudi 
34b78e91bcSPrameela Rani Garnepudi #define REGIN_VALID			0xA
35b78e91bcSPrameela Rani Garnepudi #define REGIN_INPUT			0xA0
36b78e91bcSPrameela Rani Garnepudi #define REGOUT_VALID			0xAB
37b78e91bcSPrameela Rani Garnepudi #define REGOUT_INVALID			(~0xAB)
38b78e91bcSPrameela Rani Garnepudi #define CMD_PASS			0xAA
39b78e91bcSPrameela Rani Garnepudi #define CMD_FAIL			0xCC
40b78e91bcSPrameela Rani Garnepudi 
41b78e91bcSPrameela Rani Garnepudi #define LOAD_HOSTED_FW			'A'
42b78e91bcSPrameela Rani Garnepudi #define BURN_HOSTED_FW			'B'
43b78e91bcSPrameela Rani Garnepudi #define PING_VALID			'I'
44b78e91bcSPrameela Rani Garnepudi #define PONG_VALID			'O'
45b78e91bcSPrameela Rani Garnepudi #define PING_AVAIL			'I'
46b78e91bcSPrameela Rani Garnepudi #define PONG_AVAIL			'O'
47b78e91bcSPrameela Rani Garnepudi #define EOF_REACHED			'E'
48b78e91bcSPrameela Rani Garnepudi #define CHECK_CRC			'K'
49b78e91bcSPrameela Rani Garnepudi #define POLLING_MODE			'P'
50b78e91bcSPrameela Rani Garnepudi #define CONFIG_AUTO_READ_MODE		'R'
51b78e91bcSPrameela Rani Garnepudi #define JUMP_TO_ZERO_PC			'J'
52b78e91bcSPrameela Rani Garnepudi #define FW_LOADING_SUCCESSFUL		'S'
53b78e91bcSPrameela Rani Garnepudi #define LOADING_INITIATED		'1'
54b78e91bcSPrameela Rani Garnepudi 
5549ddac0dSKarun Eagalapati #define RSI_ULP_RESET_REG		0x161
5649ddac0dSKarun Eagalapati #define RSI_WATCH_DOG_TIMER_1		0x16c
5749ddac0dSKarun Eagalapati #define RSI_WATCH_DOG_TIMER_2		0x16d
5849ddac0dSKarun Eagalapati #define RSI_WATCH_DOG_DELAY_TIMER_1		0x16e
5949ddac0dSKarun Eagalapati #define RSI_WATCH_DOG_DELAY_TIMER_2		0x16f
6049ddac0dSKarun Eagalapati #define RSI_WATCH_DOG_TIMER_ENABLE		0x170
6149ddac0dSKarun Eagalapati 
6249ddac0dSKarun Eagalapati #define RSI_ULP_WRITE_0			00
6349ddac0dSKarun Eagalapati #define RSI_ULP_WRITE_2			02
6449ddac0dSKarun Eagalapati #define RSI_ULP_WRITE_50		50
6549ddac0dSKarun Eagalapati 
6649ddac0dSKarun Eagalapati #define RSI_RESTART_WDT			BIT(11)
6749ddac0dSKarun Eagalapati #define RSI_BYPASS_ULP_ON_WDT		BIT(1)
6849ddac0dSKarun Eagalapati 
6949ddac0dSKarun Eagalapati #define RSI_ULP_TIMER_ENABLE		((0xaa000) | RSI_RESTART_WDT |	\
7049ddac0dSKarun Eagalapati 					 RSI_BYPASS_ULP_ON_WDT)
7149ddac0dSKarun Eagalapati #define RSI_RF_SPI_PROG_REG_BASE_ADDR	0x40080000
7249ddac0dSKarun Eagalapati 
7349ddac0dSKarun Eagalapati #define RSI_GSPI_CTRL_REG0		(RSI_RF_SPI_PROG_REG_BASE_ADDR)
7449ddac0dSKarun Eagalapati #define RSI_GSPI_CTRL_REG1		(RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x2)
7549ddac0dSKarun Eagalapati #define RSI_GSPI_DATA_REG0		(RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x4)
7649ddac0dSKarun Eagalapati #define RSI_GSPI_DATA_REG1		(RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x6)
7749ddac0dSKarun Eagalapati #define RSI_GSPI_DATA_REG2		(RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x8)
7849ddac0dSKarun Eagalapati 
7949ddac0dSKarun Eagalapati #define RSI_GSPI_CTRL_REG0_VALUE		0x340
8049ddac0dSKarun Eagalapati 
8149ddac0dSKarun Eagalapati #define RSI_GSPI_DMA_MODE			BIT(13)
8249ddac0dSKarun Eagalapati 
8349ddac0dSKarun Eagalapati #define RSI_GSPI_2_ULP			BIT(12)
8449ddac0dSKarun Eagalapati #define RSI_GSPI_TRIG			BIT(7)
8549ddac0dSKarun Eagalapati #define RSI_GSPI_READ			BIT(6)
8649ddac0dSKarun Eagalapati #define RSI_GSPI_RF_SPI_ACTIVE		BIT(8)
8749ddac0dSKarun Eagalapati 
88b78e91bcSPrameela Rani Garnepudi /* Boot loader commands */
89b78e91bcSPrameela Rani Garnepudi #define SEND_RPS_FILE			'2'
90b78e91bcSPrameela Rani Garnepudi 
91b78e91bcSPrameela Rani Garnepudi #define FW_IMAGE_MIN_ADDRESS		(68 * 1024)
92b78e91bcSPrameela Rani Garnepudi #define MAX_FLASH_FILE_SIZE		(400 * 1024) //400K
93b78e91bcSPrameela Rani Garnepudi #define FLASH_START_ADDRESS		16
94b78e91bcSPrameela Rani Garnepudi 
95b78e91bcSPrameela Rani Garnepudi #define COMMON_HAL_CARD_READY_IND	0x0
96b78e91bcSPrameela Rani Garnepudi 
97b78e91bcSPrameela Rani Garnepudi #define COMMAN_HAL_WAIT_FOR_CARD_READY	1
98b78e91bcSPrameela Rani Garnepudi 
999920322cSPrameela Rani Garnepudi #define RSI_DEV_OPMODE_WIFI_ALONE	1
1009920322cSPrameela Rani Garnepudi #define RSI_DEV_COEX_MODE_WIFI_ALONE	1
1019920322cSPrameela Rani Garnepudi 
102de2dea16SPavani Muthyala #define BBP_INFO_40MHZ 0x6
103de2dea16SPavani Muthyala 
104b78e91bcSPrameela Rani Garnepudi struct bl_header {
105b78e91bcSPrameela Rani Garnepudi 	__le32 flags;
106b78e91bcSPrameela Rani Garnepudi 	__le32 image_no;
107b78e91bcSPrameela Rani Garnepudi 	__le32 check_sum;
108b78e91bcSPrameela Rani Garnepudi 	__le32 flash_start_address;
109b78e91bcSPrameela Rani Garnepudi 	__le32 flash_len;
110b78e91bcSPrameela Rani Garnepudi } __packed;
111b78e91bcSPrameela Rani Garnepudi 
112b78e91bcSPrameela Rani Garnepudi struct ta_metadata {
113b78e91bcSPrameela Rani Garnepudi 	char *name;
114b78e91bcSPrameela Rani Garnepudi 	unsigned int address;
115b78e91bcSPrameela Rani Garnepudi };
116b78e91bcSPrameela Rani Garnepudi 
117de2dea16SPavani Muthyala struct rsi_mgmt_desc {
118de2dea16SPavani Muthyala 	__le16 len_qno;
119de2dea16SPavani Muthyala 	u8 frame_type;
120de2dea16SPavani Muthyala 	u8 misc_flags;
1216507de6dSPrameela Rani Garnepudi 	u8 xtend_desc_size;
122de2dea16SPavani Muthyala 	u8 header_len;
1236507de6dSPrameela Rani Garnepudi 	__le16 frame_info;
124de2dea16SPavani Muthyala 	u8 rate_info;
1256507de6dSPrameela Rani Garnepudi 	u8 reserved1;
1266507de6dSPrameela Rani Garnepudi 	__le16 bbp_info;
127de2dea16SPavani Muthyala 	__le16 seq_ctrl;
1286507de6dSPrameela Rani Garnepudi 	u8 reserved2;
129*19844c0aSPrameela Rani Garnepudi 	u8 sta_id;
130de2dea16SPavani Muthyala } __packed;
131de2dea16SPavani Muthyala 
132af193097SPavani Muthyala struct rsi_data_desc {
133af193097SPavani Muthyala 	__le16 len_qno;
1340eb42586SPavani Muthyala 	u8 cfm_frame_type;
1350eb42586SPavani Muthyala 	u8 misc_flags;
136af193097SPavani Muthyala 	u8 xtend_desc_size;
137af193097SPavani Muthyala 	u8 header_len;
138af193097SPavani Muthyala 	__le16 frame_info;
139af193097SPavani Muthyala 	__le16 rate_info;
140af193097SPavani Muthyala 	__le16 bbp_info;
141af193097SPavani Muthyala 	__le16 mac_flags;
142af193097SPavani Muthyala 	u8 qid_tid;
143af193097SPavani Muthyala 	u8 sta_id;
144af193097SPavani Muthyala } __packed;
145af193097SPavani Muthyala 
146b78e91bcSPrameela Rani Garnepudi int rsi_hal_device_init(struct rsi_hw *adapter);
147d26a9559SPrameela Rani Garnepudi int rsi_prepare_beacon(struct rsi_common *common, struct sk_buff *skb);
148d26a9559SPrameela Rani Garnepudi int rsi_send_pkt_to_bus(struct rsi_common *common, struct sk_buff *skb);
149b78e91bcSPrameela Rani Garnepudi 
150b78e91bcSPrameela Rani Garnepudi #endif
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