130519460SAditya Srivastava /* 2b78e91bcSPrameela Rani Garnepudi * Copyright (c) 2017 Redpine Signals Inc. 3b78e91bcSPrameela Rani Garnepudi * 4b78e91bcSPrameela Rani Garnepudi * Permission to use, copy, modify, and/or distribute this software for any 5b78e91bcSPrameela Rani Garnepudi * purpose with or without fee is hereby granted, provided that the above 6b78e91bcSPrameela Rani Garnepudi * copyright notice and this permission notice appear in all copies. 7b78e91bcSPrameela Rani Garnepudi * 8b78e91bcSPrameela Rani Garnepudi * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9b78e91bcSPrameela Rani Garnepudi * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10b78e91bcSPrameela Rani Garnepudi * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11b78e91bcSPrameela Rani Garnepudi * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12b78e91bcSPrameela Rani Garnepudi * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13b78e91bcSPrameela Rani Garnepudi * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14b78e91bcSPrameela Rani Garnepudi * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15b78e91bcSPrameela Rani Garnepudi */ 16b78e91bcSPrameela Rani Garnepudi 17b78e91bcSPrameela Rani Garnepudi #ifndef __RSI_HAL_H__ 18b78e91bcSPrameela Rani Garnepudi #define __RSI_HAL_H__ 19b78e91bcSPrameela Rani Garnepudi 20898b2553SPrameela Rani Garnepudi /* Device Operating modes */ 21898b2553SPrameela Rani Garnepudi #define DEV_OPMODE_WIFI_ALONE 1 22898b2553SPrameela Rani Garnepudi #define DEV_OPMODE_BT_ALONE 4 23898b2553SPrameela Rani Garnepudi #define DEV_OPMODE_BT_LE_ALONE 8 24898b2553SPrameela Rani Garnepudi #define DEV_OPMODE_BT_DUAL 12 25898b2553SPrameela Rani Garnepudi #define DEV_OPMODE_STA_BT 5 26898b2553SPrameela Rani Garnepudi #define DEV_OPMODE_STA_BT_LE 9 27898b2553SPrameela Rani Garnepudi #define DEV_OPMODE_STA_BT_DUAL 13 28898b2553SPrameela Rani Garnepudi #define DEV_OPMODE_AP_BT 6 29898b2553SPrameela Rani Garnepudi #define DEV_OPMODE_AP_BT_DUAL 14 30898b2553SPrameela Rani Garnepudi 3131f97cf9SMarek Vasut #define DEV_OPMODE_PARAM_DESC \ 3231f97cf9SMarek Vasut __stringify(DEV_OPMODE_WIFI_ALONE) "[Wi-Fi alone], " \ 3331f97cf9SMarek Vasut __stringify(DEV_OPMODE_BT_ALONE) "[BT classic alone], " \ 3431f97cf9SMarek Vasut __stringify(DEV_OPMODE_BT_LE_ALONE) "[BT LE alone], " \ 3531f97cf9SMarek Vasut __stringify(DEV_OPMODE_BT_DUAL) "[BT classic + BT LE alone], " \ 3631f97cf9SMarek Vasut __stringify(DEV_OPMODE_STA_BT) "[Wi-Fi STA + BT classic], " \ 3731f97cf9SMarek Vasut __stringify(DEV_OPMODE_STA_BT_LE) "[Wi-Fi STA + BT LE], " \ 3831f97cf9SMarek Vasut __stringify(DEV_OPMODE_STA_BT_DUAL) "[Wi-Fi STA + BT classic + BT LE], " \ 3931f97cf9SMarek Vasut __stringify(DEV_OPMODE_AP_BT) "[Wi-Fi AP + BT classic], " \ 4031f97cf9SMarek Vasut __stringify(DEV_OPMODE_AP_BT_DUAL) "[Wi-Fi AP + BT classic + BT LE]" 4131f97cf9SMarek Vasut 42b78e91bcSPrameela Rani Garnepudi #define FLASH_WRITE_CHUNK_SIZE (4 * 1024) 43b78e91bcSPrameela Rani Garnepudi #define FLASH_SECTOR_SIZE (4 * 1024) 44b78e91bcSPrameela Rani Garnepudi 45b78e91bcSPrameela Rani Garnepudi #define FLASH_SIZE_ADDR 0x04000016 46b78e91bcSPrameela Rani Garnepudi #define PING_BUFFER_ADDRESS 0x19000 47b78e91bcSPrameela Rani Garnepudi #define PONG_BUFFER_ADDRESS 0x1a000 48b78e91bcSPrameela Rani Garnepudi #define SWBL_REGIN 0x41050034 49b78e91bcSPrameela Rani Garnepudi #define SWBL_REGOUT 0x4105003c 50b78e91bcSPrameela Rani Garnepudi #define PING_WRITE 0x1 51b78e91bcSPrameela Rani Garnepudi #define PONG_WRITE 0x2 52b78e91bcSPrameela Rani Garnepudi 53b78e91bcSPrameela Rani Garnepudi #define BL_CMD_TIMEOUT 2000 54b78e91bcSPrameela Rani Garnepudi #define BL_BURN_TIMEOUT (50 * 1000) 55b78e91bcSPrameela Rani Garnepudi 56b78e91bcSPrameela Rani Garnepudi #define REGIN_VALID 0xA 57b78e91bcSPrameela Rani Garnepudi #define REGIN_INPUT 0xA0 58b78e91bcSPrameela Rani Garnepudi #define REGOUT_VALID 0xAB 59b78e91bcSPrameela Rani Garnepudi #define REGOUT_INVALID (~0xAB) 60b78e91bcSPrameela Rani Garnepudi #define CMD_PASS 0xAA 61b78e91bcSPrameela Rani Garnepudi #define CMD_FAIL 0xCC 62b78e91bcSPrameela Rani Garnepudi 63b78e91bcSPrameela Rani Garnepudi #define LOAD_HOSTED_FW 'A' 64b78e91bcSPrameela Rani Garnepudi #define BURN_HOSTED_FW 'B' 65b78e91bcSPrameela Rani Garnepudi #define PING_VALID 'I' 66b78e91bcSPrameela Rani Garnepudi #define PONG_VALID 'O' 67b78e91bcSPrameela Rani Garnepudi #define PING_AVAIL 'I' 68b78e91bcSPrameela Rani Garnepudi #define PONG_AVAIL 'O' 69b78e91bcSPrameela Rani Garnepudi #define EOF_REACHED 'E' 70b78e91bcSPrameela Rani Garnepudi #define CHECK_CRC 'K' 71b78e91bcSPrameela Rani Garnepudi #define POLLING_MODE 'P' 72*c6e3dc99SPeter Lafreniere #define AUTO_READ_MODE 'R' 73b78e91bcSPrameela Rani Garnepudi #define JUMP_TO_ZERO_PC 'J' 74b78e91bcSPrameela Rani Garnepudi #define FW_LOADING_SUCCESSFUL 'S' 75b78e91bcSPrameela Rani Garnepudi #define LOADING_INITIATED '1' 76b78e91bcSPrameela Rani Garnepudi 7749ddac0dSKarun Eagalapati #define RSI_ULP_RESET_REG 0x161 7849ddac0dSKarun Eagalapati #define RSI_WATCH_DOG_TIMER_1 0x16c 7949ddac0dSKarun Eagalapati #define RSI_WATCH_DOG_TIMER_2 0x16d 8049ddac0dSKarun Eagalapati #define RSI_WATCH_DOG_DELAY_TIMER_1 0x16e 8149ddac0dSKarun Eagalapati #define RSI_WATCH_DOG_DELAY_TIMER_2 0x16f 8249ddac0dSKarun Eagalapati #define RSI_WATCH_DOG_TIMER_ENABLE 0x170 8349ddac0dSKarun Eagalapati 8417ff2c79SSiva Rebbagondla /* Watchdog timer addresses for 9116 */ 8517ff2c79SSiva Rebbagondla #define NWP_AHB_BASE_ADDR 0x41300000 8617ff2c79SSiva Rebbagondla #define NWP_WWD_INTERRUPT_TIMER (NWP_AHB_BASE_ADDR + 0x300) 8717ff2c79SSiva Rebbagondla #define NWP_WWD_SYSTEM_RESET_TIMER (NWP_AHB_BASE_ADDR + 0x304) 8817ff2c79SSiva Rebbagondla #define NWP_WWD_WINDOW_TIMER (NWP_AHB_BASE_ADDR + 0x308) 8917ff2c79SSiva Rebbagondla #define NWP_WWD_TIMER_SETTINGS (NWP_AHB_BASE_ADDR + 0x30C) 9017ff2c79SSiva Rebbagondla #define NWP_WWD_MODE_AND_RSTART (NWP_AHB_BASE_ADDR + 0x310) 9117ff2c79SSiva Rebbagondla #define NWP_WWD_RESET_BYPASS (NWP_AHB_BASE_ADDR + 0x314) 9217ff2c79SSiva Rebbagondla #define NWP_FSM_INTR_MASK_REG (NWP_AHB_BASE_ADDR + 0x104) 9317ff2c79SSiva Rebbagondla 9417ff2c79SSiva Rebbagondla /* Watchdog timer values */ 9517ff2c79SSiva Rebbagondla #define NWP_WWD_INT_TIMER_CLKS 5 9617ff2c79SSiva Rebbagondla #define NWP_WWD_SYS_RESET_TIMER_CLKS 4 9717ff2c79SSiva Rebbagondla #define NWP_WWD_TIMER_DISABLE 0xAA0001 9817ff2c79SSiva Rebbagondla 9949ddac0dSKarun Eagalapati #define RSI_ULP_WRITE_0 00 10049ddac0dSKarun Eagalapati #define RSI_ULP_WRITE_2 02 10149ddac0dSKarun Eagalapati #define RSI_ULP_WRITE_50 50 10249ddac0dSKarun Eagalapati 10349ddac0dSKarun Eagalapati #define RSI_RESTART_WDT BIT(11) 10449ddac0dSKarun Eagalapati #define RSI_BYPASS_ULP_ON_WDT BIT(1) 10549ddac0dSKarun Eagalapati 10649ddac0dSKarun Eagalapati #define RSI_ULP_TIMER_ENABLE ((0xaa000) | RSI_RESTART_WDT | \ 10749ddac0dSKarun Eagalapati RSI_BYPASS_ULP_ON_WDT) 10849ddac0dSKarun Eagalapati #define RSI_RF_SPI_PROG_REG_BASE_ADDR 0x40080000 10949ddac0dSKarun Eagalapati 11049ddac0dSKarun Eagalapati #define RSI_GSPI_CTRL_REG0 (RSI_RF_SPI_PROG_REG_BASE_ADDR) 11149ddac0dSKarun Eagalapati #define RSI_GSPI_CTRL_REG1 (RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x2) 11249ddac0dSKarun Eagalapati #define RSI_GSPI_DATA_REG0 (RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x4) 11349ddac0dSKarun Eagalapati #define RSI_GSPI_DATA_REG1 (RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x6) 11449ddac0dSKarun Eagalapati #define RSI_GSPI_DATA_REG2 (RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x8) 11549ddac0dSKarun Eagalapati 11649ddac0dSKarun Eagalapati #define RSI_GSPI_CTRL_REG0_VALUE 0x340 11749ddac0dSKarun Eagalapati 11849ddac0dSKarun Eagalapati #define RSI_GSPI_DMA_MODE BIT(13) 11949ddac0dSKarun Eagalapati 12049ddac0dSKarun Eagalapati #define RSI_GSPI_2_ULP BIT(12) 12149ddac0dSKarun Eagalapati #define RSI_GSPI_TRIG BIT(7) 12249ddac0dSKarun Eagalapati #define RSI_GSPI_READ BIT(6) 12349ddac0dSKarun Eagalapati #define RSI_GSPI_RF_SPI_ACTIVE BIT(8) 12449ddac0dSKarun Eagalapati 125b78e91bcSPrameela Rani Garnepudi /* Boot loader commands */ 126b78e91bcSPrameela Rani Garnepudi #define SEND_RPS_FILE '2' 127b78e91bcSPrameela Rani Garnepudi 128b78e91bcSPrameela Rani Garnepudi #define FW_IMAGE_MIN_ADDRESS (68 * 1024) 129b78e91bcSPrameela Rani Garnepudi #define MAX_FLASH_FILE_SIZE (400 * 1024) //400K 130b78e91bcSPrameela Rani Garnepudi #define FLASH_START_ADDRESS 16 131b78e91bcSPrameela Rani Garnepudi 132b78e91bcSPrameela Rani Garnepudi #define COMMON_HAL_CARD_READY_IND 0x0 133b78e91bcSPrameela Rani Garnepudi 134b78e91bcSPrameela Rani Garnepudi #define COMMAN_HAL_WAIT_FOR_CARD_READY 1 135b78e91bcSPrameela Rani Garnepudi 1369920322cSPrameela Rani Garnepudi #define RSI_DEV_OPMODE_WIFI_ALONE 1 1379920322cSPrameela Rani Garnepudi #define RSI_DEV_COEX_MODE_WIFI_ALONE 1 1389920322cSPrameela Rani Garnepudi 139de2dea16SPavani Muthyala #define BBP_INFO_40MHZ 0x6 140de2dea16SPavani Muthyala 141192524a4SPavani Muthyala #define FW_FLASH_OFFSET 0x820 1423ac61578SSiva Rebbagondla #define LMAC_VER_OFFSET_9113 (FW_FLASH_OFFSET + 0x200) 143e5a1ecc9SSiva Rebbagondla #define LMAC_VER_OFFSET_9116 0x22C2 144a1854faeSPrameela Rani Garnepudi #define MAX_DWORD_ALIGN_BYTES 64 14516d3bb7bSAmitkumar Karwar #define RSI_COMMON_REG_SIZE 2 146e5a1ecc9SSiva Rebbagondla #define RSI_9116_REG_SIZE 4 147e5a1ecc9SSiva Rebbagondla #define FW_ALIGN_SIZE 4 148e5a1ecc9SSiva Rebbagondla #define RSI_9116_FW_MAGIC_WORD 0x5aa5 149e5a1ecc9SSiva Rebbagondla 150e5a1ecc9SSiva Rebbagondla #define MEM_ACCESS_CTRL_FROM_HOST 0x41300000 151e5a1ecc9SSiva Rebbagondla #define RAM_384K_ACCESS_FROM_TA (BIT(2) | BIT(3) | BIT(4) | BIT(5) | \ 152e5a1ecc9SSiva Rebbagondla BIT(20) | BIT(21) | BIT(22) | \ 153e5a1ecc9SSiva Rebbagondla BIT(23) | BIT(24) | BIT(25)) 154192524a4SPavani Muthyala 155b78e91bcSPrameela Rani Garnepudi struct bl_header { 156b78e91bcSPrameela Rani Garnepudi __le32 flags; 157b78e91bcSPrameela Rani Garnepudi __le32 image_no; 158b78e91bcSPrameela Rani Garnepudi __le32 check_sum; 159b78e91bcSPrameela Rani Garnepudi __le32 flash_start_address; 160b78e91bcSPrameela Rani Garnepudi __le32 flash_len; 161b78e91bcSPrameela Rani Garnepudi } __packed; 162b78e91bcSPrameela Rani Garnepudi 163b78e91bcSPrameela Rani Garnepudi struct ta_metadata { 164b78e91bcSPrameela Rani Garnepudi char *name; 165b78e91bcSPrameela Rani Garnepudi unsigned int address; 166b78e91bcSPrameela Rani Garnepudi }; 167b78e91bcSPrameela Rani Garnepudi 168e5a1ecc9SSiva Rebbagondla #define RSI_BL_CTRL_LEN_MASK 0xFFFFFF 169e5a1ecc9SSiva Rebbagondla #define RSI_BL_CTRL_SPI_32BIT_MODE BIT(27) 170e5a1ecc9SSiva Rebbagondla #define RSI_BL_CTRL_REL_TA_SOFTRESET BIT(28) 171e5a1ecc9SSiva Rebbagondla #define RSI_BL_CTRL_START_FROM_ROM_PC BIT(29) 172e5a1ecc9SSiva Rebbagondla #define RSI_BL_CTRL_SPI_8BIT_MODE BIT(30) 173e5a1ecc9SSiva Rebbagondla #define RSI_BL_CTRL_LAST_ENTRY BIT(31) 174e5a1ecc9SSiva Rebbagondla struct bootload_entry { 175e5a1ecc9SSiva Rebbagondla __le32 control; 176e5a1ecc9SSiva Rebbagondla __le32 dst_addr; 177e5a1ecc9SSiva Rebbagondla } __packed; 178e5a1ecc9SSiva Rebbagondla 179e5a1ecc9SSiva Rebbagondla struct bootload_ds { 180e5a1ecc9SSiva Rebbagondla __le16 fixed_pattern; 181e5a1ecc9SSiva Rebbagondla __le16 offset; 182e5a1ecc9SSiva Rebbagondla __le32 reserved; 183e5a1ecc9SSiva Rebbagondla struct bootload_entry bl_entry[7]; 184e5a1ecc9SSiva Rebbagondla } __packed; 185e5a1ecc9SSiva Rebbagondla 186de2dea16SPavani Muthyala struct rsi_mgmt_desc { 187de2dea16SPavani Muthyala __le16 len_qno; 188de2dea16SPavani Muthyala u8 frame_type; 189de2dea16SPavani Muthyala u8 misc_flags; 1906507de6dSPrameela Rani Garnepudi u8 xtend_desc_size; 191de2dea16SPavani Muthyala u8 header_len; 1926507de6dSPrameela Rani Garnepudi __le16 frame_info; 1934671c209SPrameela Rani Garnepudi __le16 rate_info; 1946507de6dSPrameela Rani Garnepudi __le16 bbp_info; 195de2dea16SPavani Muthyala __le16 seq_ctrl; 1966507de6dSPrameela Rani Garnepudi u8 reserved2; 19719844c0aSPrameela Rani Garnepudi u8 sta_id; 198de2dea16SPavani Muthyala } __packed; 199de2dea16SPavani Muthyala 200af193097SPavani Muthyala struct rsi_data_desc { 201af193097SPavani Muthyala __le16 len_qno; 2020eb42586SPavani Muthyala u8 cfm_frame_type; 2030eb42586SPavani Muthyala u8 misc_flags; 204af193097SPavani Muthyala u8 xtend_desc_size; 205af193097SPavani Muthyala u8 header_len; 206af193097SPavani Muthyala __le16 frame_info; 207af193097SPavani Muthyala __le16 rate_info; 208af193097SPavani Muthyala __le16 bbp_info; 209af193097SPavani Muthyala __le16 mac_flags; 210af193097SPavani Muthyala u8 qid_tid; 211af193097SPavani Muthyala u8 sta_id; 212af193097SPavani Muthyala } __packed; 213af193097SPavani Muthyala 214716b840cSSiva Rebbagondla struct rsi_bt_desc { 215716b840cSSiva Rebbagondla __le16 len_qno; 216716b840cSSiva Rebbagondla __le16 reserved1; 217716b840cSSiva Rebbagondla __le32 reserved2; 218716b840cSSiva Rebbagondla __le32 reserved3; 219716b840cSSiva Rebbagondla __le16 reserved4; 220716b840cSSiva Rebbagondla __le16 bt_pkt_type; 221716b840cSSiva Rebbagondla } __packed; 222716b840cSSiva Rebbagondla 223b78e91bcSPrameela Rani Garnepudi int rsi_hal_device_init(struct rsi_hw *adapter); 2241be05eb5SPrameela Rani Garnepudi int rsi_prepare_mgmt_desc(struct rsi_common *common, struct sk_buff *skb); 2251be05eb5SPrameela Rani Garnepudi int rsi_prepare_data_desc(struct rsi_common *common, struct sk_buff *skb); 226d26a9559SPrameela Rani Garnepudi int rsi_prepare_beacon(struct rsi_common *common, struct sk_buff *skb); 227d26a9559SPrameela Rani Garnepudi int rsi_send_pkt_to_bus(struct rsi_common *common, struct sk_buff *skb); 228716b840cSSiva Rebbagondla int rsi_send_bt_pkt(struct rsi_common *common, struct sk_buff *skb); 229b78e91bcSPrameela Rani Garnepudi 230b78e91bcSPrameela Rani Garnepudi #endif 231