1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* 3 * Copyright (C) 2015-2017 Intel Deutschland GmbH 4 * Copyright (C) 2018-2025 Intel Corporation 5 */ 6 #include <linux/module.h> 7 #include <linux/stringify.h> 8 #include "iwl-config.h" 9 #include "iwl-prph.h" 10 #include "fw/api/txq.h" 11 12 /* Highest firmware API version supported */ 13 #define IWL_AX210_UCODE_API_MAX 89 14 15 /* Lowest firmware API version supported */ 16 #define IWL_AX210_UCODE_API_MIN 77 17 18 /* NVM versions */ 19 #define IWL_AX210_NVM_VERSION 0x0a1d 20 21 /* Memory offsets and lengths */ 22 #define IWL_AX210_DCCM_OFFSET 0x800000 /* LMAC1 */ 23 #define IWL_AX210_DCCM_LEN 0x10000 /* LMAC1 */ 24 #define IWL_AX210_DCCM2_OFFSET 0x880000 25 #define IWL_AX210_DCCM2_LEN 0x8000 26 #define IWL_AX210_SMEM_OFFSET 0x400000 27 #define IWL_AX210_SMEM_LEN 0xD0000 28 29 #define IWL_SO_A_JF_B_FW_PRE "iwlwifi-so-a0-jf-b0" 30 #define IWL_SO_A_HR_B_FW_PRE "iwlwifi-so-a0-hr-b0" 31 #define IWL_SO_A_GF_A_FW_PRE "iwlwifi-so-a0-gf-a0" 32 #define IWL_TY_A_GF_A_FW_PRE "iwlwifi-ty-a0-gf-a0" 33 #define IWL_SO_A_GF4_A_FW_PRE "iwlwifi-so-a0-gf4-a0" 34 #define IWL_MA_A_HR_B_FW_PRE "iwlwifi-ma-a0-hr-b0" 35 #define IWL_MA_A_GF_A_FW_PRE "iwlwifi-ma-a0-gf-a0" 36 #define IWL_MA_A_GF4_A_FW_PRE "iwlwifi-ma-a0-gf4-a0" 37 #define IWL_MA_B_HR_B_FW_PRE "iwlwifi-ma-b0-hr-b0" 38 #define IWL_MA_B_GF_A_FW_PRE "iwlwifi-ma-b0-gf-a0" 39 #define IWL_MA_B_GF4_A_FW_PRE "iwlwifi-ma-b0-gf4-a0" 40 41 #define IWL_SO_A_JF_B_MODULE_FIRMWARE(api) \ 42 IWL_SO_A_JF_B_FW_PRE "-" __stringify(api) ".ucode" 43 #define IWL_SO_A_HR_B_MODULE_FIRMWARE(api) \ 44 IWL_SO_A_HR_B_FW_PRE "-" __stringify(api) ".ucode" 45 #define IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(api) \ 46 IWL_MA_A_HR_B_FW_PRE "-" __stringify(api) ".ucode" 47 #define IWL_MA_B_HR_B_FW_MODULE_FIRMWARE(api) \ 48 IWL_MA_B_HR_B_FW_PRE "-" __stringify(api) ".ucode" 49 50 static const struct iwl_base_params iwl_ax210_base_params = { 51 .eeprom_size = OTP_LOW_IMAGE_SIZE_32K, 52 .num_of_queues = 512, 53 .max_tfd_queue_size = 65536, 54 .shadow_ram_support = true, 55 .led_compensation = 57, 56 .wd_timeout = IWL_LONG_WD_TIMEOUT, 57 .max_event_log_size = 512, 58 .shadow_reg_enable = true, 59 .pcie_l1_allowed = true, 60 }; 61 62 #define IWL_DEVICE_AX210_COMMON \ 63 .ucode_api_min = IWL_AX210_UCODE_API_MIN, \ 64 .led_mode = IWL_LED_RF_STATE, \ 65 .nvm_hw_section_num = 10, \ 66 .non_shared_ant = ANT_B, \ 67 .dccm_offset = IWL_AX210_DCCM_OFFSET, \ 68 .dccm_len = IWL_AX210_DCCM_LEN, \ 69 .dccm2_offset = IWL_AX210_DCCM2_OFFSET, \ 70 .dccm2_len = IWL_AX210_DCCM2_LEN, \ 71 .smem_offset = IWL_AX210_SMEM_OFFSET, \ 72 .smem_len = IWL_AX210_SMEM_LEN, \ 73 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \ 74 .apmg_not_supported = true, \ 75 .vht_mu_mimo_supported = true, \ 76 .mac_addr_from_csr = 0x380, \ 77 .ht_params = &iwl_22000_ht_params, \ 78 .nvm_ver = IWL_AX210_NVM_VERSION, \ 79 .nvm_type = IWL_NVM_EXT, \ 80 .dbgc_supported = true, \ 81 .min_umac_error_event_table = 0x400000, \ 82 .d3_debug_data_base_addr = 0x401000, \ 83 .d3_debug_data_length = 60 * 1024, \ 84 .mon_smem_regs = { \ 85 .write_ptr = { \ 86 .addr = LDBG_M2S_BUF_WPTR, \ 87 .mask = LDBG_M2S_BUF_WPTR_VAL_MSK, \ 88 }, \ 89 .cycle_cnt = { \ 90 .addr = LDBG_M2S_BUF_WRAP_CNT, \ 91 .mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK, \ 92 }, \ 93 } 94 95 #define IWL_DEVICE_AX210 \ 96 IWL_DEVICE_AX210_COMMON, \ 97 .ucode_api_max = IWL_AX210_UCODE_API_MAX, \ 98 .min_txq_size = 128, \ 99 .gp2_reg_addr = 0xd02c68, \ 100 .min_ba_txq_size = IWL_DEFAULT_QUEUE_SIZE_HE, \ 101 .mon_dram_regs = { \ 102 .write_ptr = { \ 103 .addr = DBGC_CUR_DBGBUF_STATUS, \ 104 .mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK, \ 105 }, \ 106 .cycle_cnt = { \ 107 .addr = DBGC_DBGBUF_WRAP_AROUND, \ 108 .mask = 0xffffffff, \ 109 }, \ 110 .cur_frag = { \ 111 .addr = DBGC_CUR_DBGBUF_STATUS, \ 112 .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \ 113 }, \ 114 } 115 116 const struct iwl_cfg_trans_params iwl_so_trans_cfg = { 117 .mq_rx_supported = true, 118 .rf_id = true, 119 .gen2 = true, 120 .device_family = IWL_DEVICE_FAMILY_AX210, 121 .base_params = &iwl_ax210_base_params, 122 .umac_prph_offset = 0x300000, 123 .integrated = true, 124 /* TODO: the following values need to be checked */ 125 .xtal_latency = 500, 126 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_200US, 127 }; 128 129 const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg = { 130 .mq_rx_supported = true, 131 .rf_id = true, 132 .gen2 = true, 133 .device_family = IWL_DEVICE_FAMILY_AX210, 134 .base_params = &iwl_ax210_base_params, 135 .umac_prph_offset = 0x300000, 136 .integrated = true, 137 .low_latency_xtal = true, 138 .xtal_latency = 12000, 139 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 140 }; 141 142 const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg = { 143 .mq_rx_supported = true, 144 .rf_id = true, 145 .gen2 = true, 146 .device_family = IWL_DEVICE_FAMILY_AX210, 147 .base_params = &iwl_ax210_base_params, 148 .umac_prph_offset = 0x300000, 149 .integrated = true, 150 .low_latency_xtal = true, 151 .xtal_latency = 12000, 152 .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, 153 .imr_enabled = true, 154 }; 155 156 /* 157 * If the device doesn't support HE, no need to have that many buffers. 158 * AX210 devices can split multiple frames into a single RB, so fewer are 159 * needed; AX210 cannot (but use smaller RBs by default) - these sizes 160 * were picked according to 8 MSDUs inside 256 A-MSDUs in an A-MPDU, with 161 * additional overhead to account for processing time. 162 */ 163 #define IWL_NUM_RBDS_NON_HE 512 164 #define IWL_NUM_RBDS_AX210_HE 4096 165 166 const struct iwl_cfg_trans_params iwl_ma_trans_cfg = { 167 .device_family = IWL_DEVICE_FAMILY_AX210, 168 .base_params = &iwl_ax210_base_params, 169 .mq_rx_supported = true, 170 .rf_id = true, 171 .gen2 = true, 172 .integrated = true, 173 .umac_prph_offset = 0x300000 174 }; 175 176 const char iwl_ax211_name[] = "Intel(R) Wi-Fi 6E AX211 160MHz"; 177 const char iwl_ax231_name[] = "Intel(R) Wi-Fi 6E AX231 160MHz"; 178 const char iwl_ax411_name[] = "Intel(R) Wi-Fi 6E AX411 160MHz"; 179 180 const char iwl_ax210_killer_1675w_name[] = 181 "Killer(R) Wi-Fi 6E AX1675w 160MHz Wireless Network Adapter (210D2W)"; 182 const char iwl_ax210_killer_1675x_name[] = 183 "Killer(R) Wi-Fi 6E AX1675x 160MHz Wireless Network Adapter (210NGW)"; 184 const char iwl_ax211_killer_1675s_name[] = 185 "Killer(R) Wi-Fi 6E AX1675s 160MHz Wireless Network Adapter (211NGW)"; 186 const char iwl_ax211_killer_1675i_name[] = 187 "Killer(R) Wi-Fi 6E AX1675i 160MHz Wireless Network Adapter (211NGW)"; 188 const char iwl_ax411_killer_1690s_name[] = 189 "Killer(R) Wi-Fi 6E AX1690s 160MHz Wireless Network Adapter (411D2W)"; 190 const char iwl_ax411_killer_1690i_name[] = 191 "Killer(R) Wi-Fi 6E AX1690i 160MHz Wireless Network Adapter (411NGW)"; 192 193 const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0 = { 194 .fw_name_pre = IWL_SO_A_JF_B_FW_PRE, 195 IWL_DEVICE_AX210, 196 .num_rbds = IWL_NUM_RBDS_NON_HE, 197 }; 198 199 const struct iwl_cfg iwlax210_2ax_cfg_so_jf_b0_80mhz = { 200 .fw_name_pre = IWL_SO_A_JF_B_FW_PRE, 201 IWL_DEVICE_AX210, 202 .num_rbds = IWL_NUM_RBDS_NON_HE, 203 .bw_limit = 80, 204 }; 205 206 const struct iwl_cfg iwlax211_2ax_cfg_so_gf_a0 = { 207 .fw_name_pre = IWL_SO_A_GF_A_FW_PRE, 208 .uhb_supported = true, 209 IWL_DEVICE_AX210, 210 .num_rbds = IWL_NUM_RBDS_AX210_HE, 211 }; 212 213 const char iwl_ax210_name[] = "Intel(R) Wi-Fi 6 AX210 160MHz"; 214 215 const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = { 216 .fw_name_pre = IWL_TY_A_GF_A_FW_PRE, 217 .uhb_supported = true, 218 IWL_DEVICE_AX210, 219 .num_rbds = IWL_NUM_RBDS_AX210_HE, 220 }; 221 222 const struct iwl_cfg iwlax411_2ax_cfg_so_gf4_a0 = { 223 .fw_name_pre = IWL_SO_A_GF4_A_FW_PRE, 224 .uhb_supported = true, 225 IWL_DEVICE_AX210, 226 .num_rbds = IWL_NUM_RBDS_AX210_HE, 227 }; 228 229 const struct iwl_cfg iwl_cfg_ma = { 230 .uhb_supported = true, 231 IWL_DEVICE_AX210, 232 .num_rbds = IWL_NUM_RBDS_AX210_HE, 233 }; 234 235 const struct iwl_cfg iwl_cfg_so_a0_hr_a0 = { 236 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 237 IWL_DEVICE_AX210, 238 .num_rbds = IWL_NUM_RBDS_AX210_HE, 239 }; 240 241 const struct iwl_cfg iwl_cfg_so_a0_hr_a0_80mhz = { 242 .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, 243 IWL_DEVICE_AX210, 244 .num_rbds = IWL_NUM_RBDS_AX210_HE, 245 .bw_limit = 80, 246 }; 247 248 MODULE_FIRMWARE(IWL_SO_A_JF_B_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX)); 249 MODULE_FIRMWARE(IWL_SO_A_HR_B_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX)); 250 IWL_FW_AND_PNVM(IWL_SO_A_GF_A_FW_PRE, IWL_AX210_UCODE_API_MAX); 251 IWL_FW_AND_PNVM(IWL_TY_A_GF_A_FW_PRE, IWL_AX210_UCODE_API_MAX); 252 MODULE_FIRMWARE(IWL_MA_A_HR_B_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX)); 253 IWL_FW_AND_PNVM(IWL_MA_A_GF_A_FW_PRE, IWL_AX210_UCODE_API_MAX); 254 IWL_FW_AND_PNVM(IWL_MA_A_GF4_A_FW_PRE, IWL_AX210_UCODE_API_MAX); 255 MODULE_FIRMWARE(IWL_MA_B_HR_B_FW_MODULE_FIRMWARE(IWL_AX210_UCODE_API_MAX)); 256 IWL_FW_AND_PNVM(IWL_MA_B_GF_A_FW_PRE, IWL_AX210_UCODE_API_MAX); 257 IWL_FW_AND_PNVM(IWL_MA_B_GF4_A_FW_PRE, IWL_AX210_UCODE_API_MAX); 258