1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (c) 2010 Broadcom Corporation 4 */ 5 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 8 #include <linux/kernel.h> 9 #include <linux/delay.h> 10 #include <linux/cordic.h> 11 12 #include <brcm_hw_ids.h> 13 #include <aiutils.h> 14 #include <chipcommon.h> 15 #include <pmu.h> 16 #include <d11.h> 17 #include <phy_shim.h> 18 #include "phy_int.h" 19 #include "phy_hal.h" 20 #include "phy_radio.h" 21 #include "phyreg_n.h" 22 #include "phytbl_n.h" 23 #include "soc.h" 24 25 #define READ_RADIO_REG2(pi, radio_type, jspace, core, reg_name) \ 26 read_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ 27 ((core == PHY_CORE_0) ? \ 28 radio_type##_##jspace##0 : \ 29 radio_type##_##jspace##1)) 30 31 #define WRITE_RADIO_REG2(pi, radio_type, jspace, core, reg_name, value) \ 32 write_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ 33 ((core == PHY_CORE_0) ? \ 34 radio_type##_##jspace##0 : \ 35 radio_type##_##jspace##1), value) 36 37 #define WRITE_RADIO_SYN(pi, radio_type, reg_name, value) \ 38 write_radio_reg(pi, radio_type##_##SYN##_##reg_name, value) 39 40 #define READ_RADIO_REG3(pi, radio_type, jspace, core, reg_name) \ 41 read_radio_reg(pi, ((core == PHY_CORE_0) ? \ 42 radio_type##_##jspace##0##_##reg_name : \ 43 radio_type##_##jspace##1##_##reg_name)) 44 45 #define WRITE_RADIO_REG3(pi, radio_type, jspace, core, reg_name, value) \ 46 write_radio_reg(pi, ((core == PHY_CORE_0) ? \ 47 radio_type##_##jspace##0##_##reg_name : \ 48 radio_type##_##jspace##1##_##reg_name), \ 49 value) 50 51 #define READ_RADIO_REG4(pi, radio_type, jspace, core, reg_name) \ 52 read_radio_reg(pi, ((core == PHY_CORE_0) ? \ 53 radio_type##_##reg_name##_##jspace##0 : \ 54 radio_type##_##reg_name##_##jspace##1)) 55 56 #define WRITE_RADIO_REG4(pi, radio_type, jspace, core, reg_name, value) \ 57 write_radio_reg(pi, ((core == PHY_CORE_0) ? \ 58 radio_type##_##reg_name##_##jspace##0 : \ 59 radio_type##_##reg_name##_##jspace##1), \ 60 value) 61 62 #define NPHY_ACI_MAX_UNDETECT_WINDOW_SZ 40 63 #define NPHY_ACI_CHANNEL_DELTA 5 64 #define NPHY_ACI_CHANNEL_SKIP 4 65 #define NPHY_ACI_40MHZ_CHANNEL_DELTA 6 66 #define NPHY_ACI_40MHZ_CHANNEL_SKIP 5 67 #define NPHY_ACI_40MHZ_CHANNEL_DELTA_GE_REV3 6 68 #define NPHY_ACI_40MHZ_CHANNEL_SKIP_GE_REV3 5 69 #define NPHY_ACI_CHANNEL_DELTA_GE_REV3 4 70 #define NPHY_ACI_CHANNEL_SKIP_GE_REV3 3 71 72 #define NPHY_NOISE_NOASSOC_GLITCH_TH_UP 2 73 74 #define NPHY_NOISE_NOASSOC_GLITCH_TH_DN 8 75 76 #define NPHY_NOISE_ASSOC_GLITCH_TH_UP 2 77 78 #define NPHY_NOISE_ASSOC_GLITCH_TH_DN 8 79 80 #define NPHY_NOISE_ASSOC_ACI_GLITCH_TH_UP 2 81 82 #define NPHY_NOISE_ASSOC_ACI_GLITCH_TH_DN 8 83 84 #define NPHY_NOISE_NOASSOC_ENTER_TH 400 85 86 #define NPHY_NOISE_ASSOC_ENTER_TH 400 87 88 #define NPHY_NOISE_ASSOC_RX_GLITCH_BADPLCP_ENTER_TH 400 89 90 #define NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX 44 91 #define NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX_REV_7 56 92 93 #define NPHY_NOISE_NOASSOC_CRSIDX_INCR 16 94 95 #define NPHY_NOISE_ASSOC_CRSIDX_INCR 8 96 97 #define NPHY_IS_SROM_REINTERPRET NREV_GE(pi->pubpi.phy_rev, 5) 98 99 #define NPHY_RSSICAL_MAXREAD 31 100 101 #define NPHY_RSSICAL_NPOLL 8 102 #define NPHY_RSSICAL_MAXD (1<<20) 103 #define NPHY_MIN_RXIQ_PWR 2 104 105 #define NPHY_RSSICAL_W1_TARGET 25 106 #define NPHY_RSSICAL_W2_TARGET NPHY_RSSICAL_W1_TARGET 107 #define NPHY_RSSICAL_NB_TARGET 0 108 109 #define NPHY_RSSICAL_W1_TARGET_REV3 29 110 #define NPHY_RSSICAL_W2_TARGET_REV3 NPHY_RSSICAL_W1_TARGET_REV3 111 112 #define NPHY_CALSANITY_RSSI_NB_MAX_POS 9 113 #define NPHY_CALSANITY_RSSI_NB_MAX_NEG -9 114 #define NPHY_CALSANITY_RSSI_W1_MAX_POS 12 115 #define NPHY_CALSANITY_RSSI_W1_MAX_NEG (NPHY_RSSICAL_W1_TARGET - \ 116 NPHY_RSSICAL_MAXREAD) 117 #define NPHY_CALSANITY_RSSI_W2_MAX_POS NPHY_CALSANITY_RSSI_W1_MAX_POS 118 #define NPHY_CALSANITY_RSSI_W2_MAX_NEG (NPHY_RSSICAL_W2_TARGET - \ 119 NPHY_RSSICAL_MAXREAD) 120 #define NPHY_RSSI_SXT(x) ((s8) (-((x) & 0x20) + ((x) & 0x1f))) 121 #define NPHY_RSSI_NB_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_NB_MAX_POS) || \ 122 ((x) < NPHY_CALSANITY_RSSI_NB_MAX_NEG)) 123 #define NPHY_RSSI_W1_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W1_MAX_POS) || \ 124 ((x) < NPHY_CALSANITY_RSSI_W1_MAX_NEG)) 125 #define NPHY_RSSI_W2_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W2_MAX_POS) || \ 126 ((x) < NPHY_CALSANITY_RSSI_W2_MAX_NEG)) 127 128 #define NPHY_IQCAL_NUMGAINS 9 129 #define NPHY_N_GCTL 0x66 130 131 #define NPHY_PAPD_EPS_TBL_SIZE 64 132 #define NPHY_PAPD_SCL_TBL_SIZE 64 133 #define NPHY_NUM_DIG_FILT_COEFFS 15 134 135 #define NPHY_PAPD_COMP_OFF 0 136 #define NPHY_PAPD_COMP_ON 1 137 138 #define NPHY_SROM_TEMPSHIFT 32 139 #define NPHY_SROM_MAXTEMPOFFSET 16 140 #define NPHY_SROM_MINTEMPOFFSET -16 141 142 #define NPHY_CAL_MAXTEMPDELTA 64 143 144 #define NPHY_NOISEVAR_TBLLEN40 256 145 #define NPHY_NOISEVAR_TBLLEN20 128 146 147 #define NPHY_ANARXLPFBW_REDUCTIONFACT 7 148 149 #define NPHY_ADJUSTED_MINCRSPOWER 0x1e 150 151 /* 5357 Chip specific ChipControl register bits */ 152 #define CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */ 153 #define CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */ 154 155 #define NPHY_CAL_TSSISAMPS 64 156 #define NPHY_TEST_TONE_FREQ_40MHz 4000 157 #define NPHY_TEST_TONE_FREQ_20MHz 2500 158 159 #define MAX_205x_RCAL_WAITLOOPS 10000 160 161 #define NPHY_RXCAL_TONEAMP 181 162 #define NPHY_RXCAL_TONEFREQ_40MHz 4000 163 #define NPHY_RXCAL_TONEFREQ_20MHz 2000 164 165 #define TXFILT_SHAPING_OFDM20 0 166 #define TXFILT_SHAPING_OFDM40 1 167 #define TXFILT_SHAPING_CCK 2 168 #define TXFILT_DEFAULT_OFDM20 3 169 #define TXFILT_DEFAULT_OFDM40 4 170 171 struct nphy_iqcal_params { 172 u16 txlpf; 173 u16 txgm; 174 u16 pga; 175 u16 pad; 176 u16 ipa; 177 u16 cal_gain; 178 u16 ncorr[5]; 179 }; 180 181 struct nphy_txiqcal_ladder { 182 u8 percent; 183 u8 g_env; 184 }; 185 186 struct nphy_ipa_txcalgains { 187 struct nphy_txgains gains; 188 bool useindex; 189 u8 index; 190 }; 191 192 struct nphy_papd_restore_state { 193 u16 fbmix[2]; 194 u16 vga_master[2]; 195 u16 intpa_master[2]; 196 u16 afectrl[2]; 197 u16 afeoverride[2]; 198 u16 pwrup[2]; 199 u16 atten[2]; 200 u16 mm; 201 }; 202 203 struct nphy_ipa_txrxgain { 204 u16 hpvga; 205 u16 lpf_biq1; 206 u16 lpf_biq0; 207 u16 lna2; 208 u16 lna1; 209 s8 txpwrindex; 210 }; 211 212 #define NPHY_IPA_RXCAL_MAXGAININDEX (6 - 1) 213 214 static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_5GHz[] = { 215 {0, 0, 0, 0, 0, 100}, 216 {0, 0, 0, 0, 0, 50}, 217 {0, 0, 0, 0, 0, -1}, 218 {0, 0, 0, 3, 0, -1}, 219 {0, 0, 3, 3, 0, -1}, 220 {0, 2, 3, 3, 0, -1} 221 }; 222 223 static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_2GHz[] = { 224 {0, 0, 0, 0, 0, 128}, 225 {0, 0, 0, 0, 0, 70}, 226 {0, 0, 0, 0, 0, 20}, 227 {0, 0, 0, 3, 0, 20}, 228 {0, 0, 3, 3, 0, 20}, 229 {0, 2, 3, 3, 0, 20} 230 }; 231 232 static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_5GHz_rev7[] = { 233 {0, 0, 0, 0, 0, 100}, 234 {0, 0, 0, 0, 0, 50}, 235 {0, 0, 0, 0, 0, -1}, 236 {0, 0, 0, 3, 0, -1}, 237 {0, 0, 3, 3, 0, -1}, 238 {0, 0, 5, 3, 0, -1} 239 }; 240 241 static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_2GHz_rev7[] = { 242 {0, 0, 0, 0, 0, 10}, 243 {0, 0, 0, 1, 0, 10}, 244 {0, 0, 1, 2, 0, 10}, 245 {0, 0, 1, 3, 0, 10}, 246 {0, 0, 4, 3, 0, 10}, 247 {0, 0, 6, 3, 0, 10} 248 }; 249 250 enum { 251 NPHY_RXCAL_GAIN_INIT = 0, 252 NPHY_RXCAL_GAIN_UP, 253 NPHY_RXCAL_GAIN_DOWN 254 }; 255 256 #define wlc_phy_get_papd_nphy(pi) \ 257 (read_phy_reg((pi), 0x1e7) & \ 258 ((0x1 << 15) | \ 259 (0x1 << 14) | \ 260 (0x1 << 13))) 261 262 static const u16 NPHY_IPA_REV4_txdigi_filtcoeffs[][NPHY_NUM_DIG_FILT_COEFFS] = { 263 {-377, 137, -407, 208, -1527, 956, 93, 186, 93, 264 230, -44, 230, 201, -191, 201}, 265 {-77, 20, -98, 49, -93, 60, 56, 111, 56, 26, -5, 266 26, 34, -32, 34}, 267 {-360, 164, -376, 164, -1533, 576, 308, -314, 308, 268 121, -73, 121, 91, 124, 91}, 269 {-295, 200, -363, 142, -1391, 826, 151, 301, 151, 270 151, 301, 151, 602, -752, 602}, 271 {-92, 58, -96, 49, -104, 44, 17, 35, 17, 272 12, 25, 12, 13, 27, 13}, 273 {-375, 136, -399, 209, -1479, 949, 130, 260, 130, 274 230, -44, 230, 201, -191, 201}, 275 {0xed9, 0xc8, 0xe95, 0x8e, 0xa91, 0x33a, 0x97, 0x12d, 0x97, 276 0x97, 0x12d, 0x97, 0x25a, 0xd10, 0x25a} 277 }; 278 279 struct chan_info_nphy_2055 { 280 u16 chan; 281 u16 freq; 282 uint unknown; 283 u8 RF_pll_ref; 284 u8 RF_rf_pll_mod1; 285 u8 RF_rf_pll_mod0; 286 u8 RF_vco_cap_tail; 287 u8 RF_vco_cal1; 288 u8 RF_vco_cal2; 289 u8 RF_pll_lf_c1; 290 u8 RF_pll_lf_r1; 291 u8 RF_pll_lf_c2; 292 u8 RF_lgbuf_cen_buf; 293 u8 RF_lgen_tune1; 294 u8 RF_lgen_tune2; 295 u8 RF_core1_lgbuf_a_tune; 296 u8 RF_core1_lgbuf_g_tune; 297 u8 RF_core1_rxrf_reg1; 298 u8 RF_core1_tx_pga_pad_tn; 299 u8 RF_core1_tx_mx_bgtrim; 300 u8 RF_core2_lgbuf_a_tune; 301 u8 RF_core2_lgbuf_g_tune; 302 u8 RF_core2_rxrf_reg1; 303 u8 RF_core2_tx_pga_pad_tn; 304 u8 RF_core2_tx_mx_bgtrim; 305 u16 PHY_BW1a; 306 u16 PHY_BW2; 307 u16 PHY_BW3; 308 u16 PHY_BW4; 309 u16 PHY_BW5; 310 u16 PHY_BW6; 311 }; 312 313 struct chan_info_nphy_radio205x { 314 u16 chan; 315 u16 freq; 316 u8 RF_SYN_pll_vcocal1; 317 u8 RF_SYN_pll_vcocal2; 318 u8 RF_SYN_pll_refdiv; 319 u8 RF_SYN_pll_mmd2; 320 u8 RF_SYN_pll_mmd1; 321 u8 RF_SYN_pll_loopfilter1; 322 u8 RF_SYN_pll_loopfilter2; 323 u8 RF_SYN_pll_loopfilter3; 324 u8 RF_SYN_pll_loopfilter4; 325 u8 RF_SYN_pll_loopfilter5; 326 u8 RF_SYN_reserved_addr27; 327 u8 RF_SYN_reserved_addr28; 328 u8 RF_SYN_reserved_addr29; 329 u8 RF_SYN_logen_VCOBUF1; 330 u8 RF_SYN_logen_MIXER2; 331 u8 RF_SYN_logen_BUF3; 332 u8 RF_SYN_logen_BUF4; 333 u8 RF_RX0_lnaa_tune; 334 u8 RF_RX0_lnag_tune; 335 u8 RF_TX0_intpaa_boost_tune; 336 u8 RF_TX0_intpag_boost_tune; 337 u8 RF_TX0_pada_boost_tune; 338 u8 RF_TX0_padg_boost_tune; 339 u8 RF_TX0_pgaa_boost_tune; 340 u8 RF_TX0_pgag_boost_tune; 341 u8 RF_TX0_mixa_boost_tune; 342 u8 RF_TX0_mixg_boost_tune; 343 u8 RF_RX1_lnaa_tune; 344 u8 RF_RX1_lnag_tune; 345 u8 RF_TX1_intpaa_boost_tune; 346 u8 RF_TX1_intpag_boost_tune; 347 u8 RF_TX1_pada_boost_tune; 348 u8 RF_TX1_padg_boost_tune; 349 u8 RF_TX1_pgaa_boost_tune; 350 u8 RF_TX1_pgag_boost_tune; 351 u8 RF_TX1_mixa_boost_tune; 352 u8 RF_TX1_mixg_boost_tune; 353 u16 PHY_BW1a; 354 u16 PHY_BW2; 355 u16 PHY_BW3; 356 u16 PHY_BW4; 357 u16 PHY_BW5; 358 u16 PHY_BW6; 359 }; 360 361 struct chan_info_nphy_radio2057 { 362 u16 chan; 363 u16 freq; 364 u8 RF_vcocal_countval0; 365 u8 RF_vcocal_countval1; 366 u8 RF_rfpll_refmaster_sparextalsize; 367 u8 RF_rfpll_loopfilter_r1; 368 u8 RF_rfpll_loopfilter_c2; 369 u8 RF_rfpll_loopfilter_c1; 370 u8 RF_cp_kpd_idac; 371 u8 RF_rfpll_mmd0; 372 u8 RF_rfpll_mmd1; 373 u8 RF_vcobuf_tune; 374 u8 RF_logen_mx2g_tune; 375 u8 RF_logen_mx5g_tune; 376 u8 RF_logen_indbuf2g_tune; 377 u8 RF_logen_indbuf5g_tune; 378 u8 RF_txmix2g_tune_boost_pu_core0; 379 u8 RF_pad2g_tune_pus_core0; 380 u8 RF_pga_boost_tune_core0; 381 u8 RF_txmix5g_boost_tune_core0; 382 u8 RF_pad5g_tune_misc_pus_core0; 383 u8 RF_lna2g_tune_core0; 384 u8 RF_lna5g_tune_core0; 385 u8 RF_txmix2g_tune_boost_pu_core1; 386 u8 RF_pad2g_tune_pus_core1; 387 u8 RF_pga_boost_tune_core1; 388 u8 RF_txmix5g_boost_tune_core1; 389 u8 RF_pad5g_tune_misc_pus_core1; 390 u8 RF_lna2g_tune_core1; 391 u8 RF_lna5g_tune_core1; 392 u16 PHY_BW1a; 393 u16 PHY_BW2; 394 u16 PHY_BW3; 395 u16 PHY_BW4; 396 u16 PHY_BW5; 397 u16 PHY_BW6; 398 }; 399 400 struct chan_info_nphy_radio2057_rev5 { 401 u16 chan; 402 u16 freq; 403 u8 RF_vcocal_countval0; 404 u8 RF_vcocal_countval1; 405 u8 RF_rfpll_refmaster_sparextalsize; 406 u8 RF_rfpll_loopfilter_r1; 407 u8 RF_rfpll_loopfilter_c2; 408 u8 RF_rfpll_loopfilter_c1; 409 u8 RF_cp_kpd_idac; 410 u8 RF_rfpll_mmd0; 411 u8 RF_rfpll_mmd1; 412 u8 RF_vcobuf_tune; 413 u8 RF_logen_mx2g_tune; 414 u8 RF_logen_indbuf2g_tune; 415 u8 RF_txmix2g_tune_boost_pu_core0; 416 u8 RF_pad2g_tune_pus_core0; 417 u8 RF_lna2g_tune_core0; 418 u8 RF_txmix2g_tune_boost_pu_core1; 419 u8 RF_pad2g_tune_pus_core1; 420 u8 RF_lna2g_tune_core1; 421 u16 PHY_BW1a; 422 u16 PHY_BW2; 423 u16 PHY_BW3; 424 u16 PHY_BW4; 425 u16 PHY_BW5; 426 u16 PHY_BW6; 427 }; 428 429 struct nphy_sfo_cfg { 430 u16 PHY_BW1a; 431 u16 PHY_BW2; 432 u16 PHY_BW3; 433 u16 PHY_BW4; 434 u16 PHY_BW5; 435 u16 PHY_BW6; 436 }; 437 438 static const struct chan_info_nphy_2055 chan_info_nphy_2055[] = { 439 { 440 184, 4920, 3280, 0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 441 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 442 0x0F, 0x8F, 0x7B4, 0x7B0, 0x7AC, 0x214, 0x215, 0x216}, 443 { 444 186, 4930, 3287, 0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 445 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 446 0x0F, 0x8F, 0x7B8, 0x7B4, 0x7B0, 0x213, 0x214, 0x215}, 447 { 448 188, 4940, 3293, 0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 449 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 450 0x0F, 0x8F, 0x7BC, 0x7B8, 0x7B4, 0x212, 0x213, 0x214}, 451 { 452 190, 4950, 3300, 0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 453 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 454 0x0F, 0x8F, 0x7C0, 0x7BC, 0x7B8, 0x211, 0x212, 0x213}, 455 { 456 192, 4960, 3307, 0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 457 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 458 0x0F, 0x8F, 0x7C4, 0x7C0, 0x7BC, 0x20F, 0x211, 0x212}, 459 { 460 194, 4970, 3313, 0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 461 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 462 0x0F, 0x8F, 0x7C8, 0x7C4, 0x7C0, 0x20E, 0x20F, 0x211}, 463 { 464 196, 4980, 3320, 0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 465 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 466 0x0F, 0x8F, 0x7CC, 0x7C8, 0x7C4, 0x20D, 0x20E, 0x20F}, 467 { 468 198, 4990, 3327, 0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 469 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 470 0x0F, 0x8F, 0x7D0, 0x7CC, 0x7C8, 0x20C, 0x20D, 0x20E}, 471 { 472 200, 5000, 3333, 0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 473 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 474 0x0F, 0x8F, 0x7D4, 0x7D0, 0x7CC, 0x20B, 0x20C, 0x20D}, 475 { 476 202, 5010, 3340, 0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 477 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 478 0x0F, 0x8F, 0x7D8, 0x7D4, 0x7D0, 0x20A, 0x20B, 0x20C}, 479 { 480 204, 5020, 3347, 0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A, 481 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 482 0x0F, 0x8F, 0x7DC, 0x7D8, 0x7D4, 0x209, 0x20A, 0x20B}, 483 { 484 206, 5030, 3353, 0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A, 485 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 486 0x0F, 0x8F, 0x7E0, 0x7DC, 0x7D8, 0x208, 0x209, 0x20A}, 487 { 488 208, 5040, 3360, 0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A, 489 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 490 0x0F, 0x8F, 0x7E4, 0x7E0, 0x7DC, 0x207, 0x208, 0x209}, 491 { 492 210, 5050, 3367, 0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A, 493 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 494 0x0F, 0x8F, 0x7E8, 0x7E4, 0x7E0, 0x206, 0x207, 0x208}, 495 { 496 212, 5060, 3373, 0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A, 497 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x8E, 0xFF, 0x00, 0x0E, 498 0x0F, 0x8E, 0x7EC, 0x7E8, 0x7E4, 0x205, 0x206, 0x207}, 499 { 500 214, 5070, 3380, 0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A, 501 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x8E, 0xFF, 0x00, 0x0E, 502 0x0F, 0x8E, 0x7F0, 0x7EC, 0x7E8, 0x204, 0x205, 0x206}, 503 { 504 216, 5080, 3387, 0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A, 505 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, 0x8D, 0xEE, 0x00, 0x0E, 506 0x0F, 0x8D, 0x7F4, 0x7F0, 0x7EC, 0x203, 0x204, 0x205}, 507 { 508 218, 5090, 3393, 0x71, 0x01, 0xFD, 0x0D, 0xDE, 0x01, 0x04, 0x0A, 509 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, 0x8D, 0xEE, 0x00, 0x0E, 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0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 854 0x00, 0x80, 0x928, 0x924, 0x920, 0x1BF, 0x1C0, 0x1C1}, 855 { 856 172, 5860, 3907, 0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A, 857 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 858 0x00, 0x80, 0x92C, 0x928, 0x924, 0x1BF, 0x1BF, 0x1C0}, 859 { 860 174, 5870, 3913, 0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A, 861 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 862 0x00, 0x80, 0x930, 0x92C, 0x928, 0x1BE, 0x1BF, 0x1BF}, 863 { 864 176, 5880, 3920, 0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A, 865 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 866 0x00, 0x80, 0x934, 0x930, 0x92C, 0x1BD, 0x1BE, 0x1BF}, 867 { 868 178, 5890, 3927, 0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A, 869 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 870 0x00, 0x80, 0x938, 0x934, 0x930, 0x1BC, 0x1BD, 0x1BE}, 871 { 872 180, 5900, 3933, 0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A, 873 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 874 0x00, 0x80, 0x93C, 0x938, 0x934, 0x1BC, 0x1BC, 0x1BD}, 875 { 876 182, 5910, 3940, 0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A, 877 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 878 0x00, 0x80, 0x940, 0x93C, 0x938, 0x1BB, 0x1BC, 0x1BC}, 879 { 880 1, 2412, 3216, 0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15, 881 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C, 0x80, 0xFF, 0x88, 0x0D, 882 0x0C, 0x80, 0x3C9, 0x3C5, 0x3C1, 0x43A, 0x43F, 0x443}, 883 { 884 2, 2417, 3223, 0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15, 885 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B, 0x80, 0xFF, 0x88, 0x0C, 886 0x0B, 0x80, 0x3CB, 0x3C7, 0x3C3, 0x438, 0x43D, 0x441}, 887 { 888 3, 2422, 3229, 0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15, 889 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x80, 0xFF, 0x88, 0x0C, 890 0x0A, 0x80, 0x3CD, 0x3C9, 0x3C5, 0x436, 0x43A, 0x43F}, 891 { 892 4, 2427, 3236, 0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15, 893 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x80, 0xFF, 0x88, 0x0C, 894 0x0A, 0x80, 0x3CF, 0x3CB, 0x3C7, 0x434, 0x438, 0x43D}, 895 { 896 5, 2432, 3243, 0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15, 897 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09, 0x80, 0xFF, 0x88, 0x0C, 898 0x09, 0x80, 0x3D1, 0x3CD, 0x3C9, 0x431, 0x436, 0x43A}, 899 { 900 6, 2437, 3249, 0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15, 901 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08, 0x80, 0xFF, 0x88, 0x0B, 902 0x08, 0x80, 0x3D3, 0x3CF, 0x3CB, 0x42F, 0x434, 0x438}, 903 { 904 7, 2442, 3256, 0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15, 905 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07, 0x80, 0xFF, 0x88, 0x0A, 906 0x07, 0x80, 0x3D5, 0x3D1, 0x3CD, 0x42D, 0x431, 0x436}, 907 { 908 8, 2447, 3263, 0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15, 909 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06, 0x80, 0xFF, 0x88, 0x0A, 910 0x06, 0x80, 0x3D7, 0x3D3, 0x3CF, 0x42B, 0x42F, 0x434}, 911 { 912 9, 2452, 3269, 0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15, 913 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06, 0x80, 0xFF, 0x88, 0x09, 914 0x06, 0x80, 0x3D9, 0x3D5, 0x3D1, 0x429, 0x42D, 0x431}, 915 { 916 10, 2457, 3276, 0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15, 917 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05, 0x80, 0xFF, 0x88, 0x08, 918 0x05, 0x80, 0x3DB, 0x3D7, 0x3D3, 0x427, 0x42B, 0x42F}, 919 { 920 11, 2462, 3283, 0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15, 921 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04, 0x80, 0xFF, 0x88, 0x08, 922 0x04, 0x80, 0x3DD, 0x3D9, 0x3D5, 0x424, 0x429, 0x42D}, 923 { 924 12, 2467, 3289, 0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15, 925 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03, 0x80, 0xFF, 0x88, 0x08, 926 0x03, 0x80, 0x3DF, 0x3DB, 0x3D7, 0x422, 0x427, 0x42B}, 927 { 928 13, 2472, 3296, 0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15, 929 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03, 0x80, 0xFF, 0x88, 0x07, 930 0x03, 0x80, 0x3E1, 0x3DD, 0x3D9, 0x420, 0x424, 0x429}, 931 { 932 14, 2484, 3312, 0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15, 933 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01, 0x80, 0xFF, 0x88, 0x07, 934 0x01, 0x80, 0x3E6, 0x3E2, 0x3DE, 0x41B, 0x41F, 0x424} 935 }; 936 937 static const struct chan_info_nphy_radio205x chan_info_nphyrev3_2056[] = { 938 { 939 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 940 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 941 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 942 0x00, 0xff, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 943 { 944 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 945 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 946 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 947 0x00, 0xff, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 948 { 949 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 950 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 951 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 952 0x00, 0xff, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 953 { 954 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 955 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 956 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 957 0x00, 0xff, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 958 { 959 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 960 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 961 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 962 0x00, 0xff, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 963 { 964 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 965 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 966 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 967 0x00, 0xff, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 968 { 969 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 970 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 971 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 972 0x00, 0xff, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 973 { 974 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 975 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 976 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 977 0x00, 0xff, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 978 { 979 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 980 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 981 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 982 0x00, 0xff, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 983 { 984 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 985 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 986 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 987 0x00, 0xff, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 988 { 989 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 990 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 991 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 992 0x00, 0xff, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 993 { 994 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 995 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 996 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 997 0x00, 0xff, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 998 { 999 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 1000 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1001 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1002 0x00, 0xff, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 1003 { 1004 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 1005 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1006 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1007 0x00, 0xff, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 1008 { 1009 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 1010 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1011 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1012 0x00, 0xff, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 1013 { 1014 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 1015 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1016 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1017 0x00, 0xff, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 1018 { 1019 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 1020 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1021 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1022 0x00, 0xff, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 1023 { 1024 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 1025 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1026 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1027 0x00, 0xff, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 1028 { 1029 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 1030 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1031 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1032 0x00, 0xff, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, 1033 { 1034 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, 1035 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1036 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1037 0x00, 0xfc, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, 1038 { 1039 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 1040 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1041 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1042 0x00, 0xfc, 0x00, 0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201}, 1043 { 1044 226, 5130, 0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, 0x0c, 0x01, 1045 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1046 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1047 0x00, 0xfc, 0x00, 0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, 1048 { 1049 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, 1050 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1051 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1052 0x00, 0xfc, 0x00, 0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff}, 1053 { 1054 32, 5160, 0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, 0x0c, 0x01, 1055 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1056 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1057 0x00, 0xfc, 0x00, 0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd}, 1058 { 1059 34, 5170, 0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, 0x0c, 0x01, 1060 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1061 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 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0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 1548 { 1549 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 1550 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf2, 0x00, 0x05, 0x00, 1551 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x70, 0x00, 1552 0x0f, 0x00, 0x0d, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 1553 { 1554 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 1555 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x05, 0x00, 1556 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf0, 0x00, 0x05, 0x00, 0x70, 0x00, 1557 0x0f, 0x00, 0x0d, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 1558 }; 1559 1560 static const struct chan_info_nphy_radio205x chan_info_nphyrev4_2056_A1[] = { 1561 { 1562 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 1563 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1564 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1565 0x00, 0xff, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 1566 { 1567 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 1568 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1569 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1570 0x00, 0xff, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 1571 { 1572 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 1573 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1574 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1575 0x00, 0xff, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 1576 { 1577 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 1578 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1579 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1580 0x00, 0xff, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 1581 { 1582 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 1583 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1584 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1585 0x00, 0xff, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 1586 { 1587 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 1588 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1589 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1590 0x00, 0xff, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 1591 { 1592 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 1593 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1594 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1595 0x00, 0xff, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 1596 { 1597 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 1598 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1599 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1600 0x00, 0xff, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 1601 { 1602 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 1603 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1604 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1605 0x00, 0xff, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 1606 { 1607 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 1608 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1609 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1610 0x00, 0xff, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 1611 { 1612 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 1613 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1614 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1615 0x00, 0xff, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 1616 { 1617 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 1618 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1619 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1620 0x00, 0xff, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 1621 { 1622 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 1623 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1624 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1625 0x00, 0xff, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 1626 { 1627 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 1628 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1629 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1630 0x00, 0xff, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 1631 { 1632 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 1633 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1634 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1635 0x00, 0xff, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 1636 { 1637 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 1638 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1639 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1640 0x00, 0xff, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 1641 { 1642 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 1643 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1644 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1645 0x00, 0xff, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 1646 { 1647 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 1648 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1649 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1650 0x00, 0xff, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 1651 { 1652 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 1653 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1654 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1655 0x00, 0xfe, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, 1656 { 1657 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, 1658 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1659 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1660 0x00, 0xfe, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, 1661 { 1662 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 1663 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1664 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1665 0x00, 0xfe, 0x00, 0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201}, 1666 { 1667 226, 5130, 0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, 0x0c, 0x01, 1668 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1669 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1670 0x00, 0xfe, 0x00, 0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, 1671 { 1672 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, 1673 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1674 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1675 0x00, 0xfe, 0x00, 0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff}, 1676 { 1677 32, 5160, 0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, 0x0c, 0x01, 1678 0x02, 0x02, 0x02, 0x8f, 0x0f, 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0x0894, 0x0890, 0x088c, 0x01dd, 0x01de, 0x01df}, 1841 { 1842 98, 5490, 0x4d, 0x01, 0x01, 0x02, 0x25, 0x05, 0x05, 0x04, 0x0c, 0x01, 1843 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, 0xc8, 0x5c, 0x00, 0x07, 0x00, 0x7f, 1844 0x00, 0x0f, 0x00, 0xf8, 0x00, 0x5c, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, 1845 0x00, 0xf8, 0x00, 0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de}, 1846 { 1847 100, 5500, 0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04, 0x0c, 0x01, 1848 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x5c, 0x00, 0x06, 0x00, 0x7f, 1849 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x5c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1850 0x00, 0xf6, 0x00, 0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd}, 1851 { 1852 102, 5510, 0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04, 0x0c, 0x01, 1853 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x4c, 0x00, 0x06, 0x00, 0x7f, 1854 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x4c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1855 0x00, 0xf6, 0x00, 0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd}, 1856 { 1857 104, 5520, 0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04, 0x0c, 0x01, 1858 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x4c, 0x00, 0x06, 0x00, 0x7f, 1859 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x4c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1860 0x00, 0xf6, 0x00, 0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc}, 1861 { 1862 106, 5530, 0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04, 0x0c, 0x01, 1863 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 1864 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1865 0x00, 0xf6, 0x00, 0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db}, 1866 { 1867 108, 5540, 0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04, 0x0c, 0x01, 1868 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 1869 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1870 0x00, 0xf6, 0x00, 0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da}, 1871 { 1872 110, 5550, 0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04, 0x0c, 0x01, 1873 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 1874 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1875 0x00, 0xf6, 0x00, 0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9}, 1876 { 1877 112, 5560, 0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04, 0x0c, 0x01, 1878 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x2b, 0x00, 0x06, 0x00, 0x7f, 1879 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x2b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1880 0x00, 0xf6, 0x00, 0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8}, 1881 { 1882 114, 5570, 0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04, 0x0c, 0x01, 1883 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x2a, 0x00, 0x06, 0x00, 0x7f, 1884 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x2a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1885 0x00, 0xf6, 0x00, 0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7}, 1886 { 1887 116, 5580, 0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04, 0x0c, 0x01, 1888 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x1a, 0x00, 0x06, 0x00, 0x7f, 1889 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x1a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1890 0x00, 0xf6, 0x00, 0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7}, 1891 { 1892 118, 5590, 0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04, 0x0c, 0x01, 1893 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x1a, 0x00, 0x06, 0x00, 0x7f, 1894 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x1a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1895 0x00, 0xf6, 0x00, 0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6}, 1896 { 1897 120, 5600, 0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04, 0x0c, 0x01, 1898 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x1a, 0x00, 0x04, 0x00, 0x7f, 1899 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x1a, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1900 0x00, 0xf4, 0x00, 0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5}, 1901 { 1902 122, 5610, 0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04, 0x0c, 0x01, 1903 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x19, 0x00, 0x04, 0x00, 0x7f, 1904 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x19, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1905 0x00, 0xf4, 0x00, 0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4}, 1906 { 1907 124, 5620, 0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04, 0x0c, 0x01, 1908 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x19, 0x00, 0x04, 0x00, 0x7f, 1909 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x19, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1910 0x00, 0xf4, 0x00, 0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3}, 1911 { 1912 126, 5630, 0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04, 0x0c, 0x01, 1913 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x09, 0x00, 0x04, 0x00, 0x7f, 1914 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x09, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1915 0x00, 0xf4, 0x00, 0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2}, 1916 { 1917 128, 5640, 0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04, 0x0c, 0x01, 1918 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x09, 0x00, 0x04, 0x00, 0x7f, 1919 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x09, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1920 0x00, 0xf4, 0x00, 0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2}, 1921 { 1922 130, 5650, 0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04, 0x0c, 0x01, 1923 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1924 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1925 0x00, 0xf4, 0x00, 0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1}, 1926 { 1927 132, 5660, 0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04, 0x0c, 0x01, 1928 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1929 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1930 0x00, 0xf4, 0x00, 0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0}, 1931 { 1932 134, 5670, 0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04, 0x0c, 0x01, 1933 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1934 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1935 0x00, 0xf4, 0x00, 0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf}, 1936 { 1937 136, 5680, 0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04, 0x0c, 0x01, 1938 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1939 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1940 0x00, 0xf4, 0x00, 0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce}, 1941 { 1942 138, 5690, 0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04, 0x0c, 0x01, 1943 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x07, 0x00, 0x04, 0x00, 0x7f, 1944 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x07, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1945 0x00, 0xf4, 0x00, 0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce}, 1946 { 1947 140, 5700, 0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04, 0x0c, 0x01, 1948 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 1949 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1950 0x00, 0xf2, 0x00, 0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd}, 1951 { 1952 142, 5710, 0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04, 0x0c, 0x01, 1953 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 1954 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1955 0x00, 0xf2, 0x00, 0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc}, 1956 { 1957 144, 5720, 0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04, 0x0c, 0x01, 1958 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 1959 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1960 0x00, 0xf2, 0x00, 0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb}, 1961 { 1962 145, 5725, 0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04, 0x10, 0x01, 1963 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1964 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1965 0x00, 0xf2, 0x00, 0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb}, 1966 { 1967 146, 5730, 0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04, 0x0c, 0x01, 1968 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1969 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1970 0x00, 0xf2, 0x00, 0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca}, 1971 { 1972 147, 5735, 0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04, 0x10, 0x01, 1973 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1974 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1975 0x00, 0xf2, 0x00, 0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca}, 1976 { 1977 148, 5740, 0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04, 0x0c, 0x01, 1978 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1979 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1980 0x00, 0xf2, 0x00, 0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9}, 1981 { 1982 149, 5745, 0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04, 0x10, 0x01, 1983 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1984 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1985 0x00, 0xf2, 0x00, 0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9}, 1986 { 1987 150, 5750, 0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04, 0x0c, 0x01, 1988 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1989 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1990 0x00, 0xf2, 0x00, 0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9}, 1991 { 1992 151, 5755, 0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04, 0x10, 0x01, 1993 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 1994 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1995 0x00, 0xf2, 0x00, 0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8}, 1996 { 1997 152, 5760, 0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04, 0x0c, 0x01, 1998 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 1999 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2000 0x00, 0xf2, 0x00, 0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8}, 2001 { 2002 153, 5765, 0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04, 0x10, 0x01, 2003 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2004 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2005 0x00, 0xf2, 0x00, 0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8}, 2006 { 2007 154, 5770, 0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04, 0x0c, 0x01, 2008 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2009 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2010 0x00, 0xf2, 0x00, 0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7}, 2011 { 2012 155, 5775, 0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04, 0x10, 0x01, 2013 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2014 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2015 0x00, 0xf2, 0x00, 0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7}, 2016 { 2017 156, 5780, 0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04, 0x0c, 0x01, 2018 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2019 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2020 0x00, 0xf2, 0x00, 0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6}, 2021 { 2022 157, 5785, 0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04, 0x10, 0x01, 2023 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 2024 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2025 0x00, 0xf2, 0x00, 0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6}, 2026 { 2027 158, 5790, 0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04, 0x0c, 0x01, 2028 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 2029 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2030 0x00, 0xf2, 0x00, 0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6}, 2031 { 2032 159, 5795, 0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04, 0x10, 0x01, 2033 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 2034 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2035 0x00, 0xf2, 0x00, 0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5}, 2036 { 2037 160, 5800, 0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04, 0x0c, 0x01, 2038 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2039 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2040 0x00, 0xf0, 0x00, 0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5}, 2041 { 2042 161, 5805, 0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04, 0x10, 0x01, 2043 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2044 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2045 0x00, 0xf0, 0x00, 0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4}, 2046 { 2047 162, 5810, 0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04, 0x0c, 0x01, 2048 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2049 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2050 0x00, 0xf0, 0x00, 0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4}, 2051 { 2052 163, 5815, 0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04, 0x10, 0x01, 2053 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2054 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2055 0x00, 0xf0, 0x00, 0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4}, 2056 { 2057 164, 5820, 0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04, 0x0c, 0x01, 2058 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2059 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2060 0x00, 0xf0, 0x00, 0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3}, 2061 { 2062 165, 5825, 0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, 0x10, 0x01, 2063 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2064 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2065 0x00, 0xf0, 0x00, 0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3}, 2066 { 2067 166, 5830, 0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, 0x0c, 0x01, 2068 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2069 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2070 0x00, 0xf0, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2}, 2071 { 2072 168, 5840, 0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, 0x0c, 0x01, 2073 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2074 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2075 0x00, 0xf0, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2}, 2076 { 2077 170, 5850, 0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, 0x0c, 0x01, 2078 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2079 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2080 0x00, 0xf0, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1}, 2081 { 2082 172, 5860, 0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, 0x0c, 0x01, 2083 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2084 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2085 0x00, 0xf0, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0}, 2086 { 2087 174, 5870, 0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, 0x0c, 0x01, 2088 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 2089 0x00, 0x09, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2090 0x00, 0xf0, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf}, 2091 { 2092 176, 5880, 0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, 0x0c, 0x01, 2093 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 2094 0x00, 0x09, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2095 0x00, 0xf0, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf}, 2096 { 2097 178, 5890, 0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, 0x0c, 0x01, 2098 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 2099 0x00, 0x09, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2100 0x00, 0xf0, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be}, 2101 { 2102 180, 5900, 0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, 0x0c, 0x01, 2103 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, 2104 0x00, 0x07, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x07, 2105 0x00, 0xf0, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd}, 2106 { 2107 182, 5910, 0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, 0x0c, 0x01, 2108 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, 2109 0x00, 0x07, 0x00, 0xf0, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x07, 2110 0x00, 0xf0, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 2111 { 2112 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 2113 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 2114 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, 2115 0x0f, 0x00, 0x0e, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 2116 { 2117 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 2118 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 2119 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, 2120 0x0f, 0x00, 0x0e, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 2121 { 2122 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 2123 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 2124 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, 2125 0x0f, 0x00, 0x0e, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 2126 { 2127 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 2128 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x04, 0x00, 2129 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xfd, 0x00, 0x04, 0x00, 0x70, 0x00, 2130 0x0f, 0x00, 0x0e, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 2131 { 2132 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 2133 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xfb, 0x00, 0x04, 0x00, 2134 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xfb, 0x00, 0x04, 0x00, 0x70, 0x00, 2135 0x0f, 0x00, 0x0e, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 2136 { 2137 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 2138 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xfa, 0x00, 0x04, 0x00, 2139 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xfa, 0x00, 0x04, 0x00, 0x70, 0x00, 2140 0x0f, 0x00, 0x0e, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 2141 { 2142 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 2143 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x04, 0x00, 2144 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf8, 0x00, 0x04, 0x00, 0x70, 0x00, 2145 0x0f, 0x00, 0x0e, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 2146 { 2147 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 2148 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf7, 0x00, 0x04, 0x00, 2149 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf7, 0x00, 0x04, 0x00, 0x70, 0x00, 2150 0x0f, 0x00, 0x0e, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 2151 { 2152 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 2153 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf6, 0x00, 0x04, 0x00, 2154 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf6, 0x00, 0x04, 0x00, 0x70, 0x00, 2155 0x0f, 0x00, 0x0e, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 2156 { 2157 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 2158 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf5, 0x00, 0x04, 0x00, 2159 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf5, 0x00, 0x04, 0x00, 0x70, 0x00, 2160 0x0f, 0x00, 0x0e, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 2161 { 2162 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 2163 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf4, 0x00, 0x04, 0x00, 2164 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf4, 0x00, 0x04, 0x00, 0x70, 0x00, 2165 0x0f, 0x00, 0x0e, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 2166 { 2167 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 2168 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf3, 0x00, 0x04, 0x00, 2169 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf3, 0x00, 0x04, 0x00, 0x70, 0x00, 2170 0x0f, 0x00, 0x0e, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 2171 { 2172 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 2173 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf2, 0x00, 0x04, 0x00, 2174 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x70, 0x00, 2175 0x0f, 0x00, 0x0e, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 2176 { 2177 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 2178 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x04, 0x00, 2179 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x70, 0x00, 2180 0x0f, 0x00, 0x0e, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 2181 }; 2182 2183 static const struct chan_info_nphy_radio205x chan_info_nphyrev5_2056v5[] = { 2184 { 2185 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 2186 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2187 0x00, 0x0f, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, 2188 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 2189 { 2190 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 2191 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2192 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 2193 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 2194 { 2195 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 2196 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2197 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 2198 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 2199 { 2200 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 2201 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2202 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 2203 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 2204 { 2205 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 2206 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2207 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e, 2208 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 2209 { 2210 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 2211 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2212 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2213 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 2214 { 2215 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 2216 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2217 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2218 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 2219 { 2220 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 2221 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2222 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2223 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 2224 { 2225 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 2226 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2227 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2228 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 2229 { 2230 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 2231 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2232 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2233 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 2234 { 2235 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 2236 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 2237 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d, 2238 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 2239 { 2240 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 2241 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 2242 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2243 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 2244 { 2245 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 2246 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 2247 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2248 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 2249 { 2250 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 2251 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 2252 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2253 0x00, 0x6f, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 2254 { 2255 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 2256 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x70, 2257 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2258 0x00, 0x6f, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 2259 { 2260 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 2261 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x08, 0x00, 0x70, 2262 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2263 0x00, 0x6f, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 2264 { 2265 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 2266 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2267 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2268 0x00, 0x6f, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 2269 { 2270 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 2271 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2272 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2273 0x00, 0x6f, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 2274 { 2275 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 2276 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2277 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2278 0x00, 0x6f, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, 2279 { 2280 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, 2281 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2282 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2283 0x00, 0x6f, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, 2284 { 2285 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 2286 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2287 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2288 0x00, 0x6f, 0x00, 0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201}, 2289 { 2290 226, 5130, 0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, 0x0c, 0x01, 2291 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x08, 0x00, 0x70, 2292 0x00, 0x0a, 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0a, 2293 0x00, 0x6f, 0x00, 0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, 2294 { 2295 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, 2296 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 2297 0x00, 0x0a, 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x0a, 2298 0x00, 0x6f, 0x00, 0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff}, 2299 { 2300 32, 5160, 0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, 0x0c, 0x01, 2301 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 2302 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x09, 2303 0x00, 0x6e, 0x00, 0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd}, 2304 { 2305 34, 5170, 0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, 0x0c, 0x01, 2306 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x06, 0x00, 0x70, 2307 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2308 0x00, 0x6e, 0x00, 0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc}, 2309 { 2310 36, 5180, 0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04, 0x0c, 0x01, 2311 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2312 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2313 0x00, 0x6e, 0x00, 0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb}, 2314 { 2315 38, 5190, 0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04, 0x0c, 0x01, 2316 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2317 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2318 0x00, 0x6e, 0x00, 0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa}, 2319 { 2320 40, 5200, 0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04, 0x0c, 0x01, 2321 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2322 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2323 0x00, 0x6e, 0x00, 0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9}, 2324 { 2325 42, 5210, 0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04, 0x0c, 0x01, 2326 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2327 0x00, 0x09, 0x00, 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0x00, 0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3}, 2684 { 2685 165, 5825, 0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, 0x10, 0x01, 2686 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2687 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2688 0x00, 0x82, 0x00, 0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3}, 2689 { 2690 166, 5830, 0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, 0x0c, 0x01, 2691 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2692 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2693 0x00, 0x72, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2}, 2694 { 2695 168, 5840, 0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, 0x0c, 0x01, 2696 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2697 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2698 0x00, 0x72, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2}, 2699 { 2700 170, 5850, 0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, 0x0c, 0x01, 2701 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2702 0x00, 0x00, 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2703 0x00, 0x72, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1}, 2704 { 2705 172, 5860, 0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, 0x0c, 0x01, 2706 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2707 0x00, 0x00, 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2708 0x00, 0x72, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0}, 2709 { 2710 174, 5870, 0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, 0x0c, 0x01, 2711 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2712 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2713 0x00, 0x71, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf}, 2714 { 2715 176, 5880, 0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, 0x0c, 0x01, 2716 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2717 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2718 0x00, 0x71, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf}, 2719 { 2720 178, 5890, 0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, 0x0c, 0x01, 2721 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2722 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2723 0x00, 0x71, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be}, 2724 { 2725 180, 5900, 0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, 0x0c, 0x01, 2726 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 2727 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2728 0x00, 0x71, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd}, 2729 { 2730 182, 5910, 0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, 0x0c, 0x01, 2731 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 2732 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2733 0x00, 0x71, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 2734 { 2735 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 2736 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x03, 0x00, 2737 0x70, 0x00, 0x0f, 0x00, 0x0b, 0x00, 0x1f, 0x00, 0x03, 0x00, 0x70, 0x00, 2738 0x0f, 0x00, 0x0b, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 2739 { 2740 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 2741 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x03, 0x00, 2742 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x1f, 0x00, 0x03, 0x00, 0x70, 0x00, 2743 0x0f, 0x00, 0x0a, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 2744 { 2745 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 2746 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0e, 0x00, 0x03, 0x00, 2747 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x0e, 0x00, 0x03, 0x00, 0x70, 0x00, 2748 0x0f, 0x00, 0x0a, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 2749 { 2750 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 2751 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0d, 0x00, 0x03, 0x00, 2752 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x03, 0x00, 0x70, 0x00, 2753 0x0e, 0x00, 0x0a, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 2754 { 2755 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 2756 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x03, 0x00, 2757 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x0c, 0x00, 0x03, 0x00, 0x70, 0x00, 2758 0x0e, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 2759 { 2760 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 2761 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0b, 0x00, 0x03, 0x00, 2762 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x0b, 0x00, 0x03, 0x00, 0x70, 0x00, 2763 0x0e, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 2764 { 2765 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 2766 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x09, 0x00, 0x03, 0x00, 2767 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x03, 0x00, 0x70, 0x00, 2768 0x0e, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 2769 { 2770 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 2771 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x08, 0x00, 0x02, 0x00, 2772 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x08, 0x00, 0x02, 0x00, 0x70, 0x00, 2773 0x0e, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 2774 { 2775 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 2776 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x07, 0x00, 0x02, 0x00, 2777 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x07, 0x00, 0x02, 0x00, 0x70, 0x00, 2778 0x0e, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 2779 { 2780 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 2781 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x06, 0x00, 0x02, 0x00, 2782 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x06, 0x00, 0x02, 0x00, 0x70, 0x00, 2783 0x0d, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 2784 { 2785 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 2786 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x05, 0x00, 0x02, 0x00, 2787 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x05, 0x00, 0x02, 0x00, 0x70, 0x00, 2788 0x0d, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 2789 { 2790 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 2791 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x04, 0x00, 0x02, 0x00, 2792 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x04, 0x00, 0x02, 0x00, 0x70, 0x00, 2793 0x0d, 0x00, 0x08, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 2794 { 2795 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 2796 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x03, 0x00, 0x02, 0x00, 2797 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x03, 0x00, 0x02, 0x00, 0x70, 0x00, 2798 0x0d, 0x00, 0x08, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 2799 { 2800 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 2801 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 2802 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 2803 0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 2804 }; 2805 2806 static const struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v6[] = { 2807 { 2808 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 2809 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2810 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2811 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 2812 { 2813 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 2814 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2815 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2816 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 2817 { 2818 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 2819 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2820 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2821 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 2822 { 2823 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 2824 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2825 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2826 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 2827 { 2828 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 2829 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2830 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2831 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 2832 { 2833 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 2834 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2835 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2836 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 2837 { 2838 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 2839 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2840 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2841 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 2842 { 2843 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 2844 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2845 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2846 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 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0x00, 0x69, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2}, 3317 { 3318 168, 5840, 0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, 0x0c, 0x01, 3319 0x06, 0x06, 0x06, 0x86, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3320 0x00, 0x04, 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3321 0x00, 0x69, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2}, 3322 { 3323 170, 5850, 0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, 0x0c, 0x01, 3324 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3325 0x00, 0x04, 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3326 0x00, 0x69, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1}, 3327 { 3328 172, 5860, 0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, 0x0c, 0x01, 3329 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3330 0x00, 0x04, 0x00, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3331 0x00, 0x69, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0}, 3332 { 3333 174, 5870, 0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, 0x0c, 0x01, 3334 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3335 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3336 0x00, 0x68, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf}, 3337 { 3338 176, 5880, 0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, 0x0c, 0x01, 3339 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3340 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3341 0x00, 0x68, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf}, 3342 { 3343 178, 5890, 0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, 0x0c, 0x01, 3344 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3345 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3346 0x00, 0x68, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be}, 3347 { 3348 180, 5900, 0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, 0x0c, 0x01, 3349 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3350 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3351 0x00, 0x68, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd}, 3352 { 3353 182, 5910, 0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, 0x0c, 0x01, 3354 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3355 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3356 0x00, 0x68, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 3357 { 3358 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 3359 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 3360 0x70, 0x00, 0x0b, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, 3361 0x0b, 0x00, 0x0a, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 3362 { 3363 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 3364 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 3365 0x70, 0x00, 0x0b, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, 3366 0x0b, 0x00, 0x0a, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 3367 { 3368 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 3369 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x67, 0x00, 0x03, 0x00, 3370 0x70, 0x00, 0x0b, 0x00, 0x0a, 0x00, 0x67, 0x00, 0x03, 0x00, 0x70, 0x00, 3371 0x0b, 0x00, 0x0a, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 3372 { 3373 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 3374 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x57, 0x00, 0x03, 0x00, 3375 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x57, 0x00, 0x03, 0x00, 0x70, 0x00, 3376 0x0a, 0x00, 0x0a, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 3377 { 3378 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 3379 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x56, 0x00, 0x03, 0x00, 3380 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x56, 0x00, 0x03, 0x00, 0x70, 0x00, 3381 0x0a, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 3382 { 3383 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 3384 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x46, 0x00, 0x03, 0x00, 3385 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x46, 0x00, 0x03, 0x00, 0x70, 0x00, 3386 0x0a, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 3387 { 3388 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 3389 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 3390 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, 3391 0x0a, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 3392 { 3393 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 3394 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 3395 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 3396 0x0a, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 3397 { 3398 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 3399 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x23, 0x00, 0x02, 0x00, 3400 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x23, 0x00, 0x02, 0x00, 0x70, 0x00, 3401 0x0a, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 3402 { 3403 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 3404 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x12, 0x00, 0x02, 0x00, 3405 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x12, 0x00, 0x02, 0x00, 0x70, 0x00, 3406 0x0a, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 3407 { 3408 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 3409 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 3410 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x02, 0x00, 0x02, 0x00, 0x70, 0x00, 3411 0x09, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 3412 { 3413 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 3414 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 3415 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, 3416 0x09, 0x00, 0x09, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 3417 { 3418 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 3419 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 3420 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, 3421 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 3422 { 3423 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 3424 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 3425 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 3426 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 3427 }; 3428 3429 static const struct chan_info_nphy_radio205x chan_info_nphyrev5n6_2056v7[] = { 3430 { 3431 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 3432 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3433 0x00, 0x0f, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, 3434 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 3435 { 3436 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 3437 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3438 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 3439 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 3440 { 3441 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 3442 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3443 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 3444 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 3445 { 3446 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 3447 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3448 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 3449 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 3450 { 3451 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 3452 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3453 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e, 3454 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 3455 { 3456 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 3457 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3458 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3459 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 3460 { 3461 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 3462 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3463 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3464 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 3465 { 3466 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 3467 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3468 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3469 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 3470 { 3471 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 3472 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3473 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3474 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 3475 { 3476 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 3477 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3478 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3479 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 3480 { 3481 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 3482 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 3483 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d, 3484 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 3485 { 3486 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 3487 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 3488 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 3489 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 3490 { 3491 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 3492 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 3493 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 3494 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 3495 { 3496 210, 5050, 0xef, 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0x08, 0x04, 0x16, 0x01, 3982 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 3983 0x70, 0x00, 0x0f, 0x00, 0x0b, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, 3984 0x0f, 0x00, 0x0b, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 3985 { 3986 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 3987 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 3988 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, 3989 0x0f, 0x00, 0x0a, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 3990 { 3991 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 3992 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 3993 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, 3994 0x0f, 0x00, 0x0a, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 3995 { 3996 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 3997 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 3998 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, 3999 0x0e, 0x00, 0x0a, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 4000 { 4001 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 4002 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x03, 0x00, 4003 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x77, 0x00, 0x03, 0x00, 0x70, 0x00, 4004 0x0e, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 4005 { 4006 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 4007 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x76, 0x00, 0x03, 0x00, 4008 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x76, 0x00, 0x03, 0x00, 0x70, 0x00, 4009 0x0e, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 4010 { 4011 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 4012 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x66, 0x00, 0x03, 0x00, 4013 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x66, 0x00, 0x03, 0x00, 0x70, 0x00, 4014 0x0e, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 4015 { 4016 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 4017 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x55, 0x00, 0x02, 0x00, 4018 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x55, 0x00, 0x02, 0x00, 0x70, 0x00, 4019 0x0e, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 4020 { 4021 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 4022 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 4023 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, 4024 0x0e, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 4025 { 4026 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 4027 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 4028 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 4029 0x0d, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 4030 { 4031 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 4032 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, 4033 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00, 4034 0x0d, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 4035 { 4036 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 4037 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x22, 0x00, 0x02, 0x00, 4038 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, 4039 0x0d, 0x00, 0x08, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 4040 { 4041 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 4042 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x11, 0x00, 0x02, 0x00, 4043 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, 4044 0x0d, 0x00, 0x08, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 4045 { 4046 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 4047 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 4048 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 4049 0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 4050 }; 4051 4052 static const struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v8[] = { 4053 { 4054 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 4055 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4056 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4057 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 4058 { 4059 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 4060 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4061 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4062 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 4063 { 4064 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 4065 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4066 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4067 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 4068 { 4069 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 4070 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4071 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4072 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 4073 { 4074 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 4075 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4076 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4077 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 4078 { 4079 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 4080 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4081 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4082 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 4083 { 4084 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 4085 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4086 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4087 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 4088 { 4089 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 4090 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4091 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4092 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 4093 { 4094 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 4095 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4096 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4097 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 4098 { 4099 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 4100 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4101 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4102 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 4103 { 4104 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 4105 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4106 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4107 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 4108 { 4109 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 4110 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4111 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4112 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 4113 { 4114 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 4115 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4116 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4117 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 4118 { 4119 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 4120 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4121 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4122 0x00, 0x6f, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 4123 { 4124 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 4125 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4126 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4127 0x00, 0x6f, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 4128 { 4129 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 4130 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 4131 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4132 0x00, 0x6f, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 4133 { 4134 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 4135 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 4136 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4137 0x00, 0x6f, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 4138 { 4139 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 4140 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 4141 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4142 0x00, 0x6f, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 4143 { 4144 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 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0x8f, 0x30, 0x00, 0x00, 0x00, 0x46, 0x00, 0x03, 0x00, 4631 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x76, 0x00, 0x03, 0x00, 0x70, 0x00, 4632 0x0a, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 4633 { 4634 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 4635 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 4636 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x66, 0x00, 0x02, 0x00, 0x70, 0x00, 4637 0x0a, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 4638 { 4639 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 4640 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 4641 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x55, 0x00, 0x02, 0x00, 0x70, 0x00, 4642 0x0a, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 4643 { 4644 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 4645 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x23, 0x00, 0x02, 0x00, 4646 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, 4647 0x0a, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 4648 { 4649 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 4650 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x12, 0x00, 0x02, 0x00, 4651 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 4652 0x0a, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 4653 { 4654 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 4655 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 4656 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00, 4657 0x09, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 4658 { 4659 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 4660 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 4661 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, 4662 0x09, 0x00, 0x09, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 4663 { 4664 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 4665 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 4666 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, 4667 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 4668 { 4669 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 4670 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 4671 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 4672 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 4673 }; 4674 4675 static const struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v11[] = { 4676 { 4677 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x02, 0x0c, 0x01, 4678 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4679 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4680 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 4681 { 4682 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x02, 0x0c, 0x01, 4683 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4684 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4685 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 4686 { 4687 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x02, 0x0c, 0x01, 4688 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4689 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4690 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 4691 { 4692 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x02, 0x0c, 0x01, 4693 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4694 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4695 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 4696 { 4697 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x02, 0x0c, 0x01, 4698 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4699 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4700 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 4701 { 4702 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x02, 0x0c, 0x01, 4703 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4704 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4705 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 4706 { 4707 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x02, 0x0c, 0x01, 4708 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4709 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4710 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 4711 { 4712 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x02, 0x0c, 0x01, 4713 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4714 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4715 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 4716 { 4717 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x02, 0x0c, 0x01, 4718 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4719 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4720 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 4721 { 4722 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x02, 0x0c, 0x01, 4723 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4724 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4725 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 4726 { 4727 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x02, 0x0c, 0x01, 4728 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4729 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4730 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 4731 { 4732 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x02, 0x0c, 0x01, 4733 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4734 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4735 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 4736 { 4737 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x02, 0x0c, 0x01, 4738 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4739 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4740 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 4741 { 4742 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x02, 0x0c, 0x01, 4743 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4744 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4745 0x00, 0x6f, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 4746 { 4747 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x02, 0x0c, 0x01, 4748 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4749 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4750 0x00, 0x6f, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 4751 { 4752 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x02, 0x0c, 0x01, 4753 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 4754 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4755 0x00, 0x6f, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 4756 { 4757 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x02, 0x0c, 0x01, 4758 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 4759 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4760 0x00, 0x6f, 0x00, 0x07f4, 0x07f0, 0x07ec, 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0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00, 5280 0x09, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 5281 { 5282 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x06, 0x06, 0x04, 0x2b, 0x01, 5283 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 5284 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, 5285 0x09, 0x00, 0x09, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 5286 { 5287 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x06, 0x06, 0x04, 0x2b, 0x01, 5288 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 5289 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, 5290 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 5291 { 5292 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x06, 0x06, 0x04, 0x2b, 0x01, 5293 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 5294 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 5295 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 5296 }; 5297 5298 static const struct chan_info_nphy_radio2057 chan_info_nphyrev7_2057_rev4[] = { 5299 { 5300 184, 4920, 0x68, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xec, 0x01, 0x0f, 5301 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5302 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07b4, 0x07b0, 0x07ac, 0x0214, 5303 0x0215, 5304 0x0216, 5305 }, 5306 { 5307 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 5308 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5309 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07b8, 0x07b4, 0x07b0, 0x0213, 5310 0x0214, 5311 0x0215, 5312 }, 5313 { 5314 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, 5315 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5316 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07bc, 0x07b8, 0x07b4, 0x0212, 5317 0x0213, 5318 0x0214, 5319 }, 5320 { 5321 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, 5322 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5323 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07c0, 0x07bc, 0x07b8, 0x0211, 5324 0x0212, 5325 0x0213, 5326 }, 5327 { 5328 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, 5329 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5330 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07c4, 0x07c0, 0x07bc, 0x020f, 5331 0x0211, 5332 0x0212, 5333 }, 5334 { 5335 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, 5336 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5337 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07c8, 0x07c4, 0x07c0, 0x020e, 5338 0x020f, 5339 0x0211, 5340 }, 5341 { 5342 196, 4980, 0x7c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf2, 0x01, 0x0f, 5343 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5344 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07cc, 0x07c8, 0x07c4, 0x020d, 5345 0x020e, 5346 0x020f, 5347 }, 5348 { 5349 198, 4990, 0x7f, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf3, 0x01, 0x0f, 5350 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5351 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07d0, 0x07cc, 0x07c8, 0x020c, 5352 0x020d, 5353 0x020e, 5354 }, 5355 { 5356 200, 5000, 0x82, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf4, 0x01, 0x0f, 5357 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5358 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07d4, 0x07d0, 0x07cc, 0x020b, 5359 0x020c, 5360 0x020d, 5361 }, 5362 { 5363 202, 5010, 0x86, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf5, 0x01, 0x0f, 5364 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5365 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07d8, 0x07d4, 0x07d0, 0x020a, 5366 0x020b, 5367 0x020c, 5368 }, 5369 { 5370 204, 5020, 0x89, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf6, 0x01, 0x0e, 5371 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5372 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07dc, 0x07d8, 0x07d4, 0x0209, 5373 0x020a, 5374 0x020b, 5375 }, 5376 { 5377 206, 5030, 0x8c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf7, 0x01, 0x0e, 5378 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5379 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07e0, 0x07dc, 0x07d8, 0x0208, 5380 0x0209, 5381 0x020a, 5382 }, 5383 { 5384 208, 5040, 0x90, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf8, 0x01, 0x0e, 5385 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5386 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07e4, 0x07e0, 0x07dc, 0x0207, 5387 0x0208, 5388 0x0209, 5389 }, 5390 { 5391 210, 5050, 0x93, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf9, 0x01, 0x0e, 5392 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5393 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07e8, 0x07e4, 0x07e0, 0x0206, 5394 0x0207, 5395 0x0208, 5396 }, 5397 { 5398 212, 5060, 0x96, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfa, 0x01, 0x0e, 5399 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xe3, 0x00, 0xef, 0x00, 5400 0x00, 0x0f, 0x0f, 0xe3, 0x00, 0xef, 0x07ec, 0x07e8, 0x07e4, 0x0205, 5401 0x0206, 5402 0x0207, 5403 }, 5404 { 5405 214, 5070, 0x9a, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfb, 0x01, 0x0e, 5406 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x00, 5407 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x07f0, 0x07ec, 0x07e8, 0x0204, 5408 0x0205, 5409 0x0206, 5410 }, 5411 { 5412 216, 5080, 0x9d, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfc, 0x01, 0x0e, 5413 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x00, 5414 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x07f4, 0x07f0, 0x07ec, 0x0203, 5415 0x0204, 5416 0x0205, 5417 }, 5418 { 5419 218, 5090, 0xa0, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfd, 0x01, 0x0e, 5420 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5421 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x07f8, 0x07f4, 0x07f0, 0x0202, 5422 0x0203, 5423 0x0204, 5424 }, 5425 { 5426 220, 5100, 0xa4, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfe, 0x01, 0x0d, 5427 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5428 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x07fc, 0x07f8, 0x07f4, 0x0201, 5429 0x0202, 5430 0x0203, 5431 }, 5432 { 5433 222, 5110, 0xa7, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xff, 0x01, 0x0d, 5434 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5435 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x0800, 0x07fc, 0x07f8, 0x0200, 5436 0x0201, 5437 0x0202, 5438 }, 5439 { 5440 224, 5120, 0xaa, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x00, 0x02, 0x0d, 5441 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5442 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x0804, 0x0800, 0x07fc, 0x01ff, 5443 0x0200, 5444 0x0201, 5445 }, 5446 { 5447 226, 5130, 0xae, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x01, 0x02, 0x0d, 5448 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5449 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x0808, 0x0804, 0x0800, 0x01fe, 5450 0x01ff, 5451 0x0200, 5452 }, 5453 { 5454 228, 5140, 0xb1, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x02, 0x02, 0x0d, 5455 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0e, 0xe3, 0x00, 0xd6, 0x00, 5456 0x00, 0x0e, 0x0e, 0xe3, 0x00, 0xd6, 0x080c, 0x0808, 0x0804, 0x01fd, 5457 0x01fe, 5458 0x01ff, 5459 }, 5460 { 5461 32, 5160, 0xb8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x04, 0x02, 0x0d, 5462 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0d, 0x0e, 0xe3, 0x00, 0xd6, 0x00, 5463 0x00, 0x0d, 0x0e, 0xe3, 0x00, 0xd6, 0x0814, 0x0810, 0x080c, 0x01fb, 5464 0x01fc, 5465 0x01fd, 5466 }, 5467 { 5468 34, 5170, 0xbb, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x05, 0x02, 0x0d, 5469 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0d, 0x0e, 0xe3, 0x00, 0xd6, 0x00, 5470 0x00, 0x0d, 0x0e, 0xe3, 0x00, 0xd6, 0x0818, 0x0814, 0x0810, 0x01fa, 5471 0x01fb, 5472 0x01fc, 5473 }, 5474 { 5475 36, 5180, 0xbe, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x06, 0x02, 0x0c, 5476 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0d, 0x0e, 0xd3, 0x00, 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0x0c, 0x0c, 0x30, 0x4a, 0x02, 0x04, 6029 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6030 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 6031 0x01bf, 6032 0x01c0, 6033 }, 6034 { 6035 174, 5870, 0xa4, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4b, 0x02, 0x04, 6036 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6037 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 6038 0x01bf, 6039 0x01bf, 6040 }, 6041 { 6042 176, 5880, 0xa8, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4c, 0x02, 0x03, 6043 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6044 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 6045 0x01be, 6046 0x01bf, 6047 }, 6048 { 6049 178, 5890, 0xab, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4d, 0x02, 0x03, 6050 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6051 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 6052 0x01bd, 6053 0x01be, 6054 }, 6055 { 6056 180, 5900, 0xae, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4e, 0x02, 0x03, 6057 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6058 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 6059 0x01bc, 6060 0x01bd, 6061 }, 6062 { 6063 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0f, 6064 0x0a, 0x00, 0x0a, 0x00, 0x71, 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6065 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03c9, 0x03c5, 0x03c1, 0x043a, 6066 0x043f, 6067 0x0443, 6068 }, 6069 { 6070 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0f, 6071 0x0a, 0x00, 0x0a, 0x00, 0x71, 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6072 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cb, 0x03c7, 0x03c3, 0x0438, 6073 0x043d, 6074 0x0441, 6075 }, 6076 { 6077 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0f, 6078 0x09, 0x00, 0x09, 0x00, 0x71, 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6079 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cd, 0x03c9, 0x03c5, 0x0436, 6080 0x043a, 6081 0x043f, 6082 }, 6083 { 6084 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0f, 6085 0x09, 0x00, 0x09, 0x00, 0x71, 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6086 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cf, 0x03cb, 0x03c7, 0x0434, 6087 0x0438, 6088 0x043d, 6089 }, 6090 { 6091 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0f, 6092 0x08, 0x00, 0x08, 0x00, 0x51, 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x51, 6093 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d1, 0x03cd, 0x03c9, 0x0431, 6094 0x0436, 6095 0x043a, 6096 }, 6097 { 6098 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0f, 6099 0x08, 0x00, 0x08, 0x00, 0x51, 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x51, 6100 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d3, 0x03cf, 0x03cb, 0x042f, 6101 0x0434, 6102 0x0438, 6103 }, 6104 { 6105 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0f, 6106 0x07, 0x00, 0x07, 0x00, 0x51, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x51, 6107 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d5, 0x03d1, 0x03cd, 0x042d, 6108 0x0431, 6109 0x0436, 6110 }, 6111 { 6112 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0f, 6113 0x07, 0x00, 0x07, 0x00, 0x31, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6114 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d7, 0x03d3, 0x03cf, 0x042b, 6115 0x042f, 6116 0x0434, 6117 }, 6118 { 6119 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, 6120 0x07, 0x00, 0x07, 0x00, 0x31, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6121 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, 6122 0x042d, 6123 0x0431, 6124 }, 6125 { 6126 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, 6127 0x06, 0x00, 0x06, 0x00, 0x31, 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6128 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, 6129 0x042b, 6130 0x042f, 6131 }, 6132 { 6133 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, 6134 0x06, 0x00, 0x06, 0x00, 0x31, 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6135 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, 6136 0x0429, 6137 0x042d, 6138 }, 6139 { 6140 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, 6141 0x05, 0x00, 0x05, 0x00, 0x11, 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x11, 6142 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, 6143 0x0427, 6144 0x042b, 6145 }, 6146 { 6147 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, 6148 0x05, 0x00, 0x05, 0x00, 0x11, 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x11, 6149 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, 6150 0x0424, 6151 0x0429, 6152 }, 6153 { 6154 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, 6155 0x04, 0x00, 0x04, 0x00, 0x11, 0x43, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x11, 6156 0x43, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, 6157 0x041f, 6158 0x0424} 6159 }; 6160 6161 static const struct chan_info_nphy_radio2057_rev5 6162 chan_info_nphyrev8_2057_rev5[] = { 6163 { 6164 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, 6165 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, 6166 0x043a, 0x043f, 0x0443}, 6167 { 6168 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0d, 6169 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03cb, 0x03c7, 0x03c3, 6170 0x0438, 0x043d, 0x0441}, 6171 { 6172 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0d, 6173 0x08, 0x0e, 0x61, 0x03, 0xef, 0x61, 0x03, 0xef, 0x03cd, 0x03c9, 0x03c5, 6174 0x0436, 0x043a, 0x043f}, 6175 { 6176 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0c, 6177 0x08, 0x0e, 0x61, 0x03, 0xdf, 0x61, 0x03, 0xdf, 0x03cf, 0x03cb, 0x03c7, 6178 0x0434, 0x0438, 0x043d}, 6179 { 6180 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0c, 6181 0x07, 0x0d, 0x61, 0x03, 0xcf, 0x61, 0x03, 0xcf, 0x03d1, 0x03cd, 0x03c9, 6182 0x0431, 0x0436, 0x043a}, 6183 { 6184 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0c, 6185 0x07, 0x0d, 0x61, 0x03, 0xbf, 0x61, 0x03, 0xbf, 0x03d3, 0x03cf, 0x03cb, 6186 0x042f, 0x0434, 0x0438}, 6187 { 6188 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0b, 6189 0x07, 0x0d, 0x61, 0x03, 0xaf, 0x61, 0x03, 0xaf, 0x03d5, 0x03d1, 0x03cd, 6190 0x042d, 0x0431, 0x0436}, 6191 { 6192 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0b, 6193 0x07, 0x0d, 0x61, 0x03, 0x9f, 0x61, 0x03, 0x9f, 0x03d7, 0x03d3, 0x03cf, 6194 0x042b, 0x042f, 0x0434}, 6195 { 6196 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0b, 6197 0x07, 0x0d, 0x61, 0x03, 0x8f, 0x61, 0x03, 0x8f, 0x03d9, 0x03d5, 0x03d1, 6198 0x0429, 0x042d, 0x0431}, 6199 { 6200 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0b, 6201 0x07, 0x0c, 0x61, 0x03, 0x7f, 0x61, 0x03, 0x7f, 0x03db, 0x03d7, 0x03d3, 6202 0x0427, 0x042b, 0x042f}, 6203 { 6204 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0b, 6205 0x07, 0x0c, 0x61, 0x03, 0x6f, 0x61, 0x03, 0x6f, 0x03dd, 0x03d9, 0x03d5, 6206 0x0424, 0x0429, 0x042d}, 6207 { 6208 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0b, 6209 0x06, 0x0c, 0x61, 0x03, 0x5f, 0x61, 0x03, 0x5f, 0x03df, 0x03db, 0x03d7, 6210 0x0422, 0x0427, 0x042b}, 6211 { 6212 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0a, 6213 0x06, 0x0b, 0x61, 0x03, 0x4f, 0x61, 0x03, 0x4f, 0x03e1, 0x03dd, 0x03d9, 6214 0x0420, 0x0424, 0x0429}, 6215 { 6216 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0a, 6217 0x06, 0x0b, 0x61, 0x03, 0x3f, 0x61, 0x03, 0x3f, 0x03e6, 0x03e2, 0x03de, 6218 0x041b, 0x041f, 0x0424} 6219 }; 6220 6221 static const struct chan_info_nphy_radio2057_rev5 6222 chan_info_nphyrev9_2057_rev5v1[] = { 6223 { 6224 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, 6225 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, 6226 0x043a, 0x043f, 0x0443}, 6227 { 6228 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0d, 6229 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03cb, 0x03c7, 0x03c3, 6230 0x0438, 0x043d, 0x0441}, 6231 { 6232 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0d, 6233 0x08, 0x0e, 0x61, 0x03, 0xef, 0x61, 0x03, 0xef, 0x03cd, 0x03c9, 0x03c5, 6234 0x0436, 0x043a, 0x043f}, 6235 { 6236 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0c, 6237 0x08, 0x0e, 0x61, 0x03, 0xdf, 0x61, 0x03, 0xdf, 0x03cf, 0x03cb, 0x03c7, 6238 0x0434, 0x0438, 0x043d}, 6239 { 6240 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0c, 6241 0x07, 0x0d, 0x61, 0x03, 0xcf, 0x61, 0x03, 0xcf, 0x03d1, 0x03cd, 0x03c9, 6242 0x0431, 0x0436, 0x043a}, 6243 { 6244 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0c, 6245 0x07, 0x0d, 0x61, 0x03, 0xbf, 0x61, 0x03, 0xbf, 0x03d3, 0x03cf, 0x03cb, 6246 0x042f, 0x0434, 0x0438}, 6247 { 6248 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0b, 6249 0x07, 0x0d, 0x61, 0x03, 0xaf, 0x61, 0x03, 0xaf, 0x03d5, 0x03d1, 0x03cd, 6250 0x042d, 0x0431, 0x0436}, 6251 { 6252 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0b, 6253 0x07, 0x0d, 0x61, 0x03, 0x9f, 0x61, 0x03, 0x9f, 0x03d7, 0x03d3, 0x03cf, 6254 0x042b, 0x042f, 0x0434}, 6255 { 6256 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0b, 6257 0x07, 0x0d, 0x61, 0x03, 0x8f, 0x61, 0x03, 0x8f, 0x03d9, 0x03d5, 0x03d1, 6258 0x0429, 0x042d, 0x0431}, 6259 { 6260 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0b, 6261 0x07, 0x0c, 0x61, 0x03, 0x7f, 0x61, 0x03, 0x7f, 0x03db, 0x03d7, 0x03d3, 6262 0x0427, 0x042b, 0x042f}, 6263 { 6264 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0b, 6265 0x07, 0x0c, 0x61, 0x03, 0x6f, 0x61, 0x03, 0x6f, 0x03dd, 0x03d9, 0x03d5, 6266 0x0424, 0x0429, 0x042d}, 6267 { 6268 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0b, 6269 0x06, 0x0c, 0x61, 0x03, 0x5f, 0x61, 0x03, 0x5f, 0x03df, 0x03db, 0x03d7, 6270 0x0422, 0x0427, 0x042b}, 6271 { 6272 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0a, 6273 0x06, 0x0b, 0x61, 0x03, 0x4f, 0x61, 0x03, 0x4f, 0x03e1, 0x03dd, 0x03d9, 6274 0x0420, 0x0424, 0x0429}, 6275 { 6276 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0a, 6277 0x06, 0x0b, 0x61, 0x03, 0x3f, 0x61, 0x03, 0x3f, 0x03e6, 0x03e2, 0x03de, 6278 0x041b, 0x041f, 0x0424} 6279 }; 6280 6281 static const struct chan_info_nphy_radio2057 chan_info_nphyrev8_2057_rev7[] = { 6282 { 6283 184, 4920, 0x68, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xec, 0x01, 0x0f, 6284 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6285 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b4, 0x07b0, 0x07ac, 0x0214, 6286 0x0215, 6287 0x0216}, 6288 { 6289 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 6290 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6291 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b8, 0x07b4, 0x07b0, 0x0213, 6292 0x0214, 6293 0x0215}, 6294 { 6295 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, 6296 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6297 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07bc, 0x07b8, 0x07b4, 0x0212, 6298 0x0213, 6299 0x0214}, 6300 { 6301 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, 6302 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6303 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c0, 0x07bc, 0x07b8, 0x0211, 6304 0x0212, 6305 0x0213}, 6306 { 6307 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, 6308 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6309 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c4, 0x07c0, 0x07bc, 0x020f, 6310 0x0211, 6311 0x0212}, 6312 { 6313 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, 6314 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6315 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c8, 0x07c4, 0x07c0, 0x020e, 6316 0x020f, 6317 0x0211}, 6318 { 6319 196, 4980, 0x7c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf2, 0x01, 0x0f, 6320 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6321 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07cc, 0x07c8, 0x07c4, 0x020d, 6322 0x020e, 6323 0x020f}, 6324 { 6325 198, 4990, 0x7f, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf3, 0x01, 0x0f, 6326 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6327 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07d0, 0x07cc, 0x07c8, 0x020c, 6328 0x020d, 6329 0x020e}, 6330 { 6331 200, 5000, 0x82, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf4, 0x01, 0x0f, 6332 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6333 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d4, 0x07d0, 0x07cc, 0x020b, 6334 0x020c, 6335 0x020d}, 6336 { 6337 202, 5010, 0x86, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf5, 0x01, 0x0f, 6338 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6339 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d8, 0x07d4, 0x07d0, 0x020a, 6340 0x020b, 6341 0x020c}, 6342 { 6343 204, 5020, 0x89, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf6, 0x01, 0x0e, 6344 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6345 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07dc, 0x07d8, 0x07d4, 0x0209, 6346 0x020a, 6347 0x020b}, 6348 { 6349 206, 5030, 0x8c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf7, 0x01, 0x0e, 6350 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6351 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e0, 0x07dc, 0x07d8, 0x0208, 6352 0x0209, 6353 0x020a}, 6354 { 6355 208, 5040, 0x90, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf8, 0x01, 0x0e, 6356 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6357 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e4, 0x07e0, 0x07dc, 0x0207, 6358 0x0208, 6359 0x0209}, 6360 { 6361 210, 5050, 0x93, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf9, 0x01, 0x0e, 6362 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6363 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e8, 0x07e4, 0x07e0, 0x0206, 6364 0x0207, 6365 0x0208}, 6366 { 6367 212, 5060, 0x96, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfa, 0x01, 0x0e, 6368 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6369 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07ec, 0x07e8, 0x07e4, 0x0205, 6370 0x0206, 6371 0x0207}, 6372 { 6373 214, 5070, 0x9a, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfb, 0x01, 0x0e, 6374 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6375 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f0, 0x07ec, 0x07e8, 0x0204, 6376 0x0205, 6377 0x0206}, 6378 { 6379 216, 5080, 0x9d, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfc, 0x01, 0x0e, 6380 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6381 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f4, 0x07f0, 0x07ec, 0x0203, 6382 0x0204, 6383 0x0205}, 6384 { 6385 218, 5090, 0xa0, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfd, 0x01, 0x0e, 6386 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6387 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f8, 0x07f4, 0x07f0, 0x0202, 6388 0x0203, 6389 0x0204}, 6390 { 6391 220, 5100, 0xa4, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfe, 0x01, 0x0d, 6392 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6393 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x07fc, 0x07f8, 0x07f4, 0x0201, 6394 0x0202, 6395 0x0203}, 6396 { 6397 222, 5110, 0xa7, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xff, 0x01, 0x0d, 6398 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6399 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0800, 0x07fc, 0x07f8, 0x0200, 6400 0x0201, 6401 0x0202}, 6402 { 6403 224, 5120, 0xaa, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x00, 0x02, 0x0d, 6404 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6405 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0804, 0x0800, 0x07fc, 0x01ff, 6406 0x0200, 6407 0x0201}, 6408 { 6409 226, 5130, 0xae, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x01, 0x02, 0x0d, 6410 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6411 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0808, 0x0804, 0x0800, 0x01fe, 6412 0x01ff, 6413 0x0200}, 6414 { 6415 228, 5140, 0xb1, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x02, 0x02, 0x0d, 6416 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6417 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x080c, 0x0808, 0x0804, 0x01fd, 6418 0x01fe, 6419 0x01ff}, 6420 { 6421 32, 5160, 0xb8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x04, 0x02, 0x0d, 6422 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6423 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0814, 0x0810, 0x080c, 0x01fb, 6424 0x01fc, 6425 0x01fd}, 6426 { 6427 34, 5170, 0xbb, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x05, 0x02, 0x0d, 6428 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6429 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0818, 0x0814, 0x0810, 0x01fa, 6430 0x01fb, 6431 0x01fc}, 6432 { 6433 36, 5180, 0xbe, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x06, 0x02, 0x0c, 6434 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6435 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x081c, 0x0818, 0x0814, 0x01f9, 6436 0x01fa, 6437 0x01fb}, 6438 { 6439 38, 5190, 0xc2, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x07, 0x02, 0x0c, 6440 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6441 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0820, 0x081c, 0x0818, 0x01f8, 6442 0x01f9, 6443 0x01fa}, 6444 { 6445 40, 5200, 0xc5, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x08, 0x02, 0x0c, 6446 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6447 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0824, 0x0820, 0x081c, 0x01f7, 6448 0x01f8, 6449 0x01f9}, 6450 { 6451 42, 5210, 0xc8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x09, 0x02, 0x0c, 6452 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6453 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0828, 0x0824, 0x0820, 0x01f6, 6454 0x01f7, 6455 0x01f8}, 6456 { 6457 44, 5220, 0xcc, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x0a, 0x02, 0x0c, 6458 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6459 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x082c, 0x0828, 0x0824, 0x01f5, 6460 0x01f6, 6461 0x01f7}, 6462 { 6463 46, 5230, 0xcf, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x0b, 0x02, 0x0c, 6464 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6465 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0830, 0x082c, 0x0828, 0x01f4, 6466 0x01f5, 6467 0x01f6}, 6468 { 6469 48, 5240, 0xd2, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x0c, 0x02, 0x0c, 6470 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6471 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0834, 0x0830, 0x082c, 0x01f3, 6472 0x01f4, 6473 0x01f5}, 6474 { 6475 50, 5250, 0xd6, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x0d, 0x02, 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0x042f, 6983 0x0434}, 6984 { 6985 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, 6986 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 6987 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, 6988 0x042d, 6989 0x0431}, 6990 { 6991 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, 6992 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 6993 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, 6994 0x042b, 6995 0x042f}, 6996 { 6997 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, 6998 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 6999 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, 7000 0x0429, 7001 0x042d}, 7002 { 7003 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, 7004 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7005 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, 7006 0x0427, 7007 0x042b}, 7008 { 7009 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, 7010 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7011 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, 7012 0x0424, 7013 0x0429}, 7014 { 7015 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, 7016 0x04, 0x00, 0x04, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x61, 7017 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, 7018 0x041f, 7019 0x0424} 7020 }; 7021 7022 static const struct chan_info_nphy_radio2057 chan_info_nphyrev8_2057_rev8[] = { 7023 { 7024 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 7025 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7026 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b8, 0x07b4, 0x07b0, 0x0213, 7027 0x0214, 7028 0x0215}, 7029 { 7030 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, 7031 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7032 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07bc, 0x07b8, 0x07b4, 0x0212, 7033 0x0213, 7034 0x0214}, 7035 { 7036 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, 7037 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7038 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c0, 0x07bc, 0x07b8, 0x0211, 7039 0x0212, 7040 0x0213}, 7041 { 7042 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, 7043 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7044 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c4, 0x07c0, 0x07bc, 0x020f, 7045 0x0211, 7046 0x0212}, 7047 { 7048 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, 7049 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7050 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c8, 0x07c4, 0x07c0, 0x020e, 7051 0x020f, 7052 0x0211}, 7053 { 7054 196, 4980, 0x7c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf2, 0x01, 0x0f, 7055 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7056 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07cc, 0x07c8, 0x07c4, 0x020d, 7057 0x020e, 7058 0x020f}, 7059 { 7060 198, 4990, 0x7f, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf3, 0x01, 0x0f, 7061 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7062 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07d0, 0x07cc, 0x07c8, 0x020c, 7063 0x020d, 7064 0x020e}, 7065 { 7066 200, 5000, 0x82, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf4, 0x01, 0x0f, 7067 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7068 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d4, 0x07d0, 0x07cc, 0x020b, 7069 0x020c, 7070 0x020d}, 7071 { 7072 202, 5010, 0x86, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf5, 0x01, 0x0f, 7073 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7074 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d8, 0x07d4, 0x07d0, 0x020a, 7075 0x020b, 7076 0x020c}, 7077 { 7078 204, 5020, 0x89, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf6, 0x01, 0x0e, 7079 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7080 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07dc, 0x07d8, 0x07d4, 0x0209, 7081 0x020a, 7082 0x020b}, 7083 { 7084 206, 5030, 0x8c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf7, 0x01, 0x0e, 7085 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7086 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e0, 0x07dc, 0x07d8, 0x0208, 7087 0x0209, 7088 0x020a}, 7089 { 7090 208, 5040, 0x90, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf8, 0x01, 0x0e, 7091 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7092 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e4, 0x07e0, 0x07dc, 0x0207, 7093 0x0208, 7094 0x0209}, 7095 { 7096 210, 5050, 0x93, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf9, 0x01, 0x0e, 7097 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7098 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e8, 0x07e4, 0x07e0, 0x0206, 7099 0x0207, 7100 0x0208}, 7101 { 7102 212, 5060, 0x96, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfa, 0x01, 0x0e, 7103 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7104 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07ec, 0x07e8, 0x07e4, 0x0205, 7105 0x0206, 7106 0x0207}, 7107 { 7108 214, 5070, 0x9a, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfb, 0x01, 0x0e, 7109 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7110 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f0, 0x07ec, 0x07e8, 0x0204, 7111 0x0205, 7112 0x0206}, 7113 { 7114 216, 5080, 0x9d, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfc, 0x01, 0x0e, 7115 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7116 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f4, 0x07f0, 0x07ec, 0x0203, 7117 0x0204, 7118 0x0205}, 7119 { 7120 218, 5090, 0xa0, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfd, 0x01, 0x0e, 7121 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7122 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f8, 0x07f4, 0x07f0, 0x0202, 7123 0x0203, 7124 0x0204}, 7125 { 7126 220, 5100, 0xa4, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfe, 0x01, 0x0d, 7127 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7128 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x07fc, 0x07f8, 0x07f4, 0x0201, 7129 0x0202, 7130 0x0203}, 7131 { 7132 222, 5110, 0xa7, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xff, 0x01, 0x0d, 7133 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7134 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0800, 0x07fc, 0x07f8, 0x0200, 7135 0x0201, 7136 0x0202}, 7137 { 7138 224, 5120, 0xaa, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x00, 0x02, 0x0d, 7139 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7140 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0804, 0x0800, 0x07fc, 0x01ff, 7141 0x0200, 7142 0x0201}, 7143 { 7144 226, 5130, 0xae, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x01, 0x02, 0x0d, 7145 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7146 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0808, 0x0804, 0x0800, 0x01fe, 7147 0x01ff, 7148 0x0200}, 7149 { 7150 228, 5140, 0xb1, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x02, 0x02, 0x0d, 7151 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7152 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x080c, 0x0808, 0x0804, 0x01fd, 7153 0x01fe, 7154 0x01ff}, 7155 { 7156 32, 5160, 0xb8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x04, 0x02, 0x0d, 7157 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7158 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0814, 0x0810, 0x080c, 0x01fb, 7159 0x01fc, 7160 0x01fd}, 7161 { 7162 34, 5170, 0xbb, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x05, 0x02, 0x0d, 7163 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7164 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0818, 0x0814, 0x0810, 0x01fa, 7165 0x01fb, 7166 0x01fc}, 7167 { 7168 36, 5180, 0xbe, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x06, 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0x0c, 0x0c, 0x0c, 0x30, 0x48, 0x02, 0x05, 7631 0x00, 0x05, 0x00, 0x55, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7632 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 7633 0x01c1, 7634 0x01c2}, 7635 { 7636 170, 5850, 0x9e, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x49, 0x02, 0x04, 7637 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7638 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 7639 0x01c0, 7640 0x01c1}, 7641 { 7642 172, 5860, 0xa1, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4a, 0x02, 0x04, 7643 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7644 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 7645 0x01bf, 7646 0x01c0}, 7647 { 7648 174, 5870, 0xa4, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4b, 0x02, 0x04, 7649 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7650 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 7651 0x01bf, 7652 0x01bf}, 7653 { 7654 176, 5880, 0xa8, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4c, 0x02, 0x03, 7655 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7656 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 7657 0x01be, 7658 0x01bf}, 7659 { 7660 178, 5890, 0xab, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4d, 0x02, 0x03, 7661 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7662 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 7663 0x01bd, 7664 0x01be}, 7665 { 7666 180, 5900, 0xae, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4e, 0x02, 0x03, 7667 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7668 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 7669 0x01bc, 7670 0x01bd}, 7671 { 7672 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0f, 7673 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7674 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03c9, 0x03c5, 0x03c1, 0x043a, 7675 0x043f, 7676 0x0443}, 7677 { 7678 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0f, 7679 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7680 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cb, 0x03c7, 0x03c3, 0x0438, 7681 0x043d, 7682 0x0441}, 7683 { 7684 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0f, 7685 0x09, 0x00, 0x09, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7686 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cd, 0x03c9, 0x03c5, 0x0436, 7687 0x043a, 7688 0x043f}, 7689 { 7690 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0f, 7691 0x09, 0x00, 0x09, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7692 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cf, 0x03cb, 0x03c7, 0x0434, 7693 0x0438, 7694 0x043d}, 7695 { 7696 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0f, 7697 0x08, 0x00, 0x08, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7698 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d1, 0x03cd, 0x03c9, 0x0431, 7699 0x0436, 7700 0x043a}, 7701 { 7702 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0f, 7703 0x08, 0x00, 0x08, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7704 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d3, 0x03cf, 0x03cb, 0x042f, 7705 0x0434, 7706 0x0438}, 7707 { 7708 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0f, 7709 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7710 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d5, 0x03d1, 0x03cd, 0x042d, 7711 0x0431, 7712 0x0436}, 7713 { 7714 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0f, 7715 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7716 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d7, 0x03d3, 0x03cf, 0x042b, 7717 0x042f, 7718 0x0434}, 7719 { 7720 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, 7721 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7722 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, 7723 0x042d, 7724 0x0431}, 7725 { 7726 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, 7727 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7728 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, 7729 0x042b, 7730 0x042f}, 7731 { 7732 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, 7733 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7734 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, 7735 0x0429, 7736 0x042d}, 7737 { 7738 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, 7739 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7740 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, 7741 0x0427, 7742 0x042b}, 7743 { 7744 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, 7745 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7746 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, 7747 0x0424, 7748 0x0429}, 7749 { 7750 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, 7751 0x04, 0x00, 0x04, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x61, 7752 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, 7753 0x041f, 7754 0x0424} 7755 }; 7756 7757 static struct radio_regs regs_2055[] = { 7758 {0x02, 0x80, 0x80, 0, 0}, 7759 {0x03, 0, 0, 0, 0}, 7760 {0x04, 0x27, 0x27, 0, 0}, 7761 {0x05, 0, 0, 0, 0}, 7762 {0x06, 0x27, 0x27, 0, 0}, 7763 {0x07, 0x7f, 0x7f, 1, 1}, 7764 {0x08, 0x7, 0x7, 1, 1}, 7765 {0x09, 0x7f, 0x7f, 1, 1}, 7766 {0x0A, 0x7, 0x7, 1, 1}, 7767 {0x0B, 0x15, 0x15, 0, 0}, 7768 {0x0C, 0x15, 0x15, 0, 0}, 7769 {0x0D, 0x4f, 0x4f, 1, 1}, 7770 {0x0E, 0x5, 0x5, 1, 1}, 7771 {0x0F, 0x4f, 0x4f, 1, 1}, 7772 {0x10, 0x5, 0x5, 1, 1}, 7773 {0x11, 0xd0, 0xd0, 0, 0}, 7774 {0x12, 0x2, 0x2, 0, 0}, 7775 {0x13, 0, 0, 0, 0}, 7776 {0x14, 0x40, 0x40, 0, 0}, 7777 {0x15, 0, 0, 0, 0}, 7778 {0x16, 0, 0, 0, 0}, 7779 {0x17, 0, 0, 0, 0}, 7780 {0x18, 0, 0, 0, 0}, 7781 {0x19, 0, 0, 0, 0}, 7782 {0x1A, 0, 0, 0, 0}, 7783 {0x1B, 0, 0, 0, 0}, 7784 {0x1C, 0, 0, 0, 0}, 7785 {0x1D, 0xc0, 0xc0, 0, 0}, 7786 {0x1E, 0xff, 0xff, 0, 0}, 7787 {0x1F, 0xc0, 0xc0, 0, 0}, 7788 {0x20, 0xff, 0xff, 0, 0}, 7789 {0x21, 0xc0, 0xc0, 0, 0}, 7790 {0x22, 0, 0, 0, 0}, 7791 {0x23, 0x2c, 0x2c, 0, 0}, 7792 {0x24, 0, 0, 0, 0}, 7793 {0x25, 0, 0, 0, 0}, 7794 {0x26, 0, 0, 0, 0}, 7795 {0x27, 0, 0, 0, 0}, 7796 {0x28, 0, 0, 0, 0}, 7797 {0x29, 0, 0, 0, 0}, 7798 {0x2A, 0, 0, 0, 0}, 7799 {0x2B, 0, 0, 0, 0}, 7800 {0x2C, 0, 0, 0, 0}, 7801 {0x2D, 0xa4, 0xa4, 0, 0}, 7802 {0x2E, 0x38, 0x38, 0, 0}, 7803 {0x2F, 0, 0, 0, 0}, 7804 {0x30, 0x4, 0x4, 1, 1}, 7805 {0x31, 0, 0, 0, 0}, 7806 {0x32, 0xa, 0xa, 0, 0}, 7807 {0x33, 0x87, 0x87, 0, 0}, 7808 {0x34, 0x9, 0x9, 0, 0}, 7809 {0x35, 0x70, 0x70, 0, 0}, 7810 {0x36, 0x11, 0x11, 0, 0}, 7811 {0x37, 0x18, 0x18, 1, 1}, 7812 {0x38, 0x6, 0x6, 0, 0}, 7813 {0x39, 0x4, 0x4, 1, 1}, 7814 {0x3A, 0x6, 0x6, 0, 0}, 7815 {0x3B, 0x9e, 0x9e, 0, 0}, 7816 {0x3C, 0x9, 0x9, 0, 0}, 7817 {0x3D, 0xc8, 0xc8, 1, 1}, 7818 {0x3E, 0x88, 0x88, 0, 0}, 7819 {0x3F, 0, 0, 0, 0}, 7820 {0x40, 0, 0, 0, 0}, 7821 {0x41, 0, 0, 0, 0}, 7822 {0x42, 0x1, 0x1, 0, 0}, 7823 {0x43, 0x2, 0x2, 0, 0}, 7824 {0x44, 0x96, 0x96, 0, 0}, 7825 {0x45, 0x3e, 0x3e, 0, 0}, 7826 {0x46, 0x3e, 0x3e, 0, 0}, 7827 {0x47, 0x13, 0x13, 0, 0}, 7828 {0x48, 0x2, 0x2, 0, 0}, 7829 {0x49, 0x15, 0x15, 0, 0}, 7830 {0x4A, 0x7, 0x7, 0, 0}, 7831 {0x4B, 0, 0, 0, 0}, 7832 {0x4C, 0, 0, 0, 0}, 7833 {0x4D, 0, 0, 0, 0}, 7834 {0x4E, 0, 0, 0, 0}, 7835 {0x4F, 0, 0, 0, 0}, 7836 {0x50, 0x8, 0x8, 0, 0}, 7837 {0x51, 0x8, 0x8, 0, 0}, 7838 {0x52, 0x6, 0x6, 0, 0}, 7839 {0x53, 0x84, 0x84, 1, 1}, 7840 {0x54, 0xc3, 0xc3, 0, 0}, 7841 {0x55, 0x8f, 0x8f, 0, 0}, 7842 {0x56, 0xff, 0xff, 0, 0}, 7843 {0x57, 0xff, 0xff, 0, 0}, 7844 {0x58, 0x88, 0x88, 0, 0}, 7845 {0x59, 0x88, 0x88, 0, 0}, 7846 {0x5A, 0, 0, 0, 0}, 7847 {0x5B, 0xcc, 0xcc, 0, 0}, 7848 {0x5C, 0x6, 0x6, 0, 0}, 7849 {0x5D, 0x80, 0x80, 0, 0}, 7850 {0x5E, 0x80, 0x80, 0, 0}, 7851 {0x5F, 0xf8, 0xf8, 0, 0}, 7852 {0x60, 0x88, 0x88, 0, 0}, 7853 {0x61, 0x88, 0x88, 0, 0}, 7854 {0x62, 0x88, 0x8, 1, 1}, 7855 {0x63, 0x88, 0x88, 0, 0}, 7856 {0x64, 0, 0, 0, 0}, 7857 {0x65, 0x1, 0x1, 1, 1}, 7858 {0x66, 0x8a, 0x8a, 0, 0}, 7859 {0x67, 0x8, 0x8, 0, 0}, 7860 {0x68, 0x83, 0x83, 0, 0}, 7861 {0x69, 0x6, 0x6, 0, 0}, 7862 {0x6A, 0xa0, 0xa0, 0, 0}, 7863 {0x6B, 0xa, 0xa, 0, 0}, 7864 {0x6C, 0x87, 0x87, 1, 1}, 7865 {0x6D, 0x2a, 0x2a, 0, 0}, 7866 {0x6E, 0x2a, 0x2a, 0, 0}, 7867 {0x6F, 0x2a, 0x2a, 0, 0}, 7868 {0x70, 0x2a, 0x2a, 0, 0}, 7869 {0x71, 0x18, 0x18, 0, 0}, 7870 {0x72, 0x6a, 0x6a, 1, 1}, 7871 {0x73, 0xab, 0xab, 1, 1}, 7872 {0x74, 0x13, 0x13, 1, 1}, 7873 {0x75, 0xc1, 0xc1, 1, 1}, 7874 {0x76, 0xaa, 0xaa, 1, 1}, 7875 {0x77, 0x87, 0x87, 1, 1}, 7876 {0x78, 0, 0, 0, 0}, 7877 {0x79, 0x6, 0x6, 0, 0}, 7878 {0x7A, 0x7, 0x7, 0, 0}, 7879 {0x7B, 0x7, 0x7, 0, 0}, 7880 {0x7C, 0x15, 0x15, 0, 0}, 7881 {0x7D, 0x55, 0x55, 0, 0}, 7882 {0x7E, 0x97, 0x97, 1, 1}, 7883 {0x7F, 0x8, 0x8, 0, 0}, 7884 {0x80, 0x14, 0x14, 1, 1}, 7885 {0x81, 0x33, 0x33, 0, 0}, 7886 {0x82, 0x88, 0x88, 0, 0}, 7887 {0x83, 0x6, 0x6, 0, 0}, 7888 {0x84, 0x3, 0x3, 1, 1}, 7889 {0x85, 0xa, 0xa, 0, 0}, 7890 {0x86, 0x3, 0x3, 1, 1}, 7891 {0x87, 0x2a, 0x2a, 0, 0}, 7892 {0x88, 0xa4, 0xa4, 0, 0}, 7893 {0x89, 0x18, 0x18, 0, 0}, 7894 {0x8A, 0x28, 0x28, 0, 0}, 7895 {0x8B, 0, 0, 0, 0}, 7896 {0x8C, 0x4a, 0x4a, 0, 0}, 7897 {0x8D, 0, 0, 0, 0}, 7898 {0x8E, 0xf8, 0xf8, 0, 0}, 7899 {0x8F, 0x88, 0x88, 0, 0}, 7900 {0x90, 0x88, 0x88, 0, 0}, 7901 {0x91, 0x88, 0x8, 1, 1}, 7902 {0x92, 0x88, 0x88, 0, 0}, 7903 {0x93, 0, 0, 0, 0}, 7904 {0x94, 0x1, 0x1, 1, 1}, 7905 {0x95, 0x8a, 0x8a, 0, 0}, 7906 {0x96, 0x8, 0x8, 0, 0}, 7907 {0x97, 0x83, 0x83, 0, 0}, 7908 {0x98, 0x6, 0x6, 0, 0}, 7909 {0x99, 0xa0, 0xa0, 0, 0}, 7910 {0x9A, 0xa, 0xa, 0, 0}, 7911 {0x9B, 0x87, 0x87, 1, 1}, 7912 {0x9C, 0x2a, 0x2a, 0, 0}, 7913 {0x9D, 0x2a, 0x2a, 0, 0}, 7914 {0x9E, 0x2a, 0x2a, 0, 0}, 7915 {0x9F, 0x2a, 0x2a, 0, 0}, 7916 {0xA0, 0x18, 0x18, 0, 0}, 7917 {0xA1, 0x6a, 0x6a, 1, 1}, 7918 {0xA2, 0xab, 0xab, 1, 1}, 7919 {0xA3, 0x13, 0x13, 1, 1}, 7920 {0xA4, 0xc1, 0xc1, 1, 1}, 7921 {0xA5, 0xaa, 0xaa, 1, 1}, 7922 {0xA6, 0x87, 0x87, 1, 1}, 7923 {0xA7, 0, 0, 0, 0}, 7924 {0xA8, 0x6, 0x6, 0, 0}, 7925 {0xA9, 0x7, 0x7, 0, 0}, 7926 {0xAA, 0x7, 0x7, 0, 0}, 7927 {0xAB, 0x15, 0x15, 0, 0}, 7928 {0xAC, 0x55, 0x55, 0, 0}, 7929 {0xAD, 0x97, 0x97, 1, 1}, 7930 {0xAE, 0x8, 0x8, 0, 0}, 7931 {0xAF, 0x14, 0x14, 1, 1}, 7932 {0xB0, 0x33, 0x33, 0, 0}, 7933 {0xB1, 0x88, 0x88, 0, 0}, 7934 {0xB2, 0x6, 0x6, 0, 0}, 7935 {0xB3, 0x3, 0x3, 1, 1}, 7936 {0xB4, 0xa, 0xa, 0, 0}, 7937 {0xB5, 0x3, 0x3, 1, 1}, 7938 {0xB6, 0x2a, 0x2a, 0, 0}, 7939 {0xB7, 0xa4, 0xa4, 0, 0}, 7940 {0xB8, 0x18, 0x18, 0, 0}, 7941 {0xB9, 0x28, 0x28, 0, 0}, 7942 {0xBA, 0, 0, 0, 0}, 7943 {0xBB, 0x4a, 0x4a, 0, 0}, 7944 {0xBC, 0, 0, 0, 0}, 7945 {0xBD, 0x71, 0x71, 0, 0}, 7946 {0xBE, 0x72, 0x72, 0, 0}, 7947 {0xBF, 0x73, 0x73, 0, 0}, 7948 {0xC0, 0x74, 0x74, 0, 0}, 7949 {0xC1, 0x75, 0x75, 0, 0}, 7950 {0xC2, 0x76, 0x76, 0, 0}, 7951 {0xC3, 0x77, 0x77, 0, 0}, 7952 {0xC4, 0x78, 0x78, 0, 0}, 7953 {0xC5, 0x79, 0x79, 0, 0}, 7954 {0xC6, 0x7a, 0x7a, 0, 0}, 7955 {0xC7, 0, 0, 0, 0}, 7956 {0xC8, 0, 0, 0, 0}, 7957 {0xC9, 0, 0, 0, 0}, 7958 {0xCA, 0, 0, 0, 0}, 7959 {0xCB, 0, 0, 0, 0}, 7960 {0xCC, 0, 0, 0, 0}, 7961 {0xCD, 0, 0, 0, 0}, 7962 {0xCE, 0x6, 0x6, 0, 0}, 7963 {0xCF, 0, 0, 0, 0}, 7964 {0xD0, 0, 0, 0, 0}, 7965 {0xD1, 0x18, 0x18, 0, 0}, 7966 {0xD2, 0x88, 0x88, 0, 0}, 7967 {0xD3, 0, 0, 0, 0}, 7968 {0xD4, 0, 0, 0, 0}, 7969 {0xD5, 0, 0, 0, 0}, 7970 {0xD6, 0, 0, 0, 0}, 7971 {0xD7, 0, 0, 0, 0}, 7972 {0xD8, 0, 0, 0, 0}, 7973 {0xD9, 0, 0, 0, 0}, 7974 {0xDA, 0x6, 0x6, 0, 0}, 7975 {0xDB, 0, 0, 0, 0}, 7976 {0xDC, 0, 0, 0, 0}, 7977 {0xDD, 0x18, 0x18, 0, 0}, 7978 {0xDE, 0x88, 0x88, 0, 0}, 7979 {0xDF, 0, 0, 0, 0}, 7980 {0xE0, 0, 0, 0, 0}, 7981 {0xE1, 0, 0, 0, 0}, 7982 {0xE2, 0, 0, 0, 0}, 7983 {0xFFFF, 0, 0, 0, 0}, 7984 }; 7985 7986 static struct radio_regs regs_SYN_2056[] = { 7987 {0x02, 0, 0, 0, 0}, 7988 {0x03, 0, 0, 0, 0}, 7989 {0x04, 0, 0, 0, 0}, 7990 {0x05, 0, 0, 0, 0}, 7991 {0x06, 0, 0, 0, 0}, 7992 {0x07, 0, 0, 0, 0}, 7993 {0x08, 0, 0, 0, 0}, 7994 {0x09, 0x1, 0x1, 0, 0}, 7995 {0x0A, 0, 0, 0, 0}, 7996 {0x0B, 0, 0, 0, 0}, 7997 {0x0C, 0, 0, 0, 0}, 7998 {0x0D, 0, 0, 0, 0}, 7999 {0x0E, 0, 0, 0, 0}, 8000 {0x0F, 0, 0, 0, 0}, 8001 {0x10, 0, 0, 0, 0}, 8002 {0x11, 0, 0, 0, 0}, 8003 {0x12, 0, 0, 0, 0}, 8004 {0x13, 0, 0, 0, 0}, 8005 {0x14, 0, 0, 0, 0}, 8006 {0x15, 0, 0, 0, 0}, 8007 {0x16, 0, 0, 0, 0}, 8008 {0x17, 0, 0, 0, 0}, 8009 {0x18, 0, 0, 0, 0}, 8010 {0x19, 0, 0, 0, 0}, 8011 {0x1A, 0, 0, 0, 0}, 8012 {0x1B, 0, 0, 0, 0}, 8013 {0x1C, 0, 0, 0, 0}, 8014 {0x1D, 0, 0, 0, 0}, 8015 {0x1E, 0, 0, 0, 0}, 8016 {0x1F, 0, 0, 0, 0}, 8017 {0x20, 0, 0, 0, 0}, 8018 {0x21, 0, 0, 0, 0}, 8019 {0x22, 0x60, 0x60, 0, 0}, 8020 {0x23, 0x6, 0x6, 0, 0}, 8021 {0x24, 0xc, 0xc, 0, 0}, 8022 {0x25, 0, 0, 0, 0}, 8023 {0x26, 0, 0, 0, 0}, 8024 {0x27, 0, 0, 0, 0}, 8025 {0x28, 0x1, 0x1, 0, 0}, 8026 {0x29, 0, 0, 0, 0}, 8027 {0x2A, 0, 0, 0, 0}, 8028 {0x2B, 0, 0, 0, 0}, 8029 {0x2C, 0, 0, 0, 0}, 8030 {0x2D, 0, 0, 0, 0}, 8031 {0x2E, 0xd, 0xd, 0, 0}, 8032 {0x2F, 0x1f, 0x1f, 0, 0}, 8033 {0x30, 0x15, 0x15, 0, 0}, 8034 {0x31, 0xf, 0xf, 0, 0}, 8035 {0x32, 0, 0, 0, 0}, 8036 {0x33, 0, 0, 0, 0}, 8037 {0x34, 0, 0, 0, 0}, 8038 {0x35, 0, 0, 0, 0}, 8039 {0x36, 0, 0, 0, 0}, 8040 {0x37, 0, 0, 0, 0}, 8041 {0x38, 0, 0, 0, 0}, 8042 {0x39, 0, 0, 0, 0}, 8043 {0x3A, 0, 0, 0, 0}, 8044 {0x3B, 0, 0, 0, 0}, 8045 {0x3C, 0x13, 0x13, 0, 0}, 8046 {0x3D, 0xf, 0xf, 0, 0}, 8047 {0x3E, 0x18, 0x18, 0, 0}, 8048 {0x3F, 0, 0, 0, 0}, 8049 {0x40, 0, 0, 0, 0}, 8050 {0x41, 0x20, 0x20, 0, 0}, 8051 {0x42, 0x20, 0x20, 0, 0}, 8052 {0x43, 0, 0, 0, 0}, 8053 {0x44, 0x77, 0x77, 0, 0}, 8054 {0x45, 0x7, 0x7, 0, 0}, 8055 {0x46, 0x1, 0x1, 0, 0}, 8056 {0x47, 0x4, 0x4, 0, 0}, 8057 {0x48, 0xf, 0xf, 0, 0}, 8058 {0x49, 0x30, 0x30, 0, 0}, 8059 {0x4A, 0x32, 0x32, 0, 0}, 8060 {0x4B, 0xd, 0xd, 0, 0}, 8061 {0x4C, 0xd, 0xd, 0, 0}, 8062 {0x4D, 0x4, 0x4, 0, 0}, 8063 {0x4E, 0x6, 0x6, 0, 0}, 8064 {0x4F, 0x1, 0x1, 0, 0}, 8065 {0x50, 0x1c, 0x1c, 0, 0}, 8066 {0x51, 0x2, 0x2, 0, 0}, 8067 {0x52, 0x2, 0x2, 0, 0}, 8068 {0x53, 0xf7, 0xf7, 1, 1}, 8069 {0x54, 0xb4, 0xb4, 0, 0}, 8070 {0x55, 0xd2, 0xd2, 0, 0}, 8071 {0x56, 0, 0, 0, 0}, 8072 {0x57, 0, 0, 0, 0}, 8073 {0x58, 0x4, 0x4, 0, 0}, 8074 {0x59, 0x96, 0x96, 0, 0}, 8075 {0x5A, 0x3e, 0x3e, 0, 0}, 8076 {0x5B, 0x3e, 0x3e, 0, 0}, 8077 {0x5C, 0x13, 0x13, 0, 0}, 8078 {0x5D, 0x2, 0x2, 0, 0}, 8079 {0x5E, 0, 0, 0, 0}, 8080 {0x5F, 0x7, 0x7, 0, 0}, 8081 {0x60, 0x7, 0x7, 1, 1}, 8082 {0x61, 0x8, 0x8, 0, 0}, 8083 {0x62, 0x3, 0x3, 0, 0}, 8084 {0x63, 0, 0, 0, 0}, 8085 {0x64, 0, 0, 0, 0}, 8086 {0x65, 0, 0, 0, 0}, 8087 {0x66, 0, 0, 0, 0}, 8088 {0x67, 0, 0, 0, 0}, 8089 {0x68, 0x40, 0x40, 0, 0}, 8090 {0x69, 0, 0, 0, 0}, 8091 {0x6A, 0, 0, 0, 0}, 8092 {0x6B, 0, 0, 0, 0}, 8093 {0x6C, 0, 0, 0, 0}, 8094 {0x6D, 0x1, 0x1, 0, 0}, 8095 {0x6E, 0, 0, 0, 0}, 8096 {0x6F, 0, 0, 0, 0}, 8097 {0x70, 0x60, 0x60, 0, 0}, 8098 {0x71, 0x66, 0x66, 0, 0}, 8099 {0x72, 0xc, 0xc, 0, 0}, 8100 {0x73, 0x66, 0x66, 0, 0}, 8101 {0x74, 0x8f, 0x8f, 1, 1}, 8102 {0x75, 0, 0, 0, 0}, 8103 {0x76, 0xcc, 0xcc, 0, 0}, 8104 {0x77, 0x1, 0x1, 0, 0}, 8105 {0x78, 0x66, 0x66, 0, 0}, 8106 {0x79, 0x66, 0x66, 0, 0}, 8107 {0x7A, 0, 0, 0, 0}, 8108 {0x7B, 0, 0, 0, 0}, 8109 {0x7C, 0, 0, 0, 0}, 8110 {0x7D, 0, 0, 0, 0}, 8111 {0x7E, 0, 0, 0, 0}, 8112 {0x7F, 0, 0, 0, 0}, 8113 {0x80, 0, 0, 0, 0}, 8114 {0x81, 0, 0, 0, 0}, 8115 {0x82, 0, 0, 0, 0}, 8116 {0x83, 0, 0, 0, 0}, 8117 {0x84, 0, 0, 0, 0}, 8118 {0x85, 0xff, 0xff, 0, 0}, 8119 {0x86, 0, 0, 0, 0}, 8120 {0x87, 0, 0, 0, 0}, 8121 {0x88, 0, 0, 0, 0}, 8122 {0x89, 0, 0, 0, 0}, 8123 {0x8A, 0, 0, 0, 0}, 8124 {0x8B, 0, 0, 0, 0}, 8125 {0x8C, 0, 0, 0, 0}, 8126 {0x8D, 0, 0, 0, 0}, 8127 {0x8E, 0, 0, 0, 0}, 8128 {0x8F, 0, 0, 0, 0}, 8129 {0x90, 0, 0, 0, 0}, 8130 {0x91, 0, 0, 0, 0}, 8131 {0x92, 0, 0, 0, 0}, 8132 {0x93, 0, 0, 0, 0}, 8133 {0x94, 0, 0, 0, 0}, 8134 {0x95, 0, 0, 0, 0}, 8135 {0x96, 0, 0, 0, 0}, 8136 {0x97, 0, 0, 0, 0}, 8137 {0x98, 0, 0, 0, 0}, 8138 {0x99, 0, 0, 0, 0}, 8139 {0x9A, 0, 0, 0, 0}, 8140 {0x9B, 0, 0, 0, 0}, 8141 {0x9C, 0, 0, 0, 0}, 8142 {0x9D, 0, 0, 0, 0}, 8143 {0x9E, 0, 0, 0, 0}, 8144 {0x9F, 0x6, 0x6, 0, 0}, 8145 {0xA0, 0x66, 0x66, 0, 0}, 8146 {0xA1, 0x66, 0x66, 0, 0}, 8147 {0xA2, 0x66, 0x66, 0, 0}, 8148 {0xA3, 0x66, 0x66, 0, 0}, 8149 {0xA4, 0x66, 0x66, 0, 0}, 8150 {0xA5, 0x66, 0x66, 0, 0}, 8151 {0xA6, 0x66, 0x66, 0, 0}, 8152 {0xA7, 0x66, 0x66, 0, 0}, 8153 {0xA8, 0x66, 0x66, 0, 0}, 8154 {0xA9, 0x66, 0x66, 0, 0}, 8155 {0xAA, 0x66, 0x66, 0, 0}, 8156 {0xAB, 0x66, 0x66, 0, 0}, 8157 {0xAC, 0x66, 0x66, 0, 0}, 8158 {0xAD, 0x66, 0x66, 0, 0}, 8159 {0xAE, 0x66, 0x66, 0, 0}, 8160 {0xAF, 0x66, 0x66, 0, 0}, 8161 {0xB0, 0x66, 0x66, 0, 0}, 8162 {0xB1, 0x66, 0x66, 0, 0}, 8163 {0xB2, 0x66, 0x66, 0, 0}, 8164 {0xB3, 0xa, 0xa, 0, 0}, 8165 {0xB4, 0, 0, 0, 0}, 8166 {0xB5, 0, 0, 0, 0}, 8167 {0xB6, 0, 0, 0, 0}, 8168 {0xFFFF, 0, 0, 0, 0} 8169 }; 8170 8171 static struct radio_regs regs_TX_2056[] = { 8172 {0x02, 0, 0, 0, 0}, 8173 {0x03, 0, 0, 0, 0}, 8174 {0x04, 0, 0, 0, 0}, 8175 {0x05, 0, 0, 0, 0}, 8176 {0x06, 0, 0, 0, 0}, 8177 {0x07, 0, 0, 0, 0}, 8178 {0x08, 0, 0, 0, 0}, 8179 {0x09, 0, 0, 0, 0}, 8180 {0x0A, 0, 0, 0, 0}, 8181 {0x0B, 0, 0, 0, 0}, 8182 {0x0C, 0, 0, 0, 0}, 8183 {0x0D, 0, 0, 0, 0}, 8184 {0x0E, 0, 0, 0, 0}, 8185 {0x0F, 0, 0, 0, 0}, 8186 {0x10, 0, 0, 0, 0}, 8187 {0x11, 0, 0, 0, 0}, 8188 {0x12, 0, 0, 0, 0}, 8189 {0x13, 0, 0, 0, 0}, 8190 {0x14, 0, 0, 0, 0}, 8191 {0x15, 0, 0, 0, 0}, 8192 {0x16, 0, 0, 0, 0}, 8193 {0x17, 0, 0, 0, 0}, 8194 {0x18, 0, 0, 0, 0}, 8195 {0x19, 0, 0, 0, 0}, 8196 {0x1A, 0, 0, 0, 0}, 8197 {0x1B, 0, 0, 0, 0}, 8198 {0x1C, 0, 0, 0, 0}, 8199 {0x1D, 0, 0, 0, 0}, 8200 {0x1E, 0, 0, 0, 0}, 8201 {0x1F, 0, 0, 0, 0}, 8202 {0x20, 0, 0, 0, 0}, 8203 {0x21, 0x88, 0x88, 0, 0}, 8204 {0x22, 0x88, 0x88, 0, 0}, 8205 {0x23, 0x88, 0x88, 0, 0}, 8206 {0x24, 0x88, 0x88, 0, 0}, 8207 {0x25, 0xc, 0xc, 0, 0}, 8208 {0x26, 0, 0, 0, 0}, 8209 {0x27, 0x3, 0x3, 0, 0}, 8210 {0x28, 0, 0, 0, 0}, 8211 {0x29, 0x3, 0x3, 0, 0}, 8212 {0x2A, 0x37, 0x37, 0, 0}, 8213 {0x2B, 0x3, 0x3, 0, 0}, 8214 {0x2C, 0, 0, 0, 0}, 8215 {0x2D, 0, 0, 0, 0}, 8216 {0x2E, 0x1, 0x1, 0, 0}, 8217 {0x2F, 0x1, 0x1, 0, 0}, 8218 {0x30, 0, 0, 0, 0}, 8219 {0x31, 0, 0, 0, 0}, 8220 {0x32, 0, 0, 0, 0}, 8221 {0x33, 0x11, 0x11, 0, 0}, 8222 {0x34, 0x11, 0x11, 0, 0}, 8223 {0x35, 0, 0, 0, 0}, 8224 {0x36, 0, 0, 0, 0}, 8225 {0x37, 0x3, 0x3, 0, 0}, 8226 {0x38, 0xf, 0xf, 0, 0}, 8227 {0x39, 0, 0, 0, 0}, 8228 {0x3A, 0x2d, 0x2d, 0, 0}, 8229 {0x3B, 0, 0, 0, 0}, 8230 {0x3C, 0x6e, 0x6e, 0, 0}, 8231 {0x3D, 0xf0, 0xf0, 1, 1}, 8232 {0x3E, 0, 0, 0, 0}, 8233 {0x3F, 0, 0, 0, 0}, 8234 {0x40, 0, 0, 0, 0}, 8235 {0x41, 0x3, 0x3, 0, 0}, 8236 {0x42, 0x3, 0x3, 0, 0}, 8237 {0x43, 0, 0, 0, 0}, 8238 {0x44, 0x1e, 0x1e, 0, 0}, 8239 {0x45, 0, 0, 0, 0}, 8240 {0x46, 0x6e, 0x6e, 0, 0}, 8241 {0x47, 0xf0, 0xf0, 1, 1}, 8242 {0x48, 0, 0, 0, 0}, 8243 {0x49, 0x2, 0x2, 0, 0}, 8244 {0x4A, 0xff, 0xff, 1, 1}, 8245 {0x4B, 0xc, 0xc, 0, 0}, 8246 {0x4C, 0, 0, 0, 0}, 8247 {0x4D, 0x38, 0x38, 0, 0}, 8248 {0x4E, 0x70, 0x70, 1, 1}, 8249 {0x4F, 0x2, 0x2, 0, 0}, 8250 {0x50, 0x88, 0x88, 0, 0}, 8251 {0x51, 0xc, 0xc, 0, 0}, 8252 {0x52, 0, 0, 0, 0}, 8253 {0x53, 0x8, 0x8, 0, 0}, 8254 {0x54, 0x70, 0x70, 1, 1}, 8255 {0x55, 0x2, 0x2, 0, 0}, 8256 {0x56, 0xff, 0xff, 1, 1}, 8257 {0x57, 0, 0, 0, 0}, 8258 {0x58, 0x83, 0x83, 0, 0}, 8259 {0x59, 0x77, 0x77, 1, 1}, 8260 {0x5A, 0, 0, 0, 0}, 8261 {0x5B, 0x2, 0x2, 0, 0}, 8262 {0x5C, 0x88, 0x88, 0, 0}, 8263 {0x5D, 0, 0, 0, 0}, 8264 {0x5E, 0x8, 0x8, 0, 0}, 8265 {0x5F, 0x77, 0x77, 1, 1}, 8266 {0x60, 0x1, 0x1, 0, 0}, 8267 {0x61, 0, 0, 0, 0}, 8268 {0x62, 0x7, 0x7, 0, 0}, 8269 {0x63, 0, 0, 0, 0}, 8270 {0x64, 0x7, 0x7, 0, 0}, 8271 {0x65, 0, 0, 0, 0}, 8272 {0x66, 0, 0, 0, 0}, 8273 {0x67, 0x74, 0x74, 1, 1}, 8274 {0x68, 0, 0, 0, 0}, 8275 {0x69, 0xa, 0xa, 0, 0}, 8276 {0x6A, 0, 0, 0, 0}, 8277 {0x6B, 0, 0, 0, 0}, 8278 {0x6C, 0, 0, 0, 0}, 8279 {0x6D, 0, 0, 0, 0}, 8280 {0x6E, 0, 0, 0, 0}, 8281 {0x6F, 0, 0, 0, 0}, 8282 {0x70, 0, 0, 0, 0}, 8283 {0x71, 0x2, 0x2, 0, 0}, 8284 {0x72, 0, 0, 0, 0}, 8285 {0x73, 0, 0, 0, 0}, 8286 {0x74, 0xe, 0xe, 0, 0}, 8287 {0x75, 0xe, 0xe, 0, 0}, 8288 {0x76, 0xe, 0xe, 0, 0}, 8289 {0x77, 0x13, 0x13, 0, 0}, 8290 {0x78, 0x13, 0x13, 0, 0}, 8291 {0x79, 0x1b, 0x1b, 0, 0}, 8292 {0x7A, 0x1b, 0x1b, 0, 0}, 8293 {0x7B, 0x55, 0x55, 0, 0}, 8294 {0x7C, 0x5b, 0x5b, 0, 0}, 8295 {0x7D, 0, 0, 0, 0}, 8296 {0x7E, 0, 0, 0, 0}, 8297 {0x7F, 0, 0, 0, 0}, 8298 {0x80, 0, 0, 0, 0}, 8299 {0x81, 0, 0, 0, 0}, 8300 {0x82, 0, 0, 0, 0}, 8301 {0x83, 0, 0, 0, 0}, 8302 {0x84, 0, 0, 0, 0}, 8303 {0x85, 0, 0, 0, 0}, 8304 {0x86, 0, 0, 0, 0}, 8305 {0x87, 0, 0, 0, 0}, 8306 {0x88, 0, 0, 0, 0}, 8307 {0x89, 0, 0, 0, 0}, 8308 {0x8A, 0, 0, 0, 0}, 8309 {0x8B, 0, 0, 0, 0}, 8310 {0x8C, 0, 0, 0, 0}, 8311 {0x8D, 0, 0, 0, 0}, 8312 {0x8E, 0, 0, 0, 0}, 8313 {0x8F, 0, 0, 0, 0}, 8314 {0x90, 0, 0, 0, 0}, 8315 {0x91, 0, 0, 0, 0}, 8316 {0x92, 0, 0, 0, 0}, 8317 {0xFFFF, 0, 0, 0, 0} 8318 }; 8319 8320 static struct radio_regs regs_RX_2056[] = { 8321 {0x02, 0, 0, 0, 0}, 8322 {0x03, 0, 0, 0, 0}, 8323 {0x04, 0, 0, 0, 0}, 8324 {0x05, 0, 0, 0, 0}, 8325 {0x06, 0, 0, 0, 0}, 8326 {0x07, 0, 0, 0, 0}, 8327 {0x08, 0, 0, 0, 0}, 8328 {0x09, 0, 0, 0, 0}, 8329 {0x0A, 0, 0, 0, 0}, 8330 {0x0B, 0, 0, 0, 0}, 8331 {0x0C, 0, 0, 0, 0}, 8332 {0x0D, 0, 0, 0, 0}, 8333 {0x0E, 0, 0, 0, 0}, 8334 {0x0F, 0, 0, 0, 0}, 8335 {0x10, 0, 0, 0, 0}, 8336 {0x11, 0, 0, 0, 0}, 8337 {0x12, 0, 0, 0, 0}, 8338 {0x13, 0, 0, 0, 0}, 8339 {0x14, 0, 0, 0, 0}, 8340 {0x15, 0, 0, 0, 0}, 8341 {0x16, 0, 0, 0, 0}, 8342 {0x17, 0, 0, 0, 0}, 8343 {0x18, 0, 0, 0, 0}, 8344 {0x19, 0, 0, 0, 0}, 8345 {0x1A, 0, 0, 0, 0}, 8346 {0x1B, 0, 0, 0, 0}, 8347 {0x1C, 0, 0, 0, 0}, 8348 {0x1D, 0, 0, 0, 0}, 8349 {0x1E, 0, 0, 0, 0}, 8350 {0x1F, 0, 0, 0, 0}, 8351 {0x20, 0x3, 0x3, 0, 0}, 8352 {0x21, 0, 0, 0, 0}, 8353 {0x22, 0, 0, 0, 0}, 8354 {0x23, 0x90, 0x90, 0, 0}, 8355 {0x24, 0x55, 0x55, 0, 0}, 8356 {0x25, 0x15, 0x15, 0, 0}, 8357 {0x26, 0x5, 0x5, 0, 0}, 8358 {0x27, 0x15, 0x15, 0, 0}, 8359 {0x28, 0x5, 0x5, 0, 0}, 8360 {0x29, 0x20, 0x20, 0, 0}, 8361 {0x2A, 0x11, 0x11, 0, 0}, 8362 {0x2B, 0x90, 0x90, 0, 0}, 8363 {0x2C, 0, 0, 0, 0}, 8364 {0x2D, 0x88, 0x88, 0, 0}, 8365 {0x2E, 0x32, 0x32, 0, 0}, 8366 {0x2F, 0x77, 0x77, 0, 0}, 8367 {0x30, 0x17, 0x17, 1, 1}, 8368 {0x31, 0xff, 0xff, 1, 1}, 8369 {0x32, 0x20, 0x20, 0, 0}, 8370 {0x33, 0, 0, 0, 0}, 8371 {0x34, 0x88, 0x88, 0, 0}, 8372 {0x35, 0x32, 0x32, 0, 0}, 8373 {0x36, 0x77, 0x77, 0, 0}, 8374 {0x37, 0x17, 0x17, 1, 1}, 8375 {0x38, 0xf0, 0xf0, 1, 1}, 8376 {0x39, 0x20, 0x20, 0, 0}, 8377 {0x3A, 0x8, 0x8, 0, 0}, 8378 {0x3B, 0x99, 0x99, 0, 0}, 8379 {0x3C, 0, 0, 0, 0}, 8380 {0x3D, 0x44, 0x44, 1, 1}, 8381 {0x3E, 0, 0, 0, 0}, 8382 {0x3F, 0x44, 0x44, 0, 0}, 8383 {0x40, 0xf, 0xf, 1, 1}, 8384 {0x41, 0x6, 0x6, 0, 0}, 8385 {0x42, 0x4, 0x4, 0, 0}, 8386 {0x43, 0x50, 0x50, 1, 1}, 8387 {0x44, 0x8, 0x8, 0, 0}, 8388 {0x45, 0x99, 0x99, 0, 0}, 8389 {0x46, 0, 0, 0, 0}, 8390 {0x47, 0x11, 0x11, 0, 0}, 8391 {0x48, 0, 0, 0, 0}, 8392 {0x49, 0x44, 0x44, 0, 0}, 8393 {0x4A, 0x7, 0x7, 0, 0}, 8394 {0x4B, 0x6, 0x6, 0, 0}, 8395 {0x4C, 0x4, 0x4, 0, 0}, 8396 {0x4D, 0, 0, 0, 0}, 8397 {0x4E, 0, 0, 0, 0}, 8398 {0x4F, 0x66, 0x66, 0, 0}, 8399 {0x50, 0x66, 0x66, 0, 0}, 8400 {0x51, 0x57, 0x57, 0, 0}, 8401 {0x52, 0x57, 0x57, 0, 0}, 8402 {0x53, 0x44, 0x44, 0, 0}, 8403 {0x54, 0, 0, 0, 0}, 8404 {0x55, 0, 0, 0, 0}, 8405 {0x56, 0x8, 0x8, 0, 0}, 8406 {0x57, 0x8, 0x8, 0, 0}, 8407 {0x58, 0x7, 0x7, 0, 0}, 8408 {0x59, 0x22, 0x22, 0, 0}, 8409 {0x5A, 0x22, 0x22, 0, 0}, 8410 {0x5B, 0x2, 0x2, 0, 0}, 8411 {0x5C, 0x23, 0x23, 0, 0}, 8412 {0x5D, 0x7, 0x7, 0, 0}, 8413 {0x5E, 0x55, 0x55, 0, 0}, 8414 {0x5F, 0x23, 0x23, 0, 0}, 8415 {0x60, 0x41, 0x41, 0, 0}, 8416 {0x61, 0x1, 0x1, 0, 0}, 8417 {0x62, 0xa, 0xa, 0, 0}, 8418 {0x63, 0, 0, 0, 0}, 8419 {0x64, 0, 0, 0, 0}, 8420 {0x65, 0, 0, 0, 0}, 8421 {0x66, 0, 0, 0, 0}, 8422 {0x67, 0, 0, 0, 0}, 8423 {0x68, 0, 0, 0, 0}, 8424 {0x69, 0, 0, 0, 0}, 8425 {0x6A, 0, 0, 0, 0}, 8426 {0x6B, 0xc, 0xc, 0, 0}, 8427 {0x6C, 0, 0, 0, 0}, 8428 {0x6D, 0, 0, 0, 0}, 8429 {0x6E, 0, 0, 0, 0}, 8430 {0x6F, 0, 0, 0, 0}, 8431 {0x70, 0, 0, 0, 0}, 8432 {0x71, 0, 0, 0, 0}, 8433 {0x72, 0x22, 0x22, 0, 0}, 8434 {0x73, 0x22, 0x22, 0, 0}, 8435 {0x74, 0x2, 0x2, 0, 0}, 8436 {0x75, 0xa, 0xa, 0, 0}, 8437 {0x76, 0x1, 0x1, 0, 0}, 8438 {0x77, 0x22, 0x22, 0, 0}, 8439 {0x78, 0x30, 0x30, 0, 0}, 8440 {0x79, 0, 0, 0, 0}, 8441 {0x7A, 0, 0, 0, 0}, 8442 {0x7B, 0, 0, 0, 0}, 8443 {0x7C, 0, 0, 0, 0}, 8444 {0x7D, 0, 0, 0, 0}, 8445 {0x7E, 0, 0, 0, 0}, 8446 {0x7F, 0, 0, 0, 0}, 8447 {0x80, 0, 0, 0, 0}, 8448 {0x81, 0, 0, 0, 0}, 8449 {0x82, 0, 0, 0, 0}, 8450 {0x83, 0, 0, 0, 0}, 8451 {0x84, 0, 0, 0, 0}, 8452 {0x85, 0, 0, 0, 0}, 8453 {0x86, 0, 0, 0, 0}, 8454 {0x87, 0, 0, 0, 0}, 8455 {0x88, 0, 0, 0, 0}, 8456 {0x89, 0, 0, 0, 0}, 8457 {0x8A, 0, 0, 0, 0}, 8458 {0x8B, 0, 0, 0, 0}, 8459 {0x8C, 0, 0, 0, 0}, 8460 {0x8D, 0, 0, 0, 0}, 8461 {0x8E, 0, 0, 0, 0}, 8462 {0x8F, 0, 0, 0, 0}, 8463 {0x90, 0, 0, 0, 0}, 8464 {0x91, 0, 0, 0, 0}, 8465 {0x92, 0, 0, 0, 0}, 8466 {0x93, 0, 0, 0, 0}, 8467 {0x94, 0, 0, 0, 0}, 8468 {0xFFFF, 0, 0, 0, 0} 8469 }; 8470 8471 static struct radio_regs regs_SYN_2056_A1[] = { 8472 {0x02, 0, 0, 0, 0}, 8473 {0x03, 0, 0, 0, 0}, 8474 {0x04, 0, 0, 0, 0}, 8475 {0x05, 0, 0, 0, 0}, 8476 {0x06, 0, 0, 0, 0}, 8477 {0x07, 0, 0, 0, 0}, 8478 {0x08, 0, 0, 0, 0}, 8479 {0x09, 0x1, 0x1, 0, 0}, 8480 {0x0A, 0, 0, 0, 0}, 8481 {0x0B, 0, 0, 0, 0}, 8482 {0x0C, 0, 0, 0, 0}, 8483 {0x0D, 0, 0, 0, 0}, 8484 {0x0E, 0, 0, 0, 0}, 8485 {0x0F, 0, 0, 0, 0}, 8486 {0x10, 0, 0, 0, 0}, 8487 {0x11, 0, 0, 0, 0}, 8488 {0x12, 0, 0, 0, 0}, 8489 {0x13, 0, 0, 0, 0}, 8490 {0x14, 0, 0, 0, 0}, 8491 {0x15, 0, 0, 0, 0}, 8492 {0x16, 0, 0, 0, 0}, 8493 {0x17, 0, 0, 0, 0}, 8494 {0x18, 0, 0, 0, 0}, 8495 {0x19, 0, 0, 0, 0}, 8496 {0x1A, 0, 0, 0, 0}, 8497 {0x1B, 0, 0, 0, 0}, 8498 {0x1C, 0, 0, 0, 0}, 8499 {0x1D, 0, 0, 0, 0}, 8500 {0x1E, 0, 0, 0, 0}, 8501 {0x1F, 0, 0, 0, 0}, 8502 {0x20, 0, 0, 0, 0}, 8503 {0x21, 0, 0, 0, 0}, 8504 {0x22, 0x60, 0x60, 0, 0}, 8505 {0x23, 0x6, 0x6, 0, 0}, 8506 {0x24, 0xc, 0xc, 0, 0}, 8507 {0x25, 0, 0, 0, 0}, 8508 {0x26, 0, 0, 0, 0}, 8509 {0x27, 0, 0, 0, 0}, 8510 {0x28, 0x1, 0x1, 0, 0}, 8511 {0x29, 0, 0, 0, 0}, 8512 {0x2A, 0, 0, 0, 0}, 8513 {0x2B, 0, 0, 0, 0}, 8514 {0x2C, 0, 0, 0, 0}, 8515 {0x2D, 0, 0, 0, 0}, 8516 {0x2E, 0xd, 0xd, 0, 0}, 8517 {0x2F, 0x1f, 0x1f, 0, 0}, 8518 {0x30, 0x15, 0x15, 0, 0}, 8519 {0x31, 0xf, 0xf, 0, 0}, 8520 {0x32, 0, 0, 0, 0}, 8521 {0x33, 0, 0, 0, 0}, 8522 {0x34, 0, 0, 0, 0}, 8523 {0x35, 0, 0, 0, 0}, 8524 {0x36, 0, 0, 0, 0}, 8525 {0x37, 0, 0, 0, 0}, 8526 {0x38, 0, 0, 0, 0}, 8527 {0x39, 0, 0, 0, 0}, 8528 {0x3A, 0, 0, 0, 0}, 8529 {0x3B, 0, 0, 0, 0}, 8530 {0x3C, 0x13, 0x13, 0, 0}, 8531 {0x3D, 0xf, 0xf, 0, 0}, 8532 {0x3E, 0x18, 0x18, 0, 0}, 8533 {0x3F, 0, 0, 0, 0}, 8534 {0x40, 0, 0, 0, 0}, 8535 {0x41, 0x20, 0x20, 0, 0}, 8536 {0x42, 0x20, 0x20, 0, 0}, 8537 {0x43, 0, 0, 0, 0}, 8538 {0x44, 0x77, 0x77, 0, 0}, 8539 {0x45, 0x7, 0x7, 0, 0}, 8540 {0x46, 0x1, 0x1, 0, 0}, 8541 {0x47, 0x4, 0x4, 0, 0}, 8542 {0x48, 0xf, 0xf, 0, 0}, 8543 {0x49, 0x30, 0x30, 0, 0}, 8544 {0x4A, 0x32, 0x32, 0, 0}, 8545 {0x4B, 0xd, 0xd, 0, 0}, 8546 {0x4C, 0xd, 0xd, 0, 0}, 8547 {0x4D, 0x4, 0x4, 0, 0}, 8548 {0x4E, 0x6, 0x6, 0, 0}, 8549 {0x4F, 0x1, 0x1, 0, 0}, 8550 {0x50, 0x1c, 0x1c, 0, 0}, 8551 {0x51, 0x2, 0x2, 0, 0}, 8552 {0x52, 0x2, 0x2, 0, 0}, 8553 {0x53, 0xf7, 0xf7, 1, 1}, 8554 {0x54, 0xb4, 0xb4, 0, 0}, 8555 {0x55, 0xd2, 0xd2, 0, 0}, 8556 {0x56, 0, 0, 0, 0}, 8557 {0x57, 0, 0, 0, 0}, 8558 {0x58, 0x4, 0x4, 0, 0}, 8559 {0x59, 0x96, 0x96, 0, 0}, 8560 {0x5A, 0x3e, 0x3e, 0, 0}, 8561 {0x5B, 0x3e, 0x3e, 0, 0}, 8562 {0x5C, 0x13, 0x13, 0, 0}, 8563 {0x5D, 0x2, 0x2, 0, 0}, 8564 {0x5E, 0, 0, 0, 0}, 8565 {0x5F, 0x7, 0x7, 0, 0}, 8566 {0x60, 0x7, 0x7, 1, 1}, 8567 {0x61, 0x8, 0x8, 0, 0}, 8568 {0x62, 0x3, 0x3, 0, 0}, 8569 {0x63, 0, 0, 0, 0}, 8570 {0x64, 0, 0, 0, 0}, 8571 {0x65, 0, 0, 0, 0}, 8572 {0x66, 0, 0, 0, 0}, 8573 {0x67, 0, 0, 0, 0}, 8574 {0x68, 0x40, 0x40, 0, 0}, 8575 {0x69, 0, 0, 0, 0}, 8576 {0x6A, 0, 0, 0, 0}, 8577 {0x6B, 0, 0, 0, 0}, 8578 {0x6C, 0, 0, 0, 0}, 8579 {0x6D, 0x1, 0x1, 0, 0}, 8580 {0x6E, 0, 0, 0, 0}, 8581 {0x6F, 0, 0, 0, 0}, 8582 {0x70, 0x60, 0x60, 0, 0}, 8583 {0x71, 0x66, 0x66, 0, 0}, 8584 {0x72, 0xc, 0xc, 0, 0}, 8585 {0x73, 0x66, 0x66, 0, 0}, 8586 {0x74, 0x8f, 0x8f, 1, 1}, 8587 {0x75, 0, 0, 0, 0}, 8588 {0x76, 0xcc, 0xcc, 0, 0}, 8589 {0x77, 0x1, 0x1, 0, 0}, 8590 {0x78, 0x66, 0x66, 0, 0}, 8591 {0x79, 0x66, 0x66, 0, 0}, 8592 {0x7A, 0, 0, 0, 0}, 8593 {0x7B, 0, 0, 0, 0}, 8594 {0x7C, 0, 0, 0, 0}, 8595 {0x7D, 0, 0, 0, 0}, 8596 {0x7E, 0, 0, 0, 0}, 8597 {0x7F, 0, 0, 0, 0}, 8598 {0x80, 0, 0, 0, 0}, 8599 {0x81, 0, 0, 0, 0}, 8600 {0x82, 0, 0, 0, 0}, 8601 {0x83, 0, 0, 0, 0}, 8602 {0x84, 0, 0, 0, 0}, 8603 {0x85, 0xff, 0xff, 0, 0}, 8604 {0x86, 0, 0, 0, 0}, 8605 {0x87, 0, 0, 0, 0}, 8606 {0x88, 0, 0, 0, 0}, 8607 {0x89, 0, 0, 0, 0}, 8608 {0x8A, 0, 0, 0, 0}, 8609 {0x8B, 0, 0, 0, 0}, 8610 {0x8C, 0, 0, 0, 0}, 8611 {0x8D, 0, 0, 0, 0}, 8612 {0x8E, 0, 0, 0, 0}, 8613 {0x8F, 0, 0, 0, 0}, 8614 {0x90, 0, 0, 0, 0}, 8615 {0x91, 0, 0, 0, 0}, 8616 {0x92, 0, 0, 0, 0}, 8617 {0x93, 0, 0, 0, 0}, 8618 {0x94, 0, 0, 0, 0}, 8619 {0x95, 0, 0, 0, 0}, 8620 {0x96, 0, 0, 0, 0}, 8621 {0x97, 0, 0, 0, 0}, 8622 {0x98, 0, 0, 0, 0}, 8623 {0x99, 0, 0, 0, 0}, 8624 {0x9A, 0, 0, 0, 0}, 8625 {0x9B, 0, 0, 0, 0}, 8626 {0x9C, 0, 0, 0, 0}, 8627 {0x9D, 0, 0, 0, 0}, 8628 {0x9E, 0, 0, 0, 0}, 8629 {0x9F, 0x6, 0x6, 0, 0}, 8630 {0xA0, 0x66, 0x66, 0, 0}, 8631 {0xA1, 0x66, 0x66, 0, 0}, 8632 {0xA2, 0x66, 0x66, 0, 0}, 8633 {0xA3, 0x66, 0x66, 0, 0}, 8634 {0xA4, 0x66, 0x66, 0, 0}, 8635 {0xA5, 0x66, 0x66, 0, 0}, 8636 {0xA6, 0x66, 0x66, 0, 0}, 8637 {0xA7, 0x66, 0x66, 0, 0}, 8638 {0xA8, 0x66, 0x66, 0, 0}, 8639 {0xA9, 0x66, 0x66, 0, 0}, 8640 {0xAA, 0x66, 0x66, 0, 0}, 8641 {0xAB, 0x66, 0x66, 0, 0}, 8642 {0xAC, 0x66, 0x66, 0, 0}, 8643 {0xAD, 0x66, 0x66, 0, 0}, 8644 {0xAE, 0x66, 0x66, 0, 0}, 8645 {0xAF, 0x66, 0x66, 0, 0}, 8646 {0xB0, 0x66, 0x66, 0, 0}, 8647 {0xB1, 0x66, 0x66, 0, 0}, 8648 {0xB2, 0x66, 0x66, 0, 0}, 8649 {0xB3, 0xa, 0xa, 0, 0}, 8650 {0xB4, 0, 0, 0, 0}, 8651 {0xB5, 0, 0, 0, 0}, 8652 {0xB6, 0, 0, 0, 0}, 8653 {0xFFFF, 0, 0, 0, 0} 8654 }; 8655 8656 static struct radio_regs regs_TX_2056_A1[] = { 8657 {0x02, 0, 0, 0, 0}, 8658 {0x03, 0, 0, 0, 0}, 8659 {0x04, 0, 0, 0, 0}, 8660 {0x05, 0, 0, 0, 0}, 8661 {0x06, 0, 0, 0, 0}, 8662 {0x07, 0, 0, 0, 0}, 8663 {0x08, 0, 0, 0, 0}, 8664 {0x09, 0, 0, 0, 0}, 8665 {0x0A, 0, 0, 0, 0}, 8666 {0x0B, 0, 0, 0, 0}, 8667 {0x0C, 0, 0, 0, 0}, 8668 {0x0D, 0, 0, 0, 0}, 8669 {0x0E, 0, 0, 0, 0}, 8670 {0x0F, 0, 0, 0, 0}, 8671 {0x10, 0, 0, 0, 0}, 8672 {0x11, 0, 0, 0, 0}, 8673 {0x12, 0, 0, 0, 0}, 8674 {0x13, 0, 0, 0, 0}, 8675 {0x14, 0, 0, 0, 0}, 8676 {0x15, 0, 0, 0, 0}, 8677 {0x16, 0, 0, 0, 0}, 8678 {0x17, 0, 0, 0, 0}, 8679 {0x18, 0, 0, 0, 0}, 8680 {0x19, 0, 0, 0, 0}, 8681 {0x1A, 0, 0, 0, 0}, 8682 {0x1B, 0, 0, 0, 0}, 8683 {0x1C, 0, 0, 0, 0}, 8684 {0x1D, 0, 0, 0, 0}, 8685 {0x1E, 0, 0, 0, 0}, 8686 {0x1F, 0, 0, 0, 0}, 8687 {0x20, 0, 0, 0, 0}, 8688 {0x21, 0x88, 0x88, 0, 0}, 8689 {0x22, 0x88, 0x88, 0, 0}, 8690 {0x23, 0x88, 0x88, 0, 0}, 8691 {0x24, 0x88, 0x88, 0, 0}, 8692 {0x25, 0xc, 0xc, 0, 0}, 8693 {0x26, 0, 0, 0, 0}, 8694 {0x27, 0x3, 0x3, 0, 0}, 8695 {0x28, 0, 0, 0, 0}, 8696 {0x29, 0x3, 0x3, 0, 0}, 8697 {0x2A, 0x37, 0x37, 0, 0}, 8698 {0x2B, 0x3, 0x3, 0, 0}, 8699 {0x2C, 0, 0, 0, 0}, 8700 {0x2D, 0, 0, 0, 0}, 8701 {0x2E, 0x1, 0x1, 0, 0}, 8702 {0x2F, 0x1, 0x1, 0, 0}, 8703 {0x30, 0, 0, 0, 0}, 8704 {0x31, 0, 0, 0, 0}, 8705 {0x32, 0, 0, 0, 0}, 8706 {0x33, 0x11, 0x11, 0, 0}, 8707 {0x34, 0x11, 0x11, 0, 0}, 8708 {0x35, 0, 0, 0, 0}, 8709 {0x36, 0, 0, 0, 0}, 8710 {0x37, 0x3, 0x3, 0, 0}, 8711 {0x38, 0xf, 0xf, 0, 0}, 8712 {0x39, 0, 0, 0, 0}, 8713 {0x3A, 0x2d, 0x2d, 0, 0}, 8714 {0x3B, 0, 0, 0, 0}, 8715 {0x3C, 0x6e, 0x6e, 0, 0}, 8716 {0x3D, 0xf0, 0xf0, 1, 1}, 8717 {0x3E, 0, 0, 0, 0}, 8718 {0x3F, 0, 0, 0, 0}, 8719 {0x40, 0, 0, 0, 0}, 8720 {0x41, 0x3, 0x3, 0, 0}, 8721 {0x42, 0x3, 0x3, 0, 0}, 8722 {0x43, 0, 0, 0, 0}, 8723 {0x44, 0x1e, 0x1e, 0, 0}, 8724 {0x45, 0, 0, 0, 0}, 8725 {0x46, 0x6e, 0x6e, 0, 0}, 8726 {0x47, 0xf0, 0xf0, 1, 1}, 8727 {0x48, 0, 0, 0, 0}, 8728 {0x49, 0x2, 0x2, 0, 0}, 8729 {0x4A, 0xff, 0xff, 1, 1}, 8730 {0x4B, 0xc, 0xc, 0, 0}, 8731 {0x4C, 0, 0, 0, 0}, 8732 {0x4D, 0x38, 0x38, 0, 0}, 8733 {0x4E, 0x70, 0x70, 1, 1}, 8734 {0x4F, 0x2, 0x2, 0, 0}, 8735 {0x50, 0x88, 0x88, 0, 0}, 8736 {0x51, 0xc, 0xc, 0, 0}, 8737 {0x52, 0, 0, 0, 0}, 8738 {0x53, 0x8, 0x8, 0, 0}, 8739 {0x54, 0x70, 0x70, 1, 1}, 8740 {0x55, 0x2, 0x2, 0, 0}, 8741 {0x56, 0xff, 0xff, 1, 1}, 8742 {0x57, 0, 0, 0, 0}, 8743 {0x58, 0x83, 0x83, 0, 0}, 8744 {0x59, 0x77, 0x77, 1, 1}, 8745 {0x5A, 0, 0, 0, 0}, 8746 {0x5B, 0x2, 0x2, 0, 0}, 8747 {0x5C, 0x88, 0x88, 0, 0}, 8748 {0x5D, 0, 0, 0, 0}, 8749 {0x5E, 0x8, 0x8, 0, 0}, 8750 {0x5F, 0x77, 0x77, 1, 1}, 8751 {0x60, 0x1, 0x1, 0, 0}, 8752 {0x61, 0, 0, 0, 0}, 8753 {0x62, 0x7, 0x7, 0, 0}, 8754 {0x63, 0, 0, 0, 0}, 8755 {0x64, 0x7, 0x7, 0, 0}, 8756 {0x65, 0, 0, 0, 0}, 8757 {0x66, 0, 0, 0, 0}, 8758 {0x67, 0x72, 0x72, 1, 1}, 8759 {0x68, 0, 0, 0, 0}, 8760 {0x69, 0xa, 0xa, 0, 0}, 8761 {0x6A, 0, 0, 0, 0}, 8762 {0x6B, 0, 0, 0, 0}, 8763 {0x6C, 0, 0, 0, 0}, 8764 {0x6D, 0, 0, 0, 0}, 8765 {0x6E, 0, 0, 0, 0}, 8766 {0x6F, 0, 0, 0, 0}, 8767 {0x70, 0, 0, 0, 0}, 8768 {0x71, 0x2, 0x2, 0, 0}, 8769 {0x72, 0, 0, 0, 0}, 8770 {0x73, 0, 0, 0, 0}, 8771 {0x74, 0xe, 0xe, 0, 0}, 8772 {0x75, 0xe, 0xe, 0, 0}, 8773 {0x76, 0xe, 0xe, 0, 0}, 8774 {0x77, 0x13, 0x13, 0, 0}, 8775 {0x78, 0x13, 0x13, 0, 0}, 8776 {0x79, 0x1b, 0x1b, 0, 0}, 8777 {0x7A, 0x1b, 0x1b, 0, 0}, 8778 {0x7B, 0x55, 0x55, 0, 0}, 8779 {0x7C, 0x5b, 0x5b, 0, 0}, 8780 {0x7D, 0, 0, 0, 0}, 8781 {0x7E, 0, 0, 0, 0}, 8782 {0x7F, 0, 0, 0, 0}, 8783 {0x80, 0, 0, 0, 0}, 8784 {0x81, 0, 0, 0, 0}, 8785 {0x82, 0, 0, 0, 0}, 8786 {0x83, 0, 0, 0, 0}, 8787 {0x84, 0, 0, 0, 0}, 8788 {0x85, 0, 0, 0, 0}, 8789 {0x86, 0, 0, 0, 0}, 8790 {0x87, 0, 0, 0, 0}, 8791 {0x88, 0, 0, 0, 0}, 8792 {0x89, 0, 0, 0, 0}, 8793 {0x8A, 0, 0, 0, 0}, 8794 {0x8B, 0, 0, 0, 0}, 8795 {0x8C, 0, 0, 0, 0}, 8796 {0x8D, 0, 0, 0, 0}, 8797 {0x8E, 0, 0, 0, 0}, 8798 {0x8F, 0, 0, 0, 0}, 8799 {0x90, 0, 0, 0, 0}, 8800 {0x91, 0, 0, 0, 0}, 8801 {0x92, 0, 0, 0, 0}, 8802 {0xFFFF, 0, 0, 0, 0} 8803 }; 8804 8805 static struct radio_regs regs_RX_2056_A1[] = { 8806 {0x02, 0, 0, 0, 0}, 8807 {0x03, 0, 0, 0, 0}, 8808 {0x04, 0, 0, 0, 0}, 8809 {0x05, 0, 0, 0, 0}, 8810 {0x06, 0, 0, 0, 0}, 8811 {0x07, 0, 0, 0, 0}, 8812 {0x08, 0, 0, 0, 0}, 8813 {0x09, 0, 0, 0, 0}, 8814 {0x0A, 0, 0, 0, 0}, 8815 {0x0B, 0, 0, 0, 0}, 8816 {0x0C, 0, 0, 0, 0}, 8817 {0x0D, 0, 0, 0, 0}, 8818 {0x0E, 0, 0, 0, 0}, 8819 {0x0F, 0, 0, 0, 0}, 8820 {0x10, 0, 0, 0, 0}, 8821 {0x11, 0, 0, 0, 0}, 8822 {0x12, 0, 0, 0, 0}, 8823 {0x13, 0, 0, 0, 0}, 8824 {0x14, 0, 0, 0, 0}, 8825 {0x15, 0, 0, 0, 0}, 8826 {0x16, 0, 0, 0, 0}, 8827 {0x17, 0, 0, 0, 0}, 8828 {0x18, 0, 0, 0, 0}, 8829 {0x19, 0, 0, 0, 0}, 8830 {0x1A, 0, 0, 0, 0}, 8831 {0x1B, 0, 0, 0, 0}, 8832 {0x1C, 0, 0, 0, 0}, 8833 {0x1D, 0, 0, 0, 0}, 8834 {0x1E, 0, 0, 0, 0}, 8835 {0x1F, 0, 0, 0, 0}, 8836 {0x20, 0x3, 0x3, 0, 0}, 8837 {0x21, 0, 0, 0, 0}, 8838 {0x22, 0, 0, 0, 0}, 8839 {0x23, 0x90, 0x90, 0, 0}, 8840 {0x24, 0x55, 0x55, 0, 0}, 8841 {0x25, 0x15, 0x15, 0, 0}, 8842 {0x26, 0x5, 0x5, 0, 0}, 8843 {0x27, 0x15, 0x15, 0, 0}, 8844 {0x28, 0x5, 0x5, 0, 0}, 8845 {0x29, 0x20, 0x20, 0, 0}, 8846 {0x2A, 0x11, 0x11, 0, 0}, 8847 {0x2B, 0x90, 0x90, 0, 0}, 8848 {0x2C, 0, 0, 0, 0}, 8849 {0x2D, 0x88, 0x88, 0, 0}, 8850 {0x2E, 0x32, 0x32, 0, 0}, 8851 {0x2F, 0x77, 0x77, 0, 0}, 8852 {0x30, 0x17, 0x17, 1, 1}, 8853 {0x31, 0xff, 0xff, 1, 1}, 8854 {0x32, 0x20, 0x20, 0, 0}, 8855 {0x33, 0, 0, 0, 0}, 8856 {0x34, 0x88, 0x88, 0, 0}, 8857 {0x35, 0x32, 0x32, 0, 0}, 8858 {0x36, 0x77, 0x77, 0, 0}, 8859 {0x37, 0x17, 0x17, 1, 1}, 8860 {0x38, 0xf0, 0xf0, 1, 1}, 8861 {0x39, 0x20, 0x20, 0, 0}, 8862 {0x3A, 0x8, 0x8, 0, 0}, 8863 {0x3B, 0x55, 0x55, 1, 1}, 8864 {0x3C, 0, 0, 0, 0}, 8865 {0x3D, 0x44, 0x44, 1, 1}, 8866 {0x3E, 0, 0, 0, 0}, 8867 {0x3F, 0x44, 0x44, 0, 0}, 8868 {0x40, 0xf, 0xf, 1, 1}, 8869 {0x41, 0x6, 0x6, 0, 0}, 8870 {0x42, 0x4, 0x4, 0, 0}, 8871 {0x43, 0x50, 0x50, 1, 1}, 8872 {0x44, 0x8, 0x8, 0, 0}, 8873 {0x45, 0x55, 0x55, 1, 1}, 8874 {0x46, 0, 0, 0, 0}, 8875 {0x47, 0x11, 0x11, 0, 0}, 8876 {0x48, 0, 0, 0, 0}, 8877 {0x49, 0x44, 0x44, 0, 0}, 8878 {0x4A, 0x7, 0x7, 0, 0}, 8879 {0x4B, 0x6, 0x6, 0, 0}, 8880 {0x4C, 0x4, 0x4, 0, 0}, 8881 {0x4D, 0, 0, 0, 0}, 8882 {0x4E, 0, 0, 0, 0}, 8883 {0x4F, 0x26, 0x26, 1, 1}, 8884 {0x50, 0x26, 0x26, 1, 1}, 8885 {0x51, 0xf, 0xf, 1, 1}, 8886 {0x52, 0xf, 0xf, 1, 1}, 8887 {0x53, 0x44, 0x44, 0, 0}, 8888 {0x54, 0, 0, 0, 0}, 8889 {0x55, 0, 0, 0, 0}, 8890 {0x56, 0x8, 0x8, 0, 0}, 8891 {0x57, 0x8, 0x8, 0, 0}, 8892 {0x58, 0x7, 0x7, 0, 0}, 8893 {0x59, 0x22, 0x22, 0, 0}, 8894 {0x5A, 0x22, 0x22, 0, 0}, 8895 {0x5B, 0x2, 0x2, 0, 0}, 8896 {0x5C, 0x2f, 0x2f, 1, 1}, 8897 {0x5D, 0x7, 0x7, 0, 0}, 8898 {0x5E, 0x55, 0x55, 0, 0}, 8899 {0x5F, 0x23, 0x23, 0, 0}, 8900 {0x60, 0x41, 0x41, 0, 0}, 8901 {0x61, 0x1, 0x1, 0, 0}, 8902 {0x62, 0xa, 0xa, 0, 0}, 8903 {0x63, 0, 0, 0, 0}, 8904 {0x64, 0, 0, 0, 0}, 8905 {0x65, 0, 0, 0, 0}, 8906 {0x66, 0, 0, 0, 0}, 8907 {0x67, 0, 0, 0, 0}, 8908 {0x68, 0, 0, 0, 0}, 8909 {0x69, 0, 0, 0, 0}, 8910 {0x6A, 0, 0, 0, 0}, 8911 {0x6B, 0xc, 0xc, 0, 0}, 8912 {0x6C, 0, 0, 0, 0}, 8913 {0x6D, 0, 0, 0, 0}, 8914 {0x6E, 0, 0, 0, 0}, 8915 {0x6F, 0, 0, 0, 0}, 8916 {0x70, 0, 0, 0, 0}, 8917 {0x71, 0, 0, 0, 0}, 8918 {0x72, 0x22, 0x22, 0, 0}, 8919 {0x73, 0x22, 0x22, 0, 0}, 8920 {0x74, 0, 0, 1, 1}, 8921 {0x75, 0xa, 0xa, 0, 0}, 8922 {0x76, 0x1, 0x1, 0, 0}, 8923 {0x77, 0x22, 0x22, 0, 0}, 8924 {0x78, 0x30, 0x30, 0, 0}, 8925 {0x79, 0, 0, 0, 0}, 8926 {0x7A, 0, 0, 0, 0}, 8927 {0x7B, 0, 0, 0, 0}, 8928 {0x7C, 0, 0, 0, 0}, 8929 {0x7D, 0, 0, 0, 0}, 8930 {0x7E, 0, 0, 0, 0}, 8931 {0x7F, 0, 0, 0, 0}, 8932 {0x80, 0, 0, 0, 0}, 8933 {0x81, 0, 0, 0, 0}, 8934 {0x82, 0, 0, 0, 0}, 8935 {0x83, 0, 0, 0, 0}, 8936 {0x84, 0, 0, 0, 0}, 8937 {0x85, 0, 0, 0, 0}, 8938 {0x86, 0, 0, 0, 0}, 8939 {0x87, 0, 0, 0, 0}, 8940 {0x88, 0, 0, 0, 0}, 8941 {0x89, 0, 0, 0, 0}, 8942 {0x8A, 0, 0, 0, 0}, 8943 {0x8B, 0, 0, 0, 0}, 8944 {0x8C, 0, 0, 0, 0}, 8945 {0x8D, 0, 0, 0, 0}, 8946 {0x8E, 0, 0, 0, 0}, 8947 {0x8F, 0, 0, 0, 0}, 8948 {0x90, 0, 0, 0, 0}, 8949 {0x91, 0, 0, 0, 0}, 8950 {0x92, 0, 0, 0, 0}, 8951 {0x93, 0, 0, 0, 0}, 8952 {0x94, 0, 0, 0, 0}, 8953 {0xFFFF, 0, 0, 0, 0} 8954 }; 8955 8956 static struct radio_regs regs_SYN_2056_rev5[] = { 8957 {0x02, 0, 0, 0, 0}, 8958 {0x03, 0, 0, 0, 0}, 8959 {0x04, 0, 0, 0, 0}, 8960 {0x05, 0, 0, 0, 0}, 8961 {0x06, 0, 0, 0, 0}, 8962 {0x07, 0, 0, 0, 0}, 8963 {0x08, 0, 0, 0, 0}, 8964 {0x09, 0x1, 0x1, 0, 0}, 8965 {0x0A, 0, 0, 0, 0}, 8966 {0x0B, 0, 0, 0, 0}, 8967 {0x0C, 0, 0, 0, 0}, 8968 {0x0D, 0, 0, 0, 0}, 8969 {0x0E, 0, 0, 0, 0}, 8970 {0x0F, 0, 0, 0, 0}, 8971 {0x10, 0, 0, 0, 0}, 8972 {0x11, 0, 0, 0, 0}, 8973 {0x12, 0, 0, 0, 0}, 8974 {0x13, 0, 0, 0, 0}, 8975 {0x14, 0, 0, 0, 0}, 8976 {0x15, 0, 0, 0, 0}, 8977 {0x16, 0, 0, 0, 0}, 8978 {0x17, 0, 0, 0, 0}, 8979 {0x18, 0, 0, 0, 0}, 8980 {0x19, 0, 0, 0, 0}, 8981 {0x1A, 0, 0, 0, 0}, 8982 {0x1B, 0, 0, 0, 0}, 8983 {0x1C, 0, 0, 0, 0}, 8984 {0x1D, 0, 0, 0, 0}, 8985 {0x1E, 0, 0, 0, 0}, 8986 {0x1F, 0, 0, 0, 0}, 8987 {0x20, 0, 0, 0, 0}, 8988 {0x21, 0, 0, 0, 0}, 8989 {0x22, 0x60, 0x60, 0, 0}, 8990 {0x23, 0x6, 0x6, 0, 0}, 8991 {0x24, 0xc, 0xc, 0, 0}, 8992 {0x25, 0, 0, 0, 0}, 8993 {0x26, 0, 0, 0, 0}, 8994 {0x27, 0, 0, 0, 0}, 8995 {0x28, 0x1, 0x1, 0, 0}, 8996 {0x29, 0, 0, 0, 0}, 8997 {0x2A, 0, 0, 0, 0}, 8998 {0x2B, 0, 0, 0, 0}, 8999 {0x2C, 0, 0, 0, 0}, 9000 {0x2D, 0, 0, 0, 0}, 9001 {0x2E, 0, 0, 0, 0}, 9002 {0x2F, 0x1f, 0x1f, 0, 0}, 9003 {0x30, 0x15, 0x15, 0, 0}, 9004 {0x31, 0xf, 0xf, 0, 0}, 9005 {0x32, 0, 0, 0, 0}, 9006 {0x33, 0, 0, 0, 0}, 9007 {0x34, 0, 0, 0, 0}, 9008 {0x35, 0, 0, 0, 0}, 9009 {0x36, 0, 0, 0, 0}, 9010 {0x37, 0, 0, 0, 0}, 9011 {0x38, 0, 0, 0, 0}, 9012 {0x39, 0, 0, 0, 0}, 9013 {0x3A, 0, 0, 0, 0}, 9014 {0x3B, 0, 0, 0, 0}, 9015 {0x3C, 0x13, 0x13, 0, 0}, 9016 {0x3D, 0xf, 0xf, 0, 0}, 9017 {0x3E, 0x18, 0x18, 0, 0}, 9018 {0x3F, 0, 0, 0, 0}, 9019 {0x40, 0, 0, 0, 0}, 9020 {0x41, 0x20, 0x20, 0, 0}, 9021 {0x42, 0x20, 0x20, 0, 0}, 9022 {0x43, 0, 0, 0, 0}, 9023 {0x44, 0x77, 0x77, 0, 0}, 9024 {0x45, 0x7, 0x7, 0, 0}, 9025 {0x46, 0x1, 0x1, 0, 0}, 9026 {0x47, 0x4, 0x4, 0, 0}, 9027 {0x48, 0xf, 0xf, 0, 0}, 9028 {0x49, 0x30, 0x30, 0, 0}, 9029 {0x4A, 0x32, 0x32, 0, 0}, 9030 {0x4B, 0xd, 0xd, 0, 0}, 9031 {0x4C, 0xd, 0xd, 0, 0}, 9032 {0x4D, 0x4, 0x4, 0, 0}, 9033 {0x4E, 0x6, 0x6, 0, 0}, 9034 {0x4F, 0x1, 0x1, 0, 0}, 9035 {0x50, 0x1c, 0x1c, 0, 0}, 9036 {0x51, 0x2, 0x2, 0, 0}, 9037 {0x52, 0x2, 0x2, 0, 0}, 9038 {0x53, 0xf7, 0xf7, 1, 1}, 9039 {0x54, 0xb4, 0xb4, 0, 0}, 9040 {0x55, 0xd2, 0xd2, 0, 0}, 9041 {0x56, 0, 0, 0, 0}, 9042 {0x57, 0, 0, 0, 0}, 9043 {0x58, 0x4, 0x4, 0, 0}, 9044 {0x59, 0x96, 0x96, 0, 0}, 9045 {0x5A, 0x3e, 0x3e, 0, 0}, 9046 {0x5B, 0x3e, 0x3e, 0, 0}, 9047 {0x5C, 0x13, 0x13, 0, 0}, 9048 {0x5D, 0x2, 0x2, 0, 0}, 9049 {0x5E, 0, 0, 0, 0}, 9050 {0x5F, 0x7, 0x7, 0, 0}, 9051 {0x60, 0x7, 0x7, 1, 1}, 9052 {0x61, 0x8, 0x8, 0, 0}, 9053 {0x62, 0x3, 0x3, 0, 0}, 9054 {0x63, 0, 0, 0, 0}, 9055 {0x64, 0, 0, 0, 0}, 9056 {0x65, 0, 0, 0, 0}, 9057 {0x66, 0, 0, 0, 0}, 9058 {0x67, 0, 0, 0, 0}, 9059 {0x68, 0x40, 0x40, 0, 0}, 9060 {0x69, 0, 0, 0, 0}, 9061 {0x6A, 0, 0, 0, 0}, 9062 {0x6B, 0, 0, 0, 0}, 9063 {0x6C, 0, 0, 0, 0}, 9064 {0x6D, 0x1, 0x1, 0, 0}, 9065 {0x6E, 0, 0, 0, 0}, 9066 {0x6F, 0, 0, 0, 0}, 9067 {0x70, 0x60, 0x60, 0, 0}, 9068 {0x71, 0x66, 0x66, 0, 0}, 9069 {0x72, 0xc, 0xc, 0, 0}, 9070 {0x73, 0x66, 0x66, 0, 0}, 9071 {0x74, 0x8f, 0x8f, 1, 1}, 9072 {0x75, 0, 0, 0, 0}, 9073 {0x76, 0xcc, 0xcc, 0, 0}, 9074 {0x77, 0x1, 0x1, 0, 0}, 9075 {0x78, 0x66, 0x66, 0, 0}, 9076 {0x79, 0x66, 0x66, 0, 0}, 9077 {0x7A, 0, 0, 0, 0}, 9078 {0x7B, 0, 0, 0, 0}, 9079 {0x7C, 0, 0, 0, 0}, 9080 {0x7D, 0, 0, 0, 0}, 9081 {0x7E, 0, 0, 0, 0}, 9082 {0x7F, 0, 0, 0, 0}, 9083 {0x80, 0, 0, 0, 0}, 9084 {0x81, 0, 0, 0, 0}, 9085 {0x82, 0, 0, 0, 0}, 9086 {0x83, 0, 0, 0, 0}, 9087 {0x84, 0, 0, 0, 0}, 9088 {0x85, 0xff, 0xff, 0, 0}, 9089 {0x86, 0, 0, 0, 0}, 9090 {0x87, 0, 0, 0, 0}, 9091 {0x88, 0, 0, 0, 0}, 9092 {0x89, 0, 0, 0, 0}, 9093 {0x8A, 0, 0, 0, 0}, 9094 {0x8B, 0, 0, 0, 0}, 9095 {0x8C, 0, 0, 0, 0}, 9096 {0x8D, 0, 0, 0, 0}, 9097 {0x8E, 0, 0, 0, 0}, 9098 {0x8F, 0, 0, 0, 0}, 9099 {0x90, 0, 0, 0, 0}, 9100 {0x91, 0, 0, 0, 0}, 9101 {0x92, 0, 0, 0, 0}, 9102 {0x93, 0, 0, 0, 0}, 9103 {0x94, 0, 0, 0, 0}, 9104 {0x95, 0, 0, 0, 0}, 9105 {0x96, 0, 0, 0, 0}, 9106 {0x97, 0, 0, 0, 0}, 9107 {0x98, 0, 0, 0, 0}, 9108 {0x99, 0, 0, 0, 0}, 9109 {0x9A, 0, 0, 0, 0}, 9110 {0x9B, 0, 0, 0, 0}, 9111 {0x9C, 0, 0, 0, 0}, 9112 {0x9D, 0, 0, 0, 0}, 9113 {0x9E, 0, 0, 0, 0}, 9114 {0x9F, 0x6, 0x6, 0, 0}, 9115 {0xA0, 0x66, 0x66, 0, 0}, 9116 {0xA1, 0x66, 0x66, 0, 0}, 9117 {0xA2, 0x66, 0x66, 0, 0}, 9118 {0xA3, 0x66, 0x66, 0, 0}, 9119 {0xA4, 0x66, 0x66, 0, 0}, 9120 {0xA5, 0x66, 0x66, 0, 0}, 9121 {0xA6, 0x66, 0x66, 0, 0}, 9122 {0xA7, 0x66, 0x66, 0, 0}, 9123 {0xA8, 0x66, 0x66, 0, 0}, 9124 {0xA9, 0x66, 0x66, 0, 0}, 9125 {0xAA, 0x66, 0x66, 0, 0}, 9126 {0xAB, 0x66, 0x66, 0, 0}, 9127 {0xAC, 0x66, 0x66, 0, 0}, 9128 {0xAD, 0x66, 0x66, 0, 0}, 9129 {0xAE, 0x66, 0x66, 0, 0}, 9130 {0xAF, 0x66, 0x66, 0, 0}, 9131 {0xB0, 0x66, 0x66, 0, 0}, 9132 {0xB1, 0x66, 0x66, 0, 0}, 9133 {0xB2, 0x66, 0x66, 0, 0}, 9134 {0xB3, 0xa, 0xa, 0, 0}, 9135 {0xB4, 0, 0, 0, 0}, 9136 {0xB5, 0, 0, 0, 0}, 9137 {0xB6, 0, 0, 0, 0}, 9138 {0xFFFF, 0, 0, 0, 0} 9139 }; 9140 9141 static struct radio_regs regs_TX_2056_rev5[] = { 9142 {0x02, 0, 0, 0, 0}, 9143 {0x03, 0, 0, 0, 0}, 9144 {0x04, 0, 0, 0, 0}, 9145 {0x05, 0, 0, 0, 0}, 9146 {0x06, 0, 0, 0, 0}, 9147 {0x07, 0, 0, 0, 0}, 9148 {0x08, 0, 0, 0, 0}, 9149 {0x09, 0, 0, 0, 0}, 9150 {0x0A, 0, 0, 0, 0}, 9151 {0x0B, 0, 0, 0, 0}, 9152 {0x0C, 0, 0, 0, 0}, 9153 {0x0D, 0, 0, 0, 0}, 9154 {0x0E, 0, 0, 0, 0}, 9155 {0x0F, 0, 0, 0, 0}, 9156 {0x10, 0, 0, 0, 0}, 9157 {0x11, 0, 0, 0, 0}, 9158 {0x12, 0, 0, 0, 0}, 9159 {0x13, 0, 0, 0, 0}, 9160 {0x14, 0, 0, 0, 0}, 9161 {0x15, 0, 0, 0, 0}, 9162 {0x16, 0, 0, 0, 0}, 9163 {0x17, 0, 0, 0, 0}, 9164 {0x18, 0, 0, 0, 0}, 9165 {0x19, 0, 0, 0, 0}, 9166 {0x1A, 0, 0, 0, 0}, 9167 {0x1B, 0, 0, 0, 0}, 9168 {0x1C, 0, 0, 0, 0}, 9169 {0x1D, 0, 0, 0, 0}, 9170 {0x1E, 0, 0, 0, 0}, 9171 {0x1F, 0, 0, 0, 0}, 9172 {0x20, 0, 0, 0, 0}, 9173 {0x21, 0x88, 0x88, 0, 0}, 9174 {0x22, 0x88, 0x88, 0, 0}, 9175 {0x23, 0x88, 0x88, 0, 0}, 9176 {0x24, 0x88, 0x88, 0, 0}, 9177 {0x25, 0xc, 0xc, 0, 0}, 9178 {0x26, 0, 0, 0, 0}, 9179 {0x27, 0x3, 0x3, 0, 0}, 9180 {0x28, 0, 0, 0, 0}, 9181 {0x29, 0x3, 0x3, 0, 0}, 9182 {0x2A, 0x37, 0x37, 0, 0}, 9183 {0x2B, 0x3, 0x3, 0, 0}, 9184 {0x2C, 0, 0, 0, 0}, 9185 {0x2D, 0, 0, 0, 0}, 9186 {0x2E, 0x1, 0x1, 0, 0}, 9187 {0x2F, 0x1, 0x1, 0, 0}, 9188 {0x30, 0, 0, 0, 0}, 9189 {0x31, 0, 0, 0, 0}, 9190 {0x32, 0, 0, 0, 0}, 9191 {0x33, 0x11, 0x11, 0, 0}, 9192 {0x34, 0x11, 0x11, 0, 0}, 9193 {0x35, 0, 0, 0, 0}, 9194 {0x36, 0, 0, 0, 0}, 9195 {0x37, 0x3, 0x3, 0, 0}, 9196 {0x38, 0xf, 0xf, 0, 0}, 9197 {0x39, 0, 0, 0, 0}, 9198 {0x3A, 0x2d, 0x2d, 0, 0}, 9199 {0x3B, 0, 0, 0, 0}, 9200 {0x3C, 0x6e, 0x6e, 0, 0}, 9201 {0x3D, 0xf0, 0xf0, 1, 1}, 9202 {0x3E, 0, 0, 0, 0}, 9203 {0x3F, 0, 0, 0, 0}, 9204 {0x40, 0, 0, 0, 0}, 9205 {0x41, 0x3, 0x3, 0, 0}, 9206 {0x42, 0x3, 0x3, 0, 0}, 9207 {0x43, 0, 0, 0, 0}, 9208 {0x44, 0x1e, 0x1e, 0, 0}, 9209 {0x45, 0, 0, 0, 0}, 9210 {0x46, 0x6e, 0x6e, 0, 0}, 9211 {0x47, 0xf0, 0xf0, 1, 1}, 9212 {0x48, 0, 0, 0, 0}, 9213 {0x49, 0x2, 0x2, 0, 0}, 9214 {0x4A, 0xff, 0xff, 1, 1}, 9215 {0x4B, 0xc, 0xc, 0, 0}, 9216 {0x4C, 0, 0, 0, 0}, 9217 {0x4D, 0x38, 0x38, 0, 0}, 9218 {0x4E, 0x70, 0x70, 1, 1}, 9219 {0x4F, 0x2, 0x2, 0, 0}, 9220 {0x50, 0x88, 0x88, 0, 0}, 9221 {0x51, 0xc, 0xc, 0, 0}, 9222 {0x52, 0, 0, 0, 0}, 9223 {0x53, 0x8, 0x8, 0, 0}, 9224 {0x54, 0x70, 0x70, 1, 1}, 9225 {0x55, 0x2, 0x2, 0, 0}, 9226 {0x56, 0xff, 0xff, 1, 1}, 9227 {0x57, 0, 0, 0, 0}, 9228 {0x58, 0x83, 0x83, 0, 0}, 9229 {0x59, 0x77, 0x77, 1, 1}, 9230 {0x5A, 0, 0, 0, 0}, 9231 {0x5B, 0x2, 0x2, 0, 0}, 9232 {0x5C, 0x88, 0x88, 0, 0}, 9233 {0x5D, 0, 0, 0, 0}, 9234 {0x5E, 0x8, 0x8, 0, 0}, 9235 {0x5F, 0x77, 0x77, 1, 1}, 9236 {0x60, 0x1, 0x1, 0, 0}, 9237 {0x61, 0, 0, 0, 0}, 9238 {0x62, 0x7, 0x7, 0, 0}, 9239 {0x63, 0, 0, 0, 0}, 9240 {0x64, 0x7, 0x7, 0, 0}, 9241 {0x65, 0, 0, 0, 0}, 9242 {0x66, 0, 0, 0, 0}, 9243 {0x67, 0, 0, 1, 1}, 9244 {0x68, 0, 0, 0, 0}, 9245 {0x69, 0xa, 0xa, 0, 0}, 9246 {0x6A, 0, 0, 0, 0}, 9247 {0x6B, 0, 0, 0, 0}, 9248 {0x6C, 0, 0, 0, 0}, 9249 {0x6D, 0, 0, 0, 0}, 9250 {0x6E, 0, 0, 0, 0}, 9251 {0x6F, 0, 0, 0, 0}, 9252 {0x70, 0, 0, 0, 0}, 9253 {0x71, 0x2, 0x2, 0, 0}, 9254 {0x72, 0, 0, 0, 0}, 9255 {0x73, 0, 0, 0, 0}, 9256 {0x74, 0xe, 0xe, 0, 0}, 9257 {0x75, 0xe, 0xe, 0, 0}, 9258 {0x76, 0xe, 0xe, 0, 0}, 9259 {0x77, 0x13, 0x13, 0, 0}, 9260 {0x78, 0x13, 0x13, 0, 0}, 9261 {0x79, 0x1b, 0x1b, 0, 0}, 9262 {0x7A, 0x1b, 0x1b, 0, 0}, 9263 {0x7B, 0x55, 0x55, 0, 0}, 9264 {0x7C, 0x5b, 0x5b, 0, 0}, 9265 {0x7D, 0, 0, 0, 0}, 9266 {0x7E, 0, 0, 0, 0}, 9267 {0x7F, 0, 0, 0, 0}, 9268 {0x80, 0, 0, 0, 0}, 9269 {0x81, 0, 0, 0, 0}, 9270 {0x82, 0, 0, 0, 0}, 9271 {0x83, 0, 0, 0, 0}, 9272 {0x84, 0, 0, 0, 0}, 9273 {0x85, 0, 0, 0, 0}, 9274 {0x86, 0, 0, 0, 0}, 9275 {0x87, 0, 0, 0, 0}, 9276 {0x88, 0, 0, 0, 0}, 9277 {0x89, 0, 0, 0, 0}, 9278 {0x8A, 0, 0, 0, 0}, 9279 {0x8B, 0, 0, 0, 0}, 9280 {0x8C, 0, 0, 0, 0}, 9281 {0x8D, 0, 0, 0, 0}, 9282 {0x8E, 0, 0, 0, 0}, 9283 {0x8F, 0, 0, 0, 0}, 9284 {0x90, 0, 0, 0, 0}, 9285 {0x91, 0, 0, 0, 0}, 9286 {0x92, 0, 0, 0, 0}, 9287 {0x93, 0x70, 0x70, 0, 0}, 9288 {0x94, 0x70, 0x70, 0, 0}, 9289 {0x95, 0x71, 0x71, 1, 1}, 9290 {0x96, 0x71, 0x71, 1, 1}, 9291 {0x97, 0x72, 0x72, 1, 1}, 9292 {0x98, 0x73, 0x73, 1, 1}, 9293 {0x99, 0x74, 0x74, 1, 1}, 9294 {0x9A, 0x75, 0x75, 1, 1}, 9295 {0xFFFF, 0, 0, 0, 0} 9296 }; 9297 9298 static struct radio_regs regs_RX_2056_rev5[] = { 9299 {0x02, 0, 0, 0, 0}, 9300 {0x03, 0, 0, 0, 0}, 9301 {0x04, 0, 0, 0, 0}, 9302 {0x05, 0, 0, 0, 0}, 9303 {0x06, 0, 0, 0, 0}, 9304 {0x07, 0, 0, 0, 0}, 9305 {0x08, 0, 0, 0, 0}, 9306 {0x09, 0, 0, 0, 0}, 9307 {0x0A, 0, 0, 0, 0}, 9308 {0x0B, 0, 0, 0, 0}, 9309 {0x0C, 0, 0, 0, 0}, 9310 {0x0D, 0, 0, 0, 0}, 9311 {0x0E, 0, 0, 0, 0}, 9312 {0x0F, 0, 0, 0, 0}, 9313 {0x10, 0, 0, 0, 0}, 9314 {0x11, 0, 0, 0, 0}, 9315 {0x12, 0, 0, 0, 0}, 9316 {0x13, 0, 0, 0, 0}, 9317 {0x14, 0, 0, 0, 0}, 9318 {0x15, 0, 0, 0, 0}, 9319 {0x16, 0, 0, 0, 0}, 9320 {0x17, 0, 0, 0, 0}, 9321 {0x18, 0, 0, 0, 0}, 9322 {0x19, 0, 0, 0, 0}, 9323 {0x1A, 0, 0, 0, 0}, 9324 {0x1B, 0, 0, 0, 0}, 9325 {0x1C, 0, 0, 0, 0}, 9326 {0x1D, 0, 0, 0, 0}, 9327 {0x1E, 0, 0, 0, 0}, 9328 {0x1F, 0, 0, 0, 0}, 9329 {0x20, 0x3, 0x3, 0, 0}, 9330 {0x21, 0, 0, 0, 0}, 9331 {0x22, 0, 0, 0, 0}, 9332 {0x23, 0x90, 0x90, 0, 0}, 9333 {0x24, 0x55, 0x55, 0, 0}, 9334 {0x25, 0x15, 0x15, 0, 0}, 9335 {0x26, 0x5, 0x5, 0, 0}, 9336 {0x27, 0x15, 0x15, 0, 0}, 9337 {0x28, 0x5, 0x5, 0, 0}, 9338 {0x29, 0x20, 0x20, 0, 0}, 9339 {0x2A, 0x11, 0x11, 0, 0}, 9340 {0x2B, 0x90, 0x90, 0, 0}, 9341 {0x2C, 0, 0, 0, 0}, 9342 {0x2D, 0x88, 0x88, 0, 0}, 9343 {0x2E, 0x32, 0x32, 0, 0}, 9344 {0x2F, 0x77, 0x77, 0, 0}, 9345 {0x30, 0x17, 0x17, 1, 1}, 9346 {0x31, 0xff, 0xff, 1, 1}, 9347 {0x32, 0x20, 0x20, 0, 0}, 9348 {0x33, 0, 0, 0, 0}, 9349 {0x34, 0x88, 0x88, 0, 0}, 9350 {0x35, 0x32, 0x32, 0, 0}, 9351 {0x36, 0x77, 0x77, 0, 0}, 9352 {0x37, 0x17, 0x17, 1, 1}, 9353 {0x38, 0xf0, 0xf0, 1, 1}, 9354 {0x39, 0x20, 0x20, 0, 0}, 9355 {0x3A, 0x8, 0x8, 0, 0}, 9356 {0x3B, 0x55, 0x55, 1, 1}, 9357 {0x3C, 0, 0, 0, 0}, 9358 {0x3D, 0x88, 0x88, 1, 1}, 9359 {0x3E, 0, 0, 0, 0}, 9360 {0x3F, 0, 0, 1, 1}, 9361 {0x40, 0x7, 0x7, 1, 1}, 9362 {0x41, 0x6, 0x6, 0, 0}, 9363 {0x42, 0x4, 0x4, 0, 0}, 9364 {0x43, 0, 0, 0, 0}, 9365 {0x44, 0x8, 0x8, 0, 0}, 9366 {0x45, 0x55, 0x55, 1, 1}, 9367 {0x46, 0, 0, 0, 0}, 9368 {0x47, 0x11, 0x11, 0, 0}, 9369 {0x48, 0, 0, 0, 0}, 9370 {0x49, 0, 0, 1, 1}, 9371 {0x4A, 0x7, 0x7, 0, 0}, 9372 {0x4B, 0x6, 0x6, 0, 0}, 9373 {0x4C, 0x4, 0x4, 0, 0}, 9374 {0x4D, 0, 0, 0, 0}, 9375 {0x4E, 0, 0, 0, 0}, 9376 {0x4F, 0x26, 0x26, 1, 1}, 9377 {0x50, 0x26, 0x26, 1, 1}, 9378 {0x51, 0xf, 0xf, 1, 1}, 9379 {0x52, 0xf, 0xf, 1, 1}, 9380 {0x53, 0x44, 0x44, 0, 0}, 9381 {0x54, 0, 0, 0, 0}, 9382 {0x55, 0, 0, 0, 0}, 9383 {0x56, 0x8, 0x8, 0, 0}, 9384 {0x57, 0x8, 0x8, 0, 0}, 9385 {0x58, 0x7, 0x7, 0, 0}, 9386 {0x59, 0x22, 0x22, 0, 0}, 9387 {0x5A, 0x22, 0x22, 0, 0}, 9388 {0x5B, 0x2, 0x2, 0, 0}, 9389 {0x5C, 0x4, 0x4, 1, 1}, 9390 {0x5D, 0x7, 0x7, 0, 0}, 9391 {0x5E, 0x55, 0x55, 0, 0}, 9392 {0x5F, 0x23, 0x23, 0, 0}, 9393 {0x60, 0x41, 0x41, 0, 0}, 9394 {0x61, 0x1, 0x1, 0, 0}, 9395 {0x62, 0xa, 0xa, 0, 0}, 9396 {0x63, 0, 0, 0, 0}, 9397 {0x64, 0, 0, 0, 0}, 9398 {0x65, 0, 0, 0, 0}, 9399 {0x66, 0, 0, 0, 0}, 9400 {0x67, 0, 0, 0, 0}, 9401 {0x68, 0, 0, 0, 0}, 9402 {0x69, 0, 0, 0, 0}, 9403 {0x6A, 0, 0, 0, 0}, 9404 {0x6B, 0xc, 0xc, 0, 0}, 9405 {0x6C, 0, 0, 0, 0}, 9406 {0x6D, 0, 0, 0, 0}, 9407 {0x6E, 0, 0, 0, 0}, 9408 {0x6F, 0, 0, 0, 0}, 9409 {0x70, 0, 0, 0, 0}, 9410 {0x71, 0, 0, 0, 0}, 9411 {0x72, 0x22, 0x22, 0, 0}, 9412 {0x73, 0x22, 0x22, 0, 0}, 9413 {0x74, 0, 0, 1, 1}, 9414 {0x75, 0xa, 0xa, 0, 0}, 9415 {0x76, 0x1, 0x1, 0, 0}, 9416 {0x77, 0x22, 0x22, 0, 0}, 9417 {0x78, 0x30, 0x30, 0, 0}, 9418 {0x79, 0, 0, 0, 0}, 9419 {0x7A, 0, 0, 0, 0}, 9420 {0x7B, 0, 0, 0, 0}, 9421 {0x7C, 0, 0, 0, 0}, 9422 {0x7D, 0, 0, 0, 0}, 9423 {0x7E, 0, 0, 0, 0}, 9424 {0x7F, 0, 0, 0, 0}, 9425 {0x80, 0, 0, 0, 0}, 9426 {0x81, 0, 0, 0, 0}, 9427 {0x82, 0, 0, 0, 0}, 9428 {0x83, 0, 0, 0, 0}, 9429 {0x84, 0, 0, 0, 0}, 9430 {0x85, 0, 0, 0, 0}, 9431 {0x86, 0, 0, 0, 0}, 9432 {0x87, 0, 0, 0, 0}, 9433 {0x88, 0, 0, 0, 0}, 9434 {0x89, 0, 0, 0, 0}, 9435 {0x8A, 0, 0, 0, 0}, 9436 {0x8B, 0, 0, 0, 0}, 9437 {0x8C, 0, 0, 0, 0}, 9438 {0x8D, 0, 0, 0, 0}, 9439 {0x8E, 0, 0, 0, 0}, 9440 {0x8F, 0, 0, 0, 0}, 9441 {0x90, 0, 0, 0, 0}, 9442 {0x91, 0, 0, 0, 0}, 9443 {0x92, 0, 0, 0, 0}, 9444 {0x93, 0, 0, 0, 0}, 9445 {0x94, 0, 0, 0, 0}, 9446 {0xFFFF, 0, 0, 0, 0} 9447 }; 9448 9449 static struct radio_regs regs_SYN_2056_rev6[] = { 9450 {0x02, 0, 0, 0, 0}, 9451 {0x03, 0, 0, 0, 0}, 9452 {0x04, 0, 0, 0, 0}, 9453 {0x05, 0, 0, 0, 0}, 9454 {0x06, 0, 0, 0, 0}, 9455 {0x07, 0, 0, 0, 0}, 9456 {0x08, 0, 0, 0, 0}, 9457 {0x09, 0x1, 0x1, 0, 0}, 9458 {0x0A, 0, 0, 0, 0}, 9459 {0x0B, 0, 0, 0, 0}, 9460 {0x0C, 0, 0, 0, 0}, 9461 {0x0D, 0, 0, 0, 0}, 9462 {0x0E, 0, 0, 0, 0}, 9463 {0x0F, 0, 0, 0, 0}, 9464 {0x10, 0, 0, 0, 0}, 9465 {0x11, 0, 0, 0, 0}, 9466 {0x12, 0, 0, 0, 0}, 9467 {0x13, 0, 0, 0, 0}, 9468 {0x14, 0, 0, 0, 0}, 9469 {0x15, 0, 0, 0, 0}, 9470 {0x16, 0, 0, 0, 0}, 9471 {0x17, 0, 0, 0, 0}, 9472 {0x18, 0, 0, 0, 0}, 9473 {0x19, 0, 0, 0, 0}, 9474 {0x1A, 0, 0, 0, 0}, 9475 {0x1B, 0, 0, 0, 0}, 9476 {0x1C, 0, 0, 0, 0}, 9477 {0x1D, 0, 0, 0, 0}, 9478 {0x1E, 0, 0, 0, 0}, 9479 {0x1F, 0, 0, 0, 0}, 9480 {0x20, 0, 0, 0, 0}, 9481 {0x21, 0, 0, 0, 0}, 9482 {0x22, 0x60, 0x60, 0, 0}, 9483 {0x23, 0x6, 0x6, 0, 0}, 9484 {0x24, 0xc, 0xc, 0, 0}, 9485 {0x25, 0, 0, 0, 0}, 9486 {0x26, 0, 0, 0, 0}, 9487 {0x27, 0, 0, 0, 0}, 9488 {0x28, 0x1, 0x1, 0, 0}, 9489 {0x29, 0, 0, 0, 0}, 9490 {0x2A, 0, 0, 0, 0}, 9491 {0x2B, 0, 0, 0, 0}, 9492 {0x2C, 0, 0, 0, 0}, 9493 {0x2D, 0, 0, 0, 0}, 9494 {0x2E, 0, 0, 0, 0}, 9495 {0x2F, 0x1f, 0x1f, 0, 0}, 9496 {0x30, 0x15, 0x15, 0, 0}, 9497 {0x31, 0xf, 0xf, 0, 0}, 9498 {0x32, 0, 0, 0, 0}, 9499 {0x33, 0, 0, 0, 0}, 9500 {0x34, 0, 0, 0, 0}, 9501 {0x35, 0, 0, 0, 0}, 9502 {0x36, 0, 0, 0, 0}, 9503 {0x37, 0, 0, 0, 0}, 9504 {0x38, 0, 0, 0, 0}, 9505 {0x39, 0, 0, 0, 0}, 9506 {0x3A, 0, 0, 0, 0}, 9507 {0x3B, 0, 0, 0, 0}, 9508 {0x3C, 0x13, 0x13, 0, 0}, 9509 {0x3D, 0xf, 0xf, 0, 0}, 9510 {0x3E, 0x18, 0x18, 0, 0}, 9511 {0x3F, 0, 0, 0, 0}, 9512 {0x40, 0, 0, 0, 0}, 9513 {0x41, 0x20, 0x20, 0, 0}, 9514 {0x42, 0x20, 0x20, 0, 0}, 9515 {0x43, 0, 0, 0, 0}, 9516 {0x44, 0x77, 0x77, 0, 0}, 9517 {0x45, 0x7, 0x7, 0, 0}, 9518 {0x46, 0x1, 0x1, 0, 0}, 9519 {0x47, 0x4, 0x4, 0, 0}, 9520 {0x48, 0xf, 0xf, 0, 0}, 9521 {0x49, 0x30, 0x30, 0, 0}, 9522 {0x4A, 0x32, 0x32, 0, 0}, 9523 {0x4B, 0xd, 0xd, 0, 0}, 9524 {0x4C, 0xd, 0xd, 0, 0}, 9525 {0x4D, 0x4, 0x4, 0, 0}, 9526 {0x4E, 0x6, 0x6, 0, 0}, 9527 {0x4F, 0x1, 0x1, 0, 0}, 9528 {0x50, 0x1c, 0x1c, 0, 0}, 9529 {0x51, 0x2, 0x2, 0, 0}, 9530 {0x52, 0x2, 0x2, 0, 0}, 9531 {0x53, 0xf7, 0xf7, 1, 1}, 9532 {0x54, 0xb4, 0xb4, 0, 0}, 9533 {0x55, 0xd2, 0xd2, 0, 0}, 9534 {0x56, 0, 0, 0, 0}, 9535 {0x57, 0, 0, 0, 0}, 9536 {0x58, 0x4, 0x4, 0, 0}, 9537 {0x59, 0x96, 0x96, 0, 0}, 9538 {0x5A, 0x3e, 0x3e, 0, 0}, 9539 {0x5B, 0x3e, 0x3e, 0, 0}, 9540 {0x5C, 0x13, 0x13, 0, 0}, 9541 {0x5D, 0x2, 0x2, 0, 0}, 9542 {0x5E, 0, 0, 0, 0}, 9543 {0x5F, 0x7, 0x7, 0, 0}, 9544 {0x60, 0x7, 0x7, 1, 1}, 9545 {0x61, 0x8, 0x8, 0, 0}, 9546 {0x62, 0x3, 0x3, 0, 0}, 9547 {0x63, 0, 0, 0, 0}, 9548 {0x64, 0, 0, 0, 0}, 9549 {0x65, 0, 0, 0, 0}, 9550 {0x66, 0, 0, 0, 0}, 9551 {0x67, 0, 0, 0, 0}, 9552 {0x68, 0x40, 0x40, 0, 0}, 9553 {0x69, 0, 0, 0, 0}, 9554 {0x6A, 0, 0, 0, 0}, 9555 {0x6B, 0, 0, 0, 0}, 9556 {0x6C, 0, 0, 0, 0}, 9557 {0x6D, 0x1, 0x1, 0, 0}, 9558 {0x6E, 0, 0, 0, 0}, 9559 {0x6F, 0, 0, 0, 0}, 9560 {0x70, 0x60, 0x60, 0, 0}, 9561 {0x71, 0x66, 0x66, 0, 0}, 9562 {0x72, 0xc, 0xc, 0, 0}, 9563 {0x73, 0x66, 0x66, 0, 0}, 9564 {0x74, 0x8f, 0x8f, 1, 1}, 9565 {0x75, 0, 0, 0, 0}, 9566 {0x76, 0xcc, 0xcc, 0, 0}, 9567 {0x77, 0x1, 0x1, 0, 0}, 9568 {0x78, 0x66, 0x66, 0, 0}, 9569 {0x79, 0x66, 0x66, 0, 0}, 9570 {0x7A, 0, 0, 0, 0}, 9571 {0x7B, 0, 0, 0, 0}, 9572 {0x7C, 0, 0, 0, 0}, 9573 {0x7D, 0, 0, 0, 0}, 9574 {0x7E, 0, 0, 0, 0}, 9575 {0x7F, 0, 0, 0, 0}, 9576 {0x80, 0, 0, 0, 0}, 9577 {0x81, 0, 0, 0, 0}, 9578 {0x82, 0, 0, 0, 0}, 9579 {0x83, 0, 0, 0, 0}, 9580 {0x84, 0, 0, 0, 0}, 9581 {0x85, 0xff, 0xff, 0, 0}, 9582 {0x86, 0, 0, 0, 0}, 9583 {0x87, 0, 0, 0, 0}, 9584 {0x88, 0, 0, 0, 0}, 9585 {0x89, 0, 0, 0, 0}, 9586 {0x8A, 0, 0, 0, 0}, 9587 {0x8B, 0, 0, 0, 0}, 9588 {0x8C, 0, 0, 0, 0}, 9589 {0x8D, 0, 0, 0, 0}, 9590 {0x8E, 0, 0, 0, 0}, 9591 {0x8F, 0, 0, 0, 0}, 9592 {0x90, 0, 0, 0, 0}, 9593 {0x91, 0, 0, 0, 0}, 9594 {0x92, 0, 0, 0, 0}, 9595 {0x93, 0, 0, 0, 0}, 9596 {0x94, 0, 0, 0, 0}, 9597 {0x95, 0, 0, 0, 0}, 9598 {0x96, 0, 0, 0, 0}, 9599 {0x97, 0, 0, 0, 0}, 9600 {0x98, 0, 0, 0, 0}, 9601 {0x99, 0, 0, 0, 0}, 9602 {0x9A, 0, 0, 0, 0}, 9603 {0x9B, 0, 0, 0, 0}, 9604 {0x9C, 0, 0, 0, 0}, 9605 {0x9D, 0, 0, 0, 0}, 9606 {0x9E, 0, 0, 0, 0}, 9607 {0x9F, 0x6, 0x6, 0, 0}, 9608 {0xA0, 0x66, 0x66, 0, 0}, 9609 {0xA1, 0x66, 0x66, 0, 0}, 9610 {0xA2, 0x66, 0x66, 0, 0}, 9611 {0xA3, 0x66, 0x66, 0, 0}, 9612 {0xA4, 0x66, 0x66, 0, 0}, 9613 {0xA5, 0x66, 0x66, 0, 0}, 9614 {0xA6, 0x66, 0x66, 0, 0}, 9615 {0xA7, 0x66, 0x66, 0, 0}, 9616 {0xA8, 0x66, 0x66, 0, 0}, 9617 {0xA9, 0x66, 0x66, 0, 0}, 9618 {0xAA, 0x66, 0x66, 0, 0}, 9619 {0xAB, 0x66, 0x66, 0, 0}, 9620 {0xAC, 0x66, 0x66, 0, 0}, 9621 {0xAD, 0x66, 0x66, 0, 0}, 9622 {0xAE, 0x66, 0x66, 0, 0}, 9623 {0xAF, 0x66, 0x66, 0, 0}, 9624 {0xB0, 0x66, 0x66, 0, 0}, 9625 {0xB1, 0x66, 0x66, 0, 0}, 9626 {0xB2, 0x66, 0x66, 0, 0}, 9627 {0xB3, 0xa, 0xa, 0, 0}, 9628 {0xB4, 0, 0, 0, 0}, 9629 {0xB5, 0, 0, 0, 0}, 9630 {0xB6, 0, 0, 0, 0}, 9631 {0xFFFF, 0, 0, 0, 0} 9632 }; 9633 9634 static struct radio_regs regs_TX_2056_rev6[] = { 9635 {0x02, 0, 0, 0, 0}, 9636 {0x03, 0, 0, 0, 0}, 9637 {0x04, 0, 0, 0, 0}, 9638 {0x05, 0, 0, 0, 0}, 9639 {0x06, 0, 0, 0, 0}, 9640 {0x07, 0, 0, 0, 0}, 9641 {0x08, 0, 0, 0, 0}, 9642 {0x09, 0, 0, 0, 0}, 9643 {0x0A, 0, 0, 0, 0}, 9644 {0x0B, 0, 0, 0, 0}, 9645 {0x0C, 0, 0, 0, 0}, 9646 {0x0D, 0, 0, 0, 0}, 9647 {0x0E, 0, 0, 0, 0}, 9648 {0x0F, 0, 0, 0, 0}, 9649 {0x10, 0, 0, 0, 0}, 9650 {0x11, 0, 0, 0, 0}, 9651 {0x12, 0, 0, 0, 0}, 9652 {0x13, 0, 0, 0, 0}, 9653 {0x14, 0, 0, 0, 0}, 9654 {0x15, 0, 0, 0, 0}, 9655 {0x16, 0, 0, 0, 0}, 9656 {0x17, 0, 0, 0, 0}, 9657 {0x18, 0, 0, 0, 0}, 9658 {0x19, 0, 0, 0, 0}, 9659 {0x1A, 0, 0, 0, 0}, 9660 {0x1B, 0, 0, 0, 0}, 9661 {0x1C, 0, 0, 0, 0}, 9662 {0x1D, 0, 0, 0, 0}, 9663 {0x1E, 0, 0, 0, 0}, 9664 {0x1F, 0, 0, 0, 0}, 9665 {0x20, 0, 0, 0, 0}, 9666 {0x21, 0x88, 0x88, 0, 0}, 9667 {0x22, 0x88, 0x88, 0, 0}, 9668 {0x23, 0x88, 0x88, 0, 0}, 9669 {0x24, 0x88, 0x88, 0, 0}, 9670 {0x25, 0xc, 0xc, 0, 0}, 9671 {0x26, 0, 0, 0, 0}, 9672 {0x27, 0x3, 0x3, 0, 0}, 9673 {0x28, 0, 0, 0, 0}, 9674 {0x29, 0x3, 0x3, 0, 0}, 9675 {0x2A, 0x37, 0x37, 0, 0}, 9676 {0x2B, 0x3, 0x3, 0, 0}, 9677 {0x2C, 0, 0, 0, 0}, 9678 {0x2D, 0, 0, 0, 0}, 9679 {0x2E, 0x1, 0x1, 0, 0}, 9680 {0x2F, 0x1, 0x1, 0, 0}, 9681 {0x30, 0, 0, 0, 0}, 9682 {0x31, 0, 0, 0, 0}, 9683 {0x32, 0, 0, 0, 0}, 9684 {0x33, 0x11, 0x11, 0, 0}, 9685 {0x34, 0xee, 0xee, 1, 1}, 9686 {0x35, 0, 0, 0, 0}, 9687 {0x36, 0, 0, 0, 0}, 9688 {0x37, 0x3, 0x3, 0, 0}, 9689 {0x38, 0x50, 0x50, 1, 1}, 9690 {0x39, 0, 0, 0, 0}, 9691 {0x3A, 0x50, 0x50, 1, 1}, 9692 {0x3B, 0, 0, 0, 0}, 9693 {0x3C, 0x6e, 0x6e, 0, 0}, 9694 {0x3D, 0xf0, 0xf0, 1, 1}, 9695 {0x3E, 0, 0, 0, 0}, 9696 {0x3F, 0, 0, 0, 0}, 9697 {0x40, 0, 0, 0, 0}, 9698 {0x41, 0x3, 0x3, 0, 0}, 9699 {0x42, 0x3, 0x3, 0, 0}, 9700 {0x43, 0, 0, 0, 0}, 9701 {0x44, 0x1e, 0x1e, 0, 0}, 9702 {0x45, 0, 0, 0, 0}, 9703 {0x46, 0x6e, 0x6e, 0, 0}, 9704 {0x47, 0xf0, 0xf0, 1, 1}, 9705 {0x48, 0, 0, 0, 0}, 9706 {0x49, 0x2, 0x2, 0, 0}, 9707 {0x4A, 0xff, 0xff, 1, 1}, 9708 {0x4B, 0xc, 0xc, 0, 0}, 9709 {0x4C, 0, 0, 0, 0}, 9710 {0x4D, 0x38, 0x38, 0, 0}, 9711 {0x4E, 0x70, 0x70, 1, 1}, 9712 {0x4F, 0x2, 0x2, 0, 0}, 9713 {0x50, 0x88, 0x88, 0, 0}, 9714 {0x51, 0xc, 0xc, 0, 0}, 9715 {0x52, 0, 0, 0, 0}, 9716 {0x53, 0x8, 0x8, 0, 0}, 9717 {0x54, 0x70, 0x70, 1, 1}, 9718 {0x55, 0x2, 0x2, 0, 0}, 9719 {0x56, 0xff, 0xff, 1, 1}, 9720 {0x57, 0, 0, 0, 0}, 9721 {0x58, 0x83, 0x83, 0, 0}, 9722 {0x59, 0x77, 0x77, 1, 1}, 9723 {0x5A, 0, 0, 0, 0}, 9724 {0x5B, 0x2, 0x2, 0, 0}, 9725 {0x5C, 0x88, 0x88, 0, 0}, 9726 {0x5D, 0, 0, 0, 0}, 9727 {0x5E, 0x8, 0x8, 0, 0}, 9728 {0x5F, 0x77, 0x77, 1, 1}, 9729 {0x60, 0x1, 0x1, 0, 0}, 9730 {0x61, 0, 0, 0, 0}, 9731 {0x62, 0x7, 0x7, 0, 0}, 9732 {0x63, 0, 0, 0, 0}, 9733 {0x64, 0x7, 0x7, 0, 0}, 9734 {0x65, 0, 0, 0, 0}, 9735 {0x66, 0, 0, 0, 0}, 9736 {0x67, 0, 0, 1, 1}, 9737 {0x68, 0, 0, 0, 0}, 9738 {0x69, 0xa, 0xa, 0, 0}, 9739 {0x6A, 0, 0, 0, 0}, 9740 {0x6B, 0, 0, 0, 0}, 9741 {0x6C, 0, 0, 0, 0}, 9742 {0x6D, 0, 0, 0, 0}, 9743 {0x6E, 0, 0, 0, 0}, 9744 {0x6F, 0, 0, 0, 0}, 9745 {0x70, 0, 0, 0, 0}, 9746 {0x71, 0x2, 0x2, 0, 0}, 9747 {0x72, 0, 0, 0, 0}, 9748 {0x73, 0, 0, 0, 0}, 9749 {0x74, 0xe, 0xe, 0, 0}, 9750 {0x75, 0xe, 0xe, 0, 0}, 9751 {0x76, 0xe, 0xe, 0, 0}, 9752 {0x77, 0x13, 0x13, 0, 0}, 9753 {0x78, 0x13, 0x13, 0, 0}, 9754 {0x79, 0x1b, 0x1b, 0, 0}, 9755 {0x7A, 0x1b, 0x1b, 0, 0}, 9756 {0x7B, 0x55, 0x55, 0, 0}, 9757 {0x7C, 0x5b, 0x5b, 0, 0}, 9758 {0x7D, 0x30, 0x30, 1, 1}, 9759 {0x7E, 0, 0, 0, 0}, 9760 {0x7F, 0, 0, 0, 0}, 9761 {0x80, 0, 0, 0, 0}, 9762 {0x81, 0, 0, 0, 0}, 9763 {0x82, 0, 0, 0, 0}, 9764 {0x83, 0, 0, 0, 0}, 9765 {0x84, 0, 0, 0, 0}, 9766 {0x85, 0, 0, 0, 0}, 9767 {0x86, 0, 0, 0, 0}, 9768 {0x87, 0, 0, 0, 0}, 9769 {0x88, 0, 0, 0, 0}, 9770 {0x89, 0, 0, 0, 0}, 9771 {0x8A, 0, 0, 0, 0}, 9772 {0x8B, 0, 0, 0, 0}, 9773 {0x8C, 0, 0, 0, 0}, 9774 {0x8D, 0, 0, 0, 0}, 9775 {0x8E, 0, 0, 0, 0}, 9776 {0x8F, 0, 0, 0, 0}, 9777 {0x90, 0, 0, 0, 0}, 9778 {0x91, 0, 0, 0, 0}, 9779 {0x92, 0, 0, 0, 0}, 9780 {0x93, 0x70, 0x70, 0, 0}, 9781 {0x94, 0x70, 0x70, 0, 0}, 9782 {0x95, 0x70, 0x70, 0, 0}, 9783 {0x96, 0x70, 0x70, 0, 0}, 9784 {0x97, 0x70, 0x70, 0, 0}, 9785 {0x98, 0x70, 0x70, 0, 0}, 9786 {0x99, 0x70, 0x70, 0, 0}, 9787 {0x9A, 0x70, 0x70, 0, 0}, 9788 {0xFFFF, 0, 0, 0, 0} 9789 }; 9790 9791 static struct radio_regs regs_RX_2056_rev6[] = { 9792 {0x02, 0, 0, 0, 0}, 9793 {0x03, 0, 0, 0, 0}, 9794 {0x04, 0, 0, 0, 0}, 9795 {0x05, 0, 0, 0, 0}, 9796 {0x06, 0, 0, 0, 0}, 9797 {0x07, 0, 0, 0, 0}, 9798 {0x08, 0, 0, 0, 0}, 9799 {0x09, 0, 0, 0, 0}, 9800 {0x0A, 0, 0, 0, 0}, 9801 {0x0B, 0, 0, 0, 0}, 9802 {0x0C, 0, 0, 0, 0}, 9803 {0x0D, 0, 0, 0, 0}, 9804 {0x0E, 0, 0, 0, 0}, 9805 {0x0F, 0, 0, 0, 0}, 9806 {0x10, 0, 0, 0, 0}, 9807 {0x11, 0, 0, 0, 0}, 9808 {0x12, 0, 0, 0, 0}, 9809 {0x13, 0, 0, 0, 0}, 9810 {0x14, 0, 0, 0, 0}, 9811 {0x15, 0, 0, 0, 0}, 9812 {0x16, 0, 0, 0, 0}, 9813 {0x17, 0, 0, 0, 0}, 9814 {0x18, 0, 0, 0, 0}, 9815 {0x19, 0, 0, 0, 0}, 9816 {0x1A, 0, 0, 0, 0}, 9817 {0x1B, 0, 0, 0, 0}, 9818 {0x1C, 0, 0, 0, 0}, 9819 {0x1D, 0, 0, 0, 0}, 9820 {0x1E, 0, 0, 0, 0}, 9821 {0x1F, 0, 0, 0, 0}, 9822 {0x20, 0x3, 0x3, 0, 0}, 9823 {0x21, 0, 0, 0, 0}, 9824 {0x22, 0, 0, 0, 0}, 9825 {0x23, 0x90, 0x90, 0, 0}, 9826 {0x24, 0x55, 0x55, 0, 0}, 9827 {0x25, 0x15, 0x15, 0, 0}, 9828 {0x26, 0x5, 0x5, 0, 0}, 9829 {0x27, 0x15, 0x15, 0, 0}, 9830 {0x28, 0x5, 0x5, 0, 0}, 9831 {0x29, 0x20, 0x20, 0, 0}, 9832 {0x2A, 0x11, 0x11, 0, 0}, 9833 {0x2B, 0x90, 0x90, 0, 0}, 9834 {0x2C, 0, 0, 0, 0}, 9835 {0x2D, 0x88, 0x88, 0, 0}, 9836 {0x2E, 0x32, 0x32, 0, 0}, 9837 {0x2F, 0x77, 0x77, 0, 0}, 9838 {0x30, 0x17, 0x17, 1, 1}, 9839 {0x31, 0xff, 0xff, 1, 1}, 9840 {0x32, 0x20, 0x20, 0, 0}, 9841 {0x33, 0, 0, 0, 0}, 9842 {0x34, 0x88, 0x88, 0, 0}, 9843 {0x35, 0x32, 0x32, 0, 0}, 9844 {0x36, 0x77, 0x77, 0, 0}, 9845 {0x37, 0x17, 0x17, 1, 1}, 9846 {0x38, 0xf0, 0xf0, 1, 1}, 9847 {0x39, 0x20, 0x20, 0, 0}, 9848 {0x3A, 0x8, 0x8, 0, 0}, 9849 {0x3B, 0x55, 0x55, 1, 1}, 9850 {0x3C, 0, 0, 0, 0}, 9851 {0x3D, 0x88, 0x88, 1, 1}, 9852 {0x3E, 0, 0, 0, 0}, 9853 {0x3F, 0x44, 0x44, 0, 0}, 9854 {0x40, 0x7, 0x7, 1, 1}, 9855 {0x41, 0x6, 0x6, 0, 0}, 9856 {0x42, 0x4, 0x4, 0, 0}, 9857 {0x43, 0, 0, 0, 0}, 9858 {0x44, 0x8, 0x8, 0, 0}, 9859 {0x45, 0x55, 0x55, 1, 1}, 9860 {0x46, 0, 0, 0, 0}, 9861 {0x47, 0x11, 0x11, 0, 0}, 9862 {0x48, 0, 0, 0, 0}, 9863 {0x49, 0x44, 0x44, 0, 0}, 9864 {0x4A, 0x7, 0x7, 0, 0}, 9865 {0x4B, 0x6, 0x6, 0, 0}, 9866 {0x4C, 0x4, 0x4, 0, 0}, 9867 {0x4D, 0, 0, 0, 0}, 9868 {0x4E, 0, 0, 0, 0}, 9869 {0x4F, 0x26, 0x26, 1, 1}, 9870 {0x50, 0x26, 0x26, 1, 1}, 9871 {0x51, 0xf, 0xf, 1, 1}, 9872 {0x52, 0xf, 0xf, 1, 1}, 9873 {0x53, 0x44, 0x44, 0, 0}, 9874 {0x54, 0, 0, 0, 0}, 9875 {0x55, 0, 0, 0, 0}, 9876 {0x56, 0x8, 0x8, 0, 0}, 9877 {0x57, 0x8, 0x8, 0, 0}, 9878 {0x58, 0x7, 0x7, 0, 0}, 9879 {0x59, 0x22, 0x22, 0, 0}, 9880 {0x5A, 0x22, 0x22, 0, 0}, 9881 {0x5B, 0x2, 0x2, 0, 0}, 9882 {0x5C, 0x4, 0x4, 1, 1}, 9883 {0x5D, 0x7, 0x7, 0, 0}, 9884 {0x5E, 0x55, 0x55, 0, 0}, 9885 {0x5F, 0x23, 0x23, 0, 0}, 9886 {0x60, 0x41, 0x41, 0, 0}, 9887 {0x61, 0x1, 0x1, 0, 0}, 9888 {0x62, 0xa, 0xa, 0, 0}, 9889 {0x63, 0, 0, 0, 0}, 9890 {0x64, 0, 0, 0, 0}, 9891 {0x65, 0, 0, 0, 0}, 9892 {0x66, 0, 0, 0, 0}, 9893 {0x67, 0, 0, 0, 0}, 9894 {0x68, 0, 0, 0, 0}, 9895 {0x69, 0, 0, 0, 0}, 9896 {0x6A, 0, 0, 0, 0}, 9897 {0x6B, 0xc, 0xc, 0, 0}, 9898 {0x6C, 0, 0, 0, 0}, 9899 {0x6D, 0, 0, 0, 0}, 9900 {0x6E, 0, 0, 0, 0}, 9901 {0x6F, 0, 0, 0, 0}, 9902 {0x70, 0, 0, 0, 0}, 9903 {0x71, 0, 0, 0, 0}, 9904 {0x72, 0x22, 0x22, 0, 0}, 9905 {0x73, 0x22, 0x22, 0, 0}, 9906 {0x74, 0, 0, 1, 1}, 9907 {0x75, 0xa, 0xa, 0, 0}, 9908 {0x76, 0x1, 0x1, 0, 0}, 9909 {0x77, 0x22, 0x22, 0, 0}, 9910 {0x78, 0x30, 0x30, 0, 0}, 9911 {0x79, 0, 0, 0, 0}, 9912 {0x7A, 0, 0, 0, 0}, 9913 {0x7B, 0, 0, 0, 0}, 9914 {0x7C, 0, 0, 0, 0}, 9915 {0x7D, 0x5, 0x5, 1, 1}, 9916 {0x7E, 0, 0, 0, 0}, 9917 {0x7F, 0, 0, 0, 0}, 9918 {0x80, 0, 0, 0, 0}, 9919 {0x81, 0, 0, 0, 0}, 9920 {0x82, 0, 0, 0, 0}, 9921 {0x83, 0, 0, 0, 0}, 9922 {0x84, 0, 0, 0, 0}, 9923 {0x85, 0, 0, 0, 0}, 9924 {0x86, 0, 0, 0, 0}, 9925 {0x87, 0, 0, 0, 0}, 9926 {0x88, 0, 0, 0, 0}, 9927 {0x89, 0, 0, 0, 0}, 9928 {0x8A, 0, 0, 0, 0}, 9929 {0x8B, 0, 0, 0, 0}, 9930 {0x8C, 0, 0, 0, 0}, 9931 {0x8D, 0, 0, 0, 0}, 9932 {0x8E, 0, 0, 0, 0}, 9933 {0x8F, 0, 0, 0, 0}, 9934 {0x90, 0, 0, 0, 0}, 9935 {0x91, 0, 0, 0, 0}, 9936 {0x92, 0, 0, 0, 0}, 9937 {0x93, 0, 0, 0, 0}, 9938 {0x94, 0, 0, 0, 0}, 9939 {0xFFFF, 0, 0, 0, 0} 9940 }; 9941 9942 static struct radio_regs regs_SYN_2056_rev7[] = { 9943 {0x02, 0, 0, 0, 0}, 9944 {0x03, 0, 0, 0, 0}, 9945 {0x04, 0, 0, 0, 0}, 9946 {0x05, 0, 0, 0, 0}, 9947 {0x06, 0, 0, 0, 0}, 9948 {0x07, 0, 0, 0, 0}, 9949 {0x08, 0, 0, 0, 0}, 9950 {0x09, 0x1, 0x1, 0, 0}, 9951 {0x0A, 0, 0, 0, 0}, 9952 {0x0B, 0, 0, 0, 0}, 9953 {0x0C, 0, 0, 0, 0}, 9954 {0x0D, 0, 0, 0, 0}, 9955 {0x0E, 0, 0, 0, 0}, 9956 {0x0F, 0, 0, 0, 0}, 9957 {0x10, 0, 0, 0, 0}, 9958 {0x11, 0, 0, 0, 0}, 9959 {0x12, 0, 0, 0, 0}, 9960 {0x13, 0, 0, 0, 0}, 9961 {0x14, 0, 0, 0, 0}, 9962 {0x15, 0, 0, 0, 0}, 9963 {0x16, 0, 0, 0, 0}, 9964 {0x17, 0, 0, 0, 0}, 9965 {0x18, 0, 0, 0, 0}, 9966 {0x19, 0, 0, 0, 0}, 9967 {0x1A, 0, 0, 0, 0}, 9968 {0x1B, 0, 0, 0, 0}, 9969 {0x1C, 0, 0, 0, 0}, 9970 {0x1D, 0, 0, 0, 0}, 9971 {0x1E, 0, 0, 0, 0}, 9972 {0x1F, 0, 0, 0, 0}, 9973 {0x20, 0, 0, 0, 0}, 9974 {0x21, 0, 0, 0, 0}, 9975 {0x22, 0x60, 0x60, 0, 0}, 9976 {0x23, 0x6, 0x6, 0, 0}, 9977 {0x24, 0xc, 0xc, 0, 0}, 9978 {0x25, 0, 0, 0, 0}, 9979 {0x26, 0, 0, 0, 0}, 9980 {0x27, 0, 0, 0, 0}, 9981 {0x28, 0x1, 0x1, 0, 0}, 9982 {0x29, 0, 0, 0, 0}, 9983 {0x2A, 0, 0, 0, 0}, 9984 {0x2B, 0, 0, 0, 0}, 9985 {0x2C, 0, 0, 0, 0}, 9986 {0x2D, 0, 0, 0, 0}, 9987 {0x2E, 0, 0, 0, 0}, 9988 {0x2F, 0x1f, 0x1f, 0, 0}, 9989 {0x30, 0x15, 0x15, 0, 0}, 9990 {0x31, 0xf, 0xf, 0, 0}, 9991 {0x32, 0, 0, 0, 0}, 9992 {0x33, 0, 0, 0, 0}, 9993 {0x34, 0, 0, 0, 0}, 9994 {0x35, 0, 0, 0, 0}, 9995 {0x36, 0, 0, 0, 0}, 9996 {0x37, 0, 0, 0, 0}, 9997 {0x38, 0, 0, 0, 0}, 9998 {0x39, 0, 0, 0, 0}, 9999 {0x3A, 0, 0, 0, 0}, 10000 {0x3B, 0, 0, 0, 0}, 10001 {0x3C, 0x13, 0x13, 0, 0}, 10002 {0x3D, 0xf, 0xf, 0, 0}, 10003 {0x3E, 0x18, 0x18, 0, 0}, 10004 {0x3F, 0, 0, 0, 0}, 10005 {0x40, 0, 0, 0, 0}, 10006 {0x41, 0x20, 0x20, 0, 0}, 10007 {0x42, 0x20, 0x20, 0, 0}, 10008 {0x43, 0, 0, 0, 0}, 10009 {0x44, 0x77, 0x77, 0, 0}, 10010 {0x45, 0x7, 0x7, 0, 0}, 10011 {0x46, 0x1, 0x1, 0, 0}, 10012 {0x47, 0x4, 0x4, 0, 0}, 10013 {0x48, 0xf, 0xf, 0, 0}, 10014 {0x49, 0x30, 0x30, 0, 0}, 10015 {0x4A, 0x32, 0x32, 0, 0}, 10016 {0x4B, 0xd, 0xd, 0, 0}, 10017 {0x4C, 0xd, 0xd, 0, 0}, 10018 {0x4D, 0x4, 0x4, 0, 0}, 10019 {0x4E, 0x6, 0x6, 0, 0}, 10020 {0x4F, 0x1, 0x1, 0, 0}, 10021 {0x50, 0x1c, 0x1c, 0, 0}, 10022 {0x51, 0x2, 0x2, 0, 0}, 10023 {0x52, 0x2, 0x2, 0, 0}, 10024 {0x53, 0xf7, 0xf7, 1, 1}, 10025 {0x54, 0xb4, 0xb4, 0, 0}, 10026 {0x55, 0xd2, 0xd2, 0, 0}, 10027 {0x56, 0, 0, 0, 0}, 10028 {0x57, 0, 0, 0, 0}, 10029 {0x58, 0x4, 0x4, 0, 0}, 10030 {0x59, 0x96, 0x96, 0, 0}, 10031 {0x5A, 0x3e, 0x3e, 0, 0}, 10032 {0x5B, 0x3e, 0x3e, 0, 0}, 10033 {0x5C, 0x13, 0x13, 0, 0}, 10034 {0x5D, 0x2, 0x2, 0, 0}, 10035 {0x5E, 0, 0, 0, 0}, 10036 {0x5F, 0x7, 0x7, 0, 0}, 10037 {0x60, 0x7, 0x7, 1, 1}, 10038 {0x61, 0x8, 0x8, 0, 0}, 10039 {0x62, 0x3, 0x3, 0, 0}, 10040 {0x63, 0, 0, 0, 0}, 10041 {0x64, 0, 0, 0, 0}, 10042 {0x65, 0, 0, 0, 0}, 10043 {0x66, 0, 0, 0, 0}, 10044 {0x67, 0, 0, 0, 0}, 10045 {0x68, 0x40, 0x40, 0, 0}, 10046 {0x69, 0, 0, 0, 0}, 10047 {0x6A, 0, 0, 0, 0}, 10048 {0x6B, 0, 0, 0, 0}, 10049 {0x6C, 0, 0, 0, 0}, 10050 {0x6D, 0x1, 0x1, 0, 0}, 10051 {0x6E, 0, 0, 0, 0}, 10052 {0x6F, 0, 0, 0, 0}, 10053 {0x70, 0x60, 0x60, 0, 0}, 10054 {0x71, 0x66, 0x66, 0, 0}, 10055 {0x72, 0xc, 0xc, 0, 0}, 10056 {0x73, 0x66, 0x66, 0, 0}, 10057 {0x74, 0x8f, 0x8f, 1, 1}, 10058 {0x75, 0, 0, 0, 0}, 10059 {0x76, 0xcc, 0xcc, 0, 0}, 10060 {0x77, 0x1, 0x1, 0, 0}, 10061 {0x78, 0x66, 0x66, 0, 0}, 10062 {0x79, 0x66, 0x66, 0, 0}, 10063 {0x7A, 0, 0, 0, 0}, 10064 {0x7B, 0, 0, 0, 0}, 10065 {0x7C, 0, 0, 0, 0}, 10066 {0x7D, 0, 0, 0, 0}, 10067 {0x7E, 0, 0, 0, 0}, 10068 {0x7F, 0, 0, 0, 0}, 10069 {0x80, 0, 0, 0, 0}, 10070 {0x81, 0, 0, 0, 0}, 10071 {0x82, 0, 0, 0, 0}, 10072 {0x83, 0, 0, 0, 0}, 10073 {0x84, 0, 0, 0, 0}, 10074 {0x85, 0xff, 0xff, 0, 0}, 10075 {0x86, 0, 0, 0, 0}, 10076 {0x87, 0, 0, 0, 0}, 10077 {0x88, 0, 0, 0, 0}, 10078 {0x89, 0, 0, 0, 0}, 10079 {0x8A, 0, 0, 0, 0}, 10080 {0x8B, 0, 0, 0, 0}, 10081 {0x8C, 0, 0, 0, 0}, 10082 {0x8D, 0, 0, 0, 0}, 10083 {0x8E, 0, 0, 0, 0}, 10084 {0x8F, 0, 0, 0, 0}, 10085 {0x90, 0, 0, 0, 0}, 10086 {0x91, 0, 0, 0, 0}, 10087 {0x92, 0, 0, 0, 0}, 10088 {0x93, 0, 0, 0, 0}, 10089 {0x94, 0, 0, 0, 0}, 10090 {0x95, 0, 0, 0, 0}, 10091 {0x96, 0, 0, 0, 0}, 10092 {0x97, 0, 0, 0, 0}, 10093 {0x98, 0, 0, 0, 0}, 10094 {0x99, 0, 0, 0, 0}, 10095 {0x9A, 0, 0, 0, 0}, 10096 {0x9B, 0, 0, 0, 0}, 10097 {0x9C, 0, 0, 0, 0}, 10098 {0x9D, 0, 0, 0, 0}, 10099 {0x9E, 0, 0, 0, 0}, 10100 {0x9F, 0x6, 0x6, 0, 0}, 10101 {0xA0, 0x66, 0x66, 0, 0}, 10102 {0xA1, 0x66, 0x66, 0, 0}, 10103 {0xA2, 0x66, 0x66, 0, 0}, 10104 {0xA3, 0x66, 0x66, 0, 0}, 10105 {0xA4, 0x66, 0x66, 0, 0}, 10106 {0xA5, 0x66, 0x66, 0, 0}, 10107 {0xA6, 0x66, 0x66, 0, 0}, 10108 {0xA7, 0x66, 0x66, 0, 0}, 10109 {0xA8, 0x66, 0x66, 0, 0}, 10110 {0xA9, 0x66, 0x66, 0, 0}, 10111 {0xAA, 0x66, 0x66, 0, 0}, 10112 {0xAB, 0x66, 0x66, 0, 0}, 10113 {0xAC, 0x66, 0x66, 0, 0}, 10114 {0xAD, 0x66, 0x66, 0, 0}, 10115 {0xAE, 0x66, 0x66, 0, 0}, 10116 {0xAF, 0x66, 0x66, 0, 0}, 10117 {0xB0, 0x66, 0x66, 0, 0}, 10118 {0xB1, 0x66, 0x66, 0, 0}, 10119 {0xB2, 0x66, 0x66, 0, 0}, 10120 {0xB3, 0xa, 0xa, 0, 0}, 10121 {0xB4, 0, 0, 0, 0}, 10122 {0xB5, 0, 0, 0, 0}, 10123 {0xB6, 0, 0, 0, 0}, 10124 {0xFFFF, 0, 0, 0, 0}, 10125 }; 10126 10127 static struct radio_regs regs_TX_2056_rev7[] = { 10128 {0x02, 0, 0, 0, 0}, 10129 {0x03, 0, 0, 0, 0}, 10130 {0x04, 0, 0, 0, 0}, 10131 {0x05, 0, 0, 0, 0}, 10132 {0x06, 0, 0, 0, 0}, 10133 {0x07, 0, 0, 0, 0}, 10134 {0x08, 0, 0, 0, 0}, 10135 {0x09, 0, 0, 0, 0}, 10136 {0x0A, 0, 0, 0, 0}, 10137 {0x0B, 0, 0, 0, 0}, 10138 {0x0C, 0, 0, 0, 0}, 10139 {0x0D, 0, 0, 0, 0}, 10140 {0x0E, 0, 0, 0, 0}, 10141 {0x0F, 0, 0, 0, 0}, 10142 {0x10, 0, 0, 0, 0}, 10143 {0x11, 0, 0, 0, 0}, 10144 {0x12, 0, 0, 0, 0}, 10145 {0x13, 0, 0, 0, 0}, 10146 {0x14, 0, 0, 0, 0}, 10147 {0x15, 0, 0, 0, 0}, 10148 {0x16, 0, 0, 0, 0}, 10149 {0x17, 0, 0, 0, 0}, 10150 {0x18, 0, 0, 0, 0}, 10151 {0x19, 0, 0, 0, 0}, 10152 {0x1A, 0, 0, 0, 0}, 10153 {0x1B, 0, 0, 0, 0}, 10154 {0x1C, 0, 0, 0, 0}, 10155 {0x1D, 0, 0, 0, 0}, 10156 {0x1E, 0, 0, 0, 0}, 10157 {0x1F, 0, 0, 0, 0}, 10158 {0x20, 0, 0, 0, 0}, 10159 {0x21, 0x88, 0x88, 0, 0}, 10160 {0x22, 0x88, 0x88, 0, 0}, 10161 {0x23, 0x88, 0x88, 0, 0}, 10162 {0x24, 0x88, 0x88, 0, 0}, 10163 {0x25, 0xc, 0xc, 0, 0}, 10164 {0x26, 0, 0, 0, 0}, 10165 {0x27, 0x3, 0x3, 0, 0}, 10166 {0x28, 0, 0, 0, 0}, 10167 {0x29, 0x3, 0x3, 0, 0}, 10168 {0x2A, 0x37, 0x37, 0, 0}, 10169 {0x2B, 0x3, 0x3, 0, 0}, 10170 {0x2C, 0, 0, 0, 0}, 10171 {0x2D, 0, 0, 0, 0}, 10172 {0x2E, 0x1, 0x1, 0, 0}, 10173 {0x2F, 0x1, 0x1, 0, 0}, 10174 {0x30, 0, 0, 0, 0}, 10175 {0x31, 0, 0, 0, 0}, 10176 {0x32, 0, 0, 0, 0}, 10177 {0x33, 0x11, 0x11, 0, 0}, 10178 {0x34, 0xee, 0xee, 1, 1}, 10179 {0x35, 0, 0, 0, 0}, 10180 {0x36, 0, 0, 0, 0}, 10181 {0x37, 0x3, 0x3, 0, 0}, 10182 {0x38, 0x50, 0x50, 1, 1}, 10183 {0x39, 0, 0, 0, 0}, 10184 {0x3A, 0x50, 0x50, 1, 1}, 10185 {0x3B, 0, 0, 0, 0}, 10186 {0x3C, 0x6e, 0x6e, 0, 0}, 10187 {0x3D, 0xf0, 0xf0, 1, 1}, 10188 {0x3E, 0, 0, 0, 0}, 10189 {0x3F, 0, 0, 0, 0}, 10190 {0x40, 0, 0, 0, 0}, 10191 {0x41, 0x3, 0x3, 0, 0}, 10192 {0x42, 0x3, 0x3, 0, 0}, 10193 {0x43, 0, 0, 0, 0}, 10194 {0x44, 0x1e, 0x1e, 0, 0}, 10195 {0x45, 0, 0, 0, 0}, 10196 {0x46, 0x6e, 0x6e, 0, 0}, 10197 {0x47, 0xf0, 0xf0, 1, 1}, 10198 {0x48, 0, 0, 0, 0}, 10199 {0x49, 0x2, 0x2, 0, 0}, 10200 {0x4A, 0xff, 0xff, 1, 1}, 10201 {0x4B, 0xc, 0xc, 0, 0}, 10202 {0x4C, 0, 0, 0, 0}, 10203 {0x4D, 0x38, 0x38, 0, 0}, 10204 {0x4E, 0x70, 0x70, 1, 1}, 10205 {0x4F, 0x2, 0x2, 0, 0}, 10206 {0x50, 0x88, 0x88, 0, 0}, 10207 {0x51, 0xc, 0xc, 0, 0}, 10208 {0x52, 0, 0, 0, 0}, 10209 {0x53, 0x8, 0x8, 0, 0}, 10210 {0x54, 0x70, 0x70, 1, 1}, 10211 {0x55, 0x2, 0x2, 0, 0}, 10212 {0x56, 0xff, 0xff, 1, 1}, 10213 {0x57, 0, 0, 0, 0}, 10214 {0x58, 0x83, 0x83, 0, 0}, 10215 {0x59, 0x77, 0x77, 1, 1}, 10216 {0x5A, 0, 0, 0, 0}, 10217 {0x5B, 0x2, 0x2, 0, 0}, 10218 {0x5C, 0x88, 0x88, 0, 0}, 10219 {0x5D, 0, 0, 0, 0}, 10220 {0x5E, 0x8, 0x8, 0, 0}, 10221 {0x5F, 0x77, 0x77, 1, 1}, 10222 {0x60, 0x1, 0x1, 0, 0}, 10223 {0x61, 0, 0, 0, 0}, 10224 {0x62, 0x7, 0x7, 0, 0}, 10225 {0x63, 0, 0, 0, 0}, 10226 {0x64, 0x7, 0x7, 0, 0}, 10227 {0x65, 0, 0, 0, 0}, 10228 {0x66, 0, 0, 0, 0}, 10229 {0x67, 0, 0, 1, 1}, 10230 {0x68, 0, 0, 0, 0}, 10231 {0x69, 0xa, 0xa, 0, 0}, 10232 {0x6A, 0, 0, 0, 0}, 10233 {0x6B, 0, 0, 0, 0}, 10234 {0x6C, 0, 0, 0, 0}, 10235 {0x6D, 0, 0, 0, 0}, 10236 {0x6E, 0, 0, 0, 0}, 10237 {0x6F, 0, 0, 0, 0}, 10238 {0x70, 0, 0, 0, 0}, 10239 {0x71, 0x2, 0x2, 0, 0}, 10240 {0x72, 0, 0, 0, 0}, 10241 {0x73, 0, 0, 0, 0}, 10242 {0x74, 0xe, 0xe, 0, 0}, 10243 {0x75, 0xe, 0xe, 0, 0}, 10244 {0x76, 0xe, 0xe, 0, 0}, 10245 {0x77, 0x13, 0x13, 0, 0}, 10246 {0x78, 0x13, 0x13, 0, 0}, 10247 {0x79, 0x1b, 0x1b, 0, 0}, 10248 {0x7A, 0x1b, 0x1b, 0, 0}, 10249 {0x7B, 0x55, 0x55, 0, 0}, 10250 {0x7C, 0x5b, 0x5b, 0, 0}, 10251 {0x7D, 0x30, 0x30, 1, 1}, 10252 {0x7E, 0, 0, 0, 0}, 10253 {0x7F, 0, 0, 0, 0}, 10254 {0x80, 0, 0, 0, 0}, 10255 {0x81, 0, 0, 0, 0}, 10256 {0x82, 0, 0, 0, 0}, 10257 {0x83, 0, 0, 0, 0}, 10258 {0x84, 0, 0, 0, 0}, 10259 {0x85, 0, 0, 0, 0}, 10260 {0x86, 0, 0, 0, 0}, 10261 {0x87, 0, 0, 0, 0}, 10262 {0x88, 0, 0, 0, 0}, 10263 {0x89, 0, 0, 0, 0}, 10264 {0x8A, 0, 0, 0, 0}, 10265 {0x8B, 0, 0, 0, 0}, 10266 {0x8C, 0, 0, 0, 0}, 10267 {0x8D, 0, 0, 0, 0}, 10268 {0x8E, 0, 0, 0, 0}, 10269 {0x8F, 0, 0, 0, 0}, 10270 {0x90, 0, 0, 0, 0}, 10271 {0x91, 0, 0, 0, 0}, 10272 {0x92, 0, 0, 0, 0}, 10273 {0x93, 0x70, 0x70, 0, 0}, 10274 {0x94, 0x70, 0x70, 0, 0}, 10275 {0x95, 0x71, 0x71, 1, 1}, 10276 {0x96, 0x71, 0x71, 1, 1}, 10277 {0x97, 0x72, 0x72, 1, 1}, 10278 {0x98, 0x73, 0x73, 1, 1}, 10279 {0x99, 0x74, 0x74, 1, 1}, 10280 {0x9A, 0x75, 0x75, 1, 1}, 10281 {0xFFFF, 0, 0, 0, 0}, 10282 }; 10283 10284 static struct radio_regs regs_RX_2056_rev7[] = { 10285 {0x02, 0, 0, 0, 0}, 10286 {0x03, 0, 0, 0, 0}, 10287 {0x04, 0, 0, 0, 0}, 10288 {0x05, 0, 0, 0, 0}, 10289 {0x06, 0, 0, 0, 0}, 10290 {0x07, 0, 0, 0, 0}, 10291 {0x08, 0, 0, 0, 0}, 10292 {0x09, 0, 0, 0, 0}, 10293 {0x0A, 0, 0, 0, 0}, 10294 {0x0B, 0, 0, 0, 0}, 10295 {0x0C, 0, 0, 0, 0}, 10296 {0x0D, 0, 0, 0, 0}, 10297 {0x0E, 0, 0, 0, 0}, 10298 {0x0F, 0, 0, 0, 0}, 10299 {0x10, 0, 0, 0, 0}, 10300 {0x11, 0, 0, 0, 0}, 10301 {0x12, 0, 0, 0, 0}, 10302 {0x13, 0, 0, 0, 0}, 10303 {0x14, 0, 0, 0, 0}, 10304 {0x15, 0, 0, 0, 0}, 10305 {0x16, 0, 0, 0, 0}, 10306 {0x17, 0, 0, 0, 0}, 10307 {0x18, 0, 0, 0, 0}, 10308 {0x19, 0, 0, 0, 0}, 10309 {0x1A, 0, 0, 0, 0}, 10310 {0x1B, 0, 0, 0, 0}, 10311 {0x1C, 0, 0, 0, 0}, 10312 {0x1D, 0, 0, 0, 0}, 10313 {0x1E, 0, 0, 0, 0}, 10314 {0x1F, 0, 0, 0, 0}, 10315 {0x20, 0x3, 0x3, 0, 0}, 10316 {0x21, 0, 0, 0, 0}, 10317 {0x22, 0, 0, 0, 0}, 10318 {0x23, 0x90, 0x90, 0, 0}, 10319 {0x24, 0x55, 0x55, 0, 0}, 10320 {0x25, 0x15, 0x15, 0, 0}, 10321 {0x26, 0x5, 0x5, 0, 0}, 10322 {0x27, 0x15, 0x15, 0, 0}, 10323 {0x28, 0x5, 0x5, 0, 0}, 10324 {0x29, 0x20, 0x20, 0, 0}, 10325 {0x2A, 0x11, 0x11, 0, 0}, 10326 {0x2B, 0x90, 0x90, 0, 0}, 10327 {0x2C, 0, 0, 0, 0}, 10328 {0x2D, 0x88, 0x88, 0, 0}, 10329 {0x2E, 0x32, 0x32, 0, 0}, 10330 {0x2F, 0x77, 0x77, 0, 0}, 10331 {0x30, 0x17, 0x17, 1, 1}, 10332 {0x31, 0xff, 0xff, 1, 1}, 10333 {0x32, 0x20, 0x20, 0, 0}, 10334 {0x33, 0, 0, 0, 0}, 10335 {0x34, 0x88, 0x88, 0, 0}, 10336 {0x35, 0x32, 0x32, 0, 0}, 10337 {0x36, 0x77, 0x77, 0, 0}, 10338 {0x37, 0x17, 0x17, 1, 1}, 10339 {0x38, 0xf0, 0xf0, 1, 1}, 10340 {0x39, 0x20, 0x20, 0, 0}, 10341 {0x3A, 0x8, 0x8, 0, 0}, 10342 {0x3B, 0x55, 0x55, 1, 1}, 10343 {0x3C, 0, 0, 0, 0}, 10344 {0x3D, 0x88, 0x88, 1, 1}, 10345 {0x3E, 0, 0, 0, 0}, 10346 {0x3F, 0, 0, 1, 1}, 10347 {0x40, 0x7, 0x7, 1, 1}, 10348 {0x41, 0x6, 0x6, 0, 0}, 10349 {0x42, 0x4, 0x4, 0, 0}, 10350 {0x43, 0, 0, 0, 0}, 10351 {0x44, 0x8, 0x8, 0, 0}, 10352 {0x45, 0x55, 0x55, 1, 1}, 10353 {0x46, 0, 0, 0, 0}, 10354 {0x47, 0x11, 0x11, 0, 0}, 10355 {0x48, 0, 0, 0, 0}, 10356 {0x49, 0, 0, 1, 1}, 10357 {0x4A, 0x7, 0x7, 0, 0}, 10358 {0x4B, 0x6, 0x6, 0, 0}, 10359 {0x4C, 0x4, 0x4, 0, 0}, 10360 {0x4D, 0, 0, 0, 0}, 10361 {0x4E, 0, 0, 0, 0}, 10362 {0x4F, 0x26, 0x26, 1, 1}, 10363 {0x50, 0x26, 0x26, 1, 1}, 10364 {0x51, 0xf, 0xf, 1, 1}, 10365 {0x52, 0xf, 0xf, 1, 1}, 10366 {0x53, 0x44, 0x44, 0, 0}, 10367 {0x54, 0, 0, 0, 0}, 10368 {0x55, 0, 0, 0, 0}, 10369 {0x56, 0x8, 0x8, 0, 0}, 10370 {0x57, 0x8, 0x8, 0, 0}, 10371 {0x58, 0x7, 0x7, 0, 0}, 10372 {0x59, 0x22, 0x22, 0, 0}, 10373 {0x5A, 0x22, 0x22, 0, 0}, 10374 {0x5B, 0x2, 0x2, 0, 0}, 10375 {0x5C, 0x4, 0x4, 1, 1}, 10376 {0x5D, 0x7, 0x7, 0, 0}, 10377 {0x5E, 0x55, 0x55, 0, 0}, 10378 {0x5F, 0x23, 0x23, 0, 0}, 10379 {0x60, 0x41, 0x41, 0, 0}, 10380 {0x61, 0x1, 0x1, 0, 0}, 10381 {0x62, 0xa, 0xa, 0, 0}, 10382 {0x63, 0, 0, 0, 0}, 10383 {0x64, 0, 0, 0, 0}, 10384 {0x65, 0, 0, 0, 0}, 10385 {0x66, 0, 0, 0, 0}, 10386 {0x67, 0, 0, 0, 0}, 10387 {0x68, 0, 0, 0, 0}, 10388 {0x69, 0, 0, 0, 0}, 10389 {0x6A, 0, 0, 0, 0}, 10390 {0x6B, 0xc, 0xc, 0, 0}, 10391 {0x6C, 0, 0, 0, 0}, 10392 {0x6D, 0, 0, 0, 0}, 10393 {0x6E, 0, 0, 0, 0}, 10394 {0x6F, 0, 0, 0, 0}, 10395 {0x70, 0, 0, 0, 0}, 10396 {0x71, 0, 0, 0, 0}, 10397 {0x72, 0x22, 0x22, 0, 0}, 10398 {0x73, 0x22, 0x22, 0, 0}, 10399 {0x74, 0, 0, 1, 1}, 10400 {0x75, 0xa, 0xa, 0, 0}, 10401 {0x76, 0x1, 0x1, 0, 0}, 10402 {0x77, 0x22, 0x22, 0, 0}, 10403 {0x78, 0x30, 0x30, 0, 0}, 10404 {0x79, 0, 0, 0, 0}, 10405 {0x7A, 0, 0, 0, 0}, 10406 {0x7B, 0, 0, 0, 0}, 10407 {0x7C, 0, 0, 0, 0}, 10408 {0x7D, 0, 0, 0, 0}, 10409 {0x7E, 0, 0, 0, 0}, 10410 {0x7F, 0, 0, 0, 0}, 10411 {0x80, 0, 0, 0, 0}, 10412 {0x81, 0, 0, 0, 0}, 10413 {0x82, 0, 0, 0, 0}, 10414 {0x83, 0, 0, 0, 0}, 10415 {0x84, 0, 0, 0, 0}, 10416 {0x85, 0, 0, 0, 0}, 10417 {0x86, 0, 0, 0, 0}, 10418 {0x87, 0, 0, 0, 0}, 10419 {0x88, 0, 0, 0, 0}, 10420 {0x89, 0, 0, 0, 0}, 10421 {0x8A, 0, 0, 0, 0}, 10422 {0x8B, 0, 0, 0, 0}, 10423 {0x8C, 0, 0, 0, 0}, 10424 {0x8D, 0, 0, 0, 0}, 10425 {0x8E, 0, 0, 0, 0}, 10426 {0x8F, 0, 0, 0, 0}, 10427 {0x90, 0, 0, 0, 0}, 10428 {0x91, 0, 0, 0, 0}, 10429 {0x92, 0, 0, 0, 0}, 10430 {0x93, 0, 0, 0, 0}, 10431 {0x94, 0, 0, 0, 0}, 10432 {0xFFFF, 0, 0, 0, 0}, 10433 }; 10434 10435 static struct radio_regs regs_SYN_2056_rev8[] = { 10436 {0x02, 0, 0, 0, 0}, 10437 {0x03, 0, 0, 0, 0}, 10438 {0x04, 0, 0, 0, 0}, 10439 {0x05, 0, 0, 0, 0}, 10440 {0x06, 0, 0, 0, 0}, 10441 {0x07, 0, 0, 0, 0}, 10442 {0x08, 0, 0, 0, 0}, 10443 {0x09, 0x1, 0x1, 0, 0}, 10444 {0x0A, 0, 0, 0, 0}, 10445 {0x0B, 0, 0, 0, 0}, 10446 {0x0C, 0, 0, 0, 0}, 10447 {0x0D, 0, 0, 0, 0}, 10448 {0x0E, 0, 0, 0, 0}, 10449 {0x0F, 0, 0, 0, 0}, 10450 {0x10, 0, 0, 0, 0}, 10451 {0x11, 0, 0, 0, 0}, 10452 {0x12, 0, 0, 0, 0}, 10453 {0x13, 0, 0, 0, 0}, 10454 {0x14, 0, 0, 0, 0}, 10455 {0x15, 0, 0, 0, 0}, 10456 {0x16, 0, 0, 0, 0}, 10457 {0x17, 0, 0, 0, 0}, 10458 {0x18, 0, 0, 0, 0}, 10459 {0x19, 0, 0, 0, 0}, 10460 {0x1A, 0, 0, 0, 0}, 10461 {0x1B, 0, 0, 0, 0}, 10462 {0x1C, 0, 0, 0, 0}, 10463 {0x1D, 0, 0, 0, 0}, 10464 {0x1E, 0, 0, 0, 0}, 10465 {0x1F, 0, 0, 0, 0}, 10466 {0x20, 0, 0, 0, 0}, 10467 {0x21, 0, 0, 0, 0}, 10468 {0x22, 0x60, 0x60, 0, 0}, 10469 {0x23, 0x6, 0x6, 0, 0}, 10470 {0x24, 0xc, 0xc, 0, 0}, 10471 {0x25, 0, 0, 0, 0}, 10472 {0x26, 0, 0, 0, 0}, 10473 {0x27, 0, 0, 0, 0}, 10474 {0x28, 0x1, 0x1, 0, 0}, 10475 {0x29, 0, 0, 0, 0}, 10476 {0x2A, 0, 0, 0, 0}, 10477 {0x2B, 0, 0, 0, 0}, 10478 {0x2C, 0, 0, 0, 0}, 10479 {0x2D, 0, 0, 0, 0}, 10480 {0x2E, 0, 0, 0, 0}, 10481 {0x2F, 0x1f, 0x1f, 0, 0}, 10482 {0x30, 0x15, 0x15, 0, 0}, 10483 {0x31, 0xf, 0xf, 0, 0}, 10484 {0x32, 0, 0, 0, 0}, 10485 {0x33, 0, 0, 0, 0}, 10486 {0x34, 0, 0, 0, 0}, 10487 {0x35, 0, 0, 0, 0}, 10488 {0x36, 0, 0, 0, 0}, 10489 {0x37, 0, 0, 0, 0}, 10490 {0x38, 0, 0, 0, 0}, 10491 {0x39, 0, 0, 0, 0}, 10492 {0x3A, 0, 0, 0, 0}, 10493 {0x3B, 0, 0, 0, 0}, 10494 {0x3C, 0x13, 0x13, 0, 0}, 10495 {0x3D, 0xf, 0xf, 0, 0}, 10496 {0x3E, 0x18, 0x18, 0, 0}, 10497 {0x3F, 0, 0, 0, 0}, 10498 {0x40, 0, 0, 0, 0}, 10499 {0x41, 0x20, 0x20, 0, 0}, 10500 {0x42, 0x20, 0x20, 0, 0}, 10501 {0x43, 0, 0, 0, 0}, 10502 {0x44, 0x77, 0x77, 0, 0}, 10503 {0x45, 0x7, 0x7, 0, 0}, 10504 {0x46, 0x1, 0x1, 0, 0}, 10505 {0x47, 0x4, 0x4, 0, 0}, 10506 {0x48, 0xf, 0xf, 0, 0}, 10507 {0x49, 0x30, 0x30, 0, 0}, 10508 {0x4A, 0x32, 0x32, 0, 0}, 10509 {0x4B, 0xd, 0xd, 0, 0}, 10510 {0x4C, 0xd, 0xd, 0, 0}, 10511 {0x4D, 0x4, 0x4, 0, 0}, 10512 {0x4E, 0x6, 0x6, 0, 0}, 10513 {0x4F, 0x1, 0x1, 0, 0}, 10514 {0x50, 0x1c, 0x1c, 0, 0}, 10515 {0x51, 0x2, 0x2, 0, 0}, 10516 {0x52, 0x2, 0x2, 0, 0}, 10517 {0x53, 0xf7, 0xf7, 1, 1}, 10518 {0x54, 0xb4, 0xb4, 0, 0}, 10519 {0x55, 0xd2, 0xd2, 0, 0}, 10520 {0x56, 0, 0, 0, 0}, 10521 {0x57, 0, 0, 0, 0}, 10522 {0x58, 0x4, 0x4, 0, 0}, 10523 {0x59, 0x96, 0x96, 0, 0}, 10524 {0x5A, 0x3e, 0x3e, 0, 0}, 10525 {0x5B, 0x3e, 0x3e, 0, 0}, 10526 {0x5C, 0x13, 0x13, 0, 0}, 10527 {0x5D, 0x2, 0x2, 0, 0}, 10528 {0x5E, 0, 0, 0, 0}, 10529 {0x5F, 0x7, 0x7, 0, 0}, 10530 {0x60, 0x7, 0x7, 1, 1}, 10531 {0x61, 0x8, 0x8, 0, 0}, 10532 {0x62, 0x3, 0x3, 0, 0}, 10533 {0x63, 0, 0, 0, 0}, 10534 {0x64, 0, 0, 0, 0}, 10535 {0x65, 0, 0, 0, 0}, 10536 {0x66, 0, 0, 0, 0}, 10537 {0x67, 0, 0, 0, 0}, 10538 {0x68, 0x40, 0x40, 0, 0}, 10539 {0x69, 0, 0, 0, 0}, 10540 {0x6A, 0, 0, 0, 0}, 10541 {0x6B, 0, 0, 0, 0}, 10542 {0x6C, 0, 0, 0, 0}, 10543 {0x6D, 0x1, 0x1, 0, 0}, 10544 {0x6E, 0, 0, 0, 0}, 10545 {0x6F, 0, 0, 0, 0}, 10546 {0x70, 0x60, 0x60, 0, 0}, 10547 {0x71, 0x66, 0x66, 0, 0}, 10548 {0x72, 0xc, 0xc, 0, 0}, 10549 {0x73, 0x66, 0x66, 0, 0}, 10550 {0x74, 0x8f, 0x8f, 1, 1}, 10551 {0x75, 0, 0, 0, 0}, 10552 {0x76, 0xcc, 0xcc, 0, 0}, 10553 {0x77, 0x1, 0x1, 0, 0}, 10554 {0x78, 0x66, 0x66, 0, 0}, 10555 {0x79, 0x66, 0x66, 0, 0}, 10556 {0x7A, 0, 0, 0, 0}, 10557 {0x7B, 0, 0, 0, 0}, 10558 {0x7C, 0, 0, 0, 0}, 10559 {0x7D, 0, 0, 0, 0}, 10560 {0x7E, 0, 0, 0, 0}, 10561 {0x7F, 0, 0, 0, 0}, 10562 {0x80, 0, 0, 0, 0}, 10563 {0x81, 0, 0, 0, 0}, 10564 {0x82, 0, 0, 0, 0}, 10565 {0x83, 0, 0, 0, 0}, 10566 {0x84, 0, 0, 0, 0}, 10567 {0x85, 0xff, 0xff, 0, 0}, 10568 {0x86, 0, 0, 0, 0}, 10569 {0x87, 0, 0, 0, 0}, 10570 {0x88, 0, 0, 0, 0}, 10571 {0x89, 0, 0, 0, 0}, 10572 {0x8A, 0, 0, 0, 0}, 10573 {0x8B, 0, 0, 0, 0}, 10574 {0x8C, 0, 0, 0, 0}, 10575 {0x8D, 0, 0, 0, 0}, 10576 {0x8E, 0, 0, 0, 0}, 10577 {0x8F, 0, 0, 0, 0}, 10578 {0x90, 0, 0, 0, 0}, 10579 {0x91, 0, 0, 0, 0}, 10580 {0x92, 0, 0, 0, 0}, 10581 {0x93, 0, 0, 0, 0}, 10582 {0x94, 0, 0, 0, 0}, 10583 {0x95, 0, 0, 0, 0}, 10584 {0x96, 0, 0, 0, 0}, 10585 {0x97, 0, 0, 0, 0}, 10586 {0x98, 0, 0, 0, 0}, 10587 {0x99, 0, 0, 0, 0}, 10588 {0x9A, 0, 0, 0, 0}, 10589 {0x9B, 0, 0, 0, 0}, 10590 {0x9C, 0, 0, 0, 0}, 10591 {0x9D, 0, 0, 0, 0}, 10592 {0x9E, 0, 0, 0, 0}, 10593 {0x9F, 0x6, 0x6, 0, 0}, 10594 {0xA0, 0x66, 0x66, 0, 0}, 10595 {0xA1, 0x66, 0x66, 0, 0}, 10596 {0xA2, 0x66, 0x66, 0, 0}, 10597 {0xA3, 0x66, 0x66, 0, 0}, 10598 {0xA4, 0x66, 0x66, 0, 0}, 10599 {0xA5, 0x66, 0x66, 0, 0}, 10600 {0xA6, 0x66, 0x66, 0, 0}, 10601 {0xA7, 0x66, 0x66, 0, 0}, 10602 {0xA8, 0x66, 0x66, 0, 0}, 10603 {0xA9, 0x66, 0x66, 0, 0}, 10604 {0xAA, 0x66, 0x66, 0, 0}, 10605 {0xAB, 0x66, 0x66, 0, 0}, 10606 {0xAC, 0x66, 0x66, 0, 0}, 10607 {0xAD, 0x66, 0x66, 0, 0}, 10608 {0xAE, 0x66, 0x66, 0, 0}, 10609 {0xAF, 0x66, 0x66, 0, 0}, 10610 {0xB0, 0x66, 0x66, 0, 0}, 10611 {0xB1, 0x66, 0x66, 0, 0}, 10612 {0xB2, 0x66, 0x66, 0, 0}, 10613 {0xB3, 0xa, 0xa, 0, 0}, 10614 {0xB4, 0, 0, 0, 0}, 10615 {0xB5, 0, 0, 0, 0}, 10616 {0xB6, 0, 0, 0, 0}, 10617 {0xFFFF, 0, 0, 0, 0}, 10618 }; 10619 10620 static struct radio_regs regs_TX_2056_rev8[] = { 10621 {0x02, 0, 0, 0, 0}, 10622 {0x03, 0, 0, 0, 0}, 10623 {0x04, 0, 0, 0, 0}, 10624 {0x05, 0, 0, 0, 0}, 10625 {0x06, 0, 0, 0, 0}, 10626 {0x07, 0, 0, 0, 0}, 10627 {0x08, 0, 0, 0, 0}, 10628 {0x09, 0, 0, 0, 0}, 10629 {0x0A, 0, 0, 0, 0}, 10630 {0x0B, 0, 0, 0, 0}, 10631 {0x0C, 0, 0, 0, 0}, 10632 {0x0D, 0, 0, 0, 0}, 10633 {0x0E, 0, 0, 0, 0}, 10634 {0x0F, 0, 0, 0, 0}, 10635 {0x10, 0, 0, 0, 0}, 10636 {0x11, 0, 0, 0, 0}, 10637 {0x12, 0, 0, 0, 0}, 10638 {0x13, 0, 0, 0, 0}, 10639 {0x14, 0, 0, 0, 0}, 10640 {0x15, 0, 0, 0, 0}, 10641 {0x16, 0, 0, 0, 0}, 10642 {0x17, 0, 0, 0, 0}, 10643 {0x18, 0, 0, 0, 0}, 10644 {0x19, 0, 0, 0, 0}, 10645 {0x1A, 0, 0, 0, 0}, 10646 {0x1B, 0, 0, 0, 0}, 10647 {0x1C, 0, 0, 0, 0}, 10648 {0x1D, 0, 0, 0, 0}, 10649 {0x1E, 0, 0, 0, 0}, 10650 {0x1F, 0, 0, 0, 0}, 10651 {0x20, 0, 0, 0, 0}, 10652 {0x21, 0x88, 0x88, 0, 0}, 10653 {0x22, 0x88, 0x88, 0, 0}, 10654 {0x23, 0x88, 0x88, 0, 0}, 10655 {0x24, 0x88, 0x88, 0, 0}, 10656 {0x25, 0xc, 0xc, 0, 0}, 10657 {0x26, 0, 0, 0, 0}, 10658 {0x27, 0x3, 0x3, 0, 0}, 10659 {0x28, 0, 0, 0, 0}, 10660 {0x29, 0x3, 0x3, 0, 0}, 10661 {0x2A, 0x37, 0x37, 0, 0}, 10662 {0x2B, 0x3, 0x3, 0, 0}, 10663 {0x2C, 0, 0, 0, 0}, 10664 {0x2D, 0, 0, 0, 0}, 10665 {0x2E, 0x1, 0x1, 0, 0}, 10666 {0x2F, 0x1, 0x1, 0, 0}, 10667 {0x30, 0, 0, 0, 0}, 10668 {0x31, 0, 0, 0, 0}, 10669 {0x32, 0, 0, 0, 0}, 10670 {0x33, 0x11, 0x11, 0, 0}, 10671 {0x34, 0xee, 0xee, 1, 1}, 10672 {0x35, 0, 0, 0, 0}, 10673 {0x36, 0, 0, 0, 0}, 10674 {0x37, 0x3, 0x3, 0, 0}, 10675 {0x38, 0x50, 0x50, 1, 1}, 10676 {0x39, 0, 0, 0, 0}, 10677 {0x3A, 0x50, 0x50, 1, 1}, 10678 {0x3B, 0, 0, 0, 0}, 10679 {0x3C, 0x6e, 0x6e, 0, 0}, 10680 {0x3D, 0xf0, 0xf0, 1, 1}, 10681 {0x3E, 0, 0, 0, 0}, 10682 {0x3F, 0, 0, 0, 0}, 10683 {0x40, 0, 0, 0, 0}, 10684 {0x41, 0x3, 0x3, 0, 0}, 10685 {0x42, 0x3, 0x3, 0, 0}, 10686 {0x43, 0, 0, 0, 0}, 10687 {0x44, 0x1e, 0x1e, 0, 0}, 10688 {0x45, 0, 0, 0, 0}, 10689 {0x46, 0x6e, 0x6e, 0, 0}, 10690 {0x47, 0xf0, 0xf0, 1, 1}, 10691 {0x48, 0, 0, 0, 0}, 10692 {0x49, 0x2, 0x2, 0, 0}, 10693 {0x4A, 0xff, 0xff, 1, 1}, 10694 {0x4B, 0xc, 0xc, 0, 0}, 10695 {0x4C, 0, 0, 0, 0}, 10696 {0x4D, 0x38, 0x38, 0, 0}, 10697 {0x4E, 0x70, 0x70, 1, 1}, 10698 {0x4F, 0x2, 0x2, 0, 0}, 10699 {0x50, 0x88, 0x88, 0, 0}, 10700 {0x51, 0xc, 0xc, 0, 0}, 10701 {0x52, 0, 0, 0, 0}, 10702 {0x53, 0x8, 0x8, 0, 0}, 10703 {0x54, 0x70, 0x70, 1, 1}, 10704 {0x55, 0x2, 0x2, 0, 0}, 10705 {0x56, 0xff, 0xff, 1, 1}, 10706 {0x57, 0, 0, 0, 0}, 10707 {0x58, 0x83, 0x83, 0, 0}, 10708 {0x59, 0x77, 0x77, 1, 1}, 10709 {0x5A, 0, 0, 0, 0}, 10710 {0x5B, 0x2, 0x2, 0, 0}, 10711 {0x5C, 0x88, 0x88, 0, 0}, 10712 {0x5D, 0, 0, 0, 0}, 10713 {0x5E, 0x8, 0x8, 0, 0}, 10714 {0x5F, 0x77, 0x77, 1, 1}, 10715 {0x60, 0x1, 0x1, 0, 0}, 10716 {0x61, 0, 0, 0, 0}, 10717 {0x62, 0x7, 0x7, 0, 0}, 10718 {0x63, 0, 0, 0, 0}, 10719 {0x64, 0x7, 0x7, 0, 0}, 10720 {0x65, 0, 0, 0, 0}, 10721 {0x66, 0, 0, 0, 0}, 10722 {0x67, 0, 0, 1, 1}, 10723 {0x68, 0, 0, 0, 0}, 10724 {0x69, 0xa, 0xa, 0, 0}, 10725 {0x6A, 0, 0, 0, 0}, 10726 {0x6B, 0, 0, 0, 0}, 10727 {0x6C, 0, 0, 0, 0}, 10728 {0x6D, 0, 0, 0, 0}, 10729 {0x6E, 0, 0, 0, 0}, 10730 {0x6F, 0, 0, 0, 0}, 10731 {0x70, 0, 0, 0, 0}, 10732 {0x71, 0x2, 0x2, 0, 0}, 10733 {0x72, 0, 0, 0, 0}, 10734 {0x73, 0, 0, 0, 0}, 10735 {0x74, 0xe, 0xe, 0, 0}, 10736 {0x75, 0xe, 0xe, 0, 0}, 10737 {0x76, 0xe, 0xe, 0, 0}, 10738 {0x77, 0x13, 0x13, 0, 0}, 10739 {0x78, 0x13, 0x13, 0, 0}, 10740 {0x79, 0x1b, 0x1b, 0, 0}, 10741 {0x7A, 0x1b, 0x1b, 0, 0}, 10742 {0x7B, 0x55, 0x55, 0, 0}, 10743 {0x7C, 0x5b, 0x5b, 0, 0}, 10744 {0x7D, 0x30, 0x30, 1, 1}, 10745 {0x7E, 0, 0, 0, 0}, 10746 {0x7F, 0, 0, 0, 0}, 10747 {0x80, 0, 0, 0, 0}, 10748 {0x81, 0, 0, 0, 0}, 10749 {0x82, 0, 0, 0, 0}, 10750 {0x83, 0, 0, 0, 0}, 10751 {0x84, 0, 0, 0, 0}, 10752 {0x85, 0, 0, 0, 0}, 10753 {0x86, 0, 0, 0, 0}, 10754 {0x87, 0, 0, 0, 0}, 10755 {0x88, 0, 0, 0, 0}, 10756 {0x89, 0, 0, 0, 0}, 10757 {0x8A, 0, 0, 0, 0}, 10758 {0x8B, 0, 0, 0, 0}, 10759 {0x8C, 0, 0, 0, 0}, 10760 {0x8D, 0, 0, 0, 0}, 10761 {0x8E, 0, 0, 0, 0}, 10762 {0x8F, 0, 0, 0, 0}, 10763 {0x90, 0, 0, 0, 0}, 10764 {0x91, 0, 0, 0, 0}, 10765 {0x92, 0, 0, 0, 0}, 10766 {0x93, 0x70, 0x70, 0, 0}, 10767 {0x94, 0x70, 0x70, 0, 0}, 10768 {0x95, 0x70, 0x70, 0, 0}, 10769 {0x96, 0x70, 0x70, 0, 0}, 10770 {0x97, 0x70, 0x70, 0, 0}, 10771 {0x98, 0x70, 0x70, 0, 0}, 10772 {0x99, 0x70, 0x70, 0, 0}, 10773 {0x9A, 0x70, 0x70, 0, 0}, 10774 {0xFFFF, 0, 0, 0, 0}, 10775 }; 10776 10777 static struct radio_regs regs_RX_2056_rev8[] = { 10778 {0x02, 0, 0, 0, 0}, 10779 {0x03, 0, 0, 0, 0}, 10780 {0x04, 0, 0, 0, 0}, 10781 {0x05, 0, 0, 0, 0}, 10782 {0x06, 0, 0, 0, 0}, 10783 {0x07, 0, 0, 0, 0}, 10784 {0x08, 0, 0, 0, 0}, 10785 {0x09, 0, 0, 0, 0}, 10786 {0x0A, 0, 0, 0, 0}, 10787 {0x0B, 0, 0, 0, 0}, 10788 {0x0C, 0, 0, 0, 0}, 10789 {0x0D, 0, 0, 0, 0}, 10790 {0x0E, 0, 0, 0, 0}, 10791 {0x0F, 0, 0, 0, 0}, 10792 {0x10, 0, 0, 0, 0}, 10793 {0x11, 0, 0, 0, 0}, 10794 {0x12, 0, 0, 0, 0}, 10795 {0x13, 0, 0, 0, 0}, 10796 {0x14, 0, 0, 0, 0}, 10797 {0x15, 0, 0, 0, 0}, 10798 {0x16, 0, 0, 0, 0}, 10799 {0x17, 0, 0, 0, 0}, 10800 {0x18, 0, 0, 0, 0}, 10801 {0x19, 0, 0, 0, 0}, 10802 {0x1A, 0, 0, 0, 0}, 10803 {0x1B, 0, 0, 0, 0}, 10804 {0x1C, 0, 0, 0, 0}, 10805 {0x1D, 0, 0, 0, 0}, 10806 {0x1E, 0, 0, 0, 0}, 10807 {0x1F, 0, 0, 0, 0}, 10808 {0x20, 0x3, 0x3, 0, 0}, 10809 {0x21, 0, 0, 0, 0}, 10810 {0x22, 0, 0, 0, 0}, 10811 {0x23, 0x90, 0x90, 0, 0}, 10812 {0x24, 0x55, 0x55, 0, 0}, 10813 {0x25, 0x15, 0x15, 0, 0}, 10814 {0x26, 0x5, 0x5, 0, 0}, 10815 {0x27, 0x15, 0x15, 0, 0}, 10816 {0x28, 0x5, 0x5, 0, 0}, 10817 {0x29, 0x20, 0x20, 0, 0}, 10818 {0x2A, 0x11, 0x11, 0, 0}, 10819 {0x2B, 0x90, 0x90, 0, 0}, 10820 {0x2C, 0, 0, 0, 0}, 10821 {0x2D, 0x88, 0x88, 0, 0}, 10822 {0x2E, 0x32, 0x32, 0, 0}, 10823 {0x2F, 0x77, 0x77, 0, 0}, 10824 {0x30, 0x17, 0x17, 1, 1}, 10825 {0x31, 0xff, 0xff, 1, 1}, 10826 {0x32, 0x20, 0x20, 0, 0}, 10827 {0x33, 0, 0, 0, 0}, 10828 {0x34, 0x88, 0x88, 0, 0}, 10829 {0x35, 0x32, 0x32, 0, 0}, 10830 {0x36, 0x77, 0x77, 0, 0}, 10831 {0x37, 0x17, 0x17, 1, 1}, 10832 {0x38, 0xf0, 0xf0, 1, 1}, 10833 {0x39, 0x20, 0x20, 0, 0}, 10834 {0x3A, 0x8, 0x8, 0, 0}, 10835 {0x3B, 0x55, 0x55, 1, 1}, 10836 {0x3C, 0, 0, 0, 0}, 10837 {0x3D, 0x88, 0x88, 1, 1}, 10838 {0x3E, 0, 0, 0, 0}, 10839 {0x3F, 0x44, 0x44, 0, 0}, 10840 {0x40, 0x7, 0x7, 1, 1}, 10841 {0x41, 0x6, 0x6, 0, 0}, 10842 {0x42, 0x4, 0x4, 0, 0}, 10843 {0x43, 0, 0, 0, 0}, 10844 {0x44, 0x8, 0x8, 0, 0}, 10845 {0x45, 0x55, 0x55, 1, 1}, 10846 {0x46, 0, 0, 0, 0}, 10847 {0x47, 0x11, 0x11, 0, 0}, 10848 {0x48, 0, 0, 0, 0}, 10849 {0x49, 0x44, 0x44, 0, 0}, 10850 {0x4A, 0x7, 0x7, 0, 0}, 10851 {0x4B, 0x6, 0x6, 0, 0}, 10852 {0x4C, 0x4, 0x4, 0, 0}, 10853 {0x4D, 0, 0, 0, 0}, 10854 {0x4E, 0, 0, 0, 0}, 10855 {0x4F, 0x26, 0x26, 1, 1}, 10856 {0x50, 0x26, 0x26, 1, 1}, 10857 {0x51, 0xf, 0xf, 1, 1}, 10858 {0x52, 0xf, 0xf, 1, 1}, 10859 {0x53, 0x44, 0x44, 0, 0}, 10860 {0x54, 0, 0, 0, 0}, 10861 {0x55, 0, 0, 0, 0}, 10862 {0x56, 0x8, 0x8, 0, 0}, 10863 {0x57, 0x8, 0x8, 0, 0}, 10864 {0x58, 0x7, 0x7, 0, 0}, 10865 {0x59, 0x22, 0x22, 0, 0}, 10866 {0x5A, 0x22, 0x22, 0, 0}, 10867 {0x5B, 0x2, 0x2, 0, 0}, 10868 {0x5C, 0x4, 0x4, 1, 1}, 10869 {0x5D, 0x7, 0x7, 0, 0}, 10870 {0x5E, 0x55, 0x55, 0, 0}, 10871 {0x5F, 0x23, 0x23, 0, 0}, 10872 {0x60, 0x41, 0x41, 0, 0}, 10873 {0x61, 0x1, 0x1, 0, 0}, 10874 {0x62, 0xa, 0xa, 0, 0}, 10875 {0x63, 0, 0, 0, 0}, 10876 {0x64, 0, 0, 0, 0}, 10877 {0x65, 0, 0, 0, 0}, 10878 {0x66, 0, 0, 0, 0}, 10879 {0x67, 0, 0, 0, 0}, 10880 {0x68, 0, 0, 0, 0}, 10881 {0x69, 0, 0, 0, 0}, 10882 {0x6A, 0, 0, 0, 0}, 10883 {0x6B, 0xc, 0xc, 0, 0}, 10884 {0x6C, 0, 0, 0, 0}, 10885 {0x6D, 0, 0, 0, 0}, 10886 {0x6E, 0, 0, 0, 0}, 10887 {0x6F, 0, 0, 0, 0}, 10888 {0x70, 0, 0, 0, 0}, 10889 {0x71, 0, 0, 0, 0}, 10890 {0x72, 0x22, 0x22, 0, 0}, 10891 {0x73, 0x22, 0x22, 0, 0}, 10892 {0x74, 0, 0, 1, 1}, 10893 {0x75, 0xa, 0xa, 0, 0}, 10894 {0x76, 0x1, 0x1, 0, 0}, 10895 {0x77, 0x22, 0x22, 0, 0}, 10896 {0x78, 0x30, 0x30, 0, 0}, 10897 {0x79, 0, 0, 0, 0}, 10898 {0x7A, 0, 0, 0, 0}, 10899 {0x7B, 0, 0, 0, 0}, 10900 {0x7C, 0, 0, 0, 0}, 10901 {0x7D, 0x5, 0x5, 1, 1}, 10902 {0x7E, 0, 0, 0, 0}, 10903 {0x7F, 0, 0, 0, 0}, 10904 {0x80, 0, 0, 0, 0}, 10905 {0x81, 0, 0, 0, 0}, 10906 {0x82, 0, 0, 0, 0}, 10907 {0x83, 0, 0, 0, 0}, 10908 {0x84, 0, 0, 0, 0}, 10909 {0x85, 0, 0, 0, 0}, 10910 {0x86, 0, 0, 0, 0}, 10911 {0x87, 0, 0, 0, 0}, 10912 {0x88, 0, 0, 0, 0}, 10913 {0x89, 0, 0, 0, 0}, 10914 {0x8A, 0, 0, 0, 0}, 10915 {0x8B, 0, 0, 0, 0}, 10916 {0x8C, 0, 0, 0, 0}, 10917 {0x8D, 0, 0, 0, 0}, 10918 {0x8E, 0, 0, 0, 0}, 10919 {0x8F, 0, 0, 0, 0}, 10920 {0x90, 0, 0, 0, 0}, 10921 {0x91, 0, 0, 0, 0}, 10922 {0x92, 0, 0, 0, 0}, 10923 {0x93, 0, 0, 0, 0}, 10924 {0x94, 0, 0, 0, 0}, 10925 {0xFFFF, 0, 0, 0, 0}, 10926 }; 10927 10928 static const struct radio_regs regs_SYN_2056_rev11[] = { 10929 {0x02, 0, 0, 0, 0}, 10930 {0x03, 0, 0, 0, 0}, 10931 {0x04, 0, 0, 0, 0}, 10932 {0x05, 0, 0, 0, 0}, 10933 {0x06, 0, 0, 0, 0}, 10934 {0x07, 0, 0, 0, 0}, 10935 {0x08, 0, 0, 0, 0}, 10936 {0x09, 0x1, 0x1, 0, 0}, 10937 {0x0A, 0, 0, 0, 0}, 10938 {0x0B, 0, 0, 0, 0}, 10939 {0x0C, 0, 0, 0, 0}, 10940 {0x0D, 0, 0, 0, 0}, 10941 {0x0E, 0, 0, 0, 0}, 10942 {0x0F, 0, 0, 0, 0}, 10943 {0x10, 0, 0, 0, 0}, 10944 {0x11, 0, 0, 0, 0}, 10945 {0x12, 0, 0, 0, 0}, 10946 {0x13, 0, 0, 0, 0}, 10947 {0x14, 0, 0, 0, 0}, 10948 {0x15, 0, 0, 0, 0}, 10949 {0x16, 0, 0, 0, 0}, 10950 {0x17, 0, 0, 0, 0}, 10951 {0x18, 0, 0, 0, 0}, 10952 {0x19, 0, 0, 0, 0}, 10953 {0x1A, 0, 0, 0, 0}, 10954 {0x1B, 0, 0, 0, 0}, 10955 {0x1C, 0, 0, 0, 0}, 10956 {0x1D, 0, 0, 0, 0}, 10957 {0x1E, 0, 0, 0, 0}, 10958 {0x1F, 0, 0, 0, 0}, 10959 {0x20, 0, 0, 0, 0}, 10960 {0x21, 0, 0, 0, 0}, 10961 {0x22, 0x60, 0x60, 0, 0}, 10962 {0x23, 0x6, 0x6, 0, 0}, 10963 {0x24, 0xc, 0xc, 0, 0}, 10964 {0x25, 0, 0, 0, 0}, 10965 {0x26, 0, 0, 0, 0}, 10966 {0x27, 0, 0, 0, 0}, 10967 {0x28, 0x1, 0x1, 0, 0}, 10968 {0x29, 0, 0, 0, 0}, 10969 {0x2A, 0, 0, 0, 0}, 10970 {0x2B, 0, 0, 0, 0}, 10971 {0x2C, 0, 0, 0, 0}, 10972 {0x2D, 0, 0, 0, 0}, 10973 {0x2E, 0, 0, 0, 0}, 10974 {0x2F, 0x1f, 0x1f, 0, 0}, 10975 {0x30, 0x15, 0x15, 0, 0}, 10976 {0x31, 0xf, 0xf, 0, 0}, 10977 {0x32, 0, 0, 0, 0}, 10978 {0x33, 0, 0, 0, 0}, 10979 {0x34, 0, 0, 0, 0}, 10980 {0x35, 0, 0, 0, 0}, 10981 {0x36, 0, 0, 0, 0}, 10982 {0x37, 0, 0, 0, 0}, 10983 {0x38, 0, 0, 0, 0}, 10984 {0x39, 0, 0, 0, 0}, 10985 {0x3A, 0, 0, 0, 0}, 10986 {0x3B, 0, 0, 0, 0}, 10987 {0x3C, 0x13, 0x13, 0, 0}, 10988 {0x3D, 0xf, 0xf, 0, 0}, 10989 {0x3E, 0x18, 0x18, 0, 0}, 10990 {0x3F, 0, 0, 0, 0}, 10991 {0x40, 0, 0, 0, 0}, 10992 {0x41, 0x20, 0x20, 0, 0}, 10993 {0x42, 0x20, 0x20, 0, 0}, 10994 {0x43, 0, 0, 0, 0}, 10995 {0x44, 0x77, 0x77, 0, 0}, 10996 {0x45, 0x7, 0x7, 0, 0}, 10997 {0x46, 0x1, 0x1, 0, 0}, 10998 {0x47, 0x6, 0x6, 1, 1}, 10999 {0x48, 0xf, 0xf, 0, 0}, 11000 {0x49, 0x3f, 0x3f, 1, 1}, 11001 {0x4A, 0x32, 0x32, 0, 0}, 11002 {0x4B, 0x6, 0x6, 1, 1}, 11003 {0x4C, 0x6, 0x6, 1, 1}, 11004 {0x4D, 0x4, 0x4, 0, 0}, 11005 {0x4E, 0x2b, 0x2b, 1, 1}, 11006 {0x4F, 0x1, 0x1, 0, 0}, 11007 {0x50, 0x1c, 0x1c, 0, 0}, 11008 {0x51, 0x2, 0x2, 0, 0}, 11009 {0x52, 0x2, 0x2, 0, 0}, 11010 {0x53, 0xf7, 0xf7, 1, 1}, 11011 {0x54, 0xb4, 0xb4, 0, 0}, 11012 {0x55, 0xd2, 0xd2, 0, 0}, 11013 {0x56, 0, 0, 0, 0}, 11014 {0x57, 0, 0, 0, 0}, 11015 {0x58, 0x4, 0x4, 0, 0}, 11016 {0x59, 0x96, 0x96, 0, 0}, 11017 {0x5A, 0x3e, 0x3e, 0, 0}, 11018 {0x5B, 0x3e, 0x3e, 0, 0}, 11019 {0x5C, 0x13, 0x13, 0, 0}, 11020 {0x5D, 0x2, 0x2, 0, 0}, 11021 {0x5E, 0, 0, 0, 0}, 11022 {0x5F, 0x7, 0x7, 0, 0}, 11023 {0x60, 0x7, 0x7, 1, 1}, 11024 {0x61, 0x8, 0x8, 0, 0}, 11025 {0x62, 0x3, 0x3, 0, 0}, 11026 {0x63, 0, 0, 0, 0}, 11027 {0x64, 0, 0, 0, 0}, 11028 {0x65, 0, 0, 0, 0}, 11029 {0x66, 0, 0, 0, 0}, 11030 {0x67, 0, 0, 0, 0}, 11031 {0x68, 0x40, 0x40, 0, 0}, 11032 {0x69, 0, 0, 0, 0}, 11033 {0x6A, 0, 0, 0, 0}, 11034 {0x6B, 0, 0, 0, 0}, 11035 {0x6C, 0, 0, 0, 0}, 11036 {0x6D, 0x1, 0x1, 0, 0}, 11037 {0x6E, 0, 0, 0, 0}, 11038 {0x6F, 0, 0, 0, 0}, 11039 {0x70, 0x60, 0x60, 0, 0}, 11040 {0x71, 0x66, 0x66, 0, 0}, 11041 {0x72, 0xc, 0xc, 0, 0}, 11042 {0x73, 0x66, 0x66, 0, 0}, 11043 {0x74, 0x8f, 0x8f, 1, 1}, 11044 {0x75, 0, 0, 0, 0}, 11045 {0x76, 0xcc, 0xcc, 0, 0}, 11046 {0x77, 0x1, 0x1, 0, 0}, 11047 {0x78, 0x66, 0x66, 0, 0}, 11048 {0x79, 0x66, 0x66, 0, 0}, 11049 {0x7A, 0, 0, 0, 0}, 11050 {0x7B, 0, 0, 0, 0}, 11051 {0x7C, 0, 0, 0, 0}, 11052 {0x7D, 0, 0, 0, 0}, 11053 {0x7E, 0, 0, 0, 0}, 11054 {0x7F, 0, 0, 0, 0}, 11055 {0x80, 0, 0, 0, 0}, 11056 {0x81, 0, 0, 0, 0}, 11057 {0x82, 0, 0, 0, 0}, 11058 {0x83, 0, 0, 0, 0}, 11059 {0x84, 0, 0, 0, 0}, 11060 {0x85, 0xff, 0xff, 0, 0}, 11061 {0x86, 0, 0, 0, 0}, 11062 {0x87, 0, 0, 0, 0}, 11063 {0x88, 0, 0, 0, 0}, 11064 {0x89, 0, 0, 0, 0}, 11065 {0x8A, 0, 0, 0, 0}, 11066 {0x8B, 0, 0, 0, 0}, 11067 {0x8C, 0, 0, 0, 0}, 11068 {0x8D, 0, 0, 0, 0}, 11069 {0x8E, 0, 0, 0, 0}, 11070 {0x8F, 0, 0, 0, 0}, 11071 {0x90, 0, 0, 0, 0}, 11072 {0x91, 0, 0, 0, 0}, 11073 {0x92, 0, 0, 0, 0}, 11074 {0x93, 0, 0, 0, 0}, 11075 {0x94, 0, 0, 0, 0}, 11076 {0x95, 0, 0, 0, 0}, 11077 {0x96, 0, 0, 0, 0}, 11078 {0x97, 0, 0, 0, 0}, 11079 {0x98, 0, 0, 0, 0}, 11080 {0x99, 0, 0, 0, 0}, 11081 {0x9A, 0, 0, 0, 0}, 11082 {0x9B, 0, 0, 0, 0}, 11083 {0x9C, 0, 0, 0, 0}, 11084 {0x9D, 0, 0, 0, 0}, 11085 {0x9E, 0, 0, 0, 0}, 11086 {0x9F, 0x6, 0x6, 0, 0}, 11087 {0xA0, 0x66, 0x66, 0, 0}, 11088 {0xA1, 0x66, 0x66, 0, 0}, 11089 {0xA2, 0x66, 0x66, 0, 0}, 11090 {0xA3, 0x66, 0x66, 0, 0}, 11091 {0xA4, 0x66, 0x66, 0, 0}, 11092 {0xA5, 0x66, 0x66, 0, 0}, 11093 {0xA6, 0x66, 0x66, 0, 0}, 11094 {0xA7, 0x66, 0x66, 0, 0}, 11095 {0xA8, 0x66, 0x66, 0, 0}, 11096 {0xA9, 0x66, 0x66, 0, 0}, 11097 {0xAA, 0x66, 0x66, 0, 0}, 11098 {0xAB, 0x66, 0x66, 0, 0}, 11099 {0xAC, 0x66, 0x66, 0, 0}, 11100 {0xAD, 0x66, 0x66, 0, 0}, 11101 {0xAE, 0x66, 0x66, 0, 0}, 11102 {0xAF, 0x66, 0x66, 0, 0}, 11103 {0xB0, 0x66, 0x66, 0, 0}, 11104 {0xB1, 0x66, 0x66, 0, 0}, 11105 {0xB2, 0x66, 0x66, 0, 0}, 11106 {0xB3, 0xa, 0xa, 0, 0}, 11107 {0xB4, 0, 0, 0, 0}, 11108 {0xB5, 0, 0, 0, 0}, 11109 {0xB6, 0, 0, 0, 0}, 11110 {0xFFFF, 0, 0, 0, 0}, 11111 }; 11112 11113 static const struct radio_regs regs_TX_2056_rev11[] = { 11114 {0x02, 0, 0, 0, 0}, 11115 {0x03, 0, 0, 0, 0}, 11116 {0x04, 0, 0, 0, 0}, 11117 {0x05, 0, 0, 0, 0}, 11118 {0x06, 0, 0, 0, 0}, 11119 {0x07, 0, 0, 0, 0}, 11120 {0x08, 0, 0, 0, 0}, 11121 {0x09, 0, 0, 0, 0}, 11122 {0x0A, 0, 0, 0, 0}, 11123 {0x0B, 0, 0, 0, 0}, 11124 {0x0C, 0, 0, 0, 0}, 11125 {0x0D, 0, 0, 0, 0}, 11126 {0x0E, 0, 0, 0, 0}, 11127 {0x0F, 0, 0, 0, 0}, 11128 {0x10, 0, 0, 0, 0}, 11129 {0x11, 0, 0, 0, 0}, 11130 {0x12, 0, 0, 0, 0}, 11131 {0x13, 0, 0, 0, 0}, 11132 {0x14, 0, 0, 0, 0}, 11133 {0x15, 0, 0, 0, 0}, 11134 {0x16, 0, 0, 0, 0}, 11135 {0x17, 0, 0, 0, 0}, 11136 {0x18, 0, 0, 0, 0}, 11137 {0x19, 0, 0, 0, 0}, 11138 {0x1A, 0, 0, 0, 0}, 11139 {0x1B, 0, 0, 0, 0}, 11140 {0x1C, 0, 0, 0, 0}, 11141 {0x1D, 0, 0, 0, 0}, 11142 {0x1E, 0, 0, 0, 0}, 11143 {0x1F, 0, 0, 0, 0}, 11144 {0x20, 0, 0, 0, 0}, 11145 {0x21, 0x88, 0x88, 0, 0}, 11146 {0x22, 0x88, 0x88, 0, 0}, 11147 {0x23, 0x88, 0x88, 0, 0}, 11148 {0x24, 0x88, 0x88, 0, 0}, 11149 {0x25, 0xc, 0xc, 0, 0}, 11150 {0x26, 0, 0, 0, 0}, 11151 {0x27, 0x3, 0x3, 0, 0}, 11152 {0x28, 0, 0, 0, 0}, 11153 {0x29, 0x3, 0x3, 0, 0}, 11154 {0x2A, 0x37, 0x37, 0, 0}, 11155 {0x2B, 0x3, 0x3, 0, 0}, 11156 {0x2C, 0, 0, 0, 0}, 11157 {0x2D, 0, 0, 0, 0}, 11158 {0x2E, 0x1, 0x1, 0, 0}, 11159 {0x2F, 0x1, 0x1, 0, 0}, 11160 {0x30, 0, 0, 0, 0}, 11161 {0x31, 0, 0, 0, 0}, 11162 {0x32, 0, 0, 0, 0}, 11163 {0x33, 0x11, 0x11, 0, 0}, 11164 {0x34, 0xee, 0xee, 1, 1}, 11165 {0x35, 0, 0, 0, 0}, 11166 {0x36, 0, 0, 0, 0}, 11167 {0x37, 0x3, 0x3, 0, 0}, 11168 {0x38, 0x50, 0x50, 1, 1}, 11169 {0x39, 0, 0, 0, 0}, 11170 {0x3A, 0x50, 0x50, 1, 1}, 11171 {0x3B, 0, 0, 0, 0}, 11172 {0x3C, 0x6e, 0x6e, 0, 0}, 11173 {0x3D, 0xf0, 0xf0, 1, 1}, 11174 {0x3E, 0, 0, 0, 0}, 11175 {0x3F, 0, 0, 0, 0}, 11176 {0x40, 0, 0, 0, 0}, 11177 {0x41, 0x3, 0x3, 0, 0}, 11178 {0x42, 0x3, 0x3, 0, 0}, 11179 {0x43, 0, 0, 0, 0}, 11180 {0x44, 0x1e, 0x1e, 0, 0}, 11181 {0x45, 0, 0, 0, 0}, 11182 {0x46, 0x6e, 0x6e, 0, 0}, 11183 {0x47, 0xf0, 0xf0, 1, 1}, 11184 {0x48, 0, 0, 0, 0}, 11185 {0x49, 0x2, 0x2, 0, 0}, 11186 {0x4A, 0xff, 0xff, 1, 1}, 11187 {0x4B, 0xc, 0xc, 0, 0}, 11188 {0x4C, 0, 0, 0, 0}, 11189 {0x4D, 0x38, 0x38, 0, 0}, 11190 {0x4E, 0x70, 0x70, 1, 1}, 11191 {0x4F, 0x2, 0x2, 0, 0}, 11192 {0x50, 0x88, 0x88, 0, 0}, 11193 {0x51, 0xc, 0xc, 0, 0}, 11194 {0x52, 0, 0, 0, 0}, 11195 {0x53, 0x8, 0x8, 0, 0}, 11196 {0x54, 0x70, 0x70, 1, 1}, 11197 {0x55, 0x2, 0x2, 0, 0}, 11198 {0x56, 0xff, 0xff, 1, 1}, 11199 {0x57, 0, 0, 0, 0}, 11200 {0x58, 0x83, 0x83, 0, 0}, 11201 {0x59, 0x77, 0x77, 1, 1}, 11202 {0x5A, 0, 0, 0, 0}, 11203 {0x5B, 0x2, 0x2, 0, 0}, 11204 {0x5C, 0x88, 0x88, 0, 0}, 11205 {0x5D, 0, 0, 0, 0}, 11206 {0x5E, 0x8, 0x8, 0, 0}, 11207 {0x5F, 0x77, 0x77, 1, 1}, 11208 {0x60, 0x1, 0x1, 0, 0}, 11209 {0x61, 0, 0, 0, 0}, 11210 {0x62, 0x7, 0x7, 0, 0}, 11211 {0x63, 0, 0, 0, 0}, 11212 {0x64, 0x7, 0x7, 0, 0}, 11213 {0x65, 0, 0, 0, 0}, 11214 {0x66, 0, 0, 0, 0}, 11215 {0x67, 0, 0, 1, 1}, 11216 {0x68, 0, 0, 0, 0}, 11217 {0x69, 0xa, 0xa, 0, 0}, 11218 {0x6A, 0, 0, 0, 0}, 11219 {0x6B, 0, 0, 0, 0}, 11220 {0x6C, 0, 0, 0, 0}, 11221 {0x6D, 0, 0, 0, 0}, 11222 {0x6E, 0, 0, 0, 0}, 11223 {0x6F, 0, 0, 0, 0}, 11224 {0x70, 0, 0, 0, 0}, 11225 {0x71, 0x2, 0x2, 0, 0}, 11226 {0x72, 0, 0, 0, 0}, 11227 {0x73, 0, 0, 0, 0}, 11228 {0x74, 0xe, 0xe, 0, 0}, 11229 {0x75, 0xe, 0xe, 0, 0}, 11230 {0x76, 0xe, 0xe, 0, 0}, 11231 {0x77, 0x13, 0x13, 0, 0}, 11232 {0x78, 0x13, 0x13, 0, 0}, 11233 {0x79, 0x1b, 0x1b, 0, 0}, 11234 {0x7A, 0x1b, 0x1b, 0, 0}, 11235 {0x7B, 0x55, 0x55, 0, 0}, 11236 {0x7C, 0x5b, 0x5b, 0, 0}, 11237 {0x7D, 0x30, 0x30, 1, 1}, 11238 {0x7E, 0, 0, 0, 0}, 11239 {0x7F, 0, 0, 0, 0}, 11240 {0x80, 0, 0, 0, 0}, 11241 {0x81, 0, 0, 0, 0}, 11242 {0x82, 0, 0, 0, 0}, 11243 {0x83, 0, 0, 0, 0}, 11244 {0x84, 0, 0, 0, 0}, 11245 {0x85, 0, 0, 0, 0}, 11246 {0x86, 0, 0, 0, 0}, 11247 {0x87, 0, 0, 0, 0}, 11248 {0x88, 0, 0, 0, 0}, 11249 {0x89, 0, 0, 0, 0}, 11250 {0x8A, 0, 0, 0, 0}, 11251 {0x8B, 0, 0, 0, 0}, 11252 {0x8C, 0, 0, 0, 0}, 11253 {0x8D, 0, 0, 0, 0}, 11254 {0x8E, 0, 0, 0, 0}, 11255 {0x8F, 0, 0, 0, 0}, 11256 {0x90, 0, 0, 0, 0}, 11257 {0x91, 0, 0, 0, 0}, 11258 {0x92, 0, 0, 0, 0}, 11259 {0x93, 0x70, 0x70, 0, 0}, 11260 {0x94, 0x70, 0x70, 0, 0}, 11261 {0x95, 0x70, 0x70, 0, 0}, 11262 {0x96, 0x70, 0x70, 0, 0}, 11263 {0x97, 0x70, 0x70, 0, 0}, 11264 {0x98, 0x70, 0x70, 0, 0}, 11265 {0x99, 0x70, 0x70, 0, 0}, 11266 {0x9A, 0x70, 0x70, 0, 0}, 11267 {0xFFFF, 0, 0, 0, 0}, 11268 }; 11269 11270 static const struct radio_regs regs_RX_2056_rev11[] = { 11271 {0x02, 0, 0, 0, 0}, 11272 {0x03, 0, 0, 0, 0}, 11273 {0x04, 0, 0, 0, 0}, 11274 {0x05, 0, 0, 0, 0}, 11275 {0x06, 0, 0, 0, 0}, 11276 {0x07, 0, 0, 0, 0}, 11277 {0x08, 0, 0, 0, 0}, 11278 {0x09, 0, 0, 0, 0}, 11279 {0x0A, 0, 0, 0, 0}, 11280 {0x0B, 0, 0, 0, 0}, 11281 {0x0C, 0, 0, 0, 0}, 11282 {0x0D, 0, 0, 0, 0}, 11283 {0x0E, 0, 0, 0, 0}, 11284 {0x0F, 0, 0, 0, 0}, 11285 {0x10, 0, 0, 0, 0}, 11286 {0x11, 0, 0, 0, 0}, 11287 {0x12, 0, 0, 0, 0}, 11288 {0x13, 0, 0, 0, 0}, 11289 {0x14, 0, 0, 0, 0}, 11290 {0x15, 0, 0, 0, 0}, 11291 {0x16, 0, 0, 0, 0}, 11292 {0x17, 0, 0, 0, 0}, 11293 {0x18, 0, 0, 0, 0}, 11294 {0x19, 0, 0, 0, 0}, 11295 {0x1A, 0, 0, 0, 0}, 11296 {0x1B, 0, 0, 0, 0}, 11297 {0x1C, 0, 0, 0, 0}, 11298 {0x1D, 0, 0, 0, 0}, 11299 {0x1E, 0, 0, 0, 0}, 11300 {0x1F, 0, 0, 0, 0}, 11301 {0x20, 0x3, 0x3, 0, 0}, 11302 {0x21, 0, 0, 0, 0}, 11303 {0x22, 0, 0, 0, 0}, 11304 {0x23, 0x90, 0x90, 0, 0}, 11305 {0x24, 0x55, 0x55, 0, 0}, 11306 {0x25, 0x15, 0x15, 0, 0}, 11307 {0x26, 0x5, 0x5, 0, 0}, 11308 {0x27, 0x15, 0x15, 0, 0}, 11309 {0x28, 0x5, 0x5, 0, 0}, 11310 {0x29, 0x20, 0x20, 0, 0}, 11311 {0x2A, 0x11, 0x11, 0, 0}, 11312 {0x2B, 0x90, 0x90, 0, 0}, 11313 {0x2C, 0, 0, 0, 0}, 11314 {0x2D, 0x88, 0x88, 0, 0}, 11315 {0x2E, 0x32, 0x32, 0, 0}, 11316 {0x2F, 0x77, 0x77, 0, 0}, 11317 {0x30, 0x17, 0x17, 1, 1}, 11318 {0x31, 0xff, 0xff, 1, 1}, 11319 {0x32, 0x20, 0x20, 0, 0}, 11320 {0x33, 0, 0, 0, 0}, 11321 {0x34, 0x88, 0x88, 0, 0}, 11322 {0x35, 0x32, 0x32, 0, 0}, 11323 {0x36, 0x77, 0x77, 0, 0}, 11324 {0x37, 0x17, 0x17, 1, 1}, 11325 {0x38, 0xf0, 0xf0, 1, 1}, 11326 {0x39, 0x20, 0x20, 0, 0}, 11327 {0x3A, 0x8, 0x8, 0, 0}, 11328 {0x3B, 0x55, 0x55, 1, 1}, 11329 {0x3C, 0, 0, 0, 0}, 11330 {0x3D, 0x88, 0x88, 1, 1}, 11331 {0x3E, 0, 0, 0, 0}, 11332 {0x3F, 0x44, 0x44, 0, 0}, 11333 {0x40, 0x7, 0x7, 1, 1}, 11334 {0x41, 0x6, 0x6, 0, 0}, 11335 {0x42, 0x4, 0x4, 0, 0}, 11336 {0x43, 0, 0, 0, 0}, 11337 {0x44, 0x8, 0x8, 0, 0}, 11338 {0x45, 0x55, 0x55, 1, 1}, 11339 {0x46, 0, 0, 0, 0}, 11340 {0x47, 0x11, 0x11, 0, 0}, 11341 {0x48, 0, 0, 0, 0}, 11342 {0x49, 0x44, 0x44, 0, 0}, 11343 {0x4A, 0x7, 0x7, 0, 0}, 11344 {0x4B, 0x6, 0x6, 0, 0}, 11345 {0x4C, 0x4, 0x4, 0, 0}, 11346 {0x4D, 0, 0, 0, 0}, 11347 {0x4E, 0, 0, 0, 0}, 11348 {0x4F, 0x26, 0x26, 1, 1}, 11349 {0x50, 0x26, 0x26, 1, 1}, 11350 {0x51, 0xf, 0xf, 1, 1}, 11351 {0x52, 0xf, 0xf, 1, 1}, 11352 {0x53, 0x44, 0x44, 0, 0}, 11353 {0x54, 0, 0, 0, 0}, 11354 {0x55, 0, 0, 0, 0}, 11355 {0x56, 0x8, 0x8, 0, 0}, 11356 {0x57, 0x8, 0x8, 0, 0}, 11357 {0x58, 0x7, 0x7, 0, 0}, 11358 {0x59, 0x22, 0x22, 0, 0}, 11359 {0x5A, 0x22, 0x22, 0, 0}, 11360 {0x5B, 0x2, 0x2, 0, 0}, 11361 {0x5C, 0x4, 0x4, 1, 1}, 11362 {0x5D, 0x7, 0x7, 0, 0}, 11363 {0x5E, 0x55, 0x55, 0, 0}, 11364 {0x5F, 0x23, 0x23, 0, 0}, 11365 {0x60, 0x41, 0x41, 0, 0}, 11366 {0x61, 0x1, 0x1, 0, 0}, 11367 {0x62, 0xa, 0xa, 0, 0}, 11368 {0x63, 0, 0, 0, 0}, 11369 {0x64, 0, 0, 0, 0}, 11370 {0x65, 0, 0, 0, 0}, 11371 {0x66, 0, 0, 0, 0}, 11372 {0x67, 0, 0, 0, 0}, 11373 {0x68, 0, 0, 0, 0}, 11374 {0x69, 0, 0, 0, 0}, 11375 {0x6A, 0, 0, 0, 0}, 11376 {0x6B, 0xc, 0xc, 0, 0}, 11377 {0x6C, 0, 0, 0, 0}, 11378 {0x6D, 0, 0, 0, 0}, 11379 {0x6E, 0, 0, 0, 0}, 11380 {0x6F, 0, 0, 0, 0}, 11381 {0x70, 0, 0, 0, 0}, 11382 {0x71, 0, 0, 0, 0}, 11383 {0x72, 0x22, 0x22, 0, 0}, 11384 {0x73, 0x22, 0x22, 0, 0}, 11385 {0x74, 0, 0, 1, 1}, 11386 {0x75, 0xa, 0xa, 0, 0}, 11387 {0x76, 0x1, 0x1, 0, 0}, 11388 {0x77, 0x22, 0x22, 0, 0}, 11389 {0x78, 0x30, 0x30, 0, 0}, 11390 {0x79, 0, 0, 0, 0}, 11391 {0x7A, 0, 0, 0, 0}, 11392 {0x7B, 0, 0, 0, 0}, 11393 {0x7C, 0, 0, 0, 0}, 11394 {0x7D, 0x5, 0x5, 1, 1}, 11395 {0x7E, 0, 0, 0, 0}, 11396 {0x7F, 0, 0, 0, 0}, 11397 {0x80, 0, 0, 0, 0}, 11398 {0x81, 0, 0, 0, 0}, 11399 {0x82, 0, 0, 0, 0}, 11400 {0x83, 0, 0, 0, 0}, 11401 {0x84, 0, 0, 0, 0}, 11402 {0x85, 0, 0, 0, 0}, 11403 {0x86, 0, 0, 0, 0}, 11404 {0x87, 0, 0, 0, 0}, 11405 {0x88, 0, 0, 0, 0}, 11406 {0x89, 0, 0, 0, 0}, 11407 {0x8A, 0, 0, 0, 0}, 11408 {0x8B, 0, 0, 0, 0}, 11409 {0x8C, 0, 0, 0, 0}, 11410 {0x8D, 0, 0, 0, 0}, 11411 {0x8E, 0, 0, 0, 0}, 11412 {0x8F, 0, 0, 0, 0}, 11413 {0x90, 0, 0, 0, 0}, 11414 {0x91, 0, 0, 0, 0}, 11415 {0x92, 0, 0, 0, 0}, 11416 {0x93, 0, 0, 0, 0}, 11417 {0x94, 0, 0, 0, 0}, 11418 {0xFFFF, 0, 0, 0, 0}, 11419 }; 11420 11421 static struct radio_20xx_regs regs_2057_rev4[] = { 11422 {0x00, 0x84, 0}, 11423 {0x01, 0, 0}, 11424 {0x02, 0x60, 0}, 11425 {0x03, 0x1f, 0}, 11426 {0x04, 0x4, 0}, 11427 {0x05, 0x2, 0}, 11428 {0x06, 0x1, 0}, 11429 {0x07, 0x1, 0}, 11430 {0x08, 0x1, 0}, 11431 {0x09, 0x69, 0}, 11432 {0x0A, 0x66, 0}, 11433 {0x0B, 0x6, 0}, 11434 {0x0C, 0x18, 0}, 11435 {0x0D, 0x3, 0}, 11436 {0x0E, 0x20, 1}, 11437 {0x0F, 0x20, 0}, 11438 {0x10, 0, 0}, 11439 {0x11, 0x7c, 0}, 11440 {0x12, 0x42, 0}, 11441 {0x13, 0xbd, 0}, 11442 {0x14, 0x7, 0}, 11443 {0x15, 0xf7, 0}, 11444 {0x16, 0x8, 0}, 11445 {0x17, 0x17, 0}, 11446 {0x18, 0x7, 0}, 11447 {0x19, 0, 0}, 11448 {0x1A, 0x2, 0}, 11449 {0x1B, 0x13, 0}, 11450 {0x1C, 0x3e, 0}, 11451 {0x1D, 0x3e, 0}, 11452 {0x1E, 0x96, 0}, 11453 {0x1F, 0x4, 0}, 11454 {0x20, 0, 0}, 11455 {0x21, 0, 0}, 11456 {0x22, 0x17, 0}, 11457 {0x23, 0x4, 0}, 11458 {0x24, 0x1, 0}, 11459 {0x25, 0x6, 0}, 11460 {0x26, 0x4, 0}, 11461 {0x27, 0xd, 0}, 11462 {0x28, 0xd, 0}, 11463 {0x29, 0x30, 0}, 11464 {0x2A, 0x32, 0}, 11465 {0x2B, 0x8, 0}, 11466 {0x2C, 0x1c, 0}, 11467 {0x2D, 0x2, 0}, 11468 {0x2E, 0x4, 0}, 11469 {0x2F, 0x7f, 0}, 11470 {0x30, 0x27, 0}, 11471 {0x31, 0, 1}, 11472 {0x32, 0, 1}, 11473 {0x33, 0, 1}, 11474 {0x34, 0, 0}, 11475 {0x35, 0x26, 1}, 11476 {0x36, 0x18, 0}, 11477 {0x37, 0x7, 0}, 11478 {0x38, 0x66, 0}, 11479 {0x39, 0x66, 0}, 11480 {0x3A, 0x66, 0}, 11481 {0x3B, 0x66, 0}, 11482 {0x3C, 0xff, 1}, 11483 {0x3D, 0xff, 1}, 11484 {0x3E, 0xff, 1}, 11485 {0x3F, 0xff, 1}, 11486 {0x40, 0x16, 0}, 11487 {0x41, 0x7, 0}, 11488 {0x42, 0x19, 0}, 11489 {0x43, 0x7, 0}, 11490 {0x44, 0x6, 0}, 11491 {0x45, 0x3, 0}, 11492 {0x46, 0x1, 0}, 11493 {0x47, 0x7, 0}, 11494 {0x48, 0x33, 0}, 11495 {0x49, 0x5, 0}, 11496 {0x4A, 0x77, 0}, 11497 {0x4B, 0x66, 0}, 11498 {0x4C, 0x66, 0}, 11499 {0x4D, 0, 0}, 11500 {0x4E, 0x4, 0}, 11501 {0x4F, 0xc, 0}, 11502 {0x50, 0, 0}, 11503 {0x51, 0x75, 0}, 11504 {0x56, 0x7, 0}, 11505 {0x57, 0, 0}, 11506 {0x58, 0, 0}, 11507 {0x59, 0xa8, 0}, 11508 {0x5A, 0, 0}, 11509 {0x5B, 0x1f, 0}, 11510 {0x5C, 0x30, 0}, 11511 {0x5D, 0x1, 0}, 11512 {0x5E, 0x30, 0}, 11513 {0x5F, 0x70, 0}, 11514 {0x60, 0, 0}, 11515 {0x61, 0, 0}, 11516 {0x62, 0x33, 1}, 11517 {0x63, 0x19, 0}, 11518 {0x64, 0x62, 0}, 11519 {0x65, 0, 0}, 11520 {0x66, 0x11, 0}, 11521 {0x69, 0, 0}, 11522 {0x6A, 0x7e, 0}, 11523 {0x6B, 0x3f, 0}, 11524 {0x6C, 0x7f, 0}, 11525 {0x6D, 0x78, 0}, 11526 {0x6E, 0xc8, 0}, 11527 {0x6F, 0x88, 0}, 11528 {0x70, 0x8, 0}, 11529 {0x71, 0xf, 0}, 11530 {0x72, 0xbc, 0}, 11531 {0x73, 0x8, 0}, 11532 {0x74, 0x60, 0}, 11533 {0x75, 0x1e, 0}, 11534 {0x76, 0x70, 0}, 11535 {0x77, 0, 0}, 11536 {0x78, 0, 0}, 11537 {0x79, 0, 0}, 11538 {0x7A, 0x33, 0}, 11539 {0x7B, 0x1e, 0}, 11540 {0x7C, 0x62, 0}, 11541 {0x7D, 0x11, 0}, 11542 {0x80, 0x3c, 0}, 11543 {0x81, 0x9c, 0}, 11544 {0x82, 0xa, 0}, 11545 {0x83, 0x9d, 0}, 11546 {0x84, 0xa, 0}, 11547 {0x85, 0, 0}, 11548 {0x86, 0x40, 0}, 11549 {0x87, 0x40, 0}, 11550 {0x88, 0x88, 0}, 11551 {0x89, 0x10, 0}, 11552 {0x8A, 0xf0, 1}, 11553 {0x8B, 0x10, 1}, 11554 {0x8C, 0xf0, 1}, 11555 {0x8D, 0, 0}, 11556 {0x8E, 0, 0}, 11557 {0x8F, 0x10, 0}, 11558 {0x90, 0x55, 0}, 11559 {0x91, 0x3f, 1}, 11560 {0x92, 0x36, 1}, 11561 {0x93, 0, 0}, 11562 {0x94, 0, 0}, 11563 {0x95, 0, 0}, 11564 {0x96, 0x87, 0}, 11565 {0x97, 0x11, 0}, 11566 {0x98, 0, 0}, 11567 {0x99, 0x33, 0}, 11568 {0x9A, 0x88, 0}, 11569 {0x9B, 0, 0}, 11570 {0x9C, 0x87, 0}, 11571 {0x9D, 0x11, 0}, 11572 {0x9E, 0, 0}, 11573 {0x9F, 0x33, 0}, 11574 {0xA0, 0x88, 0}, 11575 {0xA1, 0xe1, 0}, 11576 {0xA2, 0x3f, 0}, 11577 {0xA3, 0x44, 0}, 11578 {0xA4, 0x8c, 1}, 11579 {0xA5, 0x6d, 0}, 11580 {0xA6, 0x22, 0}, 11581 {0xA7, 0xbe, 0}, 11582 {0xA8, 0x55, 1}, 11583 {0xA9, 0xc, 0}, 11584 {0xAA, 0xc, 0}, 11585 {0xAB, 0xaa, 0}, 11586 {0xAC, 0x2, 0}, 11587 {0xAD, 0, 0}, 11588 {0xAE, 0x10, 0}, 11589 {0xAF, 0x1, 1}, 11590 {0xB0, 0, 0}, 11591 {0xB1, 0, 0}, 11592 {0xB2, 0x80, 0}, 11593 {0xB3, 0x60, 0}, 11594 {0xB4, 0x44, 0}, 11595 {0xB5, 0x55, 0}, 11596 {0xB6, 0x1, 0}, 11597 {0xB7, 0x55, 0}, 11598 {0xB8, 0x1, 0}, 11599 {0xB9, 0x5, 0}, 11600 {0xBA, 0x55, 0}, 11601 {0xBB, 0x55, 0}, 11602 {0xC1, 0, 0}, 11603 {0xC2, 0, 0}, 11604 {0xC3, 0, 0}, 11605 {0xC4, 0, 0}, 11606 {0xC5, 0, 0}, 11607 {0xC6, 0, 0}, 11608 {0xC7, 0, 0}, 11609 {0xC8, 0, 0}, 11610 {0xC9, 0, 0}, 11611 {0xCA, 0, 0}, 11612 {0xCB, 0, 0}, 11613 {0xCC, 0, 0}, 11614 {0xCD, 0, 0}, 11615 {0xCE, 0x5e, 0}, 11616 {0xCF, 0xc, 0}, 11617 {0xD0, 0xc, 0}, 11618 {0xD1, 0xc, 0}, 11619 {0xD2, 0, 0}, 11620 {0xD3, 0x2b, 0}, 11621 {0xD4, 0xc, 0}, 11622 {0xD5, 0, 0}, 11623 {0xD6, 0x75, 0}, 11624 {0xDB, 0x7, 0}, 11625 {0xDC, 0, 0}, 11626 {0xDD, 0, 0}, 11627 {0xDE, 0xa8, 0}, 11628 {0xDF, 0, 0}, 11629 {0xE0, 0x1f, 0}, 11630 {0xE1, 0x30, 0}, 11631 {0xE2, 0x1, 0}, 11632 {0xE3, 0x30, 0}, 11633 {0xE4, 0x70, 0}, 11634 {0xE5, 0, 0}, 11635 {0xE6, 0, 0}, 11636 {0xE7, 0x33, 0}, 11637 {0xE8, 0x19, 0}, 11638 {0xE9, 0x62, 0}, 11639 {0xEA, 0, 0}, 11640 {0xEB, 0x11, 0}, 11641 {0xEE, 0, 0}, 11642 {0xEF, 0x7e, 0}, 11643 {0xF0, 0x3f, 0}, 11644 {0xF1, 0x7f, 0}, 11645 {0xF2, 0x78, 0}, 11646 {0xF3, 0xc8, 0}, 11647 {0xF4, 0x88, 0}, 11648 {0xF5, 0x8, 0}, 11649 {0xF6, 0xf, 0}, 11650 {0xF7, 0xbc, 0}, 11651 {0xF8, 0x8, 0}, 11652 {0xF9, 0x60, 0}, 11653 {0xFA, 0x1e, 0}, 11654 {0xFB, 0x70, 0}, 11655 {0xFC, 0, 0}, 11656 {0xFD, 0, 0}, 11657 {0xFE, 0, 0}, 11658 {0xFF, 0x33, 0}, 11659 {0x100, 0x1e, 0}, 11660 {0x101, 0x62, 0}, 11661 {0x102, 0x11, 0}, 11662 {0x105, 0x3c, 0}, 11663 {0x106, 0x9c, 0}, 11664 {0x107, 0xa, 0}, 11665 {0x108, 0x9d, 0}, 11666 {0x109, 0xa, 0}, 11667 {0x10A, 0, 0}, 11668 {0x10B, 0x40, 0}, 11669 {0x10C, 0x40, 0}, 11670 {0x10D, 0x88, 0}, 11671 {0x10E, 0x10, 0}, 11672 {0x10F, 0xf0, 1}, 11673 {0x110, 0x10, 1}, 11674 {0x111, 0xf0, 1}, 11675 {0x112, 0, 0}, 11676 {0x113, 0, 0}, 11677 {0x114, 0x10, 0}, 11678 {0x115, 0x55, 0}, 11679 {0x116, 0x3f, 1}, 11680 {0x117, 0x36, 1}, 11681 {0x118, 0, 0}, 11682 {0x119, 0, 0}, 11683 {0x11A, 0, 0}, 11684 {0x11B, 0x87, 0}, 11685 {0x11C, 0x11, 0}, 11686 {0x11D, 0, 0}, 11687 {0x11E, 0x33, 0}, 11688 {0x11F, 0x88, 0}, 11689 {0x120, 0, 0}, 11690 {0x121, 0x87, 0}, 11691 {0x122, 0x11, 0}, 11692 {0x123, 0, 0}, 11693 {0x124, 0x33, 0}, 11694 {0x125, 0x88, 0}, 11695 {0x126, 0xe1, 0}, 11696 {0x127, 0x3f, 0}, 11697 {0x128, 0x44, 0}, 11698 {0x129, 0x8c, 1}, 11699 {0x12A, 0x6d, 0}, 11700 {0x12B, 0x22, 0}, 11701 {0x12C, 0xbe, 0}, 11702 {0x12D, 0x55, 1}, 11703 {0x12E, 0xc, 0}, 11704 {0x12F, 0xc, 0}, 11705 {0x130, 0xaa, 0}, 11706 {0x131, 0x2, 0}, 11707 {0x132, 0, 0}, 11708 {0x133, 0x10, 0}, 11709 {0x134, 0x1, 1}, 11710 {0x135, 0, 0}, 11711 {0x136, 0, 0}, 11712 {0x137, 0x80, 0}, 11713 {0x138, 0x60, 0}, 11714 {0x139, 0x44, 0}, 11715 {0x13A, 0x55, 0}, 11716 {0x13B, 0x1, 0}, 11717 {0x13C, 0x55, 0}, 11718 {0x13D, 0x1, 0}, 11719 {0x13E, 0x5, 0}, 11720 {0x13F, 0x55, 0}, 11721 {0x140, 0x55, 0}, 11722 {0x146, 0, 0}, 11723 {0x147, 0, 0}, 11724 {0x148, 0, 0}, 11725 {0x149, 0, 0}, 11726 {0x14A, 0, 0}, 11727 {0x14B, 0, 0}, 11728 {0x14C, 0, 0}, 11729 {0x14D, 0, 0}, 11730 {0x14E, 0, 0}, 11731 {0x14F, 0, 0}, 11732 {0x150, 0, 0}, 11733 {0x151, 0, 0}, 11734 {0x152, 0, 0}, 11735 {0x153, 0, 0}, 11736 {0x154, 0xc, 0}, 11737 {0x155, 0xc, 0}, 11738 {0x156, 0xc, 0}, 11739 {0x157, 0, 0}, 11740 {0x158, 0x2b, 0}, 11741 {0x159, 0x84, 0}, 11742 {0x15A, 0x15, 0}, 11743 {0x15B, 0xf, 0}, 11744 {0x15C, 0, 0}, 11745 {0x15D, 0, 0}, 11746 {0x15E, 0, 1}, 11747 {0x15F, 0, 1}, 11748 {0x160, 0, 1}, 11749 {0x161, 0, 1}, 11750 {0x162, 0, 1}, 11751 {0x163, 0, 1}, 11752 {0x164, 0, 0}, 11753 {0x165, 0, 0}, 11754 {0x166, 0, 0}, 11755 {0x167, 0, 0}, 11756 {0x168, 0, 0}, 11757 {0x169, 0x2, 1}, 11758 {0x16A, 0, 1}, 11759 {0x16B, 0, 1}, 11760 {0x16C, 0, 1}, 11761 {0x16D, 0, 0}, 11762 {0x170, 0, 0}, 11763 {0x171, 0x77, 0}, 11764 {0x172, 0x77, 0}, 11765 {0x173, 0x77, 0}, 11766 {0x174, 0x77, 0}, 11767 {0x175, 0, 0}, 11768 {0x176, 0x3, 0}, 11769 {0x177, 0x37, 0}, 11770 {0x178, 0x3, 0}, 11771 {0x179, 0, 0}, 11772 {0x17A, 0x21, 0}, 11773 {0x17B, 0x21, 0}, 11774 {0x17C, 0, 0}, 11775 {0x17D, 0xaa, 0}, 11776 {0x17E, 0, 0}, 11777 {0x17F, 0xaa, 0}, 11778 {0x180, 0, 0}, 11779 {0x190, 0, 0}, 11780 {0x191, 0x77, 0}, 11781 {0x192, 0x77, 0}, 11782 {0x193, 0x77, 0}, 11783 {0x194, 0x77, 0}, 11784 {0x195, 0, 0}, 11785 {0x196, 0x3, 0}, 11786 {0x197, 0x37, 0}, 11787 {0x198, 0x3, 0}, 11788 {0x199, 0, 0}, 11789 {0x19A, 0x21, 0}, 11790 {0x19B, 0x21, 0}, 11791 {0x19C, 0, 0}, 11792 {0x19D, 0xaa, 0}, 11793 {0x19E, 0, 0}, 11794 {0x19F, 0xaa, 0}, 11795 {0x1A0, 0, 0}, 11796 {0x1A1, 0x2, 0}, 11797 {0x1A2, 0xf, 0}, 11798 {0x1A3, 0xf, 0}, 11799 {0x1A4, 0, 1}, 11800 {0x1A5, 0, 1}, 11801 {0x1A6, 0, 1}, 11802 {0x1A7, 0x2, 0}, 11803 {0x1A8, 0xf, 0}, 11804 {0x1A9, 0xf, 0}, 11805 {0x1AA, 0, 1}, 11806 {0x1AB, 0, 1}, 11807 {0x1AC, 0, 1}, 11808 {0xFFFF, 0, 0}, 11809 }; 11810 11811 static struct radio_20xx_regs regs_2057_rev5[] = { 11812 {0x00, 0, 1}, 11813 {0x01, 0x57, 1}, 11814 {0x02, 0x20, 1}, 11815 {0x03, 0x1f, 0}, 11816 {0x04, 0x4, 0}, 11817 {0x05, 0x2, 0}, 11818 {0x06, 0x1, 0}, 11819 {0x07, 0x1, 0}, 11820 {0x08, 0x1, 0}, 11821 {0x09, 0x69, 0}, 11822 {0x0A, 0x66, 0}, 11823 {0x0B, 0x6, 0}, 11824 {0x0C, 0x18, 0}, 11825 {0x0D, 0x3, 0}, 11826 {0x0E, 0x20, 0}, 11827 {0x0F, 0x20, 0}, 11828 {0x10, 0, 0}, 11829 {0x11, 0x7c, 0}, 11830 {0x12, 0x42, 0}, 11831 {0x13, 0xbd, 0}, 11832 {0x14, 0x7, 0}, 11833 {0x15, 0x87, 0}, 11834 {0x16, 0x8, 0}, 11835 {0x17, 0x17, 0}, 11836 {0x18, 0x7, 0}, 11837 {0x19, 0, 0}, 11838 {0x1A, 0x2, 0}, 11839 {0x1B, 0x13, 0}, 11840 {0x1C, 0x3e, 0}, 11841 {0x1D, 0x3e, 0}, 11842 {0x1E, 0x96, 0}, 11843 {0x1F, 0x4, 0}, 11844 {0x20, 0, 0}, 11845 {0x21, 0, 0}, 11846 {0x22, 0x17, 0}, 11847 {0x23, 0x6, 1}, 11848 {0x24, 0x1, 0}, 11849 {0x25, 0x6, 0}, 11850 {0x26, 0x4, 0}, 11851 {0x27, 0xd, 0}, 11852 {0x28, 0xd, 0}, 11853 {0x29, 0x30, 0}, 11854 {0x2A, 0x32, 0}, 11855 {0x2B, 0x8, 0}, 11856 {0x2C, 0x1c, 0}, 11857 {0x2D, 0x2, 0}, 11858 {0x2E, 0x4, 0}, 11859 {0x2F, 0x7f, 0}, 11860 {0x30, 0x27, 0}, 11861 {0x31, 0, 1}, 11862 {0x32, 0, 1}, 11863 {0x33, 0, 1}, 11864 {0x34, 0, 0}, 11865 {0x35, 0x20, 0}, 11866 {0x36, 0x18, 0}, 11867 {0x37, 0x7, 0}, 11868 {0x38, 0x66, 0}, 11869 {0x39, 0x66, 0}, 11870 {0x3C, 0xff, 0}, 11871 {0x3D, 0xff, 0}, 11872 {0x40, 0x16, 0}, 11873 {0x41, 0x7, 0}, 11874 {0x45, 0x3, 0}, 11875 {0x46, 0x1, 0}, 11876 {0x47, 0x7, 0}, 11877 {0x4B, 0x66, 0}, 11878 {0x4C, 0x66, 0}, 11879 {0x4D, 0, 0}, 11880 {0x4E, 0x4, 0}, 11881 {0x4F, 0xc, 0}, 11882 {0x50, 0, 0}, 11883 {0x51, 0x70, 1}, 11884 {0x56, 0x7, 0}, 11885 {0x57, 0, 0}, 11886 {0x58, 0, 0}, 11887 {0x59, 0x88, 1}, 11888 {0x5A, 0, 0}, 11889 {0x5B, 0x1f, 0}, 11890 {0x5C, 0x20, 1}, 11891 {0x5D, 0x1, 0}, 11892 {0x5E, 0x30, 0}, 11893 {0x5F, 0x70, 0}, 11894 {0x60, 0, 0}, 11895 {0x61, 0, 0}, 11896 {0x62, 0x33, 1}, 11897 {0x63, 0xf, 1}, 11898 {0x64, 0xf, 1}, 11899 {0x65, 0, 0}, 11900 {0x66, 0x11, 0}, 11901 {0x80, 0x3c, 0}, 11902 {0x81, 0x1, 1}, 11903 {0x82, 0xa, 0}, 11904 {0x85, 0, 0}, 11905 {0x86, 0x40, 0}, 11906 {0x87, 0x40, 0}, 11907 {0x88, 0x88, 0}, 11908 {0x89, 0x10, 0}, 11909 {0x8A, 0xf0, 0}, 11910 {0x8B, 0x10, 0}, 11911 {0x8C, 0xf0, 0}, 11912 {0x8F, 0x10, 0}, 11913 {0x90, 0x55, 0}, 11914 {0x91, 0x3f, 1}, 11915 {0x92, 0x36, 1}, 11916 {0x93, 0, 0}, 11917 {0x94, 0, 0}, 11918 {0x95, 0, 0}, 11919 {0x96, 0x87, 0}, 11920 {0x97, 0x11, 0}, 11921 {0x98, 0, 0}, 11922 {0x99, 0x33, 0}, 11923 {0x9A, 0x88, 0}, 11924 {0xA1, 0x20, 1}, 11925 {0xA2, 0x3f, 0}, 11926 {0xA3, 0x44, 0}, 11927 {0xA4, 0x8c, 0}, 11928 {0xA5, 0x6c, 0}, 11929 {0xA6, 0x22, 0}, 11930 {0xA7, 0xbe, 0}, 11931 {0xA8, 0x55, 0}, 11932 {0xAA, 0xc, 0}, 11933 {0xAB, 0xaa, 0}, 11934 {0xAC, 0x2, 0}, 11935 {0xAD, 0, 0}, 11936 {0xAE, 0x10, 0}, 11937 {0xAF, 0x1, 0}, 11938 {0xB0, 0, 0}, 11939 {0xB1, 0, 0}, 11940 {0xB2, 0x80, 0}, 11941 {0xB3, 0x60, 0}, 11942 {0xB4, 0x44, 0}, 11943 {0xB5, 0x55, 0}, 11944 {0xB6, 0x1, 0}, 11945 {0xB7, 0x55, 0}, 11946 {0xB8, 0x1, 0}, 11947 {0xB9, 0x5, 0}, 11948 {0xBA, 0x55, 0}, 11949 {0xBB, 0x55, 0}, 11950 {0xC3, 0, 0}, 11951 {0xC4, 0, 0}, 11952 {0xC5, 0, 0}, 11953 {0xC6, 0, 0}, 11954 {0xC7, 0, 0}, 11955 {0xC8, 0, 0}, 11956 {0xC9, 0, 0}, 11957 {0xCA, 0, 0}, 11958 {0xCB, 0, 0}, 11959 {0xCD, 0, 0}, 11960 {0xCE, 0x5e, 0}, 11961 {0xCF, 0xc, 0}, 11962 {0xD0, 0xc, 0}, 11963 {0xD1, 0xc, 0}, 11964 {0xD2, 0, 0}, 11965 {0xD3, 0x2b, 0}, 11966 {0xD4, 0xc, 0}, 11967 {0xD5, 0, 0}, 11968 {0xD6, 0x70, 1}, 11969 {0xDB, 0x7, 0}, 11970 {0xDC, 0, 0}, 11971 {0xDD, 0, 0}, 11972 {0xDE, 0x88, 1}, 11973 {0xDF, 0, 0}, 11974 {0xE0, 0x1f, 0}, 11975 {0xE1, 0x20, 1}, 11976 {0xE2, 0x1, 0}, 11977 {0xE3, 0x30, 0}, 11978 {0xE4, 0x70, 0}, 11979 {0xE5, 0, 0}, 11980 {0xE6, 0, 0}, 11981 {0xE7, 0x33, 0}, 11982 {0xE8, 0xf, 1}, 11983 {0xE9, 0xf, 1}, 11984 {0xEA, 0, 0}, 11985 {0xEB, 0x11, 0}, 11986 {0x105, 0x3c, 0}, 11987 {0x106, 0x1, 1}, 11988 {0x107, 0xa, 0}, 11989 {0x10A, 0, 0}, 11990 {0x10B, 0x40, 0}, 11991 {0x10C, 0x40, 0}, 11992 {0x10D, 0x88, 0}, 11993 {0x10E, 0x10, 0}, 11994 {0x10F, 0xf0, 0}, 11995 {0x110, 0x10, 0}, 11996 {0x111, 0xf0, 0}, 11997 {0x114, 0x10, 0}, 11998 {0x115, 0x55, 0}, 11999 {0x116, 0x3f, 1}, 12000 {0x117, 0x36, 1}, 12001 {0x118, 0, 0}, 12002 {0x119, 0, 0}, 12003 {0x11A, 0, 0}, 12004 {0x11B, 0x87, 0}, 12005 {0x11C, 0x11, 0}, 12006 {0x11D, 0, 0}, 12007 {0x11E, 0x33, 0}, 12008 {0x11F, 0x88, 0}, 12009 {0x126, 0x20, 1}, 12010 {0x127, 0x3f, 0}, 12011 {0x128, 0x44, 0}, 12012 {0x129, 0x8c, 0}, 12013 {0x12A, 0x6c, 0}, 12014 {0x12B, 0x22, 0}, 12015 {0x12C, 0xbe, 0}, 12016 {0x12D, 0x55, 0}, 12017 {0x12F, 0xc, 0}, 12018 {0x130, 0xaa, 0}, 12019 {0x131, 0x2, 0}, 12020 {0x132, 0, 0}, 12021 {0x133, 0x10, 0}, 12022 {0x134, 0x1, 0}, 12023 {0x135, 0, 0}, 12024 {0x136, 0, 0}, 12025 {0x137, 0x80, 0}, 12026 {0x138, 0x60, 0}, 12027 {0x139, 0x44, 0}, 12028 {0x13A, 0x55, 0}, 12029 {0x13B, 0x1, 0}, 12030 {0x13C, 0x55, 0}, 12031 {0x13D, 0x1, 0}, 12032 {0x13E, 0x5, 0}, 12033 {0x13F, 0x55, 0}, 12034 {0x140, 0x55, 0}, 12035 {0x148, 0, 0}, 12036 {0x149, 0, 0}, 12037 {0x14A, 0, 0}, 12038 {0x14B, 0, 0}, 12039 {0x14C, 0, 0}, 12040 {0x14D, 0, 0}, 12041 {0x14E, 0, 0}, 12042 {0x14F, 0, 0}, 12043 {0x150, 0, 0}, 12044 {0x154, 0xc, 0}, 12045 {0x155, 0xc, 0}, 12046 {0x156, 0xc, 0}, 12047 {0x157, 0, 0}, 12048 {0x158, 0x2b, 0}, 12049 {0x159, 0x84, 0}, 12050 {0x15A, 0x15, 0}, 12051 {0x15B, 0xf, 0}, 12052 {0x15C, 0, 0}, 12053 {0x15D, 0, 0}, 12054 {0x15E, 0, 1}, 12055 {0x15F, 0, 1}, 12056 {0x160, 0, 1}, 12057 {0x161, 0, 1}, 12058 {0x162, 0, 1}, 12059 {0x163, 0, 1}, 12060 {0x164, 0, 0}, 12061 {0x165, 0, 0}, 12062 {0x166, 0, 0}, 12063 {0x167, 0, 0}, 12064 {0x168, 0, 0}, 12065 {0x169, 0, 0}, 12066 {0x16A, 0, 1}, 12067 {0x16B, 0, 1}, 12068 {0x16C, 0, 1}, 12069 {0x16D, 0, 0}, 12070 {0x170, 0, 0}, 12071 {0x171, 0x77, 0}, 12072 {0x172, 0x77, 0}, 12073 {0x173, 0x77, 0}, 12074 {0x174, 0x77, 0}, 12075 {0x175, 0, 0}, 12076 {0x176, 0x3, 0}, 12077 {0x177, 0x37, 0}, 12078 {0x178, 0x3, 0}, 12079 {0x179, 0, 0}, 12080 {0x17B, 0x21, 0}, 12081 {0x17C, 0, 0}, 12082 {0x17D, 0xaa, 0}, 12083 {0x17E, 0, 0}, 12084 {0x190, 0, 0}, 12085 {0x191, 0x77, 0}, 12086 {0x192, 0x77, 0}, 12087 {0x193, 0x77, 0}, 12088 {0x194, 0x77, 0}, 12089 {0x195, 0, 0}, 12090 {0x196, 0x3, 0}, 12091 {0x197, 0x37, 0}, 12092 {0x198, 0x3, 0}, 12093 {0x199, 0, 0}, 12094 {0x19B, 0x21, 0}, 12095 {0x19C, 0, 0}, 12096 {0x19D, 0xaa, 0}, 12097 {0x19E, 0, 0}, 12098 {0x1A1, 0x2, 0}, 12099 {0x1A2, 0xf, 0}, 12100 {0x1A3, 0xf, 0}, 12101 {0x1A4, 0, 1}, 12102 {0x1A5, 0, 1}, 12103 {0x1A6, 0, 1}, 12104 {0x1A7, 0x2, 0}, 12105 {0x1A8, 0xf, 0}, 12106 {0x1A9, 0xf, 0}, 12107 {0x1AA, 0, 1}, 12108 {0x1AB, 0, 1}, 12109 {0x1AC, 0, 1}, 12110 {0x1AD, 0x84, 0}, 12111 {0x1AE, 0x60, 0}, 12112 {0x1AF, 0x47, 0}, 12113 {0x1B0, 0x47, 0}, 12114 {0x1B1, 0, 0}, 12115 {0x1B2, 0, 0}, 12116 {0x1B3, 0, 0}, 12117 {0x1B4, 0, 0}, 12118 {0x1B5, 0, 0}, 12119 {0x1B6, 0, 0}, 12120 {0x1B7, 0xc, 1}, 12121 {0x1B8, 0, 0}, 12122 {0x1B9, 0, 0}, 12123 {0x1BA, 0, 0}, 12124 {0x1BB, 0, 0}, 12125 {0x1BC, 0, 0}, 12126 {0x1BD, 0, 0}, 12127 {0x1BE, 0, 0}, 12128 {0x1BF, 0, 0}, 12129 {0x1C0, 0, 0}, 12130 {0x1C1, 0x1, 1}, 12131 {0x1C2, 0x80, 1}, 12132 {0x1C3, 0, 0}, 12133 {0x1C4, 0, 0}, 12134 {0x1C5, 0, 0}, 12135 {0x1C6, 0, 0}, 12136 {0x1C7, 0, 0}, 12137 {0x1C8, 0, 0}, 12138 {0x1C9, 0, 0}, 12139 {0x1CA, 0, 0}, 12140 {0xFFFF, 0, 0} 12141 }; 12142 12143 static struct radio_20xx_regs regs_2057_rev5v1[] = { 12144 {0x00, 0x15, 1}, 12145 {0x01, 0x57, 1}, 12146 {0x02, 0x20, 1}, 12147 {0x03, 0x1f, 0}, 12148 {0x04, 0x4, 0}, 12149 {0x05, 0x2, 0}, 12150 {0x06, 0x1, 0}, 12151 {0x07, 0x1, 0}, 12152 {0x08, 0x1, 0}, 12153 {0x09, 0x69, 0}, 12154 {0x0A, 0x66, 0}, 12155 {0x0B, 0x6, 0}, 12156 {0x0C, 0x18, 0}, 12157 {0x0D, 0x3, 0}, 12158 {0x0E, 0x20, 0}, 12159 {0x0F, 0x20, 0}, 12160 {0x10, 0, 0}, 12161 {0x11, 0x7c, 0}, 12162 {0x12, 0x42, 0}, 12163 {0x13, 0xbd, 0}, 12164 {0x14, 0x7, 0}, 12165 {0x15, 0x87, 0}, 12166 {0x16, 0x8, 0}, 12167 {0x17, 0x17, 0}, 12168 {0x18, 0x7, 0}, 12169 {0x19, 0, 0}, 12170 {0x1A, 0x2, 0}, 12171 {0x1B, 0x13, 0}, 12172 {0x1C, 0x3e, 0}, 12173 {0x1D, 0x3e, 0}, 12174 {0x1E, 0x96, 0}, 12175 {0x1F, 0x4, 0}, 12176 {0x20, 0, 0}, 12177 {0x21, 0, 0}, 12178 {0x22, 0x17, 0}, 12179 {0x23, 0x6, 1}, 12180 {0x24, 0x1, 0}, 12181 {0x25, 0x6, 0}, 12182 {0x26, 0x4, 0}, 12183 {0x27, 0xd, 0}, 12184 {0x28, 0xd, 0}, 12185 {0x29, 0x30, 0}, 12186 {0x2A, 0x32, 0}, 12187 {0x2B, 0x8, 0}, 12188 {0x2C, 0x1c, 0}, 12189 {0x2D, 0x2, 0}, 12190 {0x2E, 0x4, 0}, 12191 {0x2F, 0x7f, 0}, 12192 {0x30, 0x27, 0}, 12193 {0x31, 0, 1}, 12194 {0x32, 0, 1}, 12195 {0x33, 0, 1}, 12196 {0x34, 0, 0}, 12197 {0x35, 0x20, 0}, 12198 {0x36, 0x18, 0}, 12199 {0x37, 0x7, 0}, 12200 {0x38, 0x66, 0}, 12201 {0x39, 0x66, 0}, 12202 {0x3C, 0xff, 0}, 12203 {0x3D, 0xff, 0}, 12204 {0x40, 0x16, 0}, 12205 {0x41, 0x7, 0}, 12206 {0x45, 0x3, 0}, 12207 {0x46, 0x1, 0}, 12208 {0x47, 0x7, 0}, 12209 {0x4B, 0x66, 0}, 12210 {0x4C, 0x66, 0}, 12211 {0x4D, 0, 0}, 12212 {0x4E, 0x4, 0}, 12213 {0x4F, 0xc, 0}, 12214 {0x50, 0, 0}, 12215 {0x51, 0x70, 1}, 12216 {0x56, 0x7, 0}, 12217 {0x57, 0, 0}, 12218 {0x58, 0, 0}, 12219 {0x59, 0x88, 1}, 12220 {0x5A, 0, 0}, 12221 {0x5B, 0x1f, 0}, 12222 {0x5C, 0x20, 1}, 12223 {0x5D, 0x1, 0}, 12224 {0x5E, 0x30, 0}, 12225 {0x5F, 0x70, 0}, 12226 {0x60, 0, 0}, 12227 {0x61, 0, 0}, 12228 {0x62, 0x33, 1}, 12229 {0x63, 0xf, 1}, 12230 {0x64, 0xf, 1}, 12231 {0x65, 0, 0}, 12232 {0x66, 0x11, 0}, 12233 {0x80, 0x3c, 0}, 12234 {0x81, 0x1, 1}, 12235 {0x82, 0xa, 0}, 12236 {0x85, 0, 0}, 12237 {0x86, 0x40, 0}, 12238 {0x87, 0x40, 0}, 12239 {0x88, 0x88, 0}, 12240 {0x89, 0x10, 0}, 12241 {0x8A, 0xf0, 0}, 12242 {0x8B, 0x10, 0}, 12243 {0x8C, 0xf0, 0}, 12244 {0x8F, 0x10, 0}, 12245 {0x90, 0x55, 0}, 12246 {0x91, 0x3f, 1}, 12247 {0x92, 0x36, 1}, 12248 {0x93, 0, 0}, 12249 {0x94, 0, 0}, 12250 {0x95, 0, 0}, 12251 {0x96, 0x87, 0}, 12252 {0x97, 0x11, 0}, 12253 {0x98, 0, 0}, 12254 {0x99, 0x33, 0}, 12255 {0x9A, 0x88, 0}, 12256 {0xA1, 0x20, 1}, 12257 {0xA2, 0x3f, 0}, 12258 {0xA3, 0x44, 0}, 12259 {0xA4, 0x8c, 0}, 12260 {0xA5, 0x6c, 0}, 12261 {0xA6, 0x22, 0}, 12262 {0xA7, 0xbe, 0}, 12263 {0xA8, 0x55, 0}, 12264 {0xAA, 0xc, 0}, 12265 {0xAB, 0xaa, 0}, 12266 {0xAC, 0x2, 0}, 12267 {0xAD, 0, 0}, 12268 {0xAE, 0x10, 0}, 12269 {0xAF, 0x1, 0}, 12270 {0xB0, 0, 0}, 12271 {0xB1, 0, 0}, 12272 {0xB2, 0x80, 0}, 12273 {0xB3, 0x60, 0}, 12274 {0xB4, 0x44, 0}, 12275 {0xB5, 0x55, 0}, 12276 {0xB6, 0x1, 0}, 12277 {0xB7, 0x55, 0}, 12278 {0xB8, 0x1, 0}, 12279 {0xB9, 0x5, 0}, 12280 {0xBA, 0x55, 0}, 12281 {0xBB, 0x55, 0}, 12282 {0xC3, 0, 0}, 12283 {0xC4, 0, 0}, 12284 {0xC5, 0, 0}, 12285 {0xC6, 0, 0}, 12286 {0xC7, 0, 0}, 12287 {0xC8, 0, 0}, 12288 {0xC9, 0x1, 1}, 12289 {0xCA, 0, 0}, 12290 {0xCB, 0, 0}, 12291 {0xCD, 0, 0}, 12292 {0xCE, 0x5e, 0}, 12293 {0xCF, 0xc, 0}, 12294 {0xD0, 0xc, 0}, 12295 {0xD1, 0xc, 0}, 12296 {0xD2, 0, 0}, 12297 {0xD3, 0x2b, 0}, 12298 {0xD4, 0xc, 0}, 12299 {0xD5, 0, 0}, 12300 {0xD6, 0x70, 1}, 12301 {0xDB, 0x7, 0}, 12302 {0xDC, 0, 0}, 12303 {0xDD, 0, 0}, 12304 {0xDE, 0x88, 1}, 12305 {0xDF, 0, 0}, 12306 {0xE0, 0x1f, 0}, 12307 {0xE1, 0x20, 1}, 12308 {0xE2, 0x1, 0}, 12309 {0xE3, 0x30, 0}, 12310 {0xE4, 0x70, 0}, 12311 {0xE5, 0, 0}, 12312 {0xE6, 0, 0}, 12313 {0xE7, 0x33, 0}, 12314 {0xE8, 0xf, 1}, 12315 {0xE9, 0xf, 1}, 12316 {0xEA, 0, 0}, 12317 {0xEB, 0x11, 0}, 12318 {0x105, 0x3c, 0}, 12319 {0x106, 0x1, 1}, 12320 {0x107, 0xa, 0}, 12321 {0x10A, 0, 0}, 12322 {0x10B, 0x40, 0}, 12323 {0x10C, 0x40, 0}, 12324 {0x10D, 0x88, 0}, 12325 {0x10E, 0x10, 0}, 12326 {0x10F, 0xf0, 0}, 12327 {0x110, 0x10, 0}, 12328 {0x111, 0xf0, 0}, 12329 {0x114, 0x10, 0}, 12330 {0x115, 0x55, 0}, 12331 {0x116, 0x3f, 1}, 12332 {0x117, 0x36, 1}, 12333 {0x118, 0, 0}, 12334 {0x119, 0, 0}, 12335 {0x11A, 0, 0}, 12336 {0x11B, 0x87, 0}, 12337 {0x11C, 0x11, 0}, 12338 {0x11D, 0, 0}, 12339 {0x11E, 0x33, 0}, 12340 {0x11F, 0x88, 0}, 12341 {0x126, 0x20, 1}, 12342 {0x127, 0x3f, 0}, 12343 {0x128, 0x44, 0}, 12344 {0x129, 0x8c, 0}, 12345 {0x12A, 0x6c, 0}, 12346 {0x12B, 0x22, 0}, 12347 {0x12C, 0xbe, 0}, 12348 {0x12D, 0x55, 0}, 12349 {0x12F, 0xc, 0}, 12350 {0x130, 0xaa, 0}, 12351 {0x131, 0x2, 0}, 12352 {0x132, 0, 0}, 12353 {0x133, 0x10, 0}, 12354 {0x134, 0x1, 0}, 12355 {0x135, 0, 0}, 12356 {0x136, 0, 0}, 12357 {0x137, 0x80, 0}, 12358 {0x138, 0x60, 0}, 12359 {0x139, 0x44, 0}, 12360 {0x13A, 0x55, 0}, 12361 {0x13B, 0x1, 0}, 12362 {0x13C, 0x55, 0}, 12363 {0x13D, 0x1, 0}, 12364 {0x13E, 0x5, 0}, 12365 {0x13F, 0x55, 0}, 12366 {0x140, 0x55, 0}, 12367 {0x148, 0, 0}, 12368 {0x149, 0, 0}, 12369 {0x14A, 0, 0}, 12370 {0x14B, 0, 0}, 12371 {0x14C, 0, 0}, 12372 {0x14D, 0, 0}, 12373 {0x14E, 0x1, 1}, 12374 {0x14F, 0, 0}, 12375 {0x150, 0, 0}, 12376 {0x154, 0xc, 0}, 12377 {0x155, 0xc, 0}, 12378 {0x156, 0xc, 0}, 12379 {0x157, 0, 0}, 12380 {0x158, 0x2b, 0}, 12381 {0x159, 0x84, 0}, 12382 {0x15A, 0x15, 0}, 12383 {0x15B, 0xf, 0}, 12384 {0x15C, 0, 0}, 12385 {0x15D, 0, 0}, 12386 {0x15E, 0, 1}, 12387 {0x15F, 0, 1}, 12388 {0x160, 0, 1}, 12389 {0x161, 0, 1}, 12390 {0x162, 0, 1}, 12391 {0x163, 0, 1}, 12392 {0x164, 0, 0}, 12393 {0x165, 0, 0}, 12394 {0x166, 0, 0}, 12395 {0x167, 0, 0}, 12396 {0x168, 0, 0}, 12397 {0x169, 0, 0}, 12398 {0x16A, 0, 1}, 12399 {0x16B, 0, 1}, 12400 {0x16C, 0, 1}, 12401 {0x16D, 0, 0}, 12402 {0x170, 0, 0}, 12403 {0x171, 0x77, 0}, 12404 {0x172, 0x77, 0}, 12405 {0x173, 0x77, 0}, 12406 {0x174, 0x77, 0}, 12407 {0x175, 0, 0}, 12408 {0x176, 0x3, 0}, 12409 {0x177, 0x37, 0}, 12410 {0x178, 0x3, 0}, 12411 {0x179, 0, 0}, 12412 {0x17B, 0x21, 0}, 12413 {0x17C, 0, 0}, 12414 {0x17D, 0xaa, 0}, 12415 {0x17E, 0, 0}, 12416 {0x190, 0, 0}, 12417 {0x191, 0x77, 0}, 12418 {0x192, 0x77, 0}, 12419 {0x193, 0x77, 0}, 12420 {0x194, 0x77, 0}, 12421 {0x195, 0, 0}, 12422 {0x196, 0x3, 0}, 12423 {0x197, 0x37, 0}, 12424 {0x198, 0x3, 0}, 12425 {0x199, 0, 0}, 12426 {0x19B, 0x21, 0}, 12427 {0x19C, 0, 0}, 12428 {0x19D, 0xaa, 0}, 12429 {0x19E, 0, 0}, 12430 {0x1A1, 0x2, 0}, 12431 {0x1A2, 0xf, 0}, 12432 {0x1A3, 0xf, 0}, 12433 {0x1A4, 0, 1}, 12434 {0x1A5, 0, 1}, 12435 {0x1A6, 0, 1}, 12436 {0x1A7, 0x2, 0}, 12437 {0x1A8, 0xf, 0}, 12438 {0x1A9, 0xf, 0}, 12439 {0x1AA, 0, 1}, 12440 {0x1AB, 0, 1}, 12441 {0x1AC, 0, 1}, 12442 {0x1AD, 0x84, 0}, 12443 {0x1AE, 0x60, 0}, 12444 {0x1AF, 0x47, 0}, 12445 {0x1B0, 0x47, 0}, 12446 {0x1B1, 0, 0}, 12447 {0x1B2, 0, 0}, 12448 {0x1B3, 0, 0}, 12449 {0x1B4, 0, 0}, 12450 {0x1B5, 0, 0}, 12451 {0x1B6, 0, 0}, 12452 {0x1B7, 0xc, 1}, 12453 {0x1B8, 0, 0}, 12454 {0x1B9, 0, 0}, 12455 {0x1BA, 0, 0}, 12456 {0x1BB, 0, 0}, 12457 {0x1BC, 0, 0}, 12458 {0x1BD, 0, 0}, 12459 {0x1BE, 0, 0}, 12460 {0x1BF, 0, 0}, 12461 {0x1C0, 0, 0}, 12462 {0x1C1, 0x1, 1}, 12463 {0x1C2, 0x80, 1}, 12464 {0x1C3, 0, 0}, 12465 {0x1C4, 0, 0}, 12466 {0x1C5, 0, 0}, 12467 {0x1C6, 0, 0}, 12468 {0x1C7, 0, 0}, 12469 {0x1C8, 0, 0}, 12470 {0x1C9, 0, 0}, 12471 {0x1CA, 0, 0}, 12472 {0xFFFF, 0, 0} 12473 }; 12474 12475 static struct radio_20xx_regs regs_2057_rev7[] = { 12476 {0x00, 0, 1}, 12477 {0x01, 0x57, 1}, 12478 {0x02, 0x20, 1}, 12479 {0x03, 0x1f, 0}, 12480 {0x04, 0x4, 0}, 12481 {0x05, 0x2, 0}, 12482 {0x06, 0x1, 0}, 12483 {0x07, 0x1, 0}, 12484 {0x08, 0x1, 0}, 12485 {0x09, 0x69, 0}, 12486 {0x0A, 0x66, 0}, 12487 {0x0B, 0x6, 0}, 12488 {0x0C, 0x18, 0}, 12489 {0x0D, 0x3, 0}, 12490 {0x0E, 0x20, 0}, 12491 {0x0F, 0x20, 0}, 12492 {0x10, 0, 0}, 12493 {0x11, 0x7c, 0}, 12494 {0x12, 0x42, 0}, 12495 {0x13, 0xbd, 0}, 12496 {0x14, 0x7, 0}, 12497 {0x15, 0x87, 0}, 12498 {0x16, 0x8, 0}, 12499 {0x17, 0x17, 0}, 12500 {0x18, 0x7, 0}, 12501 {0x19, 0, 0}, 12502 {0x1A, 0x2, 0}, 12503 {0x1B, 0x13, 0}, 12504 {0x1C, 0x3e, 0}, 12505 {0x1D, 0x3e, 0}, 12506 {0x1E, 0x96, 0}, 12507 {0x1F, 0x4, 0}, 12508 {0x20, 0, 0}, 12509 {0x21, 0, 0}, 12510 {0x22, 0x17, 0}, 12511 {0x23, 0x6, 0}, 12512 {0x24, 0x1, 0}, 12513 {0x25, 0x6, 0}, 12514 {0x26, 0x4, 0}, 12515 {0x27, 0xd, 0}, 12516 {0x28, 0xd, 0}, 12517 {0x29, 0x30, 0}, 12518 {0x2A, 0x32, 0}, 12519 {0x2B, 0x8, 0}, 12520 {0x2C, 0x1c, 0}, 12521 {0x2D, 0x2, 0}, 12522 {0x2E, 0x4, 0}, 12523 {0x2F, 0x7f, 0}, 12524 {0x30, 0x27, 0}, 12525 {0x31, 0, 1}, 12526 {0x32, 0, 1}, 12527 {0x33, 0, 1}, 12528 {0x34, 0, 0}, 12529 {0x35, 0x20, 0}, 12530 {0x36, 0x18, 0}, 12531 {0x37, 0x7, 0}, 12532 {0x38, 0x66, 0}, 12533 {0x39, 0x66, 0}, 12534 {0x3A, 0x66, 0}, 12535 {0x3B, 0x66, 0}, 12536 {0x3C, 0xff, 0}, 12537 {0x3D, 0xff, 0}, 12538 {0x3E, 0xff, 0}, 12539 {0x3F, 0xff, 0}, 12540 {0x40, 0x16, 0}, 12541 {0x41, 0x7, 0}, 12542 {0x42, 0x19, 0}, 12543 {0x43, 0x7, 0}, 12544 {0x44, 0x6, 0}, 12545 {0x45, 0x3, 0}, 12546 {0x46, 0x1, 0}, 12547 {0x47, 0x7, 0}, 12548 {0x48, 0x33, 0}, 12549 {0x49, 0x5, 0}, 12550 {0x4A, 0x77, 0}, 12551 {0x4B, 0x66, 0}, 12552 {0x4C, 0x66, 0}, 12553 {0x4D, 0, 0}, 12554 {0x4E, 0x4, 0}, 12555 {0x4F, 0xc, 0}, 12556 {0x50, 0, 0}, 12557 {0x51, 0x70, 1}, 12558 {0x56, 0x7, 0}, 12559 {0x57, 0, 0}, 12560 {0x58, 0, 0}, 12561 {0x59, 0x88, 1}, 12562 {0x5A, 0, 0}, 12563 {0x5B, 0x1f, 0}, 12564 {0x5C, 0x20, 1}, 12565 {0x5D, 0x1, 0}, 12566 {0x5E, 0x30, 0}, 12567 {0x5F, 0x70, 0}, 12568 {0x60, 0, 0}, 12569 {0x61, 0, 0}, 12570 {0x62, 0x33, 1}, 12571 {0x63, 0xf, 1}, 12572 {0x64, 0x13, 1}, 12573 {0x65, 0, 0}, 12574 {0x66, 0xee, 1}, 12575 {0x69, 0, 0}, 12576 {0x6A, 0x7e, 0}, 12577 {0x6B, 0x3f, 0}, 12578 {0x6C, 0x7f, 0}, 12579 {0x6D, 0x78, 0}, 12580 {0x6E, 0x58, 1}, 12581 {0x6F, 0x88, 0}, 12582 {0x70, 0x8, 0}, 12583 {0x71, 0xf, 0}, 12584 {0x72, 0xbc, 0}, 12585 {0x73, 0x8, 0}, 12586 {0x74, 0x60, 0}, 12587 {0x75, 0x13, 1}, 12588 {0x76, 0x70, 0}, 12589 {0x77, 0, 0}, 12590 {0x78, 0, 0}, 12591 {0x79, 0, 0}, 12592 {0x7A, 0x33, 0}, 12593 {0x7B, 0x13, 1}, 12594 {0x7C, 0x14, 1}, 12595 {0x7D, 0xee, 1}, 12596 {0x80, 0x3c, 0}, 12597 {0x81, 0x1, 1}, 12598 {0x82, 0xa, 0}, 12599 {0x83, 0x9d, 0}, 12600 {0x84, 0xa, 0}, 12601 {0x85, 0, 0}, 12602 {0x86, 0x40, 0}, 12603 {0x87, 0x40, 0}, 12604 {0x88, 0x88, 0}, 12605 {0x89, 0x10, 0}, 12606 {0x8A, 0xf0, 0}, 12607 {0x8B, 0x10, 0}, 12608 {0x8C, 0xf0, 0}, 12609 {0x8D, 0, 0}, 12610 {0x8E, 0, 0}, 12611 {0x8F, 0x10, 0}, 12612 {0x90, 0x55, 0}, 12613 {0x91, 0x3f, 1}, 12614 {0x92, 0x36, 1}, 12615 {0x93, 0, 0}, 12616 {0x94, 0, 0}, 12617 {0x95, 0, 0}, 12618 {0x96, 0x87, 0}, 12619 {0x97, 0x11, 0}, 12620 {0x98, 0, 0}, 12621 {0x99, 0x33, 0}, 12622 {0x9A, 0x88, 0}, 12623 {0x9B, 0, 0}, 12624 {0x9C, 0x87, 0}, 12625 {0x9D, 0x11, 0}, 12626 {0x9E, 0, 0}, 12627 {0x9F, 0x33, 0}, 12628 {0xA0, 0x88, 0}, 12629 {0xA1, 0x20, 1}, 12630 {0xA2, 0x3f, 0}, 12631 {0xA3, 0x44, 0}, 12632 {0xA4, 0x8c, 0}, 12633 {0xA5, 0x6c, 0}, 12634 {0xA6, 0x22, 0}, 12635 {0xA7, 0xbe, 0}, 12636 {0xA8, 0x55, 0}, 12637 {0xAA, 0xc, 0}, 12638 {0xAB, 0xaa, 0}, 12639 {0xAC, 0x2, 0}, 12640 {0xAD, 0, 0}, 12641 {0xAE, 0x10, 0}, 12642 {0xAF, 0x1, 0}, 12643 {0xB0, 0, 0}, 12644 {0xB1, 0, 0}, 12645 {0xB2, 0x80, 0}, 12646 {0xB3, 0x60, 0}, 12647 {0xB4, 0x44, 0}, 12648 {0xB5, 0x55, 0}, 12649 {0xB6, 0x1, 0}, 12650 {0xB7, 0x55, 0}, 12651 {0xB8, 0x1, 0}, 12652 {0xB9, 0x5, 0}, 12653 {0xBA, 0x55, 0}, 12654 {0xBB, 0x55, 0}, 12655 {0xC1, 0, 0}, 12656 {0xC2, 0, 0}, 12657 {0xC3, 0, 0}, 12658 {0xC4, 0, 0}, 12659 {0xC5, 0, 0}, 12660 {0xC6, 0, 0}, 12661 {0xC7, 0, 0}, 12662 {0xC8, 0, 0}, 12663 {0xC9, 0, 0}, 12664 {0xCA, 0, 0}, 12665 {0xCB, 0, 0}, 12666 {0xCC, 0, 0}, 12667 {0xCD, 0, 0}, 12668 {0xCE, 0x5e, 0}, 12669 {0xCF, 0xc, 0}, 12670 {0xD0, 0xc, 0}, 12671 {0xD1, 0xc, 0}, 12672 {0xD2, 0, 0}, 12673 {0xD3, 0x2b, 0}, 12674 {0xD4, 0xc, 0}, 12675 {0xD5, 0, 0}, 12676 {0xD6, 0x70, 1}, 12677 {0xDB, 0x7, 0}, 12678 {0xDC, 0, 0}, 12679 {0xDD, 0, 0}, 12680 {0xDE, 0x88, 1}, 12681 {0xDF, 0, 0}, 12682 {0xE0, 0x1f, 0}, 12683 {0xE1, 0x20, 1}, 12684 {0xE2, 0x1, 0}, 12685 {0xE3, 0x30, 0}, 12686 {0xE4, 0x70, 0}, 12687 {0xE5, 0, 0}, 12688 {0xE6, 0, 0}, 12689 {0xE7, 0x33, 0}, 12690 {0xE8, 0xf, 1}, 12691 {0xE9, 0x13, 1}, 12692 {0xEA, 0, 0}, 12693 {0xEB, 0xee, 1}, 12694 {0xEE, 0, 0}, 12695 {0xEF, 0x7e, 0}, 12696 {0xF0, 0x3f, 0}, 12697 {0xF1, 0x7f, 0}, 12698 {0xF2, 0x78, 0}, 12699 {0xF3, 0x58, 1}, 12700 {0xF4, 0x88, 0}, 12701 {0xF5, 0x8, 0}, 12702 {0xF6, 0xf, 0}, 12703 {0xF7, 0xbc, 0}, 12704 {0xF8, 0x8, 0}, 12705 {0xF9, 0x60, 0}, 12706 {0xFA, 0x13, 1}, 12707 {0xFB, 0x70, 0}, 12708 {0xFC, 0, 0}, 12709 {0xFD, 0, 0}, 12710 {0xFE, 0, 0}, 12711 {0xFF, 0x33, 0}, 12712 {0x100, 0x13, 1}, 12713 {0x101, 0x14, 1}, 12714 {0x102, 0xee, 1}, 12715 {0x105, 0x3c, 0}, 12716 {0x106, 0x1, 1}, 12717 {0x107, 0xa, 0}, 12718 {0x108, 0x9d, 0}, 12719 {0x109, 0xa, 0}, 12720 {0x10A, 0, 0}, 12721 {0x10B, 0x40, 0}, 12722 {0x10C, 0x40, 0}, 12723 {0x10D, 0x88, 0}, 12724 {0x10E, 0x10, 0}, 12725 {0x10F, 0xf0, 0}, 12726 {0x110, 0x10, 0}, 12727 {0x111, 0xf0, 0}, 12728 {0x112, 0, 0}, 12729 {0x113, 0, 0}, 12730 {0x114, 0x10, 0}, 12731 {0x115, 0x55, 0}, 12732 {0x116, 0x3f, 1}, 12733 {0x117, 0x36, 1}, 12734 {0x118, 0, 0}, 12735 {0x119, 0, 0}, 12736 {0x11A, 0, 0}, 12737 {0x11B, 0x87, 0}, 12738 {0x11C, 0x11, 0}, 12739 {0x11D, 0, 0}, 12740 {0x11E, 0x33, 0}, 12741 {0x11F, 0x88, 0}, 12742 {0x120, 0, 0}, 12743 {0x121, 0x87, 0}, 12744 {0x122, 0x11, 0}, 12745 {0x123, 0, 0}, 12746 {0x124, 0x33, 0}, 12747 {0x125, 0x88, 0}, 12748 {0x126, 0x20, 1}, 12749 {0x127, 0x3f, 0}, 12750 {0x128, 0x44, 0}, 12751 {0x129, 0x8c, 0}, 12752 {0x12A, 0x6c, 0}, 12753 {0x12B, 0x22, 0}, 12754 {0x12C, 0xbe, 0}, 12755 {0x12D, 0x55, 0}, 12756 {0x12F, 0xc, 0}, 12757 {0x130, 0xaa, 0}, 12758 {0x131, 0x2, 0}, 12759 {0x132, 0, 0}, 12760 {0x133, 0x10, 0}, 12761 {0x134, 0x1, 0}, 12762 {0x135, 0, 0}, 12763 {0x136, 0, 0}, 12764 {0x137, 0x80, 0}, 12765 {0x138, 0x60, 0}, 12766 {0x139, 0x44, 0}, 12767 {0x13A, 0x55, 0}, 12768 {0x13B, 0x1, 0}, 12769 {0x13C, 0x55, 0}, 12770 {0x13D, 0x1, 0}, 12771 {0x13E, 0x5, 0}, 12772 {0x13F, 0x55, 0}, 12773 {0x140, 0x55, 0}, 12774 {0x146, 0, 0}, 12775 {0x147, 0, 0}, 12776 {0x148, 0, 0}, 12777 {0x149, 0, 0}, 12778 {0x14A, 0, 0}, 12779 {0x14B, 0, 0}, 12780 {0x14C, 0, 0}, 12781 {0x14D, 0, 0}, 12782 {0x14E, 0, 0}, 12783 {0x14F, 0, 0}, 12784 {0x150, 0, 0}, 12785 {0x151, 0, 0}, 12786 {0x154, 0xc, 0}, 12787 {0x155, 0xc, 0}, 12788 {0x156, 0xc, 0}, 12789 {0x157, 0, 0}, 12790 {0x158, 0x2b, 0}, 12791 {0x159, 0x84, 0}, 12792 {0x15A, 0x15, 0}, 12793 {0x15B, 0xf, 0}, 12794 {0x15C, 0, 0}, 12795 {0x15D, 0, 0}, 12796 {0x15E, 0, 1}, 12797 {0x15F, 0, 1}, 12798 {0x160, 0, 1}, 12799 {0x161, 0, 1}, 12800 {0x162, 0, 1}, 12801 {0x163, 0, 1}, 12802 {0x164, 0, 0}, 12803 {0x165, 0, 0}, 12804 {0x166, 0, 0}, 12805 {0x167, 0, 0}, 12806 {0x168, 0, 0}, 12807 {0x169, 0, 0}, 12808 {0x16A, 0, 1}, 12809 {0x16B, 0, 1}, 12810 {0x16C, 0, 1}, 12811 {0x16D, 0, 0}, 12812 {0x170, 0, 0}, 12813 {0x171, 0x77, 0}, 12814 {0x172, 0x77, 0}, 12815 {0x173, 0x77, 0}, 12816 {0x174, 0x77, 0}, 12817 {0x175, 0, 0}, 12818 {0x176, 0x3, 0}, 12819 {0x177, 0x37, 0}, 12820 {0x178, 0x3, 0}, 12821 {0x179, 0, 0}, 12822 {0x17A, 0x21, 0}, 12823 {0x17B, 0x21, 0}, 12824 {0x17C, 0, 0}, 12825 {0x17D, 0xaa, 0}, 12826 {0x17E, 0, 0}, 12827 {0x17F, 0xaa, 0}, 12828 {0x180, 0, 0}, 12829 {0x190, 0, 0}, 12830 {0x191, 0x77, 0}, 12831 {0x192, 0x77, 0}, 12832 {0x193, 0x77, 0}, 12833 {0x194, 0x77, 0}, 12834 {0x195, 0, 0}, 12835 {0x196, 0x3, 0}, 12836 {0x197, 0x37, 0}, 12837 {0x198, 0x3, 0}, 12838 {0x199, 0, 0}, 12839 {0x19A, 0x21, 0}, 12840 {0x19B, 0x21, 0}, 12841 {0x19C, 0, 0}, 12842 {0x19D, 0xaa, 0}, 12843 {0x19E, 0, 0}, 12844 {0x19F, 0xaa, 0}, 12845 {0x1A0, 0, 0}, 12846 {0x1A1, 0x2, 0}, 12847 {0x1A2, 0xf, 0}, 12848 {0x1A3, 0xf, 0}, 12849 {0x1A4, 0, 1}, 12850 {0x1A5, 0, 1}, 12851 {0x1A6, 0, 1}, 12852 {0x1A7, 0x2, 0}, 12853 {0x1A8, 0xf, 0}, 12854 {0x1A9, 0xf, 0}, 12855 {0x1AA, 0, 1}, 12856 {0x1AB, 0, 1}, 12857 {0x1AC, 0, 1}, 12858 {0x1AD, 0x84, 0}, 12859 {0x1AE, 0x60, 0}, 12860 {0x1AF, 0x47, 0}, 12861 {0x1B0, 0x47, 0}, 12862 {0x1B1, 0, 0}, 12863 {0x1B2, 0, 0}, 12864 {0x1B3, 0, 0}, 12865 {0x1B4, 0, 0}, 12866 {0x1B5, 0, 0}, 12867 {0x1B6, 0, 0}, 12868 {0x1B7, 0x5, 1}, 12869 {0x1B8, 0, 0}, 12870 {0x1B9, 0, 0}, 12871 {0x1BA, 0, 0}, 12872 {0x1BB, 0, 0}, 12873 {0x1BC, 0, 0}, 12874 {0x1BD, 0, 0}, 12875 {0x1BE, 0, 0}, 12876 {0x1BF, 0, 0}, 12877 {0x1C0, 0, 0}, 12878 {0x1C1, 0, 0}, 12879 {0x1C2, 0xa0, 1}, 12880 {0x1C3, 0, 0}, 12881 {0x1C4, 0, 0}, 12882 {0x1C5, 0, 0}, 12883 {0x1C6, 0, 0}, 12884 {0x1C7, 0, 0}, 12885 {0x1C8, 0, 0}, 12886 {0x1C9, 0, 0}, 12887 {0x1CA, 0, 0}, 12888 {0xFFFF, 0, 0} 12889 }; 12890 12891 static struct radio_20xx_regs regs_2057_rev8[] = { 12892 {0x00, 0x8, 1}, 12893 {0x01, 0x57, 1}, 12894 {0x02, 0x20, 1}, 12895 {0x03, 0x1f, 0}, 12896 {0x04, 0x4, 0}, 12897 {0x05, 0x2, 0}, 12898 {0x06, 0x1, 0}, 12899 {0x07, 0x1, 0}, 12900 {0x08, 0x1, 0}, 12901 {0x09, 0x69, 0}, 12902 {0x0A, 0x66, 0}, 12903 {0x0B, 0x6, 0}, 12904 {0x0C, 0x18, 0}, 12905 {0x0D, 0x3, 0}, 12906 {0x0E, 0x20, 0}, 12907 {0x0F, 0x20, 0}, 12908 {0x10, 0, 0}, 12909 {0x11, 0x7c, 0}, 12910 {0x12, 0x42, 0}, 12911 {0x13, 0xbd, 0}, 12912 {0x14, 0x7, 0}, 12913 {0x15, 0x87, 0}, 12914 {0x16, 0x8, 0}, 12915 {0x17, 0x17, 0}, 12916 {0x18, 0x7, 0}, 12917 {0x19, 0, 0}, 12918 {0x1A, 0x2, 0}, 12919 {0x1B, 0x13, 0}, 12920 {0x1C, 0x3e, 0}, 12921 {0x1D, 0x3e, 0}, 12922 {0x1E, 0x96, 0}, 12923 {0x1F, 0x4, 0}, 12924 {0x20, 0, 0}, 12925 {0x21, 0, 0}, 12926 {0x22, 0x17, 0}, 12927 {0x23, 0x6, 0}, 12928 {0x24, 0x1, 0}, 12929 {0x25, 0x6, 0}, 12930 {0x26, 0x4, 0}, 12931 {0x27, 0xd, 0}, 12932 {0x28, 0xd, 0}, 12933 {0x29, 0x30, 0}, 12934 {0x2A, 0x32, 0}, 12935 {0x2B, 0x8, 0}, 12936 {0x2C, 0x1c, 0}, 12937 {0x2D, 0x2, 0}, 12938 {0x2E, 0x4, 0}, 12939 {0x2F, 0x7f, 0}, 12940 {0x30, 0x27, 0}, 12941 {0x31, 0, 1}, 12942 {0x32, 0, 1}, 12943 {0x33, 0, 1}, 12944 {0x34, 0, 0}, 12945 {0x35, 0x20, 0}, 12946 {0x36, 0x18, 0}, 12947 {0x37, 0x7, 0}, 12948 {0x38, 0x66, 0}, 12949 {0x39, 0x66, 0}, 12950 {0x3A, 0x66, 0}, 12951 {0x3B, 0x66, 0}, 12952 {0x3C, 0xff, 0}, 12953 {0x3D, 0xff, 0}, 12954 {0x3E, 0xff, 0}, 12955 {0x3F, 0xff, 0}, 12956 {0x40, 0x16, 0}, 12957 {0x41, 0x7, 0}, 12958 {0x42, 0x19, 0}, 12959 {0x43, 0x7, 0}, 12960 {0x44, 0x6, 0}, 12961 {0x45, 0x3, 0}, 12962 {0x46, 0x1, 0}, 12963 {0x47, 0x7, 0}, 12964 {0x48, 0x33, 0}, 12965 {0x49, 0x5, 0}, 12966 {0x4A, 0x77, 0}, 12967 {0x4B, 0x66, 0}, 12968 {0x4C, 0x66, 0}, 12969 {0x4D, 0, 0}, 12970 {0x4E, 0x4, 0}, 12971 {0x4F, 0xc, 0}, 12972 {0x50, 0, 0}, 12973 {0x51, 0x70, 1}, 12974 {0x56, 0x7, 0}, 12975 {0x57, 0, 0}, 12976 {0x58, 0, 0}, 12977 {0x59, 0x88, 1}, 12978 {0x5A, 0, 0}, 12979 {0x5B, 0x1f, 0}, 12980 {0x5C, 0x20, 1}, 12981 {0x5D, 0x1, 0}, 12982 {0x5E, 0x30, 0}, 12983 {0x5F, 0x70, 0}, 12984 {0x60, 0, 0}, 12985 {0x61, 0, 0}, 12986 {0x62, 0x33, 1}, 12987 {0x63, 0xf, 1}, 12988 {0x64, 0xf, 1}, 12989 {0x65, 0, 0}, 12990 {0x66, 0x11, 0}, 12991 {0x69, 0, 0}, 12992 {0x6A, 0x7e, 0}, 12993 {0x6B, 0x3f, 0}, 12994 {0x6C, 0x7f, 0}, 12995 {0x6D, 0x78, 0}, 12996 {0x6E, 0x58, 1}, 12997 {0x6F, 0x88, 0}, 12998 {0x70, 0x8, 0}, 12999 {0x71, 0xf, 0}, 13000 {0x72, 0xbc, 0}, 13001 {0x73, 0x8, 0}, 13002 {0x74, 0x60, 0}, 13003 {0x75, 0x13, 1}, 13004 {0x76, 0x70, 0}, 13005 {0x77, 0, 0}, 13006 {0x78, 0, 0}, 13007 {0x79, 0, 0}, 13008 {0x7A, 0x33, 0}, 13009 {0x7B, 0x13, 1}, 13010 {0x7C, 0xf, 1}, 13011 {0x7D, 0xee, 1}, 13012 {0x80, 0x3c, 0}, 13013 {0x81, 0x1, 1}, 13014 {0x82, 0xa, 0}, 13015 {0x83, 0x9d, 0}, 13016 {0x84, 0xa, 0}, 13017 {0x85, 0, 0}, 13018 {0x86, 0x40, 0}, 13019 {0x87, 0x40, 0}, 13020 {0x88, 0x88, 0}, 13021 {0x89, 0x10, 0}, 13022 {0x8A, 0xf0, 0}, 13023 {0x8B, 0x10, 0}, 13024 {0x8C, 0xf0, 0}, 13025 {0x8D, 0, 0}, 13026 {0x8E, 0, 0}, 13027 {0x8F, 0x10, 0}, 13028 {0x90, 0x55, 0}, 13029 {0x91, 0x3f, 1}, 13030 {0x92, 0x36, 1}, 13031 {0x93, 0, 0}, 13032 {0x94, 0, 0}, 13033 {0x95, 0, 0}, 13034 {0x96, 0x87, 0}, 13035 {0x97, 0x11, 0}, 13036 {0x98, 0, 0}, 13037 {0x99, 0x33, 0}, 13038 {0x9A, 0x88, 0}, 13039 {0x9B, 0, 0}, 13040 {0x9C, 0x87, 0}, 13041 {0x9D, 0x11, 0}, 13042 {0x9E, 0, 0}, 13043 {0x9F, 0x33, 0}, 13044 {0xA0, 0x88, 0}, 13045 {0xA1, 0x20, 1}, 13046 {0xA2, 0x3f, 0}, 13047 {0xA3, 0x44, 0}, 13048 {0xA4, 0x8c, 0}, 13049 {0xA5, 0x6c, 0}, 13050 {0xA6, 0x22, 0}, 13051 {0xA7, 0xbe, 0}, 13052 {0xA8, 0x55, 0}, 13053 {0xAA, 0xc, 0}, 13054 {0xAB, 0xaa, 0}, 13055 {0xAC, 0x2, 0}, 13056 {0xAD, 0, 0}, 13057 {0xAE, 0x10, 0}, 13058 {0xAF, 0x1, 0}, 13059 {0xB0, 0, 0}, 13060 {0xB1, 0, 0}, 13061 {0xB2, 0x80, 0}, 13062 {0xB3, 0x60, 0}, 13063 {0xB4, 0x44, 0}, 13064 {0xB5, 0x55, 0}, 13065 {0xB6, 0x1, 0}, 13066 {0xB7, 0x55, 0}, 13067 {0xB8, 0x1, 0}, 13068 {0xB9, 0x5, 0}, 13069 {0xBA, 0x55, 0}, 13070 {0xBB, 0x55, 0}, 13071 {0xC1, 0, 0}, 13072 {0xC2, 0, 0}, 13073 {0xC3, 0, 0}, 13074 {0xC4, 0, 0}, 13075 {0xC5, 0, 0}, 13076 {0xC6, 0, 0}, 13077 {0xC7, 0, 0}, 13078 {0xC8, 0, 0}, 13079 {0xC9, 0x1, 1}, 13080 {0xCA, 0, 0}, 13081 {0xCB, 0, 0}, 13082 {0xCC, 0, 0}, 13083 {0xCD, 0, 0}, 13084 {0xCE, 0x5e, 0}, 13085 {0xCF, 0xc, 0}, 13086 {0xD0, 0xc, 0}, 13087 {0xD1, 0xc, 0}, 13088 {0xD2, 0, 0}, 13089 {0xD3, 0x2b, 0}, 13090 {0xD4, 0xc, 0}, 13091 {0xD5, 0, 0}, 13092 {0xD6, 0x70, 1}, 13093 {0xDB, 0x7, 0}, 13094 {0xDC, 0, 0}, 13095 {0xDD, 0, 0}, 13096 {0xDE, 0x88, 1}, 13097 {0xDF, 0, 0}, 13098 {0xE0, 0x1f, 0}, 13099 {0xE1, 0x20, 1}, 13100 {0xE2, 0x1, 0}, 13101 {0xE3, 0x30, 0}, 13102 {0xE4, 0x70, 0}, 13103 {0xE5, 0, 0}, 13104 {0xE6, 0, 0}, 13105 {0xE7, 0x33, 0}, 13106 {0xE8, 0xf, 1}, 13107 {0xE9, 0xf, 1}, 13108 {0xEA, 0, 0}, 13109 {0xEB, 0x11, 0}, 13110 {0xEE, 0, 0}, 13111 {0xEF, 0x7e, 0}, 13112 {0xF0, 0x3f, 0}, 13113 {0xF1, 0x7f, 0}, 13114 {0xF2, 0x78, 0}, 13115 {0xF3, 0x58, 1}, 13116 {0xF4, 0x88, 0}, 13117 {0xF5, 0x8, 0}, 13118 {0xF6, 0xf, 0}, 13119 {0xF7, 0xbc, 0}, 13120 {0xF8, 0x8, 0}, 13121 {0xF9, 0x60, 0}, 13122 {0xFA, 0x13, 1}, 13123 {0xFB, 0x70, 0}, 13124 {0xFC, 0, 0}, 13125 {0xFD, 0, 0}, 13126 {0xFE, 0, 0}, 13127 {0xFF, 0x33, 0}, 13128 {0x100, 0x13, 1}, 13129 {0x101, 0xf, 1}, 13130 {0x102, 0xee, 1}, 13131 {0x105, 0x3c, 0}, 13132 {0x106, 0x1, 1}, 13133 {0x107, 0xa, 0}, 13134 {0x108, 0x9d, 0}, 13135 {0x109, 0xa, 0}, 13136 {0x10A, 0, 0}, 13137 {0x10B, 0x40, 0}, 13138 {0x10C, 0x40, 0}, 13139 {0x10D, 0x88, 0}, 13140 {0x10E, 0x10, 0}, 13141 {0x10F, 0xf0, 0}, 13142 {0x110, 0x10, 0}, 13143 {0x111, 0xf0, 0}, 13144 {0x112, 0, 0}, 13145 {0x113, 0, 0}, 13146 {0x114, 0x10, 0}, 13147 {0x115, 0x55, 0}, 13148 {0x116, 0x3f, 1}, 13149 {0x117, 0x36, 1}, 13150 {0x118, 0, 0}, 13151 {0x119, 0, 0}, 13152 {0x11A, 0, 0}, 13153 {0x11B, 0x87, 0}, 13154 {0x11C, 0x11, 0}, 13155 {0x11D, 0, 0}, 13156 {0x11E, 0x33, 0}, 13157 {0x11F, 0x88, 0}, 13158 {0x120, 0, 0}, 13159 {0x121, 0x87, 0}, 13160 {0x122, 0x11, 0}, 13161 {0x123, 0, 0}, 13162 {0x124, 0x33, 0}, 13163 {0x125, 0x88, 0}, 13164 {0x126, 0x20, 1}, 13165 {0x127, 0x3f, 0}, 13166 {0x128, 0x44, 0}, 13167 {0x129, 0x8c, 0}, 13168 {0x12A, 0x6c, 0}, 13169 {0x12B, 0x22, 0}, 13170 {0x12C, 0xbe, 0}, 13171 {0x12D, 0x55, 0}, 13172 {0x12F, 0xc, 0}, 13173 {0x130, 0xaa, 0}, 13174 {0x131, 0x2, 0}, 13175 {0x132, 0, 0}, 13176 {0x133, 0x10, 0}, 13177 {0x134, 0x1, 0}, 13178 {0x135, 0, 0}, 13179 {0x136, 0, 0}, 13180 {0x137, 0x80, 0}, 13181 {0x138, 0x60, 0}, 13182 {0x139, 0x44, 0}, 13183 {0x13A, 0x55, 0}, 13184 {0x13B, 0x1, 0}, 13185 {0x13C, 0x55, 0}, 13186 {0x13D, 0x1, 0}, 13187 {0x13E, 0x5, 0}, 13188 {0x13F, 0x55, 0}, 13189 {0x140, 0x55, 0}, 13190 {0x146, 0, 0}, 13191 {0x147, 0, 0}, 13192 {0x148, 0, 0}, 13193 {0x149, 0, 0}, 13194 {0x14A, 0, 0}, 13195 {0x14B, 0, 0}, 13196 {0x14C, 0, 0}, 13197 {0x14D, 0, 0}, 13198 {0x14E, 0x1, 1}, 13199 {0x14F, 0, 0}, 13200 {0x150, 0, 0}, 13201 {0x151, 0, 0}, 13202 {0x154, 0xc, 0}, 13203 {0x155, 0xc, 0}, 13204 {0x156, 0xc, 0}, 13205 {0x157, 0, 0}, 13206 {0x158, 0x2b, 0}, 13207 {0x159, 0x84, 0}, 13208 {0x15A, 0x15, 0}, 13209 {0x15B, 0xf, 0}, 13210 {0x15C, 0, 0}, 13211 {0x15D, 0, 0}, 13212 {0x15E, 0, 1}, 13213 {0x15F, 0, 1}, 13214 {0x160, 0, 1}, 13215 {0x161, 0, 1}, 13216 {0x162, 0, 1}, 13217 {0x163, 0, 1}, 13218 {0x164, 0, 0}, 13219 {0x165, 0, 0}, 13220 {0x166, 0, 0}, 13221 {0x167, 0, 0}, 13222 {0x168, 0, 0}, 13223 {0x169, 0, 0}, 13224 {0x16A, 0, 1}, 13225 {0x16B, 0, 1}, 13226 {0x16C, 0, 1}, 13227 {0x16D, 0, 0}, 13228 {0x170, 0, 0}, 13229 {0x171, 0x77, 0}, 13230 {0x172, 0x77, 0}, 13231 {0x173, 0x77, 0}, 13232 {0x174, 0x77, 0}, 13233 {0x175, 0, 0}, 13234 {0x176, 0x3, 0}, 13235 {0x177, 0x37, 0}, 13236 {0x178, 0x3, 0}, 13237 {0x179, 0, 0}, 13238 {0x17A, 0x21, 0}, 13239 {0x17B, 0x21, 0}, 13240 {0x17C, 0, 0}, 13241 {0x17D, 0xaa, 0}, 13242 {0x17E, 0, 0}, 13243 {0x17F, 0xaa, 0}, 13244 {0x180, 0, 0}, 13245 {0x190, 0, 0}, 13246 {0x191, 0x77, 0}, 13247 {0x192, 0x77, 0}, 13248 {0x193, 0x77, 0}, 13249 {0x194, 0x77, 0}, 13250 {0x195, 0, 0}, 13251 {0x196, 0x3, 0}, 13252 {0x197, 0x37, 0}, 13253 {0x198, 0x3, 0}, 13254 {0x199, 0, 0}, 13255 {0x19A, 0x21, 0}, 13256 {0x19B, 0x21, 0}, 13257 {0x19C, 0, 0}, 13258 {0x19D, 0xaa, 0}, 13259 {0x19E, 0, 0}, 13260 {0x19F, 0xaa, 0}, 13261 {0x1A0, 0, 0}, 13262 {0x1A1, 0x2, 0}, 13263 {0x1A2, 0xf, 0}, 13264 {0x1A3, 0xf, 0}, 13265 {0x1A4, 0, 1}, 13266 {0x1A5, 0, 1}, 13267 {0x1A6, 0, 1}, 13268 {0x1A7, 0x2, 0}, 13269 {0x1A8, 0xf, 0}, 13270 {0x1A9, 0xf, 0}, 13271 {0x1AA, 0, 1}, 13272 {0x1AB, 0, 1}, 13273 {0x1AC, 0, 1}, 13274 {0x1AD, 0x84, 0}, 13275 {0x1AE, 0x60, 0}, 13276 {0x1AF, 0x47, 0}, 13277 {0x1B0, 0x47, 0}, 13278 {0x1B1, 0, 0}, 13279 {0x1B2, 0, 0}, 13280 {0x1B3, 0, 0}, 13281 {0x1B4, 0, 0}, 13282 {0x1B5, 0, 0}, 13283 {0x1B6, 0, 0}, 13284 {0x1B7, 0x5, 1}, 13285 {0x1B8, 0, 0}, 13286 {0x1B9, 0, 0}, 13287 {0x1BA, 0, 0}, 13288 {0x1BB, 0, 0}, 13289 {0x1BC, 0, 0}, 13290 {0x1BD, 0, 0}, 13291 {0x1BE, 0, 0}, 13292 {0x1BF, 0, 0}, 13293 {0x1C0, 0, 0}, 13294 {0x1C1, 0, 0}, 13295 {0x1C2, 0xa0, 1}, 13296 {0x1C3, 0, 0}, 13297 {0x1C4, 0, 0}, 13298 {0x1C5, 0, 0}, 13299 {0x1C6, 0, 0}, 13300 {0x1C7, 0, 0}, 13301 {0x1C8, 0, 0}, 13302 {0x1C9, 0, 0}, 13303 {0x1CA, 0, 0}, 13304 {0xFFFF, 0, 0} 13305 }; 13306 13307 static s16 nphy_def_lnagains[] = { -2, 10, 19, 25 }; 13308 13309 static s32 nphy_lnagain_est0[] = { -315, 40370 }; 13310 static s32 nphy_lnagain_est1[] = { -224, 23242 }; 13311 13312 static const u16 tbl_iqcal_gainparams_nphy[2][NPHY_IQCAL_NUMGAINS][8] = { 13313 { 13314 {0x000, 0, 0, 2, 0x69, 0x69, 0x69, 0x69}, 13315 {0x700, 7, 0, 0, 0x69, 0x69, 0x69, 0x69}, 13316 {0x710, 7, 1, 0, 0x68, 0x68, 0x68, 0x68}, 13317 {0x720, 7, 2, 0, 0x67, 0x67, 0x67, 0x67}, 13318 {0x730, 7, 3, 0, 0x66, 0x66, 0x66, 0x66}, 13319 {0x740, 7, 4, 0, 0x65, 0x65, 0x65, 0x65}, 13320 {0x741, 7, 4, 1, 0x65, 0x65, 0x65, 0x65}, 13321 {0x742, 7, 4, 2, 0x65, 0x65, 0x65, 0x65}, 13322 {0x743, 7, 4, 3, 0x65, 0x65, 0x65, 0x65} 13323 }, 13324 { 13325 {0x000, 7, 0, 0, 0x79, 0x79, 0x79, 0x79}, 13326 {0x700, 7, 0, 0, 0x79, 0x79, 0x79, 0x79}, 13327 {0x710, 7, 1, 0, 0x79, 0x79, 0x79, 0x79}, 13328 {0x720, 7, 2, 0, 0x78, 0x78, 0x78, 0x78}, 13329 {0x730, 7, 3, 0, 0x78, 0x78, 0x78, 0x78}, 13330 {0x740, 7, 4, 0, 0x78, 0x78, 0x78, 0x78}, 13331 {0x741, 7, 4, 1, 0x78, 0x78, 0x78, 0x78}, 13332 {0x742, 7, 4, 2, 0x78, 0x78, 0x78, 0x78}, 13333 {0x743, 7, 4, 3, 0x78, 0x78, 0x78, 0x78} 13334 } 13335 }; 13336 13337 static const u32 nphy_tpc_txgain[] = { 13338 0x03cc2b44, 0x03cc2b42, 0x03cc2a44, 0x03cc2a42, 13339 0x03cc2944, 0x03c82b44, 0x03c82b42, 0x03c82a44, 13340 0x03c82a42, 0x03c82944, 0x03c82942, 0x03c82844, 13341 0x03c82842, 0x03c42b44, 0x03c42b42, 0x03c42a44, 13342 0x03c42a42, 0x03c42944, 0x03c42942, 0x03c42844, 13343 0x03c42842, 0x03c42744, 0x03c42742, 0x03c42644, 13344 0x03c42642, 0x03c42544, 0x03c42542, 0x03c42444, 13345 0x03c42442, 0x03c02b44, 0x03c02b42, 0x03c02a44, 13346 0x03c02a42, 0x03c02944, 0x03c02942, 0x03c02844, 13347 0x03c02842, 0x03c02744, 0x03c02742, 0x03b02b44, 13348 0x03b02b42, 0x03b02a44, 0x03b02a42, 0x03b02944, 13349 0x03b02942, 0x03b02844, 0x03b02842, 0x03b02744, 13350 0x03b02742, 0x03b02644, 0x03b02642, 0x03b02544, 13351 0x03b02542, 0x03a02b44, 0x03a02b42, 0x03a02a44, 13352 0x03a02a42, 0x03a02944, 0x03a02942, 0x03a02844, 13353 0x03a02842, 0x03a02744, 0x03a02742, 0x03902b44, 13354 0x03902b42, 0x03902a44, 0x03902a42, 0x03902944, 13355 0x03902942, 0x03902844, 0x03902842, 0x03902744, 13356 0x03902742, 0x03902644, 0x03902642, 0x03902544, 13357 0x03902542, 0x03802b44, 0x03802b42, 0x03802a44, 13358 0x03802a42, 0x03802944, 0x03802942, 0x03802844, 13359 0x03802842, 0x03802744, 0x03802742, 0x03802644, 13360 0x03802642, 0x03802544, 0x03802542, 0x03802444, 13361 0x03802442, 0x03802344, 0x03802342, 0x03802244, 13362 0x03802242, 0x03802144, 0x03802142, 0x03802044, 13363 0x03802042, 0x03801f44, 0x03801f42, 0x03801e44, 13364 0x03801e42, 0x03801d44, 0x03801d42, 0x03801c44, 13365 0x03801c42, 0x03801b44, 0x03801b42, 0x03801a44, 13366 0x03801a42, 0x03801944, 0x03801942, 0x03801844, 13367 0x03801842, 0x03801744, 0x03801742, 0x03801644, 13368 0x03801642, 0x03801544, 0x03801542, 0x03801444, 13369 0x03801442, 0x03801344, 0x03801342, 0x00002b00 13370 }; 13371 13372 static const u16 nphy_tpc_loscale[] = { 13373 256, 256, 271, 271, 287, 256, 256, 271, 13374 271, 287, 287, 304, 304, 256, 256, 271, 13375 271, 287, 287, 304, 304, 322, 322, 341, 13376 341, 362, 362, 383, 383, 256, 256, 271, 13377 271, 287, 287, 304, 304, 322, 322, 256, 13378 256, 271, 271, 287, 287, 304, 304, 322, 13379 322, 341, 341, 362, 362, 256, 256, 271, 13380 271, 287, 287, 304, 304, 322, 322, 256, 13381 256, 271, 271, 287, 287, 304, 304, 322, 13382 322, 341, 341, 362, 362, 256, 256, 271, 13383 271, 287, 287, 304, 304, 322, 322, 341, 13384 341, 362, 362, 383, 383, 406, 406, 430, 13385 430, 455, 455, 482, 482, 511, 511, 541, 13386 541, 573, 573, 607, 607, 643, 643, 681, 13387 681, 722, 722, 764, 764, 810, 810, 858, 13388 858, 908, 908, 962, 962, 1019, 1019, 256 13389 }; 13390 13391 static u32 nphy_tpc_txgain_ipa[] = { 13392 0x5ff7002d, 0x5ff7002b, 0x5ff7002a, 0x5ff70029, 13393 0x5ff70028, 0x5ff70027, 0x5ff70026, 0x5ff70025, 13394 0x5ef7002d, 0x5ef7002b, 0x5ef7002a, 0x5ef70029, 13395 0x5ef70028, 0x5ef70027, 0x5ef70026, 0x5ef70025, 13396 0x5df7002d, 0x5df7002b, 0x5df7002a, 0x5df70029, 13397 0x5df70028, 0x5df70027, 0x5df70026, 0x5df70025, 13398 0x5cf7002d, 0x5cf7002b, 0x5cf7002a, 0x5cf70029, 13399 0x5cf70028, 0x5cf70027, 0x5cf70026, 0x5cf70025, 13400 0x5bf7002d, 0x5bf7002b, 0x5bf7002a, 0x5bf70029, 13401 0x5bf70028, 0x5bf70027, 0x5bf70026, 0x5bf70025, 13402 0x5af7002d, 0x5af7002b, 0x5af7002a, 0x5af70029, 13403 0x5af70028, 0x5af70027, 0x5af70026, 0x5af70025, 13404 0x59f7002d, 0x59f7002b, 0x59f7002a, 0x59f70029, 13405 0x59f70028, 0x59f70027, 0x59f70026, 0x59f70025, 13406 0x58f7002d, 0x58f7002b, 0x58f7002a, 0x58f70029, 13407 0x58f70028, 0x58f70027, 0x58f70026, 0x58f70025, 13408 0x57f7002d, 0x57f7002b, 0x57f7002a, 0x57f70029, 13409 0x57f70028, 0x57f70027, 0x57f70026, 0x57f70025, 13410 0x56f7002d, 0x56f7002b, 0x56f7002a, 0x56f70029, 13411 0x56f70028, 0x56f70027, 0x56f70026, 0x56f70025, 13412 0x55f7002d, 0x55f7002b, 0x55f7002a, 0x55f70029, 13413 0x55f70028, 0x55f70027, 0x55f70026, 0x55f70025, 13414 0x54f7002d, 0x54f7002b, 0x54f7002a, 0x54f70029, 13415 0x54f70028, 0x54f70027, 0x54f70026, 0x54f70025, 13416 0x53f7002d, 0x53f7002b, 0x53f7002a, 0x53f70029, 13417 0x53f70028, 0x53f70027, 0x53f70026, 0x53f70025, 13418 0x52f7002d, 0x52f7002b, 0x52f7002a, 0x52f70029, 13419 0x52f70028, 0x52f70027, 0x52f70026, 0x52f70025, 13420 0x51f7002d, 0x51f7002b, 0x51f7002a, 0x51f70029, 13421 0x51f70028, 0x51f70027, 0x51f70026, 0x51f70025, 13422 0x50f7002d, 0x50f7002b, 0x50f7002a, 0x50f70029, 13423 0x50f70028, 0x50f70027, 0x50f70026, 0x50f70025 13424 }; 13425 13426 static u32 nphy_tpc_txgain_ipa_rev5[] = { 13427 0x1ff7002d, 0x1ff7002b, 0x1ff7002a, 0x1ff70029, 13428 0x1ff70028, 0x1ff70027, 0x1ff70026, 0x1ff70025, 13429 0x1ef7002d, 0x1ef7002b, 0x1ef7002a, 0x1ef70029, 13430 0x1ef70028, 0x1ef70027, 0x1ef70026, 0x1ef70025, 13431 0x1df7002d, 0x1df7002b, 0x1df7002a, 0x1df70029, 13432 0x1df70028, 0x1df70027, 0x1df70026, 0x1df70025, 13433 0x1cf7002d, 0x1cf7002b, 0x1cf7002a, 0x1cf70029, 13434 0x1cf70028, 0x1cf70027, 0x1cf70026, 0x1cf70025, 13435 0x1bf7002d, 0x1bf7002b, 0x1bf7002a, 0x1bf70029, 13436 0x1bf70028, 0x1bf70027, 0x1bf70026, 0x1bf70025, 13437 0x1af7002d, 0x1af7002b, 0x1af7002a, 0x1af70029, 13438 0x1af70028, 0x1af70027, 0x1af70026, 0x1af70025, 13439 0x19f7002d, 0x19f7002b, 0x19f7002a, 0x19f70029, 13440 0x19f70028, 0x19f70027, 0x19f70026, 0x19f70025, 13441 0x18f7002d, 0x18f7002b, 0x18f7002a, 0x18f70029, 13442 0x18f70028, 0x18f70027, 0x18f70026, 0x18f70025, 13443 0x17f7002d, 0x17f7002b, 0x17f7002a, 0x17f70029, 13444 0x17f70028, 0x17f70027, 0x17f70026, 0x17f70025, 13445 0x16f7002d, 0x16f7002b, 0x16f7002a, 0x16f70029, 13446 0x16f70028, 0x16f70027, 0x16f70026, 0x16f70025, 13447 0x15f7002d, 0x15f7002b, 0x15f7002a, 0x15f70029, 13448 0x15f70028, 0x15f70027, 0x15f70026, 0x15f70025, 13449 0x14f7002d, 0x14f7002b, 0x14f7002a, 0x14f70029, 13450 0x14f70028, 0x14f70027, 0x14f70026, 0x14f70025, 13451 0x13f7002d, 0x13f7002b, 0x13f7002a, 0x13f70029, 13452 0x13f70028, 0x13f70027, 0x13f70026, 0x13f70025, 13453 0x12f7002d, 0x12f7002b, 0x12f7002a, 0x12f70029, 13454 0x12f70028, 0x12f70027, 0x12f70026, 0x12f70025, 13455 0x11f7002d, 0x11f7002b, 0x11f7002a, 0x11f70029, 13456 0x11f70028, 0x11f70027, 0x11f70026, 0x11f70025, 13457 0x10f7002d, 0x10f7002b, 0x10f7002a, 0x10f70029, 13458 0x10f70028, 0x10f70027, 0x10f70026, 0x10f70025 13459 }; 13460 13461 static u32 nphy_tpc_txgain_ipa_rev6[] = { 13462 0x0ff7002d, 0x0ff7002b, 0x0ff7002a, 0x0ff70029, 13463 0x0ff70028, 0x0ff70027, 0x0ff70026, 0x0ff70025, 13464 0x0ef7002d, 0x0ef7002b, 0x0ef7002a, 0x0ef70029, 13465 0x0ef70028, 0x0ef70027, 0x0ef70026, 0x0ef70025, 13466 0x0df7002d, 0x0df7002b, 0x0df7002a, 0x0df70029, 13467 0x0df70028, 0x0df70027, 0x0df70026, 0x0df70025, 13468 0x0cf7002d, 0x0cf7002b, 0x0cf7002a, 0x0cf70029, 13469 0x0cf70028, 0x0cf70027, 0x0cf70026, 0x0cf70025, 13470 0x0bf7002d, 0x0bf7002b, 0x0bf7002a, 0x0bf70029, 13471 0x0bf70028, 0x0bf70027, 0x0bf70026, 0x0bf70025, 13472 0x0af7002d, 0x0af7002b, 0x0af7002a, 0x0af70029, 13473 0x0af70028, 0x0af70027, 0x0af70026, 0x0af70025, 13474 0x09f7002d, 0x09f7002b, 0x09f7002a, 0x09f70029, 13475 0x09f70028, 0x09f70027, 0x09f70026, 0x09f70025, 13476 0x08f7002d, 0x08f7002b, 0x08f7002a, 0x08f70029, 13477 0x08f70028, 0x08f70027, 0x08f70026, 0x08f70025, 13478 0x07f7002d, 0x07f7002b, 0x07f7002a, 0x07f70029, 13479 0x07f70028, 0x07f70027, 0x07f70026, 0x07f70025, 13480 0x06f7002d, 0x06f7002b, 0x06f7002a, 0x06f70029, 13481 0x06f70028, 0x06f70027, 0x06f70026, 0x06f70025, 13482 0x05f7002d, 0x05f7002b, 0x05f7002a, 0x05f70029, 13483 0x05f70028, 0x05f70027, 0x05f70026, 0x05f70025, 13484 0x04f7002d, 0x04f7002b, 0x04f7002a, 0x04f70029, 13485 0x04f70028, 0x04f70027, 0x04f70026, 0x04f70025, 13486 0x03f7002d, 0x03f7002b, 0x03f7002a, 0x03f70029, 13487 0x03f70028, 0x03f70027, 0x03f70026, 0x03f70025, 13488 0x02f7002d, 0x02f7002b, 0x02f7002a, 0x02f70029, 13489 0x02f70028, 0x02f70027, 0x02f70026, 0x02f70025, 13490 0x01f7002d, 0x01f7002b, 0x01f7002a, 0x01f70029, 13491 0x01f70028, 0x01f70027, 0x01f70026, 0x01f70025, 13492 0x00f7002d, 0x00f7002b, 0x00f7002a, 0x00f70029, 13493 0x00f70028, 0x00f70027, 0x00f70026, 0x00f70025 13494 }; 13495 13496 static u32 nphy_tpc_txgain_ipa_2g_2057rev3[] = { 13497 0x70ff0040, 0x70f7003e, 0x70ef003b, 0x70e70039, 13498 0x70df0037, 0x70d70036, 0x70cf0033, 0x70c70032, 13499 0x70bf0031, 0x70b7002f, 0x70af002e, 0x70a7002d, 13500 0x709f002d, 0x7097002c, 0x708f002c, 0x7087002c, 13501 0x707f002b, 0x7077002c, 0x706f002c, 0x7067002d, 13502 0x705f002e, 0x705f002b, 0x705f0029, 0x7057002a, 13503 0x70570028, 0x704f002a, 0x7047002c, 0x7047002a, 13504 0x70470028, 0x70470026, 0x70470024, 0x70470022, 13505 0x7047001f, 0x70370027, 0x70370024, 0x70370022, 13506 0x70370020, 0x7037001f, 0x7037001d, 0x7037001b, 13507 0x7037001a, 0x70370018, 0x70370017, 0x7027001e, 13508 0x7027001d, 0x7027001a, 0x701f0024, 0x701f0022, 13509 0x701f0020, 0x701f001f, 0x701f001d, 0x701f001b, 13510 0x701f001a, 0x701f0018, 0x701f0017, 0x701f0015, 13511 0x701f0014, 0x701f0013, 0x701f0012, 0x701f0011, 13512 0x70170019, 0x70170018, 0x70170016, 0x70170015, 13513 0x70170014, 0x70170013, 0x70170012, 0x70170010, 13514 0x70170010, 0x7017000f, 0x700f001d, 0x700f001b, 13515 0x700f001a, 0x700f0018, 0x700f0017, 0x700f0015, 13516 0x700f0015, 0x700f0013, 0x700f0013, 0x700f0011, 13517 0x700f0010, 0x700f0010, 0x700f000f, 0x700f000e, 13518 0x700f000d, 0x700f000c, 0x700f000b, 0x700f000b, 13519 0x700f000b, 0x700f000a, 0x700f0009, 0x700f0009, 13520 0x700f0009, 0x700f0008, 0x700f0007, 0x700f0007, 13521 0x700f0006, 0x700f0006, 0x700f0006, 0x700f0006, 13522 0x700f0005, 0x700f0005, 0x700f0005, 0x700f0004, 13523 0x700f0004, 0x700f0004, 0x700f0004, 0x700f0004, 13524 0x700f0004, 0x700f0003, 0x700f0003, 0x700f0003, 13525 0x700f0003, 0x700f0002, 0x700f0002, 0x700f0002, 13526 0x700f0002, 0x700f0002, 0x700f0002, 0x700f0001, 13527 0x700f0001, 0x700f0001, 0x700f0001, 0x700f0001, 13528 0x700f0001, 0x700f0001, 0x700f0001, 0x700f0001 13529 }; 13530 13531 static u32 nphy_tpc_txgain_ipa_2g_2057rev4n6[] = { 13532 0xf0ff0040, 0xf0f7003e, 0xf0ef003b, 0xf0e70039, 13533 0xf0df0037, 0xf0d70036, 0xf0cf0033, 0xf0c70032, 13534 0xf0bf0031, 0xf0b7002f, 0xf0af002e, 0xf0a7002d, 13535 0xf09f002d, 0xf097002c, 0xf08f002c, 0xf087002c, 13536 0xf07f002b, 0xf077002c, 0xf06f002c, 0xf067002d, 13537 0xf05f002e, 0xf05f002b, 0xf05f0029, 0xf057002a, 13538 0xf0570028, 0xf04f002a, 0xf047002c, 0xf047002a, 13539 0xf0470028, 0xf0470026, 0xf0470024, 0xf0470022, 13540 0xf047001f, 0xf0370027, 0xf0370024, 0xf0370022, 13541 0xf0370020, 0xf037001f, 0xf037001d, 0xf037001b, 13542 0xf037001a, 0xf0370018, 0xf0370017, 0xf027001e, 13543 0xf027001d, 0xf027001a, 0xf01f0024, 0xf01f0022, 13544 0xf01f0020, 0xf01f001f, 0xf01f001d, 0xf01f001b, 13545 0xf01f001a, 0xf01f0018, 0xf01f0017, 0xf01f0015, 13546 0xf01f0014, 0xf01f0013, 0xf01f0012, 0xf01f0011, 13547 0xf0170019, 0xf0170018, 0xf0170016, 0xf0170015, 13548 0xf0170014, 0xf0170013, 0xf0170012, 0xf0170010, 13549 0xf0170010, 0xf017000f, 0xf00f001d, 0xf00f001b, 13550 0xf00f001a, 0xf00f0018, 0xf00f0017, 0xf00f0015, 13551 0xf00f0015, 0xf00f0013, 0xf00f0013, 0xf00f0011, 13552 0xf00f0010, 0xf00f0010, 0xf00f000f, 0xf00f000e, 13553 0xf00f000d, 0xf00f000c, 0xf00f000b, 0xf00f000b, 13554 0xf00f000b, 0xf00f000a, 0xf00f0009, 0xf00f0009, 13555 0xf00f0009, 0xf00f0008, 0xf00f0007, 0xf00f0007, 13556 0xf00f0006, 0xf00f0006, 0xf00f0006, 0xf00f0006, 13557 0xf00f0005, 0xf00f0005, 0xf00f0005, 0xf00f0004, 13558 0xf00f0004, 0xf00f0004, 0xf00f0004, 0xf00f0004, 13559 0xf00f0004, 0xf00f0003, 0xf00f0003, 0xf00f0003, 13560 0xf00f0003, 0xf00f0002, 0xf00f0002, 0xf00f0002, 13561 0xf00f0002, 0xf00f0002, 0xf00f0002, 0xf00f0001, 13562 0xf00f0001, 0xf00f0001, 0xf00f0001, 0xf00f0001, 13563 0xf00f0001, 0xf00f0001, 0xf00f0001, 0xf00f0001 13564 }; 13565 13566 static u32 nphy_tpc_txgain_ipa_2g_2057rev5[] = { 13567 0x30ff0031, 0x30e70031, 0x30e7002e, 0x30cf002e, 13568 0x30bf002e, 0x30af002e, 0x309f002f, 0x307f0033, 13569 0x307f0031, 0x307f002e, 0x3077002e, 0x306f002e, 13570 0x3067002e, 0x305f002f, 0x30570030, 0x3057002d, 13571 0x304f002e, 0x30470031, 0x3047002e, 0x3047002c, 13572 0x30470029, 0x303f002c, 0x303f0029, 0x3037002d, 13573 0x3037002a, 0x30370028, 0x302f002c, 0x302f002a, 13574 0x302f0028, 0x302f0026, 0x3027002c, 0x30270029, 13575 0x30270027, 0x30270025, 0x30270023, 0x301f002c, 13576 0x301f002a, 0x301f0028, 0x301f0025, 0x301f0024, 13577 0x301f0022, 0x301f001f, 0x3017002d, 0x3017002b, 13578 0x30170028, 0x30170026, 0x30170024, 0x30170022, 13579 0x30170020, 0x3017001e, 0x3017001d, 0x3017001b, 13580 0x3017001a, 0x30170018, 0x30170017, 0x30170015, 13581 0x300f002c, 0x300f0029, 0x300f0027, 0x300f0024, 13582 0x300f0022, 0x300f0021, 0x300f001f, 0x300f001d, 13583 0x300f001b, 0x300f001a, 0x300f0018, 0x300f0017, 13584 0x300f0016, 0x300f0015, 0x300f0115, 0x300f0215, 13585 0x300f0315, 0x300f0415, 0x300f0515, 0x300f0615, 13586 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13587 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13588 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13589 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13590 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13591 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13592 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13593 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13594 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13595 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13596 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13597 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13598 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715 13599 }; 13600 13601 static u32 nphy_tpc_txgain_ipa_2g_2057rev7[] = { 13602 0x30ff0031, 0x30e70031, 0x30e7002e, 0x30cf002e, 13603 0x30bf002e, 0x30af002e, 0x309f002f, 0x307f0033, 13604 0x307f0031, 0x307f002e, 0x3077002e, 0x306f002e, 13605 0x3067002e, 0x305f002f, 0x30570030, 0x3057002d, 13606 0x304f002e, 0x30470031, 0x3047002e, 0x3047002c, 13607 0x30470029, 0x303f002c, 0x303f0029, 0x3037002d, 13608 0x3037002a, 0x30370028, 0x302f002c, 0x302f002a, 13609 0x302f0028, 0x302f0026, 0x3027002c, 0x30270029, 13610 0x30270027, 0x30270025, 0x30270023, 0x301f002c, 13611 0x301f002a, 0x301f0028, 0x301f0025, 0x301f0024, 13612 0x301f0022, 0x301f001f, 0x3017002d, 0x3017002b, 13613 0x30170028, 0x30170026, 0x30170024, 0x30170022, 13614 0x30170020, 0x3017001e, 0x3017001d, 0x3017001b, 13615 0x3017001a, 0x30170018, 0x30170017, 0x30170015, 13616 0x300f002c, 0x300f0029, 0x300f0027, 0x300f0024, 13617 0x300f0022, 0x300f0021, 0x300f001f, 0x300f001d, 13618 0x300f001b, 0x300f001a, 0x300f0018, 0x300f0017, 13619 0x300f0016, 0x300f0015, 0x300f0115, 0x300f0215, 13620 0x300f0315, 0x300f0415, 0x300f0515, 0x300f0615, 13621 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13622 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13623 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13624 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13625 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13626 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13627 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13628 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13629 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13630 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13631 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13632 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13633 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715 13634 }; 13635 13636 static u32 nphy_tpc_txgain_ipa_5g[] = { 13637 0x7ff70035, 0x7ff70033, 0x7ff70032, 0x7ff70031, 13638 0x7ff7002f, 0x7ff7002e, 0x7ff7002d, 0x7ff7002b, 13639 0x7ff7002a, 0x7ff70029, 0x7ff70028, 0x7ff70027, 13640 0x7ff70026, 0x7ff70024, 0x7ff70023, 0x7ff70022, 13641 0x7ef70028, 0x7ef70027, 0x7ef70026, 0x7ef70025, 13642 0x7ef70024, 0x7ef70023, 0x7df70028, 0x7df70027, 13643 0x7df70026, 0x7df70025, 0x7df70024, 0x7df70023, 13644 0x7df70022, 0x7cf70029, 0x7cf70028, 0x7cf70027, 13645 0x7cf70026, 0x7cf70025, 0x7cf70023, 0x7cf70022, 13646 0x7bf70029, 0x7bf70028, 0x7bf70026, 0x7bf70025, 13647 0x7bf70024, 0x7bf70023, 0x7bf70022, 0x7bf70021, 13648 0x7af70029, 0x7af70028, 0x7af70027, 0x7af70026, 13649 0x7af70025, 0x7af70024, 0x7af70023, 0x7af70022, 13650 0x79f70029, 0x79f70028, 0x79f70027, 0x79f70026, 13651 0x79f70025, 0x79f70024, 0x79f70023, 0x79f70022, 13652 0x78f70029, 0x78f70028, 0x78f70027, 0x78f70026, 13653 0x78f70025, 0x78f70024, 0x78f70023, 0x78f70022, 13654 0x77f70029, 0x77f70028, 0x77f70027, 0x77f70026, 13655 0x77f70025, 0x77f70024, 0x77f70023, 0x77f70022, 13656 0x76f70029, 0x76f70028, 0x76f70027, 0x76f70026, 13657 0x76f70024, 0x76f70023, 0x76f70022, 0x76f70021, 13658 0x75f70029, 0x75f70028, 0x75f70027, 0x75f70026, 13659 0x75f70025, 0x75f70024, 0x75f70023, 0x74f70029, 13660 0x74f70028, 0x74f70026, 0x74f70025, 0x74f70024, 13661 0x74f70023, 0x74f70022, 0x73f70029, 0x73f70027, 13662 0x73f70026, 0x73f70025, 0x73f70024, 0x73f70023, 13663 0x73f70022, 0x72f70028, 0x72f70027, 0x72f70026, 13664 0x72f70025, 0x72f70024, 0x72f70023, 0x72f70022, 13665 0x71f70028, 0x71f70027, 0x71f70026, 0x71f70025, 13666 0x71f70024, 0x71f70023, 0x70f70028, 0x70f70027, 13667 0x70f70026, 0x70f70024, 0x70f70023, 0x70f70022, 13668 0x70f70021, 0x70f70020, 0x70f70020, 0x70f7001f 13669 }; 13670 13671 static u32 nphy_tpc_txgain_ipa_5g_2057[] = { 13672 0x7f7f0044, 0x7f7f0040, 0x7f7f003c, 0x7f7f0039, 13673 0x7f7f0036, 0x7e7f003c, 0x7e7f0038, 0x7e7f0035, 13674 0x7d7f003c, 0x7d7f0039, 0x7d7f0036, 0x7d7f0033, 13675 0x7c7f003b, 0x7c7f0037, 0x7c7f0034, 0x7b7f003a, 13676 0x7b7f0036, 0x7b7f0033, 0x7a7f003c, 0x7a7f0039, 13677 0x7a7f0036, 0x7a7f0033, 0x797f003b, 0x797f0038, 13678 0x797f0035, 0x797f0032, 0x787f003b, 0x787f0038, 13679 0x787f0035, 0x787f0032, 0x777f003a, 0x777f0037, 13680 0x777f0034, 0x777f0031, 0x767f003a, 0x767f0036, 13681 0x767f0033, 0x767f0031, 0x757f003a, 0x757f0037, 13682 0x757f0034, 0x747f003c, 0x747f0039, 0x747f0036, 13683 0x747f0033, 0x737f003b, 0x737f0038, 0x737f0035, 13684 0x737f0032, 0x727f0039, 0x727f0036, 0x727f0033, 13685 0x727f0030, 0x717f003a, 0x717f0037, 0x717f0034, 13686 0x707f003b, 0x707f0038, 0x707f0035, 0x707f0032, 13687 0x707f002f, 0x707f002d, 0x707f002a, 0x707f0028, 13688 0x707f0025, 0x707f0023, 0x707f0021, 0x707f0020, 13689 0x707f001e, 0x707f001c, 0x707f001b, 0x707f0019, 13690 0x707f0018, 0x707f0016, 0x707f0015, 0x707f0014, 13691 0x707f0013, 0x707f0012, 0x707f0011, 0x707f0010, 13692 0x707f000f, 0x707f000e, 0x707f000d, 0x707f000d, 13693 0x707f000c, 0x707f000b, 0x707f000b, 0x707f000a, 13694 0x707f0009, 0x707f0009, 0x707f0008, 0x707f0008, 13695 0x707f0007, 0x707f0007, 0x707f0007, 0x707f0006, 13696 0x707f0006, 0x707f0006, 0x707f0005, 0x707f0005, 13697 0x707f0005, 0x707f0004, 0x707f0004, 0x707f0004, 13698 0x707f0004, 0x707f0004, 0x707f0003, 0x707f0003, 13699 0x707f0003, 0x707f0003, 0x707f0003, 0x707f0003, 13700 0x707f0002, 0x707f0002, 0x707f0002, 0x707f0002, 13701 0x707f0002, 0x707f0002, 0x707f0002, 0x707f0002, 13702 0x707f0001, 0x707f0001, 0x707f0001, 0x707f0001, 13703 0x707f0001, 0x707f0001, 0x707f0001, 0x707f0001 13704 }; 13705 13706 static u32 nphy_tpc_txgain_ipa_5g_2057rev7[] = { 13707 0x6f7f0031, 0x6f7f002e, 0x6f7f002c, 0x6f7f002a, 13708 0x6f7f0027, 0x6e7f002e, 0x6e7f002c, 0x6e7f002a, 13709 0x6d7f0030, 0x6d7f002d, 0x6d7f002a, 0x6d7f0028, 13710 0x6c7f0030, 0x6c7f002d, 0x6c7f002b, 0x6b7f002e, 13711 0x6b7f002c, 0x6b7f002a, 0x6b7f0027, 0x6a7f002e, 13712 0x6a7f002c, 0x6a7f002a, 0x697f0030, 0x697f002e, 13713 0x697f002b, 0x697f0029, 0x687f002f, 0x687f002d, 13714 0x687f002a, 0x687f0027, 0x677f002f, 0x677f002d, 13715 0x677f002a, 0x667f0031, 0x667f002e, 0x667f002c, 13716 0x667f002a, 0x657f0030, 0x657f002e, 0x657f002b, 13717 0x657f0029, 0x647f0030, 0x647f002d, 0x647f002b, 13718 0x647f0029, 0x637f002f, 0x637f002d, 0x637f002a, 13719 0x627f0030, 0x627f002d, 0x627f002b, 0x627f0029, 13720 0x617f0030, 0x617f002e, 0x617f002b, 0x617f0029, 13721 0x607f002f, 0x607f002d, 0x607f002a, 0x607f0027, 13722 0x607f0026, 0x607f0023, 0x607f0021, 0x607f0020, 13723 0x607f001e, 0x607f001c, 0x607f001a, 0x607f0019, 13724 0x607f0018, 0x607f0016, 0x607f0015, 0x607f0014, 13725 0x607f0012, 0x607f0012, 0x607f0011, 0x607f000f, 13726 0x607f000f, 0x607f000e, 0x607f000d, 0x607f000c, 13727 0x607f000c, 0x607f000b, 0x607f000b, 0x607f000a, 13728 0x607f0009, 0x607f0009, 0x607f0008, 0x607f0008, 13729 0x607f0008, 0x607f0007, 0x607f0007, 0x607f0006, 13730 0x607f0006, 0x607f0005, 0x607f0005, 0x607f0005, 13731 0x607f0005, 0x607f0005, 0x607f0004, 0x607f0004, 13732 0x607f0004, 0x607f0004, 0x607f0003, 0x607f0003, 13733 0x607f0003, 0x607f0003, 0x607f0002, 0x607f0002, 13734 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, 13735 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, 13736 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, 13737 0x607f0002, 0x607f0001, 0x607f0001, 0x607f0001, 13738 0x607f0001, 0x607f0001, 0x607f0001, 0x607f0001 13739 }; 13740 13741 static s8 nphy_papd_pga_gain_delta_ipa_2g[] = { 13742 -114, -108, -98, -91, -84, -78, -70, -62, 13743 -54, -46, -39, -31, -23, -15, -8, 0 13744 }; 13745 13746 static s8 nphy_papd_pga_gain_delta_ipa_5g[] = { 13747 -100, -95, -89, -83, -77, -70, -63, -56, 13748 -48, -41, -33, -25, -19, -12, -6, 0 13749 }; 13750 13751 static s16 nphy_papd_padgain_dlt_2g_2057rev3n4[] = { 13752 -159, -113, -86, -72, -62, -54, -48, -43, 13753 -39, -35, -31, -28, -25, -23, -20, -18, 13754 -17, -15, -13, -11, -10, -8, -7, -6, 13755 -5, -4, -3, -3, -2, -1, -1, 0 13756 }; 13757 13758 static s16 nphy_papd_padgain_dlt_2g_2057rev5[] = { 13759 -109, -109, -82, -68, -58, -50, -44, -39, 13760 -35, -31, -28, -26, -23, -21, -19, -17, 13761 -16, -14, -13, -11, -10, -9, -8, -7, 13762 -5, -5, -4, -3, -2, -1, -1, 0 13763 }; 13764 13765 static s16 nphy_papd_padgain_dlt_2g_2057rev7[] = { 13766 -122, -122, -95, -80, -69, -61, -54, -49, 13767 -43, -39, -35, -32, -28, -26, -23, -21, 13768 -18, -16, -15, -13, -11, -10, -8, -7, 13769 -6, -5, -4, -3, -2, -1, -1, 0 13770 }; 13771 13772 static s8 nphy_papd_pgagain_dlt_5g_2057[] = { 13773 -107, -101, -92, -85, -78, -71, -62, -55, 13774 -47, -39, -32, -24, -19, -12, -6, 0 13775 }; 13776 13777 static s8 nphy_papd_pgagain_dlt_5g_2057rev7[] = { 13778 -110, -104, -95, -88, -81, -74, -66, -58, 13779 -50, -44, -36, -28, -23, -15, -8, 0 13780 }; 13781 13782 static u8 pad_gain_codes_used_2057rev5[] = { 13783 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 13784 10, 9, 8, 7, 6, 5, 4, 3, 2, 1 13785 }; 13786 13787 static u8 pad_gain_codes_used_2057rev7[] = { 13788 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 13789 5, 4, 3, 2, 1 13790 }; 13791 13792 static u8 pad_all_gain_codes_2057[] = { 13793 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 13794 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 13795 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 13796 1, 0 13797 }; 13798 13799 static u8 pga_all_gain_codes_2057[] = { 13800 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 13801 }; 13802 13803 static u32 nphy_papd_scaltbl[] = { 13804 0x0ae2002f, 0x0a3b0032, 0x09a70035, 0x09220038, 13805 0x0887003c, 0x081f003f, 0x07a20043, 0x07340047, 13806 0x06d2004b, 0x067a004f, 0x06170054, 0x05bf0059, 13807 0x0571005e, 0x051e0064, 0x04d3006a, 0x04910070, 13808 0x044c0077, 0x040f007e, 0x03d90085, 0x03a1008d, 13809 0x036f0095, 0x033d009e, 0x030b00a8, 0x02e000b2, 13810 0x02b900bc, 0x029200c7, 0x026d00d3, 0x024900e0, 13811 0x022900ed, 0x020a00fb, 0x01ec010a, 0x01d0011a, 13812 0x01b7012a, 0x019e013c, 0x0187014f, 0x01720162, 13813 0x015d0177, 0x0149018e, 0x013701a5, 0x012601be, 13814 0x011501d9, 0x010501f5, 0x00f70212, 0x00e90232, 13815 0x00dc0253, 0x00d00276, 0x00c4029c, 0x00b902c3, 13816 0x00af02ed, 0x00a5031a, 0x009c0349, 0x0093037a, 13817 0x008b03af, 0x008303e7, 0x007c0422, 0x00750461, 13818 0x006e04a3, 0x006804ea, 0x00620534, 0x005d0583, 13819 0x005805d7, 0x0053062f, 0x004e068d, 0x004a06f1 13820 }; 13821 13822 static u32 nphy_tpc_txgain_rev3[] = { 13823 0x1f410044, 0x1f410042, 0x1f410040, 0x1f41003e, 13824 0x1f41003c, 0x1f41003b, 0x1f410039, 0x1f410037, 13825 0x1e410044, 0x1e410042, 0x1e410040, 0x1e41003e, 13826 0x1e41003c, 0x1e41003b, 0x1e410039, 0x1e410037, 13827 0x1d410044, 0x1d410042, 0x1d410040, 0x1d41003e, 13828 0x1d41003c, 0x1d41003b, 0x1d410039, 0x1d410037, 13829 0x1c410044, 0x1c410042, 0x1c410040, 0x1c41003e, 13830 0x1c41003c, 0x1c41003b, 0x1c410039, 0x1c410037, 13831 0x1b410044, 0x1b410042, 0x1b410040, 0x1b41003e, 13832 0x1b41003c, 0x1b41003b, 0x1b410039, 0x1b410037, 13833 0x1a410044, 0x1a410042, 0x1a410040, 0x1a41003e, 13834 0x1a41003c, 0x1a41003b, 0x1a410039, 0x1a410037, 13835 0x19410044, 0x19410042, 0x19410040, 0x1941003e, 13836 0x1941003c, 0x1941003b, 0x19410039, 0x19410037, 13837 0x18410044, 0x18410042, 0x18410040, 0x1841003e, 13838 0x1841003c, 0x1841003b, 0x18410039, 0x18410037, 13839 0x17410044, 0x17410042, 0x17410040, 0x1741003e, 13840 0x1741003c, 0x1741003b, 0x17410039, 0x17410037, 13841 0x16410044, 0x16410042, 0x16410040, 0x1641003e, 13842 0x1641003c, 0x1641003b, 0x16410039, 0x16410037, 13843 0x15410044, 0x15410042, 0x15410040, 0x1541003e, 13844 0x1541003c, 0x1541003b, 0x15410039, 0x15410037, 13845 0x14410044, 0x14410042, 0x14410040, 0x1441003e, 13846 0x1441003c, 0x1441003b, 0x14410039, 0x14410037, 13847 0x13410044, 0x13410042, 0x13410040, 0x1341003e, 13848 0x1341003c, 0x1341003b, 0x13410039, 0x13410037, 13849 0x12410044, 0x12410042, 0x12410040, 0x1241003e, 13850 0x1241003c, 0x1241003b, 0x12410039, 0x12410037, 13851 0x11410044, 0x11410042, 0x11410040, 0x1141003e, 13852 0x1141003c, 0x1141003b, 0x11410039, 0x11410037, 13853 0x10410044, 0x10410042, 0x10410040, 0x1041003e, 13854 0x1041003c, 0x1041003b, 0x10410039, 0x10410037 13855 }; 13856 13857 static u32 nphy_tpc_txgain_HiPwrEPA[] = { 13858 0x0f410044, 0x0f410042, 0x0f410040, 0x0f41003e, 13859 0x0f41003c, 0x0f41003b, 0x0f410039, 0x0f410037, 13860 0x0e410044, 0x0e410042, 0x0e410040, 0x0e41003e, 13861 0x0e41003c, 0x0e41003b, 0x0e410039, 0x0e410037, 13862 0x0d410044, 0x0d410042, 0x0d410040, 0x0d41003e, 13863 0x0d41003c, 0x0d41003b, 0x0d410039, 0x0d410037, 13864 0x0c410044, 0x0c410042, 0x0c410040, 0x0c41003e, 13865 0x0c41003c, 0x0c41003b, 0x0c410039, 0x0c410037, 13866 0x0b410044, 0x0b410042, 0x0b410040, 0x0b41003e, 13867 0x0b41003c, 0x0b41003b, 0x0b410039, 0x0b410037, 13868 0x0a410044, 0x0a410042, 0x0a410040, 0x0a41003e, 13869 0x0a41003c, 0x0a41003b, 0x0a410039, 0x0a410037, 13870 0x09410044, 0x09410042, 0x09410040, 0x0941003e, 13871 0x0941003c, 0x0941003b, 0x09410039, 0x09410037, 13872 0x08410044, 0x08410042, 0x08410040, 0x0841003e, 13873 0x0841003c, 0x0841003b, 0x08410039, 0x08410037, 13874 0x07410044, 0x07410042, 0x07410040, 0x0741003e, 13875 0x0741003c, 0x0741003b, 0x07410039, 0x07410037, 13876 0x06410044, 0x06410042, 0x06410040, 0x0641003e, 13877 0x0641003c, 0x0641003b, 0x06410039, 0x06410037, 13878 0x05410044, 0x05410042, 0x05410040, 0x0541003e, 13879 0x0541003c, 0x0541003b, 0x05410039, 0x05410037, 13880 0x04410044, 0x04410042, 0x04410040, 0x0441003e, 13881 0x0441003c, 0x0441003b, 0x04410039, 0x04410037, 13882 0x03410044, 0x03410042, 0x03410040, 0x0341003e, 13883 0x0341003c, 0x0341003b, 0x03410039, 0x03410037, 13884 0x02410044, 0x02410042, 0x02410040, 0x0241003e, 13885 0x0241003c, 0x0241003b, 0x02410039, 0x02410037, 13886 0x01410044, 0x01410042, 0x01410040, 0x0141003e, 13887 0x0141003c, 0x0141003b, 0x01410039, 0x01410037, 13888 0x00410044, 0x00410042, 0x00410040, 0x0041003e, 13889 0x0041003c, 0x0041003b, 0x00410039, 0x00410037 13890 }; 13891 13892 static u32 nphy_tpc_txgain_epa_2057rev3[] = { 13893 0x80f90040, 0x80e10040, 0x80e1003c, 0x80c9003d, 13894 0x80b9003c, 0x80a9003d, 0x80a1003c, 0x8099003b, 13895 0x8091003b, 0x8089003a, 0x8081003a, 0x80790039, 13896 0x80710039, 0x8069003a, 0x8061003b, 0x8059003d, 13897 0x8051003f, 0x80490042, 0x8049003e, 0x8049003b, 13898 0x8041003e, 0x8041003b, 0x8039003e, 0x8039003b, 13899 0x80390038, 0x80390035, 0x8031003a, 0x80310036, 13900 0x80310033, 0x8029003a, 0x80290037, 0x80290034, 13901 0x80290031, 0x80210039, 0x80210036, 0x80210033, 13902 0x80210030, 0x8019003c, 0x80190039, 0x80190036, 13903 0x80190033, 0x80190030, 0x8019002d, 0x8019002b, 13904 0x80190028, 0x8011003a, 0x80110036, 0x80110033, 13905 0x80110030, 0x8011002e, 0x8011002b, 0x80110029, 13906 0x80110027, 0x80110024, 0x80110022, 0x80110020, 13907 0x8011001f, 0x8011001d, 0x8009003a, 0x80090037, 13908 0x80090034, 0x80090031, 0x8009002e, 0x8009002c, 13909 0x80090029, 0x80090027, 0x80090025, 0x80090023, 13910 0x80090021, 0x8009001f, 0x8009001d, 0x8009011d, 13911 0x8009021d, 0x8009031d, 0x8009041d, 0x8009051d, 13912 0x8009061d, 0x8009071d, 0x8009071d, 0x8009071d, 13913 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13914 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13915 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13916 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13917 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13918 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13919 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13920 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13921 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13922 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13923 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13924 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d 13925 }; 13926 13927 static u32 nphy_tpc_txgain_epa_2057rev5[] = { 13928 0x10f90040, 0x10e10040, 0x10e1003c, 0x10c9003d, 13929 0x10b9003c, 0x10a9003d, 0x10a1003c, 0x1099003b, 13930 0x1091003b, 0x1089003a, 0x1081003a, 0x10790039, 13931 0x10710039, 0x1069003a, 0x1061003b, 0x1059003d, 13932 0x1051003f, 0x10490042, 0x1049003e, 0x1049003b, 13933 0x1041003e, 0x1041003b, 0x1039003e, 0x1039003b, 13934 0x10390038, 0x10390035, 0x1031003a, 0x10310036, 13935 0x10310033, 0x1029003a, 0x10290037, 0x10290034, 13936 0x10290031, 0x10210039, 0x10210036, 0x10210033, 13937 0x10210030, 0x1019003c, 0x10190039, 0x10190036, 13938 0x10190033, 0x10190030, 0x1019002d, 0x1019002b, 13939 0x10190028, 0x1011003a, 0x10110036, 0x10110033, 13940 0x10110030, 0x1011002e, 0x1011002b, 0x10110029, 13941 0x10110027, 0x10110024, 0x10110022, 0x10110020, 13942 0x1011001f, 0x1011001d, 0x1009003a, 0x10090037, 13943 0x10090034, 0x10090031, 0x1009002e, 0x1009002c, 13944 0x10090029, 0x10090027, 0x10090025, 0x10090023, 13945 0x10090021, 0x1009001f, 0x1009001d, 0x1009001b, 13946 0x1009001a, 0x10090018, 0x10090017, 0x10090016, 13947 0x10090015, 0x10090013, 0x10090012, 0x10090011, 13948 0x10090010, 0x1009000f, 0x1009000f, 0x1009000e, 13949 0x1009000d, 0x1009000c, 0x1009000c, 0x1009000b, 13950 0x1009000a, 0x1009000a, 0x10090009, 0x10090009, 13951 0x10090008, 0x10090008, 0x10090007, 0x10090007, 13952 0x10090007, 0x10090006, 0x10090006, 0x10090005, 13953 0x10090005, 0x10090005, 0x10090005, 0x10090004, 13954 0x10090004, 0x10090004, 0x10090004, 0x10090003, 13955 0x10090003, 0x10090003, 0x10090003, 0x10090003, 13956 0x10090003, 0x10090002, 0x10090002, 0x10090002, 13957 0x10090002, 0x10090002, 0x10090002, 0x10090002, 13958 0x10090002, 0x10090002, 0x10090001, 0x10090001, 13959 0x10090001, 0x10090001, 0x10090001, 0x10090001 13960 }; 13961 13962 static u32 nphy_tpc_5GHz_txgain_rev3[] = { 13963 0xcff70044, 0xcff70042, 0xcff70040, 0xcff7003e, 13964 0xcff7003c, 0xcff7003b, 0xcff70039, 0xcff70037, 13965 0xcef70044, 0xcef70042, 0xcef70040, 0xcef7003e, 13966 0xcef7003c, 0xcef7003b, 0xcef70039, 0xcef70037, 13967 0xcdf70044, 0xcdf70042, 0xcdf70040, 0xcdf7003e, 13968 0xcdf7003c, 0xcdf7003b, 0xcdf70039, 0xcdf70037, 13969 0xccf70044, 0xccf70042, 0xccf70040, 0xccf7003e, 13970 0xccf7003c, 0xccf7003b, 0xccf70039, 0xccf70037, 13971 0xcbf70044, 0xcbf70042, 0xcbf70040, 0xcbf7003e, 13972 0xcbf7003c, 0xcbf7003b, 0xcbf70039, 0xcbf70037, 13973 0xcaf70044, 0xcaf70042, 0xcaf70040, 0xcaf7003e, 13974 0xcaf7003c, 0xcaf7003b, 0xcaf70039, 0xcaf70037, 13975 0xc9f70044, 0xc9f70042, 0xc9f70040, 0xc9f7003e, 13976 0xc9f7003c, 0xc9f7003b, 0xc9f70039, 0xc9f70037, 13977 0xc8f70044, 0xc8f70042, 0xc8f70040, 0xc8f7003e, 13978 0xc8f7003c, 0xc8f7003b, 0xc8f70039, 0xc8f70037, 13979 0xc7f70044, 0xc7f70042, 0xc7f70040, 0xc7f7003e, 13980 0xc7f7003c, 0xc7f7003b, 0xc7f70039, 0xc7f70037, 13981 0xc6f70044, 0xc6f70042, 0xc6f70040, 0xc6f7003e, 13982 0xc6f7003c, 0xc6f7003b, 0xc6f70039, 0xc6f70037, 13983 0xc5f70044, 0xc5f70042, 0xc5f70040, 0xc5f7003e, 13984 0xc5f7003c, 0xc5f7003b, 0xc5f70039, 0xc5f70037, 13985 0xc4f70044, 0xc4f70042, 0xc4f70040, 0xc4f7003e, 13986 0xc4f7003c, 0xc4f7003b, 0xc4f70039, 0xc4f70037, 13987 0xc3f70044, 0xc3f70042, 0xc3f70040, 0xc3f7003e, 13988 0xc3f7003c, 0xc3f7003b, 0xc3f70039, 0xc3f70037, 13989 0xc2f70044, 0xc2f70042, 0xc2f70040, 0xc2f7003e, 13990 0xc2f7003c, 0xc2f7003b, 0xc2f70039, 0xc2f70037, 13991 0xc1f70044, 0xc1f70042, 0xc1f70040, 0xc1f7003e, 13992 0xc1f7003c, 0xc1f7003b, 0xc1f70039, 0xc1f70037, 13993 0xc0f70044, 0xc0f70042, 0xc0f70040, 0xc0f7003e, 13994 0xc0f7003c, 0xc0f7003b, 0xc0f70039, 0xc0f70037 13995 }; 13996 13997 static u32 nphy_tpc_5GHz_txgain_rev4[] = { 13998 0x2ff20044, 0x2ff20042, 0x2ff20040, 0x2ff2003e, 13999 0x2ff2003c, 0x2ff2003b, 0x2ff20039, 0x2ff20037, 14000 0x2ef20044, 0x2ef20042, 0x2ef20040, 0x2ef2003e, 14001 0x2ef2003c, 0x2ef2003b, 0x2ef20039, 0x2ef20037, 14002 0x2df20044, 0x2df20042, 0x2df20040, 0x2df2003e, 14003 0x2df2003c, 0x2df2003b, 0x2df20039, 0x2df20037, 14004 0x2cf20044, 0x2cf20042, 0x2cf20040, 0x2cf2003e, 14005 0x2cf2003c, 0x2cf2003b, 0x2cf20039, 0x2cf20037, 14006 0x2bf20044, 0x2bf20042, 0x2bf20040, 0x2bf2003e, 14007 0x2bf2003c, 0x2bf2003b, 0x2bf20039, 0x2bf20037, 14008 0x2af20044, 0x2af20042, 0x2af20040, 0x2af2003e, 14009 0x2af2003c, 0x2af2003b, 0x2af20039, 0x2af20037, 14010 0x29f20044, 0x29f20042, 0x29f20040, 0x29f2003e, 14011 0x29f2003c, 0x29f2003b, 0x29f20039, 0x29f20037, 14012 0x28f20044, 0x28f20042, 0x28f20040, 0x28f2003e, 14013 0x28f2003c, 0x28f2003b, 0x28f20039, 0x28f20037, 14014 0x27f20044, 0x27f20042, 0x27f20040, 0x27f2003e, 14015 0x27f2003c, 0x27f2003b, 0x27f20039, 0x27f20037, 14016 0x26f20044, 0x26f20042, 0x26f20040, 0x26f2003e, 14017 0x26f2003c, 0x26f2003b, 0x26f20039, 0x26f20037, 14018 0x25f20044, 0x25f20042, 0x25f20040, 0x25f2003e, 14019 0x25f2003c, 0x25f2003b, 0x25f20039, 0x25f20037, 14020 0x24f20044, 0x24f20042, 0x24f20040, 0x24f2003e, 14021 0x24f2003c, 0x24f2003b, 0x24f20039, 0x24f20038, 14022 0x23f20041, 0x23f20040, 0x23f2003f, 0x23f2003e, 14023 0x23f2003c, 0x23f2003b, 0x23f20039, 0x23f20037, 14024 0x22f20044, 0x22f20042, 0x22f20040, 0x22f2003e, 14025 0x22f2003c, 0x22f2003b, 0x22f20039, 0x22f20037, 14026 0x21f20044, 0x21f20042, 0x21f20040, 0x21f2003e, 14027 0x21f2003c, 0x21f2003b, 0x21f20039, 0x21f20037, 14028 0x20d20043, 0x20d20041, 0x20d2003e, 0x20d2003c, 14029 0x20d2003a, 0x20d20038, 0x20d20036, 0x20d20034 14030 }; 14031 14032 static u32 nphy_tpc_5GHz_txgain_rev5[] = { 14033 0x0f62004a, 0x0f620048, 0x0f620046, 0x0f620044, 14034 0x0f620042, 0x0f620040, 0x0f62003e, 0x0f62003c, 14035 0x0e620044, 0x0e620042, 0x0e620040, 0x0e62003e, 14036 0x0e62003c, 0x0e62003d, 0x0e62003b, 0x0e62003a, 14037 0x0d620043, 0x0d620041, 0x0d620040, 0x0d62003e, 14038 0x0d62003d, 0x0d62003c, 0x0d62003b, 0x0d62003a, 14039 0x0c620041, 0x0c620040, 0x0c62003f, 0x0c62003e, 14040 0x0c62003c, 0x0c62003b, 0x0c620039, 0x0c620037, 14041 0x0b620046, 0x0b620044, 0x0b620042, 0x0b620040, 14042 0x0b62003e, 0x0b62003c, 0x0b62003b, 0x0b62003a, 14043 0x0a620041, 0x0a620040, 0x0a62003e, 0x0a62003c, 14044 0x0a62003b, 0x0a62003a, 0x0a620039, 0x0a620038, 14045 0x0962003e, 0x0962003d, 0x0962003c, 0x0962003b, 14046 0x09620039, 0x09620037, 0x09620035, 0x09620033, 14047 0x08620044, 0x08620042, 0x08620040, 0x0862003e, 14048 0x0862003c, 0x0862003b, 0x0862003a, 0x08620039, 14049 0x07620043, 0x07620042, 0x07620040, 0x0762003f, 14050 0x0762003d, 0x0762003b, 0x0762003a, 0x07620039, 14051 0x0662003e, 0x0662003d, 0x0662003c, 0x0662003b, 14052 0x06620039, 0x06620037, 0x06620035, 0x06620033, 14053 0x05620046, 0x05620044, 0x05620042, 0x05620040, 14054 0x0562003e, 0x0562003c, 0x0562003b, 0x05620039, 14055 0x04620044, 0x04620042, 0x04620040, 0x0462003e, 14056 0x0462003c, 0x0462003b, 0x04620039, 0x04620038, 14057 0x0362003c, 0x0362003b, 0x0362003a, 0x03620039, 14058 0x03620038, 0x03620037, 0x03620035, 0x03620033, 14059 0x0262004c, 0x0262004a, 0x02620048, 0x02620047, 14060 0x02620046, 0x02620044, 0x02620043, 0x02620042, 14061 0x0162004a, 0x01620048, 0x01620046, 0x01620044, 14062 0x01620043, 0x01620042, 0x01620041, 0x01620040, 14063 0x00620042, 0x00620040, 0x0062003e, 0x0062003c, 14064 0x0062003b, 0x00620039, 0x00620037, 0x00620035 14065 }; 14066 14067 static u32 nphy_tpc_5GHz_txgain_HiPwrEPA[] = { 14068 0x2ff10044, 0x2ff10042, 0x2ff10040, 0x2ff1003e, 14069 0x2ff1003c, 0x2ff1003b, 0x2ff10039, 0x2ff10037, 14070 0x2ef10044, 0x2ef10042, 0x2ef10040, 0x2ef1003e, 14071 0x2ef1003c, 0x2ef1003b, 0x2ef10039, 0x2ef10037, 14072 0x2df10044, 0x2df10042, 0x2df10040, 0x2df1003e, 14073 0x2df1003c, 0x2df1003b, 0x2df10039, 0x2df10037, 14074 0x2cf10044, 0x2cf10042, 0x2cf10040, 0x2cf1003e, 14075 0x2cf1003c, 0x2cf1003b, 0x2cf10039, 0x2cf10037, 14076 0x2bf10044, 0x2bf10042, 0x2bf10040, 0x2bf1003e, 14077 0x2bf1003c, 0x2bf1003b, 0x2bf10039, 0x2bf10037, 14078 0x2af10044, 0x2af10042, 0x2af10040, 0x2af1003e, 14079 0x2af1003c, 0x2af1003b, 0x2af10039, 0x2af10037, 14080 0x29f10044, 0x29f10042, 0x29f10040, 0x29f1003e, 14081 0x29f1003c, 0x29f1003b, 0x29f10039, 0x29f10037, 14082 0x28f10044, 0x28f10042, 0x28f10040, 0x28f1003e, 14083 0x28f1003c, 0x28f1003b, 0x28f10039, 0x28f10037, 14084 0x27f10044, 0x27f10042, 0x27f10040, 0x27f1003e, 14085 0x27f1003c, 0x27f1003b, 0x27f10039, 0x27f10037, 14086 0x26f10044, 0x26f10042, 0x26f10040, 0x26f1003e, 14087 0x26f1003c, 0x26f1003b, 0x26f10039, 0x26f10037, 14088 0x25f10044, 0x25f10042, 0x25f10040, 0x25f1003e, 14089 0x25f1003c, 0x25f1003b, 0x25f10039, 0x25f10037, 14090 0x24f10044, 0x24f10042, 0x24f10040, 0x24f1003e, 14091 0x24f1003c, 0x24f1003b, 0x24f10039, 0x24f10038, 14092 0x23f10041, 0x23f10040, 0x23f1003f, 0x23f1003e, 14093 0x23f1003c, 0x23f1003b, 0x23f10039, 0x23f10037, 14094 0x22f10044, 0x22f10042, 0x22f10040, 0x22f1003e, 14095 0x22f1003c, 0x22f1003b, 0x22f10039, 0x22f10037, 14096 0x21f10044, 0x21f10042, 0x21f10040, 0x21f1003e, 14097 0x21f1003c, 0x21f1003b, 0x21f10039, 0x21f10037, 14098 0x20d10043, 0x20d10041, 0x20d1003e, 0x20d1003c, 14099 0x20d1003a, 0x20d10038, 0x20d10036, 0x20d10034 14100 }; 14101 14102 static u8 ant_sw_ctrl_tbl_rev8_2o3[] = { 0x14, 0x18 }; 14103 static u8 ant_sw_ctrl_tbl_rev8[] = { 0x4, 0x8, 0x4, 0x8, 0x11, 0x12 }; 14104 static u8 ant_sw_ctrl_tbl_rev8_2057v7_core0[] = { 14105 0x09, 0x0a, 0x15, 0x16, 0x09, 0x0a 14106 }; 14107 static u8 ant_sw_ctrl_tbl_rev8_2057v7_core1[] = { 14108 0x09, 0x0a, 0x09, 0x0a, 0x15, 0x16 14109 }; 14110 14111 bool wlc_phy_bist_check_phy(struct brcms_phy_pub *pih) 14112 { 14113 struct brcms_phy *pi = container_of(pih, struct brcms_phy, pubpi_ro); 14114 u32 phybist0, phybist1, phybist2, phybist3, phybist4; 14115 14116 if (NREV_GE(pi->pubpi.phy_rev, 16)) 14117 return true; 14118 14119 phybist0 = read_phy_reg(pi, 0x0e); 14120 phybist1 = read_phy_reg(pi, 0x0f); 14121 phybist2 = read_phy_reg(pi, 0xea); 14122 phybist3 = read_phy_reg(pi, 0xeb); 14123 phybist4 = read_phy_reg(pi, 0x156); 14124 14125 if ((phybist0 == 0) && (phybist1 == 0x4000) && (phybist2 == 0x1fe0) && 14126 (phybist3 == 0) && (phybist4 == 0)) 14127 return true; 14128 14129 return false; 14130 } 14131 14132 static void wlc_phy_bphy_init_nphy(struct brcms_phy *pi) 14133 { 14134 u16 addr, val; 14135 14136 val = 0x1e1f; 14137 for (addr = (NPHY_TO_BPHY_OFF + BPHY_RSSI_LUT); 14138 addr <= (NPHY_TO_BPHY_OFF + BPHY_RSSI_LUT_END); addr++) { 14139 write_phy_reg(pi, addr, val); 14140 if (addr == (NPHY_TO_BPHY_OFF + 0x97)) 14141 val = 0x3e3f; 14142 else 14143 val -= 0x0202; 14144 } 14145 14146 write_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_STEP, 0x668); 14147 } 14148 14149 void 14150 wlc_phy_table_write_nphy(struct brcms_phy *pi, u32 id, u32 len, u32 offset, 14151 u32 width, const void *data) 14152 { 14153 struct phytbl_info tbl; 14154 14155 tbl.tbl_id = id; 14156 tbl.tbl_len = len; 14157 tbl.tbl_offset = offset; 14158 tbl.tbl_width = width; 14159 tbl.tbl_ptr = data; 14160 wlc_phy_write_table_nphy(pi, &tbl); 14161 } 14162 14163 void 14164 wlc_phy_table_read_nphy(struct brcms_phy *pi, u32 id, u32 len, u32 offset, 14165 u32 width, void *data) 14166 { 14167 struct phytbl_info tbl; 14168 14169 tbl.tbl_id = id; 14170 tbl.tbl_len = len; 14171 tbl.tbl_offset = offset; 14172 tbl.tbl_width = width; 14173 tbl.tbl_ptr = data; 14174 wlc_phy_read_table_nphy(pi, &tbl); 14175 } 14176 14177 static void 14178 wlc_phy_static_table_download_nphy(struct brcms_phy *pi) 14179 { 14180 uint idx; 14181 14182 if (NREV_GE(pi->pubpi.phy_rev, 16)) { 14183 for (idx = 0; idx < mimophytbl_info_sz_rev16; idx++) 14184 wlc_phy_write_table_nphy(pi, 14185 &mimophytbl_info_rev16[idx]); 14186 } else if (NREV_GE(pi->pubpi.phy_rev, 7)) { 14187 for (idx = 0; idx < mimophytbl_info_sz_rev7; idx++) 14188 wlc_phy_write_table_nphy(pi, 14189 &mimophytbl_info_rev7[idx]); 14190 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 14191 for (idx = 0; idx < mimophytbl_info_sz_rev3; idx++) 14192 wlc_phy_write_table_nphy(pi, 14193 &mimophytbl_info_rev3[idx]); 14194 } else { 14195 for (idx = 0; idx < mimophytbl_info_sz_rev0; idx++) 14196 wlc_phy_write_table_nphy(pi, 14197 &mimophytbl_info_rev0[idx]); 14198 } 14199 } 14200 14201 static void wlc_phy_tbl_init_nphy(struct brcms_phy *pi) 14202 { 14203 uint idx = 0; 14204 u8 antswctrllut; 14205 14206 if (pi->phy_init_por) 14207 wlc_phy_static_table_download_nphy(pi); 14208 14209 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 14210 14211 antswctrllut = CHSPEC_IS2G(pi->radio_chanspec) ? 14212 pi->srom_fem2g.antswctrllut : pi->srom_fem5g. 14213 antswctrllut; 14214 14215 switch (antswctrllut) { 14216 case 0: 14217 14218 break; 14219 14220 case 1: 14221 14222 if (pi->aa2g == 7) 14223 wlc_phy_table_write_nphy( 14224 pi, 14225 NPHY_TBL_ID_ANTSWCTRLLUT, 14226 2, 0x21, 8, 14227 &ant_sw_ctrl_tbl_rev8_2o3[0]); 14228 else 14229 wlc_phy_table_write_nphy( 14230 pi, 14231 NPHY_TBL_ID_ANTSWCTRLLUT, 14232 2, 0x21, 8, 14233 &ant_sw_ctrl_tbl_rev8 14234 [0]); 14235 14236 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14237 2, 0x25, 8, 14238 &ant_sw_ctrl_tbl_rev8[2]); 14239 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14240 2, 0x29, 8, 14241 &ant_sw_ctrl_tbl_rev8[4]); 14242 break; 14243 14244 case 2: 14245 14246 wlc_phy_table_write_nphy( 14247 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14248 2, 0x1, 8, 14249 &ant_sw_ctrl_tbl_rev8_2057v7_core0[0]); 14250 wlc_phy_table_write_nphy( 14251 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14252 2, 0x5, 8, 14253 &ant_sw_ctrl_tbl_rev8_2057v7_core0[2]); 14254 wlc_phy_table_write_nphy( 14255 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14256 2, 0x9, 8, 14257 &ant_sw_ctrl_tbl_rev8_2057v7_core0[4]); 14258 14259 wlc_phy_table_write_nphy( 14260 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14261 2, 0x21, 8, 14262 &ant_sw_ctrl_tbl_rev8_2057v7_core1[0]); 14263 wlc_phy_table_write_nphy( 14264 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14265 2, 0x25, 8, 14266 &ant_sw_ctrl_tbl_rev8_2057v7_core1[2]); 14267 wlc_phy_table_write_nphy( 14268 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14269 2, 0x29, 8, 14270 &ant_sw_ctrl_tbl_rev8_2057v7_core1[4]); 14271 break; 14272 14273 default: 14274 break; 14275 } 14276 14277 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 14278 for (idx = 0; idx < mimophytbl_info_sz_rev3_volatile; idx++) { 14279 14280 if (idx == ANT_SWCTRL_TBL_REV3_IDX) { 14281 antswctrllut = 14282 CHSPEC_IS2G(pi->radio_chanspec) ? 14283 pi->srom_fem2g.antswctrllut : 14284 pi->srom_fem5g.antswctrllut; 14285 switch (antswctrllut) { 14286 case 0: 14287 wlc_phy_write_table_nphy( 14288 pi, 14289 &mimophytbl_info_rev3_volatile 14290 [idx]); 14291 break; 14292 case 1: 14293 wlc_phy_write_table_nphy( 14294 pi, 14295 &mimophytbl_info_rev3_volatile1 14296 [idx]); 14297 break; 14298 case 2: 14299 wlc_phy_write_table_nphy( 14300 pi, 14301 &mimophytbl_info_rev3_volatile2 14302 [idx]); 14303 break; 14304 case 3: 14305 wlc_phy_write_table_nphy( 14306 pi, 14307 &mimophytbl_info_rev3_volatile3 14308 [idx]); 14309 break; 14310 default: 14311 break; 14312 } 14313 } else { 14314 wlc_phy_write_table_nphy( 14315 pi, 14316 &mimophytbl_info_rev3_volatile[idx]); 14317 } 14318 } 14319 } else { 14320 for (idx = 0; idx < mimophytbl_info_sz_rev0_volatile; idx++) 14321 wlc_phy_write_table_nphy(pi, 14322 &mimophytbl_info_rev0_volatile 14323 [idx]); 14324 } 14325 } 14326 14327 static void 14328 wlc_phy_write_txmacreg_nphy(struct brcms_phy *pi, u16 holdoff, u16 delay) 14329 { 14330 write_phy_reg(pi, 0x77, holdoff); 14331 write_phy_reg(pi, 0xb4, delay); 14332 } 14333 14334 void wlc_phy_nphy_tkip_rifs_war(struct brcms_phy *pi, u8 rifs) 14335 { 14336 u16 holdoff, delay; 14337 14338 if (rifs) { 14339 14340 holdoff = 0x10; 14341 delay = 0x258; 14342 } else { 14343 14344 holdoff = 0x15; 14345 delay = 0x320; 14346 } 14347 14348 wlc_phy_write_txmacreg_nphy(pi, holdoff, delay); 14349 14350 if (pi->sh && (pi->sh->_rifs_phy != rifs)) 14351 pi->sh->_rifs_phy = rifs; 14352 } 14353 14354 static void wlc_phy_txpwrctrl_config_nphy(struct brcms_phy *pi) 14355 { 14356 14357 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 14358 pi->nphy_txpwrctrl = PHY_TPC_HW_ON; 14359 pi->phy_5g_pwrgain = true; 14360 return; 14361 } 14362 14363 pi->nphy_txpwrctrl = PHY_TPC_HW_OFF; 14364 pi->phy_5g_pwrgain = false; 14365 14366 if ((pi->sh->boardflags2 & BFL2_TXPWRCTRL_EN) && 14367 NREV_GE(pi->pubpi.phy_rev, 2) && (pi->sh->sromrev >= 4)) 14368 pi->nphy_txpwrctrl = PHY_TPC_HW_ON; 14369 else if ((pi->sh->sromrev >= 4) 14370 && (pi->sh->boardflags2 & BFL2_5G_PWRGAIN)) 14371 pi->phy_5g_pwrgain = true; 14372 } 14373 14374 static void wlc_phy_txpwr_srom_read_ppr_nphy(struct brcms_phy *pi) 14375 { 14376 u16 bw40po, cddpo, stbcpo, bwduppo; 14377 uint band_num; 14378 struct ssb_sprom *sprom = &pi->d11core->bus->sprom; 14379 14380 if (pi->sh->sromrev >= 9) 14381 return; 14382 14383 bw40po = sprom->bw40po; 14384 pi->bw402gpo = bw40po & 0xf; 14385 pi->bw405gpo = (bw40po & 0xf0) >> 4; 14386 pi->bw405glpo = (bw40po & 0xf00) >> 8; 14387 pi->bw405ghpo = (bw40po & 0xf000) >> 12; 14388 14389 cddpo = sprom->cddpo; 14390 pi->cdd2gpo = cddpo & 0xf; 14391 pi->cdd5gpo = (cddpo & 0xf0) >> 4; 14392 pi->cdd5glpo = (cddpo & 0xf00) >> 8; 14393 pi->cdd5ghpo = (cddpo & 0xf000) >> 12; 14394 14395 stbcpo = sprom->stbcpo; 14396 pi->stbc2gpo = stbcpo & 0xf; 14397 pi->stbc5gpo = (stbcpo & 0xf0) >> 4; 14398 pi->stbc5glpo = (stbcpo & 0xf00) >> 8; 14399 pi->stbc5ghpo = (stbcpo & 0xf000) >> 12; 14400 14401 bwduppo = sprom->bwduppo; 14402 pi->bwdup2gpo = bwduppo & 0xf; 14403 pi->bwdup5gpo = (bwduppo & 0xf0) >> 4; 14404 pi->bwdup5glpo = (bwduppo & 0xf00) >> 8; 14405 pi->bwdup5ghpo = (bwduppo & 0xf000) >> 12; 14406 14407 for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); 14408 band_num++) { 14409 switch (band_num) { 14410 case 0: 14411 pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_2g = 14412 sprom->core_pwr_info[0].maxpwr_2g; 14413 pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_2g = 14414 sprom->core_pwr_info[1].maxpwr_2g; 14415 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_a1 = 14416 sprom->core_pwr_info[0].pa_2g[0]; 14417 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_a1 = 14418 sprom->core_pwr_info[1].pa_2g[0]; 14419 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b0 = 14420 sprom->core_pwr_info[0].pa_2g[1]; 14421 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b0 = 14422 sprom->core_pwr_info[1].pa_2g[1]; 14423 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b1 = 14424 sprom->core_pwr_info[0].pa_2g[2]; 14425 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b1 = 14426 sprom->core_pwr_info[1].pa_2g[2]; 14427 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_2g = 14428 sprom->core_pwr_info[0].itssi_2g; 14429 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_2g = 14430 sprom->core_pwr_info[1].itssi_2g; 14431 14432 pi->cck2gpo = sprom->cck2gpo; 14433 14434 pi->ofdm2gpo = sprom->ofdm2gpo; 14435 14436 pi->mcs2gpo[0] = sprom->mcs2gpo[0]; 14437 pi->mcs2gpo[1] = sprom->mcs2gpo[1]; 14438 pi->mcs2gpo[2] = sprom->mcs2gpo[2]; 14439 pi->mcs2gpo[3] = sprom->mcs2gpo[3]; 14440 pi->mcs2gpo[4] = sprom->mcs2gpo[4]; 14441 pi->mcs2gpo[5] = sprom->mcs2gpo[5]; 14442 pi->mcs2gpo[6] = sprom->mcs2gpo[6]; 14443 pi->mcs2gpo[7] = sprom->mcs2gpo[7]; 14444 break; 14445 case 1: 14446 14447 pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_5gm = 14448 sprom->core_pwr_info[0].maxpwr_5g; 14449 pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_5gm = 14450 sprom->core_pwr_info[1].maxpwr_5g; 14451 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_a1 = 14452 sprom->core_pwr_info[0].pa_5g[0]; 14453 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_a1 = 14454 sprom->core_pwr_info[1].pa_5g[0]; 14455 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b0 = 14456 sprom->core_pwr_info[0].pa_5g[1]; 14457 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b0 = 14458 sprom->core_pwr_info[1].pa_5g[1]; 14459 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b1 = 14460 sprom->core_pwr_info[0].pa_5g[2]; 14461 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b1 = 14462 sprom->core_pwr_info[1].pa_5g[2]; 14463 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_5gm = 14464 sprom->core_pwr_info[0].itssi_5g; 14465 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_5gm = 14466 sprom->core_pwr_info[1].itssi_5g; 14467 14468 pi->ofdm5gpo = sprom->ofdm5gpo; 14469 14470 pi->mcs5gpo[0] = sprom->mcs5gpo[0]; 14471 pi->mcs5gpo[1] = sprom->mcs5gpo[1]; 14472 pi->mcs5gpo[2] = sprom->mcs5gpo[2]; 14473 pi->mcs5gpo[3] = sprom->mcs5gpo[3]; 14474 pi->mcs5gpo[4] = sprom->mcs5gpo[4]; 14475 pi->mcs5gpo[5] = sprom->mcs5gpo[5]; 14476 pi->mcs5gpo[6] = sprom->mcs5gpo[6]; 14477 pi->mcs5gpo[7] = sprom->mcs5gpo[7]; 14478 break; 14479 case 2: 14480 14481 pi->nphy_pwrctrl_info[0].max_pwr_5gl = 14482 sprom->core_pwr_info[0].maxpwr_5gl; 14483 pi->nphy_pwrctrl_info[1].max_pwr_5gl = 14484 sprom->core_pwr_info[1].maxpwr_5gl; 14485 pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1 = 14486 sprom->core_pwr_info[0].pa_5gl[0]; 14487 pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1 = 14488 sprom->core_pwr_info[1].pa_5gl[0]; 14489 pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0 = 14490 sprom->core_pwr_info[0].pa_5gl[1]; 14491 pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0 = 14492 sprom->core_pwr_info[1].pa_5gl[1]; 14493 pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1 = 14494 sprom->core_pwr_info[0].pa_5gl[2]; 14495 pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1 = 14496 sprom->core_pwr_info[1].pa_5gl[2]; 14497 pi->nphy_pwrctrl_info[0].idle_targ_5gl = 0; 14498 pi->nphy_pwrctrl_info[1].idle_targ_5gl = 0; 14499 14500 pi->ofdm5glpo = sprom->ofdm5glpo; 14501 14502 pi->mcs5glpo[0] = sprom->mcs5glpo[0]; 14503 pi->mcs5glpo[1] = sprom->mcs5glpo[1]; 14504 pi->mcs5glpo[2] = sprom->mcs5glpo[2]; 14505 pi->mcs5glpo[3] = sprom->mcs5glpo[3]; 14506 pi->mcs5glpo[4] = sprom->mcs5glpo[4]; 14507 pi->mcs5glpo[5] = sprom->mcs5glpo[5]; 14508 pi->mcs5glpo[6] = sprom->mcs5glpo[6]; 14509 pi->mcs5glpo[7] = sprom->mcs5glpo[7]; 14510 break; 14511 case 3: 14512 14513 pi->nphy_pwrctrl_info[0].max_pwr_5gh = 14514 sprom->core_pwr_info[0].maxpwr_5gh; 14515 pi->nphy_pwrctrl_info[1].max_pwr_5gh = 14516 sprom->core_pwr_info[1].maxpwr_5gh; 14517 pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1 = 14518 sprom->core_pwr_info[0].pa_5gh[0]; 14519 pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1 = 14520 sprom->core_pwr_info[1].pa_5gh[0]; 14521 pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0 = 14522 sprom->core_pwr_info[0].pa_5gh[1]; 14523 pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0 = 14524 sprom->core_pwr_info[1].pa_5gh[1]; 14525 pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1 = 14526 sprom->core_pwr_info[0].pa_5gh[2]; 14527 pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1 = 14528 sprom->core_pwr_info[1].pa_5gh[2]; 14529 pi->nphy_pwrctrl_info[0].idle_targ_5gh = 0; 14530 pi->nphy_pwrctrl_info[1].idle_targ_5gh = 0; 14531 14532 pi->ofdm5ghpo = sprom->ofdm5ghpo; 14533 14534 pi->mcs5ghpo[0] = sprom->mcs5ghpo[0]; 14535 pi->mcs5ghpo[1] = sprom->mcs5ghpo[1]; 14536 pi->mcs5ghpo[2] = sprom->mcs5ghpo[2]; 14537 pi->mcs5ghpo[3] = sprom->mcs5ghpo[3]; 14538 pi->mcs5ghpo[4] = sprom->mcs5ghpo[4]; 14539 pi->mcs5ghpo[5] = sprom->mcs5ghpo[5]; 14540 pi->mcs5ghpo[6] = sprom->mcs5ghpo[6]; 14541 pi->mcs5ghpo[7] = sprom->mcs5ghpo[7]; 14542 break; 14543 } 14544 } 14545 14546 wlc_phy_txpwr_apply_nphy(pi); 14547 } 14548 14549 static void wlc_phy_txpwr_srom_read_nphy(struct brcms_phy *pi) 14550 { 14551 struct ssb_sprom *sprom = &pi->d11core->bus->sprom; 14552 14553 pi->antswitch = sprom->antswitch; 14554 pi->aa2g = sprom->ant_available_bg; 14555 pi->aa5g = sprom->ant_available_a; 14556 14557 pi->srom_fem2g.tssipos = sprom->fem.ghz2.tssipos; 14558 pi->srom_fem2g.extpagain = sprom->fem.ghz2.extpa_gain; 14559 pi->srom_fem2g.pdetrange = sprom->fem.ghz2.pdet_range; 14560 pi->srom_fem2g.triso = sprom->fem.ghz2.tr_iso; 14561 pi->srom_fem2g.antswctrllut = sprom->fem.ghz2.antswlut; 14562 14563 pi->srom_fem5g.tssipos = sprom->fem.ghz5.tssipos; 14564 pi->srom_fem5g.extpagain = sprom->fem.ghz5.extpa_gain; 14565 pi->srom_fem5g.pdetrange = sprom->fem.ghz5.pdet_range; 14566 pi->srom_fem5g.triso = sprom->fem.ghz5.tr_iso; 14567 if (sprom->fem.ghz5.antswlut) 14568 pi->srom_fem5g.antswctrllut = sprom->fem.ghz5.antswlut; 14569 else 14570 pi->srom_fem5g.antswctrllut = sprom->fem.ghz2.antswlut; 14571 14572 wlc_phy_txpower_ipa_upd(pi); 14573 14574 pi->phy_txcore_disable_temp = sprom->tempthresh; 14575 if (pi->phy_txcore_disable_temp == 0) 14576 pi->phy_txcore_disable_temp = PHY_CHAIN_TX_DISABLE_TEMP; 14577 14578 pi->phy_tempsense_offset = sprom->tempoffset; 14579 if (pi->phy_tempsense_offset != 0) { 14580 if (pi->phy_tempsense_offset > 14581 (NPHY_SROM_TEMPSHIFT + NPHY_SROM_MAXTEMPOFFSET)) 14582 pi->phy_tempsense_offset = NPHY_SROM_MAXTEMPOFFSET; 14583 else if (pi->phy_tempsense_offset < (NPHY_SROM_TEMPSHIFT + 14584 NPHY_SROM_MINTEMPOFFSET)) 14585 pi->phy_tempsense_offset = NPHY_SROM_MINTEMPOFFSET; 14586 else 14587 pi->phy_tempsense_offset -= NPHY_SROM_TEMPSHIFT; 14588 } 14589 14590 pi->phy_txcore_enable_temp = 14591 pi->phy_txcore_disable_temp - PHY_HYSTERESIS_DELTATEMP; 14592 14593 pi->phycal_tempdelta = sprom->phycal_tempdelta; 14594 if (pi->phycal_tempdelta > NPHY_CAL_MAXTEMPDELTA) 14595 pi->phycal_tempdelta = 0; 14596 14597 wlc_phy_txpwr_srom_read_ppr_nphy(pi); 14598 } 14599 14600 void wlc_phy_attach_nphy(struct brcms_phy *pi) 14601 { 14602 uint i; 14603 14604 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 6)) 14605 pi->phyhang_avoid = true; 14606 14607 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 14608 pi->nphy_gband_spurwar_en = true; 14609 if (pi->sh->boardflags2 & BFL2_SPUR_WAR) 14610 pi->nphy_aband_spurwar_en = true; 14611 } 14612 if (NREV_GE(pi->pubpi.phy_rev, 6) && NREV_LT(pi->pubpi.phy_rev, 7)) { 14613 if (pi->sh->boardflags2 & BFL2_2G_SPUR_WAR) 14614 pi->nphy_gband_spurwar2_en = true; 14615 } 14616 14617 pi->n_preamble_override = AUTO; 14618 if (NREV_IS(pi->pubpi.phy_rev, 3) || NREV_IS(pi->pubpi.phy_rev, 4)) 14619 pi->n_preamble_override = BRCMS_N_PREAMBLE_MIXEDMODE; 14620 14621 pi->nphy_txrx_chain = AUTO; 14622 pi->phy_scraminit = AUTO; 14623 14624 pi->nphy_rxcalparams = 0x010100B5; 14625 14626 pi->nphy_perical = PHY_PERICAL_MPHASE; 14627 pi->mphase_cal_phase_id = MPHASE_CAL_STATE_IDLE; 14628 pi->mphase_txcal_numcmds = MPHASE_TXCAL_NUMCMDS; 14629 14630 pi->nphy_gain_boost = true; 14631 pi->nphy_elna_gain_config = false; 14632 pi->radio_is_on = false; 14633 14634 for (i = 0; i < pi->pubpi.phy_corenum; i++) 14635 pi->nphy_txpwrindex[i].index = AUTO; 14636 14637 wlc_phy_txpwrctrl_config_nphy(pi); 14638 if (pi->nphy_txpwrctrl == PHY_TPC_HW_ON) 14639 pi->hwpwrctrl_capable = true; 14640 14641 pi->pi_fptr.init = wlc_phy_init_nphy; 14642 pi->pi_fptr.calinit = wlc_phy_cal_init_nphy; 14643 pi->pi_fptr.chanset = wlc_phy_chanspec_set_nphy; 14644 pi->pi_fptr.txpwrrecalc = wlc_phy_txpower_recalc_target_nphy; 14645 14646 wlc_phy_txpwr_srom_read_nphy(pi); 14647 } 14648 14649 static s32 get_rf_pwr_offset(struct brcms_phy *pi, s16 pga_gn, s16 pad_gn) 14650 { 14651 s32 rfpwr_offset = 0; 14652 14653 if (CHSPEC_IS2G(pi->radio_chanspec)) { 14654 if ((pi->pubpi.radiorev == 3) || 14655 (pi->pubpi.radiorev == 4) || 14656 (pi->pubpi.radiorev == 6)) 14657 rfpwr_offset = (s16) 14658 nphy_papd_padgain_dlt_2g_2057rev3n4 14659 [pad_gn]; 14660 else if (pi->pubpi.radiorev == 5) 14661 rfpwr_offset = (s16) 14662 nphy_papd_padgain_dlt_2g_2057rev5 14663 [pad_gn]; 14664 else if ((pi->pubpi.radiorev == 7) 14665 || (pi->pubpi.radiorev == 14666 8)) 14667 rfpwr_offset = (s16) 14668 nphy_papd_padgain_dlt_2g_2057rev7 14669 [pad_gn]; 14670 } else { 14671 if ((pi->pubpi.radiorev == 3) || 14672 (pi->pubpi.radiorev == 4) || 14673 (pi->pubpi.radiorev == 6)) 14674 rfpwr_offset = (s16) 14675 nphy_papd_pgagain_dlt_5g_2057 14676 [pga_gn]; 14677 else if ((pi->pubpi.radiorev == 7) 14678 || (pi->pubpi.radiorev == 14679 8)) 14680 rfpwr_offset = (s16) 14681 nphy_papd_pgagain_dlt_5g_2057rev7 14682 [pga_gn]; 14683 } 14684 return rfpwr_offset; 14685 } 14686 14687 static void wlc_phy_update_mimoconfig_nphy(struct brcms_phy *pi, s32 preamble) 14688 { 14689 bool gf_preamble = false; 14690 u16 val; 14691 14692 if (preamble == BRCMS_N_PREAMBLE_GF) 14693 gf_preamble = true; 14694 14695 val = read_phy_reg(pi, 0xed); 14696 14697 val |= RX_GF_MM_AUTO; 14698 val &= ~RX_GF_OR_MM; 14699 if (gf_preamble) 14700 val |= RX_GF_OR_MM; 14701 14702 write_phy_reg(pi, 0xed, val); 14703 } 14704 14705 static void wlc_phy_ipa_set_tx_digi_filts_nphy(struct brcms_phy *pi) 14706 { 14707 int j, type; 14708 u16 addr_offset[] = { 0x186, 0x195, 0x2c5}; 14709 14710 for (type = 0; type < 3; type++) { 14711 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14712 write_phy_reg(pi, addr_offset[type] + j, 14713 NPHY_IPA_REV4_txdigi_filtcoeffs[type][j]); 14714 } 14715 14716 if (pi->bw == WL_CHANSPEC_BW_40) { 14717 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14718 write_phy_reg(pi, 0x186 + j, 14719 NPHY_IPA_REV4_txdigi_filtcoeffs[3][j]); 14720 } else { 14721 if (CHSPEC_IS5G(pi->radio_chanspec)) { 14722 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14723 write_phy_reg(pi, 0x186 + j, 14724 NPHY_IPA_REV4_txdigi_filtcoeffs[5][j]); 14725 } 14726 14727 if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { 14728 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14729 write_phy_reg(pi, 0x2c5 + j, 14730 NPHY_IPA_REV4_txdigi_filtcoeffs[6][j]); 14731 } 14732 } 14733 } 14734 14735 static void wlc_phy_ipa_restore_tx_digi_filts_nphy(struct brcms_phy *pi) 14736 { 14737 int j; 14738 14739 if (pi->bw == WL_CHANSPEC_BW_40) { 14740 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14741 write_phy_reg(pi, 0x195 + j, 14742 NPHY_IPA_REV4_txdigi_filtcoeffs[4][j]); 14743 } else { 14744 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14745 write_phy_reg(pi, 0x186 + j, 14746 NPHY_IPA_REV4_txdigi_filtcoeffs[3][j]); 14747 } 14748 } 14749 14750 static void 14751 wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, const u8 *events, 14752 const u8 *dlys, u8 len) 14753 { 14754 u32 t1_offset, t2_offset; 14755 u8 ctr; 14756 u8 end_event = 14757 NREV_GE(pi->pubpi.phy_rev, 14758 3) ? NPHY_REV3_RFSEQ_CMD_END : NPHY_RFSEQ_CMD_END; 14759 u8 end_dly = 1; 14760 14761 if (pi->phyhang_avoid) 14762 wlc_phy_stay_in_carriersearch_nphy(pi, true); 14763 14764 t1_offset = cmd << 4; 14765 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, len, t1_offset, 8, 14766 events); 14767 t2_offset = t1_offset + 0x080; 14768 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, len, t2_offset, 8, 14769 dlys); 14770 14771 for (ctr = len; ctr < 16; ctr++) { 14772 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 14773 t1_offset + ctr, 8, &end_event); 14774 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 14775 t2_offset + ctr, 8, &end_dly); 14776 } 14777 14778 if (pi->phyhang_avoid) 14779 wlc_phy_stay_in_carriersearch_nphy(pi, false); 14780 } 14781 14782 static u16 wlc_phy_read_lpf_bw_ctl_nphy(struct brcms_phy *pi, u16 offset) 14783 { 14784 u16 lpf_bw_ctl_val = 0; 14785 u16 rx2tx_lpf_rc_lut_offset = 0; 14786 14787 if (offset == 0) { 14788 if (CHSPEC_IS40(pi->radio_chanspec)) 14789 rx2tx_lpf_rc_lut_offset = 0x159; 14790 else 14791 rx2tx_lpf_rc_lut_offset = 0x154; 14792 } else { 14793 rx2tx_lpf_rc_lut_offset = offset; 14794 } 14795 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 14796 (u32) rx2tx_lpf_rc_lut_offset, 16, 14797 &lpf_bw_ctl_val); 14798 14799 lpf_bw_ctl_val = lpf_bw_ctl_val & 0x7; 14800 14801 return lpf_bw_ctl_val; 14802 } 14803 14804 static void 14805 wlc_phy_rfctrl_override_nphy_rev7(struct brcms_phy *pi, u16 field, u16 value, 14806 u8 core_mask, u8 off, u8 override_id) 14807 { 14808 u8 core_num; 14809 u16 addr = 0, en_addr = 0, val_addr = 0, en_mask = 0, val_mask = 0; 14810 u8 val_shift = 0; 14811 14812 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 14813 en_mask = field; 14814 for (core_num = 0; core_num < 2; core_num++) { 14815 if (override_id == NPHY_REV7_RFCTRLOVERRIDE_ID0) { 14816 14817 switch (field) { 14818 case (0x1 << 2): 14819 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14820 val_addr = (core_num == 0) ? 0x7a : 14821 0x7d; 14822 val_mask = (0x1 << 1); 14823 val_shift = 1; 14824 break; 14825 case (0x1 << 3): 14826 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14827 val_addr = (core_num == 0) ? 0x7a : 14828 0x7d; 14829 val_mask = (0x1 << 2); 14830 val_shift = 2; 14831 break; 14832 case (0x1 << 4): 14833 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14834 val_addr = (core_num == 0) ? 0x7a : 14835 0x7d; 14836 val_mask = (0x1 << 4); 14837 val_shift = 4; 14838 break; 14839 case (0x1 << 5): 14840 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14841 val_addr = (core_num == 0) ? 0x7a : 14842 0x7d; 14843 val_mask = (0x1 << 5); 14844 val_shift = 5; 14845 break; 14846 case (0x1 << 6): 14847 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14848 val_addr = (core_num == 0) ? 0x7a : 14849 0x7d; 14850 val_mask = (0x1 << 6); 14851 val_shift = 6; 14852 break; 14853 case (0x1 << 7): 14854 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14855 val_addr = (core_num == 0) ? 0x7a : 14856 0x7d; 14857 val_mask = (0x1 << 7); 14858 val_shift = 7; 14859 break; 14860 case (0x1 << 10): 14861 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14862 val_addr = (core_num == 0) ? 0xf8 : 14863 0xfa; 14864 val_mask = (0x7 << 4); 14865 val_shift = 4; 14866 break; 14867 case (0x1 << 11): 14868 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14869 val_addr = (core_num == 0) ? 0x7b : 14870 0x7e; 14871 val_mask = (0xffff << 0); 14872 val_shift = 0; 14873 break; 14874 case (0x1 << 12): 14875 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14876 val_addr = (core_num == 0) ? 0x7c : 14877 0x7f; 14878 val_mask = (0xffff << 0); 14879 val_shift = 0; 14880 break; 14881 case (0x3 << 13): 14882 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14883 val_addr = (core_num == 0) ? 0x348 : 14884 0x349; 14885 val_mask = (0xff << 0); 14886 val_shift = 0; 14887 break; 14888 case (0x1 << 13): 14889 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14890 val_addr = (core_num == 0) ? 0x348 : 14891 0x349; 14892 val_mask = (0xf << 0); 14893 val_shift = 0; 14894 break; 14895 default: 14896 addr = 0xffff; 14897 break; 14898 } 14899 } else if (override_id == 14900 NPHY_REV7_RFCTRLOVERRIDE_ID1) { 14901 14902 switch (field) { 14903 case (0x1 << 1): 14904 en_addr = (core_num == 0) ? 0x342 : 14905 0x343; 14906 val_addr = (core_num == 0) ? 0x340 : 14907 0x341; 14908 val_mask = (0x1 << 1); 14909 val_shift = 1; 14910 break; 14911 case (0x1 << 3): 14912 en_addr = (core_num == 0) ? 0x342 : 14913 0x343; 14914 val_addr = (core_num == 0) ? 0x340 : 14915 0x341; 14916 val_mask = (0x1 << 3); 14917 val_shift = 3; 14918 break; 14919 case (0x1 << 5): 14920 en_addr = (core_num == 0) ? 0x342 : 14921 0x343; 14922 val_addr = (core_num == 0) ? 0x340 : 14923 0x341; 14924 val_mask = (0x1 << 5); 14925 val_shift = 5; 14926 break; 14927 case (0x1 << 4): 14928 en_addr = (core_num == 0) ? 0x342 : 14929 0x343; 14930 val_addr = (core_num == 0) ? 0x340 : 14931 0x341; 14932 val_mask = (0x1 << 4); 14933 val_shift = 4; 14934 break; 14935 case (0x1 << 2): 14936 14937 en_addr = (core_num == 0) ? 0x342 : 14938 0x343; 14939 val_addr = (core_num == 0) ? 0x340 : 14940 0x341; 14941 val_mask = (0x1 << 2); 14942 val_shift = 2; 14943 break; 14944 case (0x1 << 7): 14945 14946 en_addr = (core_num == 0) ? 0x342 : 14947 0x343; 14948 val_addr = (core_num == 0) ? 0x340 : 14949 0x341; 14950 val_mask = (0x7 << 8); 14951 val_shift = 8; 14952 break; 14953 case (0x1 << 11): 14954 en_addr = (core_num == 0) ? 0x342 : 14955 0x343; 14956 val_addr = (core_num == 0) ? 0x340 : 14957 0x341; 14958 val_mask = (0x1 << 14); 14959 val_shift = 14; 14960 break; 14961 case (0x1 << 10): 14962 en_addr = (core_num == 0) ? 0x342 : 14963 0x343; 14964 val_addr = (core_num == 0) ? 0x340 : 14965 0x341; 14966 val_mask = (0x1 << 13); 14967 val_shift = 13; 14968 break; 14969 case (0x1 << 9): 14970 en_addr = (core_num == 0) ? 0x342 : 14971 0x343; 14972 val_addr = (core_num == 0) ? 0x340 : 14973 0x341; 14974 val_mask = (0x1 << 12); 14975 val_shift = 12; 14976 break; 14977 case (0x1 << 8): 14978 en_addr = (core_num == 0) ? 0x342 : 14979 0x343; 14980 val_addr = (core_num == 0) ? 0x340 : 14981 0x341; 14982 val_mask = (0x1 << 11); 14983 val_shift = 11; 14984 break; 14985 case (0x1 << 6): 14986 en_addr = (core_num == 0) ? 0x342 : 14987 0x343; 14988 val_addr = (core_num == 0) ? 0x340 : 14989 0x341; 14990 val_mask = (0x1 << 6); 14991 val_shift = 6; 14992 break; 14993 case (0x1 << 0): 14994 en_addr = (core_num == 0) ? 0x342 : 14995 0x343; 14996 val_addr = (core_num == 0) ? 0x340 : 14997 0x341; 14998 val_mask = (0x1 << 0); 14999 val_shift = 0; 15000 break; 15001 default: 15002 addr = 0xffff; 15003 break; 15004 } 15005 } else if (override_id == 15006 NPHY_REV7_RFCTRLOVERRIDE_ID2) { 15007 15008 switch (field) { 15009 case (0x1 << 3): 15010 en_addr = (core_num == 0) ? 0x346 : 15011 0x347; 15012 val_addr = (core_num == 0) ? 0x344 : 15013 0x345; 15014 val_mask = (0x1 << 3); 15015 val_shift = 3; 15016 break; 15017 case (0x1 << 1): 15018 en_addr = (core_num == 0) ? 0x346 : 15019 0x347; 15020 val_addr = (core_num == 0) ? 0x344 : 15021 0x345; 15022 val_mask = (0x1 << 1); 15023 val_shift = 1; 15024 break; 15025 case (0x1 << 0): 15026 en_addr = (core_num == 0) ? 0x346 : 15027 0x347; 15028 val_addr = (core_num == 0) ? 0x344 : 15029 0x345; 15030 val_mask = (0x1 << 0); 15031 val_shift = 0; 15032 break; 15033 case (0x1 << 2): 15034 en_addr = (core_num == 0) ? 0x346 : 15035 0x347; 15036 val_addr = (core_num == 0) ? 0x344 : 15037 0x345; 15038 val_mask = (0x1 << 2); 15039 val_shift = 2; 15040 break; 15041 case (0x1 << 4): 15042 en_addr = (core_num == 0) ? 0x346 : 15043 0x347; 15044 val_addr = (core_num == 0) ? 0x344 : 15045 0x345; 15046 val_mask = (0x1 << 4); 15047 val_shift = 4; 15048 break; 15049 default: 15050 addr = 0xffff; 15051 break; 15052 } 15053 } 15054 15055 if (off) { 15056 and_phy_reg(pi, en_addr, ~en_mask); 15057 and_phy_reg(pi, val_addr, ~val_mask); 15058 } else { 15059 15060 if ((core_mask == 0) 15061 || (core_mask & (1 << core_num))) { 15062 or_phy_reg(pi, en_addr, en_mask); 15063 15064 if (addr != 0xffff) 15065 mod_phy_reg(pi, val_addr, 15066 val_mask, 15067 (value << 15068 val_shift)); 15069 } 15070 } 15071 } 15072 } 15073 } 15074 15075 static void wlc_phy_adjust_lnagaintbl_nphy(struct brcms_phy *pi) 15076 { 15077 uint core; 15078 int ctr; 15079 s16 gain_delta[2]; 15080 u8 curr_channel; 15081 u16 minmax_gain[2]; 15082 u16 regval[4]; 15083 15084 if (pi->phyhang_avoid) 15085 wlc_phy_stay_in_carriersearch_nphy(pi, true); 15086 15087 if (pi->nphy_gain_boost) { 15088 if ((CHSPEC_IS2G(pi->radio_chanspec))) { 15089 15090 gain_delta[0] = 6; 15091 gain_delta[1] = 6; 15092 } else { 15093 15094 curr_channel = CHSPEC_CHANNEL(pi->radio_chanspec); 15095 gain_delta[0] = 15096 (s16) 15097 PHY_HW_ROUND(((nphy_lnagain_est0[0] * 15098 curr_channel) + 15099 nphy_lnagain_est0[1]), 13); 15100 gain_delta[1] = 15101 (s16) 15102 PHY_HW_ROUND(((nphy_lnagain_est1[0] * 15103 curr_channel) + 15104 nphy_lnagain_est1[1]), 13); 15105 } 15106 } else { 15107 15108 gain_delta[0] = 0; 15109 gain_delta[1] = 0; 15110 } 15111 15112 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 15113 if (pi->nphy_elna_gain_config) { 15114 15115 regval[0] = nphy_def_lnagains[2] + gain_delta[core]; 15116 regval[1] = nphy_def_lnagains[3] + gain_delta[core]; 15117 regval[2] = nphy_def_lnagains[3] + gain_delta[core]; 15118 regval[3] = nphy_def_lnagains[3] + gain_delta[core]; 15119 } else { 15120 for (ctr = 0; ctr < 4; ctr++) 15121 regval[ctr] = 15122 nphy_def_lnagains[ctr] + 15123 gain_delta[core]; 15124 } 15125 wlc_phy_table_write_nphy(pi, core, 4, 8, 16, regval); 15126 15127 minmax_gain[core] = 15128 (u16) (nphy_def_lnagains[2] + gain_delta[core] + 4); 15129 } 15130 15131 mod_phy_reg(pi, 0x1e, (0xff << 0), (minmax_gain[0] << 0)); 15132 mod_phy_reg(pi, 0x34, (0xff << 0), (minmax_gain[1] << 0)); 15133 15134 if (pi->phyhang_avoid) 15135 wlc_phy_stay_in_carriersearch_nphy(pi, false); 15136 } 15137 15138 static void 15139 wlc_phy_war_force_trsw_to_R_cliplo_nphy(struct brcms_phy *pi, u8 core) 15140 { 15141 if (core == PHY_CORE_0) { 15142 write_phy_reg(pi, 0x38, 0x4); 15143 if (CHSPEC_IS2G(pi->radio_chanspec)) 15144 write_phy_reg(pi, 0x37, 0x0060); 15145 else 15146 write_phy_reg(pi, 0x37, 0x1080); 15147 } else if (core == PHY_CORE_1) { 15148 write_phy_reg(pi, 0x2ae, 0x4); 15149 if (CHSPEC_IS2G(pi->radio_chanspec)) 15150 write_phy_reg(pi, 0x2ad, 0x0060); 15151 else 15152 write_phy_reg(pi, 0x2ad, 0x1080); 15153 } 15154 } 15155 15156 static void wlc_phy_war_txchain_upd_nphy(struct brcms_phy *pi, u8 txchain) 15157 { 15158 u8 txchain0, txchain1; 15159 15160 txchain0 = txchain & 0x1; 15161 txchain1 = (txchain & 0x2) >> 1; 15162 if (!txchain0) 15163 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0); 15164 15165 if (!txchain1) 15166 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1); 15167 } 15168 15169 static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(struct brcms_phy *pi) 15170 { 15171 s8 lna1_gain_db[] = { 8, 13, 17, 22 }; 15172 s8 lna2_gain_db[] = { -2, 7, 11, 15 }; 15173 s8 tia_gain_db[] = { -4, -1, 2, 5, 5, 5, 5, 5, 5, 5 }; 15174 s8 tia_gainbits[] = { 15175 0x0, 0x01, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 }; 15176 15177 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15178 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15179 15180 mod_phy_reg(pi, 0x289, (0xff << 0), (0x46 << 0)); 15181 15182 mod_phy_reg(pi, 0x283, (0xff << 0), (0x3c << 0)); 15183 mod_phy_reg(pi, 0x280, (0xff << 0), (0x3c << 0)); 15184 15185 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x8, 8, 15186 lna1_gain_db); 15187 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x8, 8, 15188 lna1_gain_db); 15189 15190 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 8, 15191 lna2_gain_db); 15192 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 8, 15193 lna2_gain_db); 15194 15195 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 8, 15196 tia_gain_db); 15197 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 8, 15198 tia_gain_db); 15199 15200 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 8, 15201 tia_gainbits); 15202 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 8, 15203 tia_gainbits); 15204 15205 write_phy_reg(pi, 0x37, 0x74); 15206 write_phy_reg(pi, 0x2ad, 0x74); 15207 write_phy_reg(pi, 0x38, 0x18); 15208 write_phy_reg(pi, 0x2ae, 0x18); 15209 15210 write_phy_reg(pi, 0x2b, 0xe8); 15211 write_phy_reg(pi, 0x41, 0xe8); 15212 15213 if (CHSPEC_IS20(pi->radio_chanspec)) { 15214 15215 mod_phy_reg(pi, 0x300, (0x3f << 0), (0x12 << 0)); 15216 mod_phy_reg(pi, 0x301, (0x3f << 0), (0x12 << 0)); 15217 } else { 15218 15219 mod_phy_reg(pi, 0x300, (0x3f << 0), (0x10 << 0)); 15220 mod_phy_reg(pi, 0x301, (0x3f << 0), (0x10 << 0)); 15221 } 15222 } 15223 15224 static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi) 15225 { 15226 u16 currband; 15227 static const s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 }; 15228 const s8 *lna1_gain_db = NULL; 15229 const s8 *lna1_gain_db_2 = NULL; 15230 const s8 *lna2_gain_db = NULL; 15231 static const s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 }; 15232 const s8 *tia_gain_db; 15233 static const s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 }; 15234 const s8 *tia_gainbits; 15235 static const u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f }; 15236 const u16 *rfseq_init_gain; 15237 u16 init_gaincode; 15238 u16 clip1hi_gaincode; 15239 u16 clip1md_gaincode = 0; 15240 u16 clip1md_gaincode_B; 15241 u16 clip1lo_gaincode; 15242 u16 clip1lo_gaincode_B; 15243 u8 crsminl_th = 0; 15244 u8 crsminu_th; 15245 u16 nbclip_th = 0; 15246 u8 w1clip_th; 15247 u16 freq; 15248 s8 nvar_baseline_offset0 = 0, nvar_baseline_offset1 = 0; 15249 u8 chg_nbclip_th = 0; 15250 15251 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15252 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15253 15254 currband = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; 15255 if (currband == 0) { 15256 15257 lna1_gain_db = lna1G_gain_db_rev7; 15258 15259 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 8, 15260 lna1_gain_db); 15261 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 8, 15262 lna1_gain_db); 15263 15264 mod_phy_reg(pi, 0x283, (0xff << 0), (0x40 << 0)); 15265 15266 if (CHSPEC_IS40(pi->radio_chanspec)) { 15267 mod_phy_reg(pi, 0x280, (0xff << 0), (0x3e << 0)); 15268 mod_phy_reg(pi, 0x283, (0xff << 0), (0x3e << 0)); 15269 } 15270 15271 mod_phy_reg(pi, 0x289, (0xff << 0), (0x46 << 0)); 15272 15273 if (CHSPEC_IS20(pi->radio_chanspec)) { 15274 mod_phy_reg(pi, 0x300, (0x3f << 0), (13 << 0)); 15275 mod_phy_reg(pi, 0x301, (0x3f << 0), (13 << 0)); 15276 } 15277 } else { 15278 15279 init_gaincode = 0x9e; 15280 clip1hi_gaincode = 0x9e; 15281 clip1md_gaincode_B = 0x24; 15282 clip1lo_gaincode = 0x8a; 15283 clip1lo_gaincode_B = 8; 15284 rfseq_init_gain = rfseqA_init_gain_rev7; 15285 15286 tia_gain_db = tiaA_gain_db_rev7; 15287 tia_gainbits = tiaA_gainbits_rev7; 15288 15289 freq = CHAN5G_FREQ(CHSPEC_CHANNEL(pi->radio_chanspec)); 15290 if (CHSPEC_IS20(pi->radio_chanspec)) { 15291 15292 w1clip_th = 25; 15293 clip1md_gaincode = 0x82; 15294 15295 if ((freq <= 5080) || (freq == 5825)) { 15296 15297 static const s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 }; 15298 static const s8 lna1A_gain_db_2_rev7[] = { 11, 17, 22, 25}; 15299 static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 }; 15300 15301 crsminu_th = 0x3e; 15302 lna1_gain_db = lna1A_gain_db_rev7; 15303 lna1_gain_db_2 = lna1A_gain_db_2_rev7; 15304 lna2_gain_db = lna2A_gain_db_rev7; 15305 } else if ((freq >= 5500) && (freq <= 5700)) { 15306 15307 static const s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 }; 15308 static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26}; 15309 static const s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 }; 15310 15311 crsminu_th = 0x45; 15312 clip1md_gaincode_B = 0x14; 15313 nbclip_th = 0xff; 15314 chg_nbclip_th = 1; 15315 lna1_gain_db = lna1A_gain_db_rev7; 15316 lna1_gain_db_2 = lna1A_gain_db_2_rev7; 15317 lna2_gain_db = lna2A_gain_db_rev7; 15318 } else { 15319 15320 static const s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 }; 15321 static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26}; 15322 static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 }; 15323 15324 crsminu_th = 0x41; 15325 lna1_gain_db = lna1A_gain_db_rev7; 15326 lna1_gain_db_2 = lna1A_gain_db_2_rev7; 15327 lna2_gain_db = lna2A_gain_db_rev7; 15328 } 15329 15330 if (freq <= 4920) { 15331 nvar_baseline_offset0 = 5; 15332 nvar_baseline_offset1 = 5; 15333 } else if ((freq > 4920) && (freq <= 5320)) { 15334 nvar_baseline_offset0 = 3; 15335 nvar_baseline_offset1 = 5; 15336 } else if ((freq > 5320) && (freq <= 5700)) { 15337 nvar_baseline_offset0 = 3; 15338 nvar_baseline_offset1 = 2; 15339 } else { 15340 nvar_baseline_offset0 = 4; 15341 nvar_baseline_offset1 = 0; 15342 } 15343 } else { 15344 15345 crsminu_th = 0x3a; 15346 crsminl_th = 0x3a; 15347 w1clip_th = 20; 15348 15349 if ((freq >= 4920) && (freq <= 5320)) { 15350 nvar_baseline_offset0 = 4; 15351 nvar_baseline_offset1 = 5; 15352 } else if ((freq > 5320) && (freq <= 5550)) { 15353 nvar_baseline_offset0 = 4; 15354 nvar_baseline_offset1 = 2; 15355 } else { 15356 nvar_baseline_offset0 = 5; 15357 nvar_baseline_offset1 = 3; 15358 } 15359 } 15360 15361 write_phy_reg(pi, 0x20, init_gaincode); 15362 write_phy_reg(pi, 0x2a7, init_gaincode); 15363 15364 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 15365 pi->pubpi.phy_corenum, 0x106, 16, 15366 rfseq_init_gain); 15367 15368 write_phy_reg(pi, 0x22, clip1hi_gaincode); 15369 write_phy_reg(pi, 0x2a9, clip1hi_gaincode); 15370 15371 write_phy_reg(pi, 0x36, clip1md_gaincode_B); 15372 write_phy_reg(pi, 0x2ac, clip1md_gaincode_B); 15373 15374 write_phy_reg(pi, 0x37, clip1lo_gaincode); 15375 write_phy_reg(pi, 0x2ad, clip1lo_gaincode); 15376 write_phy_reg(pi, 0x38, clip1lo_gaincode_B); 15377 write_phy_reg(pi, 0x2ae, clip1lo_gaincode_B); 15378 15379 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 8, 15380 tia_gain_db); 15381 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 8, 15382 tia_gain_db); 15383 15384 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 8, 15385 tia_gainbits); 15386 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 8, 15387 tia_gainbits); 15388 15389 mod_phy_reg(pi, 0x283, (0xff << 0), (crsminu_th << 0)); 15390 15391 if (chg_nbclip_th == 1) { 15392 write_phy_reg(pi, 0x2b, nbclip_th); 15393 write_phy_reg(pi, 0x41, nbclip_th); 15394 } 15395 15396 mod_phy_reg(pi, 0x300, (0x3f << 0), (w1clip_th << 0)); 15397 mod_phy_reg(pi, 0x301, (0x3f << 0), (w1clip_th << 0)); 15398 15399 mod_phy_reg(pi, 0x2e4, 15400 (0x3f << 0), (nvar_baseline_offset0 << 0)); 15401 15402 mod_phy_reg(pi, 0x2e4, 15403 (0x3f << 6), (nvar_baseline_offset1 << 6)); 15404 15405 if (CHSPEC_IS20(pi->radio_chanspec)) { 15406 15407 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 8, 15408 lna1_gain_db); 15409 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 8, 15410 lna1_gain_db_2); 15411 15412 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 15413 8, lna2_gain_db); 15414 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 15415 8, lna2_gain_db); 15416 15417 write_phy_reg(pi, 0x24, clip1md_gaincode); 15418 write_phy_reg(pi, 0x2ab, clip1md_gaincode); 15419 } else { 15420 mod_phy_reg(pi, 0x280, (0xff << 0), (crsminl_th << 0)); 15421 } 15422 } 15423 } 15424 15425 static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi) 15426 { 15427 u16 w1th, hpf_code, currband; 15428 int ctr; 15429 u8 rfseq_updategainu_events[] = { 15430 NPHY_RFSEQ_CMD_RX_GAIN, 15431 NPHY_RFSEQ_CMD_CLR_HIQ_DIS, 15432 NPHY_RFSEQ_CMD_SET_HPF_BW 15433 }; 15434 static const u8 rfseq_updategainu_dlys[] = { 10, 30, 1 }; 15435 static const s8 lna1G_gain_db[] = { 7, 11, 16, 23 }; 15436 static const s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 }; 15437 static const s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 }; 15438 static const s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 }; 15439 static const s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 }; 15440 static const s8 lna1A_gain_db[] = { 7, 11, 17, 23 }; 15441 static const s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 }; 15442 static const s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 }; 15443 static const s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 }; 15444 const s8 *lna1_gain_db = NULL; 15445 static const s8 lna2G_gain_db[] = { -5, 6, 10, 14 }; 15446 static const s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 }; 15447 static const s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 }; 15448 static const s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 }; 15449 static const s8 lna2A_gain_db[] = { -6, 2, 6, 10 }; 15450 static const s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 }; 15451 static const s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 }; 15452 static const s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 }; 15453 const s8 *lna2_gain_db = NULL; 15454 static const s8 tiaG_gain_db[] = { 15455 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A }; 15456 static const s8 tiaA_gain_db[] = { 15457 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13 }; 15458 static const s8 tiaA_gain_db_rev4[] = { 15459 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; 15460 static const s8 tiaA_gain_db_rev5[] = { 15461 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; 15462 static const s8 tiaA_gain_db_rev6[] = { 15463 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; 15464 const s8 *tia_gain_db; 15465 static const s8 tiaG_gainbits[] = { 15466 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 }; 15467 static const s8 tiaA_gainbits[] = { 15468 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06 }; 15469 static const s8 tiaA_gainbits_rev4[] = { 15470 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; 15471 static const s8 tiaA_gainbits_rev5[] = { 15472 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; 15473 static const s8 tiaA_gainbits_rev6[] = { 15474 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; 15475 const s8 *tia_gainbits; 15476 static const s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 }; 15477 static const s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 }; 15478 static const u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f }; 15479 static const u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f }; 15480 static const u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f }; 15481 static const u16 rfseqG_init_gain_rev5_elna[] = { 15482 0x013f, 0x013f, 0x013f, 0x013f }; 15483 static const u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f }; 15484 static const u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f }; 15485 static const u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f }; 15486 static const u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f }; 15487 static const u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f }; 15488 static const u16 rfseqA_init_gain_rev4_elna[] = { 15489 0x314f, 0x314f, 0x314f, 0x314f }; 15490 static const u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f }; 15491 static const u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f }; 15492 const u16 *rfseq_init_gain; 15493 u16 initG_gaincode = 0x627e; 15494 u16 initG_gaincode_rev4 = 0x527e; 15495 u16 initG_gaincode_rev5 = 0x427e; 15496 u16 initG_gaincode_rev5_elna = 0x027e; 15497 u16 initG_gaincode_rev6 = 0x527e; 15498 u16 initG_gaincode_rev6_224B0 = 0x427e; 15499 u16 initG_gaincode_rev6_elna = 0x127e; 15500 u16 initA_gaincode = 0x52de; 15501 u16 initA_gaincode_rev4 = 0x629e; 15502 u16 initA_gaincode_rev4_elna = 0x329e; 15503 u16 initA_gaincode_rev5 = 0x729e; 15504 u16 initA_gaincode_rev6 = 0x729e; 15505 u16 init_gaincode; 15506 u16 clip1hiG_gaincode = 0x107e; 15507 u16 clip1hiG_gaincode_rev4 = 0x007e; 15508 u16 clip1hiG_gaincode_rev5 = 0x1076; 15509 u16 clip1hiG_gaincode_rev6 = 0x007e; 15510 u16 clip1hiA_gaincode = 0x00de; 15511 u16 clip1hiA_gaincode_rev4 = 0x029e; 15512 u16 clip1hiA_gaincode_rev5 = 0x029e; 15513 u16 clip1hiA_gaincode_rev6 = 0x029e; 15514 u16 clip1hi_gaincode; 15515 u16 clip1mdG_gaincode = 0x0066; 15516 u16 clip1mdA_gaincode = 0x00ca; 15517 u16 clip1mdA_gaincode_rev4 = 0x1084; 15518 u16 clip1mdA_gaincode_rev5 = 0x2084; 15519 u16 clip1mdA_gaincode_rev6 = 0x2084; 15520 u16 clip1md_gaincode = 0; 15521 u16 clip1loG_gaincode = 0x0074; 15522 static const u16 clip1loG_gaincode_rev5[] = { 15523 0x0062, 0x0064, 0x006a, 0x106a, 0x106c, 0x1074, 0x107c, 0x207c 15524 }; 15525 static const u16 clip1loG_gaincode_rev6[] = { 15526 0x106a, 0x106c, 0x1074, 0x107c, 0x007e, 0x107e, 0x207e, 0x307e 15527 }; 15528 u16 clip1loG_gaincode_rev6_224B0 = 0x1074; 15529 u16 clip1loA_gaincode = 0x00cc; 15530 u16 clip1loA_gaincode_rev4 = 0x0086; 15531 u16 clip1loA_gaincode_rev5 = 0x2086; 15532 u16 clip1loA_gaincode_rev6 = 0x2086; 15533 u16 clip1lo_gaincode; 15534 u8 crsminG_th = 0x18; 15535 u8 crsminG_th_rev5 = 0x18; 15536 u8 crsminG_th_rev6 = 0x18; 15537 u8 crsminA_th = 0x1e; 15538 u8 crsminA_th_rev4 = 0x24; 15539 u8 crsminA_th_rev5 = 0x24; 15540 u8 crsminA_th_rev6 = 0x24; 15541 u8 crsmin_th; 15542 u8 crsminlG_th = 0x18; 15543 u8 crsminlG_th_rev5 = 0x18; 15544 u8 crsminlG_th_rev6 = 0x18; 15545 u8 crsminlA_th = 0x1e; 15546 u8 crsminlA_th_rev4 = 0x24; 15547 u8 crsminlA_th_rev5 = 0x24; 15548 u8 crsminlA_th_rev6 = 0x24; 15549 u8 crsminl_th = 0; 15550 u8 crsminuG_th = 0x18; 15551 u8 crsminuG_th_rev5 = 0x18; 15552 u8 crsminuG_th_rev6 = 0x18; 15553 u8 crsminuA_th = 0x1e; 15554 u8 crsminuA_th_rev4 = 0x24; 15555 u8 crsminuA_th_rev5 = 0x24; 15556 u8 crsminuA_th_rev6 = 0x24; 15557 u8 crsminuA_th_rev6_224B0 = 0x2d; 15558 u8 crsminu_th; 15559 u16 nbclipG_th = 0x20d; 15560 u16 nbclipG_th_rev4 = 0x1a1; 15561 u16 nbclipG_th_rev5 = 0x1d0; 15562 u16 nbclipG_th_rev6 = 0x1d0; 15563 u16 nbclipA_th = 0x1a1; 15564 u16 nbclipA_th_rev4 = 0x107; 15565 u16 nbclipA_th_rev5 = 0x0a9; 15566 u16 nbclipA_th_rev6 = 0x0f0; 15567 u16 nbclip_th = 0; 15568 u8 w1clipG_th = 5; 15569 u8 w1clipG_th_rev5 = 9; 15570 u8 w1clipG_th_rev6 = 5; 15571 u8 w1clipA_th = 25, w1clip_th; 15572 u8 rssi_gain_default = 0x50; 15573 u8 rssiG_gain_rev6_224B0 = 0x50; 15574 u8 rssiA_gain_rev5 = 0x90; 15575 u8 rssiA_gain_rev6 = 0x90; 15576 u8 rssi_gain; 15577 u16 regval[21]; 15578 u8 triso; 15579 15580 triso = (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g.triso : 15581 pi->srom_fem2g.triso; 15582 15583 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 15584 if (pi->pubpi.radiorev == 5) { 15585 wlc_phy_workarounds_nphy_gainctrl_2057_rev5(pi); 15586 } else if (pi->pubpi.radiorev == 7) { 15587 wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); 15588 15589 mod_phy_reg(pi, 0x283, (0xff << 0), (0x44 << 0)); 15590 mod_phy_reg(pi, 0x280, (0xff << 0), (0x44 << 0)); 15591 15592 } else if ((pi->pubpi.radiorev == 3) 15593 || (pi->pubpi.radiorev == 8)) { 15594 wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); 15595 15596 if (pi->pubpi.radiorev == 8) { 15597 mod_phy_reg(pi, 0x283, 15598 (0xff << 0), (0x44 << 0)); 15599 mod_phy_reg(pi, 0x280, 15600 (0xff << 0), (0x44 << 0)); 15601 } 15602 } else { 15603 wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); 15604 } 15605 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 15606 15607 mod_phy_reg(pi, 0xa0, (0x1 << 6), (1 << 6)); 15608 15609 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15610 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15611 15612 currband = 15613 read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; 15614 if (currband == 0) { 15615 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 15616 if (pi->pubpi.radiorev == 11) { 15617 lna1_gain_db = lna1G_gain_db_rev6_224B0; 15618 lna2_gain_db = lna2G_gain_db_rev6_224B0; 15619 rfseq_init_gain = 15620 rfseqG_init_gain_rev6_224B0; 15621 init_gaincode = 15622 initG_gaincode_rev6_224B0; 15623 clip1hi_gaincode = 15624 clip1hiG_gaincode_rev6; 15625 clip1lo_gaincode = 15626 clip1loG_gaincode_rev6_224B0; 15627 nbclip_th = nbclipG_th_rev6; 15628 w1clip_th = w1clipG_th_rev6; 15629 crsmin_th = crsminG_th_rev6; 15630 crsminl_th = crsminlG_th_rev6; 15631 crsminu_th = crsminuG_th_rev6; 15632 rssi_gain = rssiG_gain_rev6_224B0; 15633 } else { 15634 lna1_gain_db = lna1G_gain_db_rev6; 15635 lna2_gain_db = lna2G_gain_db_rev6; 15636 if (pi->sh->boardflags & BFL_EXTLNA) { 15637 15638 rfseq_init_gain = 15639 rfseqG_init_gain_rev6_elna; 15640 init_gaincode = 15641 initG_gaincode_rev6_elna; 15642 } else { 15643 rfseq_init_gain = 15644 rfseqG_init_gain_rev6; 15645 init_gaincode = 15646 initG_gaincode_rev6; 15647 } 15648 clip1hi_gaincode = 15649 clip1hiG_gaincode_rev6; 15650 switch (triso) { 15651 case 0: 15652 clip1lo_gaincode = 15653 clip1loG_gaincode_rev6 15654 [0]; 15655 break; 15656 case 1: 15657 clip1lo_gaincode = 15658 clip1loG_gaincode_rev6 15659 [1]; 15660 break; 15661 case 2: 15662 clip1lo_gaincode = 15663 clip1loG_gaincode_rev6 15664 [2]; 15665 break; 15666 case 3: 15667 default: 15668 15669 clip1lo_gaincode = 15670 clip1loG_gaincode_rev6 15671 [3]; 15672 break; 15673 case 4: 15674 clip1lo_gaincode = 15675 clip1loG_gaincode_rev6 15676 [4]; 15677 break; 15678 case 5: 15679 clip1lo_gaincode = 15680 clip1loG_gaincode_rev6 15681 [5]; 15682 break; 15683 case 6: 15684 clip1lo_gaincode = 15685 clip1loG_gaincode_rev6 15686 [6]; 15687 break; 15688 case 7: 15689 clip1lo_gaincode = 15690 clip1loG_gaincode_rev6 15691 [7]; 15692 break; 15693 } 15694 nbclip_th = nbclipG_th_rev6; 15695 w1clip_th = w1clipG_th_rev6; 15696 crsmin_th = crsminG_th_rev6; 15697 crsminl_th = crsminlG_th_rev6; 15698 crsminu_th = crsminuG_th_rev6; 15699 rssi_gain = rssi_gain_default; 15700 } 15701 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 15702 lna1_gain_db = lna1G_gain_db_rev5; 15703 lna2_gain_db = lna2G_gain_db_rev5; 15704 if (pi->sh->boardflags & BFL_EXTLNA) { 15705 15706 rfseq_init_gain = 15707 rfseqG_init_gain_rev5_elna; 15708 init_gaincode = 15709 initG_gaincode_rev5_elna; 15710 } else { 15711 rfseq_init_gain = rfseqG_init_gain_rev5; 15712 init_gaincode = initG_gaincode_rev5; 15713 } 15714 clip1hi_gaincode = clip1hiG_gaincode_rev5; 15715 switch (triso) { 15716 case 0: 15717 clip1lo_gaincode = 15718 clip1loG_gaincode_rev5[0]; 15719 break; 15720 case 1: 15721 clip1lo_gaincode = 15722 clip1loG_gaincode_rev5[1]; 15723 break; 15724 case 2: 15725 clip1lo_gaincode = 15726 clip1loG_gaincode_rev5[2]; 15727 break; 15728 case 3: 15729 15730 clip1lo_gaincode = 15731 clip1loG_gaincode_rev5[3]; 15732 break; 15733 case 4: 15734 clip1lo_gaincode = 15735 clip1loG_gaincode_rev5[4]; 15736 break; 15737 case 5: 15738 clip1lo_gaincode = 15739 clip1loG_gaincode_rev5[5]; 15740 break; 15741 case 6: 15742 clip1lo_gaincode = 15743 clip1loG_gaincode_rev5[6]; 15744 break; 15745 case 7: 15746 clip1lo_gaincode = 15747 clip1loG_gaincode_rev5[7]; 15748 break; 15749 default: 15750 clip1lo_gaincode = 15751 clip1loG_gaincode_rev5[3]; 15752 break; 15753 } 15754 nbclip_th = nbclipG_th_rev5; 15755 w1clip_th = w1clipG_th_rev5; 15756 crsmin_th = crsminG_th_rev5; 15757 crsminl_th = crsminlG_th_rev5; 15758 crsminu_th = crsminuG_th_rev5; 15759 rssi_gain = rssi_gain_default; 15760 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 15761 lna1_gain_db = lna1G_gain_db_rev4; 15762 lna2_gain_db = lna2G_gain_db; 15763 rfseq_init_gain = rfseqG_init_gain_rev4; 15764 init_gaincode = initG_gaincode_rev4; 15765 clip1hi_gaincode = clip1hiG_gaincode_rev4; 15766 clip1lo_gaincode = clip1loG_gaincode; 15767 nbclip_th = nbclipG_th_rev4; 15768 w1clip_th = w1clipG_th; 15769 crsmin_th = crsminG_th; 15770 crsminl_th = crsminlG_th; 15771 crsminu_th = crsminuG_th; 15772 rssi_gain = rssi_gain_default; 15773 } else { 15774 lna1_gain_db = lna1G_gain_db; 15775 lna2_gain_db = lna2G_gain_db; 15776 rfseq_init_gain = rfseqG_init_gain; 15777 init_gaincode = initG_gaincode; 15778 clip1hi_gaincode = clip1hiG_gaincode; 15779 clip1lo_gaincode = clip1loG_gaincode; 15780 nbclip_th = nbclipG_th; 15781 w1clip_th = w1clipG_th; 15782 crsmin_th = crsminG_th; 15783 crsminl_th = crsminlG_th; 15784 crsminu_th = crsminuG_th; 15785 rssi_gain = rssi_gain_default; 15786 } 15787 tia_gain_db = tiaG_gain_db; 15788 tia_gainbits = tiaG_gainbits; 15789 clip1md_gaincode = clip1mdG_gaincode; 15790 } else { 15791 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 15792 lna1_gain_db = lna1A_gain_db_rev6; 15793 lna2_gain_db = lna2A_gain_db_rev6; 15794 tia_gain_db = tiaA_gain_db_rev6; 15795 tia_gainbits = tiaA_gainbits_rev6; 15796 rfseq_init_gain = rfseqA_init_gain_rev6; 15797 init_gaincode = initA_gaincode_rev6; 15798 clip1hi_gaincode = clip1hiA_gaincode_rev6; 15799 clip1md_gaincode = clip1mdA_gaincode_rev6; 15800 clip1lo_gaincode = clip1loA_gaincode_rev6; 15801 crsmin_th = crsminA_th_rev6; 15802 crsminl_th = crsminlA_th_rev6; 15803 if ((pi->pubpi.radiorev == 11) && 15804 (CHSPEC_IS40(pi->radio_chanspec) == 0)) 15805 crsminu_th = crsminuA_th_rev6_224B0; 15806 else 15807 crsminu_th = crsminuA_th_rev6; 15808 15809 nbclip_th = nbclipA_th_rev6; 15810 rssi_gain = rssiA_gain_rev6; 15811 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 15812 lna1_gain_db = lna1A_gain_db_rev5; 15813 lna2_gain_db = lna2A_gain_db_rev5; 15814 tia_gain_db = tiaA_gain_db_rev5; 15815 tia_gainbits = tiaA_gainbits_rev5; 15816 rfseq_init_gain = rfseqA_init_gain_rev5; 15817 init_gaincode = initA_gaincode_rev5; 15818 clip1hi_gaincode = clip1hiA_gaincode_rev5; 15819 clip1md_gaincode = clip1mdA_gaincode_rev5; 15820 clip1lo_gaincode = clip1loA_gaincode_rev5; 15821 crsmin_th = crsminA_th_rev5; 15822 crsminl_th = crsminlA_th_rev5; 15823 crsminu_th = crsminuA_th_rev5; 15824 nbclip_th = nbclipA_th_rev5; 15825 rssi_gain = rssiA_gain_rev5; 15826 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 15827 lna1_gain_db = lna1A_gain_db_rev4; 15828 lna2_gain_db = lna2A_gain_db_rev4; 15829 tia_gain_db = tiaA_gain_db_rev4; 15830 tia_gainbits = tiaA_gainbits_rev4; 15831 if (pi->sh->boardflags & BFL_EXTLNA_5GHz) { 15832 15833 rfseq_init_gain = 15834 rfseqA_init_gain_rev4_elna; 15835 init_gaincode = 15836 initA_gaincode_rev4_elna; 15837 } else { 15838 rfseq_init_gain = rfseqA_init_gain_rev4; 15839 init_gaincode = initA_gaincode_rev4; 15840 } 15841 clip1hi_gaincode = clip1hiA_gaincode_rev4; 15842 clip1md_gaincode = clip1mdA_gaincode_rev4; 15843 clip1lo_gaincode = clip1loA_gaincode_rev4; 15844 crsmin_th = crsminA_th_rev4; 15845 crsminl_th = crsminlA_th_rev4; 15846 crsminu_th = crsminuA_th_rev4; 15847 nbclip_th = nbclipA_th_rev4; 15848 rssi_gain = rssi_gain_default; 15849 } else { 15850 lna1_gain_db = lna1A_gain_db; 15851 lna2_gain_db = lna2A_gain_db; 15852 tia_gain_db = tiaA_gain_db; 15853 tia_gainbits = tiaA_gainbits; 15854 rfseq_init_gain = rfseqA_init_gain; 15855 init_gaincode = initA_gaincode; 15856 clip1hi_gaincode = clip1hiA_gaincode; 15857 clip1md_gaincode = clip1mdA_gaincode; 15858 clip1lo_gaincode = clip1loA_gaincode; 15859 crsmin_th = crsminA_th; 15860 crsminl_th = crsminlA_th; 15861 crsminu_th = crsminuA_th; 15862 nbclip_th = nbclipA_th; 15863 rssi_gain = rssi_gain_default; 15864 } 15865 w1clip_th = w1clipA_th; 15866 } 15867 15868 write_radio_reg(pi, 15869 (RADIO_2056_RX_BIASPOLE_LNAG1_IDAC | 15870 RADIO_2056_RX0), 0x17); 15871 write_radio_reg(pi, 15872 (RADIO_2056_RX_BIASPOLE_LNAG1_IDAC | 15873 RADIO_2056_RX1), 0x17); 15874 15875 write_radio_reg(pi, (RADIO_2056_RX_LNAG2_IDAC | RADIO_2056_RX0), 15876 0xf0); 15877 write_radio_reg(pi, (RADIO_2056_RX_LNAG2_IDAC | RADIO_2056_RX1), 15878 0xf0); 15879 15880 write_radio_reg(pi, (RADIO_2056_RX_RSSI_POLE | RADIO_2056_RX0), 15881 0x0); 15882 write_radio_reg(pi, (RADIO_2056_RX_RSSI_POLE | RADIO_2056_RX1), 15883 0x0); 15884 15885 write_radio_reg(pi, (RADIO_2056_RX_RSSI_GAIN | RADIO_2056_RX0), 15886 rssi_gain); 15887 write_radio_reg(pi, (RADIO_2056_RX_RSSI_GAIN | RADIO_2056_RX1), 15888 rssi_gain); 15889 15890 write_radio_reg(pi, 15891 (RADIO_2056_RX_BIASPOLE_LNAA1_IDAC | 15892 RADIO_2056_RX0), 0x17); 15893 write_radio_reg(pi, 15894 (RADIO_2056_RX_BIASPOLE_LNAA1_IDAC | 15895 RADIO_2056_RX1), 0x17); 15896 15897 write_radio_reg(pi, (RADIO_2056_RX_LNAA2_IDAC | RADIO_2056_RX0), 15898 0xFF); 15899 write_radio_reg(pi, (RADIO_2056_RX_LNAA2_IDAC | RADIO_2056_RX1), 15900 0xFF); 15901 15902 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 15903 8, lna1_gain_db); 15904 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 15905 8, lna1_gain_db); 15906 15907 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 15908 8, lna2_gain_db); 15909 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 15910 8, lna2_gain_db); 15911 15912 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 15913 8, tia_gain_db); 15914 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 15915 8, tia_gain_db); 15916 15917 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 15918 8, tia_gainbits); 15919 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 15920 8, tia_gainbits); 15921 15922 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 6, 0x40, 15923 8, &lpf_gain_db); 15924 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 6, 0x40, 15925 8, &lpf_gain_db); 15926 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 6, 0x40, 15927 8, &lpf_gainbits); 15928 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 6, 0x40, 15929 8, &lpf_gainbits); 15930 15931 write_phy_reg(pi, 0x20, init_gaincode); 15932 write_phy_reg(pi, 0x2a7, init_gaincode); 15933 15934 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 15935 pi->pubpi.phy_corenum, 0x106, 16, 15936 rfseq_init_gain); 15937 15938 write_phy_reg(pi, 0x22, clip1hi_gaincode); 15939 write_phy_reg(pi, 0x2a9, clip1hi_gaincode); 15940 15941 write_phy_reg(pi, 0x24, clip1md_gaincode); 15942 write_phy_reg(pi, 0x2ab, clip1md_gaincode); 15943 15944 write_phy_reg(pi, 0x37, clip1lo_gaincode); 15945 write_phy_reg(pi, 0x2ad, clip1lo_gaincode); 15946 15947 mod_phy_reg(pi, 0x27d, (0xff << 0), (crsmin_th << 0)); 15948 mod_phy_reg(pi, 0x280, (0xff << 0), (crsminl_th << 0)); 15949 mod_phy_reg(pi, 0x283, (0xff << 0), (crsminu_th << 0)); 15950 15951 write_phy_reg(pi, 0x2b, nbclip_th); 15952 write_phy_reg(pi, 0x41, nbclip_th); 15953 15954 mod_phy_reg(pi, 0x27, (0x3f << 0), (w1clip_th << 0)); 15955 mod_phy_reg(pi, 0x3d, (0x3f << 0), (w1clip_th << 0)); 15956 15957 write_phy_reg(pi, 0x150, 0x809c); 15958 15959 } else { 15960 15961 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15962 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15963 15964 write_phy_reg(pi, 0x2b, 0x84); 15965 write_phy_reg(pi, 0x41, 0x84); 15966 15967 if (CHSPEC_IS20(pi->radio_chanspec)) { 15968 write_phy_reg(pi, 0x6b, 0x2b); 15969 write_phy_reg(pi, 0x6c, 0x2b); 15970 write_phy_reg(pi, 0x6d, 0x9); 15971 write_phy_reg(pi, 0x6e, 0x9); 15972 } 15973 15974 w1th = NPHY_RSSICAL_W1_TARGET - 4; 15975 mod_phy_reg(pi, 0x27, (0x3f << 0), (w1th << 0)); 15976 mod_phy_reg(pi, 0x3d, (0x3f << 0), (w1th << 0)); 15977 15978 if (CHSPEC_IS20(pi->radio_chanspec)) { 15979 mod_phy_reg(pi, 0x1c, (0x1f << 0), (0x1 << 0)); 15980 mod_phy_reg(pi, 0x32, (0x1f << 0), (0x1 << 0)); 15981 15982 mod_phy_reg(pi, 0x1d, (0x1f << 0), (0x1 << 0)); 15983 mod_phy_reg(pi, 0x33, (0x1f << 0), (0x1 << 0)); 15984 } 15985 15986 write_phy_reg(pi, 0x150, 0x809c); 15987 15988 if (pi->nphy_gain_boost) 15989 if ((CHSPEC_IS2G(pi->radio_chanspec)) && 15990 (CHSPEC_IS40(pi->radio_chanspec))) 15991 hpf_code = 4; 15992 else 15993 hpf_code = 5; 15994 else if (CHSPEC_IS40(pi->radio_chanspec)) 15995 hpf_code = 6; 15996 else 15997 hpf_code = 7; 15998 15999 mod_phy_reg(pi, 0x20, (0x1f << 7), (hpf_code << 7)); 16000 mod_phy_reg(pi, 0x36, (0x1f << 7), (hpf_code << 7)); 16001 16002 for (ctr = 0; ctr < 4; ctr++) 16003 regval[ctr] = (hpf_code << 8) | 0x7c; 16004 wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); 16005 16006 wlc_phy_adjust_lnagaintbl_nphy(pi); 16007 16008 if (pi->nphy_elna_gain_config) { 16009 regval[0] = 0; 16010 regval[1] = 1; 16011 regval[2] = 1; 16012 regval[3] = 1; 16013 wlc_phy_table_write_nphy(pi, 2, 4, 8, 16, regval); 16014 wlc_phy_table_write_nphy(pi, 3, 4, 8, 16, regval); 16015 16016 for (ctr = 0; ctr < 4; ctr++) 16017 regval[ctr] = (hpf_code << 8) | 0x74; 16018 wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); 16019 } 16020 16021 if (NREV_IS(pi->pubpi.phy_rev, 2)) { 16022 for (ctr = 0; ctr < 21; ctr++) 16023 regval[ctr] = 3 * ctr; 16024 wlc_phy_table_write_nphy(pi, 0, 21, 32, 16, regval); 16025 wlc_phy_table_write_nphy(pi, 1, 21, 32, 16, regval); 16026 16027 for (ctr = 0; ctr < 21; ctr++) 16028 regval[ctr] = (u16) ctr; 16029 wlc_phy_table_write_nphy(pi, 2, 21, 32, 16, regval); 16030 wlc_phy_table_write_nphy(pi, 3, 21, 32, 16, regval); 16031 } 16032 16033 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_UPDATEGAINU, 16034 rfseq_updategainu_events, 16035 rfseq_updategainu_dlys, 16036 ARRAY_SIZE(rfseq_updategainu_events)); 16037 16038 mod_phy_reg(pi, 0x153, (0xff << 8), (90 << 8)); 16039 16040 if (CHSPEC_IS2G(pi->radio_chanspec)) 16041 mod_phy_reg(pi, 16042 (NPHY_TO_BPHY_OFF + BPHY_OPTIONAL_MODES), 16043 0x7f, 0x4); 16044 } 16045 } 16046 16047 static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi) 16048 { 16049 static const u8 rfseq_rx2tx_events_rev3_ipa[] = { 16050 NPHY_REV3_RFSEQ_CMD_NOP, 16051 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16052 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16053 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16054 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16055 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16056 NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS, 16057 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16058 NPHY_REV3_RFSEQ_CMD_END 16059 }; 16060 static const u8 rfseq_rx2tx_dlys_rev3_ipa[] = 16061 { 8, 6, 6, 4, 4, 16, 43, 1, 1 }; 16062 static const u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f }; 16063 u32 leg_data_weights; 16064 u8 chan_freq_range = 0; 16065 static const u16 dac_control = 0x0002; 16066 u16 aux_adc_vmid_rev7_core0[] = { 0x8e, 0x96, 0x96, 0x96 }; 16067 u16 aux_adc_vmid_rev7_core1[] = { 0x8f, 0x9f, 0x9f, 0x96 }; 16068 u16 aux_adc_gain_rev7[] = { 0x02, 0x02, 0x02, 0x02 }; 16069 s32 min_nvar_val = 0x18d; 16070 s32 min_nvar_offset_6mbps = 20; 16071 u8 pdetrange; 16072 u16 afectrl_adc_ctrl1_rev7 = 0x20; 16073 u16 afectrl_adc_ctrl2_rev7 = 0x0; 16074 u16 rfseq_rx2tx_lpf_h_hpc_rev7 = 0x77; 16075 u16 rfseq_tx2rx_lpf_h_hpc_rev7 = 0x77; 16076 u16 rfseq_pktgn_lpf_h_hpc_rev7 = 0x77; 16077 static const u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 }; 16078 static const u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 }; 16079 static const u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 }; 16080 u16 ipalvlshift_3p3_war_en = 0; 16081 u16 rccal_bcap_val, rccal_scap_val; 16082 u16 rccal_tx20_11b_bcap = 0; 16083 u16 rccal_tx20_11b_scap = 0; 16084 u16 rccal_tx20_11n_bcap = 0; 16085 u16 rccal_tx20_11n_scap = 0; 16086 u16 rccal_tx40_11n_bcap = 0; 16087 u16 rccal_tx40_11n_scap = 0; 16088 u16 rx2tx_lpf_rc_lut_tx20_11b = 0; 16089 u16 rx2tx_lpf_rc_lut_tx20_11n = 0; 16090 u16 rx2tx_lpf_rc_lut_tx40_11n = 0; 16091 u16 tx_lpf_bw_ofdm_20mhz = 0; 16092 u16 tx_lpf_bw_ofdm_40mhz = 0; 16093 u16 tx_lpf_bw_11b = 0; 16094 u16 ipa2g_mainbias, ipa2g_casconv, ipa2g_biasfilt; 16095 u16 txgm_idac_bleed = 0; 16096 bool rccal_ovrd = false; 16097 u16 freq; 16098 int coreNum; 16099 16100 16101 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 16102 mod_phy_reg(pi, 0x221, (0x1 << 4), (1 << 4)); 16103 16104 mod_phy_reg(pi, 0x160, (0x7f << 0), (32 << 0)); 16105 mod_phy_reg(pi, 0x160, (0x7f << 8), (39 << 8)); 16106 mod_phy_reg(pi, 0x161, (0x7f << 0), (46 << 0)); 16107 mod_phy_reg(pi, 0x161, (0x7f << 8), (51 << 8)); 16108 mod_phy_reg(pi, 0x162, (0x7f << 0), (55 << 0)); 16109 mod_phy_reg(pi, 0x162, (0x7f << 8), (58 << 8)); 16110 mod_phy_reg(pi, 0x163, (0x7f << 0), (60 << 0)); 16111 mod_phy_reg(pi, 0x163, (0x7f << 8), (62 << 8)); 16112 mod_phy_reg(pi, 0x164, (0x7f << 0), (62 << 0)); 16113 mod_phy_reg(pi, 0x164, (0x7f << 8), (63 << 8)); 16114 mod_phy_reg(pi, 0x165, (0x7f << 0), (63 << 0)); 16115 mod_phy_reg(pi, 0x165, (0x7f << 8), (64 << 8)); 16116 mod_phy_reg(pi, 0x166, (0x7f << 0), (64 << 0)); 16117 mod_phy_reg(pi, 0x166, (0x7f << 8), (64 << 8)); 16118 mod_phy_reg(pi, 0x167, (0x7f << 0), (64 << 0)); 16119 mod_phy_reg(pi, 0x167, (0x7f << 8), (64 << 8)); 16120 } 16121 16122 if (NREV_LE(pi->pubpi.phy_rev, 8)) { 16123 write_phy_reg(pi, 0x23f, 0x1b0); 16124 write_phy_reg(pi, 0x240, 0x1b0); 16125 } 16126 16127 if (NREV_GE(pi->pubpi.phy_rev, 8)) 16128 mod_phy_reg(pi, 0xbd, (0xff << 0), (114 << 0)); 16129 16130 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x00, 16, 16131 &dac_control); 16132 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16, 16133 &dac_control); 16134 16135 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16136 1, 0, 32, &leg_data_weights); 16137 leg_data_weights = leg_data_weights & 0xffffff; 16138 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16139 1, 0, 32, &leg_data_weights); 16140 16141 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 16142 2, 0x15e, 16, rfseq_rx2tx_dacbufpu_rev7); 16143 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x16e, 16, 16144 rfseq_rx2tx_dacbufpu_rev7); 16145 16146 if (PHY_IPA(pi)) 16147 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, 16148 rfseq_rx2tx_events_rev3_ipa, 16149 rfseq_rx2tx_dlys_rev3_ipa, 16150 ARRAY_SIZE 16151 (rfseq_rx2tx_events_rev3_ipa)); 16152 16153 mod_phy_reg(pi, 0x299, (0x3 << 14), (0x1 << 14)); 16154 mod_phy_reg(pi, 0x29d, (0x3 << 14), (0x1 << 14)); 16155 16156 tx_lpf_bw_ofdm_20mhz = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x154); 16157 tx_lpf_bw_ofdm_40mhz = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x159); 16158 tx_lpf_bw_11b = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x152); 16159 16160 if (PHY_IPA(pi)) { 16161 16162 if (((pi->pubpi.radiorev == 5) 16163 && (CHSPEC_IS40(pi->radio_chanspec) == 1)) 16164 || (pi->pubpi.radiorev == 7) 16165 || (pi->pubpi.radiorev == 8)) { 16166 16167 rccal_bcap_val = 16168 read_radio_reg(pi, RADIO_2057_RCCAL_BCAP_VAL); 16169 rccal_scap_val = 16170 read_radio_reg(pi, RADIO_2057_RCCAL_SCAP_VAL); 16171 16172 rccal_tx20_11b_bcap = rccal_bcap_val; 16173 rccal_tx20_11b_scap = rccal_scap_val; 16174 16175 if ((pi->pubpi.radiorev == 5) && 16176 (CHSPEC_IS40(pi->radio_chanspec) == 1)) { 16177 16178 rccal_tx20_11n_bcap = rccal_bcap_val; 16179 rccal_tx20_11n_scap = rccal_scap_val; 16180 rccal_tx40_11n_bcap = 0xc; 16181 rccal_tx40_11n_scap = 0xc; 16182 16183 rccal_ovrd = true; 16184 16185 } else if ((pi->pubpi.radiorev == 7) 16186 || (pi->pubpi.radiorev == 8)) { 16187 16188 tx_lpf_bw_ofdm_20mhz = 4; 16189 tx_lpf_bw_11b = 1; 16190 16191 if (CHSPEC_IS2G(pi->radio_chanspec)) { 16192 rccal_tx20_11n_bcap = 0xc; 16193 rccal_tx20_11n_scap = 0xc; 16194 rccal_tx40_11n_bcap = 0xa; 16195 rccal_tx40_11n_scap = 0xa; 16196 } else { 16197 rccal_tx20_11n_bcap = 0x14; 16198 rccal_tx20_11n_scap = 0x14; 16199 rccal_tx40_11n_bcap = 0xf; 16200 rccal_tx40_11n_scap = 0xf; 16201 } 16202 16203 rccal_ovrd = true; 16204 } 16205 } 16206 16207 } else { 16208 16209 if (pi->pubpi.radiorev == 5) { 16210 16211 tx_lpf_bw_ofdm_20mhz = 1; 16212 tx_lpf_bw_ofdm_40mhz = 3; 16213 16214 rccal_bcap_val = 16215 read_radio_reg(pi, RADIO_2057_RCCAL_BCAP_VAL); 16216 rccal_scap_val = 16217 read_radio_reg(pi, RADIO_2057_RCCAL_SCAP_VAL); 16218 16219 rccal_tx20_11b_bcap = rccal_bcap_val; 16220 rccal_tx20_11b_scap = rccal_scap_val; 16221 16222 rccal_tx20_11n_bcap = 0x13; 16223 rccal_tx20_11n_scap = 0x11; 16224 rccal_tx40_11n_bcap = 0x13; 16225 rccal_tx40_11n_scap = 0x11; 16226 16227 rccal_ovrd = true; 16228 } 16229 } 16230 16231 if (rccal_ovrd) { 16232 16233 rx2tx_lpf_rc_lut_tx20_11b = 16234 (rccal_tx20_11b_bcap << 8) | 16235 (rccal_tx20_11b_scap << 3) | tx_lpf_bw_11b; 16236 rx2tx_lpf_rc_lut_tx20_11n = 16237 (rccal_tx20_11n_bcap << 8) | 16238 (rccal_tx20_11n_scap << 3) | tx_lpf_bw_ofdm_20mhz; 16239 rx2tx_lpf_rc_lut_tx40_11n = 16240 (rccal_tx40_11n_bcap << 8) | 16241 (rccal_tx40_11n_scap << 3) | tx_lpf_bw_ofdm_40mhz; 16242 16243 for (coreNum = 0; coreNum <= 1; coreNum++) { 16244 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16245 0x152 + coreNum * 0x10, 16, 16246 &rx2tx_lpf_rc_lut_tx20_11b); 16247 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16248 0x153 + coreNum * 0x10, 16, 16249 &rx2tx_lpf_rc_lut_tx20_11n); 16250 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16251 0x154 + coreNum * 0x10, 16, 16252 &rx2tx_lpf_rc_lut_tx20_11n); 16253 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16254 0x155 + coreNum * 0x10, 16, 16255 &rx2tx_lpf_rc_lut_tx40_11n); 16256 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16257 0x156 + coreNum * 0x10, 16, 16258 &rx2tx_lpf_rc_lut_tx40_11n); 16259 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16260 0x157 + coreNum * 0x10, 16, 16261 &rx2tx_lpf_rc_lut_tx40_11n); 16262 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16263 0x158 + coreNum * 0x10, 16, 16264 &rx2tx_lpf_rc_lut_tx40_11n); 16265 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16266 0x159 + coreNum * 0x10, 16, 16267 &rx2tx_lpf_rc_lut_tx40_11n); 16268 } 16269 16270 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 1, 0x3, 0, 16271 NPHY_REV7_RFCTRLOVERRIDE_ID2); 16272 } 16273 16274 write_phy_reg(pi, 0x32f, 0x3); 16275 16276 if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6)) 16277 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 0x3, 0, 16278 NPHY_REV7_RFCTRLOVERRIDE_ID0); 16279 16280 if ((pi->pubpi.radiorev == 3) || (pi->pubpi.radiorev == 4) || 16281 (pi->pubpi.radiorev == 6)) { 16282 if ((pi->sh->sromrev >= 8) 16283 && (pi->sh->boardflags2 & BFL2_IPALVLSHIFT_3P3)) 16284 ipalvlshift_3p3_war_en = 1; 16285 16286 if (ipalvlshift_3p3_war_en) { 16287 write_radio_reg(pi, RADIO_2057_GPAIO_CONFIG, 0x5); 16288 write_radio_reg(pi, RADIO_2057_GPAIO_SEL1, 0x30); 16289 write_radio_reg(pi, RADIO_2057_GPAIO_SEL0, 0x0); 16290 or_radio_reg(pi, RADIO_2057_RXTXBIAS_CONFIG_CORE0, 0x1); 16291 or_radio_reg(pi, RADIO_2057_RXTXBIAS_CONFIG_CORE1, 0x1); 16292 16293 ipa2g_mainbias = 0x1f; 16294 16295 ipa2g_casconv = 0x6f; 16296 16297 ipa2g_biasfilt = 0xaa; 16298 } else { 16299 16300 ipa2g_mainbias = 0x2b; 16301 16302 ipa2g_casconv = 0x7f; 16303 16304 ipa2g_biasfilt = 0xee; 16305 } 16306 16307 if (CHSPEC_IS2G(pi->radio_chanspec)) { 16308 for (coreNum = 0; coreNum <= 1; coreNum++) { 16309 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16310 coreNum, IPA2G_IMAIN, 16311 ipa2g_mainbias); 16312 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16313 coreNum, IPA2G_CASCONV, 16314 ipa2g_casconv); 16315 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16316 coreNum, 16317 IPA2G_BIAS_FILTER, 16318 ipa2g_biasfilt); 16319 } 16320 } 16321 } 16322 16323 if (PHY_IPA(pi)) { 16324 if (CHSPEC_IS2G(pi->radio_chanspec)) { 16325 if ((pi->pubpi.radiorev == 3) 16326 || (pi->pubpi.radiorev == 4) 16327 || (pi->pubpi.radiorev == 6)) 16328 txgm_idac_bleed = 0x7f; 16329 16330 for (coreNum = 0; coreNum <= 1; coreNum++) { 16331 if (txgm_idac_bleed != 0) 16332 WRITE_RADIO_REG4(pi, RADIO_2057, 16333 CORE, coreNum, 16334 TXGM_IDAC_BLEED, 16335 txgm_idac_bleed); 16336 } 16337 16338 if (pi->pubpi.radiorev == 5) { 16339 for (coreNum = 0; coreNum <= 1; coreNum++) { 16340 WRITE_RADIO_REG4(pi, RADIO_2057, 16341 CORE, coreNum, 16342 IPA2G_CASCONV, 16343 0x13); 16344 WRITE_RADIO_REG4(pi, RADIO_2057, 16345 CORE, coreNum, 16346 IPA2G_IMAIN, 16347 0x1f); 16348 WRITE_RADIO_REG4(pi, RADIO_2057, 16349 CORE, coreNum, 16350 IPA2G_BIAS_FILTER, 16351 0xee); 16352 WRITE_RADIO_REG4(pi, RADIO_2057, 16353 CORE, coreNum, 16354 PAD2G_IDACS, 16355 0x8a); 16356 WRITE_RADIO_REG4(pi, RADIO_2057, 16357 CORE, coreNum, 16358 PAD_BIAS_FILTER_BWS, 16359 0x3e); 16360 } 16361 } else if ((pi->pubpi.radiorev == 7) || 16362 (pi->pubpi.radiorev == 8)) { 16363 16364 if (CHSPEC_IS40(pi->radio_chanspec) == 0) { 16365 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16366 0, IPA2G_IMAIN, 0x14); 16367 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16368 1, IPA2G_IMAIN, 0x12); 16369 } else { 16370 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16371 0, IPA2G_IMAIN, 0x16); 16372 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16373 1, IPA2G_IMAIN, 0x16); 16374 } 16375 } 16376 16377 } else { 16378 freq = 16379 CHAN5G_FREQ(CHSPEC_CHANNEL 16380 (pi->radio_chanspec)); 16381 if (((freq >= 5180) && (freq <= 5230)) 16382 || ((freq >= 5745) && (freq <= 5805))) { 16383 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16384 0, IPA5G_BIAS_FILTER, 0xff); 16385 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16386 1, IPA5G_BIAS_FILTER, 0xff); 16387 } 16388 } 16389 } else { 16390 16391 if (pi->pubpi.radiorev != 5) { 16392 for (coreNum = 0; coreNum <= 1; coreNum++) { 16393 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16394 TXMIX2G_TUNE_BOOST_PU, 0x61); 16395 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16396 TXGM_IDAC_BLEED, 0x70); 16397 } 16398 } 16399 } 16400 16401 if (pi->pubpi.radiorev == 4) { 16402 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x05, 16, 16403 &afectrl_adc_ctrl1_rev7); 16404 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x15, 16, 16405 &afectrl_adc_ctrl1_rev7); 16406 16407 for (coreNum = 0; coreNum <= 1; coreNum++) { 16408 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16409 AFE_VCM_CAL_MASTER, 0x0); 16410 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16411 AFE_SET_VCM_I, 0x3f); 16412 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16413 AFE_SET_VCM_Q, 0x3f); 16414 } 16415 } else { 16416 mod_phy_reg(pi, 0xa6, (0x1 << 2), (0x1 << 2)); 16417 mod_phy_reg(pi, 0x8f, (0x1 << 2), (0x1 << 2)); 16418 mod_phy_reg(pi, 0xa7, (0x1 << 2), (0x1 << 2)); 16419 mod_phy_reg(pi, 0xa5, (0x1 << 2), (0x1 << 2)); 16420 16421 mod_phy_reg(pi, 0xa6, (0x1 << 0), 0); 16422 mod_phy_reg(pi, 0x8f, (0x1 << 0), (0x1 << 0)); 16423 mod_phy_reg(pi, 0xa7, (0x1 << 0), 0); 16424 mod_phy_reg(pi, 0xa5, (0x1 << 0), (0x1 << 0)); 16425 16426 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x05, 16, 16427 &afectrl_adc_ctrl2_rev7); 16428 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x15, 16, 16429 &afectrl_adc_ctrl2_rev7); 16430 16431 mod_phy_reg(pi, 0xa6, (0x1 << 2), 0); 16432 mod_phy_reg(pi, 0x8f, (0x1 << 2), 0); 16433 mod_phy_reg(pi, 0xa7, (0x1 << 2), 0); 16434 mod_phy_reg(pi, 0xa5, (0x1 << 2), 0); 16435 } 16436 16437 write_phy_reg(pi, 0x6a, 0x2); 16438 16439 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 256, 32, 16440 &min_nvar_offset_6mbps); 16441 16442 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x138, 16, 16443 &rfseq_pktgn_lpf_hpc_rev7); 16444 16445 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x141, 16, 16446 &rfseq_pktgn_lpf_h_hpc_rev7); 16447 16448 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 3, 0x133, 16, 16449 &rfseq_htpktgn_lpf_hpc_rev7); 16450 16451 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x146, 16, 16452 &rfseq_cckpktgn_lpf_hpc_rev7); 16453 16454 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x123, 16, 16455 &rfseq_tx2rx_lpf_h_hpc_rev7); 16456 16457 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x12A, 16, 16458 &rfseq_rx2tx_lpf_h_hpc_rev7); 16459 16460 if (CHSPEC_IS40(pi->radio_chanspec) == 0) { 16461 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16462 32, &min_nvar_val); 16463 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16464 127, 32, &min_nvar_val); 16465 } else { 16466 min_nvar_val = noise_var_tbl_rev7[3]; 16467 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16468 32, &min_nvar_val); 16469 16470 min_nvar_val = noise_var_tbl_rev7[127]; 16471 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16472 127, 32, &min_nvar_val); 16473 } 16474 16475 wlc_phy_workarounds_nphy_gainctrl(pi); 16476 16477 pdetrange = (CHSPEC_IS5G(pi->radio_chanspec)) ? 16478 pi->srom_fem5g.pdetrange : pi->srom_fem2g.pdetrange; 16479 16480 if (pdetrange == 0) { 16481 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 16482 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16483 aux_adc_vmid_rev7_core0[3] = 0x70; 16484 aux_adc_vmid_rev7_core1[3] = 0x70; 16485 aux_adc_gain_rev7[3] = 2; 16486 } else { 16487 aux_adc_vmid_rev7_core0[3] = 0x80; 16488 aux_adc_vmid_rev7_core1[3] = 0x80; 16489 aux_adc_gain_rev7[3] = 3; 16490 } 16491 } else if (pdetrange == 1) { 16492 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16493 aux_adc_vmid_rev7_core0[3] = 0x7c; 16494 aux_adc_vmid_rev7_core1[3] = 0x7c; 16495 aux_adc_gain_rev7[3] = 2; 16496 } else { 16497 aux_adc_vmid_rev7_core0[3] = 0x8c; 16498 aux_adc_vmid_rev7_core1[3] = 0x8c; 16499 aux_adc_gain_rev7[3] = 1; 16500 } 16501 } else if (pdetrange == 2) { 16502 if (pi->pubpi.radioid == BCM2057_ID) { 16503 if ((pi->pubpi.radiorev == 5) 16504 || (pi->pubpi.radiorev == 7) 16505 || (pi->pubpi.radiorev == 8)) { 16506 if (chan_freq_range == 16507 WL_CHAN_FREQ_RANGE_2G) { 16508 aux_adc_vmid_rev7_core0[3] = 0x8c; 16509 aux_adc_vmid_rev7_core1[3] = 0x8c; 16510 aux_adc_gain_rev7[3] = 0; 16511 } else { 16512 aux_adc_vmid_rev7_core0[3] = 0x96; 16513 aux_adc_vmid_rev7_core1[3] = 0x96; 16514 aux_adc_gain_rev7[3] = 0; 16515 } 16516 } 16517 } 16518 16519 } else if (pdetrange == 3) { 16520 if (chan_freq_range == WL_CHAN_FREQ_RANGE_2G) { 16521 aux_adc_vmid_rev7_core0[3] = 0x89; 16522 aux_adc_vmid_rev7_core1[3] = 0x89; 16523 aux_adc_gain_rev7[3] = 0; 16524 } 16525 16526 } else if (pdetrange == 5) { 16527 16528 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16529 aux_adc_vmid_rev7_core0[3] = 0x80; 16530 aux_adc_vmid_rev7_core1[3] = 0x80; 16531 aux_adc_gain_rev7[3] = 3; 16532 } else { 16533 aux_adc_vmid_rev7_core0[3] = 0x70; 16534 aux_adc_vmid_rev7_core1[3] = 0x70; 16535 aux_adc_gain_rev7[3] = 2; 16536 } 16537 } 16538 16539 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x08, 16, 16540 &aux_adc_vmid_rev7_core0); 16541 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x18, 16, 16542 &aux_adc_vmid_rev7_core1); 16543 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x0c, 16, 16544 &aux_adc_gain_rev7); 16545 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x1c, 16, 16546 &aux_adc_gain_rev7); 16547 } 16548 16549 static void wlc_phy_workarounds_nphy_rev3(struct brcms_phy *pi) 16550 { 16551 static const u8 rfseq_tx2rx_events_rev3[] = { 16552 NPHY_REV3_RFSEQ_CMD_EXT_PA, 16553 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16554 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16555 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16556 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16557 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16558 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16559 NPHY_REV3_RFSEQ_CMD_END 16560 }; 16561 static const u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 }; 16562 u8 rfseq_rx2tx_events_rev3[] = { 16563 NPHY_REV3_RFSEQ_CMD_NOP, 16564 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16565 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16566 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16567 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16568 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16569 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16570 NPHY_REV3_RFSEQ_CMD_EXT_PA, 16571 NPHY_REV3_RFSEQ_CMD_END 16572 }; 16573 u8 rfseq_rx2tx_dlys_rev3[] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 }; 16574 static const u8 rfseq_rx2tx_events_rev3_ipa[] = { 16575 NPHY_REV3_RFSEQ_CMD_NOP, 16576 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16577 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16578 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16579 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16580 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16581 NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS, 16582 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16583 NPHY_REV3_RFSEQ_CMD_END 16584 }; 16585 static const u8 rfseq_rx2tx_dlys_rev3_ipa[] = 16586 { 8, 6, 6, 4, 4, 16, 43, 1, 1 }; 16587 s16 alpha0, alpha1, alpha2; 16588 s16 beta0, beta1, beta2; 16589 u32 leg_data_weights, ht_data_weights, nss1_data_weights, 16590 stbc_data_weights; 16591 u8 chan_freq_range = 0; 16592 static const u16 dac_control = 0x0002; 16593 u16 aux_adc_vmid_rev4[] = { 0xa2, 0xb4, 0xb4, 0x89 }; 16594 u16 aux_adc_vmid_rev3[] = { 0xa2, 0xb4, 0xb4, 0x89 }; 16595 u16 *aux_adc_vmid; 16596 u16 aux_adc_gain_rev4[] = { 0x02, 0x02, 0x02, 0x00 }; 16597 u16 aux_adc_gain_rev3[] = { 0x02, 0x02, 0x02, 0x00 }; 16598 u16 *aux_adc_gain; 16599 static const u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 }; 16600 static const u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 }; 16601 s32 min_nvar_val = 0x18d; 16602 u8 pdetrange; 16603 u8 triso; 16604 16605 write_phy_reg(pi, 0x23f, 0x1f8); 16606 write_phy_reg(pi, 0x240, 0x1f8); 16607 16608 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16609 1, 0, 32, &leg_data_weights); 16610 leg_data_weights = leg_data_weights & 0xffffff; 16611 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16612 1, 0, 32, &leg_data_weights); 16613 16614 alpha0 = 293; 16615 alpha1 = 435; 16616 alpha2 = 261; 16617 beta0 = 366; 16618 beta1 = 205; 16619 beta2 = 32; 16620 write_phy_reg(pi, 0x145, alpha0); 16621 write_phy_reg(pi, 0x146, alpha1); 16622 write_phy_reg(pi, 0x147, alpha2); 16623 write_phy_reg(pi, 0x148, beta0); 16624 write_phy_reg(pi, 0x149, beta1); 16625 write_phy_reg(pi, 0x14a, beta2); 16626 16627 write_phy_reg(pi, 0x38, 0xC); 16628 write_phy_reg(pi, 0x2ae, 0xC); 16629 16630 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, 16631 rfseq_tx2rx_events_rev3, 16632 rfseq_tx2rx_dlys_rev3, 16633 ARRAY_SIZE(rfseq_tx2rx_events_rev3)); 16634 16635 if (PHY_IPA(pi)) 16636 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, 16637 rfseq_rx2tx_events_rev3_ipa, 16638 rfseq_rx2tx_dlys_rev3_ipa, 16639 ARRAY_SIZE (rfseq_rx2tx_events_rev3_ipa)); 16640 16641 if ((pi->sh->hw_phyrxchain != 0x3) && 16642 (pi->sh->hw_phyrxchain != pi->sh->hw_phytxchain)) { 16643 16644 if (PHY_IPA(pi)) { 16645 rfseq_rx2tx_dlys_rev3[5] = 59; 16646 rfseq_rx2tx_dlys_rev3[6] = 1; 16647 rfseq_rx2tx_events_rev3[7] = NPHY_REV3_RFSEQ_CMD_END; 16648 } 16649 16650 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, 16651 rfseq_rx2tx_events_rev3, 16652 rfseq_rx2tx_dlys_rev3, 16653 ARRAY_SIZE (rfseq_rx2tx_events_rev3)); 16654 } 16655 16656 if (CHSPEC_IS2G(pi->radio_chanspec)) 16657 write_phy_reg(pi, 0x6a, 0x2); 16658 else 16659 write_phy_reg(pi, 0x6a, 0x9c40); 16660 16661 mod_phy_reg(pi, 0x294, (0xf << 8), (7 << 8)); 16662 16663 if (CHSPEC_IS40(pi->radio_chanspec) == 0) { 16664 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16665 32, &min_nvar_val); 16666 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16667 127, 32, &min_nvar_val); 16668 } else { 16669 min_nvar_val = noise_var_tbl_rev3[3]; 16670 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16671 32, &min_nvar_val); 16672 16673 min_nvar_val = noise_var_tbl_rev3[127]; 16674 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16675 127, 32, &min_nvar_val); 16676 } 16677 16678 wlc_phy_workarounds_nphy_gainctrl(pi); 16679 16680 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x00, 16, 16681 &dac_control); 16682 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16, 16683 &dac_control); 16684 16685 pdetrange = (CHSPEC_IS5G(pi->radio_chanspec)) ? 16686 pi->srom_fem5g.pdetrange : pi->srom_fem2g.pdetrange; 16687 16688 if (pdetrange == 0) { 16689 if (NREV_GE(pi->pubpi.phy_rev, 4)) { 16690 aux_adc_vmid = aux_adc_vmid_rev4; 16691 aux_adc_gain = aux_adc_gain_rev4; 16692 } else { 16693 aux_adc_vmid = aux_adc_vmid_rev3; 16694 aux_adc_gain = aux_adc_gain_rev3; 16695 } 16696 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 16697 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16698 switch (chan_freq_range) { 16699 case WL_CHAN_FREQ_RANGE_5GL: 16700 aux_adc_vmid[3] = 0x89; 16701 aux_adc_gain[3] = 0; 16702 break; 16703 case WL_CHAN_FREQ_RANGE_5GM: 16704 aux_adc_vmid[3] = 0x89; 16705 aux_adc_gain[3] = 0; 16706 break; 16707 case WL_CHAN_FREQ_RANGE_5GH: 16708 aux_adc_vmid[3] = 0x89; 16709 aux_adc_gain[3] = 0; 16710 break; 16711 default: 16712 break; 16713 } 16714 } 16715 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16716 0x08, 16, aux_adc_vmid); 16717 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16718 0x18, 16, aux_adc_vmid); 16719 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16720 0x0c, 16, aux_adc_gain); 16721 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16722 0x1c, 16, aux_adc_gain); 16723 } else if (pdetrange == 1) { 16724 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16725 0x08, 16, sk_adc_vmid); 16726 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16727 0x18, 16, sk_adc_vmid); 16728 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16729 0x0c, 16, sk_adc_gain); 16730 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16731 0x1c, 16, sk_adc_gain); 16732 } else if (pdetrange == 2) { 16733 16734 u16 bcm_adc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x74 }; 16735 u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x04 }; 16736 16737 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 16738 chan_freq_range = 16739 wlc_phy_get_chan_freq_range_nphy(pi, 0); 16740 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16741 bcm_adc_vmid[3] = 0x8e; 16742 bcm_adc_gain[3] = 0x03; 16743 } else { 16744 bcm_adc_vmid[3] = 0x94; 16745 bcm_adc_gain[3] = 0x03; 16746 } 16747 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 16748 bcm_adc_vmid[3] = 0x84; 16749 bcm_adc_gain[3] = 0x02; 16750 } 16751 16752 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16753 0x08, 16, bcm_adc_vmid); 16754 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16755 0x18, 16, bcm_adc_vmid); 16756 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16757 0x0c, 16, bcm_adc_gain); 16758 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16759 0x1c, 16, bcm_adc_gain); 16760 } else if (pdetrange == 3) { 16761 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 16762 if ((NREV_GE(pi->pubpi.phy_rev, 4)) && 16763 (chan_freq_range == WL_CHAN_FREQ_RANGE_2G)) { 16764 u16 auxadc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x270 }; 16765 u16 auxadc_gain[] = { 0x02, 0x02, 0x02, 0x00 }; 16766 16767 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16768 0x08, 16, auxadc_vmid); 16769 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16770 0x18, 16, auxadc_vmid); 16771 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16772 0x0c, 16, auxadc_gain); 16773 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16774 0x1c, 16, auxadc_gain); 16775 } 16776 } else if ((pdetrange == 4) || (pdetrange == 5)) { 16777 u16 bcm_adc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x0 }; 16778 u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x0 }; 16779 u16 Vmid[2], Av[2]; 16780 16781 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 16782 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16783 Vmid[0] = (pdetrange == 4) ? 0x8e : 0x89; 16784 Vmid[1] = (pdetrange == 4) ? 0x96 : 0x89; 16785 Av[0] = (pdetrange == 4) ? 2 : 0; 16786 Av[1] = (pdetrange == 4) ? 2 : 0; 16787 } else { 16788 Vmid[0] = (pdetrange == 4) ? 0x89 : 0x74; 16789 Vmid[1] = (pdetrange == 4) ? 0x8b : 0x70; 16790 Av[0] = (pdetrange == 4) ? 2 : 0; 16791 Av[1] = (pdetrange == 4) ? 2 : 0; 16792 } 16793 16794 bcm_adc_vmid[3] = Vmid[0]; 16795 bcm_adc_gain[3] = Av[0]; 16796 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16797 0x08, 16, bcm_adc_vmid); 16798 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16799 0x0c, 16, bcm_adc_gain); 16800 16801 bcm_adc_vmid[3] = Vmid[1]; 16802 bcm_adc_gain[3] = Av[1]; 16803 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16804 0x18, 16, bcm_adc_vmid); 16805 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16806 0x1c, 16, bcm_adc_gain); 16807 } 16808 16809 write_radio_reg(pi, (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX0), 0x0); 16810 write_radio_reg(pi, (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX1), 0x0); 16811 16812 write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX0), 0x6); 16813 write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX1), 0x6); 16814 16815 write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX0), 0x7); 16816 write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX1), 0x7); 16817 16818 write_radio_reg(pi, (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX0), 0x88); 16819 write_radio_reg(pi, (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX1), 0x88); 16820 16821 write_radio_reg(pi, (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX0), 0x0); 16822 write_radio_reg(pi, (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX1), 0x0); 16823 16824 write_radio_reg(pi, (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX0), 0x0); 16825 write_radio_reg(pi, (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX1), 0x0); 16826 16827 triso = (CHSPEC_IS5G(pi->radio_chanspec)) ? 16828 pi->srom_fem5g.triso : pi->srom_fem2g.triso; 16829 if (triso == 7) { 16830 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0); 16831 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1); 16832 } 16833 16834 wlc_phy_war_txchain_upd_nphy(pi, pi->sh->hw_phytxchain); 16835 16836 if (((pi->sh->boardflags2 & BFL2_APLL_WAR) && 16837 (CHSPEC_IS5G(pi->radio_chanspec))) || 16838 (((pi->sh->boardflags2 & BFL2_GPLL_WAR) || 16839 (pi->sh->boardflags2 & BFL2_GPLL_WAR2)) && 16840 (CHSPEC_IS2G(pi->radio_chanspec)))) { 16841 nss1_data_weights = 0x00088888; 16842 ht_data_weights = 0x00088888; 16843 stbc_data_weights = 0x00088888; 16844 } else { 16845 nss1_data_weights = 0x88888888; 16846 ht_data_weights = 0x88888888; 16847 stbc_data_weights = 0x88888888; 16848 } 16849 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16850 1, 1, 32, &nss1_data_weights); 16851 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16852 1, 2, 32, &ht_data_weights); 16853 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16854 1, 3, 32, &stbc_data_weights); 16855 16856 if (NREV_IS(pi->pubpi.phy_rev, 4)) { 16857 if (CHSPEC_IS5G(pi->radio_chanspec)) { 16858 write_radio_reg(pi, 16859 RADIO_2056_TX_GMBB_IDAC | 16860 RADIO_2056_TX0, 0x70); 16861 write_radio_reg(pi, 16862 RADIO_2056_TX_GMBB_IDAC | 16863 RADIO_2056_TX1, 0x70); 16864 } 16865 } 16866 16867 if (!pi->edcrs_threshold_lock) { 16868 write_phy_reg(pi, 0x224, 0x3eb); 16869 write_phy_reg(pi, 0x225, 0x3eb); 16870 write_phy_reg(pi, 0x226, 0x341); 16871 write_phy_reg(pi, 0x227, 0x341); 16872 write_phy_reg(pi, 0x228, 0x42b); 16873 write_phy_reg(pi, 0x229, 0x42b); 16874 write_phy_reg(pi, 0x22a, 0x381); 16875 write_phy_reg(pi, 0x22b, 0x381); 16876 write_phy_reg(pi, 0x22c, 0x42b); 16877 write_phy_reg(pi, 0x22d, 0x42b); 16878 write_phy_reg(pi, 0x22e, 0x381); 16879 write_phy_reg(pi, 0x22f, 0x381); 16880 } 16881 16882 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 16883 16884 if (pi->sh->boardflags2 & BFL2_SINGLEANT_CCK) 16885 wlapi_bmac_mhf(pi->sh->physhim, MHF4, 16886 MHF4_BPHY_TXCORE0, 16887 MHF4_BPHY_TXCORE0, BRCM_BAND_ALL); 16888 } 16889 } 16890 16891 static void wlc_phy_workarounds_nphy_rev1(struct brcms_phy *pi) 16892 { 16893 static const u8 rfseq_rx2tx_events[] = { 16894 NPHY_RFSEQ_CMD_NOP, 16895 NPHY_RFSEQ_CMD_RXG_FBW, 16896 NPHY_RFSEQ_CMD_TR_SWITCH, 16897 NPHY_RFSEQ_CMD_CLR_HIQ_DIS, 16898 NPHY_RFSEQ_CMD_RXPD_TXPD, 16899 NPHY_RFSEQ_CMD_TX_GAIN, 16900 NPHY_RFSEQ_CMD_EXT_PA 16901 }; 16902 u8 rfseq_rx2tx_dlys[] = { 8, 6, 6, 2, 4, 60, 1 }; 16903 static const u8 rfseq_tx2rx_events[] = { 16904 NPHY_RFSEQ_CMD_NOP, 16905 NPHY_RFSEQ_CMD_EXT_PA, 16906 NPHY_RFSEQ_CMD_TX_GAIN, 16907 NPHY_RFSEQ_CMD_RXPD_TXPD, 16908 NPHY_RFSEQ_CMD_TR_SWITCH, 16909 NPHY_RFSEQ_CMD_RXG_FBW, 16910 NPHY_RFSEQ_CMD_CLR_HIQ_DIS 16911 }; 16912 static const u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 }; 16913 s16 alpha0, alpha1, alpha2; 16914 s16 beta0, beta1, beta2; 16915 u16 regval; 16916 16917 if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD || 16918 (pi->sh->boardtype == 0x8b)) { 16919 uint i; 16920 u8 war_dlys[] = { 1, 6, 6, 2, 4, 20, 1 }; 16921 for (i = 0; i < ARRAY_SIZE(rfseq_rx2tx_dlys); i++) 16922 rfseq_rx2tx_dlys[i] = war_dlys[i]; 16923 } 16924 16925 if (CHSPEC_IS5G(pi->radio_chanspec) && pi->phy_5g_pwrgain) { 16926 and_radio_reg(pi, RADIO_2055_CORE1_TX_RF_SPARE, 0xf7); 16927 and_radio_reg(pi, RADIO_2055_CORE2_TX_RF_SPARE, 0xf7); 16928 } else { 16929 or_radio_reg(pi, RADIO_2055_CORE1_TX_RF_SPARE, 0x8); 16930 or_radio_reg(pi, RADIO_2055_CORE2_TX_RF_SPARE, 0x8); 16931 } 16932 16933 regval = 0x000a; 16934 wlc_phy_table_write_nphy(pi, 8, 1, 0, 16, ®val); 16935 wlc_phy_table_write_nphy(pi, 8, 1, 0x10, 16, ®val); 16936 16937 if (NREV_LT(pi->pubpi.phy_rev, 3)) { 16938 regval = 0xcdaa; 16939 wlc_phy_table_write_nphy(pi, 8, 1, 0x02, 16, ®val); 16940 wlc_phy_table_write_nphy(pi, 8, 1, 0x12, 16, ®val); 16941 } 16942 16943 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 16944 regval = 0x0000; 16945 wlc_phy_table_write_nphy(pi, 8, 1, 0x08, 16, ®val); 16946 wlc_phy_table_write_nphy(pi, 8, 1, 0x18, 16, ®val); 16947 16948 regval = 0x7aab; 16949 wlc_phy_table_write_nphy(pi, 8, 1, 0x07, 16, ®val); 16950 wlc_phy_table_write_nphy(pi, 8, 1, 0x17, 16, ®val); 16951 16952 regval = 0x0800; 16953 wlc_phy_table_write_nphy(pi, 8, 1, 0x06, 16, ®val); 16954 wlc_phy_table_write_nphy(pi, 8, 1, 0x16, 16, ®val); 16955 } 16956 16957 write_phy_reg(pi, 0xf8, 0x02d8); 16958 write_phy_reg(pi, 0xf9, 0x0301); 16959 write_phy_reg(pi, 0xfa, 0x02d8); 16960 write_phy_reg(pi, 0xfb, 0x0301); 16961 16962 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, rfseq_rx2tx_events, 16963 rfseq_rx2tx_dlys, 16964 ARRAY_SIZE(rfseq_rx2tx_events)); 16965 16966 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, rfseq_tx2rx_events, 16967 rfseq_tx2rx_dlys, 16968 ARRAY_SIZE(rfseq_tx2rx_events)); 16969 16970 wlc_phy_workarounds_nphy_gainctrl(pi); 16971 16972 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 16973 16974 if (read_phy_reg(pi, 0xa0) & NPHY_MLenable) 16975 wlapi_bmac_mhf(pi->sh->physhim, MHF3, 16976 MHF3_NPHY_MLADV_WAR, 16977 MHF3_NPHY_MLADV_WAR, BRCM_BAND_ALL); 16978 16979 } else if (NREV_IS(pi->pubpi.phy_rev, 2)) { 16980 write_phy_reg(pi, 0x1e3, 0x0); 16981 write_phy_reg(pi, 0x1e4, 0x0); 16982 } 16983 16984 if (NREV_LT(pi->pubpi.phy_rev, 2)) 16985 mod_phy_reg(pi, 0x90, (0x1 << 7), 0); 16986 16987 alpha0 = 293; 16988 alpha1 = 435; 16989 alpha2 = 261; 16990 beta0 = 366; 16991 beta1 = 205; 16992 beta2 = 32; 16993 write_phy_reg(pi, 0x145, alpha0); 16994 write_phy_reg(pi, 0x146, alpha1); 16995 write_phy_reg(pi, 0x147, alpha2); 16996 write_phy_reg(pi, 0x148, beta0); 16997 write_phy_reg(pi, 0x149, beta1); 16998 write_phy_reg(pi, 0x14a, beta2); 16999 17000 if (NREV_LT(pi->pubpi.phy_rev, 3)) { 17001 mod_phy_reg(pi, 0x142, (0xf << 12), 0); 17002 17003 write_phy_reg(pi, 0x192, 0xb5); 17004 write_phy_reg(pi, 0x193, 0xa4); 17005 write_phy_reg(pi, 0x194, 0x0); 17006 } 17007 17008 if (NREV_IS(pi->pubpi.phy_rev, 2)) 17009 mod_phy_reg(pi, 0x221, 17010 NPHY_FORCESIG_DECODEGATEDCLKS, 17011 NPHY_FORCESIG_DECODEGATEDCLKS); 17012 } 17013 17014 static void wlc_phy_workarounds_nphy(struct brcms_phy *pi) 17015 { 17016 if (CHSPEC_IS5G(pi->radio_chanspec)) 17017 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_cck_en, 0); 17018 else 17019 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_cck_en, 1); 17020 17021 if (pi->phyhang_avoid) 17022 wlc_phy_stay_in_carriersearch_nphy(pi, true); 17023 17024 or_phy_reg(pi, 0xb1, NPHY_IQFlip_ADC1 | NPHY_IQFlip_ADC2); 17025 17026 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17027 wlc_phy_workarounds_nphy_rev7(pi); 17028 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 17029 wlc_phy_workarounds_nphy_rev3(pi); 17030 else 17031 wlc_phy_workarounds_nphy_rev1(pi); 17032 17033 if (pi->phyhang_avoid) 17034 wlc_phy_stay_in_carriersearch_nphy(pi, false); 17035 } 17036 17037 static void wlc_phy_extpa_set_tx_digi_filts_nphy(struct brcms_phy *pi) 17038 { 17039 int j, type = 2; 17040 u16 addr_offset = 0x2c5; 17041 17042 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 17043 write_phy_reg(pi, addr_offset + j, 17044 NPHY_IPA_REV4_txdigi_filtcoeffs[type][j]); 17045 } 17046 17047 static void wlc_phy_clip_det_nphy(struct brcms_phy *pi, u8 write, u16 *vals) 17048 { 17049 17050 if (write == 0) { 17051 vals[0] = read_phy_reg(pi, 0x2c); 17052 vals[1] = read_phy_reg(pi, 0x42); 17053 } else { 17054 write_phy_reg(pi, 0x2c, vals[0]); 17055 write_phy_reg(pi, 0x42, vals[1]); 17056 } 17057 } 17058 17059 static void wlc_phy_ipa_internal_tssi_setup_nphy(struct brcms_phy *pi) 17060 { 17061 u8 core; 17062 17063 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17064 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 17065 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17066 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17067 TX_SSI_MASTER, 0x5); 17068 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17069 TX_SSI_MUX, 0xe); 17070 17071 if (pi->pubpi.radiorev != 5) 17072 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 17073 core, TSSIA, 0); 17074 17075 if (!NREV_IS(pi->pubpi.phy_rev, 7)) 17076 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 17077 core, TSSIG, 0x1); 17078 else 17079 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 17080 core, TSSIG, 0x31); 17081 } else { 17082 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17083 TX_SSI_MASTER, 0x9); 17084 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17085 TX_SSI_MUX, 0xc); 17086 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17087 TSSIG, 0); 17088 17089 if (pi->pubpi.radiorev != 5) { 17090 if (!NREV_IS(pi->pubpi.phy_rev, 7)) 17091 WRITE_RADIO_REG3(pi, RADIO_2057, 17092 TX, core, 17093 TSSIA, 0x1); 17094 else 17095 WRITE_RADIO_REG3(pi, RADIO_2057, 17096 TX, core, 17097 TSSIA, 0x31); 17098 } 17099 } 17100 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_VCM_HG, 17101 0); 17102 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_IDAC, 17103 0); 17104 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM, 17105 0x3); 17106 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_MISC1, 17107 0x0); 17108 } 17109 } else { 17110 WRITE_RADIO_SYN(pi, RADIO_2056, RESERVED_ADDR31, 17111 (CHSPEC_IS2G(pi->radio_chanspec)) ? 0x128 : 17112 0x80); 17113 WRITE_RADIO_SYN(pi, RADIO_2056, RESERVED_ADDR30, 0x0); 17114 WRITE_RADIO_SYN(pi, RADIO_2056, GPIO_MASTER1, 0x29); 17115 17116 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 17117 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, IQCAL_VCM_HG, 17118 0x0); 17119 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, IQCAL_IDAC, 17120 0x0); 17121 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_VCM, 17122 0x3); 17123 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TX_AMP_DET, 17124 0x0); 17125 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC1, 17126 0x8); 17127 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC2, 17128 0x0); 17129 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC3, 17130 0x0); 17131 17132 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17133 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17134 TX_SSI_MASTER, 0x5); 17135 17136 if (pi->pubpi.radiorev != 5) 17137 WRITE_RADIO_REG2(pi, RADIO_2056, TX, 17138 core, TSSIA, 0x0); 17139 if (NREV_GE(pi->pubpi.phy_rev, 5)) 17140 WRITE_RADIO_REG2(pi, RADIO_2056, TX, 17141 core, TSSIG, 0x31); 17142 else 17143 WRITE_RADIO_REG2(pi, RADIO_2056, TX, 17144 core, TSSIG, 0x11); 17145 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17146 TX_SSI_MUX, 0xe); 17147 } else { 17148 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17149 TX_SSI_MASTER, 0x9); 17150 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17151 TSSIA, 0x31); 17152 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17153 TSSIG, 0x0); 17154 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17155 TX_SSI_MUX, 0xc); 17156 } 17157 } 17158 } 17159 } 17160 17161 static void 17162 wlc_phy_rfctrl_override_nphy(struct brcms_phy *pi, u16 field, u16 value, 17163 u8 core_mask, u8 off) 17164 { 17165 u8 core_num; 17166 u16 addr = 0, mask = 0, en_addr = 0, val_addr = 0, en_mask = 17167 0, val_mask = 0; 17168 u8 shift = 0, val_shift = 0; 17169 17170 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 17171 17172 en_mask = field; 17173 for (core_num = 0; core_num < 2; core_num++) { 17174 17175 switch (field) { 17176 case (0x1 << 1): 17177 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17178 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17179 val_mask = (0x1 << 0); 17180 val_shift = 0; 17181 break; 17182 case (0x1 << 2): 17183 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17184 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17185 val_mask = (0x1 << 1); 17186 val_shift = 1; 17187 break; 17188 case (0x1 << 3): 17189 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17190 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17191 val_mask = (0x1 << 2); 17192 val_shift = 2; 17193 break; 17194 case (0x1 << 4): 17195 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17196 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17197 val_mask = (0x1 << 4); 17198 val_shift = 4; 17199 break; 17200 case (0x1 << 5): 17201 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17202 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17203 val_mask = (0x1 << 5); 17204 val_shift = 5; 17205 break; 17206 case (0x1 << 6): 17207 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17208 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17209 val_mask = (0x1 << 6); 17210 val_shift = 6; 17211 break; 17212 case (0x1 << 7): 17213 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17214 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17215 val_mask = (0x1 << 7); 17216 val_shift = 7; 17217 break; 17218 case (0x1 << 8): 17219 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17220 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17221 val_mask = (0x7 << 8); 17222 val_shift = 8; 17223 break; 17224 case (0x1 << 11): 17225 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17226 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17227 val_mask = (0x7 << 13); 17228 val_shift = 13; 17229 break; 17230 17231 case (0x1 << 9): 17232 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17233 val_addr = (core_num == 0) ? 0xf8 : 0xfa; 17234 val_mask = (0x7 << 0); 17235 val_shift = 0; 17236 break; 17237 17238 case (0x1 << 10): 17239 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17240 val_addr = (core_num == 0) ? 0xf8 : 0xfa; 17241 val_mask = (0x7 << 4); 17242 val_shift = 4; 17243 break; 17244 17245 case (0x1 << 12): 17246 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17247 val_addr = (core_num == 0) ? 0x7b : 0x7e; 17248 val_mask = (0xffff << 0); 17249 val_shift = 0; 17250 break; 17251 case (0x1 << 13): 17252 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17253 val_addr = (core_num == 0) ? 0x7c : 0x7f; 17254 val_mask = (0xffff << 0); 17255 val_shift = 0; 17256 break; 17257 case (0x1 << 14): 17258 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17259 val_addr = (core_num == 0) ? 0xf9 : 0xfb; 17260 val_mask = (0x3 << 6); 17261 val_shift = 6; 17262 break; 17263 case (0x1 << 0): 17264 en_addr = (core_num == 0) ? 0xe5 : 0xe6; 17265 val_addr = (core_num == 0) ? 0xf9 : 0xfb; 17266 val_mask = (0x1 << 15); 17267 val_shift = 15; 17268 break; 17269 default: 17270 addr = 0xffff; 17271 break; 17272 } 17273 17274 if (off) { 17275 and_phy_reg(pi, en_addr, ~en_mask); 17276 and_phy_reg(pi, val_addr, ~val_mask); 17277 } else { 17278 17279 if ((core_mask == 0) 17280 || (core_mask & (1 << core_num))) { 17281 or_phy_reg(pi, en_addr, en_mask); 17282 17283 if (addr != 0xffff) 17284 mod_phy_reg(pi, val_addr, 17285 val_mask, 17286 (value << 17287 val_shift)); 17288 } 17289 } 17290 } 17291 } else { 17292 17293 if (off) { 17294 and_phy_reg(pi, 0xec, ~field); 17295 value = 0x0; 17296 } else { 17297 or_phy_reg(pi, 0xec, field); 17298 } 17299 17300 for (core_num = 0; core_num < 2; core_num++) { 17301 17302 switch (field) { 17303 case (0x1 << 1): 17304 case (0x1 << 9): 17305 case (0x1 << 12): 17306 case (0x1 << 13): 17307 case (0x1 << 14): 17308 addr = 0x78; 17309 17310 core_mask = 0x1; 17311 break; 17312 case (0x1 << 2): 17313 case (0x1 << 3): 17314 case (0x1 << 4): 17315 case (0x1 << 5): 17316 case (0x1 << 6): 17317 case (0x1 << 7): 17318 case (0x1 << 8): 17319 addr = (core_num == 0) ? 0x7a : 0x7d; 17320 break; 17321 case (0x1 << 10): 17322 addr = (core_num == 0) ? 0x7b : 0x7e; 17323 break; 17324 case (0x1 << 11): 17325 addr = (core_num == 0) ? 0x7c : 0x7f; 17326 break; 17327 default: 17328 addr = 0xffff; 17329 } 17330 17331 switch (field) { 17332 case (0x1 << 1): 17333 mask = (0x7 << 3); 17334 shift = 3; 17335 break; 17336 case (0x1 << 9): 17337 mask = (0x1 << 2); 17338 shift = 2; 17339 break; 17340 case (0x1 << 12): 17341 mask = (0x1 << 8); 17342 shift = 8; 17343 break; 17344 case (0x1 << 13): 17345 mask = (0x1 << 9); 17346 shift = 9; 17347 break; 17348 case (0x1 << 14): 17349 mask = (0xf << 12); 17350 shift = 12; 17351 break; 17352 case (0x1 << 2): 17353 mask = (0x1 << 0); 17354 shift = 0; 17355 break; 17356 case (0x1 << 3): 17357 mask = (0x1 << 1); 17358 shift = 1; 17359 break; 17360 case (0x1 << 4): 17361 mask = (0x1 << 2); 17362 shift = 2; 17363 break; 17364 case (0x1 << 5): 17365 mask = (0x3 << 4); 17366 shift = 4; 17367 break; 17368 case (0x1 << 6): 17369 mask = (0x3 << 6); 17370 shift = 6; 17371 break; 17372 case (0x1 << 7): 17373 mask = (0x1 << 8); 17374 shift = 8; 17375 break; 17376 case (0x1 << 8): 17377 mask = (0x1 << 9); 17378 shift = 9; 17379 break; 17380 case (0x1 << 10): 17381 mask = 0x1fff; 17382 shift = 0x0; 17383 break; 17384 case (0x1 << 11): 17385 mask = 0x1fff; 17386 shift = 0x0; 17387 break; 17388 default: 17389 mask = 0x0; 17390 shift = 0x0; 17391 break; 17392 } 17393 17394 if ((addr != 0xffff) && (core_mask & (1 << core_num))) 17395 mod_phy_reg(pi, addr, mask, (value << shift)); 17396 } 17397 17398 or_phy_reg(pi, 0xec, (0x1 << 0)); 17399 or_phy_reg(pi, 0x78, (0x1 << 0)); 17400 udelay(1); 17401 and_phy_reg(pi, 0xec, ~(0x1 << 0)); 17402 } 17403 } 17404 17405 static void wlc_phy_txpwrctrl_idle_tssi_nphy(struct brcms_phy *pi) 17406 { 17407 s32 rssi_buf[4]; 17408 s32 int_val; 17409 17410 if (SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi) || PHY_MUTED(pi)) 17411 17412 return; 17413 17414 if (PHY_IPA(pi)) 17415 wlc_phy_ipa_internal_tssi_setup_nphy(pi); 17416 17417 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17418 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 17419 0, 0x3, 0, 17420 NPHY_REV7_RFCTRLOVERRIDE_ID0); 17421 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 17422 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 3, 0); 17423 17424 wlc_phy_stopplayback_nphy(pi); 17425 17426 wlc_phy_tx_tone_nphy(pi, 4000, 0, 0, 0, false); 17427 17428 udelay(20); 17429 int_val = 17430 wlc_phy_poll_rssi_nphy(pi, (u8) NPHY_RSSI_SEL_TSSI_2G, rssi_buf, 17431 1); 17432 wlc_phy_stopplayback_nphy(pi); 17433 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, 0); 17434 17435 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17436 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 17437 0, 0x3, 1, 17438 NPHY_REV7_RFCTRLOVERRIDE_ID0); 17439 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 17440 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 3, 1); 17441 17442 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 17443 17444 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = 17445 (u8) ((int_val >> 24) & 0xff); 17446 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = 17447 (u8) ((int_val >> 24) & 0xff); 17448 17449 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = 17450 (u8) ((int_val >> 8) & 0xff); 17451 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = 17452 (u8) ((int_val >> 8) & 0xff); 17453 } else { 17454 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = 17455 (u8) ((int_val >> 24) & 0xff); 17456 17457 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = 17458 (u8) ((int_val >> 8) & 0xff); 17459 17460 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = 17461 (u8) ((int_val >> 16) & 0xff); 17462 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = 17463 (u8) ((int_val) & 0xff); 17464 } 17465 17466 } 17467 17468 static void wlc_phy_txpwr_limit_to_tbl_nphy(struct brcms_phy *pi) 17469 { 17470 u8 idx, idx2, i, delta_ind; 17471 17472 for (idx = TXP_FIRST_CCK; idx <= TXP_LAST_CCK; idx++) 17473 pi->adj_pwr_tbl_nphy[idx] = pi->tx_power_offset[idx]; 17474 17475 for (i = 0; i < 4; i++) { 17476 idx2 = 0; 17477 17478 delta_ind = 0; 17479 17480 switch (i) { 17481 case 0: 17482 17483 if (CHSPEC_IS40(pi->radio_chanspec) 17484 && NPHY_IS_SROM_REINTERPRET) { 17485 idx = TXP_FIRST_MCS_40_SISO; 17486 } else { 17487 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17488 TXP_FIRST_OFDM_40_SISO : TXP_FIRST_OFDM; 17489 delta_ind = 1; 17490 } 17491 break; 17492 17493 case 1: 17494 17495 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17496 TXP_FIRST_MCS_40_CDD : TXP_FIRST_MCS_20_CDD; 17497 break; 17498 17499 case 2: 17500 17501 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17502 TXP_FIRST_MCS_40_STBC : TXP_FIRST_MCS_20_STBC; 17503 break; 17504 17505 case 3: 17506 17507 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17508 TXP_FIRST_MCS_40_SDM : TXP_FIRST_MCS_20_SDM; 17509 break; 17510 } 17511 17512 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17513 pi->tx_power_offset[idx]; 17514 idx = idx + delta_ind; 17515 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17516 pi->tx_power_offset[idx]; 17517 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17518 pi->tx_power_offset[idx]; 17519 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17520 pi->tx_power_offset[idx++]; 17521 17522 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17523 pi->tx_power_offset[idx++]; 17524 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17525 pi->tx_power_offset[idx]; 17526 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17527 pi->tx_power_offset[idx]; 17528 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17529 pi->tx_power_offset[idx++]; 17530 17531 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17532 pi->tx_power_offset[idx++]; 17533 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17534 pi->tx_power_offset[idx]; 17535 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17536 pi->tx_power_offset[idx]; 17537 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17538 pi->tx_power_offset[idx++]; 17539 17540 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17541 pi->tx_power_offset[idx]; 17542 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17543 pi->tx_power_offset[idx++]; 17544 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17545 pi->tx_power_offset[idx]; 17546 idx = idx + 1 - delta_ind; 17547 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17548 pi->tx_power_offset[idx]; 17549 17550 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17551 pi->tx_power_offset[idx]; 17552 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17553 pi->tx_power_offset[idx]; 17554 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17555 pi->tx_power_offset[idx]; 17556 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17557 pi->tx_power_offset[idx]; 17558 } 17559 } 17560 17561 static void wlc_phy_txpwrctrl_pwr_setup_nphy(struct brcms_phy *pi) 17562 { 17563 u32 idx; 17564 s16 a1[2], b0[2], b1[2]; 17565 s8 target_pwr_qtrdbm[2]; 17566 s32 num, den, pwr_est; 17567 u8 chan_freq_range; 17568 u8 idle_tssi[2]; 17569 u32 tbl_id, tbl_len, tbl_offset; 17570 u32 regval[64]; 17571 u8 core; 17572 17573 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { 17574 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); 17575 (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 17576 udelay(1); 17577 } 17578 17579 if (pi->phyhang_avoid) 17580 wlc_phy_stay_in_carriersearch_nphy(pi, true); 17581 17582 or_phy_reg(pi, 0x122, (0x1 << 0)); 17583 17584 if (NREV_GE(pi->pubpi.phy_rev, 3)) 17585 and_phy_reg(pi, 0x1e7, 0x7fff); 17586 else 17587 or_phy_reg(pi, 0x1e7, (0x1 << 15)); 17588 17589 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) 17590 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); 17591 17592 if (pi->sh->sromrev < 4) { 17593 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; 17594 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; 17595 a1[0] = -424; 17596 a1[1] = -424; 17597 b0[0] = 5612; 17598 b0[1] = 5612; 17599 b1[1] = -1393; 17600 b1[0] = -1393; 17601 } else { 17602 17603 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 17604 switch (chan_freq_range) { 17605 case WL_CHAN_FREQ_RANGE_2G: 17606 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; 17607 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; 17608 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_a1; 17609 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_a1; 17610 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_b0; 17611 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_b0; 17612 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_b1; 17613 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_b1; 17614 break; 17615 case WL_CHAN_FREQ_RANGE_5GL: 17616 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; 17617 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; 17618 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1; 17619 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1; 17620 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0; 17621 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0; 17622 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1; 17623 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1; 17624 break; 17625 case WL_CHAN_FREQ_RANGE_5GM: 17626 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; 17627 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; 17628 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_a1; 17629 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_a1; 17630 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_b0; 17631 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_b0; 17632 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_b1; 17633 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_b1; 17634 break; 17635 case WL_CHAN_FREQ_RANGE_5GH: 17636 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; 17637 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; 17638 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1; 17639 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1; 17640 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0; 17641 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0; 17642 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1; 17643 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1; 17644 break; 17645 default: 17646 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; 17647 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; 17648 a1[0] = -424; 17649 a1[1] = -424; 17650 b0[0] = 5612; 17651 b0[1] = 5612; 17652 b1[1] = -1393; 17653 b1[0] = -1393; 17654 break; 17655 } 17656 } 17657 17658 /* use the provided transmit power */ 17659 target_pwr_qtrdbm[0] = (s8) pi->tx_power_max; 17660 target_pwr_qtrdbm[1] = (s8) pi->tx_power_max; 17661 17662 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 17663 if (pi->srom_fem2g.tssipos) 17664 or_phy_reg(pi, 0x1e9, (0x1 << 14)); 17665 17666 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17667 for (core = 0; core <= 1; core++) { 17668 if (PHY_IPA(pi)) { 17669 if (CHSPEC_IS2G(pi->radio_chanspec)) 17670 WRITE_RADIO_REG3(pi, RADIO_2057, 17671 TX, core, 17672 TX_SSI_MUX, 17673 0xe); 17674 else 17675 WRITE_RADIO_REG3(pi, RADIO_2057, 17676 TX, core, 17677 TX_SSI_MUX, 17678 0xc); 17679 } 17680 } 17681 } else { 17682 if (PHY_IPA(pi)) { 17683 17684 write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | 17685 RADIO_2056_TX0, 17686 (CHSPEC_IS5G 17687 (pi->radio_chanspec)) ? 17688 0xc : 0xe); 17689 write_radio_reg(pi, 17690 RADIO_2056_TX_TX_SSI_MUX | 17691 RADIO_2056_TX1, 17692 (CHSPEC_IS5G 17693 (pi->radio_chanspec)) ? 17694 0xc : 0xe); 17695 } else { 17696 17697 write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | 17698 RADIO_2056_TX0, 0x11); 17699 write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | 17700 RADIO_2056_TX1, 0x11); 17701 } 17702 } 17703 } 17704 17705 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { 17706 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); 17707 (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 17708 udelay(1); 17709 } 17710 17711 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17712 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 17713 (NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 << 0)); 17714 else 17715 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 17716 (NPHY_TxPwrCtrlCmd_pwrIndex_init << 0)); 17717 17718 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17719 mod_phy_reg(pi, 0x222, (0xff << 0), 17720 (NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 << 0)); 17721 else if (NREV_GT(pi->pubpi.phy_rev, 1)) 17722 mod_phy_reg(pi, 0x222, (0xff << 0), 17723 (NPHY_TxPwrCtrlCmd_pwrIndex_init << 0)); 17724 17725 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) 17726 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); 17727 17728 write_phy_reg(pi, 0x1e8, (0x3 << 8) | (240 << 0)); 17729 17730 write_phy_reg(pi, 0x1e9, 17731 (1 << 15) | (idle_tssi[0] << 0) | (idle_tssi[1] << 8)); 17732 17733 write_phy_reg(pi, 0x1ea, 17734 (target_pwr_qtrdbm[0] << 0) | 17735 (target_pwr_qtrdbm[1] << 8)); 17736 17737 tbl_len = 64; 17738 tbl_offset = 0; 17739 for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; 17740 tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { 17741 17742 for (idx = 0; idx < tbl_len; idx++) { 17743 num = 8 * 17744 (16 * b0[tbl_id - 26] + b1[tbl_id - 26] * idx); 17745 den = 32768 + a1[tbl_id - 26] * idx; 17746 pwr_est = max(DIV_ROUND_CLOSEST(4 * num, den), -8); 17747 if (NREV_LT(pi->pubpi.phy_rev, 3)) { 17748 if (idx <= 17749 (uint) (31 - idle_tssi[tbl_id - 26] + 1)) 17750 pwr_est = 17751 max(pwr_est, 17752 target_pwr_qtrdbm 17753 [tbl_id - 26] + 1); 17754 } 17755 regval[idx] = (u32) pwr_est; 17756 } 17757 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, 17758 regval); 17759 } 17760 17761 wlc_phy_txpwr_limit_to_tbl_nphy(pi); 17762 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 84, 64, 8, 17763 pi->adj_pwr_tbl_nphy); 17764 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 84, 64, 8, 17765 pi->adj_pwr_tbl_nphy); 17766 17767 if (pi->phyhang_avoid) 17768 wlc_phy_stay_in_carriersearch_nphy(pi, false); 17769 } 17770 17771 static u32 *wlc_phy_get_ipa_gaintbl_nphy(struct brcms_phy *pi) 17772 { 17773 u32 *tx_pwrctrl_tbl = NULL; 17774 17775 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17776 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17777 if ((pi->pubpi.radiorev == 4) 17778 || (pi->pubpi.radiorev == 6)) 17779 tx_pwrctrl_tbl = 17780 nphy_tpc_txgain_ipa_2g_2057rev4n6; 17781 else if (pi->pubpi.radiorev == 3) 17782 tx_pwrctrl_tbl = 17783 nphy_tpc_txgain_ipa_2g_2057rev3; 17784 else if (pi->pubpi.radiorev == 5) 17785 tx_pwrctrl_tbl = 17786 nphy_tpc_txgain_ipa_2g_2057rev5; 17787 else if ((pi->pubpi.radiorev == 7) 17788 || (pi->pubpi.radiorev == 8)) 17789 tx_pwrctrl_tbl = 17790 nphy_tpc_txgain_ipa_2g_2057rev7; 17791 } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { 17792 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev6; 17793 if (pi->sh->chip == BCMA_CHIP_ID_BCM47162) 17794 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; 17795 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 17796 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; 17797 } else { 17798 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa; 17799 } 17800 } else { 17801 17802 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17803 if ((pi->pubpi.radiorev == 3) || 17804 (pi->pubpi.radiorev == 4) || 17805 (pi->pubpi.radiorev == 6)) 17806 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_5g_2057; 17807 else if ((pi->pubpi.radiorev == 7) 17808 || (pi->pubpi.radiorev == 8)) 17809 tx_pwrctrl_tbl = 17810 nphy_tpc_txgain_ipa_5g_2057rev7; 17811 } else { 17812 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_5g; 17813 } 17814 } 17815 17816 return tx_pwrctrl_tbl; 17817 } 17818 17819 static void wlc_phy_restore_rssical_nphy(struct brcms_phy *pi) 17820 { 17821 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17822 if (pi->nphy_rssical_chanspec_2G == 0) 17823 return; 17824 17825 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17826 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0, 17827 RADIO_2057_VCM_MASK, 17828 pi->rssical_cache. 17829 rssical_radio_regs_2G[0]); 17830 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1, 17831 RADIO_2057_VCM_MASK, 17832 pi->rssical_cache. 17833 rssical_radio_regs_2G[1]); 17834 } else { 17835 mod_radio_reg(pi, 17836 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX0, 17837 RADIO_2056_VCM_MASK, 17838 pi->rssical_cache. 17839 rssical_radio_regs_2G[0]); 17840 mod_radio_reg(pi, 17841 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX1, 17842 RADIO_2056_VCM_MASK, 17843 pi->rssical_cache. 17844 rssical_radio_regs_2G[1]); 17845 } 17846 17847 write_phy_reg(pi, 0x1a6, 17848 pi->rssical_cache.rssical_phyregs_2G[0]); 17849 write_phy_reg(pi, 0x1ac, 17850 pi->rssical_cache.rssical_phyregs_2G[1]); 17851 write_phy_reg(pi, 0x1b2, 17852 pi->rssical_cache.rssical_phyregs_2G[2]); 17853 write_phy_reg(pi, 0x1b8, 17854 pi->rssical_cache.rssical_phyregs_2G[3]); 17855 write_phy_reg(pi, 0x1a4, 17856 pi->rssical_cache.rssical_phyregs_2G[4]); 17857 write_phy_reg(pi, 0x1aa, 17858 pi->rssical_cache.rssical_phyregs_2G[5]); 17859 write_phy_reg(pi, 0x1b0, 17860 pi->rssical_cache.rssical_phyregs_2G[6]); 17861 write_phy_reg(pi, 0x1b6, 17862 pi->rssical_cache.rssical_phyregs_2G[7]); 17863 write_phy_reg(pi, 0x1a5, 17864 pi->rssical_cache.rssical_phyregs_2G[8]); 17865 write_phy_reg(pi, 0x1ab, 17866 pi->rssical_cache.rssical_phyregs_2G[9]); 17867 write_phy_reg(pi, 0x1b1, 17868 pi->rssical_cache.rssical_phyregs_2G[10]); 17869 write_phy_reg(pi, 0x1b7, 17870 pi->rssical_cache.rssical_phyregs_2G[11]); 17871 17872 } else { 17873 if (pi->nphy_rssical_chanspec_5G == 0) 17874 return; 17875 17876 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17877 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0, 17878 RADIO_2057_VCM_MASK, 17879 pi->rssical_cache. 17880 rssical_radio_regs_5G[0]); 17881 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1, 17882 RADIO_2057_VCM_MASK, 17883 pi->rssical_cache. 17884 rssical_radio_regs_5G[1]); 17885 } else { 17886 mod_radio_reg(pi, 17887 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX0, 17888 RADIO_2056_VCM_MASK, 17889 pi->rssical_cache. 17890 rssical_radio_regs_5G[0]); 17891 mod_radio_reg(pi, 17892 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX1, 17893 RADIO_2056_VCM_MASK, 17894 pi->rssical_cache. 17895 rssical_radio_regs_5G[1]); 17896 } 17897 17898 write_phy_reg(pi, 0x1a6, 17899 pi->rssical_cache.rssical_phyregs_5G[0]); 17900 write_phy_reg(pi, 0x1ac, 17901 pi->rssical_cache.rssical_phyregs_5G[1]); 17902 write_phy_reg(pi, 0x1b2, 17903 pi->rssical_cache.rssical_phyregs_5G[2]); 17904 write_phy_reg(pi, 0x1b8, 17905 pi->rssical_cache.rssical_phyregs_5G[3]); 17906 write_phy_reg(pi, 0x1a4, 17907 pi->rssical_cache.rssical_phyregs_5G[4]); 17908 write_phy_reg(pi, 0x1aa, 17909 pi->rssical_cache.rssical_phyregs_5G[5]); 17910 write_phy_reg(pi, 0x1b0, 17911 pi->rssical_cache.rssical_phyregs_5G[6]); 17912 write_phy_reg(pi, 0x1b6, 17913 pi->rssical_cache.rssical_phyregs_5G[7]); 17914 write_phy_reg(pi, 0x1a5, 17915 pi->rssical_cache.rssical_phyregs_5G[8]); 17916 write_phy_reg(pi, 0x1ab, 17917 pi->rssical_cache.rssical_phyregs_5G[9]); 17918 write_phy_reg(pi, 0x1b1, 17919 pi->rssical_cache.rssical_phyregs_5G[10]); 17920 write_phy_reg(pi, 0x1b7, 17921 pi->rssical_cache.rssical_phyregs_5G[11]); 17922 } 17923 } 17924 17925 static void wlc_phy_internal_cal_txgain_nphy(struct brcms_phy *pi) 17926 { 17927 u16 txcal_gain[2]; 17928 17929 pi->nphy_txcal_pwr_idx[0] = pi->nphy_cal_orig_pwr_idx[0]; 17930 pi->nphy_txcal_pwr_idx[1] = pi->nphy_cal_orig_pwr_idx[0]; 17931 wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_cal_orig_pwr_idx[0], true); 17932 wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_cal_orig_pwr_idx[1], true); 17933 17934 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 17935 txcal_gain); 17936 17937 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17938 txcal_gain[0] = (txcal_gain[0] & 0xF000) | 0x0F40; 17939 txcal_gain[1] = (txcal_gain[1] & 0xF000) | 0x0F40; 17940 } else { 17941 txcal_gain[0] = (txcal_gain[0] & 0xF000) | 0x0F60; 17942 txcal_gain[1] = (txcal_gain[1] & 0xF000) | 0x0F60; 17943 } 17944 17945 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 17946 txcal_gain); 17947 } 17948 17949 static void wlc_phy_precal_txgain_nphy(struct brcms_phy *pi) 17950 { 17951 bool save_bbmult = false; 17952 u8 txcal_index_2057_rev5n7 = 0; 17953 u8 txcal_index_2057_rev3n4n6 = 10; 17954 17955 if (pi->use_int_tx_iqlo_cal_nphy) { 17956 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17957 if ((pi->pubpi.radiorev == 3) || 17958 (pi->pubpi.radiorev == 4) || 17959 (pi->pubpi.radiorev == 6)) { 17960 17961 pi->nphy_txcal_pwr_idx[0] = 17962 txcal_index_2057_rev3n4n6; 17963 pi->nphy_txcal_pwr_idx[1] = 17964 txcal_index_2057_rev3n4n6; 17965 wlc_phy_txpwr_index_nphy( 17966 pi, 3, 17967 txcal_index_2057_rev3n4n6, 17968 false); 17969 } else { 17970 17971 pi->nphy_txcal_pwr_idx[0] = 17972 txcal_index_2057_rev5n7; 17973 pi->nphy_txcal_pwr_idx[1] = 17974 txcal_index_2057_rev5n7; 17975 wlc_phy_txpwr_index_nphy( 17976 pi, 3, 17977 txcal_index_2057_rev5n7, 17978 false); 17979 } 17980 save_bbmult = true; 17981 17982 } else if (NREV_LT(pi->pubpi.phy_rev, 5)) { 17983 wlc_phy_cal_txgainctrl_nphy(pi, 11, false); 17984 if (pi->sh->hw_phytxchain != 3) { 17985 pi->nphy_txcal_pwr_idx[1] = 17986 pi->nphy_txcal_pwr_idx[0]; 17987 wlc_phy_txpwr_index_nphy(pi, 3, 17988 pi-> 17989 nphy_txcal_pwr_idx[0], 17990 true); 17991 save_bbmult = true; 17992 } 17993 17994 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 17995 if (PHY_IPA(pi)) { 17996 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17997 wlc_phy_cal_txgainctrl_nphy(pi, 12, 17998 false); 17999 } else { 18000 pi->nphy_txcal_pwr_idx[0] = 80; 18001 pi->nphy_txcal_pwr_idx[1] = 80; 18002 wlc_phy_txpwr_index_nphy(pi, 3, 80, 18003 false); 18004 save_bbmult = true; 18005 } 18006 } else { 18007 wlc_phy_internal_cal_txgain_nphy(pi); 18008 save_bbmult = true; 18009 } 18010 18011 } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { 18012 if (PHY_IPA(pi)) { 18013 if (CHSPEC_IS2G(pi->radio_chanspec)) 18014 wlc_phy_cal_txgainctrl_nphy(pi, 12, 18015 false); 18016 else 18017 wlc_phy_cal_txgainctrl_nphy(pi, 14, 18018 false); 18019 } else { 18020 wlc_phy_internal_cal_txgain_nphy(pi); 18021 save_bbmult = true; 18022 } 18023 } 18024 18025 } else { 18026 wlc_phy_cal_txgainctrl_nphy(pi, 10, false); 18027 } 18028 18029 if (save_bbmult) 18030 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, 18031 &pi->nphy_txcal_bbmult); 18032 } 18033 18034 static void 18035 wlc_phy_rfctrlintc_override_nphy(struct brcms_phy *pi, u8 field, u16 value, 18036 u8 core_code) 18037 { 18038 u16 mask; 18039 u16 val; 18040 u8 core; 18041 18042 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18043 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 18044 if (core_code == RADIO_MIMO_CORESEL_CORE1 18045 && core == PHY_CORE_1) 18046 continue; 18047 else if (core_code == RADIO_MIMO_CORESEL_CORE2 18048 && core == PHY_CORE_0) 18049 continue; 18050 18051 if (NREV_LT(pi->pubpi.phy_rev, 7)) { 18052 18053 mask = (0x1 << 10); 18054 val = 1 << 10; 18055 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x91 : 18056 0x92, mask, val); 18057 } 18058 18059 if (field == NPHY_RfctrlIntc_override_OFF) { 18060 18061 write_phy_reg(pi, (core == PHY_CORE_0) ? 0x91 : 18062 0x92, 0); 18063 18064 wlc_phy_force_rfseq_nphy(pi, 18065 NPHY_RFSEQ_RESET2RX); 18066 } else if (field == NPHY_RfctrlIntc_override_TRSW) { 18067 18068 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18069 18070 mask = (0x1 << 6) | (0x1 << 7); 18071 18072 val = value << 6; 18073 mod_phy_reg(pi, 18074 (core == 18075 PHY_CORE_0) ? 0x91 : 0x92, 18076 mask, val); 18077 18078 or_phy_reg(pi, 18079 (core == 18080 PHY_CORE_0) ? 0x91 : 0x92, 18081 (0x1 << 10)); 18082 18083 and_phy_reg(pi, 0x2ff, (u16) 18084 0xffff & ~(0x3 << 14)); 18085 or_phy_reg(pi, 0x2ff, (0x1 << 13)); 18086 or_phy_reg(pi, 0x2ff, (0x1 << 0)); 18087 } else { 18088 18089 mask = (0x1 << 6) | 18090 (0x1 << 7) | 18091 (0x1 << 8) | (0x1 << 9); 18092 val = value << 6; 18093 mod_phy_reg(pi, 18094 (core == 18095 PHY_CORE_0) ? 0x91 : 0x92, 18096 mask, val); 18097 18098 mask = (0x1 << 0); 18099 val = 1 << 0; 18100 mod_phy_reg(pi, 18101 (core == 18102 PHY_CORE_0) ? 0xe7 : 0xec, 18103 mask, val); 18104 18105 mask = (core == PHY_CORE_0) ? 18106 (0x1 << 0) : (0x1 << 1); 18107 val = 1 << ((core == PHY_CORE_0) ? 18108 0 : 1); 18109 mod_phy_reg(pi, 0x78, mask, val); 18110 18111 SPINWAIT(((read_phy_reg(pi, 0x78) & val) 18112 != 0), 10000); 18113 if (WARN(read_phy_reg(pi, 0x78) & val, 18114 "HW error: override failed")) 18115 return; 18116 18117 mask = (0x1 << 0); 18118 val = 0 << 0; 18119 mod_phy_reg(pi, 18120 (core == 18121 PHY_CORE_0) ? 0xe7 : 0xec, 18122 mask, val); 18123 } 18124 } else if (field == NPHY_RfctrlIntc_override_PA) { 18125 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18126 18127 mask = (0x1 << 4) | (0x1 << 5); 18128 18129 if (CHSPEC_IS5G(pi->radio_chanspec)) 18130 val = value << 5; 18131 else 18132 val = value << 4; 18133 18134 mod_phy_reg(pi, 18135 (core == 18136 PHY_CORE_0) ? 0x91 : 0x92, 18137 mask, val); 18138 18139 or_phy_reg(pi, 18140 (core == 18141 PHY_CORE_0) ? 0x91 : 0x92, 18142 (0x1 << 12)); 18143 } else { 18144 18145 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18146 mask = (0x1 << 5); 18147 val = value << 5; 18148 } else { 18149 mask = (0x1 << 4); 18150 val = value << 4; 18151 } 18152 mod_phy_reg(pi, 18153 (core == 18154 PHY_CORE_0) ? 0x91 : 0x92, 18155 mask, val); 18156 } 18157 } else if (field == 18158 NPHY_RfctrlIntc_override_EXT_LNA_PU) { 18159 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18160 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18161 18162 mask = (0x1 << 0); 18163 val = value << 0; 18164 mod_phy_reg(pi, 18165 (core == 18166 PHY_CORE_0) ? 0x91 18167 : 0x92, mask, val); 18168 18169 mask = (0x1 << 2); 18170 mod_phy_reg(pi, 18171 (core == 18172 PHY_CORE_0) ? 0x91 18173 : 0x92, mask, 0); 18174 } else { 18175 18176 mask = (0x1 << 2); 18177 val = value << 2; 18178 mod_phy_reg(pi, 18179 (core == 18180 PHY_CORE_0) ? 0x91 18181 : 0x92, mask, val); 18182 18183 mask = (0x1 << 0); 18184 mod_phy_reg(pi, 18185 (core == 18186 PHY_CORE_0) ? 0x91 18187 : 0x92, mask, 0); 18188 } 18189 18190 mask = (0x1 << 11); 18191 val = 1 << 11; 18192 mod_phy_reg(pi, 18193 (core == 18194 PHY_CORE_0) ? 0x91 : 0x92, 18195 mask, val); 18196 } else { 18197 18198 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18199 mask = (0x1 << 0); 18200 val = value << 0; 18201 } else { 18202 mask = (0x1 << 2); 18203 val = value << 2; 18204 } 18205 mod_phy_reg(pi, 18206 (core == 18207 PHY_CORE_0) ? 0x91 : 0x92, 18208 mask, val); 18209 } 18210 } else if (field == 18211 NPHY_RfctrlIntc_override_EXT_LNA_GAIN) { 18212 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18213 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18214 18215 mask = (0x1 << 1); 18216 val = value << 1; 18217 mod_phy_reg(pi, 18218 (core == 18219 PHY_CORE_0) ? 0x91 18220 : 0x92, mask, val); 18221 18222 mask = (0x1 << 3); 18223 mod_phy_reg(pi, 18224 (core == 18225 PHY_CORE_0) ? 0x91 18226 : 0x92, mask, 0); 18227 } else { 18228 18229 mask = (0x1 << 3); 18230 val = value << 3; 18231 mod_phy_reg(pi, 18232 (core == 18233 PHY_CORE_0) ? 0x91 18234 : 0x92, mask, val); 18235 18236 mask = (0x1 << 1); 18237 mod_phy_reg(pi, 18238 (core == 18239 PHY_CORE_0) ? 0x91 18240 : 0x92, mask, 0); 18241 } 18242 18243 mask = (0x1 << 11); 18244 val = 1 << 11; 18245 mod_phy_reg(pi, 18246 (core == 18247 PHY_CORE_0) ? 0x91 : 0x92, 18248 mask, val); 18249 } else { 18250 18251 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18252 mask = (0x1 << 1); 18253 val = value << 1; 18254 } else { 18255 mask = (0x1 << 3); 18256 val = value << 3; 18257 } 18258 mod_phy_reg(pi, 18259 (core == 18260 PHY_CORE_0) ? 0x91 : 0x92, 18261 mask, val); 18262 } 18263 } 18264 } 18265 } 18266 } 18267 18268 void 18269 wlc_phy_cal_txgainctrl_nphy(struct brcms_phy *pi, s32 dBm_targetpower, 18270 bool debug) 18271 { 18272 int gainctrl_loopidx; 18273 uint core; 18274 u16 m0m1, curr_m0m1; 18275 s32 delta_power; 18276 s32 txpwrindex; 18277 s32 qdBm_power[2]; 18278 u16 orig_BBConfig; 18279 u16 phy_saveregs[4]; 18280 u32 freq_test; 18281 u16 ampl_test = 250; 18282 uint stepsize; 18283 bool phyhang_avoid_state = false; 18284 18285 if (NREV_GE(pi->pubpi.phy_rev, 7)) 18286 stepsize = 2; 18287 else 18288 stepsize = 1; 18289 18290 if (CHSPEC_IS40(pi->radio_chanspec)) 18291 freq_test = 5000; 18292 else 18293 freq_test = 2500; 18294 18295 wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_cal_orig_pwr_idx[0], true); 18296 wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_cal_orig_pwr_idx[1], true); 18297 18298 if (pi->phyhang_avoid) 18299 wlc_phy_stay_in_carriersearch_nphy(pi, true); 18300 18301 phyhang_avoid_state = pi->phyhang_avoid; 18302 pi->phyhang_avoid = false; 18303 18304 phy_saveregs[0] = read_phy_reg(pi, 0x91); 18305 phy_saveregs[1] = read_phy_reg(pi, 0x92); 18306 phy_saveregs[2] = read_phy_reg(pi, 0xe7); 18307 phy_saveregs[3] = read_phy_reg(pi, 0xec); 18308 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_PA, 1, 18309 RADIO_MIMO_CORESEL_CORE1 | 18310 RADIO_MIMO_CORESEL_CORE2); 18311 18312 if (!debug) { 18313 wlc_phy_rfctrlintc_override_nphy(pi, 18314 NPHY_RfctrlIntc_override_TRSW, 18315 0x2, RADIO_MIMO_CORESEL_CORE1); 18316 wlc_phy_rfctrlintc_override_nphy(pi, 18317 NPHY_RfctrlIntc_override_TRSW, 18318 0x8, RADIO_MIMO_CORESEL_CORE2); 18319 } else { 18320 wlc_phy_rfctrlintc_override_nphy(pi, 18321 NPHY_RfctrlIntc_override_TRSW, 18322 0x1, RADIO_MIMO_CORESEL_CORE1); 18323 wlc_phy_rfctrlintc_override_nphy(pi, 18324 NPHY_RfctrlIntc_override_TRSW, 18325 0x7, RADIO_MIMO_CORESEL_CORE2); 18326 } 18327 18328 orig_BBConfig = read_phy_reg(pi, 0x01); 18329 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 18330 18331 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m0m1); 18332 18333 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 18334 txpwrindex = (s32) pi->nphy_cal_orig_pwr_idx[core]; 18335 18336 for (gainctrl_loopidx = 0; gainctrl_loopidx < 2; 18337 gainctrl_loopidx++) { 18338 wlc_phy_tx_tone_nphy(pi, freq_test, ampl_test, 0, 0, 18339 false); 18340 18341 if (core == PHY_CORE_0) 18342 curr_m0m1 = m0m1 & 0xff00; 18343 else 18344 curr_m0m1 = m0m1 & 0x00ff; 18345 18346 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &curr_m0m1); 18347 wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &curr_m0m1); 18348 18349 udelay(50); 18350 18351 wlc_phy_est_tonepwr_nphy(pi, qdBm_power, 18352 NPHY_CAL_TSSISAMPS); 18353 18354 pi->nphy_bb_mult_save = 0; 18355 wlc_phy_stopplayback_nphy(pi); 18356 18357 delta_power = (dBm_targetpower * 4) - qdBm_power[core]; 18358 18359 txpwrindex -= stepsize * delta_power; 18360 if (txpwrindex < 0) 18361 txpwrindex = 0; 18362 else if (txpwrindex > 127) 18363 txpwrindex = 127; 18364 18365 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18366 if (NREV_IS(pi->pubpi.phy_rev, 4) && 18367 (pi->srom_fem5g.extpagain == 3)) { 18368 if (txpwrindex < 30) 18369 txpwrindex = 30; 18370 } 18371 } else { 18372 if (NREV_GE(pi->pubpi.phy_rev, 5) && 18373 (pi->srom_fem2g.extpagain == 3)) { 18374 if (txpwrindex < 50) 18375 txpwrindex = 50; 18376 } 18377 } 18378 18379 wlc_phy_txpwr_index_nphy(pi, (1 << core), 18380 (u8) txpwrindex, true); 18381 } 18382 18383 pi->nphy_txcal_pwr_idx[core] = (u8) txpwrindex; 18384 18385 if (debug) { 18386 u16 radio_gain; 18387 u16 dbg_m0m1; 18388 18389 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &dbg_m0m1); 18390 18391 wlc_phy_tx_tone_nphy(pi, freq_test, ampl_test, 0, 0, 18392 false); 18393 18394 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &dbg_m0m1); 18395 wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &dbg_m0m1); 18396 18397 udelay(100); 18398 18399 wlc_phy_est_tonepwr_nphy(pi, qdBm_power, 18400 NPHY_CAL_TSSISAMPS); 18401 18402 wlc_phy_table_read_nphy(pi, 7, 1, (0x110 + core), 16, 18403 &radio_gain); 18404 18405 mdelay(4000); 18406 pi->nphy_bb_mult_save = 0; 18407 wlc_phy_stopplayback_nphy(pi); 18408 } 18409 } 18410 18411 wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_txcal_pwr_idx[0], true); 18412 wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_txcal_pwr_idx[1], true); 18413 18414 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &pi->nphy_txcal_bbmult); 18415 18416 write_phy_reg(pi, 0x01, orig_BBConfig); 18417 18418 write_phy_reg(pi, 0x91, phy_saveregs[0]); 18419 write_phy_reg(pi, 0x92, phy_saveregs[1]); 18420 write_phy_reg(pi, 0xe7, phy_saveregs[2]); 18421 write_phy_reg(pi, 0xec, phy_saveregs[3]); 18422 18423 pi->phyhang_avoid = phyhang_avoid_state; 18424 18425 if (pi->phyhang_avoid) 18426 wlc_phy_stay_in_carriersearch_nphy(pi, false); 18427 } 18428 18429 static void wlc_phy_savecal_nphy(struct brcms_phy *pi) 18430 { 18431 void *tbl_ptr; 18432 int coreNum; 18433 u16 *txcal_radio_regs = NULL; 18434 18435 if (pi->phyhang_avoid) 18436 wlc_phy_stay_in_carriersearch_nphy(pi, true); 18437 18438 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18439 18440 wlc_phy_rx_iq_coeffs_nphy(pi, 0, 18441 &pi->calibration_cache. 18442 rxcal_coeffs_2G); 18443 18444 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18445 txcal_radio_regs = 18446 pi->calibration_cache.txcal_radio_regs_2G; 18447 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18448 18449 pi->calibration_cache.txcal_radio_regs_2G[0] = 18450 read_radio_reg(pi, 18451 RADIO_2056_TX_LOFT_FINE_I | 18452 RADIO_2056_TX0); 18453 pi->calibration_cache.txcal_radio_regs_2G[1] = 18454 read_radio_reg(pi, 18455 RADIO_2056_TX_LOFT_FINE_Q | 18456 RADIO_2056_TX0); 18457 pi->calibration_cache.txcal_radio_regs_2G[2] = 18458 read_radio_reg(pi, 18459 RADIO_2056_TX_LOFT_FINE_I | 18460 RADIO_2056_TX1); 18461 pi->calibration_cache.txcal_radio_regs_2G[3] = 18462 read_radio_reg(pi, 18463 RADIO_2056_TX_LOFT_FINE_Q | 18464 RADIO_2056_TX1); 18465 18466 pi->calibration_cache.txcal_radio_regs_2G[4] = 18467 read_radio_reg(pi, 18468 RADIO_2056_TX_LOFT_COARSE_I | 18469 RADIO_2056_TX0); 18470 pi->calibration_cache.txcal_radio_regs_2G[5] = 18471 read_radio_reg(pi, 18472 RADIO_2056_TX_LOFT_COARSE_Q | 18473 RADIO_2056_TX0); 18474 pi->calibration_cache.txcal_radio_regs_2G[6] = 18475 read_radio_reg(pi, 18476 RADIO_2056_TX_LOFT_COARSE_I | 18477 RADIO_2056_TX1); 18478 pi->calibration_cache.txcal_radio_regs_2G[7] = 18479 read_radio_reg(pi, 18480 RADIO_2056_TX_LOFT_COARSE_Q | 18481 RADIO_2056_TX1); 18482 } else { 18483 pi->calibration_cache.txcal_radio_regs_2G[0] = 18484 read_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL); 18485 pi->calibration_cache.txcal_radio_regs_2G[1] = 18486 read_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL); 18487 pi->calibration_cache.txcal_radio_regs_2G[2] = 18488 read_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM); 18489 pi->calibration_cache.txcal_radio_regs_2G[3] = 18490 read_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM); 18491 } 18492 18493 pi->nphy_iqcal_chanspec_2G = pi->radio_chanspec; 18494 tbl_ptr = pi->calibration_cache.txcal_coeffs_2G; 18495 } else { 18496 18497 wlc_phy_rx_iq_coeffs_nphy(pi, 0, 18498 &pi->calibration_cache. 18499 rxcal_coeffs_5G); 18500 18501 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18502 txcal_radio_regs = 18503 pi->calibration_cache.txcal_radio_regs_5G; 18504 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18505 18506 pi->calibration_cache.txcal_radio_regs_5G[0] = 18507 read_radio_reg(pi, 18508 RADIO_2056_TX_LOFT_FINE_I | 18509 RADIO_2056_TX0); 18510 pi->calibration_cache.txcal_radio_regs_5G[1] = 18511 read_radio_reg(pi, 18512 RADIO_2056_TX_LOFT_FINE_Q | 18513 RADIO_2056_TX0); 18514 pi->calibration_cache.txcal_radio_regs_5G[2] = 18515 read_radio_reg(pi, 18516 RADIO_2056_TX_LOFT_FINE_I | 18517 RADIO_2056_TX1); 18518 pi->calibration_cache.txcal_radio_regs_5G[3] = 18519 read_radio_reg(pi, 18520 RADIO_2056_TX_LOFT_FINE_Q | 18521 RADIO_2056_TX1); 18522 18523 pi->calibration_cache.txcal_radio_regs_5G[4] = 18524 read_radio_reg(pi, 18525 RADIO_2056_TX_LOFT_COARSE_I | 18526 RADIO_2056_TX0); 18527 pi->calibration_cache.txcal_radio_regs_5G[5] = 18528 read_radio_reg(pi, 18529 RADIO_2056_TX_LOFT_COARSE_Q | 18530 RADIO_2056_TX0); 18531 pi->calibration_cache.txcal_radio_regs_5G[6] = 18532 read_radio_reg(pi, 18533 RADIO_2056_TX_LOFT_COARSE_I | 18534 RADIO_2056_TX1); 18535 pi->calibration_cache.txcal_radio_regs_5G[7] = 18536 read_radio_reg(pi, 18537 RADIO_2056_TX_LOFT_COARSE_Q | 18538 RADIO_2056_TX1); 18539 } else { 18540 pi->calibration_cache.txcal_radio_regs_5G[0] = 18541 read_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL); 18542 pi->calibration_cache.txcal_radio_regs_5G[1] = 18543 read_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL); 18544 pi->calibration_cache.txcal_radio_regs_5G[2] = 18545 read_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM); 18546 pi->calibration_cache.txcal_radio_regs_5G[3] = 18547 read_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM); 18548 } 18549 18550 pi->nphy_iqcal_chanspec_5G = pi->radio_chanspec; 18551 tbl_ptr = pi->calibration_cache.txcal_coeffs_5G; 18552 } 18553 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18554 for (coreNum = 0; coreNum <= 1; coreNum++) { 18555 18556 txcal_radio_regs[2 * coreNum] = 18557 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18558 LOFT_FINE_I); 18559 txcal_radio_regs[2 * coreNum + 1] = 18560 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18561 LOFT_FINE_Q); 18562 18563 txcal_radio_regs[2 * coreNum + 4] = 18564 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18565 LOFT_COARSE_I); 18566 txcal_radio_regs[2 * coreNum + 5] = 18567 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18568 LOFT_COARSE_Q); 18569 } 18570 } 18571 18572 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 8, 80, 16, tbl_ptr); 18573 18574 if (pi->phyhang_avoid) 18575 wlc_phy_stay_in_carriersearch_nphy(pi, false); 18576 } 18577 18578 static void wlc_phy_tx_iq_war_nphy(struct brcms_phy *pi) 18579 { 18580 struct nphy_iq_comp tx_comp; 18581 18582 wlc_phy_table_read_nphy(pi, 15, 4, 0x50, 16, &tx_comp); 18583 18584 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ, tx_comp.a0); 18585 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 2, tx_comp.b0); 18586 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 4, tx_comp.a1); 18587 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 6, tx_comp.b1); 18588 } 18589 18590 static void wlc_phy_restorecal_nphy(struct brcms_phy *pi) 18591 { 18592 u16 *loft_comp; 18593 u16 txcal_coeffs_bphy[4]; 18594 u16 *tbl_ptr; 18595 int coreNum; 18596 u16 *txcal_radio_regs = NULL; 18597 18598 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18599 if (pi->nphy_iqcal_chanspec_2G == 0) 18600 return; 18601 18602 tbl_ptr = pi->calibration_cache.txcal_coeffs_2G; 18603 loft_comp = &pi->calibration_cache.txcal_coeffs_2G[5]; 18604 } else { 18605 if (pi->nphy_iqcal_chanspec_5G == 0) 18606 return; 18607 18608 tbl_ptr = pi->calibration_cache.txcal_coeffs_5G; 18609 loft_comp = &pi->calibration_cache.txcal_coeffs_5G[5]; 18610 } 18611 18612 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 16, tbl_ptr); 18613 18614 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18615 txcal_coeffs_bphy[0] = tbl_ptr[0]; 18616 txcal_coeffs_bphy[1] = tbl_ptr[1]; 18617 txcal_coeffs_bphy[2] = tbl_ptr[2]; 18618 txcal_coeffs_bphy[3] = tbl_ptr[3]; 18619 } else { 18620 txcal_coeffs_bphy[0] = 0; 18621 txcal_coeffs_bphy[1] = 0; 18622 txcal_coeffs_bphy[2] = 0; 18623 txcal_coeffs_bphy[3] = 0; 18624 } 18625 18626 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 16, 18627 txcal_coeffs_bphy); 18628 18629 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 16, loft_comp); 18630 18631 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 16, loft_comp); 18632 18633 if (NREV_LT(pi->pubpi.phy_rev, 2)) 18634 wlc_phy_tx_iq_war_nphy(pi); 18635 18636 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18637 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18638 txcal_radio_regs = 18639 pi->calibration_cache.txcal_radio_regs_2G; 18640 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18641 18642 write_radio_reg(pi, 18643 RADIO_2056_TX_LOFT_FINE_I | 18644 RADIO_2056_TX0, 18645 pi->calibration_cache. 18646 txcal_radio_regs_2G[0]); 18647 write_radio_reg(pi, 18648 RADIO_2056_TX_LOFT_FINE_Q | 18649 RADIO_2056_TX0, 18650 pi->calibration_cache. 18651 txcal_radio_regs_2G[1]); 18652 write_radio_reg(pi, 18653 RADIO_2056_TX_LOFT_FINE_I | 18654 RADIO_2056_TX1, 18655 pi->calibration_cache. 18656 txcal_radio_regs_2G[2]); 18657 write_radio_reg(pi, 18658 RADIO_2056_TX_LOFT_FINE_Q | 18659 RADIO_2056_TX1, 18660 pi->calibration_cache. 18661 txcal_radio_regs_2G[3]); 18662 18663 write_radio_reg(pi, 18664 RADIO_2056_TX_LOFT_COARSE_I | 18665 RADIO_2056_TX0, 18666 pi->calibration_cache. 18667 txcal_radio_regs_2G[4]); 18668 write_radio_reg(pi, 18669 RADIO_2056_TX_LOFT_COARSE_Q | 18670 RADIO_2056_TX0, 18671 pi->calibration_cache. 18672 txcal_radio_regs_2G[5]); 18673 write_radio_reg(pi, 18674 RADIO_2056_TX_LOFT_COARSE_I | 18675 RADIO_2056_TX1, 18676 pi->calibration_cache. 18677 txcal_radio_regs_2G[6]); 18678 write_radio_reg(pi, 18679 RADIO_2056_TX_LOFT_COARSE_Q | 18680 RADIO_2056_TX1, 18681 pi->calibration_cache. 18682 txcal_radio_regs_2G[7]); 18683 } else { 18684 write_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL, 18685 pi->calibration_cache. 18686 txcal_radio_regs_2G[0]); 18687 write_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL, 18688 pi->calibration_cache. 18689 txcal_radio_regs_2G[1]); 18690 write_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 18691 pi->calibration_cache. 18692 txcal_radio_regs_2G[2]); 18693 write_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 18694 pi->calibration_cache. 18695 txcal_radio_regs_2G[3]); 18696 } 18697 18698 wlc_phy_rx_iq_coeffs_nphy(pi, 1, 18699 &pi->calibration_cache. 18700 rxcal_coeffs_2G); 18701 } else { 18702 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18703 txcal_radio_regs = 18704 pi->calibration_cache.txcal_radio_regs_5G; 18705 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18706 18707 write_radio_reg(pi, 18708 RADIO_2056_TX_LOFT_FINE_I | 18709 RADIO_2056_TX0, 18710 pi->calibration_cache. 18711 txcal_radio_regs_5G[0]); 18712 write_radio_reg(pi, 18713 RADIO_2056_TX_LOFT_FINE_Q | 18714 RADIO_2056_TX0, 18715 pi->calibration_cache. 18716 txcal_radio_regs_5G[1]); 18717 write_radio_reg(pi, 18718 RADIO_2056_TX_LOFT_FINE_I | 18719 RADIO_2056_TX1, 18720 pi->calibration_cache. 18721 txcal_radio_regs_5G[2]); 18722 write_radio_reg(pi, 18723 RADIO_2056_TX_LOFT_FINE_Q | 18724 RADIO_2056_TX1, 18725 pi->calibration_cache. 18726 txcal_radio_regs_5G[3]); 18727 18728 write_radio_reg(pi, 18729 RADIO_2056_TX_LOFT_COARSE_I | 18730 RADIO_2056_TX0, 18731 pi->calibration_cache. 18732 txcal_radio_regs_5G[4]); 18733 write_radio_reg(pi, 18734 RADIO_2056_TX_LOFT_COARSE_Q | 18735 RADIO_2056_TX0, 18736 pi->calibration_cache. 18737 txcal_radio_regs_5G[5]); 18738 write_radio_reg(pi, 18739 RADIO_2056_TX_LOFT_COARSE_I | 18740 RADIO_2056_TX1, 18741 pi->calibration_cache. 18742 txcal_radio_regs_5G[6]); 18743 write_radio_reg(pi, 18744 RADIO_2056_TX_LOFT_COARSE_Q | 18745 RADIO_2056_TX1, 18746 pi->calibration_cache. 18747 txcal_radio_regs_5G[7]); 18748 } else { 18749 write_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL, 18750 pi->calibration_cache. 18751 txcal_radio_regs_5G[0]); 18752 write_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL, 18753 pi->calibration_cache. 18754 txcal_radio_regs_5G[1]); 18755 write_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 18756 pi->calibration_cache. 18757 txcal_radio_regs_5G[2]); 18758 write_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 18759 pi->calibration_cache. 18760 txcal_radio_regs_5G[3]); 18761 } 18762 18763 wlc_phy_rx_iq_coeffs_nphy(pi, 1, 18764 &pi->calibration_cache. 18765 rxcal_coeffs_5G); 18766 } 18767 18768 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18769 for (coreNum = 0; coreNum <= 1; coreNum++) { 18770 18771 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18772 LOFT_FINE_I, 18773 txcal_radio_regs[2 * coreNum]); 18774 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18775 LOFT_FINE_Q, 18776 txcal_radio_regs[2 * coreNum + 1]); 18777 18778 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18779 LOFT_COARSE_I, 18780 txcal_radio_regs[2 * coreNum + 4]); 18781 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18782 LOFT_COARSE_Q, 18783 txcal_radio_regs[2 * coreNum + 5]); 18784 } 18785 } 18786 } 18787 18788 static void wlc_phy_txpwrctrl_coeff_setup_nphy(struct brcms_phy *pi) 18789 { 18790 u32 idx; 18791 u16 iqloCalbuf[7]; 18792 u32 iqcomp, locomp, curr_locomp; 18793 s8 locomp_i, locomp_q; 18794 s8 curr_locomp_i, curr_locomp_q; 18795 u32 tbl_id, tbl_len, tbl_offset; 18796 u32 regval[128]; 18797 18798 if (pi->phyhang_avoid) 18799 wlc_phy_stay_in_carriersearch_nphy(pi, true); 18800 18801 wlc_phy_table_read_nphy(pi, 15, 7, 80, 16, iqloCalbuf); 18802 18803 tbl_len = 128; 18804 tbl_offset = 320; 18805 for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; 18806 tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { 18807 iqcomp = 18808 (tbl_id == 18809 26) ? (((u32) (iqloCalbuf[0] & 0x3ff)) << 10) | 18810 (iqloCalbuf[1] & 0x3ff) 18811 : (((u32) (iqloCalbuf[2] & 0x3ff)) << 10) | 18812 (iqloCalbuf[3] & 0x3ff); 18813 18814 for (idx = 0; idx < tbl_len; idx++) 18815 regval[idx] = iqcomp; 18816 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, 18817 regval); 18818 } 18819 18820 tbl_offset = 448; 18821 for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; 18822 tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { 18823 18824 locomp = 18825 (u32) ((tbl_id == 26) ? iqloCalbuf[5] : iqloCalbuf[6]); 18826 locomp_i = (s8) ((locomp >> 8) & 0xff); 18827 locomp_q = (s8) ((locomp) & 0xff); 18828 for (idx = 0; idx < tbl_len; idx++) { 18829 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18830 curr_locomp_i = locomp_i; 18831 curr_locomp_q = locomp_q; 18832 } else { 18833 curr_locomp_i = (s8) ((locomp_i * 18834 nphy_tpc_loscale[idx] + 18835 128) >> 8); 18836 curr_locomp_q = 18837 (s8) ((locomp_q * 18838 nphy_tpc_loscale[idx] + 18839 128) >> 8); 18840 } 18841 curr_locomp = (u32) ((curr_locomp_i & 0xff) << 8); 18842 curr_locomp |= (u32) (curr_locomp_q & 0xff); 18843 regval[idx] = curr_locomp; 18844 } 18845 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, 18846 regval); 18847 } 18848 18849 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 18850 18851 wlapi_bmac_write_shm(pi->sh->physhim, M_CURR_IDX1, 0xFFFF); 18852 wlapi_bmac_write_shm(pi->sh->physhim, M_CURR_IDX2, 0xFFFF); 18853 } 18854 18855 if (pi->phyhang_avoid) 18856 wlc_phy_stay_in_carriersearch_nphy(pi, false); 18857 } 18858 18859 static void wlc_phy_txlpfbw_nphy(struct brcms_phy *pi) 18860 { 18861 u8 tx_lpf_bw = 0; 18862 18863 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 18864 if (CHSPEC_IS40(pi->radio_chanspec)) 18865 tx_lpf_bw = 3; 18866 else 18867 tx_lpf_bw = 1; 18868 18869 if (PHY_IPA(pi)) { 18870 if (CHSPEC_IS40(pi->radio_chanspec)) 18871 tx_lpf_bw = 5; 18872 else 18873 tx_lpf_bw = 4; 18874 } 18875 18876 write_phy_reg(pi, 0xe8, 18877 (tx_lpf_bw << 0) | 18878 (tx_lpf_bw << 3) | 18879 (tx_lpf_bw << 6) | (tx_lpf_bw << 9)); 18880 18881 if (PHY_IPA(pi)) { 18882 18883 if (CHSPEC_IS40(pi->radio_chanspec)) 18884 tx_lpf_bw = 4; 18885 else 18886 tx_lpf_bw = 1; 18887 18888 write_phy_reg(pi, 0xe9, 18889 (tx_lpf_bw << 0) | 18890 (tx_lpf_bw << 3) | 18891 (tx_lpf_bw << 6) | (tx_lpf_bw << 9)); 18892 } 18893 } 18894 } 18895 18896 static void 18897 wlc_phy_adjust_rx_analpfbw_nphy(struct brcms_phy *pi, u16 reduction_factr) 18898 { 18899 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 18900 if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && 18901 CHSPEC_IS40(pi->radio_chanspec)) { 18902 if (!pi->nphy_anarxlpf_adjusted) { 18903 write_radio_reg(pi, 18904 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 18905 RADIO_2056_RX0), 18906 ((pi->nphy_rccal_value + 18907 reduction_factr) | 0x80)); 18908 18909 pi->nphy_anarxlpf_adjusted = true; 18910 } 18911 } else { 18912 if (pi->nphy_anarxlpf_adjusted) { 18913 write_radio_reg(pi, 18914 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 18915 RADIO_2056_RX0), 18916 (pi->nphy_rccal_value | 0x80)); 18917 18918 pi->nphy_anarxlpf_adjusted = false; 18919 } 18920 } 18921 } 18922 } 18923 18924 static void 18925 wlc_phy_adjust_min_noisevar_nphy(struct brcms_phy *pi, int ntones, 18926 int *tone_id_buf, u32 *noise_var_buf) 18927 { 18928 int i; 18929 u32 offset; 18930 int tone_id; 18931 int tbllen = 18932 CHSPEC_IS40(pi->radio_chanspec) ? 18933 NPHY_NOISEVAR_TBLLEN40 : NPHY_NOISEVAR_TBLLEN20; 18934 18935 if (pi->nphy_noisevars_adjusted) { 18936 for (i = 0; i < pi->nphy_saved_noisevars.bufcount; i++) { 18937 tone_id = pi->nphy_saved_noisevars.tone_id[i]; 18938 offset = (tone_id >= 0) ? 18939 ((tone_id * 18940 2) + 1) : (tbllen + (tone_id * 2) + 1); 18941 wlc_phy_table_write_nphy( 18942 pi, NPHY_TBL_ID_NOISEVAR, 1, 18943 offset, 32, 18944 &pi->nphy_saved_noisevars.min_noise_vars[i]); 18945 } 18946 18947 pi->nphy_saved_noisevars.bufcount = 0; 18948 pi->nphy_noisevars_adjusted = false; 18949 } 18950 18951 if ((noise_var_buf != NULL) && (tone_id_buf != NULL)) { 18952 pi->nphy_saved_noisevars.bufcount = 0; 18953 18954 for (i = 0; i < ntones; i++) { 18955 tone_id = tone_id_buf[i]; 18956 offset = (tone_id >= 0) ? 18957 ((tone_id * 2) + 1) : 18958 (tbllen + (tone_id * 2) + 1); 18959 pi->nphy_saved_noisevars.tone_id[i] = tone_id; 18960 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 18961 offset, 32, 18962 &pi->nphy_saved_noisevars. 18963 min_noise_vars[i]); 18964 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 18965 offset, 32, &noise_var_buf[i]); 18966 pi->nphy_saved_noisevars.bufcount++; 18967 } 18968 18969 pi->nphy_noisevars_adjusted = true; 18970 } 18971 } 18972 18973 static void wlc_phy_adjust_crsminpwr_nphy(struct brcms_phy *pi, u8 minpwr) 18974 { 18975 u16 regval; 18976 18977 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18978 if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && 18979 CHSPEC_IS40(pi->radio_chanspec)) { 18980 if (!pi->nphy_crsminpwr_adjusted) { 18981 regval = read_phy_reg(pi, 0x27d); 18982 pi->nphy_crsminpwr[0] = regval & 0xff; 18983 regval &= 0xff00; 18984 regval |= (u16) minpwr; 18985 write_phy_reg(pi, 0x27d, regval); 18986 18987 regval = read_phy_reg(pi, 0x280); 18988 pi->nphy_crsminpwr[1] = regval & 0xff; 18989 regval &= 0xff00; 18990 regval |= (u16) minpwr; 18991 write_phy_reg(pi, 0x280, regval); 18992 18993 regval = read_phy_reg(pi, 0x283); 18994 pi->nphy_crsminpwr[2] = regval & 0xff; 18995 regval &= 0xff00; 18996 regval |= (u16) minpwr; 18997 write_phy_reg(pi, 0x283, regval); 18998 18999 pi->nphy_crsminpwr_adjusted = true; 19000 } 19001 } else { 19002 if (pi->nphy_crsminpwr_adjusted) { 19003 regval = read_phy_reg(pi, 0x27d); 19004 regval &= 0xff00; 19005 regval |= pi->nphy_crsminpwr[0]; 19006 write_phy_reg(pi, 0x27d, regval); 19007 19008 regval = read_phy_reg(pi, 0x280); 19009 regval &= 0xff00; 19010 regval |= pi->nphy_crsminpwr[1]; 19011 write_phy_reg(pi, 0x280, regval); 19012 19013 regval = read_phy_reg(pi, 0x283); 19014 regval &= 0xff00; 19015 regval |= pi->nphy_crsminpwr[2]; 19016 write_phy_reg(pi, 0x283, regval); 19017 19018 pi->nphy_crsminpwr_adjusted = false; 19019 } 19020 } 19021 } 19022 } 19023 19024 static void wlc_phy_spurwar_nphy(struct brcms_phy *pi) 19025 { 19026 u16 cur_channel = 0; 19027 int nphy_adj_tone_id_buf[] = { 57, 58 }; 19028 u32 nphy_adj_noise_var_buf[] = { 0x3ff, 0x3ff }; 19029 bool isAdjustNoiseVar = false; 19030 uint numTonesAdjust = 0; 19031 19032 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19033 if (pi->phyhang_avoid) 19034 wlc_phy_stay_in_carriersearch_nphy(pi, true); 19035 19036 cur_channel = CHSPEC_CHANNEL(pi->radio_chanspec); 19037 19038 if (pi->nphy_gband_spurwar_en) { 19039 19040 wlc_phy_adjust_rx_analpfbw_nphy( 19041 pi, 19042 NPHY_ANARXLPFBW_REDUCTIONFACT); 19043 19044 if (CHSPEC_IS2G(pi->radio_chanspec)) { 19045 if ((cur_channel == 11) 19046 && CHSPEC_IS40(pi->radio_chanspec)) 19047 wlc_phy_adjust_min_noisevar_nphy( 19048 pi, 2, 19049 nphy_adj_tone_id_buf, 19050 nphy_adj_noise_var_buf); 19051 else 19052 wlc_phy_adjust_min_noisevar_nphy(pi, 0, 19053 NULL, 19054 NULL); 19055 } 19056 19057 wlc_phy_adjust_crsminpwr_nphy(pi, 19058 NPHY_ADJUSTED_MINCRSPOWER); 19059 } 19060 19061 if ((pi->nphy_gband_spurwar2_en) 19062 && CHSPEC_IS2G(pi->radio_chanspec)) { 19063 19064 if (CHSPEC_IS40(pi->radio_chanspec)) { 19065 switch (cur_channel) { 19066 case 3: 19067 nphy_adj_tone_id_buf[0] = 57; 19068 nphy_adj_tone_id_buf[1] = 58; 19069 nphy_adj_noise_var_buf[0] = 0x22f; 19070 nphy_adj_noise_var_buf[1] = 0x25f; 19071 isAdjustNoiseVar = true; 19072 break; 19073 case 4: 19074 nphy_adj_tone_id_buf[0] = 41; 19075 nphy_adj_tone_id_buf[1] = 42; 19076 nphy_adj_noise_var_buf[0] = 0x22f; 19077 nphy_adj_noise_var_buf[1] = 0x25f; 19078 isAdjustNoiseVar = true; 19079 break; 19080 case 5: 19081 nphy_adj_tone_id_buf[0] = 25; 19082 nphy_adj_tone_id_buf[1] = 26; 19083 nphy_adj_noise_var_buf[0] = 0x24f; 19084 nphy_adj_noise_var_buf[1] = 0x25f; 19085 isAdjustNoiseVar = true; 19086 break; 19087 case 6: 19088 nphy_adj_tone_id_buf[0] = 9; 19089 nphy_adj_tone_id_buf[1] = 10; 19090 nphy_adj_noise_var_buf[0] = 0x22f; 19091 nphy_adj_noise_var_buf[1] = 0x24f; 19092 isAdjustNoiseVar = true; 19093 break; 19094 case 7: 19095 nphy_adj_tone_id_buf[0] = 121; 19096 nphy_adj_tone_id_buf[1] = 122; 19097 nphy_adj_noise_var_buf[0] = 0x18f; 19098 nphy_adj_noise_var_buf[1] = 0x24f; 19099 isAdjustNoiseVar = true; 19100 break; 19101 case 8: 19102 nphy_adj_tone_id_buf[0] = 105; 19103 nphy_adj_tone_id_buf[1] = 106; 19104 nphy_adj_noise_var_buf[0] = 0x22f; 19105 nphy_adj_noise_var_buf[1] = 0x25f; 19106 isAdjustNoiseVar = true; 19107 break; 19108 case 9: 19109 nphy_adj_tone_id_buf[0] = 89; 19110 nphy_adj_tone_id_buf[1] = 90; 19111 nphy_adj_noise_var_buf[0] = 0x22f; 19112 nphy_adj_noise_var_buf[1] = 0x24f; 19113 isAdjustNoiseVar = true; 19114 break; 19115 case 10: 19116 nphy_adj_tone_id_buf[0] = 73; 19117 nphy_adj_tone_id_buf[1] = 74; 19118 nphy_adj_noise_var_buf[0] = 0x22f; 19119 nphy_adj_noise_var_buf[1] = 0x24f; 19120 isAdjustNoiseVar = true; 19121 break; 19122 default: 19123 isAdjustNoiseVar = false; 19124 break; 19125 } 19126 } 19127 19128 if (isAdjustNoiseVar) { 19129 numTonesAdjust = ARRAY_SIZE(nphy_adj_tone_id_buf); 19130 19131 wlc_phy_adjust_min_noisevar_nphy( 19132 pi, 19133 numTonesAdjust, 19134 nphy_adj_tone_id_buf, 19135 nphy_adj_noise_var_buf); 19136 } else { 19137 wlc_phy_adjust_min_noisevar_nphy(pi, 0, NULL, 19138 NULL); 19139 } 19140 } 19141 19142 if ((pi->nphy_aband_spurwar_en) && 19143 (CHSPEC_IS5G(pi->radio_chanspec))) { 19144 switch (cur_channel) { 19145 case 54: 19146 nphy_adj_tone_id_buf[0] = 32; 19147 nphy_adj_noise_var_buf[0] = 0x25f; 19148 break; 19149 case 38: 19150 case 102: 19151 case 118: 19152 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) && 19153 (pi->sh->chippkg == BCMA_PKG_ID_BCM4717)) { 19154 nphy_adj_tone_id_buf[0] = 32; 19155 nphy_adj_noise_var_buf[0] = 0x21f; 19156 } else { 19157 nphy_adj_tone_id_buf[0] = 0; 19158 nphy_adj_noise_var_buf[0] = 0x0; 19159 } 19160 break; 19161 case 134: 19162 nphy_adj_tone_id_buf[0] = 32; 19163 nphy_adj_noise_var_buf[0] = 0x21f; 19164 break; 19165 case 151: 19166 nphy_adj_tone_id_buf[0] = 16; 19167 nphy_adj_noise_var_buf[0] = 0x23f; 19168 break; 19169 case 153: 19170 case 161: 19171 nphy_adj_tone_id_buf[0] = 48; 19172 nphy_adj_noise_var_buf[0] = 0x23f; 19173 break; 19174 default: 19175 nphy_adj_tone_id_buf[0] = 0; 19176 nphy_adj_noise_var_buf[0] = 0x0; 19177 break; 19178 } 19179 19180 if (nphy_adj_tone_id_buf[0] 19181 && nphy_adj_noise_var_buf[0]) 19182 wlc_phy_adjust_min_noisevar_nphy( 19183 pi, 1, 19184 nphy_adj_tone_id_buf, 19185 nphy_adj_noise_var_buf); 19186 else 19187 wlc_phy_adjust_min_noisevar_nphy(pi, 0, NULL, 19188 NULL); 19189 } 19190 19191 if (pi->phyhang_avoid) 19192 wlc_phy_stay_in_carriersearch_nphy(pi, false); 19193 } 19194 } 19195 19196 void wlc_phy_init_nphy(struct brcms_phy *pi) 19197 { 19198 u16 val; 19199 u16 clip1_ths[2]; 19200 struct nphy_txgains target_gain; 19201 u8 tx_pwr_ctrl_state; 19202 bool do_nphy_cal = false; 19203 uint core; 19204 u32 d11_clk_ctl_st; 19205 bool do_rssi_cal = false; 19206 19207 core = 0; 19208 19209 if (!(pi->measure_hold & PHY_HOLD_FOR_SCAN)) 19210 pi->measure_hold |= PHY_HOLD_FOR_NOT_ASSOC; 19211 19212 if ((ISNPHY(pi)) && (NREV_GE(pi->pubpi.phy_rev, 5)) && 19213 ((pi->sh->chippkg == BCMA_PKG_ID_BCM4717) || 19214 (pi->sh->chippkg == BCMA_PKG_ID_BCM4718))) { 19215 if ((pi->sh->boardflags & BFL_EXTLNA) && 19216 (CHSPEC_IS2G(pi->radio_chanspec))) 19217 bcma_cc_set32(&pi->d11core->bus->drv_cc, 19218 BCMA_CC_CHIPCTL, 0x40); 19219 } 19220 19221 if ((!PHY_IPA(pi)) && (pi->sh->chip == BCMA_CHIP_ID_BCM5357)) 19222 bcma_chipco_chipctl_maskset(&pi->d11core->bus->drv_cc, 1, 19223 ~CCTRL5357_EXTPA, CCTRL5357_EXTPA); 19224 19225 if ((pi->nphy_gband_spurwar2_en) && CHSPEC_IS2G(pi->radio_chanspec) && 19226 CHSPEC_IS40(pi->radio_chanspec)) { 19227 19228 d11_clk_ctl_st = bcma_read32(pi->d11core, 19229 D11REGOFFS(clk_ctl_st)); 19230 bcma_mask32(pi->d11core, D11REGOFFS(clk_ctl_st), 19231 ~(CCS_FORCEHT | CCS_HTAREQ)); 19232 19233 bcma_write32(pi->d11core, D11REGOFFS(clk_ctl_st), 19234 d11_clk_ctl_st); 19235 } 19236 19237 pi->use_int_tx_iqlo_cal_nphy = 19238 (PHY_IPA(pi) || 19239 (NREV_GE(pi->pubpi.phy_rev, 7) || 19240 (NREV_GE(pi->pubpi.phy_rev, 5) 19241 && pi->sh->boardflags2 & BFL2_INTERNDET_TXIQCAL))); 19242 19243 pi->internal_tx_iqlo_cal_tapoff_intpa_nphy = false; 19244 19245 pi->nphy_deaf_count = 0; 19246 19247 wlc_phy_tbl_init_nphy(pi); 19248 19249 pi->nphy_crsminpwr_adjusted = false; 19250 pi->nphy_noisevars_adjusted = false; 19251 19252 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19253 write_phy_reg(pi, 0xe7, 0); 19254 write_phy_reg(pi, 0xec, 0); 19255 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19256 write_phy_reg(pi, 0x342, 0); 19257 write_phy_reg(pi, 0x343, 0); 19258 write_phy_reg(pi, 0x346, 0); 19259 write_phy_reg(pi, 0x347, 0); 19260 } 19261 write_phy_reg(pi, 0xe5, 0); 19262 write_phy_reg(pi, 0xe6, 0); 19263 } else { 19264 write_phy_reg(pi, 0xec, 0); 19265 } 19266 19267 write_phy_reg(pi, 0x91, 0); 19268 write_phy_reg(pi, 0x92, 0); 19269 if (NREV_LT(pi->pubpi.phy_rev, 6)) { 19270 write_phy_reg(pi, 0x93, 0); 19271 write_phy_reg(pi, 0x94, 0); 19272 } 19273 19274 and_phy_reg(pi, 0xa1, ~3); 19275 19276 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19277 write_phy_reg(pi, 0x8f, 0); 19278 write_phy_reg(pi, 0xa5, 0); 19279 } else { 19280 write_phy_reg(pi, 0xa5, 0); 19281 } 19282 19283 if (NREV_IS(pi->pubpi.phy_rev, 2)) 19284 mod_phy_reg(pi, 0xdc, 0x00ff, 0x3b); 19285 else if (NREV_LT(pi->pubpi.phy_rev, 2)) 19286 mod_phy_reg(pi, 0xdc, 0x00ff, 0x40); 19287 19288 write_phy_reg(pi, 0x203, 32); 19289 write_phy_reg(pi, 0x201, 32); 19290 19291 if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD) 19292 write_phy_reg(pi, 0x20d, 160); 19293 else 19294 write_phy_reg(pi, 0x20d, 184); 19295 19296 write_phy_reg(pi, 0x13a, 200); 19297 19298 write_phy_reg(pi, 0x70, 80); 19299 19300 write_phy_reg(pi, 0x1ff, 48); 19301 19302 if (NREV_LT(pi->pubpi.phy_rev, 8)) 19303 wlc_phy_update_mimoconfig_nphy(pi, pi->n_preamble_override); 19304 19305 wlc_phy_stf_chain_upd_nphy(pi); 19306 19307 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 19308 write_phy_reg(pi, 0x180, 0xaa8); 19309 write_phy_reg(pi, 0x181, 0x9a4); 19310 } 19311 19312 if (PHY_IPA(pi)) { 19313 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 19314 19315 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 19316 0x29b, (0x1 << 0), (1) << 0); 19317 19318 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x298 : 19319 0x29c, (0x1ff << 7), 19320 (pi->nphy_papd_epsilon_offset[core]) << 7); 19321 19322 } 19323 19324 wlc_phy_ipa_set_tx_digi_filts_nphy(pi); 19325 } else if (NREV_GE(pi->pubpi.phy_rev, 5)) { 19326 wlc_phy_extpa_set_tx_digi_filts_nphy(pi); 19327 } 19328 19329 wlc_phy_workarounds_nphy(pi); 19330 19331 wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); 19332 19333 val = read_phy_reg(pi, 0x01); 19334 write_phy_reg(pi, 0x01, val | BBCFG_RESETCCA); 19335 write_phy_reg(pi, 0x01, val & (~BBCFG_RESETCCA)); 19336 wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); 19337 19338 wlapi_bmac_macphyclk_set(pi->sh->physhim, ON); 19339 19340 wlc_phy_pa_override_nphy(pi, OFF); 19341 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX); 19342 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 19343 wlc_phy_pa_override_nphy(pi, ON); 19344 19345 wlc_phy_classifier_nphy(pi, 0, 0); 19346 wlc_phy_clip_det_nphy(pi, 0, clip1_ths); 19347 19348 if (CHSPEC_IS2G(pi->radio_chanspec)) 19349 wlc_phy_bphy_init_nphy(pi); 19350 19351 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 19352 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 19353 19354 wlc_phy_txpwr_fixpower_nphy(pi); 19355 19356 wlc_phy_txpwrctrl_idle_tssi_nphy(pi); 19357 19358 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 19359 19360 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19361 u32 *tx_pwrctrl_tbl = NULL; 19362 u16 idx; 19363 s16 pga_gn = 0; 19364 s16 pad_gn = 0; 19365 s32 rfpwr_offset; 19366 19367 if (PHY_IPA(pi)) { 19368 tx_pwrctrl_tbl = wlc_phy_get_ipa_gaintbl_nphy(pi); 19369 } else { 19370 if (CHSPEC_IS5G(pi->radio_chanspec)) { 19371 if (NREV_IS(pi->pubpi.phy_rev, 3)) 19372 tx_pwrctrl_tbl = 19373 nphy_tpc_5GHz_txgain_rev3; 19374 else if (NREV_IS(pi->pubpi.phy_rev, 4)) 19375 tx_pwrctrl_tbl = 19376 (pi->srom_fem5g.extpagain == 19377 3) ? 19378 nphy_tpc_5GHz_txgain_HiPwrEPA : 19379 nphy_tpc_5GHz_txgain_rev4; 19380 else 19381 tx_pwrctrl_tbl = 19382 nphy_tpc_5GHz_txgain_rev5; 19383 } else { 19384 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19385 if (pi->pubpi.radiorev == 5) 19386 tx_pwrctrl_tbl = 19387 nphy_tpc_txgain_epa_2057rev5; 19388 else if (pi->pubpi.radiorev == 3) 19389 tx_pwrctrl_tbl = 19390 nphy_tpc_txgain_epa_2057rev3; 19391 } else { 19392 if (NREV_GE(pi->pubpi.phy_rev, 5) && 19393 (pi->srom_fem2g.extpagain == 3)) 19394 tx_pwrctrl_tbl = 19395 nphy_tpc_txgain_HiPwrEPA; 19396 else 19397 tx_pwrctrl_tbl = 19398 nphy_tpc_txgain_rev3; 19399 } 19400 } 19401 } 19402 19403 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 128, 19404 192, 32, tx_pwrctrl_tbl); 19405 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 128, 19406 192, 32, tx_pwrctrl_tbl); 19407 19408 pi->nphy_gmval = (u16) ((*tx_pwrctrl_tbl >> 16) & 0x7000); 19409 19410 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19411 19412 for (idx = 0; idx < 128; idx++) { 19413 pga_gn = (tx_pwrctrl_tbl[idx] >> 24) & 0xf; 19414 pad_gn = (tx_pwrctrl_tbl[idx] >> 19) & 0x1f; 19415 rfpwr_offset = get_rf_pwr_offset(pi, pga_gn, 19416 pad_gn); 19417 wlc_phy_table_write_nphy( 19418 pi, 19419 NPHY_TBL_ID_CORE1TXPWRCTL, 19420 1, 576 + idx, 32, 19421 &rfpwr_offset); 19422 wlc_phy_table_write_nphy( 19423 pi, 19424 NPHY_TBL_ID_CORE2TXPWRCTL, 19425 1, 576 + idx, 32, 19426 &rfpwr_offset); 19427 } 19428 } else { 19429 19430 for (idx = 0; idx < 128; idx++) { 19431 pga_gn = (tx_pwrctrl_tbl[idx] >> 24) & 0xf; 19432 if (CHSPEC_IS2G(pi->radio_chanspec)) 19433 rfpwr_offset = (s16) 19434 nphy_papd_pga_gain_delta_ipa_2g 19435 [pga_gn]; 19436 else 19437 rfpwr_offset = (s16) 19438 nphy_papd_pga_gain_delta_ipa_5g 19439 [pga_gn]; 19440 19441 wlc_phy_table_write_nphy( 19442 pi, 19443 NPHY_TBL_ID_CORE1TXPWRCTL, 19444 1, 576 + idx, 32, 19445 &rfpwr_offset); 19446 wlc_phy_table_write_nphy( 19447 pi, 19448 NPHY_TBL_ID_CORE2TXPWRCTL, 19449 1, 576 + idx, 32, 19450 &rfpwr_offset); 19451 } 19452 19453 } 19454 } else { 19455 19456 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 128, 19457 192, 32, nphy_tpc_txgain); 19458 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 128, 19459 192, 32, nphy_tpc_txgain); 19460 } 19461 19462 if (pi->sh->phyrxchain != 0x3) 19463 wlc_phy_rxcore_setstate_nphy((struct brcms_phy_pub *) pi, 19464 pi->sh->phyrxchain); 19465 19466 if (PHY_PERICAL_MPHASE_PENDING(pi)) 19467 wlc_phy_cal_perical_mphase_restart(pi); 19468 19469 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19470 do_rssi_cal = (CHSPEC_IS2G(pi->radio_chanspec)) ? 19471 (pi->nphy_rssical_chanspec_2G == 0) : 19472 (pi->nphy_rssical_chanspec_5G == 0); 19473 19474 if (do_rssi_cal) 19475 wlc_phy_rssi_cal_nphy(pi); 19476 else 19477 wlc_phy_restore_rssical_nphy(pi); 19478 } else { 19479 wlc_phy_rssi_cal_nphy(pi); 19480 } 19481 19482 if (!SCAN_RM_IN_PROGRESS(pi)) 19483 do_nphy_cal = (CHSPEC_IS2G(pi->radio_chanspec)) ? 19484 (pi->nphy_iqcal_chanspec_2G == 0) : 19485 (pi->nphy_iqcal_chanspec_5G == 0); 19486 19487 if (!pi->do_initcal) 19488 do_nphy_cal = false; 19489 19490 if (do_nphy_cal) { 19491 19492 target_gain = wlc_phy_get_tx_gain_nphy(pi); 19493 19494 if (pi->antsel_type == ANTSEL_2x3) 19495 wlc_phy_antsel_init((struct brcms_phy_pub *) pi, 19496 true); 19497 19498 if (pi->nphy_perical != PHY_PERICAL_MPHASE) { 19499 wlc_phy_rssi_cal_nphy(pi); 19500 19501 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19502 pi->nphy_cal_orig_pwr_idx[0] = 19503 pi->nphy_txpwrindex[PHY_CORE_0] 19504 . 19505 index_internal; 19506 pi->nphy_cal_orig_pwr_idx[1] = 19507 pi->nphy_txpwrindex[PHY_CORE_1] 19508 . 19509 index_internal; 19510 19511 wlc_phy_precal_txgain_nphy(pi); 19512 target_gain = 19513 wlc_phy_get_tx_gain_nphy(pi); 19514 } 19515 19516 if (wlc_phy_cal_txiqlo_nphy 19517 (pi, target_gain, true, 19518 false) == 0) { 19519 if (wlc_phy_cal_rxiq_nphy 19520 (pi, target_gain, 2, 19521 false) == 0) 19522 wlc_phy_savecal_nphy(pi); 19523 19524 } 19525 } else if (pi->mphase_cal_phase_id == 19526 MPHASE_CAL_STATE_IDLE) { 19527 wlc_phy_cal_perical((struct brcms_phy_pub *) pi, 19528 PHY_PERICAL_PHYINIT); 19529 } 19530 } else { 19531 wlc_phy_restorecal_nphy(pi); 19532 } 19533 19534 wlc_phy_txpwrctrl_coeff_setup_nphy(pi); 19535 19536 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 19537 19538 wlc_phy_nphy_tkip_rifs_war(pi, pi->sh->_rifs_phy); 19539 19540 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LE(pi->pubpi.phy_rev, 6)) 19541 19542 write_phy_reg(pi, 0x70, 50); 19543 19544 wlc_phy_txlpfbw_nphy(pi); 19545 19546 wlc_phy_spurwar_nphy(pi); 19547 19548 } 19549 19550 static void wlc_phy_resetcca_nphy(struct brcms_phy *pi) 19551 { 19552 u16 val; 19553 19554 wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); 19555 19556 val = read_phy_reg(pi, 0x01); 19557 write_phy_reg(pi, 0x01, val | BBCFG_RESETCCA); 19558 udelay(1); 19559 write_phy_reg(pi, 0x01, val & (~BBCFG_RESETCCA)); 19560 19561 wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); 19562 19563 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 19564 } 19565 19566 void wlc_phy_pa_override_nphy(struct brcms_phy *pi, bool en) 19567 { 19568 u16 rfctrlintc_override_val; 19569 19570 if (!en) { 19571 19572 pi->rfctrlIntc1_save = read_phy_reg(pi, 0x91); 19573 pi->rfctrlIntc2_save = read_phy_reg(pi, 0x92); 19574 19575 if (NREV_GE(pi->pubpi.phy_rev, 7)) 19576 rfctrlintc_override_val = 0x1480; 19577 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 19578 rfctrlintc_override_val = 19579 CHSPEC_IS5G(pi->radio_chanspec) ? 0x600 : 0x480; 19580 else 19581 rfctrlintc_override_val = 19582 CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : 0x120; 19583 19584 write_phy_reg(pi, 0x91, rfctrlintc_override_val); 19585 write_phy_reg(pi, 0x92, rfctrlintc_override_val); 19586 } else { 19587 write_phy_reg(pi, 0x91, pi->rfctrlIntc1_save); 19588 write_phy_reg(pi, 0x92, pi->rfctrlIntc2_save); 19589 } 19590 19591 } 19592 19593 void wlc_phy_stf_chain_upd_nphy(struct brcms_phy *pi) 19594 { 19595 19596 u16 txrx_chain = 19597 (NPHY_RfseqCoreActv_TxRxChain0 | NPHY_RfseqCoreActv_TxRxChain1); 19598 bool CoreActv_override = false; 19599 19600 if (pi->nphy_txrx_chain == BRCMS_N_TXRX_CHAIN0) { 19601 txrx_chain = NPHY_RfseqCoreActv_TxRxChain0; 19602 CoreActv_override = true; 19603 19604 if (NREV_LE(pi->pubpi.phy_rev, 2)) 19605 and_phy_reg(pi, 0xa0, ~0x20); 19606 } else if (pi->nphy_txrx_chain == BRCMS_N_TXRX_CHAIN1) { 19607 txrx_chain = NPHY_RfseqCoreActv_TxRxChain1; 19608 CoreActv_override = true; 19609 19610 if (NREV_LE(pi->pubpi.phy_rev, 2)) 19611 or_phy_reg(pi, 0xa0, 0x20); 19612 } 19613 19614 mod_phy_reg(pi, 0xa2, ((0xf << 0) | (0xf << 4)), txrx_chain); 19615 19616 if (CoreActv_override) { 19617 pi->nphy_perical = PHY_PERICAL_DISABLE; 19618 or_phy_reg(pi, 0xa1, NPHY_RfseqMode_CoreActv_override); 19619 } else { 19620 pi->nphy_perical = PHY_PERICAL_MPHASE; 19621 and_phy_reg(pi, 0xa1, ~NPHY_RfseqMode_CoreActv_override); 19622 } 19623 } 19624 19625 void wlc_phy_rxcore_setstate_nphy(struct brcms_phy_pub *pih, u8 rxcore_bitmask) 19626 { 19627 u16 regval; 19628 u16 tbl_buf[16]; 19629 uint i; 19630 struct brcms_phy *pi = container_of(pih, struct brcms_phy, pubpi_ro); 19631 u16 tbl_opcode; 19632 bool suspend; 19633 19634 pi->sh->phyrxchain = rxcore_bitmask; 19635 19636 if (!pi->sh->clk) 19637 return; 19638 19639 suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & 19640 MCTL_EN_MAC)); 19641 if (!suspend) 19642 wlapi_suspend_mac_and_wait(pi->sh->physhim); 19643 19644 if (pi->phyhang_avoid) 19645 wlc_phy_stay_in_carriersearch_nphy(pi, true); 19646 19647 regval = read_phy_reg(pi, 0xa2); 19648 regval &= ~(0xf << 4); 19649 regval |= ((u16) (rxcore_bitmask & 0x3)) << 4; 19650 write_phy_reg(pi, 0xa2, regval); 19651 19652 if ((rxcore_bitmask & 0x3) != 0x3) { 19653 19654 write_phy_reg(pi, 0x20e, 1); 19655 19656 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19657 if (pi->rx2tx_biasentry == -1) { 19658 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 19659 ARRAY_SIZE(tbl_buf), 80, 19660 16, tbl_buf); 19661 19662 for (i = 0; i < ARRAY_SIZE(tbl_buf); i++) { 19663 if (tbl_buf[i] == 19664 NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS) { 19665 pi->rx2tx_biasentry = (u8) i; 19666 tbl_opcode = 19667 NPHY_REV3_RFSEQ_CMD_NOP; 19668 wlc_phy_table_write_nphy( 19669 pi, 19670 NPHY_TBL_ID_RFSEQ, 19671 1, i, 19672 16, 19673 &tbl_opcode); 19674 break; 19675 } else if (tbl_buf[i] == 19676 NPHY_REV3_RFSEQ_CMD_END) 19677 break; 19678 } 19679 } 19680 } 19681 } else { 19682 19683 write_phy_reg(pi, 0x20e, 30); 19684 19685 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19686 if (pi->rx2tx_biasentry != -1) { 19687 tbl_opcode = NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS; 19688 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 19689 1, pi->rx2tx_biasentry, 19690 16, &tbl_opcode); 19691 pi->rx2tx_biasentry = -1; 19692 } 19693 } 19694 } 19695 19696 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 19697 19698 if (pi->phyhang_avoid) 19699 wlc_phy_stay_in_carriersearch_nphy(pi, false); 19700 19701 if (!suspend) 19702 wlapi_enable_mac(pi->sh->physhim); 19703 } 19704 19705 u8 wlc_phy_rxcore_getstate_nphy(struct brcms_phy_pub *pih) 19706 { 19707 u16 regval, rxen_bits; 19708 struct brcms_phy *pi = container_of(pih, struct brcms_phy, pubpi_ro); 19709 19710 regval = read_phy_reg(pi, 0xa2); 19711 rxen_bits = (regval >> 4) & 0xf; 19712 19713 return (u8) rxen_bits; 19714 } 19715 19716 bool wlc_phy_n_txpower_ipa_ison(struct brcms_phy *pi) 19717 { 19718 return PHY_IPA(pi); 19719 } 19720 19721 void wlc_phy_cal_init_nphy(struct brcms_phy *pi) 19722 { 19723 } 19724 19725 static void wlc_phy_radio_preinit_205x(struct brcms_phy *pi) 19726 { 19727 19728 and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); 19729 and_phy_reg(pi, 0x78, RFCC_OE_POR_FORCE); 19730 19731 or_phy_reg(pi, 0x78, ~RFCC_OE_POR_FORCE); 19732 or_phy_reg(pi, 0x78, RFCC_CHIP0_PU); 19733 19734 } 19735 19736 static void wlc_phy_radio_init_2057(struct brcms_phy *pi) 19737 { 19738 struct radio_20xx_regs *regs_2057_ptr = NULL; 19739 19740 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 19741 regs_2057_ptr = regs_2057_rev4; 19742 } else if (NREV_IS(pi->pubpi.phy_rev, 8) 19743 || NREV_IS(pi->pubpi.phy_rev, 9)) { 19744 switch (pi->pubpi.radiorev) { 19745 case 5: 19746 19747 if (NREV_IS(pi->pubpi.phy_rev, 8)) 19748 regs_2057_ptr = regs_2057_rev5; 19749 else if (NREV_IS(pi->pubpi.phy_rev, 9)) 19750 regs_2057_ptr = regs_2057_rev5v1; 19751 break; 19752 19753 case 7: 19754 19755 regs_2057_ptr = regs_2057_rev7; 19756 break; 19757 19758 case 8: 19759 19760 regs_2057_ptr = regs_2057_rev8; 19761 break; 19762 19763 default: 19764 break; 19765 } 19766 } 19767 19768 wlc_phy_init_radio_regs_allbands(pi, regs_2057_ptr); 19769 } 19770 19771 static u16 wlc_phy_radio205x_rcal(struct brcms_phy *pi) 19772 { 19773 u16 rcal_reg = 0; 19774 int i; 19775 19776 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19777 19778 if (pi->pubpi.radiorev == 5) { 19779 19780 and_phy_reg(pi, 0x342, ~(0x1 << 1)); 19781 19782 udelay(10); 19783 19784 mod_radio_reg(pi, RADIO_2057_IQTEST_SEL_PU, 0x1, 0x1); 19785 mod_radio_reg(pi, RADIO_2057v7_IQTEST_SEL_PU2, 0x2, 19786 0x1); 19787 } 19788 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x1, 0x1); 19789 19790 udelay(10); 19791 19792 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x3, 0x3); 19793 19794 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19795 rcal_reg = read_radio_reg(pi, RADIO_2057_RCAL_STATUS); 19796 if (rcal_reg & 0x1) 19797 break; 19798 19799 udelay(100); 19800 } 19801 19802 if (WARN(i == MAX_205x_RCAL_WAITLOOPS, 19803 "HW error: radio calib2")) 19804 return 0; 19805 19806 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x2, 0x0); 19807 19808 rcal_reg = read_radio_reg(pi, RADIO_2057_RCAL_STATUS) & 0x3e; 19809 19810 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x1, 0x0); 19811 if (pi->pubpi.radiorev == 5) { 19812 19813 mod_radio_reg(pi, RADIO_2057_IQTEST_SEL_PU, 0x1, 0x0); 19814 mod_radio_reg(pi, RADIO_2057v7_IQTEST_SEL_PU2, 0x2, 19815 0x0); 19816 } 19817 19818 if ((pi->pubpi.radiorev <= 4) || (pi->pubpi.radiorev == 6)) { 19819 19820 mod_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 0x3c, 19821 rcal_reg); 19822 mod_radio_reg(pi, RADIO_2057_BANDGAP_RCAL_TRIM, 0xf0, 19823 rcal_reg << 2); 19824 } 19825 19826 } else if (NREV_IS(pi->pubpi.phy_rev, 3)) { 19827 u16 savereg; 19828 19829 savereg = 19830 read_radio_reg( 19831 pi, 19832 RADIO_2056_SYN_PLL_MAST2 | 19833 RADIO_2056_SYN); 19834 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN, 19835 savereg | 0x7); 19836 udelay(10); 19837 19838 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19839 0x1); 19840 udelay(10); 19841 19842 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19843 0x9); 19844 19845 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19846 rcal_reg = read_radio_reg( 19847 pi, 19848 RADIO_2056_SYN_RCAL_CODE_OUT | 19849 RADIO_2056_SYN); 19850 if (rcal_reg & 0x80) 19851 break; 19852 19853 udelay(100); 19854 } 19855 19856 if (WARN(i == MAX_205x_RCAL_WAITLOOPS, 19857 "HW error: radio calib3")) 19858 return 0; 19859 19860 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19861 0x1); 19862 19863 rcal_reg = 19864 read_radio_reg(pi, 19865 RADIO_2056_SYN_RCAL_CODE_OUT | 19866 RADIO_2056_SYN); 19867 19868 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19869 0x0); 19870 19871 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN, 19872 savereg); 19873 19874 return rcal_reg & 0x1f; 19875 } 19876 return rcal_reg & 0x3e; 19877 } 19878 19879 static u16 wlc_phy_radio2057_rccal(struct brcms_phy *pi) 19880 { 19881 u16 rccal_valid; 19882 int i; 19883 bool chip43226_6362A0; 19884 19885 chip43226_6362A0 = ((pi->pubpi.radiorev == 3) 19886 || (pi->pubpi.radiorev == 4) 19887 || (pi->pubpi.radiorev == 6)); 19888 19889 rccal_valid = 0; 19890 if (chip43226_6362A0) { 19891 write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x61); 19892 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xc0); 19893 } else { 19894 write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x61); 19895 19896 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xe9); 19897 } 19898 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); 19899 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); 19900 19901 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19902 rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); 19903 if (rccal_valid & 0x2) 19904 break; 19905 19906 udelay(500); 19907 } 19908 19909 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); 19910 19911 rccal_valid = 0; 19912 if (chip43226_6362A0) { 19913 write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x69); 19914 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xb0); 19915 } else { 19916 write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x69); 19917 19918 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xd5); 19919 } 19920 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); 19921 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); 19922 19923 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19924 rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); 19925 if (rccal_valid & 0x2) 19926 break; 19927 19928 udelay(500); 19929 } 19930 19931 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); 19932 19933 rccal_valid = 0; 19934 if (chip43226_6362A0) { 19935 write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x73); 19936 19937 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x28); 19938 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xb0); 19939 } else { 19940 write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x73); 19941 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); 19942 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0x99); 19943 } 19944 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); 19945 19946 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19947 rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); 19948 if (rccal_valid & 0x2) 19949 break; 19950 19951 udelay(500); 19952 } 19953 19954 if (WARN(!(rccal_valid & 0x2), "HW error: radio calib4")) 19955 return 0; 19956 19957 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); 19958 19959 return rccal_valid; 19960 } 19961 19962 static void wlc_phy_radio_postinit_2057(struct brcms_phy *pi) 19963 { 19964 19965 mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x1, 0x1); 19966 19967 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x78); 19968 mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x80); 19969 mdelay(2); 19970 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x0); 19971 mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x0); 19972 19973 if (pi->phy_init_por) { 19974 wlc_phy_radio205x_rcal(pi); 19975 wlc_phy_radio2057_rccal(pi); 19976 } 19977 19978 mod_radio_reg(pi, RADIO_2057_RFPLL_MASTER, 0x8, 0x0); 19979 } 19980 19981 static void wlc_phy_radio_init_2056(struct brcms_phy *pi) 19982 { 19983 const struct radio_regs *regs_SYN_2056_ptr = NULL; 19984 const struct radio_regs *regs_TX_2056_ptr = NULL; 19985 const struct radio_regs *regs_RX_2056_ptr = NULL; 19986 19987 if (NREV_IS(pi->pubpi.phy_rev, 3)) { 19988 regs_SYN_2056_ptr = regs_SYN_2056; 19989 regs_TX_2056_ptr = regs_TX_2056; 19990 regs_RX_2056_ptr = regs_RX_2056; 19991 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 19992 regs_SYN_2056_ptr = regs_SYN_2056_A1; 19993 regs_TX_2056_ptr = regs_TX_2056_A1; 19994 regs_RX_2056_ptr = regs_RX_2056_A1; 19995 } else { 19996 switch (pi->pubpi.radiorev) { 19997 case 5: 19998 regs_SYN_2056_ptr = regs_SYN_2056_rev5; 19999 regs_TX_2056_ptr = regs_TX_2056_rev5; 20000 regs_RX_2056_ptr = regs_RX_2056_rev5; 20001 break; 20002 20003 case 6: 20004 regs_SYN_2056_ptr = regs_SYN_2056_rev6; 20005 regs_TX_2056_ptr = regs_TX_2056_rev6; 20006 regs_RX_2056_ptr = regs_RX_2056_rev6; 20007 break; 20008 20009 case 7: 20010 case 9: 20011 regs_SYN_2056_ptr = regs_SYN_2056_rev7; 20012 regs_TX_2056_ptr = regs_TX_2056_rev7; 20013 regs_RX_2056_ptr = regs_RX_2056_rev7; 20014 break; 20015 20016 case 8: 20017 regs_SYN_2056_ptr = regs_SYN_2056_rev8; 20018 regs_TX_2056_ptr = regs_TX_2056_rev8; 20019 regs_RX_2056_ptr = regs_RX_2056_rev8; 20020 break; 20021 20022 case 11: 20023 regs_SYN_2056_ptr = regs_SYN_2056_rev11; 20024 regs_TX_2056_ptr = regs_TX_2056_rev11; 20025 regs_RX_2056_ptr = regs_RX_2056_rev11; 20026 break; 20027 20028 default: 20029 return; 20030 } 20031 } 20032 20033 wlc_phy_init_radio_regs(pi, regs_SYN_2056_ptr, (u16) RADIO_2056_SYN); 20034 20035 wlc_phy_init_radio_regs(pi, regs_TX_2056_ptr, (u16) RADIO_2056_TX0); 20036 20037 wlc_phy_init_radio_regs(pi, regs_TX_2056_ptr, (u16) RADIO_2056_TX1); 20038 20039 wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX0); 20040 20041 wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX1); 20042 } 20043 20044 static void wlc_phy_radio_postinit_2056(struct brcms_phy *pi) 20045 { 20046 mod_radio_reg(pi, RADIO_2056_SYN_COM_CTRL, 0xb, 0xb); 20047 20048 mod_radio_reg(pi, RADIO_2056_SYN_COM_PU, 0x2, 0x2); 20049 mod_radio_reg(pi, RADIO_2056_SYN_COM_RESET, 0x2, 0x2); 20050 udelay(1000); 20051 mod_radio_reg(pi, RADIO_2056_SYN_COM_RESET, 0x2, 0x0); 20052 20053 if ((pi->sh->boardflags2 & BFL2_LEGACY) 20054 || (pi->sh->boardflags2 & BFL2_XTALBUFOUTEN)) 20055 mod_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2, 0xf4, 0x0); 20056 else 20057 mod_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2, 0xfc, 0x0); 20058 20059 mod_radio_reg(pi, RADIO_2056_SYN_RCCAL_CTRL0, 0x1, 0x0); 20060 20061 if (pi->phy_init_por) 20062 wlc_phy_radio205x_rcal(pi); 20063 } 20064 20065 static void wlc_phy_radio_preinit_2055(struct brcms_phy *pi) 20066 { 20067 20068 and_phy_reg(pi, 0x78, ~RFCC_POR_FORCE); 20069 or_phy_reg(pi, 0x78, RFCC_CHIP0_PU | RFCC_OE_POR_FORCE); 20070 20071 or_phy_reg(pi, 0x78, RFCC_POR_FORCE); 20072 } 20073 20074 static void wlc_phy_radio_init_2055(struct brcms_phy *pi) 20075 { 20076 wlc_phy_init_radio_regs(pi, regs_2055, RADIO_DEFAULT_CORE); 20077 } 20078 20079 static void wlc_phy_radio_postinit_2055(struct brcms_phy *pi) 20080 { 20081 20082 and_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, 20083 ~(RADIO_2055_JTAGCTRL_MASK | RADIO_2055_JTAGSYNC_MASK)); 20084 20085 if (((pi->sh->sromrev >= 4) 20086 && !(pi->sh->boardflags2 & BFL2_RXBB_INT_REG_DIS)) 20087 || ((pi->sh->sromrev < 4))) { 20088 and_radio_reg(pi, RADIO_2055_CORE1_RXBB_REGULATOR, 0x7F); 20089 and_radio_reg(pi, RADIO_2055_CORE2_RXBB_REGULATOR, 0x7F); 20090 } 20091 20092 mod_radio_reg(pi, RADIO_2055_RRCCAL_N_OPT_SEL, 0x3F, 0x2C); 20093 write_radio_reg(pi, RADIO_2055_CAL_MISC, 0x3C); 20094 20095 and_radio_reg(pi, RADIO_2055_CAL_MISC, 20096 ~(RADIO_2055_RRCAL_START | RADIO_2055_RRCAL_RST_N)); 20097 20098 or_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, RADIO_2055_CAL_LPO_ENABLE); 20099 20100 or_radio_reg(pi, RADIO_2055_CAL_MISC, RADIO_2055_RRCAL_RST_N); 20101 20102 udelay(1000); 20103 20104 or_radio_reg(pi, RADIO_2055_CAL_MISC, RADIO_2055_RRCAL_START); 20105 20106 SPINWAIT(((read_radio_reg(pi, RADIO_2055_CAL_COUNTER_OUT2) & 20107 RADIO_2055_RCAL_DONE) != RADIO_2055_RCAL_DONE), 2000); 20108 20109 if (WARN((read_radio_reg(pi, RADIO_2055_CAL_COUNTER_OUT2) & 20110 RADIO_2055_RCAL_DONE) != RADIO_2055_RCAL_DONE, 20111 "HW error: radio calibration1\n")) 20112 return; 20113 20114 and_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, 20115 ~(RADIO_2055_CAL_LPO_ENABLE)); 20116 20117 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, pi->radio_chanspec); 20118 20119 write_radio_reg(pi, RADIO_2055_CORE1_RXBB_LPF, 9); 20120 write_radio_reg(pi, RADIO_2055_CORE2_RXBB_LPF, 9); 20121 20122 write_radio_reg(pi, RADIO_2055_CORE1_RXBB_MIDAC_HIPAS, 0x83); 20123 write_radio_reg(pi, RADIO_2055_CORE2_RXBB_MIDAC_HIPAS, 0x83); 20124 20125 mod_radio_reg(pi, RADIO_2055_CORE1_LNA_GAINBST, 20126 RADIO_2055_GAINBST_VAL_MASK, RADIO_2055_GAINBST_CODE); 20127 mod_radio_reg(pi, RADIO_2055_CORE2_LNA_GAINBST, 20128 RADIO_2055_GAINBST_VAL_MASK, RADIO_2055_GAINBST_CODE); 20129 if (pi->nphy_gain_boost) { 20130 and_radio_reg(pi, RADIO_2055_CORE1_RXRF_SPC1, 20131 ~(RADIO_2055_GAINBST_DISABLE)); 20132 and_radio_reg(pi, RADIO_2055_CORE2_RXRF_SPC1, 20133 ~(RADIO_2055_GAINBST_DISABLE)); 20134 } else { 20135 or_radio_reg(pi, RADIO_2055_CORE1_RXRF_SPC1, 20136 RADIO_2055_GAINBST_DISABLE); 20137 or_radio_reg(pi, RADIO_2055_CORE2_RXRF_SPC1, 20138 RADIO_2055_GAINBST_DISABLE); 20139 } 20140 20141 udelay(2); 20142 } 20143 20144 void wlc_phy_switch_radio_nphy(struct brcms_phy *pi, bool on) 20145 { 20146 if (on) { 20147 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 20148 if (!pi->radio_is_on) { 20149 wlc_phy_radio_preinit_205x(pi); 20150 wlc_phy_radio_init_2057(pi); 20151 wlc_phy_radio_postinit_2057(pi); 20152 } 20153 20154 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, 20155 pi->radio_chanspec); 20156 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 20157 wlc_phy_radio_preinit_205x(pi); 20158 wlc_phy_radio_init_2056(pi); 20159 wlc_phy_radio_postinit_2056(pi); 20160 20161 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, 20162 pi->radio_chanspec); 20163 } else { 20164 wlc_phy_radio_preinit_2055(pi); 20165 wlc_phy_radio_init_2055(pi); 20166 wlc_phy_radio_postinit_2055(pi); 20167 } 20168 20169 pi->radio_is_on = true; 20170 20171 } else { 20172 20173 if (NREV_GE(pi->pubpi.phy_rev, 3) 20174 && NREV_LT(pi->pubpi.phy_rev, 7)) { 20175 and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); 20176 mod_radio_reg(pi, RADIO_2056_SYN_COM_PU, 0x2, 0x0); 20177 20178 write_radio_reg(pi, 20179 RADIO_2056_TX_PADA_BOOST_TUNE | 20180 RADIO_2056_TX0, 0); 20181 write_radio_reg(pi, 20182 RADIO_2056_TX_PADG_BOOST_TUNE | 20183 RADIO_2056_TX0, 0); 20184 write_radio_reg(pi, 20185 RADIO_2056_TX_PGAA_BOOST_TUNE | 20186 RADIO_2056_TX0, 0); 20187 write_radio_reg(pi, 20188 RADIO_2056_TX_PGAG_BOOST_TUNE | 20189 RADIO_2056_TX0, 0); 20190 mod_radio_reg(pi, 20191 RADIO_2056_TX_MIXA_BOOST_TUNE | 20192 RADIO_2056_TX0, 0xf0, 0); 20193 write_radio_reg(pi, 20194 RADIO_2056_TX_MIXG_BOOST_TUNE | 20195 RADIO_2056_TX0, 0); 20196 20197 write_radio_reg(pi, 20198 RADIO_2056_TX_PADA_BOOST_TUNE | 20199 RADIO_2056_TX1, 0); 20200 write_radio_reg(pi, 20201 RADIO_2056_TX_PADG_BOOST_TUNE | 20202 RADIO_2056_TX1, 0); 20203 write_radio_reg(pi, 20204 RADIO_2056_TX_PGAA_BOOST_TUNE | 20205 RADIO_2056_TX1, 0); 20206 write_radio_reg(pi, 20207 RADIO_2056_TX_PGAG_BOOST_TUNE | 20208 RADIO_2056_TX1, 0); 20209 mod_radio_reg(pi, 20210 RADIO_2056_TX_MIXA_BOOST_TUNE | 20211 RADIO_2056_TX1, 0xf0, 0); 20212 write_radio_reg(pi, 20213 RADIO_2056_TX_MIXG_BOOST_TUNE | 20214 RADIO_2056_TX1, 0); 20215 20216 pi->radio_is_on = false; 20217 } 20218 20219 if (NREV_GE(pi->pubpi.phy_rev, 8)) { 20220 and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); 20221 pi->radio_is_on = false; 20222 } 20223 20224 } 20225 } 20226 20227 static bool 20228 wlc_phy_chan2freq_nphy(struct brcms_phy *pi, uint channel, int *f, 20229 const struct chan_info_nphy_radio2057 **t0, 20230 const struct chan_info_nphy_radio205x **t1, 20231 const struct chan_info_nphy_radio2057_rev5 **t2, 20232 const struct chan_info_nphy_2055 **t3) 20233 { 20234 uint i; 20235 const struct chan_info_nphy_radio2057 *chan_info_tbl_p_0 = NULL; 20236 const struct chan_info_nphy_radio205x *chan_info_tbl_p_1 = NULL; 20237 const struct chan_info_nphy_radio2057_rev5 *chan_info_tbl_p_2 = NULL; 20238 u32 tbl_len = 0; 20239 20240 int freq = 0; 20241 20242 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 20243 20244 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 20245 20246 chan_info_tbl_p_0 = chan_info_nphyrev7_2057_rev4; 20247 tbl_len = ARRAY_SIZE(chan_info_nphyrev7_2057_rev4); 20248 20249 } else if (NREV_IS(pi->pubpi.phy_rev, 8) 20250 || NREV_IS(pi->pubpi.phy_rev, 9)) { 20251 switch (pi->pubpi.radiorev) { 20252 20253 case 5: 20254 20255 if (pi->pubpi.radiover == 0x0) { 20256 20257 chan_info_tbl_p_2 = 20258 chan_info_nphyrev8_2057_rev5; 20259 tbl_len = ARRAY_SIZE( 20260 chan_info_nphyrev8_2057_rev5); 20261 20262 } else if (pi->pubpi.radiover == 0x1) { 20263 20264 chan_info_tbl_p_2 = 20265 chan_info_nphyrev9_2057_rev5v1; 20266 tbl_len = ARRAY_SIZE( 20267 chan_info_nphyrev9_2057_rev5v1); 20268 20269 } 20270 break; 20271 20272 case 7: 20273 chan_info_tbl_p_0 = 20274 chan_info_nphyrev8_2057_rev7; 20275 tbl_len = ARRAY_SIZE( 20276 chan_info_nphyrev8_2057_rev7); 20277 break; 20278 20279 case 8: 20280 chan_info_tbl_p_0 = 20281 chan_info_nphyrev8_2057_rev8; 20282 tbl_len = ARRAY_SIZE( 20283 chan_info_nphyrev8_2057_rev8); 20284 break; 20285 20286 default: 20287 break; 20288 } 20289 } else if (NREV_IS(pi->pubpi.phy_rev, 16)) { 20290 20291 chan_info_tbl_p_0 = chan_info_nphyrev8_2057_rev8; 20292 tbl_len = ARRAY_SIZE(chan_info_nphyrev8_2057_rev8); 20293 } else { 20294 goto fail; 20295 } 20296 20297 for (i = 0; i < tbl_len; i++) { 20298 if (pi->pubpi.radiorev == 5) { 20299 20300 if (chan_info_tbl_p_2[i].chan == channel) 20301 break; 20302 } else { 20303 20304 if (chan_info_tbl_p_0[i].chan == channel) 20305 break; 20306 } 20307 } 20308 20309 if (i >= tbl_len) 20310 goto fail; 20311 20312 if (pi->pubpi.radiorev == 5) { 20313 *t2 = &chan_info_tbl_p_2[i]; 20314 freq = chan_info_tbl_p_2[i].freq; 20315 } else { 20316 *t0 = &chan_info_tbl_p_0[i]; 20317 freq = chan_info_tbl_p_0[i].freq; 20318 } 20319 20320 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 20321 if (NREV_IS(pi->pubpi.phy_rev, 3)) { 20322 chan_info_tbl_p_1 = chan_info_nphyrev3_2056; 20323 tbl_len = ARRAY_SIZE(chan_info_nphyrev3_2056); 20324 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 20325 chan_info_tbl_p_1 = chan_info_nphyrev4_2056_A1; 20326 tbl_len = ARRAY_SIZE(chan_info_nphyrev4_2056_A1); 20327 } else if (NREV_IS(pi->pubpi.phy_rev, 5) 20328 || NREV_IS(pi->pubpi.phy_rev, 6)) { 20329 switch (pi->pubpi.radiorev) { 20330 case 5: 20331 chan_info_tbl_p_1 = chan_info_nphyrev5_2056v5; 20332 tbl_len = ARRAY_SIZE(chan_info_nphyrev5_2056v5); 20333 break; 20334 case 6: 20335 chan_info_tbl_p_1 = chan_info_nphyrev6_2056v6; 20336 tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v6); 20337 break; 20338 case 7: 20339 case 9: 20340 chan_info_tbl_p_1 = chan_info_nphyrev5n6_2056v7; 20341 tbl_len = 20342 ARRAY_SIZE(chan_info_nphyrev5n6_2056v7); 20343 break; 20344 case 8: 20345 chan_info_tbl_p_1 = chan_info_nphyrev6_2056v8; 20346 tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v8); 20347 break; 20348 case 11: 20349 chan_info_tbl_p_1 = chan_info_nphyrev6_2056v11; 20350 tbl_len = ARRAY_SIZE( 20351 chan_info_nphyrev6_2056v11); 20352 break; 20353 default: 20354 break; 20355 } 20356 } 20357 20358 for (i = 0; i < tbl_len; i++) { 20359 if (chan_info_tbl_p_1[i].chan == channel) 20360 break; 20361 } 20362 20363 if (i >= tbl_len) 20364 goto fail; 20365 20366 *t1 = &chan_info_tbl_p_1[i]; 20367 freq = chan_info_tbl_p_1[i].freq; 20368 20369 } else { 20370 for (i = 0; i < ARRAY_SIZE(chan_info_nphy_2055); i++) 20371 if (chan_info_nphy_2055[i].chan == channel) 20372 break; 20373 20374 if (i >= ARRAY_SIZE(chan_info_nphy_2055)) 20375 goto fail; 20376 20377 *t3 = &chan_info_nphy_2055[i]; 20378 freq = chan_info_nphy_2055[i].freq; 20379 } 20380 20381 *f = freq; 20382 return true; 20383 20384 fail: 20385 *f = WL_CHAN_FREQ_RANGE_2G; 20386 return false; 20387 } 20388 20389 u8 wlc_phy_get_chan_freq_range_nphy(struct brcms_phy *pi, uint channel) 20390 { 20391 int freq; 20392 const struct chan_info_nphy_radio2057 *t0 = NULL; 20393 const struct chan_info_nphy_radio205x *t1 = NULL; 20394 const struct chan_info_nphy_radio2057_rev5 *t2 = NULL; 20395 const struct chan_info_nphy_2055 *t3 = NULL; 20396 20397 if (channel == 0) 20398 channel = CHSPEC_CHANNEL(pi->radio_chanspec); 20399 20400 wlc_phy_chan2freq_nphy(pi, channel, &freq, &t0, &t1, &t2, &t3); 20401 20402 if (CHSPEC_IS2G(pi->radio_chanspec)) 20403 return WL_CHAN_FREQ_RANGE_2G; 20404 20405 if ((freq >= BASE_LOW_5G_CHAN) && (freq < BASE_MID_5G_CHAN)) 20406 return WL_CHAN_FREQ_RANGE_5GL; 20407 else if ((freq >= BASE_MID_5G_CHAN) && (freq < BASE_HIGH_5G_CHAN)) 20408 return WL_CHAN_FREQ_RANGE_5GM; 20409 else 20410 return WL_CHAN_FREQ_RANGE_5GH; 20411 } 20412 20413 static void 20414 wlc_phy_chanspec_radio2055_setup(struct brcms_phy *pi, 20415 const struct chan_info_nphy_2055 *ci) 20416 { 20417 20418 write_radio_reg(pi, RADIO_2055_PLL_REF, ci->RF_pll_ref); 20419 write_radio_reg(pi, RADIO_2055_RF_PLL_MOD0, ci->RF_rf_pll_mod0); 20420 write_radio_reg(pi, RADIO_2055_RF_PLL_MOD1, ci->RF_rf_pll_mod1); 20421 write_radio_reg(pi, RADIO_2055_VCO_CAP_TAIL, ci->RF_vco_cap_tail); 20422 20423 BRCMS_PHY_WAR_PR51571(pi); 20424 20425 write_radio_reg(pi, RADIO_2055_VCO_CAL1, ci->RF_vco_cal1); 20426 write_radio_reg(pi, RADIO_2055_VCO_CAL2, ci->RF_vco_cal2); 20427 write_radio_reg(pi, RADIO_2055_PLL_LF_C1, ci->RF_pll_lf_c1); 20428 write_radio_reg(pi, RADIO_2055_PLL_LF_R1, ci->RF_pll_lf_r1); 20429 20430 BRCMS_PHY_WAR_PR51571(pi); 20431 20432 write_radio_reg(pi, RADIO_2055_PLL_LF_C2, ci->RF_pll_lf_c2); 20433 write_radio_reg(pi, RADIO_2055_LGBUF_CEN_BUF, ci->RF_lgbuf_cen_buf); 20434 write_radio_reg(pi, RADIO_2055_LGEN_TUNE1, ci->RF_lgen_tune1); 20435 write_radio_reg(pi, RADIO_2055_LGEN_TUNE2, ci->RF_lgen_tune2); 20436 20437 BRCMS_PHY_WAR_PR51571(pi); 20438 20439 write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_A_TUNE, 20440 ci->RF_core1_lgbuf_a_tune); 20441 write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_G_TUNE, 20442 ci->RF_core1_lgbuf_g_tune); 20443 write_radio_reg(pi, RADIO_2055_CORE1_RXRF_REG1, ci->RF_core1_rxrf_reg1); 20444 write_radio_reg(pi, RADIO_2055_CORE1_TX_PGA_PAD_TN, 20445 ci->RF_core1_tx_pga_pad_tn); 20446 20447 BRCMS_PHY_WAR_PR51571(pi); 20448 20449 write_radio_reg(pi, RADIO_2055_CORE1_TX_MX_BGTRIM, 20450 ci->RF_core1_tx_mx_bgtrim); 20451 write_radio_reg(pi, RADIO_2055_CORE2_LGBUF_A_TUNE, 20452 ci->RF_core2_lgbuf_a_tune); 20453 write_radio_reg(pi, RADIO_2055_CORE2_LGBUF_G_TUNE, 20454 ci->RF_core2_lgbuf_g_tune); 20455 write_radio_reg(pi, RADIO_2055_CORE2_RXRF_REG1, ci->RF_core2_rxrf_reg1); 20456 20457 BRCMS_PHY_WAR_PR51571(pi); 20458 20459 write_radio_reg(pi, RADIO_2055_CORE2_TX_PGA_PAD_TN, 20460 ci->RF_core2_tx_pga_pad_tn); 20461 write_radio_reg(pi, RADIO_2055_CORE2_TX_MX_BGTRIM, 20462 ci->RF_core2_tx_mx_bgtrim); 20463 20464 udelay(50); 20465 20466 write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x05); 20467 write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x45); 20468 20469 BRCMS_PHY_WAR_PR51571(pi); 20470 20471 write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x65); 20472 20473 udelay(300); 20474 } 20475 20476 static void 20477 wlc_phy_chanspec_radio2056_setup(struct brcms_phy *pi, 20478 const struct chan_info_nphy_radio205x *ci) 20479 { 20480 const struct radio_regs *regs_SYN_2056_ptr = NULL; 20481 20482 write_radio_reg(pi, 20483 RADIO_2056_SYN_PLL_VCOCAL1 | RADIO_2056_SYN, 20484 ci->RF_SYN_pll_vcocal1); 20485 write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL2 | RADIO_2056_SYN, 20486 ci->RF_SYN_pll_vcocal2); 20487 write_radio_reg(pi, RADIO_2056_SYN_PLL_REFDIV | RADIO_2056_SYN, 20488 ci->RF_SYN_pll_refdiv); 20489 write_radio_reg(pi, RADIO_2056_SYN_PLL_MMD2 | RADIO_2056_SYN, 20490 ci->RF_SYN_pll_mmd2); 20491 write_radio_reg(pi, RADIO_2056_SYN_PLL_MMD1 | RADIO_2056_SYN, 20492 ci->RF_SYN_pll_mmd1); 20493 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | RADIO_2056_SYN, 20494 ci->RF_SYN_pll_loopfilter1); 20495 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, 20496 ci->RF_SYN_pll_loopfilter2); 20497 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER3 | RADIO_2056_SYN, 20498 ci->RF_SYN_pll_loopfilter3); 20499 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER4 | RADIO_2056_SYN, 20500 ci->RF_SYN_pll_loopfilter4); 20501 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER5 | RADIO_2056_SYN, 20502 ci->RF_SYN_pll_loopfilter5); 20503 write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR27 | RADIO_2056_SYN, 20504 ci->RF_SYN_reserved_addr27); 20505 write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR28 | RADIO_2056_SYN, 20506 ci->RF_SYN_reserved_addr28); 20507 write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR29 | RADIO_2056_SYN, 20508 ci->RF_SYN_reserved_addr29); 20509 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_VCOBUF1 | RADIO_2056_SYN, 20510 ci->RF_SYN_logen_VCOBUF1); 20511 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_MIXER2 | RADIO_2056_SYN, 20512 ci->RF_SYN_logen_MIXER2); 20513 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_BUF3 | RADIO_2056_SYN, 20514 ci->RF_SYN_logen_BUF3); 20515 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_BUF4 | RADIO_2056_SYN, 20516 ci->RF_SYN_logen_BUF4); 20517 20518 write_radio_reg(pi, 20519 RADIO_2056_RX_LNAA_TUNE | RADIO_2056_RX0, 20520 ci->RF_RX0_lnaa_tune); 20521 write_radio_reg(pi, RADIO_2056_RX_LNAG_TUNE | RADIO_2056_RX0, 20522 ci->RF_RX0_lnag_tune); 20523 write_radio_reg(pi, RADIO_2056_TX_INTPAA_BOOST_TUNE | RADIO_2056_TX0, 20524 ci->RF_TX0_intpaa_boost_tune); 20525 write_radio_reg(pi, RADIO_2056_TX_INTPAG_BOOST_TUNE | RADIO_2056_TX0, 20526 ci->RF_TX0_intpag_boost_tune); 20527 write_radio_reg(pi, RADIO_2056_TX_PADA_BOOST_TUNE | RADIO_2056_TX0, 20528 ci->RF_TX0_pada_boost_tune); 20529 write_radio_reg(pi, RADIO_2056_TX_PADG_BOOST_TUNE | RADIO_2056_TX0, 20530 ci->RF_TX0_padg_boost_tune); 20531 write_radio_reg(pi, RADIO_2056_TX_PGAA_BOOST_TUNE | RADIO_2056_TX0, 20532 ci->RF_TX0_pgaa_boost_tune); 20533 write_radio_reg(pi, RADIO_2056_TX_PGAG_BOOST_TUNE | RADIO_2056_TX0, 20534 ci->RF_TX0_pgag_boost_tune); 20535 write_radio_reg(pi, RADIO_2056_TX_MIXA_BOOST_TUNE | RADIO_2056_TX0, 20536 ci->RF_TX0_mixa_boost_tune); 20537 write_radio_reg(pi, RADIO_2056_TX_MIXG_BOOST_TUNE | RADIO_2056_TX0, 20538 ci->RF_TX0_mixg_boost_tune); 20539 20540 write_radio_reg(pi, 20541 RADIO_2056_RX_LNAA_TUNE | RADIO_2056_RX1, 20542 ci->RF_RX1_lnaa_tune); 20543 write_radio_reg(pi, RADIO_2056_RX_LNAG_TUNE | RADIO_2056_RX1, 20544 ci->RF_RX1_lnag_tune); 20545 write_radio_reg(pi, RADIO_2056_TX_INTPAA_BOOST_TUNE | RADIO_2056_TX1, 20546 ci->RF_TX1_intpaa_boost_tune); 20547 write_radio_reg(pi, RADIO_2056_TX_INTPAG_BOOST_TUNE | RADIO_2056_TX1, 20548 ci->RF_TX1_intpag_boost_tune); 20549 write_radio_reg(pi, RADIO_2056_TX_PADA_BOOST_TUNE | RADIO_2056_TX1, 20550 ci->RF_TX1_pada_boost_tune); 20551 write_radio_reg(pi, RADIO_2056_TX_PADG_BOOST_TUNE | RADIO_2056_TX1, 20552 ci->RF_TX1_padg_boost_tune); 20553 write_radio_reg(pi, RADIO_2056_TX_PGAA_BOOST_TUNE | RADIO_2056_TX1, 20554 ci->RF_TX1_pgaa_boost_tune); 20555 write_radio_reg(pi, RADIO_2056_TX_PGAG_BOOST_TUNE | RADIO_2056_TX1, 20556 ci->RF_TX1_pgag_boost_tune); 20557 write_radio_reg(pi, RADIO_2056_TX_MIXA_BOOST_TUNE | RADIO_2056_TX1, 20558 ci->RF_TX1_mixa_boost_tune); 20559 write_radio_reg(pi, RADIO_2056_TX_MIXG_BOOST_TUNE | RADIO_2056_TX1, 20560 ci->RF_TX1_mixg_boost_tune); 20561 20562 if (NREV_IS(pi->pubpi.phy_rev, 3)) 20563 regs_SYN_2056_ptr = regs_SYN_2056; 20564 else if (NREV_IS(pi->pubpi.phy_rev, 4)) 20565 regs_SYN_2056_ptr = regs_SYN_2056_A1; 20566 else { 20567 switch (pi->pubpi.radiorev) { 20568 case 5: 20569 regs_SYN_2056_ptr = regs_SYN_2056_rev5; 20570 break; 20571 case 6: 20572 regs_SYN_2056_ptr = regs_SYN_2056_rev6; 20573 break; 20574 case 7: 20575 case 9: 20576 regs_SYN_2056_ptr = regs_SYN_2056_rev7; 20577 break; 20578 case 8: 20579 regs_SYN_2056_ptr = regs_SYN_2056_rev8; 20580 break; 20581 case 11: 20582 regs_SYN_2056_ptr = regs_SYN_2056_rev11; 20583 break; 20584 } 20585 } 20586 if (CHSPEC_IS2G(pi->radio_chanspec)) 20587 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | 20588 RADIO_2056_SYN, 20589 (u16) regs_SYN_2056_ptr[0x49 - 2].init_g); 20590 else 20591 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | 20592 RADIO_2056_SYN, 20593 (u16) regs_SYN_2056_ptr[0x49 - 2].init_a); 20594 20595 if (pi->sh->boardflags2 & BFL2_GPLL_WAR) { 20596 if (CHSPEC_IS2G(pi->radio_chanspec)) { 20597 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | 20598 RADIO_2056_SYN, 0x1f); 20599 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | 20600 RADIO_2056_SYN, 0x1f); 20601 20602 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 20603 (pi->sh->chip == BCMA_CHIP_ID_BCM47162)) { 20604 write_radio_reg(pi, 20605 RADIO_2056_SYN_PLL_LOOPFILTER4 | 20606 RADIO_2056_SYN, 0x14); 20607 write_radio_reg(pi, 20608 RADIO_2056_SYN_PLL_CP2 | 20609 RADIO_2056_SYN, 0x00); 20610 } else { 20611 write_radio_reg(pi, 20612 RADIO_2056_SYN_PLL_LOOPFILTER4 | 20613 RADIO_2056_SYN, 0xb); 20614 write_radio_reg(pi, 20615 RADIO_2056_SYN_PLL_CP2 | 20616 RADIO_2056_SYN, 0x14); 20617 } 20618 } 20619 } 20620 20621 if ((pi->sh->boardflags2 & BFL2_GPLL_WAR2) && 20622 (CHSPEC_IS2G(pi->radio_chanspec))) { 20623 write_radio_reg(pi, 20624 RADIO_2056_SYN_PLL_LOOPFILTER1 | RADIO_2056_SYN, 20625 0x1f); 20626 write_radio_reg(pi, 20627 RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, 20628 0x1f); 20629 write_radio_reg(pi, 20630 RADIO_2056_SYN_PLL_LOOPFILTER4 | RADIO_2056_SYN, 20631 0xb); 20632 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | RADIO_2056_SYN, 20633 0x20); 20634 } 20635 20636 if (pi->sh->boardflags2 & BFL2_APLL_WAR) { 20637 if (CHSPEC_IS5G(pi->radio_chanspec)) { 20638 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | 20639 RADIO_2056_SYN, 0x1f); 20640 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | 20641 RADIO_2056_SYN, 0x1f); 20642 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER4 | 20643 RADIO_2056_SYN, 0x5); 20644 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | 20645 RADIO_2056_SYN, 0xc); 20646 } 20647 } 20648 20649 if (PHY_IPA(pi) && CHSPEC_IS2G(pi->radio_chanspec)) { 20650 u16 pag_boost_tune; 20651 u16 padg_boost_tune; 20652 u16 pgag_boost_tune; 20653 u16 mixg_boost_tune; 20654 u16 bias, cascbias; 20655 uint core; 20656 20657 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 20658 20659 if (NREV_GE(pi->pubpi.phy_rev, 5)) { 20660 20661 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20662 PADG_IDAC, 0xcc); 20663 20664 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 20665 (pi->sh->chip == BCMA_CHIP_ID_BCM47162)) { 20666 bias = 0x40; 20667 cascbias = 0x45; 20668 pag_boost_tune = 0x5; 20669 pgag_boost_tune = 0x33; 20670 padg_boost_tune = 0x77; 20671 mixg_boost_tune = 0x55; 20672 } else { 20673 bias = 0x25; 20674 cascbias = 0x20; 20675 20676 if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224 || 20677 pi->sh->chip == BCMA_CHIP_ID_BCM43225) && 20678 pi->sh->chippkg == BCMA_PKG_ID_BCM43224_FAB_SMIC) { 20679 bias = 0x2a; 20680 cascbias = 0x38; 20681 } 20682 20683 pag_boost_tune = 0x4; 20684 pgag_boost_tune = 0x03; 20685 padg_boost_tune = 0x77; 20686 mixg_boost_tune = 0x65; 20687 } 20688 20689 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20690 INTPAG_IMAIN_STAT, bias); 20691 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20692 INTPAG_IAUX_STAT, bias); 20693 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20694 INTPAG_CASCBIAS, cascbias); 20695 20696 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20697 INTPAG_BOOST_TUNE, 20698 pag_boost_tune); 20699 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20700 PGAG_BOOST_TUNE, 20701 pgag_boost_tune); 20702 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20703 PADG_BOOST_TUNE, 20704 padg_boost_tune); 20705 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20706 MIXG_BOOST_TUNE, 20707 mixg_boost_tune); 20708 } else { 20709 20710 bias = (pi->bw == WL_CHANSPEC_BW_40) ? 20711 0x40 : 0x20; 20712 20713 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20714 INTPAG_IMAIN_STAT, bias); 20715 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20716 INTPAG_IAUX_STAT, bias); 20717 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20718 INTPAG_CASCBIAS, 0x30); 20719 } 20720 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, PA_SPARE1, 20721 0xee); 20722 } 20723 } 20724 20725 if (PHY_IPA(pi) && NREV_IS(pi->pubpi.phy_rev, 6) 20726 && CHSPEC_IS5G(pi->radio_chanspec)) { 20727 u16 paa_boost_tune; 20728 u16 pada_boost_tune; 20729 u16 pgaa_boost_tune; 20730 u16 mixa_boost_tune; 20731 u16 freq, pabias, cascbias; 20732 uint core; 20733 20734 freq = CHAN5G_FREQ(CHSPEC_CHANNEL(pi->radio_chanspec)); 20735 20736 if (freq < 5150) { 20737 20738 paa_boost_tune = 0xa; 20739 pada_boost_tune = 0x77; 20740 pgaa_boost_tune = 0xf; 20741 mixa_boost_tune = 0xf; 20742 } else if (freq < 5340) { 20743 20744 paa_boost_tune = 0x8; 20745 pada_boost_tune = 0x77; 20746 pgaa_boost_tune = 0xfb; 20747 mixa_boost_tune = 0xf; 20748 } else if (freq < 5650) { 20749 20750 paa_boost_tune = 0x0; 20751 pada_boost_tune = 0x77; 20752 pgaa_boost_tune = 0xb; 20753 mixa_boost_tune = 0xf; 20754 } else { 20755 20756 paa_boost_tune = 0x0; 20757 pada_boost_tune = 0x77; 20758 if (freq != 5825) 20759 pgaa_boost_tune = -(int)(freq - 18) / 36 + 168; 20760 else 20761 pgaa_boost_tune = 6; 20762 20763 mixa_boost_tune = 0xf; 20764 } 20765 20766 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 20767 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20768 INTPAA_BOOST_TUNE, paa_boost_tune); 20769 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20770 PADA_BOOST_TUNE, pada_boost_tune); 20771 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20772 PGAA_BOOST_TUNE, pgaa_boost_tune); 20773 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20774 MIXA_BOOST_TUNE, mixa_boost_tune); 20775 20776 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20777 TXSPARE1, 0x30); 20778 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20779 PA_SPARE2, 0xee); 20780 20781 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20782 PADA_CASCBIAS, 0x3); 20783 20784 cascbias = 0x30; 20785 20786 if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224 || 20787 pi->sh->chip == BCMA_CHIP_ID_BCM43225) && 20788 pi->sh->chippkg == BCMA_PKG_ID_BCM43224_FAB_SMIC) 20789 cascbias = 0x35; 20790 20791 pabias = (pi->phy_pabias == 0) ? 0x30 : pi->phy_pabias; 20792 20793 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20794 INTPAA_IAUX_STAT, pabias); 20795 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20796 INTPAA_IMAIN_STAT, pabias); 20797 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20798 INTPAA_CASCBIAS, cascbias); 20799 } 20800 } 20801 20802 udelay(50); 20803 20804 wlc_phy_radio205x_vcocal_nphy(pi); 20805 } 20806 20807 void wlc_phy_radio205x_vcocal_nphy(struct brcms_phy *pi) 20808 { 20809 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 20810 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x0); 20811 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x04, 0x0); 20812 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x04, 20813 (1 << 2)); 20814 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x01); 20815 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 20816 write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL12, 0x0); 20817 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x38); 20818 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x18); 20819 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x38); 20820 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x39); 20821 } 20822 20823 udelay(300); 20824 } 20825 20826 static void 20827 wlc_phy_chanspec_radio2057_setup( 20828 struct brcms_phy *pi, 20829 const struct chan_info_nphy_radio2057 *ci, 20830 const struct chan_info_nphy_radio2057_rev5 * 20831 ci2) 20832 { 20833 int coreNum; 20834 u16 txmix2g_tune_boost_pu = 0; 20835 u16 pad2g_tune_pus = 0; 20836 20837 if (pi->pubpi.radiorev == 5) { 20838 20839 write_radio_reg(pi, 20840 RADIO_2057_VCOCAL_COUNTVAL0, 20841 ci2->RF_vcocal_countval0); 20842 write_radio_reg(pi, RADIO_2057_VCOCAL_COUNTVAL1, 20843 ci2->RF_vcocal_countval1); 20844 write_radio_reg(pi, RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE, 20845 ci2->RF_rfpll_refmaster_sparextalsize); 20846 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20847 ci2->RF_rfpll_loopfilter_r1); 20848 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20849 ci2->RF_rfpll_loopfilter_c2); 20850 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20851 ci2->RF_rfpll_loopfilter_c1); 20852 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 20853 ci2->RF_cp_kpd_idac); 20854 write_radio_reg(pi, RADIO_2057_RFPLL_MMD0, ci2->RF_rfpll_mmd0); 20855 write_radio_reg(pi, RADIO_2057_RFPLL_MMD1, ci2->RF_rfpll_mmd1); 20856 write_radio_reg(pi, 20857 RADIO_2057_VCOBUF_TUNE, ci2->RF_vcobuf_tune); 20858 write_radio_reg(pi, 20859 RADIO_2057_LOGEN_MX2G_TUNE, 20860 ci2->RF_logen_mx2g_tune); 20861 write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF2G_TUNE, 20862 ci2->RF_logen_indbuf2g_tune); 20863 20864 write_radio_reg(pi, 20865 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0, 20866 ci2->RF_txmix2g_tune_boost_pu_core0); 20867 write_radio_reg(pi, 20868 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 20869 ci2->RF_pad2g_tune_pus_core0); 20870 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE0, 20871 ci2->RF_lna2g_tune_core0); 20872 20873 write_radio_reg(pi, 20874 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1, 20875 ci2->RF_txmix2g_tune_boost_pu_core1); 20876 write_radio_reg(pi, 20877 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 20878 ci2->RF_pad2g_tune_pus_core1); 20879 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE1, 20880 ci2->RF_lna2g_tune_core1); 20881 20882 } else { 20883 20884 write_radio_reg(pi, 20885 RADIO_2057_VCOCAL_COUNTVAL0, 20886 ci->RF_vcocal_countval0); 20887 write_radio_reg(pi, RADIO_2057_VCOCAL_COUNTVAL1, 20888 ci->RF_vcocal_countval1); 20889 write_radio_reg(pi, RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE, 20890 ci->RF_rfpll_refmaster_sparextalsize); 20891 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20892 ci->RF_rfpll_loopfilter_r1); 20893 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20894 ci->RF_rfpll_loopfilter_c2); 20895 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20896 ci->RF_rfpll_loopfilter_c1); 20897 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, ci->RF_cp_kpd_idac); 20898 write_radio_reg(pi, RADIO_2057_RFPLL_MMD0, ci->RF_rfpll_mmd0); 20899 write_radio_reg(pi, RADIO_2057_RFPLL_MMD1, ci->RF_rfpll_mmd1); 20900 write_radio_reg(pi, RADIO_2057_VCOBUF_TUNE, ci->RF_vcobuf_tune); 20901 write_radio_reg(pi, 20902 RADIO_2057_LOGEN_MX2G_TUNE, 20903 ci->RF_logen_mx2g_tune); 20904 write_radio_reg(pi, RADIO_2057_LOGEN_MX5G_TUNE, 20905 ci->RF_logen_mx5g_tune); 20906 write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF2G_TUNE, 20907 ci->RF_logen_indbuf2g_tune); 20908 write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF5G_TUNE, 20909 ci->RF_logen_indbuf5g_tune); 20910 20911 write_radio_reg(pi, 20912 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0, 20913 ci->RF_txmix2g_tune_boost_pu_core0); 20914 write_radio_reg(pi, 20915 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 20916 ci->RF_pad2g_tune_pus_core0); 20917 write_radio_reg(pi, RADIO_2057_PGA_BOOST_TUNE_CORE0, 20918 ci->RF_pga_boost_tune_core0); 20919 write_radio_reg(pi, RADIO_2057_TXMIX5G_BOOST_TUNE_CORE0, 20920 ci->RF_txmix5g_boost_tune_core0); 20921 write_radio_reg(pi, RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE0, 20922 ci->RF_pad5g_tune_misc_pus_core0); 20923 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE0, 20924 ci->RF_lna2g_tune_core0); 20925 write_radio_reg(pi, RADIO_2057_LNA5G_TUNE_CORE0, 20926 ci->RF_lna5g_tune_core0); 20927 20928 write_radio_reg(pi, 20929 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1, 20930 ci->RF_txmix2g_tune_boost_pu_core1); 20931 write_radio_reg(pi, 20932 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 20933 ci->RF_pad2g_tune_pus_core1); 20934 write_radio_reg(pi, RADIO_2057_PGA_BOOST_TUNE_CORE1, 20935 ci->RF_pga_boost_tune_core1); 20936 write_radio_reg(pi, RADIO_2057_TXMIX5G_BOOST_TUNE_CORE1, 20937 ci->RF_txmix5g_boost_tune_core1); 20938 write_radio_reg(pi, RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE1, 20939 ci->RF_pad5g_tune_misc_pus_core1); 20940 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE1, 20941 ci->RF_lna2g_tune_core1); 20942 write_radio_reg(pi, RADIO_2057_LNA5G_TUNE_CORE1, 20943 ci->RF_lna5g_tune_core1); 20944 } 20945 20946 if ((pi->pubpi.radiorev <= 4) || (pi->pubpi.radiorev == 6)) { 20947 20948 if (CHSPEC_IS2G(pi->radio_chanspec)) { 20949 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20950 0x3f); 20951 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); 20952 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20953 0x8); 20954 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20955 0x8); 20956 } else { 20957 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20958 0x1f); 20959 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); 20960 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20961 0x8); 20962 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20963 0x8); 20964 } 20965 } else if ((pi->pubpi.radiorev == 5) || (pi->pubpi.radiorev == 7) || 20966 (pi->pubpi.radiorev == 8)) { 20967 20968 if (CHSPEC_IS2G(pi->radio_chanspec)) { 20969 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20970 0x1b); 20971 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x30); 20972 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20973 0xa); 20974 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20975 0xa); 20976 } else { 20977 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20978 0x1f); 20979 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); 20980 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20981 0x8); 20982 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20983 0x8); 20984 } 20985 20986 } 20987 20988 if (CHSPEC_IS2G(pi->radio_chanspec)) { 20989 if (PHY_IPA(pi)) { 20990 if (pi->pubpi.radiorev == 3) 20991 txmix2g_tune_boost_pu = 0x6b; 20992 20993 if (pi->pubpi.radiorev == 5) 20994 pad2g_tune_pus = 0x73; 20995 20996 } else { 20997 if (pi->pubpi.radiorev != 5) { 20998 pad2g_tune_pus = 0x3; 20999 21000 txmix2g_tune_boost_pu = 0x61; 21001 } 21002 } 21003 21004 for (coreNum = 0; coreNum <= 1; coreNum++) { 21005 21006 if (txmix2g_tune_boost_pu != 0) 21007 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 21008 TXMIX2G_TUNE_BOOST_PU, 21009 txmix2g_tune_boost_pu); 21010 21011 if (pad2g_tune_pus != 0) 21012 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 21013 PAD2G_TUNE_PUS, 21014 pad2g_tune_pus); 21015 } 21016 } 21017 21018 udelay(50); 21019 21020 wlc_phy_radio205x_vcocal_nphy(pi); 21021 } 21022 21023 static void 21024 wlc_phy_chanspec_nphy_setup(struct brcms_phy *pi, u16 chanspec, 21025 const struct nphy_sfo_cfg *ci) 21026 { 21027 u16 val; 21028 21029 val = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; 21030 if (CHSPEC_IS5G(chanspec) && !val) { 21031 21032 val = bcma_read16(pi->d11core, D11REGOFFS(psm_phy_hdr_param)); 21033 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), 21034 (val | MAC_PHY_FORCE_CLK)); 21035 21036 or_phy_reg(pi, (NPHY_TO_BPHY_OFF + BPHY_BB_CONFIG), 21037 (BBCFG_RESETCCA | BBCFG_RESETRX)); 21038 21039 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), val); 21040 21041 or_phy_reg(pi, 0x09, NPHY_BandControl_currentBand); 21042 } else if (!CHSPEC_IS5G(chanspec) && val) { 21043 21044 and_phy_reg(pi, 0x09, ~NPHY_BandControl_currentBand); 21045 21046 val = bcma_read16(pi->d11core, D11REGOFFS(psm_phy_hdr_param)); 21047 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), 21048 (val | MAC_PHY_FORCE_CLK)); 21049 21050 and_phy_reg(pi, (NPHY_TO_BPHY_OFF + BPHY_BB_CONFIG), 21051 0xffff & ~(BBCFG_RESETCCA | BBCFG_RESETRX)); 21052 21053 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), val); 21054 } 21055 21056 write_phy_reg(pi, 0x1ce, ci->PHY_BW1a); 21057 write_phy_reg(pi, 0x1cf, ci->PHY_BW2); 21058 write_phy_reg(pi, 0x1d0, ci->PHY_BW3); 21059 21060 write_phy_reg(pi, 0x1d1, ci->PHY_BW4); 21061 write_phy_reg(pi, 0x1d2, ci->PHY_BW5); 21062 write_phy_reg(pi, 0x1d3, ci->PHY_BW6); 21063 21064 if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { 21065 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_ofdm_en, 0); 21066 21067 or_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_TEST, 0x800); 21068 } else { 21069 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_ofdm_en, 21070 NPHY_ClassifierCtrl_ofdm_en); 21071 21072 if (CHSPEC_IS2G(chanspec)) 21073 and_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_TEST, ~0x840); 21074 } 21075 21076 if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) 21077 wlc_phy_txpwr_fixpower_nphy(pi); 21078 21079 if (NREV_LT(pi->pubpi.phy_rev, 3)) 21080 wlc_phy_adjust_lnagaintbl_nphy(pi); 21081 21082 wlc_phy_txlpfbw_nphy(pi); 21083 21084 if (NREV_GE(pi->pubpi.phy_rev, 3) 21085 && (pi->phy_spuravoid != SPURAVOID_DISABLE)) { 21086 u8 spuravoid = 0; 21087 21088 val = CHSPEC_CHANNEL(chanspec); 21089 if (!CHSPEC_IS40(pi->radio_chanspec)) { 21090 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21091 if ((val == 13) || (val == 14) || (val == 153)) 21092 spuravoid = 1; 21093 } else if (((val >= 5) && (val <= 8)) || (val == 13) 21094 || (val == 14)) { 21095 spuravoid = 1; 21096 } 21097 } else if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21098 if (val == 54) 21099 spuravoid = 1; 21100 } else if (pi->nphy_aband_spurwar_en && 21101 ((val == 38) || (val == 102) || (val == 118))) { 21102 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) 21103 && (pi->sh->chippkg == BCMA_PKG_ID_BCM4717)) { 21104 spuravoid = 0; 21105 } else { 21106 spuravoid = 1; 21107 } 21108 } 21109 21110 if (pi->phy_spuravoid == SPURAVOID_FORCEON) 21111 spuravoid = 1; 21112 21113 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 21114 (pi->sh->chip == BCMA_CHIP_ID_BCM43225)) { 21115 bcma_pmu_spuravoid_pllupdate(&pi->d11core->bus->drv_cc, 21116 spuravoid); 21117 } else { 21118 wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false); 21119 bcma_pmu_spuravoid_pllupdate(&pi->d11core->bus->drv_cc, 21120 spuravoid); 21121 wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true); 21122 } 21123 21124 if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224) || 21125 (pi->sh->chip == BCMA_CHIP_ID_BCM43225)) { 21126 if (spuravoid == 1) { 21127 bcma_write16(pi->d11core, 21128 D11REGOFFS(tsf_clk_frac_l), 21129 0x5341); 21130 bcma_write16(pi->d11core, 21131 D11REGOFFS(tsf_clk_frac_h), 0x8); 21132 } else { 21133 bcma_write16(pi->d11core, 21134 D11REGOFFS(tsf_clk_frac_l), 21135 0x8889); 21136 bcma_write16(pi->d11core, 21137 D11REGOFFS(tsf_clk_frac_h), 0x8); 21138 } 21139 } 21140 21141 if (!((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 21142 (pi->sh->chip == BCMA_CHIP_ID_BCM47162))) 21143 wlapi_bmac_core_phypll_reset(pi->sh->physhim); 21144 21145 mod_phy_reg(pi, 0x01, (0x1 << 15), 21146 ((spuravoid > 0) ? (0x1 << 15) : 0)); 21147 21148 wlc_phy_resetcca_nphy(pi); 21149 21150 pi->phy_isspuravoid = (spuravoid > 0); 21151 } 21152 21153 if (NREV_LT(pi->pubpi.phy_rev, 7)) 21154 write_phy_reg(pi, 0x17e, 0x3830); 21155 21156 wlc_phy_spurwar_nphy(pi); 21157 } 21158 21159 void wlc_phy_chanspec_set_nphy(struct brcms_phy *pi, u16 chanspec) 21160 { 21161 int freq; 21162 const struct chan_info_nphy_radio2057 *t0 = NULL; 21163 const struct chan_info_nphy_radio205x *t1 = NULL; 21164 const struct chan_info_nphy_radio2057_rev5 *t2 = NULL; 21165 const struct chan_info_nphy_2055 *t3 = NULL; 21166 21167 if (!wlc_phy_chan2freq_nphy 21168 (pi, CHSPEC_CHANNEL(chanspec), &freq, &t0, &t1, &t2, &t3)) 21169 return; 21170 21171 wlc_phy_chanspec_radio_set((struct brcms_phy_pub *) pi, chanspec); 21172 21173 if (CHSPEC_BW(chanspec) != pi->bw) 21174 wlapi_bmac_bw_set(pi->sh->physhim, CHSPEC_BW(chanspec)); 21175 21176 if (CHSPEC_IS40(chanspec)) { 21177 if (CHSPEC_SB_UPPER(chanspec)) { 21178 or_phy_reg(pi, 0xa0, BPHY_BAND_SEL_UP20); 21179 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21180 or_phy_reg(pi, 0x310, PRIM_SEL_UP20); 21181 } else { 21182 and_phy_reg(pi, 0xa0, ~BPHY_BAND_SEL_UP20); 21183 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21184 and_phy_reg(pi, 0x310, 21185 (~PRIM_SEL_UP20 & 0xffff)); 21186 } 21187 } 21188 21189 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21190 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21191 21192 if ((pi->pubpi.radiorev <= 4) 21193 || (pi->pubpi.radiorev == 6)) { 21194 mod_radio_reg(pi, RADIO_2057_TIA_CONFIG_CORE0, 21195 0x2, 21196 (CHSPEC_IS5G(chanspec) ? (1 << 1) 21197 : 0)); 21198 mod_radio_reg(pi, RADIO_2057_TIA_CONFIG_CORE1, 21199 0x2, 21200 (CHSPEC_IS5G(chanspec) ? (1 << 1) 21201 : 0)); 21202 } 21203 21204 wlc_phy_chanspec_radio2057_setup(pi, t0, t2); 21205 wlc_phy_chanspec_nphy_setup(pi, chanspec, 21206 (pi->pubpi.radiorev == 5) ? 21207 (const struct nphy_sfo_cfg *)&(t2->PHY_BW1a) : 21208 (const struct nphy_sfo_cfg *)&(t0->PHY_BW1a)); 21209 21210 } else { 21211 21212 mod_radio_reg(pi, 21213 RADIO_2056_SYN_COM_CTRL | RADIO_2056_SYN, 21214 0x4, 21215 (CHSPEC_IS5G(chanspec) ? (0x1 << 2) : 0)); 21216 wlc_phy_chanspec_radio2056_setup(pi, t1); 21217 21218 wlc_phy_chanspec_nphy_setup(pi, chanspec, 21219 (const struct nphy_sfo_cfg *) &(t1->PHY_BW1a)); 21220 } 21221 21222 } else { 21223 21224 mod_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, 0x70, 21225 (CHSPEC_IS5G(chanspec) ? (0x02 << 4) 21226 : (0x05 << 4))); 21227 21228 wlc_phy_chanspec_radio2055_setup(pi, t3); 21229 wlc_phy_chanspec_nphy_setup(pi, chanspec, 21230 (const struct nphy_sfo_cfg *) 21231 &(t3->PHY_BW1a)); 21232 } 21233 21234 } 21235 21236 void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init) 21237 { 21238 struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro); 21239 u16 mask = 0xfc00; 21240 u32 mc = 0; 21241 21242 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21243 return; 21244 21245 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21246 u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188; 21247 21248 if (!lut_init) 21249 return; 21250 21251 if (pi->srom_fem2g.antswctrllut == 0) { 21252 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21253 1, 0x02, 16, &v0); 21254 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21255 1, 0x03, 16, &v1); 21256 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21257 1, 0x08, 16, &v2); 21258 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21259 1, 0x0C, 16, &v3); 21260 } 21261 21262 if (pi->srom_fem5g.antswctrllut == 0) { 21263 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21264 1, 0x12, 16, &v0); 21265 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21266 1, 0x13, 16, &v1); 21267 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21268 1, 0x18, 16, &v2); 21269 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21270 1, 0x1C, 16, &v3); 21271 } 21272 } else { 21273 21274 write_phy_reg(pi, 0xc8, 0x0); 21275 write_phy_reg(pi, 0xc9, 0x0); 21276 21277 bcma_chipco_gpio_control(&pi->d11core->bus->drv_cc, mask, mask); 21278 21279 mc = bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 21280 mc &= ~MCTL_GPOUT_SEL_MASK; 21281 bcma_write32(pi->d11core, D11REGOFFS(maccontrol), mc); 21282 21283 bcma_set16(pi->d11core, D11REGOFFS(psm_gpio_oe), mask); 21284 21285 bcma_mask16(pi->d11core, D11REGOFFS(psm_gpio_out), 21286 0xffff & ~mask); 21287 21288 if (lut_init) { 21289 write_phy_reg(pi, 0xf8, 0x02d8); 21290 write_phy_reg(pi, 0xf9, 0x0301); 21291 write_phy_reg(pi, 0xfa, 0x02d8); 21292 write_phy_reg(pi, 0xfb, 0x0301); 21293 } 21294 } 21295 } 21296 21297 u16 wlc_phy_classifier_nphy(struct brcms_phy *pi, u16 mask, u16 val) 21298 { 21299 u16 curr_ctl, new_ctl; 21300 bool suspended = false; 21301 21302 if (D11REV_IS(pi->sh->corerev, 16)) { 21303 suspended = (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & 21304 MCTL_EN_MAC) ? false : true; 21305 if (!suspended) 21306 wlapi_suspend_mac_and_wait(pi->sh->physhim); 21307 } 21308 21309 curr_ctl = read_phy_reg(pi, 0xb0) & (0x7 << 0); 21310 21311 new_ctl = (curr_ctl & (~mask)) | (val & mask); 21312 21313 mod_phy_reg(pi, 0xb0, (0x7 << 0), new_ctl); 21314 21315 if (D11REV_IS(pi->sh->corerev, 16) && !suspended) 21316 wlapi_enable_mac(pi->sh->physhim); 21317 21318 return new_ctl; 21319 } 21320 21321 void wlc_phy_force_rfseq_nphy(struct brcms_phy *pi, u8 cmd) 21322 { 21323 u16 trigger_mask, status_mask; 21324 u16 orig_RfseqCoreActv; 21325 21326 switch (cmd) { 21327 case NPHY_RFSEQ_RX2TX: 21328 trigger_mask = NPHY_RfseqTrigger_rx2tx; 21329 status_mask = NPHY_RfseqStatus_rx2tx; 21330 break; 21331 case NPHY_RFSEQ_TX2RX: 21332 trigger_mask = NPHY_RfseqTrigger_tx2rx; 21333 status_mask = NPHY_RfseqStatus_tx2rx; 21334 break; 21335 case NPHY_RFSEQ_RESET2RX: 21336 trigger_mask = NPHY_RfseqTrigger_reset2rx; 21337 status_mask = NPHY_RfseqStatus_reset2rx; 21338 break; 21339 case NPHY_RFSEQ_UPDATEGAINH: 21340 trigger_mask = NPHY_RfseqTrigger_updategainh; 21341 status_mask = NPHY_RfseqStatus_updategainh; 21342 break; 21343 case NPHY_RFSEQ_UPDATEGAINL: 21344 trigger_mask = NPHY_RfseqTrigger_updategainl; 21345 status_mask = NPHY_RfseqStatus_updategainl; 21346 break; 21347 case NPHY_RFSEQ_UPDATEGAINU: 21348 trigger_mask = NPHY_RfseqTrigger_updategainu; 21349 status_mask = NPHY_RfseqStatus_updategainu; 21350 break; 21351 default: 21352 return; 21353 } 21354 21355 orig_RfseqCoreActv = read_phy_reg(pi, 0xa1); 21356 or_phy_reg(pi, 0xa1, 21357 (NPHY_RfseqMode_CoreActv_override | 21358 NPHY_RfseqMode_Trigger_override)); 21359 or_phy_reg(pi, 0xa3, trigger_mask); 21360 SPINWAIT((read_phy_reg(pi, 0xa4) & status_mask), 200000); 21361 write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); 21362 WARN(read_phy_reg(pi, 0xa4) & status_mask, "HW error in rf"); 21363 } 21364 21365 static void 21366 wlc_phy_rfctrl_override_1tomany_nphy(struct brcms_phy *pi, u16 cmd, u16 value, 21367 u8 core_mask, u8 off) 21368 { 21369 u16 rfmxgain = 0, lpfgain = 0; 21370 u16 tgain = 0; 21371 21372 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21373 21374 switch (cmd) { 21375 case NPHY_REV7_RfctrlOverride_cmd_rxrf_pu: 21376 wlc_phy_rfctrl_override_nphy_rev7( 21377 pi, (0x1 << 5), 21378 value, core_mask, off, 21379 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21380 wlc_phy_rfctrl_override_nphy_rev7( 21381 pi, (0x1 << 4), value, 21382 core_mask, off, 21383 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21384 wlc_phy_rfctrl_override_nphy_rev7( 21385 pi, (0x1 << 3), value, 21386 core_mask, off, 21387 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21388 break; 21389 case NPHY_REV7_RfctrlOverride_cmd_rx_pu: 21390 wlc_phy_rfctrl_override_nphy_rev7( 21391 pi, (0x1 << 2), 21392 value, core_mask, off, 21393 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21394 wlc_phy_rfctrl_override_nphy_rev7( 21395 pi, (0x1 << 1), value, 21396 core_mask, off, 21397 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21398 wlc_phy_rfctrl_override_nphy_rev7( 21399 pi, (0x1 << 0), value, 21400 core_mask, off, 21401 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21402 wlc_phy_rfctrl_override_nphy_rev7( 21403 pi, (0x1 << 1), value, 21404 core_mask, off, 21405 NPHY_REV7_RFCTRLOVERRIDE_ID2); 21406 wlc_phy_rfctrl_override_nphy_rev7( 21407 pi, (0x1 << 11), 0, 21408 core_mask, off, 21409 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21410 break; 21411 case NPHY_REV7_RfctrlOverride_cmd_tx_pu: 21412 wlc_phy_rfctrl_override_nphy_rev7( 21413 pi, (0x1 << 2), 21414 value, core_mask, off, 21415 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21416 wlc_phy_rfctrl_override_nphy_rev7( 21417 pi, (0x1 << 1), value, 21418 core_mask, off, 21419 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21420 wlc_phy_rfctrl_override_nphy_rev7( 21421 pi, (0x1 << 0), value, 21422 core_mask, off, 21423 NPHY_REV7_RFCTRLOVERRIDE_ID2); 21424 wlc_phy_rfctrl_override_nphy_rev7( 21425 pi, (0x1 << 2), value, 21426 core_mask, off, 21427 NPHY_REV7_RFCTRLOVERRIDE_ID2); 21428 wlc_phy_rfctrl_override_nphy_rev7( 21429 pi, (0x1 << 11), 1, 21430 core_mask, off, 21431 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21432 break; 21433 case NPHY_REV7_RfctrlOverride_cmd_rxgain: 21434 rfmxgain = value & 0x000ff; 21435 lpfgain = value & 0x0ff00; 21436 lpfgain = lpfgain >> 8; 21437 21438 wlc_phy_rfctrl_override_nphy_rev7( 21439 pi, (0x1 << 11), 21440 rfmxgain, core_mask, 21441 off, 21442 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21443 wlc_phy_rfctrl_override_nphy_rev7( 21444 pi, (0x3 << 13), 21445 lpfgain, core_mask, 21446 off, 21447 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21448 break; 21449 case NPHY_REV7_RfctrlOverride_cmd_txgain: 21450 tgain = value & 0x7fff; 21451 lpfgain = value & 0x8000; 21452 lpfgain = lpfgain >> 14; 21453 21454 wlc_phy_rfctrl_override_nphy_rev7( 21455 pi, (0x1 << 12), 21456 tgain, core_mask, off, 21457 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21458 wlc_phy_rfctrl_override_nphy_rev7( 21459 pi, (0x1 << 13), 21460 lpfgain, core_mask, 21461 off, 21462 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21463 break; 21464 } 21465 } 21466 } 21467 21468 static void 21469 wlc_phy_scale_offset_rssi_nphy(struct brcms_phy *pi, u16 scale, s8 offset, 21470 u8 coresel, u8 rail, u8 rssi_type) 21471 { 21472 u16 valuetostuff; 21473 21474 offset = (offset > NPHY_RSSICAL_MAXREAD) ? 21475 NPHY_RSSICAL_MAXREAD : offset; 21476 offset = (offset < (-NPHY_RSSICAL_MAXREAD - 1)) ? 21477 -NPHY_RSSICAL_MAXREAD - 1 : offset; 21478 21479 valuetostuff = ((scale & 0x3f) << 8) | (offset & 0x3f); 21480 21481 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21482 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21483 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_NB)) 21484 write_phy_reg(pi, 0x1a6, valuetostuff); 21485 21486 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21487 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21488 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_NB)) 21489 write_phy_reg(pi, 0x1ac, valuetostuff); 21490 21491 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21492 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21493 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_NB)) 21494 write_phy_reg(pi, 0x1b2, valuetostuff); 21495 21496 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21497 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21498 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_NB)) 21499 write_phy_reg(pi, 0x1b8, valuetostuff); 21500 21501 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21502 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21503 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W1)) 21504 write_phy_reg(pi, 0x1a4, valuetostuff); 21505 21506 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21507 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21508 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W1)) 21509 write_phy_reg(pi, 0x1aa, valuetostuff); 21510 21511 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21512 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21513 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W1)) 21514 write_phy_reg(pi, 0x1b0, valuetostuff); 21515 21516 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21517 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21518 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W1)) 21519 write_phy_reg(pi, 0x1b6, valuetostuff); 21520 21521 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21522 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21523 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W2)) 21524 write_phy_reg(pi, 0x1a5, valuetostuff); 21525 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21526 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21527 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W2)) 21528 write_phy_reg(pi, 0x1ab, valuetostuff); 21529 21530 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21531 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21532 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W2)) 21533 write_phy_reg(pi, 0x1b1, valuetostuff); 21534 21535 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21536 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21537 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W2)) 21538 write_phy_reg(pi, 0x1b7, valuetostuff); 21539 21540 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21541 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21542 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21543 write_phy_reg(pi, 0x1a7, valuetostuff); 21544 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21545 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21546 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21547 write_phy_reg(pi, 0x1ad, valuetostuff); 21548 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21549 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21550 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21551 write_phy_reg(pi, 0x1b3, valuetostuff); 21552 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21553 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21554 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21555 write_phy_reg(pi, 0x1b9, valuetostuff); 21556 21557 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21558 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21559 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21560 write_phy_reg(pi, 0x1a8, valuetostuff); 21561 21562 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21563 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21564 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21565 write_phy_reg(pi, 0x1ae, valuetostuff); 21566 21567 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21568 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21569 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21570 write_phy_reg(pi, 0x1b4, valuetostuff); 21571 21572 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21573 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21574 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21575 write_phy_reg(pi, 0x1ba, valuetostuff); 21576 21577 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21578 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21579 (rssi_type == NPHY_RSSI_SEL_TSSI_2G)) 21580 write_phy_reg(pi, 0x1a9, valuetostuff); 21581 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21582 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21583 (rssi_type == NPHY_RSSI_SEL_TSSI_2G)) 21584 write_phy_reg(pi, 0x1b5, valuetostuff); 21585 21586 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21587 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21588 (rssi_type == NPHY_RSSI_SEL_TSSI_5G)) 21589 write_phy_reg(pi, 0x1af, valuetostuff); 21590 21591 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21592 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21593 (rssi_type == NPHY_RSSI_SEL_TSSI_5G)) 21594 write_phy_reg(pi, 0x1bb, valuetostuff); 21595 } 21596 21597 static void brcms_phy_wr_tx_mux(struct brcms_phy *pi, u8 core) 21598 { 21599 if (PHY_IPA(pi)) { 21600 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21601 write_radio_reg(pi, 21602 ((core == PHY_CORE_0) ? 21603 RADIO_2057_TX0_TX_SSI_MUX : 21604 RADIO_2057_TX1_TX_SSI_MUX), 21605 (CHSPEC_IS5G(pi->radio_chanspec) ? 21606 0xc : 0xe)); 21607 else 21608 write_radio_reg(pi, 21609 RADIO_2056_TX_TX_SSI_MUX | 21610 ((core == PHY_CORE_0) ? 21611 RADIO_2056_TX0 : RADIO_2056_TX1), 21612 (CHSPEC_IS5G(pi->radio_chanspec) ? 21613 0xc : 0xe)); 21614 } else { 21615 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21616 write_radio_reg(pi, 21617 ((core == PHY_CORE_0) ? 21618 RADIO_2057_TX0_TX_SSI_MUX : 21619 RADIO_2057_TX1_TX_SSI_MUX), 21620 0x11); 21621 21622 if (pi->pubpi.radioid == BCM2057_ID) 21623 write_radio_reg(pi, 21624 RADIO_2057_IQTEST_SEL_PU, 0x1); 21625 21626 } else { 21627 write_radio_reg(pi, 21628 RADIO_2056_TX_TX_SSI_MUX | 21629 ((core == PHY_CORE_0) ? 21630 RADIO_2056_TX0 : RADIO_2056_TX1), 21631 0x11); 21632 } 21633 } 21634 } 21635 21636 void wlc_phy_rssisel_nphy(struct brcms_phy *pi, u8 core_code, u8 rssi_type) 21637 { 21638 u16 mask, val; 21639 u16 afectrlovr_rssi_val, rfctrlcmd_rxen_val, rfctrlcmd_coresel_val, 21640 startseq; 21641 u16 rfctrlovr_rssi_val, rfctrlovr_rxen_val, rfctrlovr_coresel_val, 21642 rfctrlovr_trigger_val; 21643 u16 afectrlovr_rssi_mask, rfctrlcmd_mask, rfctrlovr_mask; 21644 u16 rfctrlcmd_val, rfctrlovr_val; 21645 u8 core; 21646 21647 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21648 if (core_code == RADIO_MIMO_CORESEL_OFF) { 21649 mod_phy_reg(pi, 0x8f, (0x1 << 9), 0); 21650 mod_phy_reg(pi, 0xa5, (0x1 << 9), 0); 21651 21652 mod_phy_reg(pi, 0xa6, (0x3 << 8), 0); 21653 mod_phy_reg(pi, 0xa7, (0x3 << 8), 0); 21654 21655 mod_phy_reg(pi, 0xe5, (0x1 << 5), 0); 21656 mod_phy_reg(pi, 0xe6, (0x1 << 5), 0); 21657 21658 mask = (0x1 << 2) | 21659 (0x1 << 3) | (0x1 << 4) | (0x1 << 5); 21660 mod_phy_reg(pi, 0xf9, mask, 0); 21661 mod_phy_reg(pi, 0xfb, mask, 0); 21662 21663 } else { 21664 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 21665 if (core_code == RADIO_MIMO_CORESEL_CORE1 21666 && core == PHY_CORE_1) 21667 continue; 21668 else if (core_code == RADIO_MIMO_CORESEL_CORE2 21669 && core == PHY_CORE_0) 21670 continue; 21671 21672 mod_phy_reg(pi, (core == PHY_CORE_0) ? 21673 0x8f : 0xa5, (0x1 << 9), 1 << 9); 21674 21675 if (rssi_type == NPHY_RSSI_SEL_W1 || 21676 rssi_type == NPHY_RSSI_SEL_W2 || 21677 rssi_type == NPHY_RSSI_SEL_NB) { 21678 mod_phy_reg(pi, 21679 (core == 21680 PHY_CORE_0) ? 0xa6 : 0xa7, 21681 (0x3 << 8), 0); 21682 21683 mask = (0x1 << 2) | 21684 (0x1 << 3) | 21685 (0x1 << 4) | (0x1 << 5); 21686 mod_phy_reg(pi, 21687 (core == 21688 PHY_CORE_0) ? 0xf9 : 0xfb, 21689 mask, 0); 21690 21691 if (rssi_type == NPHY_RSSI_SEL_W1) { 21692 if (CHSPEC_IS5G( 21693 pi->radio_chanspec)) { 21694 mask = (0x1 << 2); 21695 val = 1 << 2; 21696 } else { 21697 mask = (0x1 << 3); 21698 val = 1 << 3; 21699 } 21700 } else if (rssi_type == 21701 NPHY_RSSI_SEL_W2) { 21702 mask = (0x1 << 4); 21703 val = 1 << 4; 21704 } else { 21705 mask = (0x1 << 5); 21706 val = 1 << 5; 21707 } 21708 mod_phy_reg(pi, 21709 (core == 21710 PHY_CORE_0) ? 0xf9 : 0xfb, 21711 mask, val); 21712 21713 mask = (0x1 << 5); 21714 val = 1 << 5; 21715 mod_phy_reg(pi, (core == PHY_CORE_0) ? 21716 0xe5 : 0xe6, mask, val); 21717 } else { 21718 if (rssi_type == NPHY_RSSI_SEL_TBD) { 21719 mask = (0x3 << 8); 21720 val = 1 << 8; 21721 mod_phy_reg(pi, 21722 (core == 21723 PHY_CORE_0) ? 0xa6 21724 : 0xa7, mask, val); 21725 mask = (0x3 << 10); 21726 val = 1 << 10; 21727 mod_phy_reg(pi, 21728 (core == 21729 PHY_CORE_0) ? 0xa6 21730 : 0xa7, mask, val); 21731 } else if (rssi_type == 21732 NPHY_RSSI_SEL_IQ) { 21733 mask = (0x3 << 8); 21734 val = 2 << 8; 21735 mod_phy_reg(pi, 21736 (core == 21737 PHY_CORE_0) ? 0xa6 21738 : 0xa7, mask, val); 21739 mask = (0x3 << 10); 21740 val = 2 << 10; 21741 mod_phy_reg(pi, 21742 (core == 21743 PHY_CORE_0) ? 0xa6 21744 : 0xa7, mask, val); 21745 } else { 21746 mask = (0x3 << 8); 21747 val = 3 << 8; 21748 mod_phy_reg(pi, 21749 (core == 21750 PHY_CORE_0) ? 0xa6 21751 : 0xa7, mask, val); 21752 mask = (0x3 << 10); 21753 val = 3 << 10; 21754 mod_phy_reg(pi, 21755 (core == 21756 PHY_CORE_0) ? 0xa6 21757 : 0xa7, mask, val); 21758 brcms_phy_wr_tx_mux(pi, core); 21759 afectrlovr_rssi_val = 1 << 9; 21760 mod_phy_reg(pi, 21761 (core == 21762 PHY_CORE_0) ? 0x8f 21763 : 0xa5, (0x1 << 9), 21764 afectrlovr_rssi_val); 21765 } 21766 } 21767 } 21768 } 21769 } else { 21770 21771 if ((rssi_type == NPHY_RSSI_SEL_W1) || 21772 (rssi_type == NPHY_RSSI_SEL_W2) || 21773 (rssi_type == NPHY_RSSI_SEL_NB)) 21774 val = 0x0; 21775 else if (rssi_type == NPHY_RSSI_SEL_TBD) 21776 val = 0x1; 21777 else if (rssi_type == NPHY_RSSI_SEL_IQ) 21778 val = 0x2; 21779 else 21780 val = 0x3; 21781 21782 mask = ((0x3 << 12) | (0x3 << 14)); 21783 val = (val << 12) | (val << 14); 21784 mod_phy_reg(pi, 0xa6, mask, val); 21785 mod_phy_reg(pi, 0xa7, mask, val); 21786 21787 if ((rssi_type == NPHY_RSSI_SEL_W1) || 21788 (rssi_type == NPHY_RSSI_SEL_W2) || 21789 (rssi_type == NPHY_RSSI_SEL_NB)) { 21790 if (rssi_type == NPHY_RSSI_SEL_W1) 21791 val = 0x1; 21792 if (rssi_type == NPHY_RSSI_SEL_W2) 21793 val = 0x2; 21794 if (rssi_type == NPHY_RSSI_SEL_NB) 21795 val = 0x3; 21796 21797 mask = (0x3 << 4); 21798 val = (val << 4); 21799 mod_phy_reg(pi, 0x7a, mask, val); 21800 mod_phy_reg(pi, 0x7d, mask, val); 21801 } 21802 21803 if (core_code == RADIO_MIMO_CORESEL_OFF) { 21804 afectrlovr_rssi_val = 0; 21805 rfctrlcmd_rxen_val = 0; 21806 rfctrlcmd_coresel_val = 0; 21807 rfctrlovr_rssi_val = 0; 21808 rfctrlovr_rxen_val = 0; 21809 rfctrlovr_coresel_val = 0; 21810 rfctrlovr_trigger_val = 0; 21811 startseq = 0; 21812 } else { 21813 afectrlovr_rssi_val = 1; 21814 rfctrlcmd_rxen_val = 1; 21815 rfctrlcmd_coresel_val = core_code; 21816 rfctrlovr_rssi_val = 1; 21817 rfctrlovr_rxen_val = 1; 21818 rfctrlovr_coresel_val = 1; 21819 rfctrlovr_trigger_val = 1; 21820 startseq = 1; 21821 } 21822 21823 afectrlovr_rssi_mask = ((0x1 << 12) | (0x1 << 13)); 21824 afectrlovr_rssi_val = (afectrlovr_rssi_val << 21825 12) | (afectrlovr_rssi_val << 13); 21826 mod_phy_reg(pi, 0xa5, afectrlovr_rssi_mask, 21827 afectrlovr_rssi_val); 21828 21829 if ((rssi_type == NPHY_RSSI_SEL_W1) || 21830 (rssi_type == NPHY_RSSI_SEL_W2) || 21831 (rssi_type == NPHY_RSSI_SEL_NB)) { 21832 rfctrlcmd_mask = ((0x1 << 8) | (0x7 << 3)); 21833 rfctrlcmd_val = (rfctrlcmd_rxen_val << 8) | 21834 (rfctrlcmd_coresel_val << 3); 21835 21836 rfctrlovr_mask = ((0x1 << 5) | 21837 (0x1 << 12) | 21838 (0x1 << 1) | (0x1 << 0)); 21839 rfctrlovr_val = (rfctrlovr_rssi_val << 21840 5) | 21841 (rfctrlovr_rxen_val << 12) | 21842 (rfctrlovr_coresel_val << 1) | 21843 (rfctrlovr_trigger_val << 0); 21844 21845 mod_phy_reg(pi, 0x78, rfctrlcmd_mask, rfctrlcmd_val); 21846 mod_phy_reg(pi, 0xec, rfctrlovr_mask, rfctrlovr_val); 21847 21848 mod_phy_reg(pi, 0x78, (0x1 << 0), (startseq << 0)); 21849 udelay(20); 21850 21851 mod_phy_reg(pi, 0xec, (0x1 << 0), 0); 21852 } 21853 } 21854 } 21855 21856 int 21857 wlc_phy_poll_rssi_nphy(struct brcms_phy *pi, u8 rssi_type, s32 *rssi_buf, 21858 u8 nsamps) 21859 { 21860 s16 rssi0, rssi1; 21861 u16 afectrlCore1_save = 0; 21862 u16 afectrlCore2_save = 0; 21863 u16 afectrlOverride1_save = 0; 21864 u16 afectrlOverride2_save = 0; 21865 u16 rfctrlOverrideAux0_save = 0; 21866 u16 rfctrlOverrideAux1_save = 0; 21867 u16 rfctrlMiscReg1_save = 0; 21868 u16 rfctrlMiscReg2_save = 0; 21869 u16 rfctrlcmd_save = 0; 21870 u16 rfctrloverride_save = 0; 21871 u16 rfctrlrssiothers1_save = 0; 21872 u16 rfctrlrssiothers2_save = 0; 21873 s8 tmp_buf[4]; 21874 u8 ctr = 0, samp = 0; 21875 s32 rssi_out_val; 21876 u16 gpiosel_orig; 21877 21878 afectrlCore1_save = read_phy_reg(pi, 0xa6); 21879 afectrlCore2_save = read_phy_reg(pi, 0xa7); 21880 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21881 rfctrlMiscReg1_save = read_phy_reg(pi, 0xf9); 21882 rfctrlMiscReg2_save = read_phy_reg(pi, 0xfb); 21883 afectrlOverride1_save = read_phy_reg(pi, 0x8f); 21884 afectrlOverride2_save = read_phy_reg(pi, 0xa5); 21885 rfctrlOverrideAux0_save = read_phy_reg(pi, 0xe5); 21886 rfctrlOverrideAux1_save = read_phy_reg(pi, 0xe6); 21887 } else { 21888 afectrlOverride1_save = read_phy_reg(pi, 0xa5); 21889 rfctrlcmd_save = read_phy_reg(pi, 0x78); 21890 rfctrloverride_save = read_phy_reg(pi, 0xec); 21891 rfctrlrssiothers1_save = read_phy_reg(pi, 0x7a); 21892 rfctrlrssiothers2_save = read_phy_reg(pi, 0x7d); 21893 } 21894 21895 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_ALLRX, rssi_type); 21896 21897 gpiosel_orig = read_phy_reg(pi, 0xca); 21898 if (NREV_LT(pi->pubpi.phy_rev, 2)) 21899 write_phy_reg(pi, 0xca, 5); 21900 21901 for (ctr = 0; ctr < 4; ctr++) 21902 rssi_buf[ctr] = 0; 21903 21904 for (samp = 0; samp < nsamps; samp++) { 21905 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 21906 rssi0 = read_phy_reg(pi, 0x1c9); 21907 rssi1 = read_phy_reg(pi, 0x1ca); 21908 } else { 21909 rssi0 = read_phy_reg(pi, 0x219); 21910 rssi1 = read_phy_reg(pi, 0x21a); 21911 } 21912 21913 ctr = 0; 21914 tmp_buf[ctr++] = ((s8) ((rssi0 & 0x3f) << 2)) >> 2; 21915 tmp_buf[ctr++] = ((s8) (((rssi0 >> 8) & 0x3f) << 2)) >> 2; 21916 tmp_buf[ctr++] = ((s8) ((rssi1 & 0x3f) << 2)) >> 2; 21917 tmp_buf[ctr++] = ((s8) (((rssi1 >> 8) & 0x3f) << 2)) >> 2; 21918 21919 for (ctr = 0; ctr < 4; ctr++) 21920 rssi_buf[ctr] += tmp_buf[ctr]; 21921 21922 } 21923 21924 rssi_out_val = rssi_buf[3] & 0xff; 21925 rssi_out_val |= (rssi_buf[2] & 0xff) << 8; 21926 rssi_out_val |= (rssi_buf[1] & 0xff) << 16; 21927 rssi_out_val |= (rssi_buf[0] & 0xff) << 24; 21928 21929 if (NREV_LT(pi->pubpi.phy_rev, 2)) 21930 write_phy_reg(pi, 0xca, gpiosel_orig); 21931 21932 write_phy_reg(pi, 0xa6, afectrlCore1_save); 21933 write_phy_reg(pi, 0xa7, afectrlCore2_save); 21934 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21935 write_phy_reg(pi, 0xf9, rfctrlMiscReg1_save); 21936 write_phy_reg(pi, 0xfb, rfctrlMiscReg2_save); 21937 write_phy_reg(pi, 0x8f, afectrlOverride1_save); 21938 write_phy_reg(pi, 0xa5, afectrlOverride2_save); 21939 write_phy_reg(pi, 0xe5, rfctrlOverrideAux0_save); 21940 write_phy_reg(pi, 0xe6, rfctrlOverrideAux1_save); 21941 } else { 21942 write_phy_reg(pi, 0xa5, afectrlOverride1_save); 21943 write_phy_reg(pi, 0x78, rfctrlcmd_save); 21944 write_phy_reg(pi, 0xec, rfctrloverride_save); 21945 write_phy_reg(pi, 0x7a, rfctrlrssiothers1_save); 21946 write_phy_reg(pi, 0x7d, rfctrlrssiothers2_save); 21947 } 21948 21949 return rssi_out_val; 21950 } 21951 21952 s16 wlc_phy_tempsense_nphy(struct brcms_phy *pi) 21953 { 21954 u16 core1_txrf_iqcal1_save, core1_txrf_iqcal2_save; 21955 u16 core2_txrf_iqcal1_save, core2_txrf_iqcal2_save; 21956 u16 pwrdet_rxtx_core1_save; 21957 u16 pwrdet_rxtx_core2_save; 21958 u16 afectrlCore1_save; 21959 u16 afectrlCore2_save; 21960 u16 afectrlOverride_save; 21961 u16 afectrlOverride2_save; 21962 u16 pd_pll_ts_save; 21963 u16 gpioSel_save; 21964 s32 radio_temp[4]; 21965 s32 radio_temp2[4]; 21966 u16 syn_tempprocsense_save; 21967 s16 offset = 0; 21968 21969 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21970 u16 auxADC_Vmid, auxADC_Av, auxADC_Vmid_save, auxADC_Av_save; 21971 u16 auxADC_rssi_ctrlL_save, auxADC_rssi_ctrlH_save; 21972 u16 auxADC_rssi_ctrlL, auxADC_rssi_ctrlH; 21973 s32 auxADC_Vl; 21974 u16 RfctrlOverride5_save, RfctrlOverride6_save; 21975 u16 RfctrlMiscReg5_save; 21976 u16 RSSIMultCoef0QPowerDet_save; 21977 u16 tempsense_Rcal; 21978 21979 syn_tempprocsense_save = 21980 read_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG); 21981 21982 afectrlCore1_save = read_phy_reg(pi, 0xa6); 21983 afectrlCore2_save = read_phy_reg(pi, 0xa7); 21984 afectrlOverride_save = read_phy_reg(pi, 0x8f); 21985 afectrlOverride2_save = read_phy_reg(pi, 0xa5); 21986 RSSIMultCoef0QPowerDet_save = read_phy_reg(pi, 0x1ae); 21987 RfctrlOverride5_save = read_phy_reg(pi, 0x346); 21988 RfctrlOverride6_save = read_phy_reg(pi, 0x347); 21989 RfctrlMiscReg5_save = read_phy_reg(pi, 0x344); 21990 read_phy_reg(pi, 0x345); /* RfctrlMiscReg6_save */ 21991 21992 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 21993 &auxADC_Vmid_save); 21994 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 21995 &auxADC_Av_save); 21996 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, 21997 &auxADC_rssi_ctrlL_save); 21998 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, 21999 &auxADC_rssi_ctrlH_save); 22000 22001 write_phy_reg(pi, 0x1ae, 0x0); 22002 22003 auxADC_rssi_ctrlL = 0x0; 22004 auxADC_rssi_ctrlH = 0x20; 22005 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, 22006 &auxADC_rssi_ctrlL); 22007 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, 22008 &auxADC_rssi_ctrlH); 22009 22010 tempsense_Rcal = syn_tempprocsense_save & 0x1c; 22011 22012 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22013 tempsense_Rcal | 0x01); 22014 22015 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 22016 1, 0, 0, 22017 NPHY_REV7_RFCTRLOVERRIDE_ID2); 22018 mod_phy_reg(pi, 0xa6, (0x1 << 7), 0); 22019 mod_phy_reg(pi, 0xa7, (0x1 << 7), 0); 22020 mod_phy_reg(pi, 0x8f, (0x1 << 7), (0x1 << 7)); 22021 mod_phy_reg(pi, 0xa5, (0x1 << 7), (0x1 << 7)); 22022 22023 mod_phy_reg(pi, 0xa6, (0x1 << 2), (0x1 << 2)); 22024 mod_phy_reg(pi, 0xa7, (0x1 << 2), (0x1 << 2)); 22025 mod_phy_reg(pi, 0x8f, (0x1 << 2), (0x1 << 2)); 22026 mod_phy_reg(pi, 0xa5, (0x1 << 2), (0x1 << 2)); 22027 udelay(5); 22028 mod_phy_reg(pi, 0xa6, (0x1 << 2), 0); 22029 mod_phy_reg(pi, 0xa7, (0x1 << 2), 0); 22030 mod_phy_reg(pi, 0xa6, (0x1 << 3), 0); 22031 mod_phy_reg(pi, 0xa7, (0x1 << 3), 0); 22032 mod_phy_reg(pi, 0x8f, (0x1 << 3), (0x1 << 3)); 22033 mod_phy_reg(pi, 0xa5, (0x1 << 3), (0x1 << 3)); 22034 mod_phy_reg(pi, 0xa6, (0x1 << 6), 0); 22035 mod_phy_reg(pi, 0xa7, (0x1 << 6), 0); 22036 mod_phy_reg(pi, 0x8f, (0x1 << 6), (0x1 << 6)); 22037 mod_phy_reg(pi, 0xa5, (0x1 << 6), (0x1 << 6)); 22038 22039 auxADC_Vmid = 0xA3; 22040 auxADC_Av = 0x0; 22041 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22042 &auxADC_Vmid); 22043 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22044 &auxADC_Av); 22045 22046 udelay(3); 22047 22048 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22049 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22050 tempsense_Rcal | 0x03); 22051 22052 udelay(5); 22053 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22054 22055 auxADC_Av = 0x7; 22056 if (radio_temp[1] + radio_temp2[1] < -30) { 22057 auxADC_Vmid = 0x45; 22058 auxADC_Vl = 263; 22059 } else if (radio_temp[1] + radio_temp2[1] < -9) { 22060 auxADC_Vmid = 0x200; 22061 auxADC_Vl = 467; 22062 } else if (radio_temp[1] + radio_temp2[1] < 11) { 22063 auxADC_Vmid = 0x266; 22064 auxADC_Vl = 634; 22065 } else { 22066 auxADC_Vmid = 0x2D5; 22067 auxADC_Vl = 816; 22068 } 22069 22070 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22071 &auxADC_Vmid); 22072 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22073 &auxADC_Av); 22074 22075 udelay(3); 22076 22077 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22078 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22079 tempsense_Rcal | 0x01); 22080 22081 udelay(5); 22082 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22083 22084 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22085 syn_tempprocsense_save); 22086 22087 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22088 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22089 write_phy_reg(pi, 0x8f, afectrlOverride_save); 22090 write_phy_reg(pi, 0xa5, afectrlOverride2_save); 22091 write_phy_reg(pi, 0x1ae, RSSIMultCoef0QPowerDet_save); 22092 write_phy_reg(pi, 0x346, RfctrlOverride5_save); 22093 write_phy_reg(pi, 0x347, RfctrlOverride6_save); 22094 write_phy_reg(pi, 0x344, RfctrlMiscReg5_save); 22095 write_phy_reg(pi, 0x345, RfctrlMiscReg5_save); 22096 22097 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22098 &auxADC_Vmid_save); 22099 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22100 &auxADC_Av_save); 22101 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, 22102 &auxADC_rssi_ctrlL_save); 22103 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, 22104 &auxADC_rssi_ctrlH_save); 22105 22106 if (pi->sh->chip == BCMA_CHIP_ID_BCM5357) { 22107 radio_temp[0] = (193 * (radio_temp[1] + radio_temp2[1]) 22108 + 88 * (auxADC_Vl) - 27111 + 22109 128) / 256; 22110 } else { 22111 radio_temp[0] = (179 * (radio_temp[1] + radio_temp2[1]) 22112 + 82 * (auxADC_Vl) - 28861 + 22113 128) / 256; 22114 } 22115 22116 offset = (s16) pi->phy_tempsense_offset; 22117 22118 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 22119 syn_tempprocsense_save = 22120 read_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE); 22121 22122 afectrlCore1_save = read_phy_reg(pi, 0xa6); 22123 afectrlCore2_save = read_phy_reg(pi, 0xa7); 22124 afectrlOverride_save = read_phy_reg(pi, 0x8f); 22125 afectrlOverride2_save = read_phy_reg(pi, 0xa5); 22126 gpioSel_save = read_phy_reg(pi, 0xca); 22127 22128 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); 22129 22130 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22131 if (NREV_LT(pi->pubpi.phy_rev, 7)) 22132 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x05); 22133 22134 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22135 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22136 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 0x01); 22137 else 22138 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); 22139 22140 radio_temp[0] = 22141 (126 * (radio_temp[1] + radio_temp2[1]) + 3987) / 64; 22142 22143 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 22144 syn_tempprocsense_save); 22145 22146 write_phy_reg(pi, 0xca, gpioSel_save); 22147 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22148 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22149 write_phy_reg(pi, 0x8f, afectrlOverride_save); 22150 write_phy_reg(pi, 0xa5, afectrlOverride2_save); 22151 22152 offset = (s16) pi->phy_tempsense_offset; 22153 } else { 22154 22155 pwrdet_rxtx_core1_save = 22156 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1); 22157 pwrdet_rxtx_core2_save = 22158 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2); 22159 core1_txrf_iqcal1_save = 22160 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1); 22161 core1_txrf_iqcal2_save = 22162 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2); 22163 core2_txrf_iqcal1_save = 22164 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1); 22165 core2_txrf_iqcal2_save = 22166 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2); 22167 pd_pll_ts_save = read_radio_reg(pi, RADIO_2055_PD_PLL_TS); 22168 22169 afectrlCore1_save = read_phy_reg(pi, 0xa6); 22170 afectrlCore2_save = read_phy_reg(pi, 0xa7); 22171 afectrlOverride_save = read_phy_reg(pi, 0xa5); 22172 gpioSel_save = read_phy_reg(pi, 0xca); 22173 22174 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 0x01); 22175 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 0x01); 22176 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 0x08); 22177 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 0x08); 22178 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x04); 22179 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x04); 22180 write_radio_reg(pi, RADIO_2055_PD_PLL_TS, 0x00); 22181 22182 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22183 xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); 22184 22185 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22186 xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); 22187 22188 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22189 xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); 22190 22191 radio_temp[0] = (radio_temp[0] + radio_temp2[0]); 22192 radio_temp[1] = (radio_temp[1] + radio_temp2[1]); 22193 radio_temp[2] = (radio_temp[2] + radio_temp2[2]); 22194 radio_temp[3] = (radio_temp[3] + radio_temp2[3]); 22195 22196 radio_temp[0] = 22197 (radio_temp[0] + radio_temp[1] + radio_temp[2] + 22198 radio_temp[3]); 22199 22200 radio_temp[0] = 22201 (radio_temp[0] + 22202 (8 * 32)) * (950 - 350) / 63 + (350 * 8); 22203 22204 radio_temp[0] = (radio_temp[0] - (8 * 420)) / 38; 22205 22206 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 22207 pwrdet_rxtx_core1_save); 22208 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 22209 pwrdet_rxtx_core2_save); 22210 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 22211 core1_txrf_iqcal1_save); 22212 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 22213 core2_txrf_iqcal1_save); 22214 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 22215 core1_txrf_iqcal2_save); 22216 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 22217 core2_txrf_iqcal2_save); 22218 write_radio_reg(pi, RADIO_2055_PD_PLL_TS, pd_pll_ts_save); 22219 22220 write_phy_reg(pi, 0xca, gpioSel_save); 22221 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22222 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22223 write_phy_reg(pi, 0xa5, afectrlOverride_save); 22224 } 22225 22226 return (s16) radio_temp[0] + offset; 22227 } 22228 22229 static void 22230 wlc_phy_set_rssi_2055_vcm(struct brcms_phy *pi, u8 rssi_type, u8 *vcm_buf) 22231 { 22232 u8 core; 22233 22234 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 22235 if (rssi_type == NPHY_RSSI_SEL_NB) { 22236 if (core == PHY_CORE_0) { 22237 mod_radio_reg(pi, 22238 RADIO_2055_CORE1_B0_NBRSSI_VCM, 22239 RADIO_2055_NBRSSI_VCM_I_MASK, 22240 vcm_buf[2 * 22241 core] << 22242 RADIO_2055_NBRSSI_VCM_I_SHIFT); 22243 mod_radio_reg(pi, 22244 RADIO_2055_CORE1_RXBB_RSSI_CTRL5, 22245 RADIO_2055_NBRSSI_VCM_Q_MASK, 22246 vcm_buf[2 * core + 22247 1] << 22248 RADIO_2055_NBRSSI_VCM_Q_SHIFT); 22249 } else { 22250 mod_radio_reg(pi, 22251 RADIO_2055_CORE2_B0_NBRSSI_VCM, 22252 RADIO_2055_NBRSSI_VCM_I_MASK, 22253 vcm_buf[2 * 22254 core] << 22255 RADIO_2055_NBRSSI_VCM_I_SHIFT); 22256 mod_radio_reg(pi, 22257 RADIO_2055_CORE2_RXBB_RSSI_CTRL5, 22258 RADIO_2055_NBRSSI_VCM_Q_MASK, 22259 vcm_buf[2 * core + 22260 1] << 22261 RADIO_2055_NBRSSI_VCM_Q_SHIFT); 22262 } 22263 } else { 22264 if (core == PHY_CORE_0) 22265 mod_radio_reg(pi, 22266 RADIO_2055_CORE1_RXBB_RSSI_CTRL5, 22267 RADIO_2055_WBRSSI_VCM_IQ_MASK, 22268 vcm_buf[2 * 22269 core] << 22270 RADIO_2055_WBRSSI_VCM_IQ_SHIFT); 22271 else 22272 mod_radio_reg(pi, 22273 RADIO_2055_CORE2_RXBB_RSSI_CTRL5, 22274 RADIO_2055_WBRSSI_VCM_IQ_MASK, 22275 vcm_buf[2 * 22276 core] << 22277 RADIO_2055_WBRSSI_VCM_IQ_SHIFT); 22278 } 22279 } 22280 } 22281 22282 static void wlc_phy_rssi_cal_nphy_rev3(struct brcms_phy *pi) 22283 { 22284 u16 classif_state; 22285 u16 clip_state[2]; 22286 u16 clip_off[] = { 0xffff, 0xffff }; 22287 s32 target_code; 22288 u8 vcm, min_vcm; 22289 u8 vcm_final = 0; 22290 u8 result_idx; 22291 s32 poll_results[8][4] = { 22292 {0, 0, 0, 0}, 22293 {0, 0, 0, 0}, 22294 {0, 0, 0, 0}, 22295 {0, 0, 0, 0}, 22296 {0, 0, 0, 0}, 22297 {0, 0, 0, 0}, 22298 {0, 0, 0, 0}, 22299 {0, 0, 0, 0} 22300 }; 22301 s32 poll_result_core[4] = { 0, 0, 0, 0 }; 22302 s32 min_d = NPHY_RSSICAL_MAXD, curr_d; 22303 s32 fine_digital_offset[4]; 22304 s32 poll_results_min[4] = { 0, 0, 0, 0 }; 22305 s32 min_poll; 22306 u8 vcm_level_max; 22307 u8 core; 22308 u8 wb_cnt; 22309 u8 rssi_type; 22310 u16 NPHY_Rfctrlintc1_save, NPHY_Rfctrlintc2_save; 22311 u16 NPHY_AfectrlOverride1_save, NPHY_AfectrlOverride2_save; 22312 u16 NPHY_AfectrlCore1_save, NPHY_AfectrlCore2_save; 22313 u16 NPHY_RfctrlOverride0_save, NPHY_RfctrlOverride1_save; 22314 u16 NPHY_RfctrlOverrideAux0_save, NPHY_RfctrlOverrideAux1_save; 22315 u16 NPHY_RfctrlCmd_save; 22316 u16 NPHY_RfctrlMiscReg1_save, NPHY_RfctrlMiscReg2_save; 22317 u16 NPHY_RfctrlRSSIOTHERS1_save, NPHY_RfctrlRSSIOTHERS2_save; 22318 u8 rxcore_state; 22319 u16 NPHY_REV7_RfctrlOverride3_save, NPHY_REV7_RfctrlOverride4_save; 22320 u16 NPHY_REV7_RfctrlOverride5_save, NPHY_REV7_RfctrlOverride6_save; 22321 u16 NPHY_REV7_RfctrlMiscReg3_save, NPHY_REV7_RfctrlMiscReg4_save; 22322 u16 NPHY_REV7_RfctrlMiscReg5_save, NPHY_REV7_RfctrlMiscReg6_save; 22323 22324 NPHY_REV7_RfctrlOverride3_save = 22325 NPHY_REV7_RfctrlOverride4_save = 22326 NPHY_REV7_RfctrlOverride5_save = 22327 NPHY_REV7_RfctrlOverride6_save = 22328 NPHY_REV7_RfctrlMiscReg3_save = 22329 NPHY_REV7_RfctrlMiscReg4_save = 22330 NPHY_REV7_RfctrlMiscReg5_save = 22331 NPHY_REV7_RfctrlMiscReg6_save = 0; 22332 22333 classif_state = wlc_phy_classifier_nphy(pi, 0, 0); 22334 wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); 22335 wlc_phy_clip_det_nphy(pi, 0, clip_state); 22336 wlc_phy_clip_det_nphy(pi, 1, clip_off); 22337 22338 NPHY_Rfctrlintc1_save = read_phy_reg(pi, 0x91); 22339 NPHY_Rfctrlintc2_save = read_phy_reg(pi, 0x92); 22340 NPHY_AfectrlOverride1_save = read_phy_reg(pi, 0x8f); 22341 NPHY_AfectrlOverride2_save = read_phy_reg(pi, 0xa5); 22342 NPHY_AfectrlCore1_save = read_phy_reg(pi, 0xa6); 22343 NPHY_AfectrlCore2_save = read_phy_reg(pi, 0xa7); 22344 NPHY_RfctrlOverride0_save = read_phy_reg(pi, 0xe7); 22345 NPHY_RfctrlOverride1_save = read_phy_reg(pi, 0xec); 22346 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22347 NPHY_REV7_RfctrlOverride3_save = read_phy_reg(pi, 0x342); 22348 NPHY_REV7_RfctrlOverride4_save = read_phy_reg(pi, 0x343); 22349 NPHY_REV7_RfctrlOverride5_save = read_phy_reg(pi, 0x346); 22350 NPHY_REV7_RfctrlOverride6_save = read_phy_reg(pi, 0x347); 22351 } 22352 NPHY_RfctrlOverrideAux0_save = read_phy_reg(pi, 0xe5); 22353 NPHY_RfctrlOverrideAux1_save = read_phy_reg(pi, 0xe6); 22354 NPHY_RfctrlCmd_save = read_phy_reg(pi, 0x78); 22355 NPHY_RfctrlMiscReg1_save = read_phy_reg(pi, 0xf9); 22356 NPHY_RfctrlMiscReg2_save = read_phy_reg(pi, 0xfb); 22357 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22358 NPHY_REV7_RfctrlMiscReg3_save = read_phy_reg(pi, 0x340); 22359 NPHY_REV7_RfctrlMiscReg4_save = read_phy_reg(pi, 0x341); 22360 NPHY_REV7_RfctrlMiscReg5_save = read_phy_reg(pi, 0x344); 22361 NPHY_REV7_RfctrlMiscReg6_save = read_phy_reg(pi, 0x345); 22362 } 22363 NPHY_RfctrlRSSIOTHERS1_save = read_phy_reg(pi, 0x7a); 22364 NPHY_RfctrlRSSIOTHERS2_save = read_phy_reg(pi, 0x7d); 22365 22366 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_OFF, 0, 22367 RADIO_MIMO_CORESEL_ALLRXTX); 22368 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_TRSW, 1, 22369 RADIO_MIMO_CORESEL_ALLRXTX); 22370 22371 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22372 wlc_phy_rfctrl_override_1tomany_nphy( 22373 pi, 22374 NPHY_REV7_RfctrlOverride_cmd_rxrf_pu, 22375 0, 0, 0); 22376 else 22377 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0, 0); 22378 22379 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22380 wlc_phy_rfctrl_override_1tomany_nphy( 22381 pi, 22382 NPHY_REV7_RfctrlOverride_cmd_rx_pu, 22383 1, 0, 0); 22384 else 22385 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 1, 0, 0); 22386 22387 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22388 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), 22389 1, 0, 0, 22390 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22391 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 6), 1, 0, 0, 22392 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22393 } else { 22394 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 7), 1, 0, 0); 22395 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 6), 1, 0, 0); 22396 } 22397 22398 if (CHSPEC_IS5G(pi->radio_chanspec)) { 22399 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22400 wlc_phy_rfctrl_override_nphy_rev7( 22401 pi, (0x1 << 5), 22402 0, 0, 0, 22403 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22404 wlc_phy_rfctrl_override_nphy_rev7( 22405 pi, (0x1 << 4), 1, 0, 22406 0, 22407 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22408 } else { 22409 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 5), 0, 0, 0); 22410 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 4), 1, 0, 0); 22411 } 22412 22413 } else { 22414 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22415 wlc_phy_rfctrl_override_nphy_rev7( 22416 pi, (0x1 << 4), 22417 0, 0, 0, 22418 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22419 wlc_phy_rfctrl_override_nphy_rev7( 22420 pi, (0x1 << 5), 1, 0, 22421 0, 22422 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22423 } else { 22424 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 4), 0, 0, 0); 22425 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 5), 1, 0, 0); 22426 } 22427 } 22428 22429 rxcore_state = wlc_phy_rxcore_getstate_nphy( 22430 (struct brcms_phy_pub *) pi); 22431 22432 vcm_level_max = 8; 22433 22434 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 22435 22436 if ((rxcore_state & (1 << core)) == 0) 22437 continue; 22438 22439 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22440 core == 22441 PHY_CORE_0 ? 22442 RADIO_MIMO_CORESEL_CORE1 : 22443 RADIO_MIMO_CORESEL_CORE2, 22444 NPHY_RAIL_I, NPHY_RSSI_SEL_NB); 22445 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22446 core == 22447 PHY_CORE_0 ? 22448 RADIO_MIMO_CORESEL_CORE1 : 22449 RADIO_MIMO_CORESEL_CORE2, 22450 NPHY_RAIL_Q, NPHY_RSSI_SEL_NB); 22451 22452 for (vcm = 0; vcm < vcm_level_max; vcm++) { 22453 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22454 mod_radio_reg(pi, (core == PHY_CORE_0) ? 22455 RADIO_2057_NB_MASTER_CORE0 : 22456 RADIO_2057_NB_MASTER_CORE1, 22457 RADIO_2057_VCM_MASK, vcm); 22458 else 22459 mod_radio_reg(pi, RADIO_2056_RX_RSSI_MISC | 22460 ((core == 22461 PHY_CORE_0) ? RADIO_2056_RX0 : 22462 RADIO_2056_RX1), 22463 RADIO_2056_VCM_MASK, 22464 vcm << RADIO_2056_RSSI_VCM_SHIFT); 22465 22466 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_NB, 22467 &poll_results[vcm][0], 22468 NPHY_RSSICAL_NPOLL); 22469 } 22470 22471 for (result_idx = 0; result_idx < 4; result_idx++) { 22472 if ((core == result_idx / 2) && 22473 (result_idx % 2 == 0)) { 22474 22475 min_d = NPHY_RSSICAL_MAXD; 22476 min_vcm = 0; 22477 min_poll = 22478 NPHY_RSSICAL_MAXREAD * 22479 NPHY_RSSICAL_NPOLL + 1; 22480 for (vcm = 0; vcm < vcm_level_max; vcm++) { 22481 curr_d = 22482 poll_results[vcm][result_idx] * 22483 poll_results[vcm][result_idx] + 22484 poll_results[vcm][result_idx + 22485 1] * 22486 poll_results[vcm][result_idx + 22487 1]; 22488 if (curr_d < min_d) { 22489 min_d = curr_d; 22490 min_vcm = vcm; 22491 } 22492 if (poll_results[vcm][result_idx] < 22493 min_poll) 22494 min_poll = 22495 poll_results[vcm] 22496 [result_idx]; 22497 } 22498 vcm_final = min_vcm; 22499 poll_results_min[result_idx] = min_poll; 22500 } 22501 } 22502 22503 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22504 mod_radio_reg(pi, (core == PHY_CORE_0) ? 22505 RADIO_2057_NB_MASTER_CORE0 : 22506 RADIO_2057_NB_MASTER_CORE1, 22507 RADIO_2057_VCM_MASK, vcm_final); 22508 else 22509 mod_radio_reg(pi, RADIO_2056_RX_RSSI_MISC | 22510 ((core == 22511 PHY_CORE_0) ? RADIO_2056_RX0 : 22512 RADIO_2056_RX1), RADIO_2056_VCM_MASK, 22513 vcm_final << RADIO_2056_RSSI_VCM_SHIFT); 22514 22515 for (result_idx = 0; result_idx < 4; result_idx++) { 22516 if (core == result_idx / 2) { 22517 fine_digital_offset[result_idx] = 22518 (NPHY_RSSICAL_NB_TARGET * 22519 NPHY_RSSICAL_NPOLL) - 22520 poll_results[vcm_final][result_idx]; 22521 if (fine_digital_offset[result_idx] < 0) { 22522 fine_digital_offset[result_idx] = 22523 abs(fine_digital_offset 22524 [result_idx]); 22525 fine_digital_offset[result_idx] += 22526 (NPHY_RSSICAL_NPOLL / 2); 22527 fine_digital_offset[result_idx] /= 22528 NPHY_RSSICAL_NPOLL; 22529 fine_digital_offset[result_idx] = 22530 -fine_digital_offset[ 22531 result_idx]; 22532 } else { 22533 fine_digital_offset[result_idx] += 22534 (NPHY_RSSICAL_NPOLL / 2); 22535 fine_digital_offset[result_idx] /= 22536 NPHY_RSSICAL_NPOLL; 22537 } 22538 22539 if (poll_results_min[result_idx] == 22540 NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL) 22541 fine_digital_offset[result_idx] = 22542 (NPHY_RSSICAL_NB_TARGET - 22543 NPHY_RSSICAL_MAXREAD - 1); 22544 22545 wlc_phy_scale_offset_rssi_nphy( 22546 pi, 0x0, 22547 (s8) 22548 fine_digital_offset 22549 [result_idx], 22550 (result_idx / 2 == 0) ? 22551 RADIO_MIMO_CORESEL_CORE1 : 22552 RADIO_MIMO_CORESEL_CORE2, 22553 (result_idx % 2 == 0) ? 22554 NPHY_RAIL_I : NPHY_RAIL_Q, 22555 NPHY_RSSI_SEL_NB); 22556 } 22557 } 22558 22559 } 22560 22561 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 22562 22563 if ((rxcore_state & (1 << core)) == 0) 22564 continue; 22565 22566 for (wb_cnt = 0; wb_cnt < 2; wb_cnt++) { 22567 if (wb_cnt == 0) { 22568 rssi_type = NPHY_RSSI_SEL_W1; 22569 target_code = NPHY_RSSICAL_W1_TARGET_REV3; 22570 } else { 22571 rssi_type = NPHY_RSSI_SEL_W2; 22572 target_code = NPHY_RSSICAL_W2_TARGET_REV3; 22573 } 22574 22575 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22576 core == 22577 PHY_CORE_0 ? 22578 RADIO_MIMO_CORESEL_CORE1 22579 : 22580 RADIO_MIMO_CORESEL_CORE2, 22581 NPHY_RAIL_I, rssi_type); 22582 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22583 core == 22584 PHY_CORE_0 ? 22585 RADIO_MIMO_CORESEL_CORE1 22586 : 22587 RADIO_MIMO_CORESEL_CORE2, 22588 NPHY_RAIL_Q, rssi_type); 22589 22590 wlc_phy_poll_rssi_nphy(pi, rssi_type, poll_result_core, 22591 NPHY_RSSICAL_NPOLL); 22592 22593 for (result_idx = 0; result_idx < 4; result_idx++) { 22594 if (core == result_idx / 2) { 22595 fine_digital_offset[result_idx] = 22596 (target_code * 22597 NPHY_RSSICAL_NPOLL) - 22598 poll_result_core[result_idx]; 22599 if (fine_digital_offset[result_idx] < 22600 0) { 22601 fine_digital_offset[result_idx] 22602 = abs( 22603 fine_digital_offset 22604 [result_idx]); 22605 fine_digital_offset[result_idx] 22606 += (NPHY_RSSICAL_NPOLL 22607 / 2); 22608 fine_digital_offset[result_idx] 22609 /= NPHY_RSSICAL_NPOLL; 22610 fine_digital_offset[result_idx] 22611 = -fine_digital_offset 22612 [result_idx]; 22613 } else { 22614 fine_digital_offset[result_idx] 22615 += (NPHY_RSSICAL_NPOLL 22616 / 2); 22617 fine_digital_offset[result_idx] 22618 /= NPHY_RSSICAL_NPOLL; 22619 } 22620 22621 wlc_phy_scale_offset_rssi_nphy( 22622 pi, 0x0, 22623 (s8) 22624 fine_digital_offset 22625 [core * 22626 2], 22627 (core == PHY_CORE_0) ? 22628 RADIO_MIMO_CORESEL_CORE1 : 22629 RADIO_MIMO_CORESEL_CORE2, 22630 (result_idx % 2 == 0) ? 22631 NPHY_RAIL_I : 22632 NPHY_RAIL_Q, 22633 rssi_type); 22634 } 22635 } 22636 22637 } 22638 } 22639 22640 write_phy_reg(pi, 0x91, NPHY_Rfctrlintc1_save); 22641 write_phy_reg(pi, 0x92, NPHY_Rfctrlintc2_save); 22642 22643 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 22644 22645 mod_phy_reg(pi, 0xe7, (0x1 << 0), 1 << 0); 22646 mod_phy_reg(pi, 0x78, (0x1 << 0), 1 << 0); 22647 mod_phy_reg(pi, 0xe7, (0x1 << 0), 0); 22648 22649 mod_phy_reg(pi, 0xec, (0x1 << 0), 1 << 0); 22650 mod_phy_reg(pi, 0x78, (0x1 << 1), 1 << 1); 22651 mod_phy_reg(pi, 0xec, (0x1 << 0), 0); 22652 22653 write_phy_reg(pi, 0x8f, NPHY_AfectrlOverride1_save); 22654 write_phy_reg(pi, 0xa5, NPHY_AfectrlOverride2_save); 22655 write_phy_reg(pi, 0xa6, NPHY_AfectrlCore1_save); 22656 write_phy_reg(pi, 0xa7, NPHY_AfectrlCore2_save); 22657 write_phy_reg(pi, 0xe7, NPHY_RfctrlOverride0_save); 22658 write_phy_reg(pi, 0xec, NPHY_RfctrlOverride1_save); 22659 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22660 write_phy_reg(pi, 0x342, NPHY_REV7_RfctrlOverride3_save); 22661 write_phy_reg(pi, 0x343, NPHY_REV7_RfctrlOverride4_save); 22662 write_phy_reg(pi, 0x346, NPHY_REV7_RfctrlOverride5_save); 22663 write_phy_reg(pi, 0x347, NPHY_REV7_RfctrlOverride6_save); 22664 } 22665 write_phy_reg(pi, 0xe5, NPHY_RfctrlOverrideAux0_save); 22666 write_phy_reg(pi, 0xe6, NPHY_RfctrlOverrideAux1_save); 22667 write_phy_reg(pi, 0x78, NPHY_RfctrlCmd_save); 22668 write_phy_reg(pi, 0xf9, NPHY_RfctrlMiscReg1_save); 22669 write_phy_reg(pi, 0xfb, NPHY_RfctrlMiscReg2_save); 22670 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22671 write_phy_reg(pi, 0x340, NPHY_REV7_RfctrlMiscReg3_save); 22672 write_phy_reg(pi, 0x341, NPHY_REV7_RfctrlMiscReg4_save); 22673 write_phy_reg(pi, 0x344, NPHY_REV7_RfctrlMiscReg5_save); 22674 write_phy_reg(pi, 0x345, NPHY_REV7_RfctrlMiscReg6_save); 22675 } 22676 write_phy_reg(pi, 0x7a, NPHY_RfctrlRSSIOTHERS1_save); 22677 write_phy_reg(pi, 0x7d, NPHY_RfctrlRSSIOTHERS2_save); 22678 22679 if (CHSPEC_IS2G(pi->radio_chanspec)) { 22680 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22681 pi->rssical_cache.rssical_radio_regs_2G[0] = 22682 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0); 22683 pi->rssical_cache.rssical_radio_regs_2G[1] = 22684 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1); 22685 } else { 22686 pi->rssical_cache.rssical_radio_regs_2G[0] = 22687 read_radio_reg(pi, 22688 RADIO_2056_RX_RSSI_MISC | 22689 RADIO_2056_RX0); 22690 pi->rssical_cache.rssical_radio_regs_2G[1] = 22691 read_radio_reg(pi, 22692 RADIO_2056_RX_RSSI_MISC | 22693 RADIO_2056_RX1); 22694 } 22695 22696 pi->rssical_cache.rssical_phyregs_2G[0] = 22697 read_phy_reg(pi, 0x1a6); 22698 pi->rssical_cache.rssical_phyregs_2G[1] = 22699 read_phy_reg(pi, 0x1ac); 22700 pi->rssical_cache.rssical_phyregs_2G[2] = 22701 read_phy_reg(pi, 0x1b2); 22702 pi->rssical_cache.rssical_phyregs_2G[3] = 22703 read_phy_reg(pi, 0x1b8); 22704 pi->rssical_cache.rssical_phyregs_2G[4] = 22705 read_phy_reg(pi, 0x1a4); 22706 pi->rssical_cache.rssical_phyregs_2G[5] = 22707 read_phy_reg(pi, 0x1aa); 22708 pi->rssical_cache.rssical_phyregs_2G[6] = 22709 read_phy_reg(pi, 0x1b0); 22710 pi->rssical_cache.rssical_phyregs_2G[7] = 22711 read_phy_reg(pi, 0x1b6); 22712 pi->rssical_cache.rssical_phyregs_2G[8] = 22713 read_phy_reg(pi, 0x1a5); 22714 pi->rssical_cache.rssical_phyregs_2G[9] = 22715 read_phy_reg(pi, 0x1ab); 22716 pi->rssical_cache.rssical_phyregs_2G[10] = 22717 read_phy_reg(pi, 0x1b1); 22718 pi->rssical_cache.rssical_phyregs_2G[11] = 22719 read_phy_reg(pi, 0x1b7); 22720 22721 pi->nphy_rssical_chanspec_2G = pi->radio_chanspec; 22722 } else { 22723 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22724 pi->rssical_cache.rssical_radio_regs_5G[0] = 22725 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0); 22726 pi->rssical_cache.rssical_radio_regs_5G[1] = 22727 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1); 22728 } else { 22729 pi->rssical_cache.rssical_radio_regs_5G[0] = 22730 read_radio_reg(pi, 22731 RADIO_2056_RX_RSSI_MISC | 22732 RADIO_2056_RX0); 22733 pi->rssical_cache.rssical_radio_regs_5G[1] = 22734 read_radio_reg(pi, 22735 RADIO_2056_RX_RSSI_MISC | 22736 RADIO_2056_RX1); 22737 } 22738 22739 pi->rssical_cache.rssical_phyregs_5G[0] = 22740 read_phy_reg(pi, 0x1a6); 22741 pi->rssical_cache.rssical_phyregs_5G[1] = 22742 read_phy_reg(pi, 0x1ac); 22743 pi->rssical_cache.rssical_phyregs_5G[2] = 22744 read_phy_reg(pi, 0x1b2); 22745 pi->rssical_cache.rssical_phyregs_5G[3] = 22746 read_phy_reg(pi, 0x1b8); 22747 pi->rssical_cache.rssical_phyregs_5G[4] = 22748 read_phy_reg(pi, 0x1a4); 22749 pi->rssical_cache.rssical_phyregs_5G[5] = 22750 read_phy_reg(pi, 0x1aa); 22751 pi->rssical_cache.rssical_phyregs_5G[6] = 22752 read_phy_reg(pi, 0x1b0); 22753 pi->rssical_cache.rssical_phyregs_5G[7] = 22754 read_phy_reg(pi, 0x1b6); 22755 pi->rssical_cache.rssical_phyregs_5G[8] = 22756 read_phy_reg(pi, 0x1a5); 22757 pi->rssical_cache.rssical_phyregs_5G[9] = 22758 read_phy_reg(pi, 0x1ab); 22759 pi->rssical_cache.rssical_phyregs_5G[10] = 22760 read_phy_reg(pi, 0x1b1); 22761 pi->rssical_cache.rssical_phyregs_5G[11] = 22762 read_phy_reg(pi, 0x1b7); 22763 22764 pi->nphy_rssical_chanspec_5G = pi->radio_chanspec; 22765 } 22766 22767 wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); 22768 wlc_phy_clip_det_nphy(pi, 1, clip_state); 22769 } 22770 22771 static void wlc_phy_rssi_cal_nphy_rev2(struct brcms_phy *pi, u8 rssi_type) 22772 { 22773 s32 target_code; 22774 u16 classif_state; 22775 u16 clip_state[2]; 22776 u16 rssi_ctrl_state[2], pd_state[2]; 22777 u16 rfctrlintc_state[2], rfpdcorerxtx_state[2]; 22778 u16 rfctrlintc_override_val; 22779 u16 clip_off[] = { 0xffff, 0xffff }; 22780 u16 rf_pd_val, pd_mask, rssi_ctrl_mask; 22781 u8 vcm, min_vcm, vcm_tmp[4]; 22782 u8 vcm_final[4] = { 0, 0, 0, 0 }; 22783 u8 result_idx, ctr; 22784 s32 poll_results[4][4] = { 22785 {0, 0, 0, 0}, 22786 {0, 0, 0, 0}, 22787 {0, 0, 0, 0}, 22788 {0, 0, 0, 0} 22789 }; 22790 s32 poll_miniq[4][2] = { 22791 {0, 0}, 22792 {0, 0}, 22793 {0, 0}, 22794 {0, 0} 22795 }; 22796 s32 min_d, curr_d; 22797 s32 fine_digital_offset[4]; 22798 s32 poll_results_min[4] = { 0, 0, 0, 0 }; 22799 s32 min_poll; 22800 22801 switch (rssi_type) { 22802 case NPHY_RSSI_SEL_NB: 22803 target_code = NPHY_RSSICAL_NB_TARGET; 22804 break; 22805 case NPHY_RSSI_SEL_W1: 22806 target_code = NPHY_RSSICAL_W1_TARGET; 22807 break; 22808 case NPHY_RSSI_SEL_W2: 22809 target_code = NPHY_RSSICAL_W2_TARGET; 22810 break; 22811 default: 22812 return; 22813 } 22814 22815 classif_state = wlc_phy_classifier_nphy(pi, 0, 0); 22816 wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); 22817 wlc_phy_clip_det_nphy(pi, 0, clip_state); 22818 wlc_phy_clip_det_nphy(pi, 1, clip_off); 22819 22820 rf_pd_val = (rssi_type == NPHY_RSSI_SEL_NB) ? 0x6 : 0x4; 22821 rfctrlintc_override_val = 22822 CHSPEC_IS5G(pi->radio_chanspec) ? 0x140 : 0x110; 22823 22824 rfctrlintc_state[0] = read_phy_reg(pi, 0x91); 22825 rfpdcorerxtx_state[0] = read_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX); 22826 write_phy_reg(pi, 0x91, rfctrlintc_override_val); 22827 write_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX, rf_pd_val); 22828 22829 rfctrlintc_state[1] = read_phy_reg(pi, 0x92); 22830 rfpdcorerxtx_state[1] = read_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX); 22831 write_phy_reg(pi, 0x92, rfctrlintc_override_val); 22832 write_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX, rf_pd_val); 22833 22834 pd_mask = RADIO_2055_NBRSSI_PD | RADIO_2055_WBRSSI_G1_PD | 22835 RADIO_2055_WBRSSI_G2_PD; 22836 pd_state[0] = 22837 read_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC) & pd_mask; 22838 pd_state[1] = 22839 read_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC) & pd_mask; 22840 mod_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC, pd_mask, 0); 22841 mod_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC, pd_mask, 0); 22842 rssi_ctrl_mask = RADIO_2055_NBRSSI_SEL | RADIO_2055_WBRSSI_G1_SEL | 22843 RADIO_2055_WBRSSI_G2_SEL; 22844 rssi_ctrl_state[0] = 22845 read_radio_reg(pi, RADIO_2055_SP_RSSI_CORE1) & rssi_ctrl_mask; 22846 rssi_ctrl_state[1] = 22847 read_radio_reg(pi, RADIO_2055_SP_RSSI_CORE2) & rssi_ctrl_mask; 22848 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_ALLRX, rssi_type); 22849 22850 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, RADIO_MIMO_CORESEL_ALLRX, 22851 NPHY_RAIL_I, rssi_type); 22852 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, RADIO_MIMO_CORESEL_ALLRX, 22853 NPHY_RAIL_Q, rssi_type); 22854 22855 for (vcm = 0; vcm < 4; vcm++) { 22856 22857 vcm_tmp[0] = vcm_tmp[1] = vcm_tmp[2] = vcm_tmp[3] = vcm; 22858 if (rssi_type != NPHY_RSSI_SEL_W2) 22859 wlc_phy_set_rssi_2055_vcm(pi, rssi_type, vcm_tmp); 22860 22861 wlc_phy_poll_rssi_nphy(pi, rssi_type, &poll_results[vcm][0], 22862 NPHY_RSSICAL_NPOLL); 22863 22864 if ((rssi_type == NPHY_RSSI_SEL_W1) 22865 || (rssi_type == NPHY_RSSI_SEL_W2)) { 22866 for (ctr = 0; ctr < 2; ctr++) 22867 poll_miniq[vcm][ctr] = 22868 min(poll_results[vcm][ctr * 2 + 0], 22869 poll_results[vcm][ctr * 2 + 1]); 22870 } 22871 } 22872 22873 for (result_idx = 0; result_idx < 4; result_idx++) { 22874 min_d = NPHY_RSSICAL_MAXD; 22875 min_vcm = 0; 22876 min_poll = NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL + 1; 22877 for (vcm = 0; vcm < 4; vcm++) { 22878 curr_d = abs(((rssi_type == NPHY_RSSI_SEL_NB) ? 22879 poll_results[vcm][result_idx] : 22880 poll_miniq[vcm][result_idx / 2]) - 22881 (target_code * NPHY_RSSICAL_NPOLL)); 22882 if (curr_d < min_d) { 22883 min_d = curr_d; 22884 min_vcm = vcm; 22885 } 22886 if (poll_results[vcm][result_idx] < min_poll) 22887 min_poll = poll_results[vcm][result_idx]; 22888 } 22889 vcm_final[result_idx] = min_vcm; 22890 poll_results_min[result_idx] = min_poll; 22891 } 22892 22893 if (rssi_type != NPHY_RSSI_SEL_W2) 22894 wlc_phy_set_rssi_2055_vcm(pi, rssi_type, vcm_final); 22895 22896 for (result_idx = 0; result_idx < 4; result_idx++) { 22897 fine_digital_offset[result_idx] = 22898 (target_code * NPHY_RSSICAL_NPOLL) - 22899 poll_results[vcm_final[result_idx]][result_idx]; 22900 if (fine_digital_offset[result_idx] < 0) { 22901 fine_digital_offset[result_idx] = 22902 abs(fine_digital_offset[result_idx]); 22903 fine_digital_offset[result_idx] += 22904 (NPHY_RSSICAL_NPOLL / 2); 22905 fine_digital_offset[result_idx] /= NPHY_RSSICAL_NPOLL; 22906 fine_digital_offset[result_idx] = 22907 -fine_digital_offset[result_idx]; 22908 } else { 22909 fine_digital_offset[result_idx] += 22910 (NPHY_RSSICAL_NPOLL / 2); 22911 fine_digital_offset[result_idx] /= NPHY_RSSICAL_NPOLL; 22912 } 22913 22914 if (poll_results_min[result_idx] == 22915 NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL) 22916 fine_digital_offset[result_idx] = 22917 (target_code - NPHY_RSSICAL_MAXREAD - 1); 22918 22919 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 22920 (s8) 22921 fine_digital_offset[result_idx], 22922 (result_idx / 2 == 22923 0) ? RADIO_MIMO_CORESEL_CORE1 : 22924 RADIO_MIMO_CORESEL_CORE2, 22925 (result_idx % 2 == 22926 0) ? NPHY_RAIL_I : NPHY_RAIL_Q, 22927 rssi_type); 22928 } 22929 22930 mod_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC, pd_mask, pd_state[0]); 22931 mod_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC, pd_mask, pd_state[1]); 22932 if (rssi_ctrl_state[0] == RADIO_2055_NBRSSI_SEL) 22933 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, 22934 NPHY_RSSI_SEL_NB); 22935 else if (rssi_ctrl_state[0] == RADIO_2055_WBRSSI_G1_SEL) 22936 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, 22937 NPHY_RSSI_SEL_W1); 22938 else /* RADIO_2055_WBRSSI_G2_SEL */ 22939 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, 22940 NPHY_RSSI_SEL_W2); 22941 if (rssi_ctrl_state[1] == RADIO_2055_NBRSSI_SEL) 22942 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, 22943 NPHY_RSSI_SEL_NB); 22944 else if (rssi_ctrl_state[1] == RADIO_2055_WBRSSI_G1_SEL) 22945 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, 22946 NPHY_RSSI_SEL_W1); 22947 else /* RADIO_2055_WBRSSI_G1_SEL */ 22948 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, 22949 NPHY_RSSI_SEL_W2); 22950 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, rssi_type); 22951 22952 write_phy_reg(pi, 0x91, rfctrlintc_state[0]); 22953 write_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX, rfpdcorerxtx_state[0]); 22954 write_phy_reg(pi, 0x92, rfctrlintc_state[1]); 22955 write_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX, rfpdcorerxtx_state[1]); 22956 22957 wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); 22958 wlc_phy_clip_det_nphy(pi, 1, clip_state); 22959 22960 wlc_phy_resetcca_nphy(pi); 22961 } 22962 22963 void wlc_phy_rssi_cal_nphy(struct brcms_phy *pi) 22964 { 22965 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 22966 wlc_phy_rssi_cal_nphy_rev3(pi); 22967 } else { 22968 wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_NB); 22969 wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_W1); 22970 wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_W2); 22971 } 22972 } 22973 22974 int 22975 wlc_phy_rssi_compute_nphy(struct brcms_phy *pi, struct d11rxhdr *rxh) 22976 { 22977 s16 rxpwr, rxpwr0, rxpwr1; 22978 s16 phyRx2_l; 22979 22980 rxpwr = 0; 22981 rxpwr0 = rxh->PhyRxStatus_1 & PRXS1_nphy_PWR0_MASK; 22982 rxpwr1 = (rxh->PhyRxStatus_1 & PRXS1_nphy_PWR1_MASK) >> 8; 22983 22984 if (rxpwr0 > 127) 22985 rxpwr0 -= 256; 22986 if (rxpwr1 > 127) 22987 rxpwr1 -= 256; 22988 22989 phyRx2_l = rxh->PhyRxStatus_2 & 0x00ff; 22990 if (phyRx2_l > 127) 22991 phyRx2_l -= 256; 22992 22993 if (((rxpwr0 == 16) || (rxpwr0 == 32))) { 22994 rxpwr0 = rxpwr1; 22995 rxpwr1 = phyRx2_l; 22996 } 22997 22998 if (pi->sh->rssi_mode == RSSI_ANT_MERGE_MAX) 22999 rxpwr = (rxpwr0 > rxpwr1) ? rxpwr0 : rxpwr1; 23000 else if (pi->sh->rssi_mode == RSSI_ANT_MERGE_MIN) 23001 rxpwr = (rxpwr0 < rxpwr1) ? rxpwr0 : rxpwr1; 23002 else if (pi->sh->rssi_mode == RSSI_ANT_MERGE_AVG) 23003 rxpwr = (rxpwr0 + rxpwr1) >> 1; 23004 23005 return rxpwr; 23006 } 23007 23008 static void 23009 wlc_phy_loadsampletable_nphy(struct brcms_phy *pi, struct cordic_iq *tone_buf, 23010 u16 num_samps) 23011 { 23012 u16 t; 23013 u32 *data_buf = NULL; 23014 23015 data_buf = kmalloc_array(num_samps, sizeof(u32), GFP_ATOMIC); 23016 if (data_buf == NULL) 23017 return; 23018 23019 if (pi->phyhang_avoid) 23020 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23021 23022 for (t = 0; t < num_samps; t++) 23023 data_buf[t] = ((((unsigned int)tone_buf[t].i) & 0x3ff) << 10) | 23024 (((unsigned int)tone_buf[t].q) & 0x3ff); 23025 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SAMPLEPLAY, num_samps, 0, 32, 23026 data_buf); 23027 23028 kfree(data_buf); 23029 23030 if (pi->phyhang_avoid) 23031 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23032 } 23033 23034 static u16 23035 wlc_phy_gen_load_samples_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, 23036 u8 dac_test_mode) 23037 { 23038 u8 phy_bw, is_phybw40; 23039 u16 num_samps, t, spur; 23040 s32 theta = 0, rot = 0; 23041 u32 tbl_len; 23042 struct cordic_iq *tone_buf = NULL; 23043 23044 is_phybw40 = CHSPEC_IS40(pi->radio_chanspec); 23045 phy_bw = (is_phybw40 == 1) ? 40 : 20; 23046 tbl_len = (phy_bw << 3); 23047 23048 if (dac_test_mode == 1) { 23049 spur = read_phy_reg(pi, 0x01); 23050 spur = (spur >> 15) & 1; 23051 phy_bw = (spur == 1) ? 82 : 80; 23052 phy_bw = (is_phybw40 == 1) ? (phy_bw << 1) : phy_bw; 23053 23054 tbl_len = (phy_bw << 1); 23055 } 23056 23057 tone_buf = kmalloc_array(tbl_len, sizeof(struct cordic_iq), 23058 GFP_ATOMIC); 23059 if (tone_buf == NULL) 23060 return 0; 23061 23062 num_samps = (u16) tbl_len; 23063 rot = ((f_kHz * 36) / phy_bw) / 100; 23064 theta = 0; 23065 23066 for (t = 0; t < num_samps; t++) { 23067 23068 tone_buf[t] = cordic_calc_iq(theta); 23069 23070 theta += rot; 23071 23072 tone_buf[t].q = (s32)CORDIC_FLOAT(tone_buf[t].q * max_val); 23073 tone_buf[t].i = (s32)CORDIC_FLOAT(tone_buf[t].i * max_val); 23074 } 23075 23076 wlc_phy_loadsampletable_nphy(pi, tone_buf, num_samps); 23077 23078 kfree(tone_buf); 23079 23080 return num_samps; 23081 } 23082 23083 static void 23084 wlc_phy_runsamples_nphy(struct brcms_phy *pi, u16 num_samps, u16 loops, 23085 u16 wait, u8 iqmode, u8 dac_test_mode, 23086 bool modify_bbmult) 23087 { 23088 u16 bb_mult; 23089 u8 phy_bw, sample_cmd; 23090 u16 orig_RfseqCoreActv; 23091 u16 lpf_bw_ctl_override3, lpf_bw_ctl_override4; 23092 23093 if (pi->phyhang_avoid) 23094 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23095 23096 phy_bw = 20; 23097 if (CHSPEC_IS40(pi->radio_chanspec)) 23098 phy_bw = 40; 23099 23100 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23101 23102 lpf_bw_ctl_override3 = read_phy_reg(pi, 0x342) & (0x1 << 7); 23103 lpf_bw_ctl_override4 = read_phy_reg(pi, 0x343) & (0x1 << 7); 23104 if (!(lpf_bw_ctl_override3 | lpf_bw_ctl_override4)) { 23105 wlc_phy_rfctrl_override_nphy_rev7( 23106 pi, 23107 (0x1 << 7), 23108 wlc_phy_read_lpf_bw_ctl_nphy 23109 (pi, 23110 0), 0, 0, 23111 NPHY_REV7_RFCTRLOVERRIDE_ID1); 23112 23113 pi->nphy_sample_play_lpf_bw_ctl_ovr = true; 23114 } 23115 read_phy_reg(pi, 0x340); /* lpf_bw_ctl_miscreg3 */ 23116 read_phy_reg(pi, 0x341); /* lpf_bw_ctl_miscreg4 */ 23117 } 23118 23119 if ((pi->nphy_bb_mult_save & BB_MULT_VALID_MASK) == 0) { 23120 23121 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, 23122 &bb_mult); 23123 pi->nphy_bb_mult_save = 23124 BB_MULT_VALID_MASK | (bb_mult & BB_MULT_MASK); 23125 } 23126 23127 if (modify_bbmult) { 23128 bb_mult = (phy_bw == 20) ? 100 : 71; 23129 bb_mult = (bb_mult << 8) + bb_mult; 23130 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, 23131 &bb_mult); 23132 } 23133 23134 if (pi->phyhang_avoid) 23135 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23136 23137 write_phy_reg(pi, 0xc6, num_samps - 1); 23138 23139 if (loops != 0xffff) 23140 write_phy_reg(pi, 0xc4, loops - 1); 23141 else 23142 write_phy_reg(pi, 0xc4, loops); 23143 23144 write_phy_reg(pi, 0xc5, wait); 23145 23146 orig_RfseqCoreActv = read_phy_reg(pi, 0xa1); 23147 or_phy_reg(pi, 0xa1, NPHY_RfseqMode_CoreActv_override); 23148 if (iqmode) { 23149 23150 and_phy_reg(pi, 0xc2, 0x7FFF); 23151 23152 or_phy_reg(pi, 0xc2, 0x8000); 23153 } else { 23154 23155 sample_cmd = (dac_test_mode == 1) ? 0x5 : 0x1; 23156 write_phy_reg(pi, 0xc3, sample_cmd); 23157 } 23158 23159 SPINWAIT(((read_phy_reg(pi, 0xa4) & 0x1) == 1), 1000); 23160 23161 write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); 23162 } 23163 23164 int 23165 wlc_phy_tx_tone_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, 23166 u8 iqmode, u8 dac_test_mode, bool modify_bbmult) 23167 { 23168 u16 num_samps; 23169 u16 loops = 0xffff; 23170 u16 wait = 0; 23171 23172 num_samps = wlc_phy_gen_load_samples_nphy(pi, f_kHz, max_val, 23173 dac_test_mode); 23174 if (num_samps == 0) 23175 return -EBADE; 23176 23177 wlc_phy_runsamples_nphy(pi, num_samps, loops, wait, iqmode, 23178 dac_test_mode, modify_bbmult); 23179 23180 return 0; 23181 } 23182 23183 void wlc_phy_stopplayback_nphy(struct brcms_phy *pi) 23184 { 23185 u16 playback_status; 23186 u16 bb_mult; 23187 23188 if (pi->phyhang_avoid) 23189 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23190 23191 playback_status = read_phy_reg(pi, 0xc7); 23192 if (playback_status & 0x1) 23193 or_phy_reg(pi, 0xc3, NPHY_sampleCmd_STOP); 23194 else if (playback_status & 0x2) 23195 and_phy_reg(pi, 0xc2, 23196 0xffff & ~NPHY_iqloCalCmdGctl_IQLO_CAL_EN); 23197 23198 and_phy_reg(pi, 0xc3, (u16) ~(0x1 << 2)); 23199 23200 if ((pi->nphy_bb_mult_save & BB_MULT_VALID_MASK) != 0) { 23201 23202 bb_mult = pi->nphy_bb_mult_save & BB_MULT_MASK; 23203 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, 23204 &bb_mult); 23205 23206 pi->nphy_bb_mult_save = 0; 23207 } 23208 23209 if (NREV_IS(pi->pubpi.phy_rev, 7) || NREV_GE(pi->pubpi.phy_rev, 8)) { 23210 if (pi->nphy_sample_play_lpf_bw_ctl_ovr) { 23211 wlc_phy_rfctrl_override_nphy_rev7( 23212 pi, 23213 (0x1 << 7), 23214 0, 0, 1, 23215 NPHY_REV7_RFCTRLOVERRIDE_ID1); 23216 pi->nphy_sample_play_lpf_bw_ctl_ovr = false; 23217 } 23218 } 23219 23220 if (pi->phyhang_avoid) 23221 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23222 } 23223 23224 static u32 *brcms_phy_get_tx_pwrctrl_tbl(struct brcms_phy *pi) 23225 { 23226 u32 *tx_pwrctrl_tbl = NULL; 23227 uint phyrev = pi->pubpi.phy_rev; 23228 23229 if (PHY_IPA(pi)) { 23230 tx_pwrctrl_tbl = 23231 wlc_phy_get_ipa_gaintbl_nphy(pi); 23232 } else { 23233 if (CHSPEC_IS5G(pi->radio_chanspec)) { 23234 if (NREV_IS(phyrev, 3)) 23235 tx_pwrctrl_tbl = nphy_tpc_5GHz_txgain_rev3; 23236 else if (NREV_IS(phyrev, 4)) 23237 tx_pwrctrl_tbl = 23238 (pi->srom_fem5g.extpagain == 3) ? 23239 nphy_tpc_5GHz_txgain_HiPwrEPA : 23240 nphy_tpc_5GHz_txgain_rev4; 23241 else 23242 tx_pwrctrl_tbl = nphy_tpc_5GHz_txgain_rev5; 23243 } else { 23244 if (NREV_GE(phyrev, 7)) { 23245 if (pi->pubpi.radiorev == 3) 23246 tx_pwrctrl_tbl = 23247 nphy_tpc_txgain_epa_2057rev3; 23248 else if (pi->pubpi.radiorev == 5) 23249 tx_pwrctrl_tbl = 23250 nphy_tpc_txgain_epa_2057rev5; 23251 } else { 23252 if (NREV_GE(phyrev, 5) && 23253 (pi->srom_fem2g.extpagain == 3)) 23254 tx_pwrctrl_tbl = 23255 nphy_tpc_txgain_HiPwrEPA; 23256 else 23257 tx_pwrctrl_tbl = 23258 nphy_tpc_txgain_rev3; 23259 } 23260 } 23261 } 23262 return tx_pwrctrl_tbl; 23263 } 23264 23265 struct nphy_txgains wlc_phy_get_tx_gain_nphy(struct brcms_phy *pi) 23266 { 23267 u16 base_idx[2], curr_gain[2]; 23268 u8 core_no; 23269 struct nphy_txgains target_gain; 23270 u32 *tx_pwrctrl_tbl = NULL; 23271 23272 if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) { 23273 if (pi->phyhang_avoid) 23274 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23275 23276 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 23277 curr_gain); 23278 23279 if (pi->phyhang_avoid) 23280 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23281 23282 for (core_no = 0; core_no < 2; core_no++) { 23283 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23284 target_gain.ipa[core_no] = 23285 curr_gain[core_no] & 0x0007; 23286 target_gain.pad[core_no] = 23287 ((curr_gain[core_no] & 0x00F8) >> 3); 23288 target_gain.pga[core_no] = 23289 ((curr_gain[core_no] & 0x0F00) >> 8); 23290 target_gain.txgm[core_no] = 23291 ((curr_gain[core_no] & 0x7000) >> 12); 23292 target_gain.txlpf[core_no] = 23293 ((curr_gain[core_no] & 0x8000) >> 15); 23294 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23295 target_gain.ipa[core_no] = 23296 curr_gain[core_no] & 0x000F; 23297 target_gain.pad[core_no] = 23298 ((curr_gain[core_no] & 0x00F0) >> 4); 23299 target_gain.pga[core_no] = 23300 ((curr_gain[core_no] & 0x0F00) >> 8); 23301 target_gain.txgm[core_no] = 23302 ((curr_gain[core_no] & 0x7000) >> 12); 23303 } else { 23304 target_gain.ipa[core_no] = 23305 curr_gain[core_no] & 0x0003; 23306 target_gain.pad[core_no] = 23307 ((curr_gain[core_no] & 0x000C) >> 2); 23308 target_gain.pga[core_no] = 23309 ((curr_gain[core_no] & 0x0070) >> 4); 23310 target_gain.txgm[core_no] = 23311 ((curr_gain[core_no] & 0x0380) >> 7); 23312 } 23313 } 23314 } else { 23315 uint phyrev = pi->pubpi.phy_rev; 23316 23317 base_idx[0] = (read_phy_reg(pi, 0x1ed) >> 8) & 0x7f; 23318 base_idx[1] = (read_phy_reg(pi, 0x1ee) >> 8) & 0x7f; 23319 for (core_no = 0; core_no < 2; core_no++) { 23320 if (NREV_GE(phyrev, 3)) { 23321 tx_pwrctrl_tbl = 23322 brcms_phy_get_tx_pwrctrl_tbl(pi); 23323 if (NREV_GE(phyrev, 7)) { 23324 target_gain.ipa[core_no] = 23325 (tx_pwrctrl_tbl 23326 [base_idx[core_no]] 23327 >> 16) & 0x7; 23328 target_gain.pad[core_no] = 23329 (tx_pwrctrl_tbl 23330 [base_idx[core_no]] 23331 >> 19) & 0x1f; 23332 target_gain.pga[core_no] = 23333 (tx_pwrctrl_tbl 23334 [base_idx[core_no]] 23335 >> 24) & 0xf; 23336 target_gain.txgm[core_no] = 23337 (tx_pwrctrl_tbl 23338 [base_idx[core_no]] 23339 >> 28) & 0x7; 23340 target_gain.txlpf[core_no] = 23341 (tx_pwrctrl_tbl 23342 [base_idx[core_no]] 23343 >> 31) & 0x1; 23344 } else { 23345 target_gain.ipa[core_no] = 23346 (tx_pwrctrl_tbl 23347 [base_idx[core_no]] 23348 >> 16) & 0xf; 23349 target_gain.pad[core_no] = 23350 (tx_pwrctrl_tbl 23351 [base_idx[core_no]] 23352 >> 20) & 0xf; 23353 target_gain.pga[core_no] = 23354 (tx_pwrctrl_tbl 23355 [base_idx[core_no]] 23356 >> 24) & 0xf; 23357 target_gain.txgm[core_no] = 23358 (tx_pwrctrl_tbl 23359 [base_idx[core_no]] 23360 >> 28) & 0x7; 23361 } 23362 } else { 23363 target_gain.ipa[core_no] = 23364 (nphy_tpc_txgain[base_idx[core_no]] >> 23365 16) & 0x3; 23366 target_gain.pad[core_no] = 23367 (nphy_tpc_txgain[base_idx[core_no]] >> 23368 18) & 0x3; 23369 target_gain.pga[core_no] = 23370 (nphy_tpc_txgain[base_idx[core_no]] >> 23371 20) & 0x7; 23372 target_gain.txgm[core_no] = 23373 (nphy_tpc_txgain[base_idx[core_no]] >> 23374 23) & 0x7; 23375 } 23376 } 23377 } 23378 23379 return target_gain; 23380 } 23381 23382 static void 23383 wlc_phy_iqcal_gainparams_nphy(struct brcms_phy *pi, u16 core_no, 23384 struct nphy_txgains target_gain, 23385 struct nphy_iqcal_params *params) 23386 { 23387 u8 k; 23388 u16 gain_index; 23389 u8 band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0); 23390 23391 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23392 if (NREV_GE(pi->pubpi.phy_rev, 7)) 23393 params->txlpf = target_gain.txlpf[core_no]; 23394 23395 params->txgm = target_gain.txgm[core_no]; 23396 params->pga = target_gain.pga[core_no]; 23397 params->pad = target_gain.pad[core_no]; 23398 params->ipa = target_gain.ipa[core_no]; 23399 if (NREV_GE(pi->pubpi.phy_rev, 7)) 23400 params->cal_gain = 23401 ((params->txlpf << 15) | (params->txgm << 12) | 23402 (params->pga << 8) | 23403 (params->pad << 3) | (params->ipa)); 23404 else 23405 params->cal_gain = 23406 ((params->txgm << 12) | (params->pga << 8) | 23407 (params->pad << 4) | (params->ipa)); 23408 23409 params->ncorr[0] = 0x79; 23410 params->ncorr[1] = 0x79; 23411 params->ncorr[2] = 0x79; 23412 params->ncorr[3] = 0x79; 23413 params->ncorr[4] = 0x79; 23414 } else { 23415 23416 gain_index = ((target_gain.pad[core_no] << 0) | 23417 (target_gain.pga[core_no] << 4) | 23418 (target_gain.txgm[core_no] << 8)); 23419 23420 for (k = 0; k < NPHY_IQCAL_NUMGAINS; k++) { 23421 if (tbl_iqcal_gainparams_nphy[band_idx][k][0] == 23422 gain_index) 23423 break; 23424 } 23425 23426 params->txgm = tbl_iqcal_gainparams_nphy[band_idx][k][1]; 23427 params->pga = tbl_iqcal_gainparams_nphy[band_idx][k][2]; 23428 params->pad = tbl_iqcal_gainparams_nphy[band_idx][k][3]; 23429 params->cal_gain = ((params->txgm << 7) | (params->pga << 4) | 23430 (params->pad << 2)); 23431 params->ncorr[0] = tbl_iqcal_gainparams_nphy[band_idx][k][4]; 23432 params->ncorr[1] = tbl_iqcal_gainparams_nphy[band_idx][k][5]; 23433 params->ncorr[2] = tbl_iqcal_gainparams_nphy[band_idx][k][6]; 23434 params->ncorr[3] = tbl_iqcal_gainparams_nphy[band_idx][k][7]; 23435 } 23436 } 23437 23438 static void wlc_phy_txcal_radio_setup_nphy(struct brcms_phy *pi) 23439 { 23440 u16 jtag_core, core; 23441 23442 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23443 23444 for (core = 0; core <= 1; core++) { 23445 23446 pi->tx_rx_cal_radio_saveregs[(core * 11) + 0] = 23447 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23448 TX_SSI_MASTER); 23449 23450 pi->tx_rx_cal_radio_saveregs[(core * 11) + 1] = 23451 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23452 IQCAL_VCM_HG); 23453 23454 pi->tx_rx_cal_radio_saveregs[(core * 11) + 2] = 23455 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23456 IQCAL_IDAC); 23457 23458 pi->tx_rx_cal_radio_saveregs[(core * 11) + 3] = 23459 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23460 TSSI_VCM); 23461 23462 pi->tx_rx_cal_radio_saveregs[(core * 11) + 4] = 0; 23463 23464 pi->tx_rx_cal_radio_saveregs[(core * 11) + 5] = 23465 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23466 TX_SSI_MUX); 23467 23468 if (pi->pubpi.radiorev != 5) 23469 pi->tx_rx_cal_radio_saveregs[(core * 11) + 6] = 23470 READ_RADIO_REG3(pi, RADIO_2057, TX, 23471 core, 23472 TSSIA); 23473 23474 pi->tx_rx_cal_radio_saveregs[(core * 11) + 7] = 23475 READ_RADIO_REG3(pi, RADIO_2057, TX, core, TSSIG); 23476 23477 pi->tx_rx_cal_radio_saveregs[(core * 11) + 8] = 23478 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23479 TSSI_MISC1); 23480 23481 if (CHSPEC_IS5G(pi->radio_chanspec)) { 23482 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23483 TX_SSI_MASTER, 0x0a); 23484 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23485 IQCAL_VCM_HG, 0x43); 23486 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23487 IQCAL_IDAC, 0x55); 23488 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23489 TSSI_VCM, 0x00); 23490 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23491 TSSIG, 0x00); 23492 if (pi->use_int_tx_iqlo_cal_nphy) { 23493 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 23494 core, TX_SSI_MUX, 0x4); 23495 if (!(pi-> 23496 internal_tx_iqlo_cal_tapoff_intpa_nphy)) 23497 WRITE_RADIO_REG3(pi, RADIO_2057, 23498 TX, core, 23499 TSSIA, 0x31); 23500 else 23501 WRITE_RADIO_REG3(pi, RADIO_2057, 23502 TX, core, 23503 TSSIA, 0x21); 23504 } 23505 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23506 TSSI_MISC1, 0x00); 23507 } else { 23508 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23509 TX_SSI_MASTER, 0x06); 23510 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23511 IQCAL_VCM_HG, 0x43); 23512 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23513 IQCAL_IDAC, 0x55); 23514 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23515 TSSI_VCM, 0x00); 23516 23517 if (pi->pubpi.radiorev != 5) 23518 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 23519 core, TSSIA, 0x00); 23520 if (pi->use_int_tx_iqlo_cal_nphy) { 23521 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 23522 core, TX_SSI_MUX, 23523 0x06); 23524 if (!(pi-> 23525 internal_tx_iqlo_cal_tapoff_intpa_nphy)) 23526 WRITE_RADIO_REG3(pi, RADIO_2057, 23527 TX, core, 23528 TSSIG, 0x31); 23529 else 23530 WRITE_RADIO_REG3(pi, RADIO_2057, 23531 TX, core, 23532 TSSIG, 0x21); 23533 } 23534 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23535 TSSI_MISC1, 0x00); 23536 } 23537 } 23538 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23539 23540 for (core = 0; core <= 1; core++) { 23541 jtag_core = 23542 (core == 23543 PHY_CORE_0) ? RADIO_2056_TX0 : RADIO_2056_TX1; 23544 23545 pi->tx_rx_cal_radio_saveregs[(core * 11) + 0] = 23546 read_radio_reg(pi, 23547 RADIO_2056_TX_TX_SSI_MASTER | 23548 jtag_core); 23549 23550 pi->tx_rx_cal_radio_saveregs[(core * 11) + 1] = 23551 read_radio_reg(pi, 23552 RADIO_2056_TX_IQCAL_VCM_HG | 23553 jtag_core); 23554 23555 pi->tx_rx_cal_radio_saveregs[(core * 11) + 2] = 23556 read_radio_reg(pi, 23557 RADIO_2056_TX_IQCAL_IDAC | 23558 jtag_core); 23559 23560 pi->tx_rx_cal_radio_saveregs[(core * 11) + 3] = 23561 read_radio_reg( 23562 pi, 23563 RADIO_2056_TX_TSSI_VCM | 23564 jtag_core); 23565 23566 pi->tx_rx_cal_radio_saveregs[(core * 11) + 4] = 23567 read_radio_reg(pi, 23568 RADIO_2056_TX_TX_AMP_DET | 23569 jtag_core); 23570 23571 pi->tx_rx_cal_radio_saveregs[(core * 11) + 5] = 23572 read_radio_reg(pi, 23573 RADIO_2056_TX_TX_SSI_MUX | 23574 jtag_core); 23575 23576 pi->tx_rx_cal_radio_saveregs[(core * 11) + 6] = 23577 read_radio_reg(pi, 23578 RADIO_2056_TX_TSSIA | jtag_core); 23579 23580 pi->tx_rx_cal_radio_saveregs[(core * 11) + 7] = 23581 read_radio_reg(pi, 23582 RADIO_2056_TX_TSSIG | jtag_core); 23583 23584 pi->tx_rx_cal_radio_saveregs[(core * 11) + 8] = 23585 read_radio_reg(pi, 23586 RADIO_2056_TX_TSSI_MISC1 | 23587 jtag_core); 23588 23589 pi->tx_rx_cal_radio_saveregs[(core * 11) + 9] = 23590 read_radio_reg(pi, 23591 RADIO_2056_TX_TSSI_MISC2 | 23592 jtag_core); 23593 23594 pi->tx_rx_cal_radio_saveregs[(core * 11) + 10] = 23595 read_radio_reg(pi, 23596 RADIO_2056_TX_TSSI_MISC3 | 23597 jtag_core); 23598 23599 if (CHSPEC_IS5G(pi->radio_chanspec)) { 23600 write_radio_reg(pi, 23601 RADIO_2056_TX_TX_SSI_MASTER | 23602 jtag_core, 0x0a); 23603 write_radio_reg(pi, 23604 RADIO_2056_TX_IQCAL_VCM_HG | 23605 jtag_core, 0x40); 23606 write_radio_reg(pi, 23607 RADIO_2056_TX_IQCAL_IDAC | 23608 jtag_core, 0x55); 23609 write_radio_reg(pi, 23610 RADIO_2056_TX_TSSI_VCM | 23611 jtag_core, 0x00); 23612 write_radio_reg(pi, 23613 RADIO_2056_TX_TX_AMP_DET | 23614 jtag_core, 0x00); 23615 23616 if (PHY_IPA(pi)) { 23617 write_radio_reg( 23618 pi, 23619 RADIO_2056_TX_TX_SSI_MUX 23620 | jtag_core, 0x4); 23621 write_radio_reg(pi, 23622 RADIO_2056_TX_TSSIA | 23623 jtag_core, 0x1); 23624 } else { 23625 write_radio_reg( 23626 pi, 23627 RADIO_2056_TX_TX_SSI_MUX 23628 | jtag_core, 0x00); 23629 write_radio_reg(pi, 23630 RADIO_2056_TX_TSSIA | 23631 jtag_core, 0x2f); 23632 } 23633 write_radio_reg(pi, 23634 RADIO_2056_TX_TSSIG | jtag_core, 23635 0x00); 23636 write_radio_reg(pi, 23637 RADIO_2056_TX_TSSI_MISC1 | 23638 jtag_core, 0x00); 23639 23640 write_radio_reg(pi, 23641 RADIO_2056_TX_TSSI_MISC2 | 23642 jtag_core, 0x00); 23643 write_radio_reg(pi, 23644 RADIO_2056_TX_TSSI_MISC3 | 23645 jtag_core, 0x00); 23646 } else { 23647 write_radio_reg(pi, 23648 RADIO_2056_TX_TX_SSI_MASTER | 23649 jtag_core, 0x06); 23650 write_radio_reg(pi, 23651 RADIO_2056_TX_IQCAL_VCM_HG | 23652 jtag_core, 0x40); 23653 write_radio_reg(pi, 23654 RADIO_2056_TX_IQCAL_IDAC | 23655 jtag_core, 0x55); 23656 write_radio_reg(pi, 23657 RADIO_2056_TX_TSSI_VCM | 23658 jtag_core, 0x00); 23659 write_radio_reg(pi, 23660 RADIO_2056_TX_TX_AMP_DET | 23661 jtag_core, 0x00); 23662 write_radio_reg(pi, 23663 RADIO_2056_TX_TSSIA | jtag_core, 23664 0x00); 23665 23666 if (PHY_IPA(pi)) { 23667 23668 write_radio_reg( 23669 pi, 23670 RADIO_2056_TX_TX_SSI_MUX 23671 | jtag_core, 0x06); 23672 if (NREV_LT(pi->pubpi.phy_rev, 5)) 23673 write_radio_reg( 23674 pi, 23675 RADIO_2056_TX_TSSIG 23676 | jtag_core, 23677 0x11); 23678 else 23679 write_radio_reg( 23680 pi, 23681 RADIO_2056_TX_TSSIG 23682 | jtag_core, 23683 0x1); 23684 } else { 23685 write_radio_reg( 23686 pi, 23687 RADIO_2056_TX_TX_SSI_MUX 23688 | jtag_core, 0x00); 23689 write_radio_reg(pi, 23690 RADIO_2056_TX_TSSIG | 23691 jtag_core, 0x20); 23692 } 23693 23694 write_radio_reg(pi, 23695 RADIO_2056_TX_TSSI_MISC1 | 23696 jtag_core, 0x00); 23697 write_radio_reg(pi, 23698 RADIO_2056_TX_TSSI_MISC2 | 23699 jtag_core, 0x00); 23700 write_radio_reg(pi, 23701 RADIO_2056_TX_TSSI_MISC3 | 23702 jtag_core, 0x00); 23703 } 23704 } 23705 } else { 23706 23707 pi->tx_rx_cal_radio_saveregs[0] = 23708 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1); 23709 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 0x29); 23710 pi->tx_rx_cal_radio_saveregs[1] = 23711 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2); 23712 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 0x54); 23713 23714 pi->tx_rx_cal_radio_saveregs[2] = 23715 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1); 23716 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 0x29); 23717 pi->tx_rx_cal_radio_saveregs[3] = 23718 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2); 23719 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 0x54); 23720 23721 pi->tx_rx_cal_radio_saveregs[4] = 23722 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1); 23723 pi->tx_rx_cal_radio_saveregs[5] = 23724 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2); 23725 23726 if ((read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand) == 23727 0) { 23728 23729 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x04); 23730 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x04); 23731 } else { 23732 23733 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x20); 23734 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x20); 23735 } 23736 23737 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 23738 23739 or_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 0x20); 23740 or_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 0x20); 23741 } else { 23742 23743 and_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 0xdf); 23744 and_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 0xdf); 23745 } 23746 } 23747 } 23748 23749 static void wlc_phy_txcal_radio_cleanup_nphy(struct brcms_phy *pi) 23750 { 23751 u16 jtag_core, core; 23752 23753 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23754 for (core = 0; core <= 1; core++) { 23755 23756 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23757 TX_SSI_MASTER, 23758 pi-> 23759 tx_rx_cal_radio_saveregs[(core * 11) + 23760 0]); 23761 23762 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_VCM_HG, 23763 pi-> 23764 tx_rx_cal_radio_saveregs[(core * 11) + 23765 1]); 23766 23767 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_IDAC, 23768 pi-> 23769 tx_rx_cal_radio_saveregs[(core * 11) + 23770 2]); 23771 23772 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM, 23773 pi-> 23774 tx_rx_cal_radio_saveregs[(core * 11) + 23775 3]); 23776 23777 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TX_SSI_MUX, 23778 pi-> 23779 tx_rx_cal_radio_saveregs[(core * 11) + 23780 5]); 23781 23782 if (pi->pubpi.radiorev != 5) 23783 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23784 TSSIA, 23785 pi->tx_rx_cal_radio_saveregs 23786 [(core * 11) + 6]); 23787 23788 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSIG, 23789 pi-> 23790 tx_rx_cal_radio_saveregs[(core * 11) + 23791 7]); 23792 23793 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_MISC1, 23794 pi-> 23795 tx_rx_cal_radio_saveregs[(core * 11) + 23796 8]); 23797 } 23798 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23799 for (core = 0; core <= 1; core++) { 23800 jtag_core = (core == PHY_CORE_0) ? 23801 RADIO_2056_TX0 : RADIO_2056_TX1; 23802 23803 write_radio_reg(pi, 23804 RADIO_2056_TX_TX_SSI_MASTER | jtag_core, 23805 pi-> 23806 tx_rx_cal_radio_saveregs[(core * 11) + 23807 0]); 23808 23809 write_radio_reg(pi, 23810 RADIO_2056_TX_IQCAL_VCM_HG | jtag_core, 23811 pi-> 23812 tx_rx_cal_radio_saveregs[(core * 11) + 23813 1]); 23814 23815 write_radio_reg(pi, 23816 RADIO_2056_TX_IQCAL_IDAC | jtag_core, 23817 pi-> 23818 tx_rx_cal_radio_saveregs[(core * 11) + 23819 2]); 23820 23821 write_radio_reg(pi, RADIO_2056_TX_TSSI_VCM | jtag_core, 23822 pi-> 23823 tx_rx_cal_radio_saveregs[(core * 11) + 23824 3]); 23825 23826 write_radio_reg(pi, 23827 RADIO_2056_TX_TX_AMP_DET | jtag_core, 23828 pi-> 23829 tx_rx_cal_radio_saveregs[(core * 11) + 23830 4]); 23831 23832 write_radio_reg(pi, 23833 RADIO_2056_TX_TX_SSI_MUX | jtag_core, 23834 pi-> 23835 tx_rx_cal_radio_saveregs[(core * 11) + 23836 5]); 23837 23838 write_radio_reg(pi, RADIO_2056_TX_TSSIA | jtag_core, 23839 pi-> 23840 tx_rx_cal_radio_saveregs[(core * 11) + 23841 6]); 23842 23843 write_radio_reg(pi, RADIO_2056_TX_TSSIG | jtag_core, 23844 pi-> 23845 tx_rx_cal_radio_saveregs[(core * 11) + 23846 7]); 23847 23848 write_radio_reg(pi, 23849 RADIO_2056_TX_TSSI_MISC1 | jtag_core, 23850 pi-> 23851 tx_rx_cal_radio_saveregs[(core * 11) + 23852 8]); 23853 23854 write_radio_reg(pi, 23855 RADIO_2056_TX_TSSI_MISC2 | jtag_core, 23856 pi-> 23857 tx_rx_cal_radio_saveregs[(core * 11) + 23858 9]); 23859 23860 write_radio_reg(pi, 23861 RADIO_2056_TX_TSSI_MISC3 | jtag_core, 23862 pi-> 23863 tx_rx_cal_radio_saveregs[(core * 11) + 23864 10]); 23865 } 23866 } else { 23867 23868 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 23869 pi->tx_rx_cal_radio_saveregs[0]); 23870 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 23871 pi->tx_rx_cal_radio_saveregs[1]); 23872 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 23873 pi->tx_rx_cal_radio_saveregs[2]); 23874 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 23875 pi->tx_rx_cal_radio_saveregs[3]); 23876 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 23877 pi->tx_rx_cal_radio_saveregs[4]); 23878 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 23879 pi->tx_rx_cal_radio_saveregs[5]); 23880 } 23881 } 23882 23883 static void wlc_phy_txcal_physetup_nphy(struct brcms_phy *pi) 23884 { 23885 u16 val, mask; 23886 23887 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23888 pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa6); 23889 pi->tx_rx_cal_phy_saveregs[1] = read_phy_reg(pi, 0xa7); 23890 23891 mask = ((0x3 << 8) | (0x3 << 10)); 23892 val = (0x2 << 8); 23893 val |= (0x2 << 10); 23894 mod_phy_reg(pi, 0xa6, mask, val); 23895 mod_phy_reg(pi, 0xa7, mask, val); 23896 23897 val = read_phy_reg(pi, 0x8f); 23898 pi->tx_rx_cal_phy_saveregs[2] = val; 23899 val |= ((0x1 << 9) | (0x1 << 10)); 23900 write_phy_reg(pi, 0x8f, val); 23901 23902 val = read_phy_reg(pi, 0xa5); 23903 pi->tx_rx_cal_phy_saveregs[3] = val; 23904 val |= ((0x1 << 9) | (0x1 << 10)); 23905 write_phy_reg(pi, 0xa5, val); 23906 23907 pi->tx_rx_cal_phy_saveregs[4] = read_phy_reg(pi, 0x01); 23908 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 23909 23910 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, 23911 &val); 23912 pi->tx_rx_cal_phy_saveregs[5] = val; 23913 val = 0; 23914 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, 23915 &val); 23916 23917 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, 23918 &val); 23919 pi->tx_rx_cal_phy_saveregs[6] = val; 23920 val = 0; 23921 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, 23922 &val); 23923 23924 pi->tx_rx_cal_phy_saveregs[7] = read_phy_reg(pi, 0x91); 23925 pi->tx_rx_cal_phy_saveregs[8] = read_phy_reg(pi, 0x92); 23926 23927 if (!(pi->use_int_tx_iqlo_cal_nphy)) 23928 wlc_phy_rfctrlintc_override_nphy( 23929 pi, 23930 NPHY_RfctrlIntc_override_PA, 23931 1, 23932 RADIO_MIMO_CORESEL_CORE1 23933 | 23934 RADIO_MIMO_CORESEL_CORE2); 23935 else 23936 wlc_phy_rfctrlintc_override_nphy( 23937 pi, 23938 NPHY_RfctrlIntc_override_PA, 23939 0, 23940 RADIO_MIMO_CORESEL_CORE1 23941 | 23942 RADIO_MIMO_CORESEL_CORE2); 23943 23944 wlc_phy_rfctrlintc_override_nphy(pi, 23945 NPHY_RfctrlIntc_override_TRSW, 23946 0x2, RADIO_MIMO_CORESEL_CORE1); 23947 wlc_phy_rfctrlintc_override_nphy(pi, 23948 NPHY_RfctrlIntc_override_TRSW, 23949 0x8, RADIO_MIMO_CORESEL_CORE2); 23950 23951 pi->tx_rx_cal_phy_saveregs[9] = read_phy_reg(pi, 0x297); 23952 pi->tx_rx_cal_phy_saveregs[10] = read_phy_reg(pi, 0x29b); 23953 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 23954 0x29b, (0x1 << 0), (0) << 0); 23955 23956 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 23957 0x29b, (0x1 << 0), (0) << 0); 23958 23959 if (NREV_IS(pi->pubpi.phy_rev, 7) 23960 || NREV_GE(pi->pubpi.phy_rev, 8)) 23961 wlc_phy_rfctrl_override_nphy_rev7( 23962 pi, (0x1 << 7), 23963 wlc_phy_read_lpf_bw_ctl_nphy 23964 (pi, 23965 0), 0, 0, 23966 NPHY_REV7_RFCTRLOVERRIDE_ID1); 23967 23968 if (pi->use_int_tx_iqlo_cal_nphy 23969 && !(pi->internal_tx_iqlo_cal_tapoff_intpa_nphy)) { 23970 23971 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 23972 23973 mod_radio_reg(pi, RADIO_2057_OVR_REG0, 1 << 4, 23974 1 << 4); 23975 23976 if (CHSPEC_IS2G(pi->radio_chanspec)) { 23977 mod_radio_reg( 23978 pi, 23979 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 23980 1, 0); 23981 mod_radio_reg( 23982 pi, 23983 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 23984 1, 0); 23985 } else { 23986 mod_radio_reg( 23987 pi, 23988 RADIO_2057_IPA5G_CASCOFFV_PU_CORE0, 23989 1, 0); 23990 mod_radio_reg( 23991 pi, 23992 RADIO_2057_IPA5G_CASCOFFV_PU_CORE1, 23993 1, 0); 23994 } 23995 } else if (NREV_GE(pi->pubpi.phy_rev, 8)) { 23996 wlc_phy_rfctrl_override_nphy_rev7( 23997 pi, 23998 (0x1 << 3), 0, 23999 0x3, 0, 24000 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24001 } 24002 } 24003 } else { 24004 pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa6); 24005 pi->tx_rx_cal_phy_saveregs[1] = read_phy_reg(pi, 0xa7); 24006 24007 mask = ((0x3 << 12) | (0x3 << 14)); 24008 val = (0x2 << 12); 24009 val |= (0x2 << 14); 24010 mod_phy_reg(pi, 0xa6, mask, val); 24011 mod_phy_reg(pi, 0xa7, mask, val); 24012 24013 val = read_phy_reg(pi, 0xa5); 24014 pi->tx_rx_cal_phy_saveregs[2] = val; 24015 val |= ((0x1 << 12) | (0x1 << 13)); 24016 write_phy_reg(pi, 0xa5, val); 24017 24018 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, 24019 &val); 24020 pi->tx_rx_cal_phy_saveregs[3] = val; 24021 val |= 0x2000; 24022 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, 24023 &val); 24024 24025 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, 24026 &val); 24027 pi->tx_rx_cal_phy_saveregs[4] = val; 24028 val |= 0x2000; 24029 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, 24030 &val); 24031 24032 pi->tx_rx_cal_phy_saveregs[5] = read_phy_reg(pi, 0x91); 24033 pi->tx_rx_cal_phy_saveregs[6] = read_phy_reg(pi, 0x92); 24034 val = CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : 0x120; 24035 write_phy_reg(pi, 0x91, val); 24036 write_phy_reg(pi, 0x92, val); 24037 } 24038 } 24039 24040 static void wlc_phy_txcal_phycleanup_nphy(struct brcms_phy *pi) 24041 { 24042 u16 mask; 24043 24044 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 24045 write_phy_reg(pi, 0xa6, pi->tx_rx_cal_phy_saveregs[0]); 24046 write_phy_reg(pi, 0xa7, pi->tx_rx_cal_phy_saveregs[1]); 24047 write_phy_reg(pi, 0x8f, pi->tx_rx_cal_phy_saveregs[2]); 24048 write_phy_reg(pi, 0xa5, pi->tx_rx_cal_phy_saveregs[3]); 24049 write_phy_reg(pi, 0x01, pi->tx_rx_cal_phy_saveregs[4]); 24050 24051 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, 24052 &pi->tx_rx_cal_phy_saveregs[5]); 24053 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, 24054 &pi->tx_rx_cal_phy_saveregs[6]); 24055 24056 write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[7]); 24057 write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[8]); 24058 24059 write_phy_reg(pi, 0x297, pi->tx_rx_cal_phy_saveregs[9]); 24060 write_phy_reg(pi, 0x29b, pi->tx_rx_cal_phy_saveregs[10]); 24061 24062 if (NREV_IS(pi->pubpi.phy_rev, 7) 24063 || NREV_GE(pi->pubpi.phy_rev, 8)) 24064 wlc_phy_rfctrl_override_nphy_rev7( 24065 pi, (0x1 << 7), 0, 0, 24066 1, 24067 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24068 24069 wlc_phy_resetcca_nphy(pi); 24070 24071 if (pi->use_int_tx_iqlo_cal_nphy 24072 && !(pi->internal_tx_iqlo_cal_tapoff_intpa_nphy)) { 24073 24074 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 24075 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24076 mod_radio_reg( 24077 pi, 24078 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 24079 1, 1); 24080 mod_radio_reg( 24081 pi, 24082 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 24083 1, 1); 24084 } else { 24085 mod_radio_reg( 24086 pi, 24087 RADIO_2057_IPA5G_CASCOFFV_PU_CORE0, 24088 1, 1); 24089 mod_radio_reg( 24090 pi, 24091 RADIO_2057_IPA5G_CASCOFFV_PU_CORE1, 24092 1, 1); 24093 } 24094 24095 mod_radio_reg(pi, RADIO_2057_OVR_REG0, 1 << 4, 24096 0); 24097 } else if (NREV_GE(pi->pubpi.phy_rev, 8)) { 24098 wlc_phy_rfctrl_override_nphy_rev7( 24099 pi, 24100 (0x1 << 3), 0, 24101 0x3, 1, 24102 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24103 } 24104 } 24105 } else { 24106 mask = ((0x3 << 12) | (0x3 << 14)); 24107 mod_phy_reg(pi, 0xa6, mask, pi->tx_rx_cal_phy_saveregs[0]); 24108 mod_phy_reg(pi, 0xa7, mask, pi->tx_rx_cal_phy_saveregs[1]); 24109 write_phy_reg(pi, 0xa5, pi->tx_rx_cal_phy_saveregs[2]); 24110 24111 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, 24112 &pi->tx_rx_cal_phy_saveregs[3]); 24113 24114 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, 24115 &pi->tx_rx_cal_phy_saveregs[4]); 24116 24117 write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[5]); 24118 write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[6]); 24119 } 24120 } 24121 24122 void 24123 wlc_phy_est_tonepwr_nphy(struct brcms_phy *pi, s32 *qdBm_pwrbuf, u8 num_samps) 24124 { 24125 u16 tssi_reg; 24126 s32 temp, pwrindex[2]; 24127 s32 idle_tssi[2]; 24128 s32 rssi_buf[4]; 24129 s32 tssival[2]; 24130 u8 tssi_type; 24131 24132 tssi_reg = read_phy_reg(pi, 0x1e9); 24133 24134 temp = (s32) (tssi_reg & 0x3f); 24135 idle_tssi[0] = (temp <= 31) ? temp : (temp - 64); 24136 24137 temp = (s32) ((tssi_reg >> 8) & 0x3f); 24138 idle_tssi[1] = (temp <= 31) ? temp : (temp - 64); 24139 24140 tssi_type = 24141 CHSPEC_IS5G(pi->radio_chanspec) ? 24142 (u8)NPHY_RSSI_SEL_TSSI_5G : (u8)NPHY_RSSI_SEL_TSSI_2G; 24143 24144 wlc_phy_poll_rssi_nphy(pi, tssi_type, rssi_buf, num_samps); 24145 24146 tssival[0] = rssi_buf[0] / ((s32) num_samps); 24147 tssival[1] = rssi_buf[2] / ((s32) num_samps); 24148 24149 pwrindex[0] = idle_tssi[0] - tssival[0] + 64; 24150 pwrindex[1] = idle_tssi[1] - tssival[1] + 64; 24151 24152 if (pwrindex[0] < 0) 24153 pwrindex[0] = 0; 24154 else if (pwrindex[0] > 63) 24155 pwrindex[0] = 63; 24156 24157 if (pwrindex[1] < 0) 24158 pwrindex[1] = 0; 24159 else if (pwrindex[1] > 63) 24160 pwrindex[1] = 63; 24161 24162 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 1, 24163 (u32) pwrindex[0], 32, &qdBm_pwrbuf[0]); 24164 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 1, 24165 (u32) pwrindex[1], 32, &qdBm_pwrbuf[1]); 24166 } 24167 24168 static void wlc_phy_update_txcal_ladder_nphy(struct brcms_phy *pi, u16 core) 24169 { 24170 int index; 24171 u32 bbmult_scale; 24172 u16 bbmult; 24173 u16 tblentry; 24174 24175 static const struct nphy_txiqcal_ladder ladder_lo[] = { 24176 {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, 24177 {25, 0}, {25, 1}, {25, 2}, {25, 3}, {25, 4}, {25, 5}, 24178 {25, 6}, {25, 7}, {35, 7}, {50, 7}, {71, 7}, {100, 7} 24179 }; 24180 24181 static const struct nphy_txiqcal_ladder ladder_iq[] = { 24182 {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, 24183 {25, 0}, {35, 0}, {50, 0}, {71, 0}, {100, 0}, {100, 1}, 24184 {100, 2}, {100, 3}, {100, 4}, {100, 5}, {100, 6}, {100, 7} 24185 }; 24186 24187 bbmult = (core == PHY_CORE_0) ? 24188 ((pi->nphy_txcal_bbmult >> 8) & 0xff) : 24189 (pi->nphy_txcal_bbmult & 0xff); 24190 24191 for (index = 0; index < 18; index++) { 24192 bbmult_scale = ladder_lo[index].percent * bbmult; 24193 bbmult_scale /= 100; 24194 24195 tblentry = 24196 ((bbmult_scale & 0xff) << 8) | ladder_lo[index].g_env; 24197 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, index, 16, 24198 &tblentry); 24199 24200 bbmult_scale = ladder_iq[index].percent * bbmult; 24201 bbmult_scale /= 100; 24202 24203 tblentry = 24204 ((bbmult_scale & 0xff) << 8) | ladder_iq[index].g_env; 24205 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, index + 32, 24206 16, &tblentry); 24207 } 24208 } 24209 24210 static u8 wlc_phy_txpwr_idx_cur_get_nphy(struct brcms_phy *pi, u8 core) 24211 { 24212 u16 tmp; 24213 tmp = read_phy_reg(pi, ((core == PHY_CORE_0) ? 0x1ed : 0x1ee)); 24214 24215 tmp = (tmp & (0x7f << 8)) >> 8; 24216 return (u8) tmp; 24217 } 24218 24219 static void 24220 wlc_phy_txpwr_idx_cur_set_nphy(struct brcms_phy *pi, u8 idx0, u8 idx1) 24221 { 24222 mod_phy_reg(pi, 0x1e7, (0x7f << 0), idx0); 24223 24224 if (NREV_GT(pi->pubpi.phy_rev, 1)) 24225 mod_phy_reg(pi, 0x222, (0xff << 0), idx1); 24226 } 24227 24228 static u16 wlc_phy_ipa_get_bbmult_nphy(struct brcms_phy *pi) 24229 { 24230 u16 m0m1; 24231 24232 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m0m1); 24233 24234 return m0m1; 24235 } 24236 24237 static void wlc_phy_ipa_set_bbmult_nphy(struct brcms_phy *pi, u8 m0, u8 m1) 24238 { 24239 u16 m0m1 = (u16) ((m0 << 8) | m1); 24240 24241 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m0m1); 24242 wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &m0m1); 24243 } 24244 24245 static void 24246 wlc_phy_papd_cal_setup_nphy(struct brcms_phy *pi, 24247 struct nphy_papd_restore_state *state, u8 core) 24248 { 24249 s32 tone_freq; 24250 u8 off_core; 24251 u16 mixgain = 0; 24252 24253 off_core = core ^ 0x1; 24254 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24255 24256 if (NREV_IS(pi->pubpi.phy_rev, 7) 24257 || NREV_GE(pi->pubpi.phy_rev, 8)) 24258 wlc_phy_rfctrl_override_nphy_rev7( 24259 pi, (0x1 << 7), 24260 wlc_phy_read_lpf_bw_ctl_nphy 24261 (pi, 24262 0), 0, 0, 24263 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24264 24265 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24266 if (pi->pubpi.radiorev == 5) 24267 mixgain = (core == 0) ? 0x20 : 0x00; 24268 else if ((pi->pubpi.radiorev == 7) 24269 || (pi->pubpi.radiorev == 8)) 24270 mixgain = 0x00; 24271 else if ((pi->pubpi.radiorev <= 4) 24272 || (pi->pubpi.radiorev == 6)) 24273 mixgain = 0x00; 24274 } else { 24275 if ((pi->pubpi.radiorev == 4) || 24276 (pi->pubpi.radiorev == 6)) 24277 mixgain = 0x50; 24278 else if ((pi->pubpi.radiorev == 3) 24279 || (pi->pubpi.radiorev == 7) 24280 || (pi->pubpi.radiorev == 8)) 24281 mixgain = 0x0; 24282 } 24283 24284 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 24285 mixgain, (1 << core), 0, 24286 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24287 24288 wlc_phy_rfctrl_override_1tomany_nphy( 24289 pi, 24290 NPHY_REV7_RfctrlOverride_cmd_tx_pu, 24291 1, (1 << core), 0); 24292 wlc_phy_rfctrl_override_1tomany_nphy( 24293 pi, 24294 NPHY_REV7_RfctrlOverride_cmd_tx_pu, 24295 0, (1 << off_core), 0); 24296 24297 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24298 0, 0x3, 0, 24299 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24300 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 24301 (1 << core), 0, 24302 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24303 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 24304 (1 << core), 0, 24305 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24306 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 24307 (1 << core), 0, 24308 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24309 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 8), 0, 24310 (1 << core), 0, 24311 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24312 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 1, 24313 (1 << core), 0, 24314 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24315 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 0, 24316 (1 << core), 0, 24317 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24318 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 1, 24319 (1 << core), 0, 24320 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24321 24322 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 24323 0, (1 << core), 0, 24324 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24325 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 0, 24326 (1 << core), 0, 24327 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24328 24329 state->afectrl[core] = read_phy_reg(pi, (core == PHY_CORE_0) ? 24330 0xa6 : 0xa7); 24331 state->afeoverride[core] = 24332 read_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 0xa5); 24333 state->afectrl[off_core] = 24334 read_phy_reg(pi, (core == PHY_CORE_0) ? 0xa7 : 0xa6); 24335 state->afeoverride[off_core] = 24336 read_phy_reg(pi, (core == PHY_CORE_0) ? 0xa5 : 0x8f); 24337 24338 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa6 : 0xa7), 24339 (0x1 << 2), 0); 24340 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 24341 0xa5), (0x1 << 2), (0x1 << 2)); 24342 24343 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa7 : 0xa6), 24344 (0x1 << 2), (0x1 << 2)); 24345 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa5 : 24346 0x8f), (0x1 << 2), (0x1 << 2)); 24347 24348 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24349 state->pwrup[core] = 24350 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24351 TXRXCOUPLE_2G_PWRUP); 24352 state->atten[core] = 24353 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24354 TXRXCOUPLE_2G_ATTEN); 24355 state->pwrup[off_core] = 24356 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24357 TXRXCOUPLE_2G_PWRUP); 24358 state->atten[off_core] = 24359 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24360 TXRXCOUPLE_2G_ATTEN); 24361 24362 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24363 TXRXCOUPLE_2G_PWRUP, 0xc); 24364 24365 if ((pi->pubpi.radiorev == 3) || 24366 (pi->pubpi.radiorev == 4) || 24367 (pi->pubpi.radiorev == 6)) 24368 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24369 TXRXCOUPLE_2G_ATTEN, 0xf0); 24370 else if (pi->pubpi.radiorev == 5) 24371 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24372 TXRXCOUPLE_2G_ATTEN, 24373 (core == 0) ? 0xf7 : 0xf2); 24374 else if ((pi->pubpi.radiorev == 7) 24375 || (pi->pubpi.radiorev == 8)) 24376 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24377 TXRXCOUPLE_2G_ATTEN, 0xf0); 24378 24379 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24380 TXRXCOUPLE_2G_PWRUP, 0x0); 24381 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24382 TXRXCOUPLE_2G_ATTEN, 0xff); 24383 } else { 24384 state->pwrup[core] = 24385 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24386 TXRXCOUPLE_5G_PWRUP); 24387 state->atten[core] = 24388 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24389 TXRXCOUPLE_5G_ATTEN); 24390 state->pwrup[off_core] = 24391 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24392 TXRXCOUPLE_5G_PWRUP); 24393 state->atten[off_core] = 24394 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24395 TXRXCOUPLE_5G_ATTEN); 24396 24397 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24398 TXRXCOUPLE_5G_PWRUP, 0xc); 24399 24400 if ((pi->pubpi.radiorev == 7) 24401 || (pi->pubpi.radiorev == 8)) 24402 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24403 TXRXCOUPLE_5G_ATTEN, 0xf4); 24404 24405 else 24406 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24407 TXRXCOUPLE_5G_ATTEN, 0xf0); 24408 24409 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24410 TXRXCOUPLE_5G_PWRUP, 0x0); 24411 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24412 TXRXCOUPLE_5G_ATTEN, 0xff); 24413 } 24414 24415 tone_freq = 4000; 24416 24417 wlc_phy_tx_tone_nphy(pi, tone_freq, 181, 0, 0, false); 24418 24419 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24420 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); 24421 24422 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24423 0x2a4, (0x1 << 13), (1) << 13); 24424 24425 mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x297 : 24426 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_OFF) << 0); 24427 24428 mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x2a3 : 24429 0x2a4, (0x1 << 13), (0) << 13); 24430 24431 } else { 24432 24433 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 0); 24434 24435 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 1, 0, 0); 24436 24437 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0x3, 0); 24438 24439 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 2), 1, 0x3, 0); 24440 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 1, 0x3, 0); 24441 24442 state->afectrl[core] = read_phy_reg(pi, (core == PHY_CORE_0) ? 24443 0xa6 : 0xa7); 24444 state->afeoverride[core] = 24445 read_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 0xa5); 24446 24447 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa6 : 0xa7), 24448 (0x1 << 0) | (0x1 << 1) | (0x1 << 2), 0); 24449 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 24450 0xa5), 24451 (0x1 << 0) | 24452 (0x1 << 1) | 24453 (0x1 << 2), (0x1 << 0) | (0x1 << 1) | (0x1 << 2)); 24454 24455 state->vga_master[core] = 24456 READ_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER); 24457 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER, 0x2b); 24458 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24459 state->fbmix[core] = 24460 READ_RADIO_REG2(pi, RADIO_2056, RX, core, 24461 TXFBMIX_G); 24462 state->intpa_master[core] = 24463 READ_RADIO_REG2(pi, RADIO_2056, TX, core, 24464 INTPAG_MASTER); 24465 24466 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, TXFBMIX_G, 24467 0x03); 24468 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24469 INTPAG_MASTER, 0x04); 24470 } else { 24471 state->fbmix[core] = 24472 READ_RADIO_REG2(pi, RADIO_2056, RX, core, 24473 TXFBMIX_A); 24474 state->intpa_master[core] = 24475 READ_RADIO_REG2(pi, RADIO_2056, TX, core, 24476 INTPAA_MASTER); 24477 24478 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, TXFBMIX_A, 24479 0x03); 24480 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24481 INTPAA_MASTER, 0x04); 24482 24483 } 24484 24485 tone_freq = 4000; 24486 24487 wlc_phy_tx_tone_nphy(pi, tone_freq, 181, 0, 0, false); 24488 24489 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24490 0x29b, (0x1 << 0), (1) << 0); 24491 24492 mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x297 : 24493 0x29b, (0x1 << 0), (0) << 0); 24494 24495 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 0); 24496 } 24497 } 24498 24499 static void 24500 wlc_phy_papd_cal_cleanup_nphy(struct brcms_phy *pi, 24501 struct nphy_papd_restore_state *state) 24502 { 24503 u8 core; 24504 24505 wlc_phy_stopplayback_nphy(pi); 24506 24507 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24508 24509 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 24510 24511 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24512 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24513 TXRXCOUPLE_2G_PWRUP, 0); 24514 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24515 TXRXCOUPLE_2G_ATTEN, 24516 state->atten[core]); 24517 } else { 24518 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24519 TXRXCOUPLE_5G_PWRUP, 0); 24520 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24521 TXRXCOUPLE_5G_ATTEN, 24522 state->atten[core]); 24523 } 24524 } 24525 24526 if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6)) 24527 wlc_phy_rfctrl_override_nphy_rev7( 24528 pi, (0x1 << 2), 24529 1, 0x3, 0, 24530 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24531 else 24532 wlc_phy_rfctrl_override_nphy_rev7( 24533 pi, (0x1 << 2), 24534 0, 0x3, 1, 24535 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24536 24537 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 24538 0, 0x3, 1, 24539 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24540 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 0x3, 1, 24541 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24542 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 0, 0x3, 1, 24543 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24544 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 1, 0x3, 1, 24545 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24546 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 0, 0x3, 1, 24547 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24548 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, 0x3, 1, 24549 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24550 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 0, 0x3, 1, 24551 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24552 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 0x3, 1, 24553 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24554 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 0x3, 1, 24555 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24556 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 0x3, 1, 24557 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24558 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 8), 0, 0x3, 1, 24559 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24560 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 1, 0x3, 1, 24561 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24562 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 0, 0x3, 1, 24563 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24564 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 1, 0x3, 1, 24565 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24566 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 0, 0x3, 1, 24567 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24568 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 0, 0x3, 1, 24569 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24570 24571 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 24572 24573 write_phy_reg(pi, (core == PHY_CORE_0) ? 24574 0xa6 : 0xa7, state->afectrl[core]); 24575 write_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 24576 0xa5, state->afeoverride[core]); 24577 } 24578 24579 wlc_phy_ipa_set_bbmult_nphy(pi, (state->mm >> 8) & 0xff, 24580 (state->mm & 0xff)); 24581 24582 if (NREV_IS(pi->pubpi.phy_rev, 7) 24583 || NREV_GE(pi->pubpi.phy_rev, 8)) 24584 wlc_phy_rfctrl_override_nphy_rev7( 24585 pi, (0x1 << 7), 0, 0, 24586 1, 24587 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24588 } else { 24589 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 1); 24590 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 0x3, 1); 24591 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0x3, 1); 24592 24593 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 2), 0, 0x3, 1); 24594 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 0, 0x3, 1); 24595 24596 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 24597 24598 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER, 24599 state->vga_master[core]); 24600 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24601 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, 24602 TXFBMIX_G, state->fbmix[core]); 24603 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24604 INTPAG_MASTER, 24605 state->intpa_master[core]); 24606 } else { 24607 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, 24608 TXFBMIX_A, state->fbmix[core]); 24609 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24610 INTPAA_MASTER, 24611 state->intpa_master[core]); 24612 } 24613 24614 write_phy_reg(pi, (core == PHY_CORE_0) ? 24615 0xa6 : 0xa7, state->afectrl[core]); 24616 write_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 24617 0xa5, state->afeoverride[core]); 24618 } 24619 24620 wlc_phy_ipa_set_bbmult_nphy(pi, (state->mm >> 8) & 0xff, 24621 (state->mm & 0xff)); 24622 24623 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 1); 24624 } 24625 } 24626 24627 static void 24628 wlc_phy_a1_nphy(struct brcms_phy *pi, u8 core, u32 winsz, u32 start, 24629 u32 end) 24630 { 24631 u32 *buf, *src, *dst, sz; 24632 24633 sz = end - start + 1; 24634 24635 buf = kmalloc(2 * sizeof(u32) * NPHY_PAPD_EPS_TBL_SIZE, GFP_ATOMIC); 24636 if (NULL == buf) 24637 return; 24638 24639 src = buf; 24640 dst = buf + NPHY_PAPD_EPS_TBL_SIZE; 24641 24642 wlc_phy_table_read_nphy(pi, 24643 (core == 24644 PHY_CORE_0 ? NPHY_TBL_ID_EPSILONTBL0 : 24645 NPHY_TBL_ID_EPSILONTBL1), 24646 NPHY_PAPD_EPS_TBL_SIZE, 0, 32, src); 24647 24648 do { 24649 u32 phy_a1, phy_a2; 24650 s32 phy_a3, phy_a4, phy_a5, phy_a6, phy_a7; 24651 24652 phy_a1 = end - min(end, (winsz >> 1)); 24653 phy_a2 = min_t(u32, NPHY_PAPD_EPS_TBL_SIZE - 1, 24654 end + (winsz >> 1)); 24655 phy_a3 = phy_a2 - phy_a1 + 1; 24656 phy_a6 = 0; 24657 phy_a7 = 0; 24658 24659 do { 24660 wlc_phy_papd_decode_epsilon(src[phy_a2], &phy_a4, 24661 &phy_a5); 24662 phy_a6 += phy_a4; 24663 phy_a7 += phy_a5; 24664 } while (phy_a2-- != phy_a1); 24665 24666 phy_a6 /= phy_a3; 24667 phy_a7 /= phy_a3; 24668 dst[end] = ((u32) phy_a7 << 13) | ((u32) phy_a6 & 0x1fff); 24669 } while (end-- != start); 24670 24671 wlc_phy_table_write_nphy(pi, 24672 (core == 24673 PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 : 24674 NPHY_TBL_ID_EPSILONTBL1, sz, start, 32, dst); 24675 24676 kfree(buf); 24677 } 24678 24679 static void 24680 wlc_phy_a2_nphy(struct brcms_phy *pi, struct nphy_ipa_txcalgains *txgains, 24681 enum phy_cal_mode cal_mode, u8 core) 24682 { 24683 u16 phy_a1, phy_a2, phy_a3; 24684 u16 phy_a4, phy_a5; 24685 u8 phy_a7, m[2]; 24686 u32 phy_a8 = 0; 24687 struct nphy_txgains phy_a9; 24688 24689 if (NREV_LT(pi->pubpi.phy_rev, 3)) 24690 return; 24691 24692 phy_a7 = (core == PHY_CORE_0) ? 1 : 0; 24693 24694 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24695 24696 phy_a9 = wlc_phy_get_tx_gain_nphy(pi); 24697 24698 if (CHSPEC_IS2G(pi->radio_chanspec)) 24699 phy_a5 = ((phy_a9.txlpf[core] << 15) | 24700 (phy_a9.txgm[core] << 12) | 24701 (phy_a9.pga[core] << 8) | 24702 (txgains->gains.pad[core] << 3) | 24703 (phy_a9.ipa[core])); 24704 else 24705 phy_a5 = ((phy_a9.txlpf[core] << 15) | 24706 (phy_a9.txgm[core] << 12) | 24707 (txgains->gains.pga[core] << 8) | 24708 (phy_a9.pad[core] << 3) | (phy_a9.ipa[core])); 24709 24710 wlc_phy_rfctrl_override_1tomany_nphy( 24711 pi, 24712 NPHY_REV7_RfctrlOverride_cmd_txgain, 24713 phy_a5, (1 << core), 0); 24714 24715 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24716 if ((pi->pubpi.radiorev <= 4) 24717 || (pi->pubpi.radiorev == 6)) 24718 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 24719 60 : 79; 24720 else 24721 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 24722 45 : 64; 24723 } else { 24724 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 75 : 107; 24725 } 24726 24727 m[phy_a7] = 0; 24728 wlc_phy_ipa_set_bbmult_nphy(pi, m[0], m[1]); 24729 24730 phy_a2 = 63; 24731 24732 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24733 if ((pi->pubpi.radiorev == 4) 24734 || (pi->pubpi.radiorev == 6)) { 24735 phy_a1 = 30; 24736 phy_a3 = 30; 24737 } else { 24738 phy_a1 = 25; 24739 phy_a3 = 25; 24740 } 24741 } else { 24742 if ((pi->pubpi.radiorev == 5) 24743 || (pi->pubpi.radiorev == 7) 24744 || (pi->pubpi.radiorev == 8)) { 24745 phy_a1 = 25; 24746 phy_a3 = 25; 24747 } else { 24748 phy_a1 = 35; 24749 phy_a3 = 35; 24750 } 24751 } 24752 24753 if (cal_mode == CAL_GCTRL) { 24754 if ((pi->pubpi.radiorev == 5) 24755 && (CHSPEC_IS2G(pi->radio_chanspec))) 24756 phy_a1 = 55; 24757 else if (((pi->pubpi.radiorev == 7) && 24758 (CHSPEC_IS2G(pi->radio_chanspec))) || 24759 ((pi->pubpi.radiorev == 8) && 24760 (CHSPEC_IS2G(pi->radio_chanspec)))) 24761 phy_a1 = 60; 24762 else 24763 phy_a1 = 63; 24764 24765 } else if ((cal_mode != CAL_FULL) && (cal_mode != CAL_SOFT)) { 24766 24767 phy_a1 = 35; 24768 phy_a3 = 35; 24769 } 24770 24771 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24772 0x29b, (0x1 << 0), (1) << 0); 24773 24774 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x297 : 24775 0x29b, (0x1 << 0), (0) << 0); 24776 24777 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24778 0x2a4, (0x1 << 13), (1) << 13); 24779 24780 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : 24781 0x2a4, (0x1 << 13), (0) << 13); 24782 24783 write_phy_reg(pi, 0x2a1, 0x80); 24784 write_phy_reg(pi, 0x2a2, 0x100); 24785 24786 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24787 0x2a4, (0x7 << 4), (11) << 4); 24788 24789 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24790 0x2a4, (0x7 << 8), (11) << 8); 24791 24792 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24793 0x2a4, (0x7 << 0), (0x3) << 0); 24794 24795 write_phy_reg(pi, 0x2e5, 0x20); 24796 24797 mod_phy_reg(pi, 0x2a0, (0x3f << 0), (phy_a3) << 0); 24798 24799 mod_phy_reg(pi, 0x29f, (0x3f << 0), (phy_a1) << 0); 24800 24801 mod_phy_reg(pi, 0x29f, (0x3f << 8), (phy_a2) << 8); 24802 24803 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24804 1, ((core == 0) ? 1 : 2), 0, 24805 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24806 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24807 0, ((core == 0) ? 2 : 1), 0, 24808 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24809 24810 write_phy_reg(pi, 0x2be, 1); 24811 SPINWAIT(read_phy_reg(pi, 0x2be), 10 * 1000 * 1000); 24812 24813 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24814 0, 0x3, 0, 24815 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24816 24817 wlc_phy_table_write_nphy(pi, 24818 (core == 24819 PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 24820 : NPHY_TBL_ID_EPSILONTBL1, 1, phy_a3, 24821 32, &phy_a8); 24822 24823 if (cal_mode != CAL_GCTRL) { 24824 if (CHSPEC_IS5G(pi->radio_chanspec)) 24825 wlc_phy_a1_nphy(pi, core, 5, 0, 35); 24826 } 24827 24828 wlc_phy_rfctrl_override_1tomany_nphy( 24829 pi, 24830 NPHY_REV7_RfctrlOverride_cmd_txgain, 24831 phy_a5, (1 << core), 1); 24832 24833 } else { 24834 24835 if (txgains) { 24836 if (txgains->useindex) { 24837 phy_a4 = 15 - ((txgains->index) >> 3); 24838 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24839 if (NREV_GE(pi->pubpi.phy_rev, 6) && 24840 pi->sh->chip == BCMA_CHIP_ID_BCM47162) { 24841 phy_a5 = 0x10f7 | (phy_a4 << 8); 24842 } else if (NREV_GE(pi->pubpi.phy_rev, 6)) { 24843 phy_a5 = 0x00f7 | (phy_a4 << 8); 24844 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 24845 phy_a5 = 0x10f7 | (phy_a4 << 8); 24846 } else { 24847 phy_a5 = 0x50f7 | (phy_a4 << 8); 24848 } 24849 } else { 24850 phy_a5 = 0x70f7 | (phy_a4 << 8); 24851 } 24852 wlc_phy_rfctrl_override_nphy(pi, 24853 (0x1 << 13), 24854 phy_a5, 24855 (1 << core), 0); 24856 } else { 24857 wlc_phy_rfctrl_override_nphy(pi, 24858 (0x1 << 13), 24859 0x5bf7, 24860 (1 << core), 0); 24861 } 24862 } 24863 24864 if (CHSPEC_IS2G(pi->radio_chanspec)) 24865 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 45 : 64; 24866 else 24867 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 75 : 107; 24868 24869 m[phy_a7] = 0; 24870 wlc_phy_ipa_set_bbmult_nphy(pi, m[0], m[1]); 24871 24872 phy_a2 = 63; 24873 24874 if (cal_mode == CAL_FULL) { 24875 phy_a1 = 25; 24876 phy_a3 = 25; 24877 } else if (cal_mode == CAL_SOFT) { 24878 phy_a1 = 25; 24879 phy_a3 = 25; 24880 } else if (cal_mode == CAL_GCTRL) { 24881 phy_a1 = 63; 24882 phy_a3 = 25; 24883 } else { 24884 24885 phy_a1 = 25; 24886 phy_a3 = 25; 24887 } 24888 24889 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24890 0x29b, (0x1 << 0), (1) << 0); 24891 24892 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x297 : 24893 0x29b, (0x1 << 0), (0) << 0); 24894 24895 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 24896 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24897 0x2a4, (0x1 << 13), (1) << 13); 24898 24899 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : 24900 0x2a4, (0x1 << 13), (0) << 13); 24901 24902 write_phy_reg(pi, 0x2a1, 0x20); 24903 write_phy_reg(pi, 0x2a2, 0x60); 24904 24905 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24906 0x2a4, (0xf << 4), (9) << 4); 24907 24908 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24909 0x2a4, (0xf << 8), (9) << 8); 24910 24911 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24912 0x2a4, (0xf << 0), (0x2) << 0); 24913 24914 write_phy_reg(pi, 0x2e5, 0x20); 24915 } else { 24916 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24917 0x2a4, (0x1 << 11), (1) << 11); 24918 24919 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : 24920 0x2a4, (0x1 << 11), (0) << 11); 24921 24922 write_phy_reg(pi, 0x2a1, 0x80); 24923 write_phy_reg(pi, 0x2a2, 0x600); 24924 24925 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24926 0x2a4, (0x7 << 4), (0) << 4); 24927 24928 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24929 0x2a4, (0x7 << 8), (0) << 8); 24930 24931 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24932 0x2a4, (0x7 << 0), (0x3) << 0); 24933 24934 mod_phy_reg(pi, 0x2a0, (0x3f << 8), (0x20) << 8); 24935 24936 } 24937 24938 mod_phy_reg(pi, 0x2a0, (0x3f << 0), (phy_a3) << 0); 24939 24940 mod_phy_reg(pi, 0x29f, (0x3f << 0), (phy_a1) << 0); 24941 24942 mod_phy_reg(pi, 0x29f, (0x3f << 8), (phy_a2) << 8); 24943 24944 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 1, 0x3, 0); 24945 24946 write_phy_reg(pi, 0x2be, 1); 24947 SPINWAIT(read_phy_reg(pi, 0x2be), 10 * 1000 * 1000); 24948 24949 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 0); 24950 24951 wlc_phy_table_write_nphy(pi, 24952 (core == 24953 PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 24954 : NPHY_TBL_ID_EPSILONTBL1, 1, phy_a3, 24955 32, &phy_a8); 24956 24957 if (cal_mode != CAL_GCTRL) 24958 wlc_phy_a1_nphy(pi, core, 5, 0, 40); 24959 } 24960 } 24961 24962 static u8 wlc_phy_a3_nphy(struct brcms_phy *pi, u8 start_gain, u8 core) 24963 { 24964 int phy_a1; 24965 int phy_a2; 24966 bool phy_a3; 24967 struct nphy_ipa_txcalgains phy_a4; 24968 bool phy_a5 = false; 24969 bool phy_a6 = true; 24970 s32 phy_a7, phy_a8; 24971 u32 phy_a9; 24972 int phy_a10; 24973 int phy_a12; 24974 u8 phy_a13 = 0; 24975 u8 phy_a14; 24976 u8 *phy_a15 = NULL; 24977 24978 phy_a4.useindex = true; 24979 phy_a12 = start_gain; 24980 24981 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24982 24983 phy_a2 = 20; 24984 phy_a1 = 1; 24985 24986 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24987 if (pi->pubpi.radiorev == 5) { 24988 24989 phy_a15 = pad_gain_codes_used_2057rev5; 24990 phy_a13 = 24991 ARRAY_SIZE(pad_gain_codes_used_2057rev5) - 1; 24992 24993 } else if ((pi->pubpi.radiorev == 7) 24994 || (pi->pubpi.radiorev == 8)) { 24995 24996 phy_a15 = pad_gain_codes_used_2057rev7; 24997 phy_a13 = 24998 ARRAY_SIZE(pad_gain_codes_used_2057rev7) - 1; 24999 25000 } else { 25001 25002 phy_a15 = pad_all_gain_codes_2057; 25003 phy_a13 = ARRAY_SIZE(pad_all_gain_codes_2057) - 25004 1; 25005 } 25006 25007 } else { 25008 25009 phy_a15 = pga_all_gain_codes_2057; 25010 phy_a13 = ARRAY_SIZE(pga_all_gain_codes_2057) - 1; 25011 } 25012 25013 phy_a14 = 0; 25014 25015 for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { 25016 if (CHSPEC_IS2G(pi->radio_chanspec)) 25017 phy_a4.gains.pad[core] = 25018 (u16) phy_a15[phy_a12]; 25019 else 25020 phy_a4.gains.pga[core] = 25021 (u16) phy_a15[phy_a12]; 25022 25023 wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); 25024 25025 wlc_phy_table_read_nphy(pi, 25026 (core == 25027 PHY_CORE_0 ? 25028 NPHY_TBL_ID_EPSILONTBL0 : 25029 NPHY_TBL_ID_EPSILONTBL1), 1, 25030 63, 32, &phy_a9); 25031 25032 wlc_phy_papd_decode_epsilon(phy_a9, &phy_a7, &phy_a8); 25033 25034 phy_a3 = ((phy_a7 == 4095) || (phy_a7 == -4096) || 25035 (phy_a8 == 4095) || (phy_a8 == -4096)); 25036 25037 if (!phy_a6 && (phy_a3 != phy_a5)) { 25038 if (!phy_a3) 25039 phy_a12 -= (u8) phy_a1; 25040 break; 25041 } 25042 25043 if (phy_a3) 25044 phy_a12 += (u8) phy_a1; 25045 else 25046 phy_a12 -= (u8) phy_a1; 25047 25048 if ((phy_a12 < phy_a14) || (phy_a12 > phy_a13)) { 25049 if (phy_a12 < phy_a14) 25050 phy_a12 = phy_a14; 25051 else 25052 phy_a12 = phy_a13; 25053 break; 25054 } 25055 25056 phy_a6 = false; 25057 phy_a5 = phy_a3; 25058 } 25059 25060 } else { 25061 phy_a2 = 10; 25062 phy_a1 = 8; 25063 for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { 25064 phy_a4.index = (u8) phy_a12; 25065 wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); 25066 25067 wlc_phy_table_read_nphy(pi, 25068 (core == 25069 PHY_CORE_0 ? 25070 NPHY_TBL_ID_EPSILONTBL0 : 25071 NPHY_TBL_ID_EPSILONTBL1), 1, 25072 63, 32, &phy_a9); 25073 25074 wlc_phy_papd_decode_epsilon(phy_a9, &phy_a7, &phy_a8); 25075 25076 phy_a3 = ((phy_a7 == 4095) || (phy_a7 == -4096) || 25077 (phy_a8 == 4095) || (phy_a8 == -4096)); 25078 25079 if (!phy_a6 && (phy_a3 != phy_a5)) { 25080 if (!phy_a3) 25081 phy_a12 -= (u8) phy_a1; 25082 break; 25083 } 25084 25085 if (phy_a3) 25086 phy_a12 += (u8) phy_a1; 25087 else 25088 phy_a12 -= (u8) phy_a1; 25089 25090 if ((phy_a12 < 0) || (phy_a12 > 127)) { 25091 if (phy_a12 < 0) 25092 phy_a12 = 0; 25093 else 25094 phy_a12 = 127; 25095 break; 25096 } 25097 25098 phy_a6 = false; 25099 phy_a5 = phy_a3; 25100 } 25101 25102 } 25103 25104 if (NREV_GE(pi->pubpi.phy_rev, 7)) 25105 return (u8) phy_a15[phy_a12]; 25106 else 25107 return (u8) phy_a12; 25108 25109 } 25110 25111 static void wlc_phy_a4(struct brcms_phy *pi, bool full_cal) 25112 { 25113 struct nphy_ipa_txcalgains phy_b1[2]; 25114 struct nphy_papd_restore_state phy_b2; 25115 bool phy_b3; 25116 u8 phy_b4; 25117 u8 phy_b5; 25118 s16 phy_b6, phy_b7, phy_b8; 25119 u16 phy_b9; 25120 s16 phy_b10, phy_b11, phy_b12; 25121 25122 phy_b11 = 0; 25123 phy_b12 = 0; 25124 phy_b7 = 0; 25125 phy_b8 = 0; 25126 phy_b6 = 0; 25127 25128 if (pi->nphy_papd_skip == 1) 25129 return; 25130 25131 phy_b3 = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & 25132 MCTL_EN_MAC)); 25133 if (!phy_b3) 25134 wlapi_suspend_mac_and_wait(pi->sh->physhim); 25135 25136 wlc_phy_stay_in_carriersearch_nphy(pi, true); 25137 25138 pi->nphy_force_papd_cal = false; 25139 25140 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) 25141 pi->nphy_papd_tx_gain_at_last_cal[phy_b5] = 25142 wlc_phy_txpwr_idx_cur_get_nphy(pi, phy_b5); 25143 25144 pi->nphy_papd_last_cal = pi->sh->now; 25145 pi->nphy_papd_recal_counter++; 25146 25147 phy_b4 = pi->nphy_txpwrctrl; 25148 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 25149 25150 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SCALARTBL0, 64, 0, 32, 25151 nphy_papd_scaltbl); 25152 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SCALARTBL1, 64, 0, 32, 25153 nphy_papd_scaltbl); 25154 25155 phy_b9 = read_phy_reg(pi, 0x01); 25156 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 25157 25158 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { 25159 s32 i, val = 0; 25160 for (i = 0; i < 64; i++) 25161 wlc_phy_table_write_nphy(pi, 25162 ((phy_b5 == 25163 PHY_CORE_0) ? 25164 NPHY_TBL_ID_EPSILONTBL0 : 25165 NPHY_TBL_ID_EPSILONTBL1), 1, 25166 i, 32, &val); 25167 } 25168 25169 wlc_phy_ipa_restore_tx_digi_filts_nphy(pi); 25170 25171 phy_b2.mm = wlc_phy_ipa_get_bbmult_nphy(pi); 25172 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { 25173 wlc_phy_papd_cal_setup_nphy(pi, &phy_b2, phy_b5); 25174 25175 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 25176 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25177 if ((pi->pubpi.radiorev == 3) 25178 || (pi->pubpi.radiorev == 4) 25179 || (pi->pubpi.radiorev == 6)) { 25180 pi->nphy_papd_cal_gain_index[phy_b5] = 25181 23; 25182 } else if (pi->pubpi.radiorev == 5) { 25183 pi->nphy_papd_cal_gain_index[phy_b5] = 25184 0; 25185 pi->nphy_papd_cal_gain_index[phy_b5] = 25186 wlc_phy_a3_nphy( 25187 pi, 25188 pi-> 25189 nphy_papd_cal_gain_index 25190 [phy_b5], 25191 phy_b5); 25192 25193 } else if ((pi->pubpi.radiorev == 7) 25194 || (pi->pubpi.radiorev == 8)) { 25195 25196 pi->nphy_papd_cal_gain_index[phy_b5] = 25197 0; 25198 pi->nphy_papd_cal_gain_index[phy_b5] = 25199 wlc_phy_a3_nphy( 25200 pi, 25201 pi-> 25202 nphy_papd_cal_gain_index 25203 [phy_b5], 25204 phy_b5); 25205 25206 } 25207 25208 phy_b1[phy_b5].gains.pad[phy_b5] = 25209 pi->nphy_papd_cal_gain_index[phy_b5]; 25210 25211 } else { 25212 pi->nphy_papd_cal_gain_index[phy_b5] = 0; 25213 pi->nphy_papd_cal_gain_index[phy_b5] = 25214 wlc_phy_a3_nphy( 25215 pi, 25216 pi-> 25217 nphy_papd_cal_gain_index 25218 [phy_b5], phy_b5); 25219 phy_b1[phy_b5].gains.pga[phy_b5] = 25220 pi->nphy_papd_cal_gain_index[phy_b5]; 25221 } 25222 } else { 25223 phy_b1[phy_b5].useindex = true; 25224 phy_b1[phy_b5].index = 16; 25225 phy_b1[phy_b5].index = 25226 wlc_phy_a3_nphy(pi, phy_b1[phy_b5].index, 25227 phy_b5); 25228 25229 pi->nphy_papd_cal_gain_index[phy_b5] = 25230 15 - ((phy_b1[phy_b5].index) >> 3); 25231 } 25232 25233 switch (pi->nphy_papd_cal_type) { 25234 case 0: 25235 wlc_phy_a2_nphy(pi, &phy_b1[phy_b5], CAL_FULL, phy_b5); 25236 break; 25237 case 1: 25238 wlc_phy_a2_nphy(pi, &phy_b1[phy_b5], CAL_SOFT, phy_b5); 25239 break; 25240 } 25241 25242 if (NREV_GE(pi->pubpi.phy_rev, 7)) 25243 wlc_phy_papd_cal_cleanup_nphy(pi, &phy_b2); 25244 } 25245 25246 if (NREV_LT(pi->pubpi.phy_rev, 7)) 25247 wlc_phy_papd_cal_cleanup_nphy(pi, &phy_b2); 25248 25249 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { 25250 int eps_offset = 0; 25251 25252 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 25253 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25254 if (pi->pubpi.radiorev == 3) 25255 eps_offset = -2; 25256 else if (pi->pubpi.radiorev == 5) 25257 eps_offset = 3; 25258 else 25259 eps_offset = -1; 25260 } else { 25261 eps_offset = 2; 25262 } 25263 25264 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25265 phy_b8 = phy_b1[phy_b5].gains.pad[phy_b5]; 25266 phy_b10 = 0; 25267 if ((pi->pubpi.radiorev == 3) || 25268 (pi->pubpi.radiorev == 4) || 25269 (pi->pubpi.radiorev == 6)) { 25270 phy_b12 = -( 25271 nphy_papd_padgain_dlt_2g_2057rev3n4 25272 [phy_b8] + 1) / 2; 25273 phy_b10 = -1; 25274 } else if (pi->pubpi.radiorev == 5) { 25275 phy_b12 = -( 25276 nphy_papd_padgain_dlt_2g_2057rev5 25277 [phy_b8] + 1) / 2; 25278 } else if ((pi->pubpi.radiorev == 7) || 25279 (pi->pubpi.radiorev == 8)) { 25280 phy_b12 = -( 25281 nphy_papd_padgain_dlt_2g_2057rev7 25282 [phy_b8] + 1) / 2; 25283 } 25284 } else { 25285 phy_b7 = phy_b1[phy_b5].gains.pga[phy_b5]; 25286 if ((pi->pubpi.radiorev == 3) || 25287 (pi->pubpi.radiorev == 4) || 25288 (pi->pubpi.radiorev == 6)) 25289 phy_b11 = 25290 -(nphy_papd_pgagain_dlt_5g_2057 25291 [phy_b7] 25292 + 1) / 2; 25293 else if ((pi->pubpi.radiorev == 7) 25294 || (pi->pubpi.radiorev == 8)) 25295 phy_b11 = -( 25296 nphy_papd_pgagain_dlt_5g_2057rev7 25297 [phy_b7] + 1) / 2; 25298 25299 phy_b10 = -9; 25300 } 25301 25302 if (CHSPEC_IS2G(pi->radio_chanspec)) 25303 phy_b6 = 25304 -60 + 27 + eps_offset + phy_b12 + 25305 phy_b10; 25306 else 25307 phy_b6 = 25308 -60 + 27 + eps_offset + phy_b11 + 25309 phy_b10; 25310 25311 mod_phy_reg(pi, (phy_b5 == PHY_CORE_0) ? 0x298 : 25312 0x29c, (0x1ff << 7), (phy_b6) << 7); 25313 25314 pi->nphy_papd_epsilon_offset[phy_b5] = phy_b6; 25315 } else { 25316 if (NREV_LT(pi->pubpi.phy_rev, 5)) 25317 eps_offset = 4; 25318 else 25319 eps_offset = 2; 25320 25321 phy_b7 = 15 - ((phy_b1[phy_b5].index) >> 3); 25322 25323 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25324 phy_b11 = 25325 -(nphy_papd_pga_gain_delta_ipa_2g[ 25326 phy_b7] + 25327 1) / 2; 25328 phy_b10 = 0; 25329 } else { 25330 phy_b11 = 25331 -(nphy_papd_pga_gain_delta_ipa_5g[ 25332 phy_b7] + 25333 1) / 2; 25334 phy_b10 = -9; 25335 } 25336 25337 phy_b6 = -60 + 27 + eps_offset + phy_b11 + phy_b10; 25338 25339 mod_phy_reg(pi, (phy_b5 == PHY_CORE_0) ? 0x298 : 25340 0x29c, (0x1ff << 7), (phy_b6) << 7); 25341 25342 pi->nphy_papd_epsilon_offset[phy_b5] = phy_b6; 25343 } 25344 } 25345 25346 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 25347 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); 25348 25349 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 25350 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); 25351 25352 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 25353 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x2a3 : 25354 0x2a4, (0x1 << 13), (0) << 13); 25355 25356 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x2a3 : 25357 0x2a4, (0x1 << 13), (0) << 13); 25358 25359 } else { 25360 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x2a3 : 25361 0x2a4, (0x1 << 11), (0) << 11); 25362 25363 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x2a3 : 25364 0x2a4, (0x1 << 11), (0) << 11); 25365 25366 } 25367 pi->nphy_papdcomp = NPHY_PAPD_COMP_ON; 25368 25369 write_phy_reg(pi, 0x01, phy_b9); 25370 25371 wlc_phy_ipa_set_tx_digi_filts_nphy(pi); 25372 25373 wlc_phy_txpwrctrl_enable_nphy(pi, phy_b4); 25374 if (phy_b4 == PHY_TPC_HW_OFF) { 25375 wlc_phy_txpwr_index_nphy(pi, (1 << 0), 25376 (s8) (pi->nphy_txpwrindex[0]. 25377 index_internal), false); 25378 wlc_phy_txpwr_index_nphy(pi, (1 << 1), 25379 (s8) (pi->nphy_txpwrindex[1]. 25380 index_internal), false); 25381 } 25382 25383 wlc_phy_stay_in_carriersearch_nphy(pi, false); 25384 25385 if (!phy_b3) 25386 wlapi_enable_mac(pi->sh->physhim); 25387 } 25388 25389 void wlc_phy_cal_perical_nphy_run(struct brcms_phy *pi, u8 caltype) 25390 { 25391 struct nphy_txgains target_gain; 25392 u8 tx_pwr_ctrl_state; 25393 bool fullcal = true; 25394 bool restore_tx_gain = false; 25395 bool mphase; 25396 25397 if (PHY_MUTED(pi)) 25398 return; 25399 25400 if (caltype == PHY_PERICAL_AUTO) 25401 fullcal = (pi->radio_chanspec != pi->nphy_txiqlocal_chanspec); 25402 else if (caltype == PHY_PERICAL_PARTIAL) 25403 fullcal = false; 25404 25405 if (pi->cal_type_override != PHY_PERICAL_AUTO) 25406 fullcal = 25407 (pi->cal_type_override == 25408 PHY_PERICAL_FULL) ? true : false; 25409 25410 if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_INIT) { 25411 if (pi->nphy_txiqlocal_chanspec != pi->radio_chanspec) 25412 wlc_phy_cal_perical_mphase_restart(pi); 25413 } 25414 25415 if (pi->mphase_cal_phase_id == MPHASE_CAL_STATE_RXCAL) 25416 wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000); 25417 25418 wlapi_suspend_mac_and_wait(pi->sh->physhim); 25419 25420 wlc_phyreg_enter((struct brcms_phy_pub *) pi); 25421 25422 if ((pi->mphase_cal_phase_id == MPHASE_CAL_STATE_IDLE) || 25423 (pi->mphase_cal_phase_id == MPHASE_CAL_STATE_INIT)) { 25424 pi->nphy_cal_orig_pwr_idx[0] = 25425 (u8) ((read_phy_reg(pi, 0x1ed) >> 8) & 0x7f); 25426 pi->nphy_cal_orig_pwr_idx[1] = 25427 (u8) ((read_phy_reg(pi, 0x1ee) >> 8) & 0x7f); 25428 25429 if (pi->nphy_txpwrctrl != PHY_TPC_HW_OFF) { 25430 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 25431 0x110, 16, 25432 pi->nphy_cal_orig_tx_gain); 25433 } else { 25434 pi->nphy_cal_orig_tx_gain[0] = 0; 25435 pi->nphy_cal_orig_tx_gain[1] = 0; 25436 } 25437 } 25438 target_gain = wlc_phy_get_tx_gain_nphy(pi); 25439 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 25440 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 25441 25442 if (pi->antsel_type == ANTSEL_2x3) 25443 wlc_phy_antsel_init((struct brcms_phy_pub *) pi, true); 25444 25445 mphase = (pi->mphase_cal_phase_id != MPHASE_CAL_STATE_IDLE); 25446 if (!mphase) { 25447 25448 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 25449 wlc_phy_precal_txgain_nphy(pi); 25450 pi->nphy_cal_target_gain = wlc_phy_get_tx_gain_nphy(pi); 25451 restore_tx_gain = true; 25452 25453 target_gain = pi->nphy_cal_target_gain; 25454 } 25455 if (0 == 25456 wlc_phy_cal_txiqlo_nphy(pi, target_gain, fullcal, 25457 mphase)) { 25458 if (PHY_IPA(pi)) 25459 wlc_phy_a4(pi, true); 25460 25461 wlc_phyreg_exit((struct brcms_phy_pub *) pi); 25462 wlapi_enable_mac(pi->sh->physhim); 25463 wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 25464 10000); 25465 wlapi_suspend_mac_and_wait(pi->sh->physhim); 25466 wlc_phyreg_enter((struct brcms_phy_pub *) pi); 25467 25468 if (0 == wlc_phy_cal_rxiq_nphy(pi, target_gain, 25469 (pi->first_cal_after_assoc || 25470 (pi->cal_type_override == 25471 PHY_PERICAL_FULL)) ? 2 : 0, false)) { 25472 wlc_phy_savecal_nphy(pi); 25473 25474 wlc_phy_txpwrctrl_coeff_setup_nphy(pi); 25475 25476 pi->nphy_perical_last = pi->sh->now; 25477 } 25478 } 25479 if (caltype != PHY_PERICAL_AUTO) 25480 wlc_phy_rssi_cal_nphy(pi); 25481 25482 if (pi->first_cal_after_assoc 25483 || (pi->cal_type_override == PHY_PERICAL_FULL)) { 25484 pi->first_cal_after_assoc = false; 25485 wlc_phy_txpwrctrl_idle_tssi_nphy(pi); 25486 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 25487 } 25488 25489 if (NREV_GE(pi->pubpi.phy_rev, 3)) 25490 wlc_phy_radio205x_vcocal_nphy(pi); 25491 } else { 25492 switch (pi->mphase_cal_phase_id) { 25493 case MPHASE_CAL_STATE_INIT: 25494 pi->nphy_perical_last = pi->sh->now; 25495 pi->nphy_txiqlocal_chanspec = pi->radio_chanspec; 25496 25497 if (NREV_GE(pi->pubpi.phy_rev, 3)) 25498 wlc_phy_precal_txgain_nphy(pi); 25499 25500 pi->nphy_cal_target_gain = wlc_phy_get_tx_gain_nphy(pi); 25501 pi->mphase_cal_phase_id++; 25502 break; 25503 25504 case MPHASE_CAL_STATE_TXPHASE0: 25505 case MPHASE_CAL_STATE_TXPHASE1: 25506 case MPHASE_CAL_STATE_TXPHASE2: 25507 case MPHASE_CAL_STATE_TXPHASE3: 25508 case MPHASE_CAL_STATE_TXPHASE4: 25509 case MPHASE_CAL_STATE_TXPHASE5: 25510 if ((pi->radar_percal_mask & 0x10) != 0) 25511 pi->nphy_rxcal_active = true; 25512 25513 if (wlc_phy_cal_txiqlo_nphy 25514 (pi, pi->nphy_cal_target_gain, fullcal, 25515 true) != 0) { 25516 25517 wlc_phy_cal_perical_mphase_reset(pi); 25518 break; 25519 } 25520 25521 if (NREV_LE(pi->pubpi.phy_rev, 2) && 25522 (pi->mphase_cal_phase_id == 25523 MPHASE_CAL_STATE_TXPHASE4)) 25524 pi->mphase_cal_phase_id += 2; 25525 else 25526 pi->mphase_cal_phase_id++; 25527 break; 25528 25529 case MPHASE_CAL_STATE_PAPDCAL: 25530 if ((pi->radar_percal_mask & 0x2) != 0) 25531 pi->nphy_rxcal_active = true; 25532 25533 if (PHY_IPA(pi)) 25534 wlc_phy_a4(pi, true); 25535 25536 pi->mphase_cal_phase_id++; 25537 break; 25538 25539 case MPHASE_CAL_STATE_RXCAL: 25540 if ((pi->radar_percal_mask & 0x1) != 0) 25541 pi->nphy_rxcal_active = true; 25542 if (wlc_phy_cal_rxiq_nphy(pi, target_gain, 25543 (pi->first_cal_after_assoc || 25544 (pi->cal_type_override == 25545 PHY_PERICAL_FULL)) ? 2 : 0, 25546 false) == 0) 25547 wlc_phy_savecal_nphy(pi); 25548 25549 pi->mphase_cal_phase_id++; 25550 break; 25551 25552 case MPHASE_CAL_STATE_RSSICAL: 25553 if ((pi->radar_percal_mask & 0x4) != 0) 25554 pi->nphy_rxcal_active = true; 25555 wlc_phy_txpwrctrl_coeff_setup_nphy(pi); 25556 wlc_phy_rssi_cal_nphy(pi); 25557 25558 if (NREV_GE(pi->pubpi.phy_rev, 3)) 25559 wlc_phy_radio205x_vcocal_nphy(pi); 25560 25561 restore_tx_gain = true; 25562 25563 if (pi->first_cal_after_assoc) 25564 pi->mphase_cal_phase_id++; 25565 else 25566 wlc_phy_cal_perical_mphase_reset(pi); 25567 25568 break; 25569 25570 case MPHASE_CAL_STATE_IDLETSSI: 25571 if ((pi->radar_percal_mask & 0x8) != 0) 25572 pi->nphy_rxcal_active = true; 25573 25574 if (pi->first_cal_after_assoc) { 25575 pi->first_cal_after_assoc = false; 25576 wlc_phy_txpwrctrl_idle_tssi_nphy(pi); 25577 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 25578 } 25579 25580 wlc_phy_cal_perical_mphase_reset(pi); 25581 break; 25582 25583 default: 25584 wlc_phy_cal_perical_mphase_reset(pi); 25585 break; 25586 } 25587 } 25588 25589 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 25590 if (restore_tx_gain) { 25591 if (tx_pwr_ctrl_state != PHY_TPC_HW_OFF) { 25592 25593 wlc_phy_txpwr_index_nphy(pi, 1, 25594 pi-> 25595 nphy_cal_orig_pwr_idx 25596 [0], false); 25597 wlc_phy_txpwr_index_nphy(pi, 2, 25598 pi-> 25599 nphy_cal_orig_pwr_idx 25600 [1], false); 25601 25602 pi->nphy_txpwrindex[0].index = -1; 25603 pi->nphy_txpwrindex[1].index = -1; 25604 } else { 25605 wlc_phy_txpwr_index_nphy(pi, (1 << 0), 25606 (s8) (pi-> 25607 nphy_txpwrindex 25608 [0]. 25609 index_internal), 25610 false); 25611 wlc_phy_txpwr_index_nphy(pi, (1 << 1), 25612 (s8) (pi-> 25613 nphy_txpwrindex 25614 [1]. 25615 index_internal), 25616 false); 25617 } 25618 } 25619 } 25620 25621 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 25622 wlc_phyreg_exit((struct brcms_phy_pub *) pi); 25623 wlapi_enable_mac(pi->sh->physhim); 25624 } 25625 25626 int 25627 wlc_phy_cal_txiqlo_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain, 25628 bool fullcal, bool mphase) 25629 { 25630 u16 val; 25631 u16 tbl_buf[11]; 25632 u8 cal_cnt; 25633 u16 cal_cmd; 25634 u8 num_cals, max_cal_cmds; 25635 u16 core_no, cal_type; 25636 u16 diq_start = 0; 25637 u8 phy_bw; 25638 u16 max_val; 25639 u16 tone_freq; 25640 u16 gain_save[2]; 25641 u16 cal_gain[2]; 25642 struct nphy_iqcal_params cal_params[2]; 25643 u32 tbl_len; 25644 const void *tbl_ptr; 25645 bool ladder_updated[2]; 25646 u8 mphase_cal_lastphase = 0; 25647 int bcmerror = 0; 25648 bool phyhang_avoid_state = false; 25649 25650 static const u16 tbl_tx_iqlo_cal_loft_ladder_20[] = { 25651 0x0300, 0x0500, 0x0700, 0x0900, 0x0d00, 0x1100, 0x1900, 0x1901, 25652 0x1902, 25653 0x1903, 0x1904, 0x1905, 0x1906, 0x1907, 0x2407, 0x3207, 0x4607, 25654 0x6407 25655 }; 25656 25657 static const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = { 25658 0x0200, 0x0300, 0x0600, 0x0900, 0x0d00, 0x1100, 0x1900, 0x2400, 25659 0x3200, 25660 0x4600, 0x6400, 0x6401, 0x6402, 0x6403, 0x6404, 0x6405, 0x6406, 25661 0x6407 25662 }; 25663 25664 static const u16 tbl_tx_iqlo_cal_loft_ladder_40[] = { 25665 0x0200, 0x0300, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1201, 25666 0x1202, 25667 0x1203, 0x1204, 0x1205, 0x1206, 0x1207, 0x1907, 0x2307, 0x3207, 25668 0x4707 25669 }; 25670 25671 static const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = { 25672 0x0100, 0x0200, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1900, 25673 0x2300, 25674 0x3200, 0x4700, 0x4701, 0x4702, 0x4703, 0x4704, 0x4705, 0x4706, 25675 0x4707 25676 }; 25677 25678 static const u16 tbl_tx_iqlo_cal_startcoefs[] = { 25679 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 25680 0x0000 25681 }; 25682 25683 static const u16 tbl_tx_iqlo_cal_cmds_fullcal[] = { 25684 0x8123, 0x8264, 0x8086, 0x8245, 0x8056, 25685 0x9123, 0x9264, 0x9086, 0x9245, 0x9056 25686 }; 25687 25688 static const u16 tbl_tx_iqlo_cal_cmds_recal[] = { 25689 0x8101, 0x8253, 0x8053, 0x8234, 0x8034, 25690 0x9101, 0x9253, 0x9053, 0x9234, 0x9034 25691 }; 25692 25693 static const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = { 25694 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 25695 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 25696 0x0000 25697 }; 25698 25699 static const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = { 25700 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234, 25701 0x9434, 0x9334, 0x9084, 0x9267, 0x9056, 0x9234 25702 }; 25703 25704 static const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = { 25705 0x8423, 0x8323, 0x8073, 0x8256, 0x8045, 0x8223, 25706 0x9423, 0x9323, 0x9073, 0x9256, 0x9045, 0x9223 25707 }; 25708 25709 wlc_phy_stay_in_carriersearch_nphy(pi, true); 25710 25711 if (NREV_GE(pi->pubpi.phy_rev, 4)) { 25712 phyhang_avoid_state = pi->phyhang_avoid; 25713 pi->phyhang_avoid = false; 25714 } 25715 25716 if (CHSPEC_IS40(pi->radio_chanspec)) 25717 phy_bw = 40; 25718 else 25719 phy_bw = 20; 25720 25721 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); 25722 25723 for (core_no = 0; core_no <= 1; core_no++) { 25724 wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, 25725 &cal_params[core_no]); 25726 cal_gain[core_no] = cal_params[core_no].cal_gain; 25727 } 25728 25729 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); 25730 25731 wlc_phy_txcal_radio_setup_nphy(pi); 25732 25733 wlc_phy_txcal_physetup_nphy(pi); 25734 25735 ladder_updated[0] = ladder_updated[1] = false; 25736 if (!(NREV_GE(pi->pubpi.phy_rev, 6) || 25737 (NREV_IS(pi->pubpi.phy_rev, 5) && PHY_IPA(pi) 25738 && (CHSPEC_IS2G(pi->radio_chanspec))))) { 25739 25740 if (phy_bw == 40) { 25741 tbl_ptr = tbl_tx_iqlo_cal_loft_ladder_40; 25742 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_loft_ladder_40); 25743 } else { 25744 tbl_ptr = tbl_tx_iqlo_cal_loft_ladder_20; 25745 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_loft_ladder_20); 25746 } 25747 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 0, 25748 16, tbl_ptr); 25749 25750 if (phy_bw == 40) { 25751 tbl_ptr = tbl_tx_iqlo_cal_iqimb_ladder_40; 25752 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_iqimb_ladder_40); 25753 } else { 25754 tbl_ptr = tbl_tx_iqlo_cal_iqimb_ladder_20; 25755 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_iqimb_ladder_20); 25756 } 25757 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 32, 25758 16, tbl_ptr); 25759 } 25760 25761 if (NREV_GE(pi->pubpi.phy_rev, 7)) 25762 write_phy_reg(pi, 0xc2, 0x8ad9); 25763 else 25764 write_phy_reg(pi, 0xc2, 0x8aa9); 25765 25766 max_val = 250; 25767 tone_freq = (phy_bw == 20) ? 2500 : 5000; 25768 25769 if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_TXPHASE0) { 25770 wlc_phy_runsamples_nphy(pi, phy_bw * 8, 0xffff, 0, 1, 0, false); 25771 bcmerror = 0; 25772 } else { 25773 bcmerror = 25774 wlc_phy_tx_tone_nphy(pi, tone_freq, max_val, 1, 0, 25775 false); 25776 } 25777 25778 if (bcmerror == 0) { 25779 25780 if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_TXPHASE0) { 25781 tbl_ptr = pi->mphase_txcal_bestcoeffs; 25782 tbl_len = ARRAY_SIZE(pi->mphase_txcal_bestcoeffs); 25783 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25784 tbl_len -= 2; 25785 } else { 25786 if ((!fullcal) && (pi->nphy_txiqlocal_coeffsvalid)) { 25787 25788 tbl_ptr = pi->nphy_txiqlocal_bestc; 25789 tbl_len = ARRAY_SIZE(pi->nphy_txiqlocal_bestc); 25790 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25791 tbl_len -= 2; 25792 } else { 25793 25794 fullcal = true; 25795 25796 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 25797 tbl_ptr = 25798 tbl_tx_iqlo_cal_startcoefs_nphyrev3; 25799 tbl_len = ARRAY_SIZE( 25800 tbl_tx_iqlo_cal_startcoefs_nphyrev3); 25801 } else { 25802 tbl_ptr = tbl_tx_iqlo_cal_startcoefs; 25803 tbl_len = ARRAY_SIZE( 25804 tbl_tx_iqlo_cal_startcoefs); 25805 } 25806 } 25807 } 25808 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 64, 25809 16, tbl_ptr); 25810 25811 if (fullcal) { 25812 max_cal_cmds = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25813 ARRAY_SIZE( 25814 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3) : 25815 ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_fullcal); 25816 } else { 25817 max_cal_cmds = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25818 ARRAY_SIZE( 25819 tbl_tx_iqlo_cal_cmds_recal_nphyrev3) : 25820 ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_recal); 25821 } 25822 25823 if (mphase) { 25824 cal_cnt = pi->mphase_txcal_cmdidx; 25825 if ((cal_cnt + pi->mphase_txcal_numcmds) < max_cal_cmds) 25826 num_cals = cal_cnt + pi->mphase_txcal_numcmds; 25827 else 25828 num_cals = max_cal_cmds; 25829 } else { 25830 cal_cnt = 0; 25831 num_cals = max_cal_cmds; 25832 } 25833 25834 for (; cal_cnt < num_cals; cal_cnt++) { 25835 25836 if (fullcal) { 25837 cal_cmd = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25838 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3 25839 [cal_cnt] : 25840 tbl_tx_iqlo_cal_cmds_fullcal[cal_cnt]; 25841 } else { 25842 cal_cmd = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25843 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[ 25844 cal_cnt] 25845 : tbl_tx_iqlo_cal_cmds_recal[cal_cnt]; 25846 } 25847 25848 core_no = ((cal_cmd & 0x3000) >> 12); 25849 cal_type = ((cal_cmd & 0x0F00) >> 8); 25850 25851 if (NREV_GE(pi->pubpi.phy_rev, 6) || 25852 (NREV_IS(pi->pubpi.phy_rev, 5) && 25853 PHY_IPA(pi) 25854 && (CHSPEC_IS2G(pi->radio_chanspec)))) { 25855 if (!ladder_updated[core_no]) { 25856 wlc_phy_update_txcal_ladder_nphy( 25857 pi, 25858 core_no); 25859 ladder_updated[core_no] = true; 25860 } 25861 } 25862 25863 val = 25864 (cal_params[core_no]. 25865 ncorr[cal_type] << 8) | NPHY_N_GCTL; 25866 write_phy_reg(pi, 0xc1, val); 25867 25868 if ((cal_type == 1) || (cal_type == 3) 25869 || (cal_type == 4)) { 25870 25871 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25872 1, 69 + core_no, 16, 25873 tbl_buf); 25874 25875 diq_start = tbl_buf[0]; 25876 25877 tbl_buf[0] = 0; 25878 wlc_phy_table_write_nphy(pi, 25879 NPHY_TBL_ID_IQLOCAL, 1, 25880 69 + core_no, 16, 25881 tbl_buf); 25882 } 25883 25884 write_phy_reg(pi, 0xc0, cal_cmd); 25885 25886 SPINWAIT(((read_phy_reg(pi, 0xc0) & 0xc000) != 0), 25887 20000); 25888 if (WARN(read_phy_reg(pi, 0xc0) & 0xc000, 25889 "HW error: txiq calib")) 25890 return -EIO; 25891 25892 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25893 tbl_len, 96, 16, tbl_buf); 25894 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25895 tbl_len, 64, 16, tbl_buf); 25896 25897 if ((cal_type == 1) || (cal_type == 3) 25898 || (cal_type == 4)) { 25899 25900 tbl_buf[0] = diq_start; 25901 25902 } 25903 25904 } 25905 25906 if (mphase) { 25907 pi->mphase_txcal_cmdidx = num_cals; 25908 if (pi->mphase_txcal_cmdidx >= max_cal_cmds) 25909 pi->mphase_txcal_cmdidx = 0; 25910 } 25911 25912 mphase_cal_lastphase = 25913 (NREV_LE(pi->pubpi.phy_rev, 2)) ? 25914 MPHASE_CAL_STATE_TXPHASE4 : MPHASE_CAL_STATE_TXPHASE5; 25915 25916 if (!mphase 25917 || (pi->mphase_cal_phase_id == mphase_cal_lastphase)) { 25918 25919 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 96, 25920 16, tbl_buf); 25921 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 25922 16, tbl_buf); 25923 25924 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 25925 25926 tbl_buf[0] = 0; 25927 tbl_buf[1] = 0; 25928 tbl_buf[2] = 0; 25929 tbl_buf[3] = 0; 25930 25931 } 25932 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 25933 16, tbl_buf); 25934 25935 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 101, 25936 16, tbl_buf); 25937 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 25938 16, tbl_buf); 25939 25940 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 25941 16, tbl_buf); 25942 25943 tbl_len = ARRAY_SIZE(pi->nphy_txiqlocal_bestc); 25944 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25945 tbl_len -= 2; 25946 25947 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25948 tbl_len, 96, 16, 25949 pi->nphy_txiqlocal_bestc); 25950 25951 pi->nphy_txiqlocal_coeffsvalid = true; 25952 pi->nphy_txiqlocal_chanspec = pi->radio_chanspec; 25953 } else { 25954 tbl_len = ARRAY_SIZE(pi->mphase_txcal_bestcoeffs); 25955 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25956 tbl_len -= 2; 25957 25958 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25959 tbl_len, 96, 16, 25960 pi->mphase_txcal_bestcoeffs); 25961 } 25962 25963 wlc_phy_stopplayback_nphy(pi); 25964 25965 write_phy_reg(pi, 0xc2, 0x0000); 25966 25967 } 25968 25969 wlc_phy_txcal_phycleanup_nphy(pi); 25970 25971 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 25972 gain_save); 25973 25974 wlc_phy_txcal_radio_cleanup_nphy(pi); 25975 25976 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 25977 if (!mphase 25978 || (pi->mphase_cal_phase_id == mphase_cal_lastphase)) 25979 wlc_phy_tx_iq_war_nphy(pi); 25980 } 25981 25982 if (NREV_GE(pi->pubpi.phy_rev, 4)) 25983 pi->phyhang_avoid = phyhang_avoid_state; 25984 25985 wlc_phy_stay_in_carriersearch_nphy(pi, false); 25986 25987 return bcmerror; 25988 } 25989 25990 static void wlc_phy_reapply_txcal_coeffs_nphy(struct brcms_phy *pi) 25991 { 25992 u16 tbl_buf[7]; 25993 25994 if ((pi->nphy_txiqlocal_chanspec == pi->radio_chanspec) && 25995 (pi->nphy_txiqlocal_coeffsvalid)) { 25996 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25997 ARRAY_SIZE(tbl_buf), 80, 16, tbl_buf); 25998 25999 if ((pi->nphy_txiqlocal_bestc[0] != tbl_buf[0]) || 26000 (pi->nphy_txiqlocal_bestc[1] != tbl_buf[1]) || 26001 (pi->nphy_txiqlocal_bestc[2] != tbl_buf[2]) || 26002 (pi->nphy_txiqlocal_bestc[3] != tbl_buf[3])) { 26003 26004 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 26005 16, pi->nphy_txiqlocal_bestc); 26006 26007 tbl_buf[0] = 0; 26008 tbl_buf[1] = 0; 26009 tbl_buf[2] = 0; 26010 tbl_buf[3] = 0; 26011 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 26012 16, tbl_buf); 26013 26014 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 26015 16, 26016 &pi->nphy_txiqlocal_bestc[5]); 26017 26018 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 26019 16, 26020 &pi->nphy_txiqlocal_bestc[5]); 26021 } 26022 } 26023 } 26024 26025 void 26026 wlc_phy_rx_iq_coeffs_nphy(struct brcms_phy *pi, u8 write, 26027 struct nphy_iq_comp *pcomp) 26028 { 26029 if (write) { 26030 write_phy_reg(pi, 0x9a, pcomp->a0); 26031 write_phy_reg(pi, 0x9b, pcomp->b0); 26032 write_phy_reg(pi, 0x9c, pcomp->a1); 26033 write_phy_reg(pi, 0x9d, pcomp->b1); 26034 } else { 26035 pcomp->a0 = read_phy_reg(pi, 0x9a); 26036 pcomp->b0 = read_phy_reg(pi, 0x9b); 26037 pcomp->a1 = read_phy_reg(pi, 0x9c); 26038 pcomp->b1 = read_phy_reg(pi, 0x9d); 26039 } 26040 } 26041 26042 void 26043 wlc_phy_rx_iq_est_nphy(struct brcms_phy *pi, struct phy_iq_est *est, 26044 u16 num_samps, u8 wait_time, u8 wait_for_crs) 26045 { 26046 u8 core; 26047 26048 write_phy_reg(pi, 0x12b, num_samps); 26049 mod_phy_reg(pi, 0x12a, (0xff << 0), (wait_time << 0)); 26050 mod_phy_reg(pi, 0x129, NPHY_IqestCmd_iqMode, 26051 (wait_for_crs) ? NPHY_IqestCmd_iqMode : 0); 26052 26053 mod_phy_reg(pi, 0x129, NPHY_IqestCmd_iqstart, NPHY_IqestCmd_iqstart); 26054 26055 SPINWAIT(((read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart) != 0), 26056 10000); 26057 if (WARN(read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart, 26058 "HW error: rxiq est")) 26059 return; 26060 26061 if ((read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart) == 0) { 26062 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 26063 est[core].i_pwr = 26064 (read_phy_reg(pi, 26065 NPHY_IqestipwrAccHi(core)) << 16) 26066 | read_phy_reg(pi, NPHY_IqestipwrAccLo(core)); 26067 est[core].q_pwr = 26068 (read_phy_reg(pi, 26069 NPHY_IqestqpwrAccHi(core)) << 16) 26070 | read_phy_reg(pi, NPHY_IqestqpwrAccLo(core)); 26071 est[core].iq_prod = 26072 (read_phy_reg(pi, 26073 NPHY_IqestIqAccHi(core)) << 16) | 26074 read_phy_reg(pi, NPHY_IqestIqAccLo(core)); 26075 } 26076 } 26077 } 26078 26079 #define CAL_RETRY_CNT 2 26080 static void wlc_phy_calc_rx_iq_comp_nphy(struct brcms_phy *pi, u8 core_mask) 26081 { 26082 u8 curr_core; 26083 struct phy_iq_est est[PHY_CORE_MAX]; 26084 struct nphy_iq_comp old_comp, new_comp; 26085 s32 iq = 0; 26086 u32 ii = 0, qq = 0; 26087 s16 iq_nbits, qq_nbits, brsh, arsh; 26088 s32 a, b, temp; 26089 int bcmerror = 0; 26090 uint cal_retry = 0; 26091 26092 if (core_mask == 0x0) 26093 return; 26094 26095 wlc_phy_rx_iq_coeffs_nphy(pi, 0, &old_comp); 26096 new_comp.a0 = new_comp.b0 = new_comp.a1 = new_comp.b1 = 0x0; 26097 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); 26098 26099 cal_try: 26100 wlc_phy_rx_iq_est_nphy(pi, est, 0x4000, 32, 0); 26101 26102 new_comp = old_comp; 26103 26104 for (curr_core = 0; curr_core < pi->pubpi.phy_corenum; curr_core++) { 26105 26106 if ((curr_core == PHY_CORE_0) && (core_mask & 0x1)) { 26107 iq = est[curr_core].iq_prod; 26108 ii = est[curr_core].i_pwr; 26109 qq = est[curr_core].q_pwr; 26110 } else if ((curr_core == PHY_CORE_1) && (core_mask & 0x2)) { 26111 iq = est[curr_core].iq_prod; 26112 ii = est[curr_core].i_pwr; 26113 qq = est[curr_core].q_pwr; 26114 } else { 26115 continue; 26116 } 26117 26118 if ((ii + qq) < NPHY_MIN_RXIQ_PWR) { 26119 bcmerror = -EBADE; 26120 break; 26121 } 26122 26123 iq_nbits = wlc_phy_nbits(iq); 26124 qq_nbits = wlc_phy_nbits(qq); 26125 26126 arsh = 10 - (30 - iq_nbits); 26127 if (arsh >= 0) { 26128 a = (-(iq << (30 - iq_nbits)) + (ii >> (1 + arsh))); 26129 temp = (s32) (ii >> arsh); 26130 if (temp == 0) { 26131 bcmerror = -EBADE; 26132 break; 26133 } 26134 } else { 26135 a = (-(iq << (30 - iq_nbits)) + (ii << (-1 - arsh))); 26136 temp = (s32) (ii << -arsh); 26137 if (temp == 0) { 26138 bcmerror = -EBADE; 26139 break; 26140 } 26141 } 26142 26143 a /= temp; 26144 26145 brsh = qq_nbits - 31 + 20; 26146 if (brsh >= 0) { 26147 b = (qq << (31 - qq_nbits)); 26148 temp = (s32) (ii >> brsh); 26149 if (temp == 0) { 26150 bcmerror = -EBADE; 26151 break; 26152 } 26153 } else { 26154 b = (qq << (31 - qq_nbits)); 26155 temp = (s32) (ii << -brsh); 26156 if (temp == 0) { 26157 bcmerror = -EBADE; 26158 break; 26159 } 26160 } 26161 b /= temp; 26162 b -= a * a; 26163 b = (s32) int_sqrt((unsigned long) b); 26164 b -= (1 << 10); 26165 26166 if ((curr_core == PHY_CORE_0) && (core_mask & 0x1)) { 26167 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 26168 new_comp.a0 = (s16) a & 0x3ff; 26169 new_comp.b0 = (s16) b & 0x3ff; 26170 } else { 26171 26172 new_comp.a0 = (s16) b & 0x3ff; 26173 new_comp.b0 = (s16) a & 0x3ff; 26174 } 26175 } 26176 if ((curr_core == PHY_CORE_1) && (core_mask & 0x2)) { 26177 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 26178 new_comp.a1 = (s16) a & 0x3ff; 26179 new_comp.b1 = (s16) b & 0x3ff; 26180 } else { 26181 26182 new_comp.a1 = (s16) b & 0x3ff; 26183 new_comp.b1 = (s16) a & 0x3ff; 26184 } 26185 } 26186 } 26187 26188 if (bcmerror != 0) { 26189 pr_debug("%s: Failed, cnt = %d\n", __func__, cal_retry); 26190 26191 if (cal_retry < CAL_RETRY_CNT) { 26192 cal_retry++; 26193 goto cal_try; 26194 } 26195 26196 new_comp = old_comp; 26197 } 26198 26199 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); 26200 } 26201 26202 static void wlc_phy_rxcal_radio_setup_nphy(struct brcms_phy *pi, u8 rx_core) 26203 { 26204 u16 offtune_val; 26205 u16 bias_g = 0; 26206 u16 bias_a = 0; 26207 26208 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26209 if (rx_core == PHY_CORE_0) { 26210 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26211 pi->tx_rx_cal_radio_saveregs[0] = 26212 read_radio_reg(pi, 26213 RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP); 26214 pi->tx_rx_cal_radio_saveregs[1] = 26215 read_radio_reg(pi, 26216 RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN); 26217 26218 write_radio_reg(pi, 26219 RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP, 26220 0x3); 26221 write_radio_reg(pi, 26222 RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN, 26223 0xaf); 26224 26225 } else { 26226 pi->tx_rx_cal_radio_saveregs[0] = 26227 read_radio_reg(pi, 26228 RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP); 26229 pi->tx_rx_cal_radio_saveregs[1] = 26230 read_radio_reg(pi, 26231 RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN); 26232 26233 write_radio_reg( 26234 pi, 26235 RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP, 26236 0x3); 26237 write_radio_reg( 26238 pi, 26239 RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN, 26240 0x7f); 26241 } 26242 26243 } else { 26244 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26245 pi->tx_rx_cal_radio_saveregs[0] = 26246 read_radio_reg(pi, 26247 RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP); 26248 pi->tx_rx_cal_radio_saveregs[1] = 26249 read_radio_reg(pi, 26250 RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN); 26251 26252 write_radio_reg( 26253 pi, 26254 RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP, 26255 0x3); 26256 write_radio_reg( 26257 pi, 26258 RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN, 26259 0xaf); 26260 26261 } else { 26262 pi->tx_rx_cal_radio_saveregs[0] = 26263 read_radio_reg(pi, 26264 RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP); 26265 pi->tx_rx_cal_radio_saveregs[1] = 26266 read_radio_reg(pi, 26267 RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN); 26268 26269 write_radio_reg(pi, 26270 RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP, 26271 0x3); 26272 write_radio_reg(pi, 26273 RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN, 26274 0x7f); 26275 } 26276 } 26277 26278 } else { 26279 if (rx_core == PHY_CORE_0) { 26280 pi->tx_rx_cal_radio_saveregs[0] = 26281 read_radio_reg(pi, 26282 RADIO_2056_TX_RXIQCAL_TXMUX | 26283 RADIO_2056_TX1); 26284 pi->tx_rx_cal_radio_saveregs[1] = 26285 read_radio_reg(pi, 26286 RADIO_2056_RX_RXIQCAL_RXMUX | 26287 RADIO_2056_RX0); 26288 26289 if (pi->pubpi.radiorev >= 5) { 26290 pi->tx_rx_cal_radio_saveregs[2] = 26291 read_radio_reg(pi, 26292 RADIO_2056_RX_RXSPARE2 | 26293 RADIO_2056_RX0); 26294 pi->tx_rx_cal_radio_saveregs[3] = 26295 read_radio_reg(pi, 26296 RADIO_2056_TX_TXSPARE2 | 26297 RADIO_2056_TX1); 26298 } 26299 26300 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26301 26302 if (pi->pubpi.radiorev >= 5) { 26303 pi->tx_rx_cal_radio_saveregs[4] = 26304 read_radio_reg(pi, 26305 RADIO_2056_RX_LNAA_MASTER 26306 | RADIO_2056_RX0); 26307 26308 write_radio_reg( 26309 pi, 26310 RADIO_2056_RX_LNAA_MASTER 26311 | RADIO_2056_RX0, 0x40); 26312 26313 write_radio_reg(pi, 26314 RADIO_2056_TX_TXSPARE2 | 26315 RADIO_2056_TX1, bias_a); 26316 26317 write_radio_reg(pi, 26318 RADIO_2056_RX_RXSPARE2 | 26319 RADIO_2056_RX0, bias_a); 26320 } else { 26321 pi->tx_rx_cal_radio_saveregs[4] = 26322 read_radio_reg(pi, 26323 RADIO_2056_RX_LNAA_TUNE 26324 | RADIO_2056_RX0); 26325 26326 offtune_val = 26327 (pi->tx_rx_cal_radio_saveregs 26328 [2] & 0xF0) >> 8; 26329 offtune_val = 26330 (offtune_val <= 0x7) ? 0xF : 0; 26331 26332 mod_radio_reg(pi, 26333 RADIO_2056_RX_LNAA_TUNE | 26334 RADIO_2056_RX0, 0xF0, 26335 (offtune_val << 8)); 26336 } 26337 26338 write_radio_reg(pi, 26339 RADIO_2056_TX_RXIQCAL_TXMUX | 26340 RADIO_2056_TX1, 0x9); 26341 write_radio_reg(pi, 26342 RADIO_2056_RX_RXIQCAL_RXMUX | 26343 RADIO_2056_RX0, 0x9); 26344 } else { 26345 if (pi->pubpi.radiorev >= 5) { 26346 pi->tx_rx_cal_radio_saveregs[4] = 26347 read_radio_reg( 26348 pi, 26349 RADIO_2056_RX_LNAG_MASTER 26350 | RADIO_2056_RX0); 26351 26352 write_radio_reg( 26353 pi, 26354 RADIO_2056_RX_LNAG_MASTER 26355 | RADIO_2056_RX0, 0x40); 26356 26357 write_radio_reg( 26358 pi, 26359 RADIO_2056_TX_TXSPARE2 26360 | 26361 RADIO_2056_TX1, bias_g); 26362 26363 write_radio_reg( 26364 pi, 26365 RADIO_2056_RX_RXSPARE2 26366 | 26367 RADIO_2056_RX0, bias_g); 26368 26369 } else { 26370 pi->tx_rx_cal_radio_saveregs[4] = 26371 read_radio_reg( 26372 pi, 26373 RADIO_2056_RX_LNAG_TUNE 26374 | RADIO_2056_RX0); 26375 26376 offtune_val = 26377 (pi-> 26378 tx_rx_cal_radio_saveregs[2] & 26379 0xF0) >> 8; 26380 offtune_val = 26381 (offtune_val <= 0x7) ? 0xF : 0; 26382 26383 mod_radio_reg(pi, 26384 RADIO_2056_RX_LNAG_TUNE | 26385 RADIO_2056_RX0, 0xF0, 26386 (offtune_val << 8)); 26387 } 26388 26389 write_radio_reg(pi, 26390 RADIO_2056_TX_RXIQCAL_TXMUX | 26391 RADIO_2056_TX1, 0x6); 26392 write_radio_reg(pi, 26393 RADIO_2056_RX_RXIQCAL_RXMUX | 26394 RADIO_2056_RX0, 0x6); 26395 } 26396 26397 } else { 26398 pi->tx_rx_cal_radio_saveregs[0] = 26399 read_radio_reg(pi, 26400 RADIO_2056_TX_RXIQCAL_TXMUX | 26401 RADIO_2056_TX0); 26402 pi->tx_rx_cal_radio_saveregs[1] = 26403 read_radio_reg(pi, 26404 RADIO_2056_RX_RXIQCAL_RXMUX | 26405 RADIO_2056_RX1); 26406 26407 if (pi->pubpi.radiorev >= 5) { 26408 pi->tx_rx_cal_radio_saveregs[2] = 26409 read_radio_reg(pi, 26410 RADIO_2056_RX_RXSPARE2 | 26411 RADIO_2056_RX1); 26412 pi->tx_rx_cal_radio_saveregs[3] = 26413 read_radio_reg(pi, 26414 RADIO_2056_TX_TXSPARE2 | 26415 RADIO_2056_TX0); 26416 } 26417 26418 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26419 26420 if (pi->pubpi.radiorev >= 5) { 26421 pi->tx_rx_cal_radio_saveregs[4] = 26422 read_radio_reg( 26423 pi, 26424 RADIO_2056_RX_LNAA_MASTER 26425 | RADIO_2056_RX1); 26426 26427 write_radio_reg( 26428 pi, 26429 RADIO_2056_RX_LNAA_MASTER | 26430 RADIO_2056_RX1, 0x40); 26431 26432 write_radio_reg( 26433 pi, 26434 RADIO_2056_TX_TXSPARE2 26435 | 26436 RADIO_2056_TX0, bias_a); 26437 26438 write_radio_reg( 26439 pi, 26440 RADIO_2056_RX_RXSPARE2 26441 | 26442 RADIO_2056_RX1, bias_a); 26443 } else { 26444 pi->tx_rx_cal_radio_saveregs[4] = 26445 read_radio_reg( 26446 pi, 26447 RADIO_2056_RX_LNAA_TUNE 26448 | RADIO_2056_RX1); 26449 26450 offtune_val = 26451 (pi-> 26452 tx_rx_cal_radio_saveregs[2] & 26453 0xF0) >> 8; 26454 offtune_val = 26455 (offtune_val <= 0x7) ? 0xF : 0; 26456 26457 mod_radio_reg(pi, 26458 RADIO_2056_RX_LNAA_TUNE | 26459 RADIO_2056_RX1, 0xF0, 26460 (offtune_val << 8)); 26461 } 26462 26463 write_radio_reg(pi, 26464 RADIO_2056_TX_RXIQCAL_TXMUX | 26465 RADIO_2056_TX0, 0x9); 26466 write_radio_reg(pi, 26467 RADIO_2056_RX_RXIQCAL_RXMUX | 26468 RADIO_2056_RX1, 0x9); 26469 } else { 26470 if (pi->pubpi.radiorev >= 5) { 26471 pi->tx_rx_cal_radio_saveregs[4] = 26472 read_radio_reg( 26473 pi, 26474 RADIO_2056_RX_LNAG_MASTER 26475 | RADIO_2056_RX1); 26476 26477 write_radio_reg( 26478 pi, 26479 RADIO_2056_RX_LNAG_MASTER 26480 | RADIO_2056_RX1, 0x40); 26481 26482 write_radio_reg( 26483 pi, 26484 RADIO_2056_TX_TXSPARE2 26485 | 26486 RADIO_2056_TX0, bias_g); 26487 26488 write_radio_reg( 26489 pi, 26490 RADIO_2056_RX_RXSPARE2 26491 | 26492 RADIO_2056_RX1, bias_g); 26493 } else { 26494 pi->tx_rx_cal_radio_saveregs[4] = 26495 read_radio_reg( 26496 pi, 26497 RADIO_2056_RX_LNAG_TUNE 26498 | RADIO_2056_RX1); 26499 26500 offtune_val = 26501 (pi-> 26502 tx_rx_cal_radio_saveregs[2] & 26503 0xF0) >> 8; 26504 offtune_val = 26505 (offtune_val <= 0x7) ? 0xF : 0; 26506 26507 mod_radio_reg(pi, 26508 RADIO_2056_RX_LNAG_TUNE | 26509 RADIO_2056_RX1, 0xF0, 26510 (offtune_val << 8)); 26511 } 26512 26513 write_radio_reg(pi, 26514 RADIO_2056_TX_RXIQCAL_TXMUX | 26515 RADIO_2056_TX0, 0x6); 26516 write_radio_reg(pi, 26517 RADIO_2056_RX_RXIQCAL_RXMUX | 26518 RADIO_2056_RX1, 0x6); 26519 } 26520 } 26521 } 26522 } 26523 26524 static void wlc_phy_rxcal_radio_cleanup_nphy(struct brcms_phy *pi, u8 rx_core) 26525 { 26526 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26527 if (rx_core == PHY_CORE_0) { 26528 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26529 write_radio_reg( 26530 pi, 26531 RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP, 26532 pi-> 26533 tx_rx_cal_radio_saveregs[0]); 26534 write_radio_reg( 26535 pi, 26536 RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN, 26537 pi-> 26538 tx_rx_cal_radio_saveregs[1]); 26539 26540 } else { 26541 write_radio_reg( 26542 pi, 26543 RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP, 26544 pi-> 26545 tx_rx_cal_radio_saveregs[0]); 26546 write_radio_reg( 26547 pi, 26548 RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN, 26549 pi-> 26550 tx_rx_cal_radio_saveregs[1]); 26551 } 26552 26553 } else { 26554 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26555 write_radio_reg( 26556 pi, 26557 RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP, 26558 pi-> 26559 tx_rx_cal_radio_saveregs[0]); 26560 write_radio_reg( 26561 pi, 26562 RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN, 26563 pi-> 26564 tx_rx_cal_radio_saveregs[1]); 26565 26566 } else { 26567 write_radio_reg( 26568 pi, 26569 RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP, 26570 pi-> 26571 tx_rx_cal_radio_saveregs[0]); 26572 write_radio_reg( 26573 pi, 26574 RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN, 26575 pi-> 26576 tx_rx_cal_radio_saveregs[1]); 26577 } 26578 } 26579 26580 } else { 26581 if (rx_core == PHY_CORE_0) { 26582 write_radio_reg(pi, 26583 RADIO_2056_TX_RXIQCAL_TXMUX | 26584 RADIO_2056_TX1, 26585 pi->tx_rx_cal_radio_saveregs[0]); 26586 26587 write_radio_reg(pi, 26588 RADIO_2056_RX_RXIQCAL_RXMUX | 26589 RADIO_2056_RX0, 26590 pi->tx_rx_cal_radio_saveregs[1]); 26591 26592 if (pi->pubpi.radiorev >= 5) { 26593 write_radio_reg(pi, 26594 RADIO_2056_RX_RXSPARE2 | 26595 RADIO_2056_RX0, 26596 pi-> 26597 tx_rx_cal_radio_saveregs[2]); 26598 26599 write_radio_reg(pi, 26600 RADIO_2056_TX_TXSPARE2 | 26601 RADIO_2056_TX1, 26602 pi-> 26603 tx_rx_cal_radio_saveregs[3]); 26604 } 26605 26606 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26607 if (pi->pubpi.radiorev >= 5) 26608 write_radio_reg( 26609 pi, 26610 RADIO_2056_RX_LNAA_MASTER 26611 | RADIO_2056_RX0, 26612 pi-> 26613 tx_rx_cal_radio_saveregs 26614 [4]); 26615 else 26616 write_radio_reg( 26617 pi, 26618 RADIO_2056_RX_LNAA_TUNE 26619 | RADIO_2056_RX0, 26620 pi-> 26621 tx_rx_cal_radio_saveregs 26622 [4]); 26623 } else { 26624 if (pi->pubpi.radiorev >= 5) 26625 write_radio_reg( 26626 pi, 26627 RADIO_2056_RX_LNAG_MASTER 26628 | RADIO_2056_RX0, 26629 pi-> 26630 tx_rx_cal_radio_saveregs 26631 [4]); 26632 else 26633 write_radio_reg( 26634 pi, 26635 RADIO_2056_RX_LNAG_TUNE 26636 | RADIO_2056_RX0, 26637 pi-> 26638 tx_rx_cal_radio_saveregs 26639 [4]); 26640 } 26641 26642 } else { 26643 write_radio_reg(pi, 26644 RADIO_2056_TX_RXIQCAL_TXMUX | 26645 RADIO_2056_TX0, 26646 pi->tx_rx_cal_radio_saveregs[0]); 26647 26648 write_radio_reg(pi, 26649 RADIO_2056_RX_RXIQCAL_RXMUX | 26650 RADIO_2056_RX1, 26651 pi->tx_rx_cal_radio_saveregs[1]); 26652 26653 if (pi->pubpi.radiorev >= 5) { 26654 write_radio_reg(pi, 26655 RADIO_2056_RX_RXSPARE2 | 26656 RADIO_2056_RX1, 26657 pi-> 26658 tx_rx_cal_radio_saveregs[2]); 26659 26660 write_radio_reg(pi, 26661 RADIO_2056_TX_TXSPARE2 | 26662 RADIO_2056_TX0, 26663 pi-> 26664 tx_rx_cal_radio_saveregs[3]); 26665 } 26666 26667 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26668 if (pi->pubpi.radiorev >= 5) 26669 write_radio_reg( 26670 pi, 26671 RADIO_2056_RX_LNAA_MASTER 26672 | RADIO_2056_RX1, 26673 pi-> 26674 tx_rx_cal_radio_saveregs 26675 [4]); 26676 else 26677 write_radio_reg( 26678 pi, 26679 RADIO_2056_RX_LNAA_TUNE 26680 | RADIO_2056_RX1, 26681 pi-> 26682 tx_rx_cal_radio_saveregs 26683 [4]); 26684 } else { 26685 if (pi->pubpi.radiorev >= 5) 26686 write_radio_reg( 26687 pi, 26688 RADIO_2056_RX_LNAG_MASTER 26689 | RADIO_2056_RX1, 26690 pi-> 26691 tx_rx_cal_radio_saveregs 26692 [4]); 26693 else 26694 write_radio_reg( 26695 pi, 26696 RADIO_2056_RX_LNAG_TUNE 26697 | RADIO_2056_RX1, 26698 pi-> 26699 tx_rx_cal_radio_saveregs 26700 [4]); 26701 } 26702 } 26703 } 26704 } 26705 26706 static void wlc_phy_rxcal_physetup_nphy(struct brcms_phy *pi, u8 rx_core) 26707 { 26708 u8 tx_core; 26709 u16 rx_antval, tx_antval; 26710 26711 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26712 tx_core = rx_core; 26713 else 26714 tx_core = (rx_core == PHY_CORE_0) ? 1 : 0; 26715 26716 pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa2); 26717 pi->tx_rx_cal_phy_saveregs[1] = 26718 read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 0xa7); 26719 pi->tx_rx_cal_phy_saveregs[2] = 26720 read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5); 26721 pi->tx_rx_cal_phy_saveregs[3] = read_phy_reg(pi, 0x91); 26722 pi->tx_rx_cal_phy_saveregs[4] = read_phy_reg(pi, 0x92); 26723 pi->tx_rx_cal_phy_saveregs[5] = read_phy_reg(pi, 0x7a); 26724 pi->tx_rx_cal_phy_saveregs[6] = read_phy_reg(pi, 0x7d); 26725 pi->tx_rx_cal_phy_saveregs[7] = read_phy_reg(pi, 0xe7); 26726 pi->tx_rx_cal_phy_saveregs[8] = read_phy_reg(pi, 0xec); 26727 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26728 pi->tx_rx_cal_phy_saveregs[11] = read_phy_reg(pi, 0x342); 26729 pi->tx_rx_cal_phy_saveregs[12] = read_phy_reg(pi, 0x343); 26730 pi->tx_rx_cal_phy_saveregs[13] = read_phy_reg(pi, 0x346); 26731 pi->tx_rx_cal_phy_saveregs[14] = read_phy_reg(pi, 0x347); 26732 } 26733 26734 pi->tx_rx_cal_phy_saveregs[9] = read_phy_reg(pi, 0x297); 26735 pi->tx_rx_cal_phy_saveregs[10] = read_phy_reg(pi, 0x29b); 26736 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 26737 0x29b, (0x1 << 0), (0) << 0); 26738 26739 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 26740 0x29b, (0x1 << 0), (0) << 0); 26741 26742 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26743 26744 mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); 26745 26746 mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << (1 - rx_core)) << 12); 26747 26748 } else { 26749 26750 mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << tx_core) << 12); 26751 mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); 26752 mod_phy_reg(pi, 0xa2, (0xf << 4), (1 << rx_core) << 4); 26753 mod_phy_reg(pi, 0xa2, (0xf << 8), (1 << rx_core) << 8); 26754 } 26755 26756 mod_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), (0x1 << 2), 0); 26757 mod_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5, 26758 (0x1 << 2), (0x1 << 2)); 26759 if (NREV_LT(pi->pubpi.phy_rev, 7)) { 26760 mod_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), 26761 (0x1 << 0) | (0x1 << 1), 0); 26762 mod_phy_reg(pi, (rx_core == PHY_CORE_0) ? 26763 0x8f : 0xa5, 26764 (0x1 << 0) | (0x1 << 1), (0x1 << 0) | (0x1 << 1)); 26765 } 26766 26767 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_PA, 0, 26768 RADIO_MIMO_CORESEL_CORE1 | 26769 RADIO_MIMO_CORESEL_CORE2); 26770 26771 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26772 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 26773 0, 0, 0, 26774 NPHY_REV7_RFCTRLOVERRIDE_ID0); 26775 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 0, 0, 0, 26776 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26777 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 1, 0, 0, 26778 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26779 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 1, 0, 0, 26780 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26781 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 0, 0, 26782 NPHY_REV7_RFCTRLOVERRIDE_ID2); 26783 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, 0, 0, 26784 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26785 if (CHSPEC_IS40(pi->radio_chanspec)) 26786 wlc_phy_rfctrl_override_nphy_rev7( 26787 pi, 26788 (0x1 << 7), 26789 2, 0, 0, 26790 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26791 else 26792 wlc_phy_rfctrl_override_nphy_rev7( 26793 pi, 26794 (0x1 << 7), 26795 0, 0, 0, 26796 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26797 26798 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), 26799 0, 0, 0, 26800 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26801 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 0, 0, 0, 26802 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26803 } else { 26804 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 3, 0); 26805 } 26806 26807 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX); 26808 26809 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26810 26811 wlc_phy_rfctrlintc_override_nphy(pi, 26812 NPHY_RfctrlIntc_override_TRSW, 26813 0x1, rx_core + 1); 26814 } else { 26815 26816 if (rx_core == PHY_CORE_0) { 26817 rx_antval = 0x1; 26818 tx_antval = 0x8; 26819 } else { 26820 rx_antval = 0x4; 26821 tx_antval = 0x2; 26822 } 26823 26824 wlc_phy_rfctrlintc_override_nphy(pi, 26825 NPHY_RfctrlIntc_override_TRSW, 26826 rx_antval, rx_core + 1); 26827 wlc_phy_rfctrlintc_override_nphy(pi, 26828 NPHY_RfctrlIntc_override_TRSW, 26829 tx_antval, tx_core + 1); 26830 } 26831 } 26832 26833 static void wlc_phy_rxcal_phycleanup_nphy(struct brcms_phy *pi, u8 rx_core) 26834 { 26835 26836 write_phy_reg(pi, 0xa2, pi->tx_rx_cal_phy_saveregs[0]); 26837 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 0xa7, 26838 pi->tx_rx_cal_phy_saveregs[1]); 26839 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5, 26840 pi->tx_rx_cal_phy_saveregs[2]); 26841 write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[3]); 26842 write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[4]); 26843 26844 write_phy_reg(pi, 0x7a, pi->tx_rx_cal_phy_saveregs[5]); 26845 write_phy_reg(pi, 0x7d, pi->tx_rx_cal_phy_saveregs[6]); 26846 write_phy_reg(pi, 0xe7, pi->tx_rx_cal_phy_saveregs[7]); 26847 write_phy_reg(pi, 0xec, pi->tx_rx_cal_phy_saveregs[8]); 26848 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26849 write_phy_reg(pi, 0x342, pi->tx_rx_cal_phy_saveregs[11]); 26850 write_phy_reg(pi, 0x343, pi->tx_rx_cal_phy_saveregs[12]); 26851 write_phy_reg(pi, 0x346, pi->tx_rx_cal_phy_saveregs[13]); 26852 write_phy_reg(pi, 0x347, pi->tx_rx_cal_phy_saveregs[14]); 26853 } 26854 26855 write_phy_reg(pi, 0x297, pi->tx_rx_cal_phy_saveregs[9]); 26856 write_phy_reg(pi, 0x29b, pi->tx_rx_cal_phy_saveregs[10]); 26857 } 26858 26859 static void 26860 wlc_phy_rxcal_gainctrl_nphy_rev5(struct brcms_phy *pi, u8 rx_core, 26861 u16 *rxgain, u8 cal_type) 26862 { 26863 26864 u16 num_samps; 26865 struct phy_iq_est est[PHY_CORE_MAX]; 26866 u8 tx_core; 26867 struct nphy_iq_comp save_comp, zero_comp; 26868 u32 i_pwr, q_pwr, curr_pwr, optim_pwr = 0, prev_pwr = 0, 26869 thresh_pwr = 10000; 26870 s16 desired_log2_pwr, actual_log2_pwr, delta_pwr; 26871 bool gainctrl_done = false; 26872 u8 mix_tia_gain = 3; 26873 s8 optim_gaintbl_index = 0, prev_gaintbl_index = 0; 26874 s8 curr_gaintbl_index = 3; 26875 u8 gainctrl_dirn = NPHY_RXCAL_GAIN_INIT; 26876 const struct nphy_ipa_txrxgain *nphy_rxcal_gaintbl; 26877 u16 hpvga, lpf_biq1, lpf_biq0, lna2, lna1; 26878 int fine_gain_idx; 26879 s8 txpwrindex; 26880 u16 nphy_rxcal_txgain[2]; 26881 26882 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26883 tx_core = rx_core; 26884 else 26885 tx_core = 1 - rx_core; 26886 26887 num_samps = 1024; 26888 desired_log2_pwr = 13; 26889 26890 wlc_phy_rx_iq_coeffs_nphy(pi, 0, &save_comp); 26891 zero_comp.a0 = zero_comp.b0 = zero_comp.a1 = zero_comp.b1 = 0x0; 26892 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &zero_comp); 26893 26894 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26895 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26896 mix_tia_gain = 3; 26897 else if (NREV_GE(pi->pubpi.phy_rev, 4)) 26898 mix_tia_gain = 4; 26899 else 26900 mix_tia_gain = 6; 26901 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26902 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_5GHz_rev7; 26903 else 26904 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_5GHz; 26905 } else { 26906 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26907 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_2GHz_rev7; 26908 else 26909 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_2GHz; 26910 } 26911 26912 do { 26913 26914 hpvga = (NREV_GE(pi->pubpi.phy_rev, 7)) ? 26915 0 : nphy_rxcal_gaintbl[curr_gaintbl_index].hpvga; 26916 lpf_biq1 = nphy_rxcal_gaintbl[curr_gaintbl_index].lpf_biq1; 26917 lpf_biq0 = nphy_rxcal_gaintbl[curr_gaintbl_index].lpf_biq0; 26918 lna2 = nphy_rxcal_gaintbl[curr_gaintbl_index].lna2; 26919 lna1 = nphy_rxcal_gaintbl[curr_gaintbl_index].lna1; 26920 txpwrindex = nphy_rxcal_gaintbl[curr_gaintbl_index].txpwrindex; 26921 26922 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26923 wlc_phy_rfctrl_override_1tomany_nphy( 26924 pi, 26925 NPHY_REV7_RfctrlOverride_cmd_rxgain, 26926 ((lpf_biq1 << 12) | 26927 (lpf_biq0 << 8) | 26928 (mix_tia_gain << 4) | (lna2 << 2) 26929 | lna1), 0x3, 0); 26930 else 26931 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 26932 ((hpvga << 12) | 26933 (lpf_biq1 << 10) | 26934 (lpf_biq0 << 8) | 26935 (mix_tia_gain << 4) | 26936 (lna2 << 2) | lna1), 0x3, 26937 0); 26938 26939 pi->nphy_rxcal_pwr_idx[tx_core] = txpwrindex; 26940 26941 if (txpwrindex == -1) { 26942 nphy_rxcal_txgain[0] = 0x8ff0 | pi->nphy_gmval; 26943 nphy_rxcal_txgain[1] = 0x8ff0 | pi->nphy_gmval; 26944 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 26945 2, 0x110, 16, 26946 nphy_rxcal_txgain); 26947 } else { 26948 wlc_phy_txpwr_index_nphy(pi, tx_core + 1, txpwrindex, 26949 false); 26950 } 26951 26952 wlc_phy_tx_tone_nphy(pi, (CHSPEC_IS40(pi->radio_chanspec)) ? 26953 NPHY_RXCAL_TONEFREQ_40MHz : 26954 NPHY_RXCAL_TONEFREQ_20MHz, 26955 NPHY_RXCAL_TONEAMP, 0, cal_type, false); 26956 26957 wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); 26958 i_pwr = DIV_ROUND_CLOSEST(est[rx_core].i_pwr, num_samps); 26959 q_pwr = DIV_ROUND_CLOSEST(est[rx_core].q_pwr, num_samps); 26960 curr_pwr = i_pwr + q_pwr; 26961 26962 switch (gainctrl_dirn) { 26963 case NPHY_RXCAL_GAIN_INIT: 26964 if (curr_pwr > thresh_pwr) { 26965 gainctrl_dirn = NPHY_RXCAL_GAIN_DOWN; 26966 prev_gaintbl_index = curr_gaintbl_index; 26967 curr_gaintbl_index--; 26968 } else { 26969 gainctrl_dirn = NPHY_RXCAL_GAIN_UP; 26970 prev_gaintbl_index = curr_gaintbl_index; 26971 curr_gaintbl_index++; 26972 } 26973 break; 26974 26975 case NPHY_RXCAL_GAIN_UP: 26976 if (curr_pwr > thresh_pwr) { 26977 gainctrl_done = true; 26978 optim_pwr = prev_pwr; 26979 optim_gaintbl_index = prev_gaintbl_index; 26980 } else { 26981 prev_gaintbl_index = curr_gaintbl_index; 26982 curr_gaintbl_index++; 26983 } 26984 break; 26985 26986 case NPHY_RXCAL_GAIN_DOWN: 26987 if (curr_pwr > thresh_pwr) { 26988 prev_gaintbl_index = curr_gaintbl_index; 26989 curr_gaintbl_index--; 26990 } else { 26991 gainctrl_done = true; 26992 optim_pwr = curr_pwr; 26993 optim_gaintbl_index = curr_gaintbl_index; 26994 } 26995 break; 26996 26997 default: 26998 break; 26999 } 27000 27001 if ((curr_gaintbl_index < 0) || 27002 (curr_gaintbl_index > NPHY_IPA_RXCAL_MAXGAININDEX)) { 27003 gainctrl_done = true; 27004 optim_pwr = curr_pwr; 27005 optim_gaintbl_index = prev_gaintbl_index; 27006 } else { 27007 prev_pwr = curr_pwr; 27008 } 27009 27010 wlc_phy_stopplayback_nphy(pi); 27011 } while (!gainctrl_done); 27012 27013 hpvga = nphy_rxcal_gaintbl[optim_gaintbl_index].hpvga; 27014 lpf_biq1 = nphy_rxcal_gaintbl[optim_gaintbl_index].lpf_biq1; 27015 lpf_biq0 = nphy_rxcal_gaintbl[optim_gaintbl_index].lpf_biq0; 27016 lna2 = nphy_rxcal_gaintbl[optim_gaintbl_index].lna2; 27017 lna1 = nphy_rxcal_gaintbl[optim_gaintbl_index].lna1; 27018 txpwrindex = nphy_rxcal_gaintbl[optim_gaintbl_index].txpwrindex; 27019 27020 actual_log2_pwr = wlc_phy_nbits(optim_pwr); 27021 delta_pwr = desired_log2_pwr - actual_log2_pwr; 27022 27023 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 27024 fine_gain_idx = (int)lpf_biq1 + delta_pwr; 27025 27026 if (fine_gain_idx + (int)lpf_biq0 > 10) 27027 lpf_biq1 = 10 - lpf_biq0; 27028 else 27029 lpf_biq1 = (u16) max(fine_gain_idx, 0); 27030 27031 wlc_phy_rfctrl_override_1tomany_nphy( 27032 pi, 27033 NPHY_REV7_RfctrlOverride_cmd_rxgain, 27034 ((lpf_biq1 << 12) | 27035 (lpf_biq0 << 8) | 27036 (mix_tia_gain << 4) | 27037 (lna2 << 2) | lna1), 0x3, 27038 0); 27039 } else { 27040 hpvga = (u16) max(min(((int)hpvga) + delta_pwr, 10), 0); 27041 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 27042 ((hpvga << 12) | 27043 (lpf_biq1 << 10) | 27044 (lpf_biq0 << 8) | 27045 (mix_tia_gain << 4) | 27046 (lna2 << 2) | 27047 lna1), 0x3, 0); 27048 } 27049 27050 if (rxgain != NULL) { 27051 *rxgain++ = lna1; 27052 *rxgain++ = lna2; 27053 *rxgain++ = mix_tia_gain; 27054 *rxgain++ = lpf_biq0; 27055 *rxgain++ = lpf_biq1; 27056 *rxgain = hpvga; 27057 } 27058 27059 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &save_comp); 27060 } 27061 27062 static void 27063 wlc_phy_rxcal_gainctrl_nphy(struct brcms_phy *pi, u8 rx_core, u16 *rxgain, 27064 u8 cal_type) 27065 { 27066 wlc_phy_rxcal_gainctrl_nphy_rev5(pi, rx_core, rxgain, cal_type); 27067 } 27068 27069 static u8 27070 wlc_phy_rc_sweep_nphy(struct brcms_phy *pi, u8 core_idx, u8 loopback_type) 27071 { 27072 u32 target_bws[2] = { 9500, 21000 }; 27073 u32 ref_tones[2] = { 3000, 6000 }; 27074 u32 target_bw, ref_tone; 27075 27076 u32 target_pwr_ratios[2] = { 28606, 18468 }; 27077 u32 target_pwr_ratio, pwr_ratio, last_pwr_ratio = 0; 27078 27079 u16 start_rccal_ovr_val = 128; 27080 u16 txlpf_rccal_lpc_ovr_val = 128; 27081 u16 rxlpf_rccal_hpc_ovr_val = 159; 27082 27083 u16 orig_txlpf_rccal_lpc_ovr_val; 27084 u16 orig_rxlpf_rccal_hpc_ovr_val; 27085 u16 radio_addr_offset_rx; 27086 u16 radio_addr_offset_tx; 27087 u16 orig_dcBypass; 27088 u16 orig_RxStrnFilt40Num[6]; 27089 u16 orig_RxStrnFilt40Den[4]; 27090 u16 orig_rfctrloverride[2]; 27091 u16 orig_rfctrlauxreg[2]; 27092 u16 orig_rfctrlrssiothers; 27093 u16 tx_lpf_bw = 4; 27094 27095 u16 rx_lpf_bw, rx_lpf_bws[2] = { 2, 4 }; 27096 u16 lpf_hpc = 7, hpvga_hpc = 7; 27097 27098 s8 rccal_stepsize; 27099 u16 rccal_val, last_rccal_val = 0, best_rccal_val = 0; 27100 u32 ref_iq_vals = 0, target_iq_vals = 0; 27101 u16 num_samps, log_num_samps = 10; 27102 struct phy_iq_est est[PHY_CORE_MAX]; 27103 27104 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27105 return 0; 27106 27107 num_samps = (1 << log_num_samps); 27108 27109 if (CHSPEC_IS40(pi->radio_chanspec)) { 27110 target_bw = target_bws[1]; 27111 target_pwr_ratio = target_pwr_ratios[1]; 27112 ref_tone = ref_tones[1]; 27113 rx_lpf_bw = rx_lpf_bws[1]; 27114 } else { 27115 target_bw = target_bws[0]; 27116 target_pwr_ratio = target_pwr_ratios[0]; 27117 ref_tone = ref_tones[0]; 27118 rx_lpf_bw = rx_lpf_bws[0]; 27119 } 27120 27121 if (core_idx == 0) { 27122 radio_addr_offset_rx = RADIO_2056_RX0; 27123 radio_addr_offset_tx = 27124 (loopback_type == 0) ? RADIO_2056_TX0 : RADIO_2056_TX1; 27125 } else { 27126 radio_addr_offset_rx = RADIO_2056_RX1; 27127 radio_addr_offset_tx = 27128 (loopback_type == 0) ? RADIO_2056_TX1 : RADIO_2056_TX0; 27129 } 27130 27131 orig_txlpf_rccal_lpc_ovr_val = 27132 read_radio_reg(pi, 27133 (RADIO_2056_TX_TXLPF_RCCAL | 27134 radio_addr_offset_tx)); 27135 orig_rxlpf_rccal_hpc_ovr_val = 27136 read_radio_reg(pi, 27137 (RADIO_2056_RX_RXLPF_RCCAL_HPC | 27138 radio_addr_offset_rx)); 27139 27140 orig_dcBypass = ((read_phy_reg(pi, 0x48) >> 8) & 1); 27141 27142 orig_RxStrnFilt40Num[0] = read_phy_reg(pi, 0x267); 27143 orig_RxStrnFilt40Num[1] = read_phy_reg(pi, 0x268); 27144 orig_RxStrnFilt40Num[2] = read_phy_reg(pi, 0x269); 27145 orig_RxStrnFilt40Den[0] = read_phy_reg(pi, 0x26a); 27146 orig_RxStrnFilt40Den[1] = read_phy_reg(pi, 0x26b); 27147 orig_RxStrnFilt40Num[3] = read_phy_reg(pi, 0x26c); 27148 orig_RxStrnFilt40Num[4] = read_phy_reg(pi, 0x26d); 27149 orig_RxStrnFilt40Num[5] = read_phy_reg(pi, 0x26e); 27150 orig_RxStrnFilt40Den[2] = read_phy_reg(pi, 0x26f); 27151 orig_RxStrnFilt40Den[3] = read_phy_reg(pi, 0x270); 27152 27153 orig_rfctrloverride[0] = read_phy_reg(pi, 0xe7); 27154 orig_rfctrloverride[1] = read_phy_reg(pi, 0xec); 27155 orig_rfctrlauxreg[0] = read_phy_reg(pi, 0xf8); 27156 orig_rfctrlauxreg[1] = read_phy_reg(pi, 0xfa); 27157 orig_rfctrlrssiothers = read_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d); 27158 27159 write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx), 27160 txlpf_rccal_lpc_ovr_val); 27161 27162 write_radio_reg(pi, 27163 (RADIO_2056_RX_RXLPF_RCCAL_HPC | radio_addr_offset_rx), 27164 rxlpf_rccal_hpc_ovr_val); 27165 27166 mod_phy_reg(pi, 0x48, (0x1 << 8), (0x1 << 8)); 27167 27168 write_phy_reg(pi, 0x267, 0x02d4); 27169 write_phy_reg(pi, 0x268, 0x0000); 27170 write_phy_reg(pi, 0x269, 0x0000); 27171 write_phy_reg(pi, 0x26a, 0x0000); 27172 write_phy_reg(pi, 0x26b, 0x0000); 27173 write_phy_reg(pi, 0x26c, 0x02d4); 27174 write_phy_reg(pi, 0x26d, 0x0000); 27175 write_phy_reg(pi, 0x26e, 0x0000); 27176 write_phy_reg(pi, 0x26f, 0x0000); 27177 write_phy_reg(pi, 0x270, 0x0000); 27178 27179 or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 8)); 27180 or_phy_reg(pi, (core_idx == 0) ? 0xec : 0xe7, (0x1 << 15)); 27181 or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 9)); 27182 or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 10)); 27183 27184 mod_phy_reg(pi, (core_idx == 0) ? 0xfa : 0xf8, 27185 (0x7 << 10), (tx_lpf_bw << 10)); 27186 mod_phy_reg(pi, (core_idx == 0) ? 0xf8 : 0xfa, 27187 (0x7 << 0), (hpvga_hpc << 0)); 27188 mod_phy_reg(pi, (core_idx == 0) ? 0xf8 : 0xfa, 27189 (0x7 << 4), (lpf_hpc << 4)); 27190 mod_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d, 27191 (0x7 << 8), (rx_lpf_bw << 8)); 27192 27193 rccal_stepsize = 16; 27194 rccal_val = start_rccal_ovr_val + rccal_stepsize; 27195 27196 while (rccal_stepsize >= 0) { 27197 write_radio_reg(pi, 27198 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 27199 radio_addr_offset_rx), rccal_val); 27200 27201 if (rccal_stepsize == 16) { 27202 27203 wlc_phy_tx_tone_nphy(pi, ref_tone, NPHY_RXCAL_TONEAMP, 27204 0, 1, false); 27205 udelay(2); 27206 27207 wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); 27208 27209 if (core_idx == 0) 27210 ref_iq_vals = 27211 max_t(u32, (est[0].i_pwr + 27212 est[0].q_pwr) >> 27213 (log_num_samps + 1), 27214 1); 27215 else 27216 ref_iq_vals = 27217 max_t(u32, (est[1].i_pwr + 27218 est[1].q_pwr) >> 27219 (log_num_samps + 1), 27220 1); 27221 27222 wlc_phy_tx_tone_nphy(pi, target_bw, NPHY_RXCAL_TONEAMP, 27223 0, 1, false); 27224 udelay(2); 27225 } 27226 27227 wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); 27228 27229 if (core_idx == 0) 27230 target_iq_vals = (est[0].i_pwr + est[0].q_pwr) >> 27231 (log_num_samps + 1); 27232 else 27233 target_iq_vals = 27234 (est[1].i_pwr + 27235 est[1].q_pwr) >> (log_num_samps + 1); 27236 27237 pwr_ratio = (uint) ((target_iq_vals << 16) / ref_iq_vals); 27238 27239 if (rccal_stepsize == 0) 27240 rccal_stepsize--; 27241 else if (rccal_stepsize == 1) { 27242 last_rccal_val = rccal_val; 27243 rccal_val += (pwr_ratio > target_pwr_ratio) ? 1 : -1; 27244 last_pwr_ratio = pwr_ratio; 27245 rccal_stepsize--; 27246 } else { 27247 rccal_stepsize = (rccal_stepsize >> 1); 27248 rccal_val += ((pwr_ratio > target_pwr_ratio) ? 27249 rccal_stepsize : (-rccal_stepsize)); 27250 } 27251 27252 if (rccal_stepsize == -1) { 27253 best_rccal_val = 27254 (abs((int)last_pwr_ratio - 27255 (int)target_pwr_ratio) < 27256 abs((int)pwr_ratio - 27257 (int)target_pwr_ratio)) ? last_rccal_val : 27258 rccal_val; 27259 27260 if (CHSPEC_IS40(pi->radio_chanspec)) { 27261 if ((best_rccal_val > 140) 27262 || (best_rccal_val < 135)) 27263 best_rccal_val = 138; 27264 } else { 27265 if ((best_rccal_val > 142) 27266 || (best_rccal_val < 137)) 27267 best_rccal_val = 140; 27268 } 27269 27270 write_radio_reg(pi, 27271 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 27272 radio_addr_offset_rx), best_rccal_val); 27273 } 27274 } 27275 27276 wlc_phy_stopplayback_nphy(pi); 27277 27278 write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx), 27279 orig_txlpf_rccal_lpc_ovr_val); 27280 write_radio_reg(pi, 27281 (RADIO_2056_RX_RXLPF_RCCAL_HPC | radio_addr_offset_rx), 27282 orig_rxlpf_rccal_hpc_ovr_val); 27283 27284 mod_phy_reg(pi, 0x48, (0x1 << 8), (orig_dcBypass << 8)); 27285 27286 write_phy_reg(pi, 0x267, orig_RxStrnFilt40Num[0]); 27287 write_phy_reg(pi, 0x268, orig_RxStrnFilt40Num[1]); 27288 write_phy_reg(pi, 0x269, orig_RxStrnFilt40Num[2]); 27289 write_phy_reg(pi, 0x26a, orig_RxStrnFilt40Den[0]); 27290 write_phy_reg(pi, 0x26b, orig_RxStrnFilt40Den[1]); 27291 write_phy_reg(pi, 0x26c, orig_RxStrnFilt40Num[3]); 27292 write_phy_reg(pi, 0x26d, orig_RxStrnFilt40Num[4]); 27293 write_phy_reg(pi, 0x26e, orig_RxStrnFilt40Num[5]); 27294 write_phy_reg(pi, 0x26f, orig_RxStrnFilt40Den[2]); 27295 write_phy_reg(pi, 0x270, orig_RxStrnFilt40Den[3]); 27296 27297 write_phy_reg(pi, 0xe7, orig_rfctrloverride[0]); 27298 write_phy_reg(pi, 0xec, orig_rfctrloverride[1]); 27299 write_phy_reg(pi, 0xf8, orig_rfctrlauxreg[0]); 27300 write_phy_reg(pi, 0xfa, orig_rfctrlauxreg[1]); 27301 write_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d, orig_rfctrlrssiothers); 27302 27303 pi->nphy_anarxlpf_adjusted = false; 27304 27305 return best_rccal_val - 0x80; 27306 } 27307 27308 #define WAIT_FOR_SCOPE 4000 27309 static int wlc_phy_cal_rxiq_nphy_rev3(struct brcms_phy *pi, 27310 struct nphy_txgains target_gain, 27311 u8 cal_type, bool debug) 27312 { 27313 u16 orig_BBConfig; 27314 u8 core_no, rx_core; 27315 u8 best_rccal[2]; 27316 u16 gain_save[2]; 27317 u16 cal_gain[2]; 27318 struct nphy_iqcal_params cal_params[2]; 27319 u8 rxcore_state; 27320 s8 rxlpf_rccal_hpc, txlpf_rccal_lpc; 27321 s8 txlpf_idac; 27322 bool phyhang_avoid_state = false; 27323 bool skip_rxiqcal = false; 27324 27325 orig_BBConfig = read_phy_reg(pi, 0x01); 27326 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 27327 27328 wlc_phy_stay_in_carriersearch_nphy(pi, true); 27329 27330 if (NREV_GE(pi->pubpi.phy_rev, 4)) { 27331 phyhang_avoid_state = pi->phyhang_avoid; 27332 pi->phyhang_avoid = false; 27333 } 27334 27335 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); 27336 27337 for (core_no = 0; core_no <= 1; core_no++) { 27338 wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, 27339 &cal_params[core_no]); 27340 cal_gain[core_no] = cal_params[core_no].cal_gain; 27341 } 27342 27343 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); 27344 27345 rxcore_state = wlc_phy_rxcore_getstate_nphy( 27346 (struct brcms_phy_pub *) pi); 27347 27348 for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { 27349 27350 skip_rxiqcal = 27351 ((rxcore_state & (1 << rx_core)) == 0) ? true : false; 27352 27353 wlc_phy_rxcal_physetup_nphy(pi, rx_core); 27354 27355 wlc_phy_rxcal_radio_setup_nphy(pi, rx_core); 27356 27357 if ((!skip_rxiqcal) && ((cal_type == 0) || (cal_type == 2))) { 27358 27359 wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, 0); 27360 27361 wlc_phy_tx_tone_nphy(pi, 27362 (CHSPEC_IS40( 27363 pi->radio_chanspec)) ? 27364 NPHY_RXCAL_TONEFREQ_40MHz : 27365 NPHY_RXCAL_TONEFREQ_20MHz, 27366 NPHY_RXCAL_TONEAMP, 0, cal_type, 27367 false); 27368 27369 if (debug) 27370 mdelay(WAIT_FOR_SCOPE); 27371 27372 wlc_phy_calc_rx_iq_comp_nphy(pi, rx_core + 1); 27373 wlc_phy_stopplayback_nphy(pi); 27374 } 27375 27376 if (((cal_type == 1) || (cal_type == 2)) 27377 && NREV_LT(pi->pubpi.phy_rev, 7)) { 27378 27379 if (rx_core == PHY_CORE_1) { 27380 27381 if (rxcore_state == 1) 27382 wlc_phy_rxcore_setstate_nphy( 27383 (struct brcms_phy_pub *) pi, 3); 27384 27385 wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, 27386 1); 27387 27388 best_rccal[rx_core] = 27389 wlc_phy_rc_sweep_nphy(pi, rx_core, 1); 27390 pi->nphy_rccal_value = best_rccal[rx_core]; 27391 27392 if (rxcore_state == 1) 27393 wlc_phy_rxcore_setstate_nphy( 27394 (struct brcms_phy_pub *) pi, 27395 rxcore_state); 27396 } 27397 } 27398 27399 wlc_phy_rxcal_radio_cleanup_nphy(pi, rx_core); 27400 27401 wlc_phy_rxcal_phycleanup_nphy(pi, rx_core); 27402 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27403 } 27404 27405 if ((cal_type == 1) || (cal_type == 2)) { 27406 27407 best_rccal[0] = best_rccal[1]; 27408 write_radio_reg(pi, 27409 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 27410 RADIO_2056_RX0), (best_rccal[0] | 0x80)); 27411 27412 for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { 27413 rxlpf_rccal_hpc = 27414 (((int)best_rccal[rx_core] - 12) >> 1) + 10; 27415 txlpf_rccal_lpc = ((int)best_rccal[rx_core] - 12) + 10; 27416 27417 if (PHY_IPA(pi)) { 27418 txlpf_rccal_lpc += 27419 (pi->bw == WL_CHANSPEC_BW_40) ? 24 : 12; 27420 txlpf_idac = (pi->bw == WL_CHANSPEC_BW_40) ? 27421 0x0e : 0x13; 27422 WRITE_RADIO_REG2(pi, RADIO_2056, TX, rx_core, 27423 TXLPF_IDAC_4, txlpf_idac); 27424 } 27425 27426 rxlpf_rccal_hpc = max(min_t(u8, rxlpf_rccal_hpc, 31), 27427 0); 27428 txlpf_rccal_lpc = max(min_t(u8, txlpf_rccal_lpc, 31), 27429 0); 27430 27431 write_radio_reg(pi, (RADIO_2056_RX_RXLPF_RCCAL_HPC | 27432 ((rx_core == 27433 PHY_CORE_0) ? RADIO_2056_RX0 : 27434 RADIO_2056_RX1)), 27435 (rxlpf_rccal_hpc | 0x80)); 27436 27437 write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | 27438 ((rx_core == 27439 PHY_CORE_0) ? RADIO_2056_TX0 : 27440 RADIO_2056_TX1)), 27441 (txlpf_rccal_lpc | 0x80)); 27442 } 27443 } 27444 27445 write_phy_reg(pi, 0x01, orig_BBConfig); 27446 27447 wlc_phy_resetcca_nphy(pi); 27448 27449 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27450 wlc_phy_rfctrl_override_1tomany_nphy( 27451 pi, 27452 NPHY_REV7_RfctrlOverride_cmd_rxgain, 27453 0, 0x3, 1); 27454 else 27455 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 1); 27456 27457 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27458 27459 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 27460 gain_save); 27461 27462 if (NREV_GE(pi->pubpi.phy_rev, 4)) 27463 pi->phyhang_avoid = phyhang_avoid_state; 27464 27465 wlc_phy_stay_in_carriersearch_nphy(pi, false); 27466 27467 return 0; 27468 } 27469 27470 static int 27471 wlc_phy_cal_rxiq_nphy_rev2(struct brcms_phy *pi, 27472 struct nphy_txgains target_gain, bool debug) 27473 { 27474 struct phy_iq_est est[PHY_CORE_MAX]; 27475 u8 core_num, rx_core, tx_core; 27476 u16 lna_vals[] = { 0x3, 0x3, 0x1 }; 27477 u16 hpf1_vals[] = { 0x7, 0x2, 0x0 }; 27478 u16 hpf2_vals[] = { 0x2, 0x0, 0x0 }; 27479 s16 curr_hpf1, curr_hpf2, curr_hpf, curr_lna; 27480 s16 desired_log2_pwr, actual_log2_pwr, hpf_change; 27481 u16 orig_RfseqCoreActv, orig_AfectrlCore, orig_AfectrlOverride; 27482 u16 orig_RfctrlIntcRx, orig_RfctrlIntcTx; 27483 u16 num_samps; 27484 u32 i_pwr, q_pwr, tot_pwr[3]; 27485 u8 gain_pass, use_hpf_num; 27486 u16 mask, val1, val2; 27487 u16 core_no; 27488 u16 gain_save[2]; 27489 u16 cal_gain[2]; 27490 struct nphy_iqcal_params cal_params[2]; 27491 u8 phy_bw; 27492 int bcmerror = 0; 27493 bool first_playtone = true; 27494 27495 wlc_phy_stay_in_carriersearch_nphy(pi, true); 27496 27497 if (NREV_LT(pi->pubpi.phy_rev, 2)) 27498 wlc_phy_reapply_txcal_coeffs_nphy(pi); 27499 27500 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); 27501 27502 for (core_no = 0; core_no <= 1; core_no++) { 27503 wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, 27504 &cal_params[core_no]); 27505 cal_gain[core_no] = cal_params[core_no].cal_gain; 27506 } 27507 27508 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); 27509 27510 num_samps = 1024; 27511 desired_log2_pwr = 13; 27512 27513 for (core_num = 0; core_num < 2; core_num++) { 27514 27515 rx_core = core_num; 27516 tx_core = 1 - core_num; 27517 27518 orig_RfseqCoreActv = read_phy_reg(pi, 0xa2); 27519 orig_AfectrlCore = read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 27520 0xa6 : 0xa7); 27521 orig_AfectrlOverride = read_phy_reg(pi, 0xa5); 27522 orig_RfctrlIntcRx = read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 27523 0x91 : 0x92); 27524 orig_RfctrlIntcTx = read_phy_reg(pi, (tx_core == PHY_CORE_0) ? 27525 0x91 : 0x92); 27526 27527 mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << tx_core) << 12); 27528 mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); 27529 27530 or_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), 27531 ((0x1 << 1) | (0x1 << 2))); 27532 or_phy_reg(pi, 0xa5, ((0x1 << 1) | (0x1 << 2))); 27533 27534 if (((pi->nphy_rxcalparams) & 0xff000000)) 27535 write_phy_reg(pi, 27536 (rx_core == PHY_CORE_0) ? 0x91 : 0x92, 27537 (CHSPEC_IS5G(pi->radio_chanspec) ? 27538 0x140 : 0x110)); 27539 else 27540 write_phy_reg(pi, 27541 (rx_core == PHY_CORE_0) ? 0x91 : 0x92, 27542 (CHSPEC_IS5G(pi->radio_chanspec) ? 27543 0x180 : 0x120)); 27544 27545 write_phy_reg(pi, (tx_core == PHY_CORE_0) ? 0x91 : 0x92, 27546 (CHSPEC_IS5G(pi->radio_chanspec) ? 0x148 : 27547 0x114)); 27548 27549 mask = RADIO_2055_COUPLE_RX_MASK | RADIO_2055_COUPLE_TX_MASK; 27550 if (rx_core == PHY_CORE_0) { 27551 val1 = RADIO_2055_COUPLE_RX_MASK; 27552 val2 = RADIO_2055_COUPLE_TX_MASK; 27553 } else { 27554 val1 = RADIO_2055_COUPLE_TX_MASK; 27555 val2 = RADIO_2055_COUPLE_RX_MASK; 27556 } 27557 27558 if ((pi->nphy_rxcalparams & 0x10000)) { 27559 mod_radio_reg(pi, RADIO_2055_CORE1_GEN_SPARE2, mask, 27560 val1); 27561 mod_radio_reg(pi, RADIO_2055_CORE2_GEN_SPARE2, mask, 27562 val2); 27563 } 27564 27565 for (gain_pass = 0; gain_pass < 4; gain_pass++) { 27566 27567 if (debug) 27568 mdelay(WAIT_FOR_SCOPE); 27569 27570 if (gain_pass < 3) { 27571 curr_lna = lna_vals[gain_pass]; 27572 curr_hpf1 = hpf1_vals[gain_pass]; 27573 curr_hpf2 = hpf2_vals[gain_pass]; 27574 } else { 27575 27576 if (tot_pwr[1] > 10000) { 27577 curr_lna = lna_vals[2]; 27578 curr_hpf1 = hpf1_vals[2]; 27579 curr_hpf2 = hpf2_vals[2]; 27580 use_hpf_num = 1; 27581 curr_hpf = curr_hpf1; 27582 actual_log2_pwr = 27583 wlc_phy_nbits(tot_pwr[2]); 27584 } else { 27585 if (tot_pwr[0] > 10000) { 27586 curr_lna = lna_vals[1]; 27587 curr_hpf1 = hpf1_vals[1]; 27588 curr_hpf2 = hpf2_vals[1]; 27589 use_hpf_num = 1; 27590 curr_hpf = curr_hpf1; 27591 actual_log2_pwr = 27592 wlc_phy_nbits( 27593 tot_pwr[1]); 27594 } else { 27595 curr_lna = lna_vals[0]; 27596 curr_hpf1 = hpf1_vals[0]; 27597 curr_hpf2 = hpf2_vals[0]; 27598 use_hpf_num = 2; 27599 curr_hpf = curr_hpf2; 27600 actual_log2_pwr = 27601 wlc_phy_nbits( 27602 tot_pwr[0]); 27603 } 27604 } 27605 27606 hpf_change = desired_log2_pwr - actual_log2_pwr; 27607 curr_hpf += hpf_change; 27608 curr_hpf = max(min_t(u16, curr_hpf, 10), 0); 27609 if (use_hpf_num == 1) 27610 curr_hpf1 = curr_hpf; 27611 else 27612 curr_hpf2 = curr_hpf; 27613 } 27614 27615 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 10), 27616 ((curr_hpf2 << 8) | 27617 (curr_hpf1 << 4) | 27618 (curr_lna << 2)), 0x3, 0); 27619 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27620 27621 wlc_phy_stopplayback_nphy(pi); 27622 27623 if (first_playtone) { 27624 bcmerror = wlc_phy_tx_tone_nphy(pi, 4000, 27625 (u16) (pi->nphy_rxcalparams & 27626 0xffff), 0, 0, true); 27627 first_playtone = false; 27628 } else { 27629 phy_bw = (CHSPEC_IS40(pi->radio_chanspec)) ? 27630 40 : 20; 27631 wlc_phy_runsamples_nphy(pi, phy_bw * 8, 0xffff, 27632 0, 0, 0, true); 27633 } 27634 27635 if (bcmerror == 0) { 27636 if (gain_pass < 3) { 27637 27638 wlc_phy_rx_iq_est_nphy(pi, est, 27639 num_samps, 32, 27640 0); 27641 i_pwr = DIV_ROUND_CLOSEST(est[rx_core].i_pwr, 27642 num_samps); 27643 q_pwr = DIV_ROUND_CLOSEST(est[rx_core].q_pwr, 27644 num_samps); 27645 tot_pwr[gain_pass] = i_pwr + q_pwr; 27646 } else { 27647 27648 wlc_phy_calc_rx_iq_comp_nphy(pi, 27649 (1 << 27650 rx_core)); 27651 } 27652 27653 wlc_phy_stopplayback_nphy(pi); 27654 } 27655 27656 if (bcmerror != 0) 27657 break; 27658 } 27659 27660 and_radio_reg(pi, RADIO_2055_CORE1_GEN_SPARE2, ~mask); 27661 and_radio_reg(pi, RADIO_2055_CORE2_GEN_SPARE2, ~mask); 27662 27663 write_phy_reg(pi, (tx_core == PHY_CORE_0) ? 0x91 : 27664 0x92, orig_RfctrlIntcTx); 27665 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x91 : 27666 0x92, orig_RfctrlIntcRx); 27667 write_phy_reg(pi, 0xa5, orig_AfectrlOverride); 27668 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 27669 0xa7, orig_AfectrlCore); 27670 write_phy_reg(pi, 0xa2, orig_RfseqCoreActv); 27671 27672 if (bcmerror != 0) 27673 break; 27674 } 27675 27676 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 10), 0, 0x3, 1); 27677 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27678 27679 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 27680 gain_save); 27681 27682 wlc_phy_stay_in_carriersearch_nphy(pi, false); 27683 27684 return bcmerror; 27685 } 27686 27687 int 27688 wlc_phy_cal_rxiq_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain, 27689 u8 cal_type, bool debug) 27690 { 27691 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27692 cal_type = 0; 27693 27694 if (NREV_GE(pi->pubpi.phy_rev, 3)) 27695 return wlc_phy_cal_rxiq_nphy_rev3(pi, target_gain, cal_type, 27696 debug); 27697 else 27698 return wlc_phy_cal_rxiq_nphy_rev2(pi, target_gain, debug); 27699 } 27700 27701 void wlc_phy_txpwr_fixpower_nphy(struct brcms_phy *pi) 27702 { 27703 uint core; 27704 u32 txgain; 27705 u16 rad_gain, dac_gain, bbmult, m1m2; 27706 u8 txpi[2], chan_freq_range; 27707 s32 rfpwr_offset; 27708 27709 if (pi->phyhang_avoid) 27710 wlc_phy_stay_in_carriersearch_nphy(pi, true); 27711 27712 if (pi->sh->sromrev < 4) { 27713 txpi[0] = txpi[1] = 72; 27714 } else { 27715 27716 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 27717 switch (chan_freq_range) { 27718 case WL_CHAN_FREQ_RANGE_2G: 27719 case WL_CHAN_FREQ_RANGE_5GL: 27720 case WL_CHAN_FREQ_RANGE_5GM: 27721 case WL_CHAN_FREQ_RANGE_5GH: 27722 txpi[0] = 0; 27723 txpi[1] = 0; 27724 break; 27725 default: 27726 txpi[0] = txpi[1] = 91; 27727 break; 27728 } 27729 } 27730 27731 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27732 txpi[0] = txpi[1] = 30; 27733 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 27734 txpi[0] = txpi[1] = 40; 27735 27736 if (NREV_LT(pi->pubpi.phy_rev, 7)) { 27737 27738 if ((txpi[0] < 40) || (txpi[0] > 100) || 27739 (txpi[1] < 40) || (txpi[1] > 100)) 27740 txpi[0] = txpi[1] = 91; 27741 } 27742 27743 pi->nphy_txpwrindex[PHY_CORE_0].index_internal = txpi[0]; 27744 pi->nphy_txpwrindex[PHY_CORE_1].index_internal = txpi[1]; 27745 pi->nphy_txpwrindex[PHY_CORE_0].index_internal_save = txpi[0]; 27746 pi->nphy_txpwrindex[PHY_CORE_1].index_internal_save = txpi[1]; 27747 27748 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 27749 uint phyrev = pi->pubpi.phy_rev; 27750 27751 if (NREV_GE(phyrev, 3)) { 27752 if (PHY_IPA(pi)) { 27753 u32 *tx_gaintbl = 27754 wlc_phy_get_ipa_gaintbl_nphy(pi); 27755 txgain = tx_gaintbl[txpi[core]]; 27756 } else { 27757 if (CHSPEC_IS5G(pi->radio_chanspec)) { 27758 if (NREV_IS(phyrev, 3)) { 27759 txgain = 27760 nphy_tpc_5GHz_txgain_rev3 27761 [txpi[core]]; 27762 } else if (NREV_IS(phyrev, 4)) { 27763 txgain = ( 27764 pi->srom_fem5g.extpagain == 27765 3) ? 27766 nphy_tpc_5GHz_txgain_HiPwrEPA 27767 [txpi[core]] : 27768 nphy_tpc_5GHz_txgain_rev4 27769 [txpi[core]]; 27770 } else { 27771 txgain = 27772 nphy_tpc_5GHz_txgain_rev5 27773 [txpi[core]]; 27774 } 27775 } else { 27776 if (NREV_GE(phyrev, 5) && 27777 (pi->srom_fem2g.extpagain == 3)) { 27778 txgain = 27779 nphy_tpc_txgain_HiPwrEPA 27780 [txpi[core]]; 27781 } else { 27782 txgain = nphy_tpc_txgain_rev3 27783 [txpi[core]]; 27784 } 27785 } 27786 } 27787 } else { 27788 txgain = nphy_tpc_txgain[txpi[core]]; 27789 } 27790 27791 if (NREV_GE(phyrev, 3)) 27792 rad_gain = (txgain >> 16) & ((1 << (32 - 16 + 1)) - 1); 27793 else 27794 rad_gain = (txgain >> 16) & ((1 << (28 - 16 + 1)) - 1); 27795 27796 if (NREV_GE(phyrev, 7)) 27797 dac_gain = (txgain >> 8) & ((1 << (10 - 8 + 1)) - 1); 27798 else 27799 dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); 27800 27801 bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); 27802 27803 if (NREV_GE(phyrev, 3)) 27804 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 27805 0xa5), (0x1 << 8), (0x1 << 8)); 27806 else 27807 mod_phy_reg(pi, 0xa5, (0x1 << 14), (0x1 << 14)); 27808 27809 write_phy_reg(pi, (core == PHY_CORE_0) ? 0xaa : 0xab, dac_gain); 27810 27811 wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, 27812 &rad_gain); 27813 27814 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); 27815 m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); 27816 m1m2 |= ((core == PHY_CORE_0) ? (bbmult << 8) : (bbmult << 0)); 27817 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); 27818 27819 if (PHY_IPA(pi)) { 27820 wlc_phy_table_read_nphy(pi, 27821 (core == 27822 PHY_CORE_0 ? 27823 NPHY_TBL_ID_CORE1TXPWRCTL : 27824 NPHY_TBL_ID_CORE2TXPWRCTL), 1, 27825 576 + txpi[core], 32, 27826 &rfpwr_offset); 27827 27828 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 27829 0x29b, (0x1ff << 4), 27830 ((s16) rfpwr_offset) << 4); 27831 27832 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 27833 0x29b, (0x1 << 2), (1) << 2); 27834 27835 } 27836 } 27837 27838 and_phy_reg(pi, 0xbf, (u16) (~(0x1f << 0))); 27839 27840 if (pi->phyhang_avoid) 27841 wlc_phy_stay_in_carriersearch_nphy(pi, false); 27842 } 27843 27844 static void 27845 wlc_phy_txpwr_nphy_srom_convert(u8 *srom_max, u16 *pwr_offset, 27846 u8 tmp_max_pwr, u8 rate_start, 27847 u8 rate_end) 27848 { 27849 u8 rate; 27850 u8 word_num, nibble_num; 27851 u8 tmp_nibble; 27852 27853 for (rate = rate_start; rate <= rate_end; rate++) { 27854 word_num = (rate - rate_start) >> 2; 27855 nibble_num = (rate - rate_start) & 0x3; 27856 tmp_nibble = (pwr_offset[word_num] >> 4 * nibble_num) & 0xf; 27857 27858 srom_max[rate] = tmp_max_pwr - 2 * tmp_nibble; 27859 } 27860 } 27861 27862 static void 27863 wlc_phy_txpwr_nphy_po_apply(u8 *srom_max, u8 pwr_offset, 27864 u8 rate_start, u8 rate_end) 27865 { 27866 u8 rate; 27867 27868 for (rate = rate_start; rate <= rate_end; rate++) 27869 srom_max[rate] -= 2 * pwr_offset; 27870 } 27871 27872 void 27873 wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start, 27874 u8 rate_mcs_end, u8 rate_ofdm_start) 27875 { 27876 u8 rate1, rate2; 27877 27878 rate2 = rate_ofdm_start; 27879 for (rate1 = rate_mcs_start; rate1 <= rate_mcs_end - 1; rate1++) { 27880 power[rate1] = power[rate2]; 27881 rate2 += (rate1 == rate_mcs_start) ? 2 : 1; 27882 } 27883 power[rate_mcs_end] = power[rate_mcs_end - 1]; 27884 } 27885 27886 void 27887 wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power, u8 rate_ofdm_start, 27888 u8 rate_ofdm_end, u8 rate_mcs_start) 27889 { 27890 u8 rate1, rate2; 27891 27892 for (rate1 = rate_ofdm_start, rate2 = rate_mcs_start; 27893 rate1 <= rate_ofdm_end; rate1++, rate2++) { 27894 power[rate1] = power[rate2]; 27895 if (rate1 == rate_ofdm_start) 27896 power[++rate1] = power[rate2]; 27897 } 27898 } 27899 27900 void wlc_phy_txpwr_apply_nphy(struct brcms_phy *pi) 27901 { 27902 uint rate1, rate2, band_num; 27903 u8 tmp_bw40po = 0, tmp_cddpo = 0, tmp_stbcpo = 0; 27904 u8 tmp_max_pwr = 0; 27905 u16 pwr_offsets1[2], *pwr_offsets2 = NULL; 27906 u8 *tx_srom_max_rate = NULL; 27907 27908 for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); 27909 band_num++) { 27910 switch (band_num) { 27911 case 0: 27912 27913 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_2g, 27914 pi->nphy_pwrctrl_info[1].max_pwr_2g); 27915 27916 pwr_offsets1[0] = pi->cck2gpo; 27917 wlc_phy_txpwr_nphy_srom_convert(pi->tx_srom_max_rate_2g, 27918 pwr_offsets1, 27919 tmp_max_pwr, 27920 TXP_FIRST_CCK, 27921 TXP_LAST_CCK); 27922 27923 pwr_offsets1[0] = (u16) (pi->ofdm2gpo & 0xffff); 27924 pwr_offsets1[1] = 27925 (u16) (pi->ofdm2gpo >> 16) & 0xffff; 27926 27927 pwr_offsets2 = pi->mcs2gpo; 27928 27929 tmp_cddpo = pi->cdd2gpo; 27930 tmp_stbcpo = pi->stbc2gpo; 27931 tmp_bw40po = pi->bw402gpo; 27932 27933 tx_srom_max_rate = pi->tx_srom_max_rate_2g; 27934 break; 27935 case 1: 27936 27937 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gm, 27938 pi->nphy_pwrctrl_info[1].max_pwr_5gm); 27939 27940 pwr_offsets1[0] = (u16) (pi->ofdm5gpo & 0xffff); 27941 pwr_offsets1[1] = 27942 (u16) (pi->ofdm5gpo >> 16) & 0xffff; 27943 27944 pwr_offsets2 = pi->mcs5gpo; 27945 27946 tmp_cddpo = pi->cdd5gpo; 27947 tmp_stbcpo = pi->stbc5gpo; 27948 tmp_bw40po = pi->bw405gpo; 27949 27950 tx_srom_max_rate = pi->tx_srom_max_rate_5g_mid; 27951 break; 27952 case 2: 27953 27954 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gl, 27955 pi->nphy_pwrctrl_info[1].max_pwr_5gl); 27956 27957 pwr_offsets1[0] = (u16) (pi->ofdm5glpo & 0xffff); 27958 pwr_offsets1[1] = 27959 (u16) (pi->ofdm5glpo >> 16) & 0xffff; 27960 27961 pwr_offsets2 = pi->mcs5glpo; 27962 27963 tmp_cddpo = pi->cdd5glpo; 27964 tmp_stbcpo = pi->stbc5glpo; 27965 tmp_bw40po = pi->bw405glpo; 27966 27967 tx_srom_max_rate = pi->tx_srom_max_rate_5g_low; 27968 break; 27969 case 3: 27970 27971 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gh, 27972 pi->nphy_pwrctrl_info[1].max_pwr_5gh); 27973 27974 pwr_offsets1[0] = (u16) (pi->ofdm5ghpo & 0xffff); 27975 pwr_offsets1[1] = 27976 (u16) (pi->ofdm5ghpo >> 16) & 0xffff; 27977 27978 pwr_offsets2 = pi->mcs5ghpo; 27979 27980 tmp_cddpo = pi->cdd5ghpo; 27981 tmp_stbcpo = pi->stbc5ghpo; 27982 tmp_bw40po = pi->bw405ghpo; 27983 27984 tx_srom_max_rate = pi->tx_srom_max_rate_5g_hi; 27985 break; 27986 } 27987 27988 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets1, 27989 tmp_max_pwr, TXP_FIRST_OFDM, 27990 TXP_LAST_OFDM); 27991 27992 wlc_phy_ofdm_to_mcs_powers_nphy(tx_srom_max_rate, 27993 TXP_FIRST_MCS_20_SISO, 27994 TXP_LAST_MCS_20_SISO, 27995 TXP_FIRST_OFDM); 27996 27997 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets2, 27998 tmp_max_pwr, 27999 TXP_FIRST_MCS_20_CDD, 28000 TXP_LAST_MCS_20_CDD); 28001 28002 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28003 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, tmp_cddpo, 28004 TXP_FIRST_MCS_20_CDD, 28005 TXP_LAST_MCS_20_CDD); 28006 28007 wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, 28008 TXP_FIRST_OFDM_20_CDD, 28009 TXP_LAST_OFDM_20_CDD, 28010 TXP_FIRST_MCS_20_CDD); 28011 28012 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets2, 28013 tmp_max_pwr, 28014 TXP_FIRST_MCS_20_STBC, 28015 TXP_LAST_MCS_20_STBC); 28016 28017 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28018 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, 28019 tmp_stbcpo, 28020 TXP_FIRST_MCS_20_STBC, 28021 TXP_LAST_MCS_20_STBC); 28022 28023 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28024 &pwr_offsets2[2], tmp_max_pwr, 28025 TXP_FIRST_MCS_20_SDM, 28026 TXP_LAST_MCS_20_SDM); 28027 28028 if (NPHY_IS_SROM_REINTERPRET) { 28029 28030 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28031 &pwr_offsets2[4], 28032 tmp_max_pwr, 28033 TXP_FIRST_MCS_40_SISO, 28034 TXP_LAST_MCS_40_SISO); 28035 28036 wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, 28037 TXP_FIRST_OFDM_40_SISO, 28038 TXP_LAST_OFDM_40_SISO, 28039 TXP_FIRST_MCS_40_SISO); 28040 28041 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28042 &pwr_offsets2[4], 28043 tmp_max_pwr, 28044 TXP_FIRST_MCS_40_CDD, 28045 TXP_LAST_MCS_40_CDD); 28046 28047 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, tmp_cddpo, 28048 TXP_FIRST_MCS_40_CDD, 28049 TXP_LAST_MCS_40_CDD); 28050 28051 wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, 28052 TXP_FIRST_OFDM_40_CDD, 28053 TXP_LAST_OFDM_40_CDD, 28054 TXP_FIRST_MCS_40_CDD); 28055 28056 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28057 &pwr_offsets2[4], 28058 tmp_max_pwr, 28059 TXP_FIRST_MCS_40_STBC, 28060 TXP_LAST_MCS_40_STBC); 28061 28062 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, 28063 tmp_stbcpo, 28064 TXP_FIRST_MCS_40_STBC, 28065 TXP_LAST_MCS_40_STBC); 28066 28067 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28068 &pwr_offsets2[6], 28069 tmp_max_pwr, 28070 TXP_FIRST_MCS_40_SDM, 28071 TXP_LAST_MCS_40_SDM); 28072 } else { 28073 28074 for (rate1 = TXP_FIRST_OFDM_40_SISO, rate2 = 28075 TXP_FIRST_OFDM; 28076 rate1 <= TXP_LAST_MCS_40_SDM; 28077 rate1++, rate2++) 28078 tx_srom_max_rate[rate1] = 28079 tx_srom_max_rate[rate2]; 28080 } 28081 28082 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28083 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, 28084 tmp_bw40po, 28085 TXP_FIRST_OFDM_40_SISO, 28086 TXP_LAST_MCS_40_SDM); 28087 28088 tx_srom_max_rate[TXP_MCS_32] = 28089 tx_srom_max_rate[TXP_FIRST_MCS_40_CDD]; 28090 } 28091 28092 return; 28093 } 28094 28095 void wlc_phy_txpower_recalc_target_nphy(struct brcms_phy *pi) 28096 { 28097 u8 tx_pwr_ctrl_state; 28098 wlc_phy_txpwr_limit_to_tbl_nphy(pi); 28099 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 28100 28101 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 28102 28103 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { 28104 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); 28105 (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 28106 udelay(1); 28107 } 28108 28109 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 28110 28111 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) 28112 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); 28113 } 28114 28115 static bool wlc_phy_txpwr_ison_nphy(struct brcms_phy *pi) 28116 { 28117 return read_phy_reg((pi), 0x1e7) & ((0x1 << 15) | 28118 (0x1 << 14) | (0x1 << 13)); 28119 } 28120 28121 u16 wlc_phy_txpwr_idx_get_nphy(struct brcms_phy *pi) 28122 { 28123 u16 tmp; 28124 u16 pwr_idx[2]; 28125 28126 if (wlc_phy_txpwr_ison_nphy(pi)) { 28127 pwr_idx[0] = wlc_phy_txpwr_idx_cur_get_nphy(pi, PHY_CORE_0); 28128 pwr_idx[1] = wlc_phy_txpwr_idx_cur_get_nphy(pi, PHY_CORE_1); 28129 28130 tmp = (pwr_idx[0] << 8) | pwr_idx[1]; 28131 } else { 28132 tmp = ((pi->nphy_txpwrindex[PHY_CORE_0].index_internal & 0xff) 28133 << 8) | 28134 (pi->nphy_txpwrindex[PHY_CORE_1].index_internal & 0xff); 28135 } 28136 28137 return tmp; 28138 } 28139 28140 void wlc_phy_txpwr_papd_cal_nphy(struct brcms_phy *pi) 28141 { 28142 if (PHY_IPA(pi) 28143 && (pi->nphy_force_papd_cal 28144 || (wlc_phy_txpwr_ison_nphy(pi) 28145 && 28146 (((u32) 28147 abs(wlc_phy_txpwr_idx_cur_get_nphy(pi, 0) - 28148 pi->nphy_papd_tx_gain_at_last_cal[0]) >= 4) 28149 || ((u32) 28150 abs(wlc_phy_txpwr_idx_cur_get_nphy(pi, 1) - 28151 pi->nphy_papd_tx_gain_at_last_cal[1]) >= 4))))) 28152 wlc_phy_a4(pi, true); 28153 } 28154 28155 void wlc_phy_txpwrctrl_enable_nphy(struct brcms_phy *pi, u8 ctrl_type) 28156 { 28157 u16 mask = 0, val = 0, ishw = 0; 28158 u8 ctr; 28159 uint core; 28160 u32 tbl_offset; 28161 u32 tbl_len; 28162 u16 regval[84]; 28163 28164 if (pi->phyhang_avoid) 28165 wlc_phy_stay_in_carriersearch_nphy(pi, true); 28166 28167 switch (ctrl_type) { 28168 case PHY_TPC_HW_OFF: 28169 case PHY_TPC_HW_ON: 28170 pi->nphy_txpwrctrl = ctrl_type; 28171 break; 28172 default: 28173 break; 28174 } 28175 28176 if (ctrl_type == PHY_TPC_HW_OFF) { 28177 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28178 28179 if (wlc_phy_txpwr_ison_nphy(pi)) { 28180 for (core = 0; core < pi->pubpi.phy_corenum; 28181 core++) 28182 pi->nphy_txpwr_idx[core] = 28183 wlc_phy_txpwr_idx_cur_get_nphy( 28184 pi, 28185 (u8) core); 28186 } 28187 28188 } 28189 28190 tbl_len = 84; 28191 tbl_offset = 64; 28192 for (ctr = 0; ctr < tbl_len; ctr++) 28193 regval[ctr] = 0; 28194 wlc_phy_table_write_nphy(pi, 26, tbl_len, tbl_offset, 16, 28195 regval); 28196 wlc_phy_table_write_nphy(pi, 27, tbl_len, tbl_offset, 16, 28197 regval); 28198 28199 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28200 and_phy_reg(pi, 0x1e7, 28201 0xffff & ~((0x1 << 15) | 28202 (0x1 << 14) | 28203 (0x1 << 13))); 28204 else 28205 and_phy_reg(pi, 0x1e7, 28206 (u16) (~((0x1 << 14) | (0x1 << 13)))); 28207 28208 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28209 or_phy_reg(pi, 0x8f, (0x1 << 8)); 28210 or_phy_reg(pi, 0xa5, (0x1 << 8)); 28211 } else { 28212 or_phy_reg(pi, 0xa5, (0x1 << 14)); 28213 } 28214 28215 if (NREV_IS(pi->pubpi.phy_rev, 2)) 28216 mod_phy_reg(pi, 0xdc, 0x00ff, 0x53); 28217 else if (NREV_LT(pi->pubpi.phy_rev, 2)) 28218 mod_phy_reg(pi, 0xdc, 0x00ff, 0x5a); 28219 28220 if (NREV_LT(pi->pubpi.phy_rev, 2) && 28221 pi->bw == WL_CHANSPEC_BW_40) 28222 wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, 28223 MHF1_IQSWAP_WAR, BRCM_BAND_ALL); 28224 28225 } else { 28226 28227 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 84, 64, 28228 8, pi->adj_pwr_tbl_nphy); 28229 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 84, 64, 28230 8, pi->adj_pwr_tbl_nphy); 28231 28232 ishw = (ctrl_type == PHY_TPC_HW_ON) ? 0x1 : 0x0; 28233 mask = (0x1 << 14) | (0x1 << 13); 28234 val = (ishw << 14) | (ishw << 13); 28235 28236 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28237 mask |= (0x1 << 15); 28238 val |= (ishw << 15); 28239 } 28240 28241 mod_phy_reg(pi, 0x1e7, mask, val); 28242 28243 if (CHSPEC_IS5G(pi->radio_chanspec)) { 28244 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 28245 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 0x32); 28246 mod_phy_reg(pi, 0x222, (0xff << 0), 0x32); 28247 } else { 28248 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 0x64); 28249 if (NREV_GT(pi->pubpi.phy_rev, 1)) 28250 mod_phy_reg(pi, 0x222, 28251 (0xff << 0), 0x64); 28252 } 28253 } 28254 28255 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28256 if ((pi->nphy_txpwr_idx[0] != 128) 28257 && (pi->nphy_txpwr_idx[1] != 128)) 28258 wlc_phy_txpwr_idx_cur_set_nphy(pi, 28259 pi-> 28260 nphy_txpwr_idx 28261 [0], 28262 pi-> 28263 nphy_txpwr_idx 28264 [1]); 28265 } 28266 28267 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28268 and_phy_reg(pi, 0x8f, ~(0x1 << 8)); 28269 and_phy_reg(pi, 0xa5, ~(0x1 << 8)); 28270 } else { 28271 and_phy_reg(pi, 0xa5, ~(0x1 << 14)); 28272 } 28273 28274 if (NREV_IS(pi->pubpi.phy_rev, 2)) 28275 mod_phy_reg(pi, 0xdc, 0x00ff, 0x3b); 28276 else if (NREV_LT(pi->pubpi.phy_rev, 2)) 28277 mod_phy_reg(pi, 0xdc, 0x00ff, 0x40); 28278 28279 if (NREV_LT(pi->pubpi.phy_rev, 2) && 28280 pi->bw == WL_CHANSPEC_BW_40) 28281 wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, 28282 0x0, BRCM_BAND_ALL); 28283 28284 if (PHY_IPA(pi)) { 28285 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 28286 0x29b, (0x1 << 2), (0) << 2); 28287 28288 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 28289 0x29b, (0x1 << 2), (0) << 2); 28290 28291 } 28292 28293 } 28294 28295 if (pi->phyhang_avoid) 28296 wlc_phy_stay_in_carriersearch_nphy(pi, false); 28297 } 28298 28299 void 28300 wlc_phy_txpwr_index_nphy(struct brcms_phy *pi, u8 core_mask, s8 txpwrindex, 28301 bool restore_cals) 28302 { 28303 u8 core, txpwrctl_tbl; 28304 u16 tx_ind0, iq_ind0, lo_ind0; 28305 u16 m1m2; 28306 u32 txgain; 28307 u16 rad_gain, dac_gain; 28308 u8 bbmult; 28309 u32 iqcomp; 28310 u16 iqcomp_a, iqcomp_b; 28311 u32 locomp; 28312 u16 tmpval; 28313 u8 tx_pwr_ctrl_state; 28314 s32 rfpwr_offset; 28315 u16 regval[2]; 28316 28317 if (pi->phyhang_avoid) 28318 wlc_phy_stay_in_carriersearch_nphy(pi, true); 28319 28320 tx_ind0 = 192; 28321 iq_ind0 = 320; 28322 lo_ind0 = 448; 28323 28324 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 28325 28326 if ((core_mask & (1 << core)) == 0) 28327 continue; 28328 28329 txpwrctl_tbl = (core == PHY_CORE_0) ? 26 : 27; 28330 28331 if (txpwrindex < 0) { 28332 if (pi->nphy_txpwrindex[core].index < 0) 28333 continue; 28334 28335 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28336 mod_phy_reg(pi, 0x8f, 28337 (0x1 << 8), 28338 pi->nphy_txpwrindex[core]. 28339 AfectrlOverride); 28340 mod_phy_reg(pi, 0xa5, (0x1 << 8), 28341 pi->nphy_txpwrindex[core]. 28342 AfectrlOverride); 28343 } else { 28344 mod_phy_reg(pi, 0xa5, 28345 (0x1 << 14), 28346 pi->nphy_txpwrindex[core]. 28347 AfectrlOverride); 28348 } 28349 28350 write_phy_reg(pi, (core == PHY_CORE_0) ? 28351 0xaa : 0xab, 28352 pi->nphy_txpwrindex[core].AfeCtrlDacGain); 28353 28354 wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, 28355 &pi->nphy_txpwrindex[core]. 28356 rad_gain); 28357 28358 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); 28359 m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); 28360 m1m2 |= ((core == PHY_CORE_0) ? 28361 (pi->nphy_txpwrindex[core].bbmult << 8) : 28362 (pi->nphy_txpwrindex[core].bbmult << 0)); 28363 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); 28364 28365 if (restore_cals) { 28366 wlc_phy_table_write_nphy( 28367 pi, 15, 2, (80 + 2 * core), 16, 28368 &pi->nphy_txpwrindex[core].iqcomp_a); 28369 wlc_phy_table_write_nphy( 28370 pi, 15, 1, (85 + core), 16, 28371 &pi->nphy_txpwrindex[core].locomp); 28372 wlc_phy_table_write_nphy( 28373 pi, 15, 1, (93 + core), 16, 28374 &pi->nphy_txpwrindex[core].locomp); 28375 } 28376 28377 wlc_phy_txpwrctrl_enable_nphy(pi, pi->nphy_txpwrctrl); 28378 28379 pi->nphy_txpwrindex[core].index_internal = 28380 pi->nphy_txpwrindex[core].index_internal_save; 28381 } else { 28382 28383 if (pi->nphy_txpwrindex[core].index < 0) { 28384 28385 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28386 mod_phy_reg(pi, 0x8f, 28387 (0x1 << 8), 28388 pi->nphy_txpwrindex[core]. 28389 AfectrlOverride); 28390 mod_phy_reg(pi, 0xa5, (0x1 << 8), 28391 pi->nphy_txpwrindex[core]. 28392 AfectrlOverride); 28393 } else { 28394 pi->nphy_txpwrindex[core]. 28395 AfectrlOverride = 28396 read_phy_reg(pi, 0xa5); 28397 } 28398 28399 pi->nphy_txpwrindex[core].AfeCtrlDacGain = 28400 read_phy_reg(pi, (core == PHY_CORE_0) ? 28401 0xaa : 0xab); 28402 28403 wlc_phy_table_read_nphy(pi, 7, 1, 28404 (0x110 + core), 16, 28405 &pi-> 28406 nphy_txpwrindex[core]. 28407 rad_gain); 28408 28409 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, 28410 &tmpval); 28411 tmpval >>= ((core == PHY_CORE_0) ? 8 : 0); 28412 tmpval &= 0xff; 28413 pi->nphy_txpwrindex[core].bbmult = (u8) tmpval; 28414 28415 wlc_phy_table_read_nphy(pi, 15, 2, 28416 (80 + 2 * core), 16, 28417 &pi-> 28418 nphy_txpwrindex[core]. 28419 iqcomp_a); 28420 28421 wlc_phy_table_read_nphy(pi, 15, 1, (85 + core), 28422 16, 28423 &pi-> 28424 nphy_txpwrindex[core]. 28425 locomp); 28426 28427 pi->nphy_txpwrindex[core].index_internal_save = 28428 pi->nphy_txpwrindex[core]. 28429 index_internal; 28430 } 28431 28432 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 28433 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 28434 28435 if (NREV_IS(pi->pubpi.phy_rev, 1)) 28436 wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); 28437 28438 wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, 28439 (tx_ind0 + txpwrindex), 32, 28440 &txgain); 28441 28442 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28443 rad_gain = (txgain >> 16) & 28444 ((1 << (32 - 16 + 1)) - 1); 28445 else 28446 rad_gain = (txgain >> 16) & 28447 ((1 << (28 - 16 + 1)) - 1); 28448 28449 dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); 28450 bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); 28451 28452 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28453 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 28454 0xa5), (0x1 << 8), (0x1 << 8)); 28455 else 28456 mod_phy_reg(pi, 0xa5, (0x1 << 14), (0x1 << 14)); 28457 28458 write_phy_reg(pi, (core == PHY_CORE_0) ? 28459 0xaa : 0xab, dac_gain); 28460 28461 wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, 28462 &rad_gain); 28463 28464 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); 28465 m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); 28466 m1m2 |= ((core == PHY_CORE_0) ? 28467 (bbmult << 8) : (bbmult << 0)); 28468 28469 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); 28470 28471 wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, 28472 (iq_ind0 + txpwrindex), 32, 28473 &iqcomp); 28474 iqcomp_a = (iqcomp >> 10) & ((1 << (19 - 10 + 1)) - 1); 28475 iqcomp_b = (iqcomp >> 0) & ((1 << (9 - 0 + 1)) - 1); 28476 28477 if (restore_cals) { 28478 regval[0] = (u16) iqcomp_a; 28479 regval[1] = (u16) iqcomp_b; 28480 wlc_phy_table_write_nphy(pi, 15, 2, 28481 (80 + 2 * core), 16, 28482 regval); 28483 } 28484 28485 wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, 28486 (lo_ind0 + txpwrindex), 32, 28487 &locomp); 28488 if (restore_cals) 28489 wlc_phy_table_write_nphy(pi, 15, 1, (85 + core), 28490 16, &locomp); 28491 28492 if (NREV_IS(pi->pubpi.phy_rev, 1)) 28493 wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); 28494 28495 if (PHY_IPA(pi)) { 28496 wlc_phy_table_read_nphy(pi, 28497 (core == PHY_CORE_0 ? 28498 NPHY_TBL_ID_CORE1TXPWRCTL : 28499 NPHY_TBL_ID_CORE2TXPWRCTL), 28500 1, 576 + txpwrindex, 32, 28501 &rfpwr_offset); 28502 28503 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 28504 0x29b, (0x1ff << 4), 28505 ((s16) rfpwr_offset) << 4); 28506 28507 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 28508 0x29b, (0x1 << 2), (1) << 2); 28509 28510 } 28511 28512 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 28513 } 28514 28515 pi->nphy_txpwrindex[core].index = txpwrindex; 28516 } 28517 28518 if (pi->phyhang_avoid) 28519 wlc_phy_stay_in_carriersearch_nphy(pi, false); 28520 } 28521 28522 void 28523 wlc_phy_txpower_sromlimit_get_nphy(struct brcms_phy *pi, uint chan, u8 *max_pwr, 28524 u8 txp_rate_idx) 28525 { 28526 u8 chan_freq_range; 28527 28528 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, chan); 28529 switch (chan_freq_range) { 28530 case WL_CHAN_FREQ_RANGE_2G: 28531 *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; 28532 break; 28533 case WL_CHAN_FREQ_RANGE_5GM: 28534 *max_pwr = pi->tx_srom_max_rate_5g_mid[txp_rate_idx]; 28535 break; 28536 case WL_CHAN_FREQ_RANGE_5GL: 28537 *max_pwr = pi->tx_srom_max_rate_5g_low[txp_rate_idx]; 28538 break; 28539 case WL_CHAN_FREQ_RANGE_5GH: 28540 *max_pwr = pi->tx_srom_max_rate_5g_hi[txp_rate_idx]; 28541 break; 28542 default: 28543 *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; 28544 break; 28545 } 28546 28547 return; 28548 } 28549 28550 void wlc_phy_stay_in_carriersearch_nphy(struct brcms_phy *pi, bool enable) 28551 { 28552 u16 clip_off[] = { 0xffff, 0xffff }; 28553 28554 if (enable) { 28555 if (pi->nphy_deaf_count == 0) { 28556 pi->classifier_state = 28557 wlc_phy_classifier_nphy(pi, 0, 0); 28558 wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); 28559 wlc_phy_clip_det_nphy(pi, 0, pi->clip_state); 28560 wlc_phy_clip_det_nphy(pi, 1, clip_off); 28561 } 28562 28563 pi->nphy_deaf_count++; 28564 28565 wlc_phy_resetcca_nphy(pi); 28566 28567 } else { 28568 pi->nphy_deaf_count--; 28569 28570 if (pi->nphy_deaf_count == 0) { 28571 wlc_phy_classifier_nphy(pi, (0x7 << 0), 28572 pi->classifier_state); 28573 wlc_phy_clip_det_nphy(pi, 1, pi->clip_state); 28574 } 28575 } 28576 } 28577 28578 void wlc_nphy_deaf_mode(struct brcms_phy *pi, bool mode) 28579 { 28580 wlapi_suspend_mac_and_wait(pi->sh->physhim); 28581 28582 if (mode) { 28583 if (pi->nphy_deaf_count == 0) 28584 wlc_phy_stay_in_carriersearch_nphy(pi, true); 28585 } else if (pi->nphy_deaf_count > 0) { 28586 wlc_phy_stay_in_carriersearch_nphy(pi, false); 28587 } 28588 28589 wlapi_enable_mac(pi->sh->physhim); 28590 } 28591