113b81559SLuis R. Rodriguez /*
213b81559SLuis R. Rodriguez * Copyright (c) 2009 Atheros Communications Inc.
313b81559SLuis R. Rodriguez *
413b81559SLuis R. Rodriguez * Permission to use, copy, modify, and/or distribute this software for any
513b81559SLuis R. Rodriguez * purpose with or without fee is hereby granted, provided that the above
613b81559SLuis R. Rodriguez * copyright notice and this permission notice appear in all copies.
713b81559SLuis R. Rodriguez *
813b81559SLuis R. Rodriguez * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
913b81559SLuis R. Rodriguez * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
1013b81559SLuis R. Rodriguez * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
1113b81559SLuis R. Rodriguez * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
1213b81559SLuis R. Rodriguez * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
1313b81559SLuis R. Rodriguez * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
1413b81559SLuis R. Rodriguez * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
1513b81559SLuis R. Rodriguez */
1613b81559SLuis R. Rodriguez
17ee40fa06SPaul Gortmaker #include <linux/export.h>
1813b81559SLuis R. Rodriguez #include <asm/unaligned.h>
1913b81559SLuis R. Rodriguez
2013b81559SLuis R. Rodriguez #include "ath.h"
2113b81559SLuis R. Rodriguez #include "reg.h"
2213b81559SLuis R. Rodriguez
230a4528e2SLuis de Bethencourt #define REG_READ (common->ops->read)
24037fd9b6SSven Eckelmann #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg)
2513b81559SLuis R. Rodriguez
2613b81559SLuis R. Rodriguez /**
272d1f8673SYang Shen * ath_hw_setbssidmask - filter out bssids we listen
2813b81559SLuis R. Rodriguez *
2913b81559SLuis R. Rodriguez * @common: the ath_common struct for the device.
3013b81559SLuis R. Rodriguez *
3113b81559SLuis R. Rodriguez * BSSID masking is a method used by AR5212 and newer hardware to inform PCU
3213b81559SLuis R. Rodriguez * which bits of the interface's MAC address should be looked at when trying
3313b81559SLuis R. Rodriguez * to decide which packets to ACK. In station mode and AP mode with a single
3413b81559SLuis R. Rodriguez * BSS every bit matters since we lock to only one BSS. In AP mode with
3513b81559SLuis R. Rodriguez * multiple BSSes (virtual interfaces) not every bit matters because hw must
3613b81559SLuis R. Rodriguez * accept frames for all BSSes and so we tweak some bits of our mac address
3713b81559SLuis R. Rodriguez * in order to have multiple BSSes.
3813b81559SLuis R. Rodriguez *
3913b81559SLuis R. Rodriguez * NOTE: This is a simple filter and does *not* filter out all
4013b81559SLuis R. Rodriguez * relevant frames. Some frames that are not for us might get ACKed from us
4113b81559SLuis R. Rodriguez * by PCU because they just match the mask.
4213b81559SLuis R. Rodriguez *
4313b81559SLuis R. Rodriguez * When handling multiple BSSes you can get the BSSID mask by computing the
4413b81559SLuis R. Rodriguez * set of ~ ( MAC XOR BSSID ) for all bssids we handle.
4513b81559SLuis R. Rodriguez *
4613b81559SLuis R. Rodriguez * When you do this you are essentially computing the common bits of all your
47a455c57eSMohammed Shafi Shajakhan * BSSes. Later it is assumed the hardware will "and" (&) the BSSID mask with
4813b81559SLuis R. Rodriguez * the MAC address to obtain the relevant bits and compare the result with
4913b81559SLuis R. Rodriguez * (frame's BSSID & mask) to see if they match.
5013b81559SLuis R. Rodriguez *
51*88e67a4fSJilin Yuan * Simple example: on your card you have two BSSes you have created with
5213b81559SLuis R. Rodriguez * BSSID-01 and BSSID-02. Lets assume BSSID-01 will not use the MAC address.
5313b81559SLuis R. Rodriguez * There is another BSSID-03 but you are not part of it. For simplicity's sake,
5413b81559SLuis R. Rodriguez * assuming only 4 bits for a mac address and for BSSIDs you can then have:
5513b81559SLuis R. Rodriguez *
5613b81559SLuis R. Rodriguez * \
5713b81559SLuis R. Rodriguez * MAC: 0001 |
5813b81559SLuis R. Rodriguez * BSSID-01: 0100 | --> Belongs to us
5913b81559SLuis R. Rodriguez * BSSID-02: 1001 |
6013b81559SLuis R. Rodriguez * /
6113b81559SLuis R. Rodriguez * -------------------
6213b81559SLuis R. Rodriguez * BSSID-03: 0110 | --> External
6313b81559SLuis R. Rodriguez * -------------------
6413b81559SLuis R. Rodriguez *
6513b81559SLuis R. Rodriguez * Our bssid_mask would then be:
6613b81559SLuis R. Rodriguez *
6713b81559SLuis R. Rodriguez * On loop iteration for BSSID-01:
6813b81559SLuis R. Rodriguez * ~(0001 ^ 0100) -> ~(0101)
6913b81559SLuis R. Rodriguez * -> 1010
7013b81559SLuis R. Rodriguez * bssid_mask = 1010
7113b81559SLuis R. Rodriguez *
7213b81559SLuis R. Rodriguez * On loop iteration for BSSID-02:
7313b81559SLuis R. Rodriguez * bssid_mask &= ~(0001 ^ 1001)
7413b81559SLuis R. Rodriguez * bssid_mask = (1010) & ~(0001 ^ 1001)
75a455c57eSMohammed Shafi Shajakhan * bssid_mask = (1010) & ~(1000)
76a455c57eSMohammed Shafi Shajakhan * bssid_mask = (1010) & (0111)
7713b81559SLuis R. Rodriguez * bssid_mask = 0010
7813b81559SLuis R. Rodriguez *
7913b81559SLuis R. Rodriguez * A bssid_mask of 0010 means "only pay attention to the second least
8013b81559SLuis R. Rodriguez * significant bit". This is because its the only bit common
8113b81559SLuis R. Rodriguez * amongst the MAC and all BSSIDs we support. To findout what the real
8213b81559SLuis R. Rodriguez * common bit is we can simply "&" the bssid_mask now with any BSSID we have
8313b81559SLuis R. Rodriguez * or our MAC address (we assume the hardware uses the MAC address).
8413b81559SLuis R. Rodriguez *
8513b81559SLuis R. Rodriguez * Now, suppose there's an incoming frame for BSSID-03:
8613b81559SLuis R. Rodriguez *
8713b81559SLuis R. Rodriguez * IFRAME-01: 0110
8813b81559SLuis R. Rodriguez *
8913b81559SLuis R. Rodriguez * An easy eye-inspeciton of this already should tell you that this frame
9025985edcSLucas De Marchi * will not pass our check. This is because the bssid_mask tells the
9113b81559SLuis R. Rodriguez * hardware to only look at the second least significant bit and the
9213b81559SLuis R. Rodriguez * common bit amongst the MAC and BSSIDs is 0, this frame has the 2nd LSB
9313b81559SLuis R. Rodriguez * as 1, which does not match 0.
9413b81559SLuis R. Rodriguez *
9513b81559SLuis R. Rodriguez * So with IFRAME-01 we *assume* the hardware will do:
9613b81559SLuis R. Rodriguez *
9713b81559SLuis R. Rodriguez * allow = (IFRAME-01 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
9813b81559SLuis R. Rodriguez * --> allow = (0110 & 0010) == (0010 & 0001) ? 1 : 0;
9913b81559SLuis R. Rodriguez * --> allow = (0010) == 0000 ? 1 : 0;
10013b81559SLuis R. Rodriguez * --> allow = 0
10113b81559SLuis R. Rodriguez *
10213b81559SLuis R. Rodriguez * Lets now test a frame that should work:
10313b81559SLuis R. Rodriguez *
10413b81559SLuis R. Rodriguez * IFRAME-02: 0001 (we should allow)
10513b81559SLuis R. Rodriguez *
10613b81559SLuis R. Rodriguez * allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
10713b81559SLuis R. Rodriguez * --> allow = (0001 & 0010) == (0010 & 0001) ? 1 :0;
108a455c57eSMohammed Shafi Shajakhan * --> allow = (0000) == (0000)
10913b81559SLuis R. Rodriguez * --> allow = 1
11013b81559SLuis R. Rodriguez *
11113b81559SLuis R. Rodriguez * Other examples:
11213b81559SLuis R. Rodriguez *
11313b81559SLuis R. Rodriguez * IFRAME-03: 0100 --> allowed
11413b81559SLuis R. Rodriguez * IFRAME-04: 1001 --> allowed
11513b81559SLuis R. Rodriguez * IFRAME-05: 1101 --> allowed but its not for us!!!
11613b81559SLuis R. Rodriguez *
11713b81559SLuis R. Rodriguez */
ath_hw_setbssidmask(struct ath_common * common)11813b81559SLuis R. Rodriguez void ath_hw_setbssidmask(struct ath_common *common)
11913b81559SLuis R. Rodriguez {
12013b81559SLuis R. Rodriguez void *ah = common->ah;
121ecbbed32SFelix Fietkau u32 id1;
122ecbbed32SFelix Fietkau
123ecbbed32SFelix Fietkau REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr));
124ecbbed32SFelix Fietkau id1 = REG_READ(ah, AR_STA_ID1) & ~AR_STA_ID1_SADH_MASK;
125ecbbed32SFelix Fietkau id1 |= get_unaligned_le16(common->macaddr + 4);
126ecbbed32SFelix Fietkau REG_WRITE(ah, AR_STA_ID1, id1);
12713b81559SLuis R. Rodriguez
128037fd9b6SSven Eckelmann REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask));
129037fd9b6SSven Eckelmann REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4));
13013b81559SLuis R. Rodriguez }
13113b81559SLuis R. Rodriguez EXPORT_SYMBOL(ath_hw_setbssidmask);
132b5bfc568SFelix Fietkau
133b5bfc568SFelix Fietkau
134b5bfc568SFelix Fietkau /**
135b5bfc568SFelix Fietkau * ath_hw_cycle_counters_update - common function to update cycle counters
136b5bfc568SFelix Fietkau *
137b5bfc568SFelix Fietkau * @common: the ath_common struct for the device.
138b5bfc568SFelix Fietkau *
139b5bfc568SFelix Fietkau * This function is used to update all cycle counters in one place.
140b5bfc568SFelix Fietkau * It has to be called while holding common->cc_lock!
141b5bfc568SFelix Fietkau */
ath_hw_cycle_counters_update(struct ath_common * common)142b5bfc568SFelix Fietkau void ath_hw_cycle_counters_update(struct ath_common *common)
143b5bfc568SFelix Fietkau {
144b5bfc568SFelix Fietkau u32 cycles, busy, rx, tx;
145b5bfc568SFelix Fietkau void *ah = common->ah;
146b5bfc568SFelix Fietkau
147b5bfc568SFelix Fietkau /* freeze */
148037fd9b6SSven Eckelmann REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
149b5bfc568SFelix Fietkau
150b5bfc568SFelix Fietkau /* read */
151b5bfc568SFelix Fietkau cycles = REG_READ(ah, AR_CCCNT);
152b5bfc568SFelix Fietkau busy = REG_READ(ah, AR_RCCNT);
153b5bfc568SFelix Fietkau rx = REG_READ(ah, AR_RFCNT);
154b5bfc568SFelix Fietkau tx = REG_READ(ah, AR_TFCNT);
155b5bfc568SFelix Fietkau
156b5bfc568SFelix Fietkau /* clear */
157037fd9b6SSven Eckelmann REG_WRITE(ah, AR_CCCNT, 0);
158037fd9b6SSven Eckelmann REG_WRITE(ah, AR_RFCNT, 0);
159037fd9b6SSven Eckelmann REG_WRITE(ah, AR_RCCNT, 0);
160037fd9b6SSven Eckelmann REG_WRITE(ah, AR_TFCNT, 0);
161b5bfc568SFelix Fietkau
162b5bfc568SFelix Fietkau /* unfreeze */
163037fd9b6SSven Eckelmann REG_WRITE(ah, AR_MIBC, 0);
164b5bfc568SFelix Fietkau
165b5bfc568SFelix Fietkau /* update all cycle counters here */
166b5bfc568SFelix Fietkau common->cc_ani.cycles += cycles;
167b5bfc568SFelix Fietkau common->cc_ani.rx_busy += busy;
168b5bfc568SFelix Fietkau common->cc_ani.rx_frame += rx;
169b5bfc568SFelix Fietkau common->cc_ani.tx_frame += tx;
170b5bfc568SFelix Fietkau
171b5bfc568SFelix Fietkau common->cc_survey.cycles += cycles;
172b5bfc568SFelix Fietkau common->cc_survey.rx_busy += busy;
173b5bfc568SFelix Fietkau common->cc_survey.rx_frame += rx;
174b5bfc568SFelix Fietkau common->cc_survey.tx_frame += tx;
175b5bfc568SFelix Fietkau }
176b5bfc568SFelix Fietkau EXPORT_SYMBOL(ath_hw_cycle_counters_update);
177b5bfc568SFelix Fietkau
ath_hw_get_listen_time(struct ath_common * common)178b5bfc568SFelix Fietkau int32_t ath_hw_get_listen_time(struct ath_common *common)
179b5bfc568SFelix Fietkau {
180b5bfc568SFelix Fietkau struct ath_cycle_counters *cc = &common->cc_ani;
181b5bfc568SFelix Fietkau int32_t listen_time;
182b5bfc568SFelix Fietkau
183b5bfc568SFelix Fietkau listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) /
184b5bfc568SFelix Fietkau (common->clockrate * 1000);
185b5bfc568SFelix Fietkau
186b5bfc568SFelix Fietkau memset(cc, 0, sizeof(*cc));
187b5bfc568SFelix Fietkau
188b5bfc568SFelix Fietkau return listen_time;
189b5bfc568SFelix Fietkau }
190b5bfc568SFelix Fietkau EXPORT_SYMBOL(ath_hw_get_listen_time);
191