1 /* 2 * drivers/net/phy/cicada.c 3 * 4 * Driver for Cicada PHYs 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 * 10 * This program is free software; you can redistribute it and/or modify it 11 * under the terms of the GNU General Public License as published by the 12 * Free Software Foundation; either version 2 of the License, or (at your 13 * option) any later version. 14 * 15 */ 16 #include <linux/config.h> 17 #include <linux/kernel.h> 18 #include <linux/sched.h> 19 #include <linux/string.h> 20 #include <linux/errno.h> 21 #include <linux/unistd.h> 22 #include <linux/slab.h> 23 #include <linux/interrupt.h> 24 #include <linux/init.h> 25 #include <linux/delay.h> 26 #include <linux/netdevice.h> 27 #include <linux/etherdevice.h> 28 #include <linux/skbuff.h> 29 #include <linux/spinlock.h> 30 #include <linux/mm.h> 31 #include <linux/module.h> 32 #include <linux/version.h> 33 #include <linux/mii.h> 34 #include <linux/ethtool.h> 35 #include <linux/phy.h> 36 37 #include <asm/io.h> 38 #include <asm/irq.h> 39 #include <asm/uaccess.h> 40 41 /* Cicada Extended Control Register 1 */ 42 #define MII_CIS8201_EXT_CON1 0x17 43 #define MII_CIS8201_EXTCON1_INIT 0x0000 44 45 /* Cicada Interrupt Mask Register */ 46 #define MII_CIS8201_IMASK 0x19 47 #define MII_CIS8201_IMASK_IEN 0x8000 48 #define MII_CIS8201_IMASK_SPEED 0x4000 49 #define MII_CIS8201_IMASK_LINK 0x2000 50 #define MII_CIS8201_IMASK_DUPLEX 0x1000 51 #define MII_CIS8201_IMASK_MASK 0xf000 52 53 /* Cicada Interrupt Status Register */ 54 #define MII_CIS8201_ISTAT 0x1a 55 #define MII_CIS8201_ISTAT_STATUS 0x8000 56 #define MII_CIS8201_ISTAT_SPEED 0x4000 57 #define MII_CIS8201_ISTAT_LINK 0x2000 58 #define MII_CIS8201_ISTAT_DUPLEX 0x1000 59 60 /* Cicada Auxiliary Control/Status Register */ 61 #define MII_CIS8201_AUX_CONSTAT 0x1c 62 #define MII_CIS8201_AUXCONSTAT_INIT 0x0004 63 #define MII_CIS8201_AUXCONSTAT_DUPLEX 0x0020 64 #define MII_CIS8201_AUXCONSTAT_SPEED 0x0018 65 #define MII_CIS8201_AUXCONSTAT_GBIT 0x0010 66 #define MII_CIS8201_AUXCONSTAT_100 0x0008 67 68 MODULE_DESCRIPTION("Cicadia PHY driver"); 69 MODULE_AUTHOR("Andy Fleming"); 70 MODULE_LICENSE("GPL"); 71 72 static int cis820x_config_init(struct phy_device *phydev) 73 { 74 int err; 75 76 err = phy_write(phydev, MII_CIS8201_AUX_CONSTAT, 77 MII_CIS8201_AUXCONSTAT_INIT); 78 79 if (err < 0) 80 return err; 81 82 err = phy_write(phydev, MII_CIS8201_EXT_CON1, 83 MII_CIS8201_EXTCON1_INIT); 84 85 return err; 86 } 87 88 static int cis820x_ack_interrupt(struct phy_device *phydev) 89 { 90 int err = phy_read(phydev, MII_CIS8201_ISTAT); 91 92 return (err < 0) ? err : 0; 93 } 94 95 static int cis820x_config_intr(struct phy_device *phydev) 96 { 97 int err; 98 99 if(phydev->interrupts == PHY_INTERRUPT_ENABLED) 100 err = phy_write(phydev, MII_CIS8201_IMASK, 101 MII_CIS8201_IMASK_MASK); 102 else 103 err = phy_write(phydev, MII_CIS8201_IMASK, 0); 104 105 return err; 106 } 107 108 /* Cicada 820x */ 109 static struct phy_driver cis8204_driver = { 110 .phy_id = 0x000fc440, 111 .name = "Cicada Cis8204", 112 .phy_id_mask = 0x000fffc0, 113 .features = PHY_GBIT_FEATURES, 114 .flags = PHY_HAS_INTERRUPT, 115 .config_init = &cis820x_config_init, 116 .config_aneg = &genphy_config_aneg, 117 .read_status = &genphy_read_status, 118 .ack_interrupt = &cis820x_ack_interrupt, 119 .config_intr = &cis820x_config_intr, 120 .driver = { .owner = THIS_MODULE,}, 121 }; 122 123 static int __init cis8204_init(void) 124 { 125 return phy_driver_register(&cis8204_driver); 126 } 127 128 static void __exit cis8204_exit(void) 129 { 130 phy_driver_unregister(&cis8204_driver); 131 } 132 133 module_init(cis8204_init); 134 module_exit(cis8204_exit); 135