1 /* 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 * 5 * This program is free software; you may redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 16 * SOFTWARE. 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/kernel.h> 22 #include <linux/string.h> 23 #include <linux/errno.h> 24 #include <linux/types.h> 25 #include <linux/init.h> 26 #include <linux/interrupt.h> 27 #include <linux/workqueue.h> 28 #include <linux/pci.h> 29 #include <linux/netdevice.h> 30 #include <linux/etherdevice.h> 31 #include <linux/if.h> 32 #include <linux/if_ether.h> 33 #include <linux/if_vlan.h> 34 #include <linux/in.h> 35 #include <linux/ip.h> 36 #include <linux/ipv6.h> 37 #include <linux/tcp.h> 38 #include <linux/rtnetlink.h> 39 #include <linux/prefetch.h> 40 #include <net/ip6_checksum.h> 41 #include <linux/ktime.h> 42 #ifdef CONFIG_RFS_ACCEL 43 #include <linux/cpu_rmap.h> 44 #endif 45 #ifdef CONFIG_NET_RX_BUSY_POLL 46 #include <net/busy_poll.h> 47 #endif 48 49 #include "cq_enet_desc.h" 50 #include "vnic_dev.h" 51 #include "vnic_intr.h" 52 #include "vnic_stats.h" 53 #include "vnic_vic.h" 54 #include "enic_res.h" 55 #include "enic.h" 56 #include "enic_dev.h" 57 #include "enic_pp.h" 58 #include "enic_clsf.h" 59 60 #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ) 61 #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS) 62 #define MAX_TSO (1 << 16) 63 #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1) 64 65 #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */ 66 #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */ 67 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */ 68 69 #define RX_COPYBREAK_DEFAULT 256 70 71 /* Supported devices */ 72 static const struct pci_device_id enic_id_table[] = { 73 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) }, 74 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) }, 75 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, 76 { 0, } /* end of table */ 77 }; 78 79 MODULE_DESCRIPTION(DRV_DESCRIPTION); 80 MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>"); 81 MODULE_LICENSE("GPL"); 82 MODULE_VERSION(DRV_VERSION); 83 MODULE_DEVICE_TABLE(pci, enic_id_table); 84 85 #define ENIC_LARGE_PKT_THRESHOLD 1000 86 #define ENIC_MAX_COALESCE_TIMERS 10 87 /* Interrupt moderation table, which will be used to decide the 88 * coalescing timer values 89 * {rx_rate in Mbps, mapping percentage of the range} 90 */ 91 struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = { 92 {4000, 0}, 93 {4400, 10}, 94 {5060, 20}, 95 {5230, 30}, 96 {5540, 40}, 97 {5820, 50}, 98 {6120, 60}, 99 {6435, 70}, 100 {6745, 80}, 101 {7000, 90}, 102 {0xFFFFFFFF, 100} 103 }; 104 105 /* This table helps the driver to pick different ranges for rx coalescing 106 * timer depending on the link speed. 107 */ 108 struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = { 109 {0, 0}, /* 0 - 4 Gbps */ 110 {0, 3}, /* 4 - 10 Gbps */ 111 {3, 6}, /* 10 - 40 Gbps */ 112 }; 113 114 int enic_is_dynamic(struct enic *enic) 115 { 116 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN; 117 } 118 119 int enic_sriov_enabled(struct enic *enic) 120 { 121 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0; 122 } 123 124 static int enic_is_sriov_vf(struct enic *enic) 125 { 126 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF; 127 } 128 129 int enic_is_valid_vf(struct enic *enic, int vf) 130 { 131 #ifdef CONFIG_PCI_IOV 132 return vf >= 0 && vf < enic->num_vfs; 133 #else 134 return 0; 135 #endif 136 } 137 138 static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf) 139 { 140 struct enic *enic = vnic_dev_priv(wq->vdev); 141 142 if (buf->sop) 143 pci_unmap_single(enic->pdev, buf->dma_addr, 144 buf->len, PCI_DMA_TODEVICE); 145 else 146 pci_unmap_page(enic->pdev, buf->dma_addr, 147 buf->len, PCI_DMA_TODEVICE); 148 149 if (buf->os_buf) 150 dev_kfree_skb_any(buf->os_buf); 151 } 152 153 static void enic_wq_free_buf(struct vnic_wq *wq, 154 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque) 155 { 156 enic_free_wq_buf(wq, buf); 157 } 158 159 static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, 160 u8 type, u16 q_number, u16 completed_index, void *opaque) 161 { 162 struct enic *enic = vnic_dev_priv(vdev); 163 164 spin_lock(&enic->wq_lock[q_number]); 165 166 vnic_wq_service(&enic->wq[q_number], cq_desc, 167 completed_index, enic_wq_free_buf, 168 opaque); 169 170 if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) && 171 vnic_wq_desc_avail(&enic->wq[q_number]) >= 172 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)) 173 netif_wake_subqueue(enic->netdev, q_number); 174 175 spin_unlock(&enic->wq_lock[q_number]); 176 177 return 0; 178 } 179 180 static void enic_log_q_error(struct enic *enic) 181 { 182 unsigned int i; 183 u32 error_status; 184 185 for (i = 0; i < enic->wq_count; i++) { 186 error_status = vnic_wq_error_status(&enic->wq[i]); 187 if (error_status) 188 netdev_err(enic->netdev, "WQ[%d] error_status %d\n", 189 i, error_status); 190 } 191 192 for (i = 0; i < enic->rq_count; i++) { 193 error_status = vnic_rq_error_status(&enic->rq[i]); 194 if (error_status) 195 netdev_err(enic->netdev, "RQ[%d] error_status %d\n", 196 i, error_status); 197 } 198 } 199 200 static void enic_msglvl_check(struct enic *enic) 201 { 202 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev); 203 204 if (msg_enable != enic->msg_enable) { 205 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n", 206 enic->msg_enable, msg_enable); 207 enic->msg_enable = msg_enable; 208 } 209 } 210 211 static void enic_mtu_check(struct enic *enic) 212 { 213 u32 mtu = vnic_dev_mtu(enic->vdev); 214 struct net_device *netdev = enic->netdev; 215 216 if (mtu && mtu != enic->port_mtu) { 217 enic->port_mtu = mtu; 218 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 219 mtu = max_t(int, ENIC_MIN_MTU, 220 min_t(int, ENIC_MAX_MTU, mtu)); 221 if (mtu != netdev->mtu) 222 schedule_work(&enic->change_mtu_work); 223 } else { 224 if (mtu < netdev->mtu) 225 netdev_warn(netdev, 226 "interface MTU (%d) set higher " 227 "than switch port MTU (%d)\n", 228 netdev->mtu, mtu); 229 } 230 } 231 } 232 233 static void enic_link_check(struct enic *enic) 234 { 235 int link_status = vnic_dev_link_status(enic->vdev); 236 int carrier_ok = netif_carrier_ok(enic->netdev); 237 238 if (link_status && !carrier_ok) { 239 netdev_info(enic->netdev, "Link UP\n"); 240 netif_carrier_on(enic->netdev); 241 } else if (!link_status && carrier_ok) { 242 netdev_info(enic->netdev, "Link DOWN\n"); 243 netif_carrier_off(enic->netdev); 244 } 245 } 246 247 static void enic_notify_check(struct enic *enic) 248 { 249 enic_msglvl_check(enic); 250 enic_mtu_check(enic); 251 enic_link_check(enic); 252 } 253 254 #define ENIC_TEST_INTR(pba, i) (pba & (1 << i)) 255 256 static irqreturn_t enic_isr_legacy(int irq, void *data) 257 { 258 struct net_device *netdev = data; 259 struct enic *enic = netdev_priv(netdev); 260 unsigned int io_intr = enic_legacy_io_intr(); 261 unsigned int err_intr = enic_legacy_err_intr(); 262 unsigned int notify_intr = enic_legacy_notify_intr(); 263 u32 pba; 264 265 vnic_intr_mask(&enic->intr[io_intr]); 266 267 pba = vnic_intr_legacy_pba(enic->legacy_pba); 268 if (!pba) { 269 vnic_intr_unmask(&enic->intr[io_intr]); 270 return IRQ_NONE; /* not our interrupt */ 271 } 272 273 if (ENIC_TEST_INTR(pba, notify_intr)) { 274 vnic_intr_return_all_credits(&enic->intr[notify_intr]); 275 enic_notify_check(enic); 276 } 277 278 if (ENIC_TEST_INTR(pba, err_intr)) { 279 vnic_intr_return_all_credits(&enic->intr[err_intr]); 280 enic_log_q_error(enic); 281 /* schedule recovery from WQ/RQ error */ 282 schedule_work(&enic->reset); 283 return IRQ_HANDLED; 284 } 285 286 if (ENIC_TEST_INTR(pba, io_intr)) 287 napi_schedule_irqoff(&enic->napi[0]); 288 else 289 vnic_intr_unmask(&enic->intr[io_intr]); 290 291 return IRQ_HANDLED; 292 } 293 294 static irqreturn_t enic_isr_msi(int irq, void *data) 295 { 296 struct enic *enic = data; 297 298 /* With MSI, there is no sharing of interrupts, so this is 299 * our interrupt and there is no need to ack it. The device 300 * is not providing per-vector masking, so the OS will not 301 * write to PCI config space to mask/unmask the interrupt. 302 * We're using mask_on_assertion for MSI, so the device 303 * automatically masks the interrupt when the interrupt is 304 * generated. Later, when exiting polling, the interrupt 305 * will be unmasked (see enic_poll). 306 * 307 * Also, the device uses the same PCIe Traffic Class (TC) 308 * for Memory Write data and MSI, so there are no ordering 309 * issues; the MSI will always arrive at the Root Complex 310 * _after_ corresponding Memory Writes (i.e. descriptor 311 * writes). 312 */ 313 314 napi_schedule_irqoff(&enic->napi[0]); 315 316 return IRQ_HANDLED; 317 } 318 319 static irqreturn_t enic_isr_msix(int irq, void *data) 320 { 321 struct napi_struct *napi = data; 322 323 napi_schedule_irqoff(napi); 324 325 return IRQ_HANDLED; 326 } 327 328 static irqreturn_t enic_isr_msix_err(int irq, void *data) 329 { 330 struct enic *enic = data; 331 unsigned int intr = enic_msix_err_intr(enic); 332 333 vnic_intr_return_all_credits(&enic->intr[intr]); 334 335 enic_log_q_error(enic); 336 337 /* schedule recovery from WQ/RQ error */ 338 schedule_work(&enic->reset); 339 340 return IRQ_HANDLED; 341 } 342 343 static irqreturn_t enic_isr_msix_notify(int irq, void *data) 344 { 345 struct enic *enic = data; 346 unsigned int intr = enic_msix_notify_intr(enic); 347 348 vnic_intr_return_all_credits(&enic->intr[intr]); 349 enic_notify_check(enic); 350 351 return IRQ_HANDLED; 352 } 353 354 static inline void enic_queue_wq_skb_cont(struct enic *enic, 355 struct vnic_wq *wq, struct sk_buff *skb, 356 unsigned int len_left, int loopback) 357 { 358 const skb_frag_t *frag; 359 360 /* Queue additional data fragments */ 361 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 362 len_left -= skb_frag_size(frag); 363 enic_queue_wq_desc_cont(wq, skb, 364 skb_frag_dma_map(&enic->pdev->dev, 365 frag, 0, skb_frag_size(frag), 366 DMA_TO_DEVICE), 367 skb_frag_size(frag), 368 (len_left == 0), /* EOP? */ 369 loopback); 370 } 371 } 372 373 static inline void enic_queue_wq_skb_vlan(struct enic *enic, 374 struct vnic_wq *wq, struct sk_buff *skb, 375 int vlan_tag_insert, unsigned int vlan_tag, int loopback) 376 { 377 unsigned int head_len = skb_headlen(skb); 378 unsigned int len_left = skb->len - head_len; 379 int eop = (len_left == 0); 380 381 /* Queue the main skb fragment. The fragments are no larger 382 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 383 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 384 * per fragment is queued. 385 */ 386 enic_queue_wq_desc(wq, skb, 387 pci_map_single(enic->pdev, skb->data, 388 head_len, PCI_DMA_TODEVICE), 389 head_len, 390 vlan_tag_insert, vlan_tag, 391 eop, loopback); 392 393 if (!eop) 394 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 395 } 396 397 static inline void enic_queue_wq_skb_csum_l4(struct enic *enic, 398 struct vnic_wq *wq, struct sk_buff *skb, 399 int vlan_tag_insert, unsigned int vlan_tag, int loopback) 400 { 401 unsigned int head_len = skb_headlen(skb); 402 unsigned int len_left = skb->len - head_len; 403 unsigned int hdr_len = skb_checksum_start_offset(skb); 404 unsigned int csum_offset = hdr_len + skb->csum_offset; 405 int eop = (len_left == 0); 406 407 /* Queue the main skb fragment. The fragments are no larger 408 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 409 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 410 * per fragment is queued. 411 */ 412 enic_queue_wq_desc_csum_l4(wq, skb, 413 pci_map_single(enic->pdev, skb->data, 414 head_len, PCI_DMA_TODEVICE), 415 head_len, 416 csum_offset, 417 hdr_len, 418 vlan_tag_insert, vlan_tag, 419 eop, loopback); 420 421 if (!eop) 422 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 423 } 424 425 static inline void enic_queue_wq_skb_tso(struct enic *enic, 426 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss, 427 int vlan_tag_insert, unsigned int vlan_tag, int loopback) 428 { 429 unsigned int frag_len_left = skb_headlen(skb); 430 unsigned int len_left = skb->len - frag_len_left; 431 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 432 int eop = (len_left == 0); 433 unsigned int len; 434 dma_addr_t dma_addr; 435 unsigned int offset = 0; 436 skb_frag_t *frag; 437 438 /* Preload TCP csum field with IP pseudo hdr calculated 439 * with IP length set to zero. HW will later add in length 440 * to each TCP segment resulting from the TSO. 441 */ 442 443 if (skb->protocol == cpu_to_be16(ETH_P_IP)) { 444 ip_hdr(skb)->check = 0; 445 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr, 446 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 447 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) { 448 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 449 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 450 } 451 452 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 453 * for the main skb fragment 454 */ 455 while (frag_len_left) { 456 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN); 457 dma_addr = pci_map_single(enic->pdev, skb->data + offset, 458 len, PCI_DMA_TODEVICE); 459 enic_queue_wq_desc_tso(wq, skb, 460 dma_addr, 461 len, 462 mss, hdr_len, 463 vlan_tag_insert, vlan_tag, 464 eop && (len == frag_len_left), loopback); 465 frag_len_left -= len; 466 offset += len; 467 } 468 469 if (eop) 470 return; 471 472 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 473 * for additional data fragments 474 */ 475 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 476 len_left -= skb_frag_size(frag); 477 frag_len_left = skb_frag_size(frag); 478 offset = 0; 479 480 while (frag_len_left) { 481 len = min(frag_len_left, 482 (unsigned int)WQ_ENET_MAX_DESC_LEN); 483 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 484 offset, len, 485 DMA_TO_DEVICE); 486 enic_queue_wq_desc_cont(wq, skb, 487 dma_addr, 488 len, 489 (len_left == 0) && 490 (len == frag_len_left), /* EOP? */ 491 loopback); 492 frag_len_left -= len; 493 offset += len; 494 } 495 } 496 } 497 498 static inline void enic_queue_wq_skb(struct enic *enic, 499 struct vnic_wq *wq, struct sk_buff *skb) 500 { 501 unsigned int mss = skb_shinfo(skb)->gso_size; 502 unsigned int vlan_tag = 0; 503 int vlan_tag_insert = 0; 504 int loopback = 0; 505 506 if (vlan_tx_tag_present(skb)) { 507 /* VLAN tag from trunking driver */ 508 vlan_tag_insert = 1; 509 vlan_tag = vlan_tx_tag_get(skb); 510 } else if (enic->loop_enable) { 511 vlan_tag = enic->loop_tag; 512 loopback = 1; 513 } 514 515 if (mss) 516 enic_queue_wq_skb_tso(enic, wq, skb, mss, 517 vlan_tag_insert, vlan_tag, loopback); 518 else if (skb->ip_summed == CHECKSUM_PARTIAL) 519 enic_queue_wq_skb_csum_l4(enic, wq, skb, 520 vlan_tag_insert, vlan_tag, loopback); 521 else 522 enic_queue_wq_skb_vlan(enic, wq, skb, 523 vlan_tag_insert, vlan_tag, loopback); 524 } 525 526 /* netif_tx_lock held, process context with BHs disabled, or BH */ 527 static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb, 528 struct net_device *netdev) 529 { 530 struct enic *enic = netdev_priv(netdev); 531 struct vnic_wq *wq; 532 unsigned int txq_map; 533 struct netdev_queue *txq; 534 535 if (skb->len <= 0) { 536 dev_kfree_skb_any(skb); 537 return NETDEV_TX_OK; 538 } 539 540 txq_map = skb_get_queue_mapping(skb) % enic->wq_count; 541 wq = &enic->wq[txq_map]; 542 txq = netdev_get_tx_queue(netdev, txq_map); 543 544 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs, 545 * which is very likely. In the off chance it's going to take 546 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb. 547 */ 548 549 if (skb_shinfo(skb)->gso_size == 0 && 550 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC && 551 skb_linearize(skb)) { 552 dev_kfree_skb_any(skb); 553 return NETDEV_TX_OK; 554 } 555 556 spin_lock(&enic->wq_lock[txq_map]); 557 558 if (vnic_wq_desc_avail(wq) < 559 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) { 560 netif_tx_stop_queue(txq); 561 /* This is a hard error, log it */ 562 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n"); 563 spin_unlock(&enic->wq_lock[txq_map]); 564 return NETDEV_TX_BUSY; 565 } 566 567 enic_queue_wq_skb(enic, wq, skb); 568 569 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS) 570 netif_tx_stop_queue(txq); 571 if (!skb->xmit_more || netif_xmit_stopped(txq)) 572 vnic_wq_doorbell(wq); 573 574 spin_unlock(&enic->wq_lock[txq_map]); 575 576 return NETDEV_TX_OK; 577 } 578 579 /* dev_base_lock rwlock held, nominally process context */ 580 static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev, 581 struct rtnl_link_stats64 *net_stats) 582 { 583 struct enic *enic = netdev_priv(netdev); 584 struct vnic_stats *stats; 585 586 enic_dev_stats_dump(enic, &stats); 587 588 net_stats->tx_packets = stats->tx.tx_frames_ok; 589 net_stats->tx_bytes = stats->tx.tx_bytes_ok; 590 net_stats->tx_errors = stats->tx.tx_errors; 591 net_stats->tx_dropped = stats->tx.tx_drops; 592 593 net_stats->rx_packets = stats->rx.rx_frames_ok; 594 net_stats->rx_bytes = stats->rx.rx_bytes_ok; 595 net_stats->rx_errors = stats->rx.rx_errors; 596 net_stats->multicast = stats->rx.rx_multicast_frames_ok; 597 net_stats->rx_over_errors = enic->rq_truncated_pkts; 598 net_stats->rx_crc_errors = enic->rq_bad_fcs; 599 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop; 600 601 return net_stats; 602 } 603 604 static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr) 605 { 606 struct enic *enic = netdev_priv(netdev); 607 608 if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) { 609 unsigned int mc_count = netdev_mc_count(netdev); 610 611 netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n", 612 ENIC_MULTICAST_PERFECT_FILTERS, mc_count); 613 614 return -ENOSPC; 615 } 616 617 enic_dev_add_addr(enic, mc_addr); 618 enic->mc_count++; 619 620 return 0; 621 } 622 623 static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr) 624 { 625 struct enic *enic = netdev_priv(netdev); 626 627 enic_dev_del_addr(enic, mc_addr); 628 enic->mc_count--; 629 630 return 0; 631 } 632 633 static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr) 634 { 635 struct enic *enic = netdev_priv(netdev); 636 637 if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) { 638 unsigned int uc_count = netdev_uc_count(netdev); 639 640 netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n", 641 ENIC_UNICAST_PERFECT_FILTERS, uc_count); 642 643 return -ENOSPC; 644 } 645 646 enic_dev_add_addr(enic, uc_addr); 647 enic->uc_count++; 648 649 return 0; 650 } 651 652 static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr) 653 { 654 struct enic *enic = netdev_priv(netdev); 655 656 enic_dev_del_addr(enic, uc_addr); 657 enic->uc_count--; 658 659 return 0; 660 } 661 662 void enic_reset_addr_lists(struct enic *enic) 663 { 664 struct net_device *netdev = enic->netdev; 665 666 __dev_uc_unsync(netdev, NULL); 667 __dev_mc_unsync(netdev, NULL); 668 669 enic->mc_count = 0; 670 enic->uc_count = 0; 671 enic->flags = 0; 672 } 673 674 static int enic_set_mac_addr(struct net_device *netdev, char *addr) 675 { 676 struct enic *enic = netdev_priv(netdev); 677 678 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 679 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr)) 680 return -EADDRNOTAVAIL; 681 } else { 682 if (!is_valid_ether_addr(addr)) 683 return -EADDRNOTAVAIL; 684 } 685 686 memcpy(netdev->dev_addr, addr, netdev->addr_len); 687 688 return 0; 689 } 690 691 static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p) 692 { 693 struct enic *enic = netdev_priv(netdev); 694 struct sockaddr *saddr = p; 695 char *addr = saddr->sa_data; 696 int err; 697 698 if (netif_running(enic->netdev)) { 699 err = enic_dev_del_station_addr(enic); 700 if (err) 701 return err; 702 } 703 704 err = enic_set_mac_addr(netdev, addr); 705 if (err) 706 return err; 707 708 if (netif_running(enic->netdev)) { 709 err = enic_dev_add_station_addr(enic); 710 if (err) 711 return err; 712 } 713 714 return err; 715 } 716 717 static int enic_set_mac_address(struct net_device *netdev, void *p) 718 { 719 struct sockaddr *saddr = p; 720 char *addr = saddr->sa_data; 721 struct enic *enic = netdev_priv(netdev); 722 int err; 723 724 err = enic_dev_del_station_addr(enic); 725 if (err) 726 return err; 727 728 err = enic_set_mac_addr(netdev, addr); 729 if (err) 730 return err; 731 732 return enic_dev_add_station_addr(enic); 733 } 734 735 /* netif_tx_lock held, BHs disabled */ 736 static void enic_set_rx_mode(struct net_device *netdev) 737 { 738 struct enic *enic = netdev_priv(netdev); 739 int directed = 1; 740 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0; 741 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0; 742 int promisc = (netdev->flags & IFF_PROMISC) || 743 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS; 744 int allmulti = (netdev->flags & IFF_ALLMULTI) || 745 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS; 746 unsigned int flags = netdev->flags | 747 (allmulti ? IFF_ALLMULTI : 0) | 748 (promisc ? IFF_PROMISC : 0); 749 750 if (enic->flags != flags) { 751 enic->flags = flags; 752 enic_dev_packet_filter(enic, directed, 753 multicast, broadcast, promisc, allmulti); 754 } 755 756 if (!promisc) { 757 __dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync); 758 if (!allmulti) 759 __dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync); 760 } 761 } 762 763 /* netif_tx_lock held, BHs disabled */ 764 static void enic_tx_timeout(struct net_device *netdev) 765 { 766 struct enic *enic = netdev_priv(netdev); 767 schedule_work(&enic->reset); 768 } 769 770 static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) 771 { 772 struct enic *enic = netdev_priv(netdev); 773 struct enic_port_profile *pp; 774 int err; 775 776 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 777 if (err) 778 return err; 779 780 if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) { 781 if (vf == PORT_SELF_VF) { 782 memcpy(pp->vf_mac, mac, ETH_ALEN); 783 return 0; 784 } else { 785 /* 786 * For sriov vf's set the mac in hw 787 */ 788 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 789 vnic_dev_set_mac_addr, mac); 790 return enic_dev_status_to_errno(err); 791 } 792 } else 793 return -EINVAL; 794 } 795 796 static int enic_set_vf_port(struct net_device *netdev, int vf, 797 struct nlattr *port[]) 798 { 799 struct enic *enic = netdev_priv(netdev); 800 struct enic_port_profile prev_pp; 801 struct enic_port_profile *pp; 802 int err = 0, restore_pp = 1; 803 804 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 805 if (err) 806 return err; 807 808 if (!port[IFLA_PORT_REQUEST]) 809 return -EOPNOTSUPP; 810 811 memcpy(&prev_pp, pp, sizeof(*enic->pp)); 812 memset(pp, 0, sizeof(*enic->pp)); 813 814 pp->set |= ENIC_SET_REQUEST; 815 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]); 816 817 if (port[IFLA_PORT_PROFILE]) { 818 pp->set |= ENIC_SET_NAME; 819 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]), 820 PORT_PROFILE_MAX); 821 } 822 823 if (port[IFLA_PORT_INSTANCE_UUID]) { 824 pp->set |= ENIC_SET_INSTANCE; 825 memcpy(pp->instance_uuid, 826 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX); 827 } 828 829 if (port[IFLA_PORT_HOST_UUID]) { 830 pp->set |= ENIC_SET_HOST; 831 memcpy(pp->host_uuid, 832 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX); 833 } 834 835 if (vf == PORT_SELF_VF) { 836 /* Special case handling: mac came from IFLA_VF_MAC */ 837 if (!is_zero_ether_addr(prev_pp.vf_mac)) 838 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN); 839 840 if (is_zero_ether_addr(netdev->dev_addr)) 841 eth_hw_addr_random(netdev); 842 } else { 843 /* SR-IOV VF: get mac from adapter */ 844 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 845 vnic_dev_get_mac_addr, pp->mac_addr); 846 if (err) { 847 netdev_err(netdev, "Error getting mac for vf %d\n", vf); 848 memcpy(pp, &prev_pp, sizeof(*pp)); 849 return enic_dev_status_to_errno(err); 850 } 851 } 852 853 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp); 854 if (err) { 855 if (restore_pp) { 856 /* Things are still the way they were: Implicit 857 * DISASSOCIATE failed 858 */ 859 memcpy(pp, &prev_pp, sizeof(*pp)); 860 } else { 861 memset(pp, 0, sizeof(*pp)); 862 if (vf == PORT_SELF_VF) 863 memset(netdev->dev_addr, 0, ETH_ALEN); 864 } 865 } else { 866 /* Set flag to indicate that the port assoc/disassoc 867 * request has been sent out to fw 868 */ 869 pp->set |= ENIC_PORT_REQUEST_APPLIED; 870 871 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */ 872 if (pp->request == PORT_REQUEST_DISASSOCIATE) { 873 memset(pp->mac_addr, 0, ETH_ALEN); 874 if (vf == PORT_SELF_VF) 875 memset(netdev->dev_addr, 0, ETH_ALEN); 876 } 877 } 878 879 if (vf == PORT_SELF_VF) 880 memset(pp->vf_mac, 0, ETH_ALEN); 881 882 return err; 883 } 884 885 static int enic_get_vf_port(struct net_device *netdev, int vf, 886 struct sk_buff *skb) 887 { 888 struct enic *enic = netdev_priv(netdev); 889 u16 response = PORT_PROFILE_RESPONSE_SUCCESS; 890 struct enic_port_profile *pp; 891 int err; 892 893 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 894 if (err) 895 return err; 896 897 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED)) 898 return -ENODATA; 899 900 err = enic_process_get_pp_request(enic, vf, pp->request, &response); 901 if (err) 902 return err; 903 904 if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) || 905 nla_put_u16(skb, IFLA_PORT_RESPONSE, response) || 906 ((pp->set & ENIC_SET_NAME) && 907 nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) || 908 ((pp->set & ENIC_SET_INSTANCE) && 909 nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX, 910 pp->instance_uuid)) || 911 ((pp->set & ENIC_SET_HOST) && 912 nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid))) 913 goto nla_put_failure; 914 return 0; 915 916 nla_put_failure: 917 return -EMSGSIZE; 918 } 919 920 static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf) 921 { 922 struct enic *enic = vnic_dev_priv(rq->vdev); 923 924 if (!buf->os_buf) 925 return; 926 927 pci_unmap_single(enic->pdev, buf->dma_addr, 928 buf->len, PCI_DMA_FROMDEVICE); 929 dev_kfree_skb_any(buf->os_buf); 930 buf->os_buf = NULL; 931 } 932 933 static int enic_rq_alloc_buf(struct vnic_rq *rq) 934 { 935 struct enic *enic = vnic_dev_priv(rq->vdev); 936 struct net_device *netdev = enic->netdev; 937 struct sk_buff *skb; 938 unsigned int len = netdev->mtu + VLAN_ETH_HLEN; 939 unsigned int os_buf_index = 0; 940 dma_addr_t dma_addr; 941 struct vnic_rq_buf *buf = rq->to_use; 942 943 if (buf->os_buf) { 944 enic_queue_rq_desc(rq, buf->os_buf, os_buf_index, buf->dma_addr, 945 buf->len); 946 947 return 0; 948 } 949 skb = netdev_alloc_skb_ip_align(netdev, len); 950 if (!skb) 951 return -ENOMEM; 952 953 dma_addr = pci_map_single(enic->pdev, skb->data, 954 len, PCI_DMA_FROMDEVICE); 955 956 enic_queue_rq_desc(rq, skb, os_buf_index, 957 dma_addr, len); 958 959 return 0; 960 } 961 962 static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size, 963 u32 pkt_len) 964 { 965 if (ENIC_LARGE_PKT_THRESHOLD <= pkt_len) 966 pkt_size->large_pkt_bytes_cnt += pkt_len; 967 else 968 pkt_size->small_pkt_bytes_cnt += pkt_len; 969 } 970 971 static bool enic_rxcopybreak(struct net_device *netdev, struct sk_buff **skb, 972 struct vnic_rq_buf *buf, u16 len) 973 { 974 struct enic *enic = netdev_priv(netdev); 975 struct sk_buff *new_skb; 976 977 if (len > enic->rx_copybreak) 978 return false; 979 new_skb = netdev_alloc_skb_ip_align(netdev, len); 980 if (!new_skb) 981 return false; 982 pci_dma_sync_single_for_cpu(enic->pdev, buf->dma_addr, len, 983 DMA_FROM_DEVICE); 984 memcpy(new_skb->data, (*skb)->data, len); 985 *skb = new_skb; 986 987 return true; 988 } 989 990 static void enic_rq_indicate_buf(struct vnic_rq *rq, 991 struct cq_desc *cq_desc, struct vnic_rq_buf *buf, 992 int skipped, void *opaque) 993 { 994 struct enic *enic = vnic_dev_priv(rq->vdev); 995 struct net_device *netdev = enic->netdev; 996 struct sk_buff *skb; 997 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 998 999 u8 type, color, eop, sop, ingress_port, vlan_stripped; 1000 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof; 1001 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok; 1002 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc; 1003 u8 packet_error; 1004 u16 q_number, completed_index, bytes_written, vlan_tci, checksum; 1005 u32 rss_hash; 1006 1007 if (skipped) 1008 return; 1009 1010 skb = buf->os_buf; 1011 1012 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc, 1013 &type, &color, &q_number, &completed_index, 1014 &ingress_port, &fcoe, &eop, &sop, &rss_type, 1015 &csum_not_calc, &rss_hash, &bytes_written, 1016 &packet_error, &vlan_stripped, &vlan_tci, &checksum, 1017 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error, 1018 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp, 1019 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment, 1020 &fcs_ok); 1021 1022 if (packet_error) { 1023 1024 if (!fcs_ok) { 1025 if (bytes_written > 0) 1026 enic->rq_bad_fcs++; 1027 else if (bytes_written == 0) 1028 enic->rq_truncated_pkts++; 1029 } 1030 1031 pci_unmap_single(enic->pdev, buf->dma_addr, buf->len, 1032 PCI_DMA_FROMDEVICE); 1033 dev_kfree_skb_any(skb); 1034 buf->os_buf = NULL; 1035 1036 return; 1037 } 1038 1039 if (eop && bytes_written > 0) { 1040 1041 /* Good receive 1042 */ 1043 1044 if (!enic_rxcopybreak(netdev, &skb, buf, bytes_written)) { 1045 buf->os_buf = NULL; 1046 pci_unmap_single(enic->pdev, buf->dma_addr, buf->len, 1047 PCI_DMA_FROMDEVICE); 1048 } 1049 prefetch(skb->data - NET_IP_ALIGN); 1050 1051 skb_put(skb, bytes_written); 1052 skb->protocol = eth_type_trans(skb, netdev); 1053 skb_record_rx_queue(skb, q_number); 1054 if (netdev->features & NETIF_F_RXHASH) { 1055 skb_set_hash(skb, rss_hash, 1056 (rss_type & 1057 (NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX | 1058 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6 | 1059 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4)) ? 1060 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3); 1061 } 1062 1063 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) { 1064 skb->csum = htons(checksum); 1065 skb->ip_summed = CHECKSUM_COMPLETE; 1066 } 1067 1068 if (vlan_stripped) 1069 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci); 1070 1071 skb_mark_napi_id(skb, &enic->napi[rq->index]); 1072 if (enic_poll_busy_polling(rq) || 1073 !(netdev->features & NETIF_F_GRO)) 1074 netif_receive_skb(skb); 1075 else 1076 napi_gro_receive(&enic->napi[q_number], skb); 1077 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1078 enic_intr_update_pkt_size(&cq->pkt_size_counter, 1079 bytes_written); 1080 } else { 1081 1082 /* Buffer overflow 1083 */ 1084 1085 pci_unmap_single(enic->pdev, buf->dma_addr, buf->len, 1086 PCI_DMA_FROMDEVICE); 1087 dev_kfree_skb_any(skb); 1088 buf->os_buf = NULL; 1089 } 1090 } 1091 1092 static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, 1093 u8 type, u16 q_number, u16 completed_index, void *opaque) 1094 { 1095 struct enic *enic = vnic_dev_priv(vdev); 1096 1097 vnic_rq_service(&enic->rq[q_number], cq_desc, 1098 completed_index, VNIC_RQ_RETURN_DESC, 1099 enic_rq_indicate_buf, opaque); 1100 1101 return 0; 1102 } 1103 1104 static int enic_poll(struct napi_struct *napi, int budget) 1105 { 1106 struct net_device *netdev = napi->dev; 1107 struct enic *enic = netdev_priv(netdev); 1108 unsigned int cq_rq = enic_cq_rq(enic, 0); 1109 unsigned int cq_wq = enic_cq_wq(enic, 0); 1110 unsigned int intr = enic_legacy_io_intr(); 1111 unsigned int rq_work_to_do = budget; 1112 unsigned int wq_work_to_do = -1; /* no limit */ 1113 unsigned int work_done, rq_work_done = 0, wq_work_done; 1114 int err; 1115 1116 wq_work_done = vnic_cq_service(&enic->cq[cq_wq], wq_work_to_do, 1117 enic_wq_service, NULL); 1118 1119 if (!enic_poll_lock_napi(&enic->rq[cq_rq])) { 1120 if (wq_work_done > 0) 1121 vnic_intr_return_credits(&enic->intr[intr], 1122 wq_work_done, 1123 0 /* dont unmask intr */, 1124 0 /* dont reset intr timer */); 1125 return rq_work_done; 1126 } 1127 1128 if (budget > 0) 1129 rq_work_done = vnic_cq_service(&enic->cq[cq_rq], 1130 rq_work_to_do, enic_rq_service, NULL); 1131 1132 /* Accumulate intr event credits for this polling 1133 * cycle. An intr event is the completion of a 1134 * a WQ or RQ packet. 1135 */ 1136 1137 work_done = rq_work_done + wq_work_done; 1138 1139 if (work_done > 0) 1140 vnic_intr_return_credits(&enic->intr[intr], 1141 work_done, 1142 0 /* don't unmask intr */, 1143 0 /* don't reset intr timer */); 1144 1145 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); 1146 1147 /* Buffer allocation failed. Stay in polling 1148 * mode so we can try to fill the ring again. 1149 */ 1150 1151 if (err) 1152 rq_work_done = rq_work_to_do; 1153 1154 if (rq_work_done < rq_work_to_do) { 1155 1156 /* Some work done, but not enough to stay in polling, 1157 * exit polling 1158 */ 1159 1160 napi_complete(napi); 1161 vnic_intr_unmask(&enic->intr[intr]); 1162 } 1163 enic_poll_unlock_napi(&enic->rq[cq_rq]); 1164 1165 return rq_work_done; 1166 } 1167 1168 static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq) 1169 { 1170 unsigned int intr = enic_msix_rq_intr(enic, rq->index); 1171 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1172 u32 timer = cq->tobe_rx_coal_timeval; 1173 1174 if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) { 1175 vnic_intr_coalescing_timer_set(&enic->intr[intr], timer); 1176 cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval; 1177 } 1178 } 1179 1180 static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq) 1181 { 1182 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 1183 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1184 struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter; 1185 int index; 1186 u32 timer; 1187 u32 range_start; 1188 u32 traffic; 1189 u64 delta; 1190 ktime_t now = ktime_get(); 1191 1192 delta = ktime_us_delta(now, cq->prev_ts); 1193 if (delta < ENIC_AIC_TS_BREAK) 1194 return; 1195 cq->prev_ts = now; 1196 1197 traffic = pkt_size_counter->large_pkt_bytes_cnt + 1198 pkt_size_counter->small_pkt_bytes_cnt; 1199 /* The table takes Mbps 1200 * traffic *= 8 => bits 1201 * traffic *= (10^6 / delta) => bps 1202 * traffic /= 10^6 => Mbps 1203 * 1204 * Combining, traffic *= (8 / delta) 1205 */ 1206 1207 traffic <<= 3; 1208 traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta; 1209 1210 for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++) 1211 if (traffic < mod_table[index].rx_rate) 1212 break; 1213 range_start = (pkt_size_counter->small_pkt_bytes_cnt > 1214 pkt_size_counter->large_pkt_bytes_cnt << 1) ? 1215 rx_coal->small_pkt_range_start : 1216 rx_coal->large_pkt_range_start; 1217 timer = range_start + ((rx_coal->range_end - range_start) * 1218 mod_table[index].range_percent / 100); 1219 /* Damping */ 1220 cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1; 1221 1222 pkt_size_counter->large_pkt_bytes_cnt = 0; 1223 pkt_size_counter->small_pkt_bytes_cnt = 0; 1224 } 1225 1226 #ifdef CONFIG_RFS_ACCEL 1227 static void enic_free_rx_cpu_rmap(struct enic *enic) 1228 { 1229 free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap); 1230 enic->netdev->rx_cpu_rmap = NULL; 1231 } 1232 1233 static void enic_set_rx_cpu_rmap(struct enic *enic) 1234 { 1235 int i, res; 1236 1237 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) { 1238 enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count); 1239 if (unlikely(!enic->netdev->rx_cpu_rmap)) 1240 return; 1241 for (i = 0; i < enic->rq_count; i++) { 1242 res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap, 1243 enic->msix_entry[i].vector); 1244 if (unlikely(res)) { 1245 enic_free_rx_cpu_rmap(enic); 1246 return; 1247 } 1248 } 1249 } 1250 } 1251 1252 #else 1253 1254 static void enic_free_rx_cpu_rmap(struct enic *enic) 1255 { 1256 } 1257 1258 static void enic_set_rx_cpu_rmap(struct enic *enic) 1259 { 1260 } 1261 1262 #endif /* CONFIG_RFS_ACCEL */ 1263 1264 #ifdef CONFIG_NET_RX_BUSY_POLL 1265 int enic_busy_poll(struct napi_struct *napi) 1266 { 1267 struct net_device *netdev = napi->dev; 1268 struct enic *enic = netdev_priv(netdev); 1269 unsigned int rq = (napi - &enic->napi[0]); 1270 unsigned int cq = enic_cq_rq(enic, rq); 1271 unsigned int intr = enic_msix_rq_intr(enic, rq); 1272 unsigned int work_to_do = -1; /* clean all pkts possible */ 1273 unsigned int work_done; 1274 1275 if (!enic_poll_lock_poll(&enic->rq[rq])) 1276 return LL_FLUSH_BUSY; 1277 work_done = vnic_cq_service(&enic->cq[cq], work_to_do, 1278 enic_rq_service, NULL); 1279 1280 if (work_done > 0) 1281 vnic_intr_return_credits(&enic->intr[intr], 1282 work_done, 0, 0); 1283 vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf); 1284 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1285 enic_calc_int_moderation(enic, &enic->rq[rq]); 1286 enic_poll_unlock_poll(&enic->rq[rq]); 1287 1288 return work_done; 1289 } 1290 #endif /* CONFIG_NET_RX_BUSY_POLL */ 1291 1292 static int enic_poll_msix_wq(struct napi_struct *napi, int budget) 1293 { 1294 struct net_device *netdev = napi->dev; 1295 struct enic *enic = netdev_priv(netdev); 1296 unsigned int wq_index = (napi - &enic->napi[0]) - enic->rq_count; 1297 struct vnic_wq *wq = &enic->wq[wq_index]; 1298 unsigned int cq; 1299 unsigned int intr; 1300 unsigned int wq_work_to_do = -1; /* clean all desc possible */ 1301 unsigned int wq_work_done; 1302 unsigned int wq_irq; 1303 1304 wq_irq = wq->index; 1305 cq = enic_cq_wq(enic, wq_irq); 1306 intr = enic_msix_wq_intr(enic, wq_irq); 1307 wq_work_done = vnic_cq_service(&enic->cq[cq], wq_work_to_do, 1308 enic_wq_service, NULL); 1309 1310 vnic_intr_return_credits(&enic->intr[intr], wq_work_done, 1311 0 /* don't unmask intr */, 1312 1 /* reset intr timer */); 1313 if (!wq_work_done) { 1314 napi_complete(napi); 1315 vnic_intr_unmask(&enic->intr[intr]); 1316 return 0; 1317 } 1318 1319 return budget; 1320 } 1321 1322 static int enic_poll_msix_rq(struct napi_struct *napi, int budget) 1323 { 1324 struct net_device *netdev = napi->dev; 1325 struct enic *enic = netdev_priv(netdev); 1326 unsigned int rq = (napi - &enic->napi[0]); 1327 unsigned int cq = enic_cq_rq(enic, rq); 1328 unsigned int intr = enic_msix_rq_intr(enic, rq); 1329 unsigned int work_to_do = budget; 1330 unsigned int work_done = 0; 1331 int err; 1332 1333 if (!enic_poll_lock_napi(&enic->rq[rq])) 1334 return work_done; 1335 /* Service RQ 1336 */ 1337 1338 if (budget > 0) 1339 work_done = vnic_cq_service(&enic->cq[cq], 1340 work_to_do, enic_rq_service, NULL); 1341 1342 /* Return intr event credits for this polling 1343 * cycle. An intr event is the completion of a 1344 * RQ packet. 1345 */ 1346 1347 if (work_done > 0) 1348 vnic_intr_return_credits(&enic->intr[intr], 1349 work_done, 1350 0 /* don't unmask intr */, 1351 0 /* don't reset intr timer */); 1352 1353 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf); 1354 1355 /* Buffer allocation failed. Stay in polling mode 1356 * so we can try to fill the ring again. 1357 */ 1358 1359 if (err) 1360 work_done = work_to_do; 1361 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1362 /* Call the function which refreshes 1363 * the intr coalescing timer value based on 1364 * the traffic. This is supported only in 1365 * the case of MSI-x mode 1366 */ 1367 enic_calc_int_moderation(enic, &enic->rq[rq]); 1368 1369 if (work_done < work_to_do) { 1370 1371 /* Some work done, but not enough to stay in polling, 1372 * exit polling 1373 */ 1374 1375 napi_complete(napi); 1376 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1377 enic_set_int_moderation(enic, &enic->rq[rq]); 1378 vnic_intr_unmask(&enic->intr[intr]); 1379 } 1380 enic_poll_unlock_napi(&enic->rq[rq]); 1381 1382 return work_done; 1383 } 1384 1385 static void enic_notify_timer(unsigned long data) 1386 { 1387 struct enic *enic = (struct enic *)data; 1388 1389 enic_notify_check(enic); 1390 1391 mod_timer(&enic->notify_timer, 1392 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD)); 1393 } 1394 1395 static void enic_free_intr(struct enic *enic) 1396 { 1397 struct net_device *netdev = enic->netdev; 1398 unsigned int i; 1399 1400 enic_free_rx_cpu_rmap(enic); 1401 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1402 case VNIC_DEV_INTR_MODE_INTX: 1403 free_irq(enic->pdev->irq, netdev); 1404 break; 1405 case VNIC_DEV_INTR_MODE_MSI: 1406 free_irq(enic->pdev->irq, enic); 1407 break; 1408 case VNIC_DEV_INTR_MODE_MSIX: 1409 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) 1410 if (enic->msix[i].requested) 1411 free_irq(enic->msix_entry[i].vector, 1412 enic->msix[i].devid); 1413 break; 1414 default: 1415 break; 1416 } 1417 } 1418 1419 static int enic_request_intr(struct enic *enic) 1420 { 1421 struct net_device *netdev = enic->netdev; 1422 unsigned int i, intr; 1423 int err = 0; 1424 1425 enic_set_rx_cpu_rmap(enic); 1426 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1427 1428 case VNIC_DEV_INTR_MODE_INTX: 1429 1430 err = request_irq(enic->pdev->irq, enic_isr_legacy, 1431 IRQF_SHARED, netdev->name, netdev); 1432 break; 1433 1434 case VNIC_DEV_INTR_MODE_MSI: 1435 1436 err = request_irq(enic->pdev->irq, enic_isr_msi, 1437 0, netdev->name, enic); 1438 break; 1439 1440 case VNIC_DEV_INTR_MODE_MSIX: 1441 1442 for (i = 0; i < enic->rq_count; i++) { 1443 intr = enic_msix_rq_intr(enic, i); 1444 snprintf(enic->msix[intr].devname, 1445 sizeof(enic->msix[intr].devname), 1446 "%.11s-rx-%d", netdev->name, i); 1447 enic->msix[intr].isr = enic_isr_msix; 1448 enic->msix[intr].devid = &enic->napi[i]; 1449 } 1450 1451 for (i = 0; i < enic->wq_count; i++) { 1452 int wq = enic_cq_wq(enic, i); 1453 1454 intr = enic_msix_wq_intr(enic, i); 1455 snprintf(enic->msix[intr].devname, 1456 sizeof(enic->msix[intr].devname), 1457 "%.11s-tx-%d", netdev->name, i); 1458 enic->msix[intr].isr = enic_isr_msix; 1459 enic->msix[intr].devid = &enic->napi[wq]; 1460 } 1461 1462 intr = enic_msix_err_intr(enic); 1463 snprintf(enic->msix[intr].devname, 1464 sizeof(enic->msix[intr].devname), 1465 "%.11s-err", netdev->name); 1466 enic->msix[intr].isr = enic_isr_msix_err; 1467 enic->msix[intr].devid = enic; 1468 1469 intr = enic_msix_notify_intr(enic); 1470 snprintf(enic->msix[intr].devname, 1471 sizeof(enic->msix[intr].devname), 1472 "%.11s-notify", netdev->name); 1473 enic->msix[intr].isr = enic_isr_msix_notify; 1474 enic->msix[intr].devid = enic; 1475 1476 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) 1477 enic->msix[i].requested = 0; 1478 1479 for (i = 0; i < enic->intr_count; i++) { 1480 err = request_irq(enic->msix_entry[i].vector, 1481 enic->msix[i].isr, 0, 1482 enic->msix[i].devname, 1483 enic->msix[i].devid); 1484 if (err) { 1485 enic_free_intr(enic); 1486 break; 1487 } 1488 enic->msix[i].requested = 1; 1489 } 1490 1491 break; 1492 1493 default: 1494 break; 1495 } 1496 1497 return err; 1498 } 1499 1500 static void enic_synchronize_irqs(struct enic *enic) 1501 { 1502 unsigned int i; 1503 1504 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1505 case VNIC_DEV_INTR_MODE_INTX: 1506 case VNIC_DEV_INTR_MODE_MSI: 1507 synchronize_irq(enic->pdev->irq); 1508 break; 1509 case VNIC_DEV_INTR_MODE_MSIX: 1510 for (i = 0; i < enic->intr_count; i++) 1511 synchronize_irq(enic->msix_entry[i].vector); 1512 break; 1513 default: 1514 break; 1515 } 1516 } 1517 1518 static void enic_set_rx_coal_setting(struct enic *enic) 1519 { 1520 unsigned int speed; 1521 int index = -1; 1522 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 1523 1524 /* If intr mode is not MSIX, do not do adaptive coalescing */ 1525 if (VNIC_DEV_INTR_MODE_MSIX != vnic_dev_get_intr_mode(enic->vdev)) { 1526 netdev_info(enic->netdev, "INTR mode is not MSIX, Not initializing adaptive coalescing"); 1527 return; 1528 } 1529 1530 /* 1. Read the link speed from fw 1531 * 2. Pick the default range for the speed 1532 * 3. Update it in enic->rx_coalesce_setting 1533 */ 1534 speed = vnic_dev_port_speed(enic->vdev); 1535 if (ENIC_LINK_SPEED_10G < speed) 1536 index = ENIC_LINK_40G_INDEX; 1537 else if (ENIC_LINK_SPEED_4G < speed) 1538 index = ENIC_LINK_10G_INDEX; 1539 else 1540 index = ENIC_LINK_4G_INDEX; 1541 1542 rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start; 1543 rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start; 1544 rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END; 1545 1546 /* Start with the value provided by UCSM */ 1547 for (index = 0; index < enic->rq_count; index++) 1548 enic->cq[index].cur_rx_coal_timeval = 1549 enic->config.intr_timer_usec; 1550 1551 rx_coal->use_adaptive_rx_coalesce = 1; 1552 } 1553 1554 static int enic_dev_notify_set(struct enic *enic) 1555 { 1556 int err; 1557 1558 spin_lock_bh(&enic->devcmd_lock); 1559 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1560 case VNIC_DEV_INTR_MODE_INTX: 1561 err = vnic_dev_notify_set(enic->vdev, 1562 enic_legacy_notify_intr()); 1563 break; 1564 case VNIC_DEV_INTR_MODE_MSIX: 1565 err = vnic_dev_notify_set(enic->vdev, 1566 enic_msix_notify_intr(enic)); 1567 break; 1568 default: 1569 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */); 1570 break; 1571 } 1572 spin_unlock_bh(&enic->devcmd_lock); 1573 1574 return err; 1575 } 1576 1577 static void enic_notify_timer_start(struct enic *enic) 1578 { 1579 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1580 case VNIC_DEV_INTR_MODE_MSI: 1581 mod_timer(&enic->notify_timer, jiffies); 1582 break; 1583 default: 1584 /* Using intr for notification for INTx/MSI-X */ 1585 break; 1586 } 1587 } 1588 1589 /* rtnl lock is held, process context */ 1590 static int enic_open(struct net_device *netdev) 1591 { 1592 struct enic *enic = netdev_priv(netdev); 1593 unsigned int i; 1594 int err; 1595 1596 err = enic_request_intr(enic); 1597 if (err) { 1598 netdev_err(netdev, "Unable to request irq.\n"); 1599 return err; 1600 } 1601 1602 err = enic_dev_notify_set(enic); 1603 if (err) { 1604 netdev_err(netdev, 1605 "Failed to alloc notify buffer, aborting.\n"); 1606 goto err_out_free_intr; 1607 } 1608 1609 for (i = 0; i < enic->rq_count; i++) { 1610 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf); 1611 /* Need at least one buffer on ring to get going */ 1612 if (vnic_rq_desc_used(&enic->rq[i]) == 0) { 1613 netdev_err(netdev, "Unable to alloc receive buffers\n"); 1614 err = -ENOMEM; 1615 goto err_out_notify_unset; 1616 } 1617 } 1618 1619 for (i = 0; i < enic->wq_count; i++) 1620 vnic_wq_enable(&enic->wq[i]); 1621 for (i = 0; i < enic->rq_count; i++) 1622 vnic_rq_enable(&enic->rq[i]); 1623 1624 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1625 enic_dev_add_station_addr(enic); 1626 1627 enic_set_rx_mode(netdev); 1628 1629 netif_tx_wake_all_queues(netdev); 1630 1631 for (i = 0; i < enic->rq_count; i++) { 1632 enic_busy_poll_init_lock(&enic->rq[i]); 1633 napi_enable(&enic->napi[i]); 1634 } 1635 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1636 for (i = 0; i < enic->wq_count; i++) 1637 napi_enable(&enic->napi[enic_cq_wq(enic, i)]); 1638 enic_dev_enable(enic); 1639 1640 for (i = 0; i < enic->intr_count; i++) 1641 vnic_intr_unmask(&enic->intr[i]); 1642 1643 enic_notify_timer_start(enic); 1644 enic_rfs_flw_tbl_init(enic); 1645 1646 return 0; 1647 1648 err_out_notify_unset: 1649 enic_dev_notify_unset(enic); 1650 err_out_free_intr: 1651 enic_free_intr(enic); 1652 1653 return err; 1654 } 1655 1656 /* rtnl lock is held, process context */ 1657 static int enic_stop(struct net_device *netdev) 1658 { 1659 struct enic *enic = netdev_priv(netdev); 1660 unsigned int i; 1661 int err; 1662 1663 for (i = 0; i < enic->intr_count; i++) { 1664 vnic_intr_mask(&enic->intr[i]); 1665 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */ 1666 } 1667 1668 enic_synchronize_irqs(enic); 1669 1670 del_timer_sync(&enic->notify_timer); 1671 enic_rfs_flw_tbl_free(enic); 1672 1673 enic_dev_disable(enic); 1674 1675 for (i = 0; i < enic->rq_count; i++) { 1676 napi_disable(&enic->napi[i]); 1677 local_bh_disable(); 1678 while (!enic_poll_lock_napi(&enic->rq[i])) 1679 mdelay(1); 1680 local_bh_enable(); 1681 } 1682 1683 netif_carrier_off(netdev); 1684 netif_tx_disable(netdev); 1685 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1686 for (i = 0; i < enic->wq_count; i++) 1687 napi_disable(&enic->napi[enic_cq_wq(enic, i)]); 1688 1689 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1690 enic_dev_del_station_addr(enic); 1691 1692 for (i = 0; i < enic->wq_count; i++) { 1693 err = vnic_wq_disable(&enic->wq[i]); 1694 if (err) 1695 return err; 1696 } 1697 for (i = 0; i < enic->rq_count; i++) { 1698 err = vnic_rq_disable(&enic->rq[i]); 1699 if (err) 1700 return err; 1701 } 1702 1703 enic_dev_notify_unset(enic); 1704 enic_free_intr(enic); 1705 1706 for (i = 0; i < enic->wq_count; i++) 1707 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf); 1708 for (i = 0; i < enic->rq_count; i++) 1709 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf); 1710 for (i = 0; i < enic->cq_count; i++) 1711 vnic_cq_clean(&enic->cq[i]); 1712 for (i = 0; i < enic->intr_count; i++) 1713 vnic_intr_clean(&enic->intr[i]); 1714 1715 return 0; 1716 } 1717 1718 static int enic_change_mtu(struct net_device *netdev, int new_mtu) 1719 { 1720 struct enic *enic = netdev_priv(netdev); 1721 int running = netif_running(netdev); 1722 1723 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU) 1724 return -EINVAL; 1725 1726 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 1727 return -EOPNOTSUPP; 1728 1729 if (running) 1730 enic_stop(netdev); 1731 1732 netdev->mtu = new_mtu; 1733 1734 if (netdev->mtu > enic->port_mtu) 1735 netdev_warn(netdev, 1736 "interface MTU (%d) set higher than port MTU (%d)\n", 1737 netdev->mtu, enic->port_mtu); 1738 1739 if (running) 1740 enic_open(netdev); 1741 1742 return 0; 1743 } 1744 1745 static void enic_change_mtu_work(struct work_struct *work) 1746 { 1747 struct enic *enic = container_of(work, struct enic, change_mtu_work); 1748 struct net_device *netdev = enic->netdev; 1749 int new_mtu = vnic_dev_mtu(enic->vdev); 1750 int err; 1751 unsigned int i; 1752 1753 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu)); 1754 1755 rtnl_lock(); 1756 1757 /* Stop RQ */ 1758 del_timer_sync(&enic->notify_timer); 1759 1760 for (i = 0; i < enic->rq_count; i++) 1761 napi_disable(&enic->napi[i]); 1762 1763 vnic_intr_mask(&enic->intr[0]); 1764 enic_synchronize_irqs(enic); 1765 err = vnic_rq_disable(&enic->rq[0]); 1766 if (err) { 1767 rtnl_unlock(); 1768 netdev_err(netdev, "Unable to disable RQ.\n"); 1769 return; 1770 } 1771 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf); 1772 vnic_cq_clean(&enic->cq[0]); 1773 vnic_intr_clean(&enic->intr[0]); 1774 1775 /* Fill RQ with new_mtu-sized buffers */ 1776 netdev->mtu = new_mtu; 1777 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); 1778 /* Need at least one buffer on ring to get going */ 1779 if (vnic_rq_desc_used(&enic->rq[0]) == 0) { 1780 rtnl_unlock(); 1781 netdev_err(netdev, "Unable to alloc receive buffers.\n"); 1782 return; 1783 } 1784 1785 /* Start RQ */ 1786 vnic_rq_enable(&enic->rq[0]); 1787 napi_enable(&enic->napi[0]); 1788 vnic_intr_unmask(&enic->intr[0]); 1789 enic_notify_timer_start(enic); 1790 1791 rtnl_unlock(); 1792 1793 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu); 1794 } 1795 1796 #ifdef CONFIG_NET_POLL_CONTROLLER 1797 static void enic_poll_controller(struct net_device *netdev) 1798 { 1799 struct enic *enic = netdev_priv(netdev); 1800 struct vnic_dev *vdev = enic->vdev; 1801 unsigned int i, intr; 1802 1803 switch (vnic_dev_get_intr_mode(vdev)) { 1804 case VNIC_DEV_INTR_MODE_MSIX: 1805 for (i = 0; i < enic->rq_count; i++) { 1806 intr = enic_msix_rq_intr(enic, i); 1807 enic_isr_msix(enic->msix_entry[intr].vector, 1808 &enic->napi[i]); 1809 } 1810 1811 for (i = 0; i < enic->wq_count; i++) { 1812 intr = enic_msix_wq_intr(enic, i); 1813 enic_isr_msix(enic->msix_entry[intr].vector, 1814 &enic->napi[enic_cq_wq(enic, i)]); 1815 } 1816 1817 break; 1818 case VNIC_DEV_INTR_MODE_MSI: 1819 enic_isr_msi(enic->pdev->irq, enic); 1820 break; 1821 case VNIC_DEV_INTR_MODE_INTX: 1822 enic_isr_legacy(enic->pdev->irq, netdev); 1823 break; 1824 default: 1825 break; 1826 } 1827 } 1828 #endif 1829 1830 static int enic_dev_wait(struct vnic_dev *vdev, 1831 int (*start)(struct vnic_dev *, int), 1832 int (*finished)(struct vnic_dev *, int *), 1833 int arg) 1834 { 1835 unsigned long time; 1836 int done; 1837 int err; 1838 1839 BUG_ON(in_interrupt()); 1840 1841 err = start(vdev, arg); 1842 if (err) 1843 return err; 1844 1845 /* Wait for func to complete...2 seconds max 1846 */ 1847 1848 time = jiffies + (HZ * 2); 1849 do { 1850 1851 err = finished(vdev, &done); 1852 if (err) 1853 return err; 1854 1855 if (done) 1856 return 0; 1857 1858 schedule_timeout_uninterruptible(HZ / 10); 1859 1860 } while (time_after(time, jiffies)); 1861 1862 return -ETIMEDOUT; 1863 } 1864 1865 static int enic_dev_open(struct enic *enic) 1866 { 1867 int err; 1868 1869 err = enic_dev_wait(enic->vdev, vnic_dev_open, 1870 vnic_dev_open_done, 0); 1871 if (err) 1872 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n", 1873 err); 1874 1875 return err; 1876 } 1877 1878 static int enic_dev_hang_reset(struct enic *enic) 1879 { 1880 int err; 1881 1882 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset, 1883 vnic_dev_hang_reset_done, 0); 1884 if (err) 1885 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n", 1886 err); 1887 1888 return err; 1889 } 1890 1891 int __enic_set_rsskey(struct enic *enic) 1892 { 1893 union vnic_rss_key *rss_key_buf_va; 1894 dma_addr_t rss_key_buf_pa; 1895 int i, kidx, bidx, err; 1896 1897 rss_key_buf_va = pci_zalloc_consistent(enic->pdev, 1898 sizeof(union vnic_rss_key), 1899 &rss_key_buf_pa); 1900 if (!rss_key_buf_va) 1901 return -ENOMEM; 1902 1903 for (i = 0; i < ENIC_RSS_LEN; i++) { 1904 kidx = i / ENIC_RSS_BYTES_PER_KEY; 1905 bidx = i % ENIC_RSS_BYTES_PER_KEY; 1906 rss_key_buf_va->key[kidx].b[bidx] = enic->rss_key[i]; 1907 } 1908 spin_lock_bh(&enic->devcmd_lock); 1909 err = enic_set_rss_key(enic, 1910 rss_key_buf_pa, 1911 sizeof(union vnic_rss_key)); 1912 spin_unlock_bh(&enic->devcmd_lock); 1913 1914 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key), 1915 rss_key_buf_va, rss_key_buf_pa); 1916 1917 return err; 1918 } 1919 1920 static int enic_set_rsskey(struct enic *enic) 1921 { 1922 netdev_rss_key_fill(enic->rss_key, ENIC_RSS_LEN); 1923 1924 return __enic_set_rsskey(enic); 1925 } 1926 1927 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits) 1928 { 1929 dma_addr_t rss_cpu_buf_pa; 1930 union vnic_rss_cpu *rss_cpu_buf_va = NULL; 1931 unsigned int i; 1932 int err; 1933 1934 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev, 1935 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa); 1936 if (!rss_cpu_buf_va) 1937 return -ENOMEM; 1938 1939 for (i = 0; i < (1 << rss_hash_bits); i++) 1940 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count; 1941 1942 spin_lock_bh(&enic->devcmd_lock); 1943 err = enic_set_rss_cpu(enic, 1944 rss_cpu_buf_pa, 1945 sizeof(union vnic_rss_cpu)); 1946 spin_unlock_bh(&enic->devcmd_lock); 1947 1948 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu), 1949 rss_cpu_buf_va, rss_cpu_buf_pa); 1950 1951 return err; 1952 } 1953 1954 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu, 1955 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable) 1956 { 1957 const u8 tso_ipid_split_en = 0; 1958 const u8 ig_vlan_strip_en = 1; 1959 int err; 1960 1961 /* Enable VLAN tag stripping. 1962 */ 1963 1964 spin_lock_bh(&enic->devcmd_lock); 1965 err = enic_set_nic_cfg(enic, 1966 rss_default_cpu, rss_hash_type, 1967 rss_hash_bits, rss_base_cpu, 1968 rss_enable, tso_ipid_split_en, 1969 ig_vlan_strip_en); 1970 spin_unlock_bh(&enic->devcmd_lock); 1971 1972 return err; 1973 } 1974 1975 static int enic_set_rss_nic_cfg(struct enic *enic) 1976 { 1977 struct device *dev = enic_get_dev(enic); 1978 const u8 rss_default_cpu = 0; 1979 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 | 1980 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 | 1981 NIC_CFG_RSS_HASH_TYPE_IPV6 | 1982 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6; 1983 const u8 rss_hash_bits = 7; 1984 const u8 rss_base_cpu = 0; 1985 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1); 1986 1987 if (rss_enable) { 1988 if (!enic_set_rsskey(enic)) { 1989 if (enic_set_rsscpu(enic, rss_hash_bits)) { 1990 rss_enable = 0; 1991 dev_warn(dev, "RSS disabled, " 1992 "Failed to set RSS cpu indirection table."); 1993 } 1994 } else { 1995 rss_enable = 0; 1996 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n"); 1997 } 1998 } 1999 2000 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type, 2001 rss_hash_bits, rss_base_cpu, rss_enable); 2002 } 2003 2004 static void enic_reset(struct work_struct *work) 2005 { 2006 struct enic *enic = container_of(work, struct enic, reset); 2007 2008 if (!netif_running(enic->netdev)) 2009 return; 2010 2011 rtnl_lock(); 2012 2013 spin_lock(&enic->enic_api_lock); 2014 enic_dev_hang_notify(enic); 2015 enic_stop(enic->netdev); 2016 enic_dev_hang_reset(enic); 2017 enic_reset_addr_lists(enic); 2018 enic_init_vnic_resources(enic); 2019 enic_set_rss_nic_cfg(enic); 2020 enic_dev_set_ig_vlan_rewrite_mode(enic); 2021 enic_open(enic->netdev); 2022 spin_unlock(&enic->enic_api_lock); 2023 call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev); 2024 2025 rtnl_unlock(); 2026 } 2027 2028 static int enic_set_intr_mode(struct enic *enic) 2029 { 2030 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX); 2031 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX); 2032 unsigned int i; 2033 2034 /* Set interrupt mode (INTx, MSI, MSI-X) depending 2035 * on system capabilities. 2036 * 2037 * Try MSI-X first 2038 * 2039 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs 2040 * (the second to last INTR is used for WQ/RQ errors) 2041 * (the last INTR is used for notifications) 2042 */ 2043 2044 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2); 2045 for (i = 0; i < n + m + 2; i++) 2046 enic->msix_entry[i].entry = i; 2047 2048 /* Use multiple RQs if RSS is enabled 2049 */ 2050 2051 if (ENIC_SETTING(enic, RSS) && 2052 enic->config.intr_mode < 1 && 2053 enic->rq_count >= n && 2054 enic->wq_count >= m && 2055 enic->cq_count >= n + m && 2056 enic->intr_count >= n + m + 2) { 2057 2058 if (pci_enable_msix_range(enic->pdev, enic->msix_entry, 2059 n + m + 2, n + m + 2) > 0) { 2060 2061 enic->rq_count = n; 2062 enic->wq_count = m; 2063 enic->cq_count = n + m; 2064 enic->intr_count = n + m + 2; 2065 2066 vnic_dev_set_intr_mode(enic->vdev, 2067 VNIC_DEV_INTR_MODE_MSIX); 2068 2069 return 0; 2070 } 2071 } 2072 2073 if (enic->config.intr_mode < 1 && 2074 enic->rq_count >= 1 && 2075 enic->wq_count >= m && 2076 enic->cq_count >= 1 + m && 2077 enic->intr_count >= 1 + m + 2) { 2078 if (pci_enable_msix_range(enic->pdev, enic->msix_entry, 2079 1 + m + 2, 1 + m + 2) > 0) { 2080 2081 enic->rq_count = 1; 2082 enic->wq_count = m; 2083 enic->cq_count = 1 + m; 2084 enic->intr_count = 1 + m + 2; 2085 2086 vnic_dev_set_intr_mode(enic->vdev, 2087 VNIC_DEV_INTR_MODE_MSIX); 2088 2089 return 0; 2090 } 2091 } 2092 2093 /* Next try MSI 2094 * 2095 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR 2096 */ 2097 2098 if (enic->config.intr_mode < 2 && 2099 enic->rq_count >= 1 && 2100 enic->wq_count >= 1 && 2101 enic->cq_count >= 2 && 2102 enic->intr_count >= 1 && 2103 !pci_enable_msi(enic->pdev)) { 2104 2105 enic->rq_count = 1; 2106 enic->wq_count = 1; 2107 enic->cq_count = 2; 2108 enic->intr_count = 1; 2109 2110 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI); 2111 2112 return 0; 2113 } 2114 2115 /* Next try INTx 2116 * 2117 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs 2118 * (the first INTR is used for WQ/RQ) 2119 * (the second INTR is used for WQ/RQ errors) 2120 * (the last INTR is used for notifications) 2121 */ 2122 2123 if (enic->config.intr_mode < 3 && 2124 enic->rq_count >= 1 && 2125 enic->wq_count >= 1 && 2126 enic->cq_count >= 2 && 2127 enic->intr_count >= 3) { 2128 2129 enic->rq_count = 1; 2130 enic->wq_count = 1; 2131 enic->cq_count = 2; 2132 enic->intr_count = 3; 2133 2134 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX); 2135 2136 return 0; 2137 } 2138 2139 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2140 2141 return -EINVAL; 2142 } 2143 2144 static void enic_clear_intr_mode(struct enic *enic) 2145 { 2146 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2147 case VNIC_DEV_INTR_MODE_MSIX: 2148 pci_disable_msix(enic->pdev); 2149 break; 2150 case VNIC_DEV_INTR_MODE_MSI: 2151 pci_disable_msi(enic->pdev); 2152 break; 2153 default: 2154 break; 2155 } 2156 2157 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2158 } 2159 2160 static const struct net_device_ops enic_netdev_dynamic_ops = { 2161 .ndo_open = enic_open, 2162 .ndo_stop = enic_stop, 2163 .ndo_start_xmit = enic_hard_start_xmit, 2164 .ndo_get_stats64 = enic_get_stats, 2165 .ndo_validate_addr = eth_validate_addr, 2166 .ndo_set_rx_mode = enic_set_rx_mode, 2167 .ndo_set_mac_address = enic_set_mac_address_dynamic, 2168 .ndo_change_mtu = enic_change_mtu, 2169 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2170 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2171 .ndo_tx_timeout = enic_tx_timeout, 2172 .ndo_set_vf_port = enic_set_vf_port, 2173 .ndo_get_vf_port = enic_get_vf_port, 2174 .ndo_set_vf_mac = enic_set_vf_mac, 2175 #ifdef CONFIG_NET_POLL_CONTROLLER 2176 .ndo_poll_controller = enic_poll_controller, 2177 #endif 2178 #ifdef CONFIG_RFS_ACCEL 2179 .ndo_rx_flow_steer = enic_rx_flow_steer, 2180 #endif 2181 #ifdef CONFIG_NET_RX_BUSY_POLL 2182 .ndo_busy_poll = enic_busy_poll, 2183 #endif 2184 }; 2185 2186 static const struct net_device_ops enic_netdev_ops = { 2187 .ndo_open = enic_open, 2188 .ndo_stop = enic_stop, 2189 .ndo_start_xmit = enic_hard_start_xmit, 2190 .ndo_get_stats64 = enic_get_stats, 2191 .ndo_validate_addr = eth_validate_addr, 2192 .ndo_set_mac_address = enic_set_mac_address, 2193 .ndo_set_rx_mode = enic_set_rx_mode, 2194 .ndo_change_mtu = enic_change_mtu, 2195 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2196 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2197 .ndo_tx_timeout = enic_tx_timeout, 2198 .ndo_set_vf_port = enic_set_vf_port, 2199 .ndo_get_vf_port = enic_get_vf_port, 2200 .ndo_set_vf_mac = enic_set_vf_mac, 2201 #ifdef CONFIG_NET_POLL_CONTROLLER 2202 .ndo_poll_controller = enic_poll_controller, 2203 #endif 2204 #ifdef CONFIG_RFS_ACCEL 2205 .ndo_rx_flow_steer = enic_rx_flow_steer, 2206 #endif 2207 #ifdef CONFIG_NET_RX_BUSY_POLL 2208 .ndo_busy_poll = enic_busy_poll, 2209 #endif 2210 }; 2211 2212 static void enic_dev_deinit(struct enic *enic) 2213 { 2214 unsigned int i; 2215 2216 for (i = 0; i < enic->rq_count; i++) { 2217 napi_hash_del(&enic->napi[i]); 2218 netif_napi_del(&enic->napi[i]); 2219 } 2220 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 2221 for (i = 0; i < enic->wq_count; i++) 2222 netif_napi_del(&enic->napi[enic_cq_wq(enic, i)]); 2223 2224 enic_free_vnic_resources(enic); 2225 enic_clear_intr_mode(enic); 2226 } 2227 2228 static int enic_dev_init(struct enic *enic) 2229 { 2230 struct device *dev = enic_get_dev(enic); 2231 struct net_device *netdev = enic->netdev; 2232 unsigned int i; 2233 int err; 2234 2235 /* Get interrupt coalesce timer info */ 2236 err = enic_dev_intr_coal_timer_info(enic); 2237 if (err) { 2238 dev_warn(dev, "Using default conversion factor for " 2239 "interrupt coalesce timer\n"); 2240 vnic_dev_intr_coal_timer_info_default(enic->vdev); 2241 } 2242 2243 /* Get vNIC configuration 2244 */ 2245 2246 err = enic_get_vnic_config(enic); 2247 if (err) { 2248 dev_err(dev, "Get vNIC configuration failed, aborting\n"); 2249 return err; 2250 } 2251 2252 /* Get available resource counts 2253 */ 2254 2255 enic_get_res_counts(enic); 2256 2257 /* Set interrupt mode based on resource counts and system 2258 * capabilities 2259 */ 2260 2261 err = enic_set_intr_mode(enic); 2262 if (err) { 2263 dev_err(dev, "Failed to set intr mode based on resource " 2264 "counts and system capabilities, aborting\n"); 2265 return err; 2266 } 2267 2268 /* Allocate and configure vNIC resources 2269 */ 2270 2271 err = enic_alloc_vnic_resources(enic); 2272 if (err) { 2273 dev_err(dev, "Failed to alloc vNIC resources, aborting\n"); 2274 goto err_out_free_vnic_resources; 2275 } 2276 2277 enic_init_vnic_resources(enic); 2278 2279 err = enic_set_rss_nic_cfg(enic); 2280 if (err) { 2281 dev_err(dev, "Failed to config nic, aborting\n"); 2282 goto err_out_free_vnic_resources; 2283 } 2284 2285 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2286 default: 2287 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64); 2288 napi_hash_add(&enic->napi[0]); 2289 break; 2290 case VNIC_DEV_INTR_MODE_MSIX: 2291 for (i = 0; i < enic->rq_count; i++) { 2292 netif_napi_add(netdev, &enic->napi[i], 2293 enic_poll_msix_rq, NAPI_POLL_WEIGHT); 2294 napi_hash_add(&enic->napi[i]); 2295 } 2296 for (i = 0; i < enic->wq_count; i++) 2297 netif_napi_add(netdev, &enic->napi[enic_cq_wq(enic, i)], 2298 enic_poll_msix_wq, NAPI_POLL_WEIGHT); 2299 break; 2300 } 2301 2302 return 0; 2303 2304 err_out_free_vnic_resources: 2305 enic_clear_intr_mode(enic); 2306 enic_free_vnic_resources(enic); 2307 2308 return err; 2309 } 2310 2311 static void enic_iounmap(struct enic *enic) 2312 { 2313 unsigned int i; 2314 2315 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) 2316 if (enic->bar[i].vaddr) 2317 iounmap(enic->bar[i].vaddr); 2318 } 2319 2320 static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2321 { 2322 struct device *dev = &pdev->dev; 2323 struct net_device *netdev; 2324 struct enic *enic; 2325 int using_dac = 0; 2326 unsigned int i; 2327 int err; 2328 #ifdef CONFIG_PCI_IOV 2329 int pos = 0; 2330 #endif 2331 int num_pps = 1; 2332 2333 /* Allocate net device structure and initialize. Private 2334 * instance data is initialized to zero. 2335 */ 2336 2337 netdev = alloc_etherdev_mqs(sizeof(struct enic), 2338 ENIC_RQ_MAX, ENIC_WQ_MAX); 2339 if (!netdev) 2340 return -ENOMEM; 2341 2342 pci_set_drvdata(pdev, netdev); 2343 2344 SET_NETDEV_DEV(netdev, &pdev->dev); 2345 2346 enic = netdev_priv(netdev); 2347 enic->netdev = netdev; 2348 enic->pdev = pdev; 2349 2350 /* Setup PCI resources 2351 */ 2352 2353 err = pci_enable_device_mem(pdev); 2354 if (err) { 2355 dev_err(dev, "Cannot enable PCI device, aborting\n"); 2356 goto err_out_free_netdev; 2357 } 2358 2359 err = pci_request_regions(pdev, DRV_NAME); 2360 if (err) { 2361 dev_err(dev, "Cannot request PCI regions, aborting\n"); 2362 goto err_out_disable_device; 2363 } 2364 2365 pci_set_master(pdev); 2366 2367 /* Query PCI controller on system for DMA addressing 2368 * limitation for the device. Try 64-bit first, and 2369 * fail to 32-bit. 2370 */ 2371 2372 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 2373 if (err) { 2374 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2375 if (err) { 2376 dev_err(dev, "No usable DMA configuration, aborting\n"); 2377 goto err_out_release_regions; 2378 } 2379 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2380 if (err) { 2381 dev_err(dev, "Unable to obtain %u-bit DMA " 2382 "for consistent allocations, aborting\n", 32); 2383 goto err_out_release_regions; 2384 } 2385 } else { 2386 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 2387 if (err) { 2388 dev_err(dev, "Unable to obtain %u-bit DMA " 2389 "for consistent allocations, aborting\n", 64); 2390 goto err_out_release_regions; 2391 } 2392 using_dac = 1; 2393 } 2394 2395 /* Map vNIC resources from BAR0-5 2396 */ 2397 2398 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) { 2399 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM)) 2400 continue; 2401 enic->bar[i].len = pci_resource_len(pdev, i); 2402 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len); 2403 if (!enic->bar[i].vaddr) { 2404 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i); 2405 err = -ENODEV; 2406 goto err_out_iounmap; 2407 } 2408 enic->bar[i].bus_addr = pci_resource_start(pdev, i); 2409 } 2410 2411 /* Register vNIC device 2412 */ 2413 2414 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar, 2415 ARRAY_SIZE(enic->bar)); 2416 if (!enic->vdev) { 2417 dev_err(dev, "vNIC registration failed, aborting\n"); 2418 err = -ENODEV; 2419 goto err_out_iounmap; 2420 } 2421 2422 #ifdef CONFIG_PCI_IOV 2423 /* Get number of subvnics */ 2424 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 2425 if (pos) { 2426 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, 2427 &enic->num_vfs); 2428 if (enic->num_vfs) { 2429 err = pci_enable_sriov(pdev, enic->num_vfs); 2430 if (err) { 2431 dev_err(dev, "SRIOV enable failed, aborting." 2432 " pci_enable_sriov() returned %d\n", 2433 err); 2434 goto err_out_vnic_unregister; 2435 } 2436 enic->priv_flags |= ENIC_SRIOV_ENABLED; 2437 num_pps = enic->num_vfs; 2438 } 2439 } 2440 #endif 2441 2442 /* Allocate structure for port profiles */ 2443 enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL); 2444 if (!enic->pp) { 2445 err = -ENOMEM; 2446 goto err_out_disable_sriov_pp; 2447 } 2448 2449 /* Issue device open to get device in known state 2450 */ 2451 2452 err = enic_dev_open(enic); 2453 if (err) { 2454 dev_err(dev, "vNIC dev open failed, aborting\n"); 2455 goto err_out_disable_sriov; 2456 } 2457 2458 /* Setup devcmd lock 2459 */ 2460 2461 spin_lock_init(&enic->devcmd_lock); 2462 spin_lock_init(&enic->enic_api_lock); 2463 2464 /* 2465 * Set ingress vlan rewrite mode before vnic initialization 2466 */ 2467 2468 err = enic_dev_set_ig_vlan_rewrite_mode(enic); 2469 if (err) { 2470 dev_err(dev, 2471 "Failed to set ingress vlan rewrite mode, aborting.\n"); 2472 goto err_out_dev_close; 2473 } 2474 2475 /* Issue device init to initialize the vnic-to-switch link. 2476 * We'll start with carrier off and wait for link UP 2477 * notification later to turn on carrier. We don't need 2478 * to wait here for the vnic-to-switch link initialization 2479 * to complete; link UP notification is the indication that 2480 * the process is complete. 2481 */ 2482 2483 netif_carrier_off(netdev); 2484 2485 /* Do not call dev_init for a dynamic vnic. 2486 * For a dynamic vnic, init_prov_info will be 2487 * called later by an upper layer. 2488 */ 2489 2490 if (!enic_is_dynamic(enic)) { 2491 err = vnic_dev_init(enic->vdev, 0); 2492 if (err) { 2493 dev_err(dev, "vNIC dev init failed, aborting\n"); 2494 goto err_out_dev_close; 2495 } 2496 } 2497 2498 err = enic_dev_init(enic); 2499 if (err) { 2500 dev_err(dev, "Device initialization failed, aborting\n"); 2501 goto err_out_dev_close; 2502 } 2503 2504 netif_set_real_num_tx_queues(netdev, enic->wq_count); 2505 netif_set_real_num_rx_queues(netdev, enic->rq_count); 2506 2507 /* Setup notification timer, HW reset task, and wq locks 2508 */ 2509 2510 init_timer(&enic->notify_timer); 2511 enic->notify_timer.function = enic_notify_timer; 2512 enic->notify_timer.data = (unsigned long)enic; 2513 2514 enic_set_rx_coal_setting(enic); 2515 INIT_WORK(&enic->reset, enic_reset); 2516 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work); 2517 2518 for (i = 0; i < enic->wq_count; i++) 2519 spin_lock_init(&enic->wq_lock[i]); 2520 2521 /* Register net device 2522 */ 2523 2524 enic->port_mtu = enic->config.mtu; 2525 (void)enic_change_mtu(netdev, enic->port_mtu); 2526 2527 err = enic_set_mac_addr(netdev, enic->mac_addr); 2528 if (err) { 2529 dev_err(dev, "Invalid MAC address, aborting\n"); 2530 goto err_out_dev_deinit; 2531 } 2532 2533 enic->tx_coalesce_usecs = enic->config.intr_timer_usec; 2534 /* rx coalesce time already got initialized. This gets used 2535 * if adaptive coal is turned off 2536 */ 2537 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs; 2538 2539 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 2540 netdev->netdev_ops = &enic_netdev_dynamic_ops; 2541 else 2542 netdev->netdev_ops = &enic_netdev_ops; 2543 2544 netdev->watchdog_timeo = 2 * HZ; 2545 enic_set_ethtool_ops(netdev); 2546 2547 netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 2548 if (ENIC_SETTING(enic, LOOP)) { 2549 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX; 2550 enic->loop_enable = 1; 2551 enic->loop_tag = enic->config.loop_tag; 2552 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag); 2553 } 2554 if (ENIC_SETTING(enic, TXCSUM)) 2555 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM; 2556 if (ENIC_SETTING(enic, TSO)) 2557 netdev->hw_features |= NETIF_F_TSO | 2558 NETIF_F_TSO6 | NETIF_F_TSO_ECN; 2559 if (ENIC_SETTING(enic, RSS)) 2560 netdev->hw_features |= NETIF_F_RXHASH; 2561 if (ENIC_SETTING(enic, RXCSUM)) 2562 netdev->hw_features |= NETIF_F_RXCSUM; 2563 2564 netdev->features |= netdev->hw_features; 2565 2566 #ifdef CONFIG_RFS_ACCEL 2567 netdev->hw_features |= NETIF_F_NTUPLE; 2568 #endif 2569 2570 if (using_dac) 2571 netdev->features |= NETIF_F_HIGHDMA; 2572 2573 netdev->priv_flags |= IFF_UNICAST_FLT; 2574 2575 err = register_netdev(netdev); 2576 if (err) { 2577 dev_err(dev, "Cannot register net device, aborting\n"); 2578 goto err_out_dev_deinit; 2579 } 2580 enic->rx_copybreak = RX_COPYBREAK_DEFAULT; 2581 2582 return 0; 2583 2584 err_out_dev_deinit: 2585 enic_dev_deinit(enic); 2586 err_out_dev_close: 2587 vnic_dev_close(enic->vdev); 2588 err_out_disable_sriov: 2589 kfree(enic->pp); 2590 err_out_disable_sriov_pp: 2591 #ifdef CONFIG_PCI_IOV 2592 if (enic_sriov_enabled(enic)) { 2593 pci_disable_sriov(pdev); 2594 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2595 } 2596 err_out_vnic_unregister: 2597 #endif 2598 vnic_dev_unregister(enic->vdev); 2599 err_out_iounmap: 2600 enic_iounmap(enic); 2601 err_out_release_regions: 2602 pci_release_regions(pdev); 2603 err_out_disable_device: 2604 pci_disable_device(pdev); 2605 err_out_free_netdev: 2606 free_netdev(netdev); 2607 2608 return err; 2609 } 2610 2611 static void enic_remove(struct pci_dev *pdev) 2612 { 2613 struct net_device *netdev = pci_get_drvdata(pdev); 2614 2615 if (netdev) { 2616 struct enic *enic = netdev_priv(netdev); 2617 2618 cancel_work_sync(&enic->reset); 2619 cancel_work_sync(&enic->change_mtu_work); 2620 unregister_netdev(netdev); 2621 enic_dev_deinit(enic); 2622 vnic_dev_close(enic->vdev); 2623 #ifdef CONFIG_PCI_IOV 2624 if (enic_sriov_enabled(enic)) { 2625 pci_disable_sriov(pdev); 2626 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2627 } 2628 #endif 2629 kfree(enic->pp); 2630 vnic_dev_unregister(enic->vdev); 2631 enic_iounmap(enic); 2632 pci_release_regions(pdev); 2633 pci_disable_device(pdev); 2634 free_netdev(netdev); 2635 } 2636 } 2637 2638 static struct pci_driver enic_driver = { 2639 .name = DRV_NAME, 2640 .id_table = enic_id_table, 2641 .probe = enic_probe, 2642 .remove = enic_remove, 2643 }; 2644 2645 static int __init enic_init_module(void) 2646 { 2647 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION); 2648 2649 return pci_register_driver(&enic_driver); 2650 } 2651 2652 static void __exit enic_cleanup_module(void) 2653 { 2654 pci_unregister_driver(&enic_driver); 2655 } 2656 2657 module_init(enic_init_module); 2658 module_exit(enic_cleanup_module); 2659