xref: /linux/drivers/net/ethernet/broadcom/cnic.h (revision 9410645520e9b820069761f3450ef6661418e279)
1d7afae05SJitendra Kalsaria /* cnic.h: QLogic CNIC core network driver.
2adfc5217SJeff Kirsher  *
3c3661283SMichael Chan  * Copyright (c) 2006-2014 Broadcom Corporation
4d7afae05SJitendra Kalsaria  * Copyright (c) 2014 QLogic Corporation
5adfc5217SJeff Kirsher  *
6adfc5217SJeff Kirsher  * This program is free software; you can redistribute it and/or modify
7adfc5217SJeff Kirsher  * it under the terms of the GNU General Public License as published by
8adfc5217SJeff Kirsher  * the Free Software Foundation.
9adfc5217SJeff Kirsher  *
10adfc5217SJeff Kirsher  */
11adfc5217SJeff Kirsher 
12adfc5217SJeff Kirsher 
13adfc5217SJeff Kirsher #ifndef CNIC_H
14adfc5217SJeff Kirsher #define CNIC_H
15adfc5217SJeff Kirsher 
16adfc5217SJeff Kirsher #define HC_INDEX_ISCSI_EQ_CONS			6
17adfc5217SJeff Kirsher 
18adfc5217SJeff Kirsher #define HC_INDEX_FCOE_EQ_CONS			3
19adfc5217SJeff Kirsher 
20adfc5217SJeff Kirsher #define HC_SP_INDEX_ETH_ISCSI_CQ_CONS		5
21adfc5217SJeff Kirsher #define HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS	1
22adfc5217SJeff Kirsher 
23adfc5217SJeff Kirsher #define KWQ_PAGE_CNT	4
24adfc5217SJeff Kirsher #define KCQ_PAGE_CNT	16
25adfc5217SJeff Kirsher 
26adfc5217SJeff Kirsher #define KWQ_CID 		24
27adfc5217SJeff Kirsher #define KCQ_CID 		25
28adfc5217SJeff Kirsher 
29adfc5217SJeff Kirsher /*
30adfc5217SJeff Kirsher  *	krnlq_context definition
31adfc5217SJeff Kirsher  */
32adfc5217SJeff Kirsher #define L5_KRNLQ_FLAGS	0x00000000
33adfc5217SJeff Kirsher #define L5_KRNLQ_SIZE	0x00000000
34adfc5217SJeff Kirsher #define L5_KRNLQ_TYPE	0x00000000
35adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ					(0xf<<0)
36adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_256					(0<<0)
37adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_512					(1<<0)
38adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_1K					(2<<0)
39adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_2K					(3<<0)
40adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_4K					(4<<0)
41adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_8K					(5<<0)
42adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_16K					(6<<0)
43adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_32K					(7<<0)
44adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_64K					(8<<0)
45adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_128K					(9<<0)
46adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_256K					(10<<0)
47adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_512K					(11<<0)
48adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_1M					(12<<0)
49adfc5217SJeff Kirsher #define KRNLQ_FLAGS_PG_SZ_2M					(13<<0)
50adfc5217SJeff Kirsher #define KRNLQ_FLAGS_QE_SELF_SEQ					(1<<15)
51adfc5217SJeff Kirsher #define KRNLQ_SIZE_TYPE_SIZE	((((0x28 + 0x1f) & ~0x1f) / 0x20) << 16)
52adfc5217SJeff Kirsher #define KRNLQ_TYPE_TYPE						(0xf<<28)
53adfc5217SJeff Kirsher #define KRNLQ_TYPE_TYPE_EMPTY					(0<<28)
54adfc5217SJeff Kirsher #define KRNLQ_TYPE_TYPE_KRNLQ					(6<<28)
55adfc5217SJeff Kirsher 
56adfc5217SJeff Kirsher #define L5_KRNLQ_HOST_QIDX		0x00000004
57adfc5217SJeff Kirsher #define L5_KRNLQ_HOST_FW_QIDX		0x00000008
58adfc5217SJeff Kirsher #define L5_KRNLQ_NX_QE_SELF_SEQ 	0x0000000c
59adfc5217SJeff Kirsher #define L5_KRNLQ_QE_SELF_SEQ_MAX	0x0000000c
60adfc5217SJeff Kirsher #define L5_KRNLQ_NX_QE_HADDR_HI 	0x00000010
61adfc5217SJeff Kirsher #define L5_KRNLQ_NX_QE_HADDR_LO 	0x00000014
62adfc5217SJeff Kirsher #define L5_KRNLQ_PGTBL_PGIDX		0x00000018
63adfc5217SJeff Kirsher #define L5_KRNLQ_NX_PG_QIDX 		0x00000018
64adfc5217SJeff Kirsher #define L5_KRNLQ_PGTBL_NPAGES		0x0000001c
65adfc5217SJeff Kirsher #define L5_KRNLQ_QIDX_INCR		0x0000001c
66adfc5217SJeff Kirsher #define L5_KRNLQ_PGTBL_HADDR_HI 	0x00000020
67adfc5217SJeff Kirsher #define L5_KRNLQ_PGTBL_HADDR_LO 	0x00000024
68adfc5217SJeff Kirsher 
69adfc5217SJeff Kirsher #define BNX2_PG_CTX_MAP			0x1a0034
70adfc5217SJeff Kirsher #define BNX2_ISCSI_CTX_MAP		0x1a0074
71adfc5217SJeff Kirsher 
72adfc5217SJeff Kirsher #define MAX_COMPLETED_KCQE	64
73adfc5217SJeff Kirsher 
74adfc5217SJeff Kirsher #define MAX_CNIC_L5_CONTEXT	256
75adfc5217SJeff Kirsher 
76adfc5217SJeff Kirsher #define MAX_CM_SK_TBL_SZ	MAX_CNIC_L5_CONTEXT
77adfc5217SJeff Kirsher 
78adfc5217SJeff Kirsher #define MAX_ISCSI_TBL_SZ	256
79adfc5217SJeff Kirsher 
80adfc5217SJeff Kirsher #define CNIC_LOCAL_PORT_MIN	60000
81adfc5217SJeff Kirsher #define CNIC_LOCAL_PORT_MAX	61024
82adfc5217SJeff Kirsher #define CNIC_LOCAL_PORT_RANGE	(CNIC_LOCAL_PORT_MAX - CNIC_LOCAL_PORT_MIN)
83adfc5217SJeff Kirsher 
842bc4078eSMichael Chan #define KWQE_CNT (BNX2_PAGE_SIZE / sizeof(struct kwqe))
852bc4078eSMichael Chan #define KCQE_CNT (BNX2_PAGE_SIZE / sizeof(struct kcqe))
86adfc5217SJeff Kirsher #define MAX_KWQE_CNT (KWQE_CNT - 1)
87adfc5217SJeff Kirsher #define MAX_KCQE_CNT (KCQE_CNT - 1)
88adfc5217SJeff Kirsher 
89adfc5217SJeff Kirsher #define MAX_KWQ_IDX	((KWQ_PAGE_CNT * KWQE_CNT) - 1)
90adfc5217SJeff Kirsher #define MAX_KCQ_IDX	((KCQ_PAGE_CNT * KCQE_CNT) - 1)
91adfc5217SJeff Kirsher 
922bc4078eSMichael Chan #define KWQ_PG(x) (((x) & ~MAX_KWQE_CNT) >> (BNX2_PAGE_BITS - 5))
93adfc5217SJeff Kirsher #define KWQ_IDX(x) ((x) & MAX_KWQE_CNT)
94adfc5217SJeff Kirsher 
952bc4078eSMichael Chan #define KCQ_PG(x) (((x) & ~MAX_KCQE_CNT) >> (BNX2_PAGE_BITS - 5))
96adfc5217SJeff Kirsher #define KCQ_IDX(x) ((x) & MAX_KCQE_CNT)
97adfc5217SJeff Kirsher 
98adfc5217SJeff Kirsher #define BNX2X_NEXT_KCQE(x) (((x) & (MAX_KCQE_CNT - 1)) ==		\
99adfc5217SJeff Kirsher 		(MAX_KCQE_CNT - 1)) ?					\
100adfc5217SJeff Kirsher 		(x) + 2 : (x) + 1
101adfc5217SJeff Kirsher 
102adfc5217SJeff Kirsher #define BNX2X_KWQ_DATA_PG(cp, x) ((x) / (cp)->kwq_16_data_pp)
103adfc5217SJeff Kirsher #define BNX2X_KWQ_DATA_IDX(cp, x) ((x) % (cp)->kwq_16_data_pp)
104adfc5217SJeff Kirsher #define BNX2X_KWQ_DATA(cp, x)						\
105adfc5217SJeff Kirsher 	&(cp)->kwq_16_data[BNX2X_KWQ_DATA_PG(cp, x)][BNX2X_KWQ_DATA_IDX(cp, x)]
106adfc5217SJeff Kirsher 
107adfc5217SJeff Kirsher #define DEF_IPID_START		0x8000
108adfc5217SJeff Kirsher 
109adfc5217SJeff Kirsher #define DEF_KA_TIMEOUT		10000
110adfc5217SJeff Kirsher #define DEF_KA_INTERVAL		300000
111adfc5217SJeff Kirsher #define DEF_KA_MAX_PROBE_COUNT	3
112adfc5217SJeff Kirsher #define DEF_TOS			0
113adfc5217SJeff Kirsher #define DEF_TTL			0xfe
114adfc5217SJeff Kirsher #define DEF_SND_SEQ_SCALE	0
115adfc5217SJeff Kirsher #define DEF_RCV_BUF		0xffff
116adfc5217SJeff Kirsher #define DEF_SND_BUF		0xffff
117adfc5217SJeff Kirsher #define DEF_SEED		0
118adfc5217SJeff Kirsher #define DEF_MAX_RT_TIME		500
119adfc5217SJeff Kirsher #define DEF_MAX_DA_COUNT	2
120adfc5217SJeff Kirsher #define DEF_SWS_TIMER		1000
121adfc5217SJeff Kirsher #define DEF_MAX_CWND		0xffff
122adfc5217SJeff Kirsher 
123adfc5217SJeff Kirsher struct cnic_ctx {
124adfc5217SJeff Kirsher 	u32		cid;
125adfc5217SJeff Kirsher 	void		*ctx;
126adfc5217SJeff Kirsher 	dma_addr_t	mapping;
127adfc5217SJeff Kirsher };
128adfc5217SJeff Kirsher 
129adfc5217SJeff Kirsher #define BNX2_MAX_CID		0x2000
130adfc5217SJeff Kirsher 
131adfc5217SJeff Kirsher struct cnic_dma {
132adfc5217SJeff Kirsher 	int		num_pages;
133adfc5217SJeff Kirsher 	void		**pg_arr;
134adfc5217SJeff Kirsher 	dma_addr_t	*pg_map_arr;
135adfc5217SJeff Kirsher 	int		pgtbl_size;
136adfc5217SJeff Kirsher 	u32		*pgtbl;
137adfc5217SJeff Kirsher 	dma_addr_t	pgtbl_map;
138adfc5217SJeff Kirsher };
139adfc5217SJeff Kirsher 
140adfc5217SJeff Kirsher struct cnic_id_tbl {
141adfc5217SJeff Kirsher 	spinlock_t	lock;
142adfc5217SJeff Kirsher 	u32		start;
143adfc5217SJeff Kirsher 	u32		max;
144adfc5217SJeff Kirsher 	u32		next;
145adfc5217SJeff Kirsher 	unsigned long	*table;
146adfc5217SJeff Kirsher };
147adfc5217SJeff Kirsher 
148adfc5217SJeff Kirsher #define CNIC_KWQ16_DATA_SIZE	128
149adfc5217SJeff Kirsher 
150adfc5217SJeff Kirsher struct kwqe_16_data {
151adfc5217SJeff Kirsher 	u8	data[CNIC_KWQ16_DATA_SIZE];
152adfc5217SJeff Kirsher };
153adfc5217SJeff Kirsher 
154adfc5217SJeff Kirsher struct cnic_iscsi {
155adfc5217SJeff Kirsher 	struct cnic_dma		task_array_info;
156adfc5217SJeff Kirsher 	struct cnic_dma		r2tq_info;
157adfc5217SJeff Kirsher 	struct cnic_dma		hq_info;
158adfc5217SJeff Kirsher };
159adfc5217SJeff Kirsher 
160adfc5217SJeff Kirsher struct cnic_context {
161adfc5217SJeff Kirsher 	u32			cid;
162adfc5217SJeff Kirsher 	struct kwqe_16_data	*kwqe_data;
163adfc5217SJeff Kirsher 	dma_addr_t		kwqe_data_mapping;
164adfc5217SJeff Kirsher 	wait_queue_head_t	waitq;
165adfc5217SJeff Kirsher 	int			wait_cond;
166adfc5217SJeff Kirsher 	unsigned long		timestamp;
167adfc5217SJeff Kirsher 	unsigned long		ctx_flags;
168adfc5217SJeff Kirsher #define	CTX_FL_OFFLD_START	0
169adfc5217SJeff Kirsher #define	CTX_FL_DELETE_WAIT	1
170adfc5217SJeff Kirsher #define	CTX_FL_CID_ERROR	2
171adfc5217SJeff Kirsher 	u8			ulp_proto_id;
172adfc5217SJeff Kirsher 	union {
173adfc5217SJeff Kirsher 		struct cnic_iscsi	*iscsi;
174adfc5217SJeff Kirsher 	} proto;
175adfc5217SJeff Kirsher };
176adfc5217SJeff Kirsher 
177adfc5217SJeff Kirsher struct kcq_info {
178adfc5217SJeff Kirsher 	struct cnic_dma	dma;
179adfc5217SJeff Kirsher 	struct kcqe	**kcq;
180adfc5217SJeff Kirsher 
181adfc5217SJeff Kirsher 	u16		*hw_prod_idx_ptr;
182adfc5217SJeff Kirsher 	u16		sw_prod_idx;
183adfc5217SJeff Kirsher 	u16		*status_idx_ptr;
184adfc5217SJeff Kirsher 	u32		io_addr;
185adfc5217SJeff Kirsher 
186adfc5217SJeff Kirsher 	u16		(*next_idx)(u16);
187adfc5217SJeff Kirsher 	u16		(*hw_idx)(u16);
188adfc5217SJeff Kirsher };
189adfc5217SJeff Kirsher 
190d15e2a92SEddie Wai #define UIO_USE_TX_DOORBELL 0x017855DB
191d15e2a92SEddie Wai 
192adfc5217SJeff Kirsher struct cnic_uio_dev {
193adfc5217SJeff Kirsher 	struct uio_info		cnic_uinfo;
194adfc5217SJeff Kirsher 	u32			uio_dev;
195adfc5217SJeff Kirsher 
196adfc5217SJeff Kirsher 	int			l2_ring_size;
197adfc5217SJeff Kirsher 	void			*l2_ring;
198adfc5217SJeff Kirsher 	dma_addr_t		l2_ring_map;
199adfc5217SJeff Kirsher 
200adfc5217SJeff Kirsher 	int			l2_buf_size;
201adfc5217SJeff Kirsher 	void			*l2_buf;
202adfc5217SJeff Kirsher 	dma_addr_t		l2_buf_map;
203adfc5217SJeff Kirsher 
204adfc5217SJeff Kirsher 	struct cnic_dev		*dev;
205adfc5217SJeff Kirsher 	struct pci_dev		*pdev;
206adfc5217SJeff Kirsher 	struct list_head	list;
207adfc5217SJeff Kirsher };
208adfc5217SJeff Kirsher 
209adfc5217SJeff Kirsher struct cnic_local {
210adfc5217SJeff Kirsher 
211adfc5217SJeff Kirsher 	spinlock_t cnic_ulp_lock;
212adfc5217SJeff Kirsher 	void *ulp_handle[MAX_CNIC_ULP_TYPE];
213adfc5217SJeff Kirsher 	unsigned long ulp_flags[MAX_CNIC_ULP_TYPE];
214adfc5217SJeff Kirsher #define ULP_F_INIT	0
215adfc5217SJeff Kirsher #define ULP_F_START	1
216adfc5217SJeff Kirsher #define ULP_F_CALL_PENDING	2
217adfc5217SJeff Kirsher 	struct cnic_ulp_ops __rcu *ulp_ops[MAX_CNIC_ULP_TYPE];
218adfc5217SJeff Kirsher 
219adfc5217SJeff Kirsher 	unsigned long cnic_local_flags;
220adfc5217SJeff Kirsher #define	CNIC_LCL_FL_KWQ_INIT		0x0
221adfc5217SJeff Kirsher #define	CNIC_LCL_FL_L2_WAIT		0x1
222adfc5217SJeff Kirsher #define	CNIC_LCL_FL_RINGS_INITED	0x2
223adfc5217SJeff Kirsher #define	CNIC_LCL_FL_STOP_ISCSI		0x4
224adfc5217SJeff Kirsher 
225adfc5217SJeff Kirsher 	struct cnic_dev *dev;
226adfc5217SJeff Kirsher 
227adfc5217SJeff Kirsher 	struct cnic_eth_dev *ethdev;
228adfc5217SJeff Kirsher 
229adfc5217SJeff Kirsher 	struct cnic_uio_dev *udev;
230adfc5217SJeff Kirsher 
231adfc5217SJeff Kirsher 	int		l2_rx_ring_size;
232adfc5217SJeff Kirsher 	int		l2_single_buf_size;
233adfc5217SJeff Kirsher 
234adfc5217SJeff Kirsher 	u16		*rx_cons_ptr;
235adfc5217SJeff Kirsher 	u16		*tx_cons_ptr;
236adfc5217SJeff Kirsher 	u16		rx_cons;
237adfc5217SJeff Kirsher 	u16		tx_cons;
238adfc5217SJeff Kirsher 
239adfc5217SJeff Kirsher 	struct cnic_dma		kwq_info;
240adfc5217SJeff Kirsher 	struct kwqe		**kwq;
241adfc5217SJeff Kirsher 
242adfc5217SJeff Kirsher 	struct cnic_dma		kwq_16_data_info;
243adfc5217SJeff Kirsher 
244adfc5217SJeff Kirsher 	u16		max_kwq_idx;
245adfc5217SJeff Kirsher 
246adfc5217SJeff Kirsher 	u16		kwq_prod_idx;
247adfc5217SJeff Kirsher 	u32		kwq_io_addr;
248adfc5217SJeff Kirsher 
249adfc5217SJeff Kirsher 	u16		*kwq_con_idx_ptr;
250adfc5217SJeff Kirsher 	u16		kwq_con_idx;
251adfc5217SJeff Kirsher 
252adfc5217SJeff Kirsher 	struct kcq_info	kcq1;
253adfc5217SJeff Kirsher 	struct kcq_info	kcq2;
254adfc5217SJeff Kirsher 
255adfc5217SJeff Kirsher 	union {
256adfc5217SJeff Kirsher 		void				*gen;
257adfc5217SJeff Kirsher 		struct status_block_msix	*bnx2;
258adfc5217SJeff Kirsher 		struct host_hc_status_block_e1x	*bnx2x_e1x;
259adfc5217SJeff Kirsher 		/* index values - which counter to update */
260adfc5217SJeff Kirsher 		#define SM_RX_ID		0
261adfc5217SJeff Kirsher 		#define SM_TX_ID		1
262adfc5217SJeff Kirsher 	} status_blk;
263bfe78793SChris Leech 	dma_addr_t status_blk_map;
264adfc5217SJeff Kirsher 
265adfc5217SJeff Kirsher 	struct host_sp_status_block	*bnx2x_def_status_blk;
266adfc5217SJeff Kirsher 
267adfc5217SJeff Kirsher 	u32				status_blk_num;
268adfc5217SJeff Kirsher 	u32				bnx2x_igu_sb_id;
269adfc5217SJeff Kirsher 	u32				int_num;
270adfc5217SJeff Kirsher 	u32				last_status_idx;
271*8d3beb6bSAllen Pais 	struct work_struct		cnic_irq_bh_work;
272adfc5217SJeff Kirsher 
273adfc5217SJeff Kirsher 	struct kcqe		*completed_kcq[MAX_COMPLETED_KCQE];
274adfc5217SJeff Kirsher 
275adfc5217SJeff Kirsher 	struct cnic_sock	*csk_tbl;
276adfc5217SJeff Kirsher 	struct cnic_id_tbl	csk_port_tbl;
277adfc5217SJeff Kirsher 
278adfc5217SJeff Kirsher 	struct cnic_dma		gbl_buf_info;
279adfc5217SJeff Kirsher 
280adfc5217SJeff Kirsher 	struct cnic_iscsi	*iscsi_tbl;
281adfc5217SJeff Kirsher 	struct cnic_context	*ctx_tbl;
282adfc5217SJeff Kirsher 	struct cnic_id_tbl	cid_tbl;
283adfc5217SJeff Kirsher 	atomic_t		iscsi_conn;
284adfc5217SJeff Kirsher 	u32			iscsi_start_cid;
285adfc5217SJeff Kirsher 
286adfc5217SJeff Kirsher 	u32			fcoe_init_cid;
287adfc5217SJeff Kirsher 	u32			fcoe_start_cid;
288adfc5217SJeff Kirsher 	struct cnic_id_tbl	fcoe_cid_tbl;
289adfc5217SJeff Kirsher 
290adfc5217SJeff Kirsher 	u32			max_cid_space;
291adfc5217SJeff Kirsher 
292adfc5217SJeff Kirsher 	/* per connection parameters */
293adfc5217SJeff Kirsher 	int			num_iscsi_tasks;
294adfc5217SJeff Kirsher 	int			num_ccells;
295adfc5217SJeff Kirsher 	int			task_array_size;
296adfc5217SJeff Kirsher 	int			r2tq_size;
297adfc5217SJeff Kirsher 	int			hq_size;
298adfc5217SJeff Kirsher 	int			num_cqs;
299adfc5217SJeff Kirsher 
300adfc5217SJeff Kirsher 	struct delayed_work	delete_task;
301adfc5217SJeff Kirsher 
302adfc5217SJeff Kirsher 	struct cnic_ctx		*ctx_arr;
303adfc5217SJeff Kirsher 	int			ctx_blks;
304adfc5217SJeff Kirsher 	int			ctx_blk_size;
305adfc5217SJeff Kirsher 	unsigned long		ctx_align;
306adfc5217SJeff Kirsher 	int			cids_per_blk;
307adfc5217SJeff Kirsher 
308adfc5217SJeff Kirsher 	u32			chip_id;
309adfc5217SJeff Kirsher 	int			func;
310adfc5217SJeff Kirsher 
311adfc5217SJeff Kirsher 	u32			shmem_base;
312adfc5217SJeff Kirsher 
313adfc5217SJeff Kirsher 	struct cnic_ops		*cnic_ops;
314adfc5217SJeff Kirsher 	int			(*start_hw)(struct cnic_dev *);
315adfc5217SJeff Kirsher 	void			(*stop_hw)(struct cnic_dev *);
316adfc5217SJeff Kirsher 	void			(*setup_pgtbl)(struct cnic_dev *,
317adfc5217SJeff Kirsher 					       struct cnic_dma *);
318adfc5217SJeff Kirsher 	int			(*alloc_resc)(struct cnic_dev *);
319adfc5217SJeff Kirsher 	void			(*free_resc)(struct cnic_dev *);
320adfc5217SJeff Kirsher 	int			(*start_cm)(struct cnic_dev *);
321adfc5217SJeff Kirsher 	void			(*stop_cm)(struct cnic_dev *);
322adfc5217SJeff Kirsher 	void			(*enable_int)(struct cnic_dev *);
323adfc5217SJeff Kirsher 	void			(*disable_int_sync)(struct cnic_dev *);
324adfc5217SJeff Kirsher 	void			(*ack_int)(struct cnic_dev *);
3258cc0e028SMichael Chan 	void			(*arm_int)(struct cnic_dev *, u32 index);
326adfc5217SJeff Kirsher 	void			(*close_conn)(struct cnic_sock *, u32 opcode);
327adfc5217SJeff Kirsher };
328adfc5217SJeff Kirsher 
329adfc5217SJeff Kirsher struct bnx2x_bd_chain_next {
330adfc5217SJeff Kirsher 	u32	addr_lo;
331adfc5217SJeff Kirsher 	u32	addr_hi;
332adfc5217SJeff Kirsher 	u8	reserved[8];
333adfc5217SJeff Kirsher };
334adfc5217SJeff Kirsher 
335adfc5217SJeff Kirsher #define ISCSI_DEFAULT_MAX_OUTSTANDING_R2T 	(1)
336adfc5217SJeff Kirsher 
337adfc5217SJeff Kirsher #define ISCSI_RAMROD_CMD_ID_UPDATE_CONN		(ISCSI_KCQE_OPCODE_UPDATE_CONN)
338adfc5217SJeff Kirsher #define ISCSI_RAMROD_CMD_ID_INIT		(ISCSI_KCQE_OPCODE_INIT)
339adfc5217SJeff Kirsher 
340adfc5217SJeff Kirsher #define CDU_REGION_NUMBER_XCM_AG 2
341adfc5217SJeff Kirsher #define CDU_REGION_NUMBER_UCM_AG 4
342adfc5217SJeff Kirsher 
343adfc5217SJeff Kirsher #define CDU_VALID_DATA(_cid, _region, _type)	\
344adfc5217SJeff Kirsher 	(((_cid) << 8) | (((_region)&0xf)<<4) | (((_type)&0xf)))
345adfc5217SJeff Kirsher 
346adfc5217SJeff Kirsher #define CDU_CRC8(_cid, _region, _type)	\
347adfc5217SJeff Kirsher 	(calc_crc8(CDU_VALID_DATA(_cid, _region, _type), 0xff))
348adfc5217SJeff Kirsher 
349adfc5217SJeff Kirsher #define CDU_RSRVD_VALUE_TYPE_A(_cid, _region, _type)	\
350adfc5217SJeff Kirsher 	(0x80 | ((CDU_CRC8(_cid, _region, _type)) & 0x7f))
351adfc5217SJeff Kirsher 
352adfc5217SJeff Kirsher #define BNX2X_CONTEXT_MEM_SIZE		1024
353adfc5217SJeff Kirsher #define BNX2X_FCOE_CID			16
354adfc5217SJeff Kirsher 
355adfc5217SJeff Kirsher #define BNX2X_ISCSI_START_CID		18
356adfc5217SJeff Kirsher #define BNX2X_ISCSI_NUM_CONNECTIONS	128
357adfc5217SJeff Kirsher #define BNX2X_ISCSI_TASK_CONTEXT_SIZE	128
358adfc5217SJeff Kirsher #define BNX2X_ISCSI_MAX_PENDING_R2TS	4
359adfc5217SJeff Kirsher #define BNX2X_ISCSI_R2TQE_SIZE		8
360adfc5217SJeff Kirsher #define BNX2X_ISCSI_HQ_BD_SIZE		64
361adfc5217SJeff Kirsher #define BNX2X_ISCSI_GLB_BUF_SIZE	64
362adfc5217SJeff Kirsher #define BNX2X_ISCSI_PBL_NOT_CACHED	0xff
363adfc5217SJeff Kirsher #define BNX2X_ISCSI_PDU_HEADER_NOT_CACHED	0xff
364adfc5217SJeff Kirsher 
365dc219a2eSMichael Chan #define BNX2X_FCOE_NUM_CONNECTIONS	1024
366adfc5217SJeff Kirsher 
367adfc5217SJeff Kirsher #define BNX2X_FCOE_L5_CID_BASE		MAX_ISCSI_TBL_SZ
368adfc5217SJeff Kirsher 
369104a43edSMichael Chan #define BNX2X_CHIP_IS_E2_PLUS(bp) (CHIP_IS_E2(bp) || CHIP_IS_E3(bp))
370adfc5217SJeff Kirsher 
3712bc4078eSMichael Chan #define BNX2X_RX_DESC_CNT		(BNX2_PAGE_SIZE / \
3722bc4078eSMichael Chan 					 sizeof(struct eth_rx_bd))
373adfc5217SJeff Kirsher #define BNX2X_MAX_RX_DESC_CNT		(BNX2X_RX_DESC_CNT - 2)
3742bc4078eSMichael Chan #define BNX2X_RCQ_DESC_CNT		(BNX2_PAGE_SIZE / \
3752bc4078eSMichael Chan 					 sizeof(union eth_rx_cqe))
376adfc5217SJeff Kirsher #define BNX2X_MAX_RCQ_DESC_CNT		(BNX2X_RCQ_DESC_CNT - 1)
377adfc5217SJeff Kirsher 
378adfc5217SJeff Kirsher #define BNX2X_NEXT_RCQE(x) (((x) & BNX2X_MAX_RCQ_DESC_CNT) ==		\
379adfc5217SJeff Kirsher 		(BNX2X_MAX_RCQ_DESC_CNT - 1)) ?				\
380adfc5217SJeff Kirsher 		((x) + 2) : ((x) + 1)
381adfc5217SJeff Kirsher 
382adfc5217SJeff Kirsher #define BNX2X_DEF_SB_ID			HC_SP_SB_ID
383adfc5217SJeff Kirsher 
384adfc5217SJeff Kirsher #define BNX2X_SHMEM_MF_BLK_OFFSET	0x7e4
385adfc5217SJeff Kirsher 
386adfc5217SJeff Kirsher #define BNX2X_SHMEM_ADDR(base, field)	(base + \
387adfc5217SJeff Kirsher 					 offsetof(struct shmem_region, field))
388adfc5217SJeff Kirsher 
389adfc5217SJeff Kirsher #define BNX2X_SHMEM2_ADDR(base, field)	(base + \
390adfc5217SJeff Kirsher 					 offsetof(struct shmem2_region, field))
391adfc5217SJeff Kirsher 
392adfc5217SJeff Kirsher #define BNX2X_SHMEM2_HAS(base, field)				\
393adfc5217SJeff Kirsher 		((base) &&					\
394adfc5217SJeff Kirsher 		 (CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base, size)) >	\
395adfc5217SJeff Kirsher 		  offsetof(struct shmem2_region, field)))
396adfc5217SJeff Kirsher 
397adfc5217SJeff Kirsher #define BNX2X_MF_CFG_ADDR(base, field)				\
398adfc5217SJeff Kirsher 			((base) + offsetof(struct mf_cfg, field))
399adfc5217SJeff Kirsher 
400adfc5217SJeff Kirsher #ifndef ETH_MAX_RX_CLIENTS_E2
401adfc5217SJeff Kirsher #define ETH_MAX_RX_CLIENTS_E2 		ETH_MAX_RX_CLIENTS_E1H
402adfc5217SJeff Kirsher #endif
403adfc5217SJeff Kirsher 
404adfc5217SJeff Kirsher #define CNIC_FUNC(cp)			((cp)->func)
405adfc5217SJeff Kirsher 
4065e65789fSMichael Chan #define BNX2X_HW_CID(bp, x)		((BP_PORT(bp) << 23) | \
4075e65789fSMichael Chan 					 (BP_VN(bp) << 17) | (x))
408adfc5217SJeff Kirsher 
409adfc5217SJeff Kirsher #define BNX2X_SW_CID(x)			(x & 0x1ffff)
410adfc5217SJeff Kirsher 
411104a43edSMichael Chan #define BNX2X_CL_QZONE_ID(bp, cli)					\
412104a43edSMichael Chan 		(BNX2X_CHIP_IS_E2_PLUS(bp) ? cli :			\
413104a43edSMichael Chan 		 cli + (BP_PORT(bp) * ETH_MAX_RX_CLIENTS_E1H))
414adfc5217SJeff Kirsher 
415adfc5217SJeff Kirsher #ifndef MAX_STAT_COUNTER_ID
416adfc5217SJeff Kirsher #define MAX_STAT_COUNTER_ID						\
417104a43edSMichael Chan 	(CHIP_IS_E1H(bp) ? MAX_STAT_COUNTER_ID_E1H :			\
418104a43edSMichael Chan 	 ((BNX2X_CHIP_IS_E2_PLUS(bp)) ? MAX_STAT_COUNTER_ID_E2 :	\
419adfc5217SJeff Kirsher 	  MAX_STAT_COUNTER_ID_E1))
420adfc5217SJeff Kirsher #endif
421adfc5217SJeff Kirsher 
42251a8f54dSMichael Chan #define CNIC_SUPPORTS_FCOE(cp)						\
423104a43edSMichael Chan 	(BNX2X_CHIP_IS_E2_PLUS(bp) && !NO_FCOE(bp))
42451a8f54dSMichael Chan 
425dcc7e3a6SMichael Chan #define CNIC_RAMROD_TMO			(HZ / 4)
426dcc7e3a6SMichael Chan 
427adfc5217SJeff Kirsher #endif
428adfc5217SJeff Kirsher 
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