127e34995SRabin Vincent /* 21a6e4b74SViresh Kumar * ST Microelectronics MFD: stmpe's driver 31a6e4b74SViresh Kumar * 427e34995SRabin Vincent * Copyright (C) ST-Ericsson SA 2010 527e34995SRabin Vincent * 627e34995SRabin Vincent * License Terms: GNU General Public License, version 2 727e34995SRabin Vincent * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson 827e34995SRabin Vincent */ 927e34995SRabin Vincent 10ac713cc9SVipul Kumar Samar #include <linux/err.h> 1173de16dbSViresh Kumar #include <linux/gpio.h> 12dba61c8fSSamuel Ortiz #include <linux/export.h> 1327e34995SRabin Vincent #include <linux/kernel.h> 1427e34995SRabin Vincent #include <linux/interrupt.h> 1527e34995SRabin Vincent #include <linux/irq.h> 1676f93992SLee Jones #include <linux/irqdomain.h> 1720d5c7deSRandy Dunlap #include <linux/of.h> 18ac713cc9SVipul Kumar Samar #include <linux/of_gpio.h> 191a6e4b74SViresh Kumar #include <linux/pm.h> 2027e34995SRabin Vincent #include <linux/slab.h> 2127e34995SRabin Vincent #include <linux/mfd/core.h> 22230f13a5SJean-Nicolas Graux #include <linux/delay.h> 239c9e3214SLinus Walleij #include <linux/regulator/consumer.h> 2427e34995SRabin Vincent #include "stmpe.h" 2527e34995SRabin Vincent 26fc1882dcSLinus Walleij /** 27fc1882dcSLinus Walleij * struct stmpe_platform_data - STMPE platform data 28fc1882dcSLinus Walleij * @id: device id to distinguish between multiple STMPEs on the same board 29fc1882dcSLinus Walleij * @blocks: bitmask of blocks to enable (use STMPE_BLOCK_*) 30fc1882dcSLinus Walleij * @irq_trigger: IRQ trigger to use for the interrupt to the host 31fc1882dcSLinus Walleij * @autosleep: bool to enable/disable stmpe autosleep 32fc1882dcSLinus Walleij * @autosleep_timeout: inactivity timeout in milliseconds for autosleep 33fc1882dcSLinus Walleij * @irq_over_gpio: true if gpio is used to get irq 34fc1882dcSLinus Walleij * @irq_gpio: gpio number over which irq will be requested (significant only if 35fc1882dcSLinus Walleij * irq_over_gpio is true) 36fc1882dcSLinus Walleij */ 37fc1882dcSLinus Walleij struct stmpe_platform_data { 38fc1882dcSLinus Walleij int id; 39fc1882dcSLinus Walleij unsigned int blocks; 40fc1882dcSLinus Walleij unsigned int irq_trigger; 41fc1882dcSLinus Walleij bool autosleep; 42fc1882dcSLinus Walleij bool irq_over_gpio; 43fc1882dcSLinus Walleij int irq_gpio; 44fc1882dcSLinus Walleij int autosleep_timeout; 45fc1882dcSLinus Walleij }; 46fc1882dcSLinus Walleij 4727e34995SRabin Vincent static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks) 4827e34995SRabin Vincent { 4927e34995SRabin Vincent return stmpe->variant->enable(stmpe, blocks, true); 5027e34995SRabin Vincent } 5127e34995SRabin Vincent 5227e34995SRabin Vincent static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks) 5327e34995SRabin Vincent { 5427e34995SRabin Vincent return stmpe->variant->enable(stmpe, blocks, false); 5527e34995SRabin Vincent } 5627e34995SRabin Vincent 5727e34995SRabin Vincent static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg) 5827e34995SRabin Vincent { 5927e34995SRabin Vincent int ret; 6027e34995SRabin Vincent 611a6e4b74SViresh Kumar ret = stmpe->ci->read_byte(stmpe, reg); 6227e34995SRabin Vincent if (ret < 0) 631a6e4b74SViresh Kumar dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret); 6427e34995SRabin Vincent 6527e34995SRabin Vincent dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret); 6627e34995SRabin Vincent 6727e34995SRabin Vincent return ret; 6827e34995SRabin Vincent } 6927e34995SRabin Vincent 7027e34995SRabin Vincent static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) 7127e34995SRabin Vincent { 7227e34995SRabin Vincent int ret; 7327e34995SRabin Vincent 7427e34995SRabin Vincent dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val); 7527e34995SRabin Vincent 761a6e4b74SViresh Kumar ret = stmpe->ci->write_byte(stmpe, reg, val); 7727e34995SRabin Vincent if (ret < 0) 781a6e4b74SViresh Kumar dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret); 7927e34995SRabin Vincent 8027e34995SRabin Vincent return ret; 8127e34995SRabin Vincent } 8227e34995SRabin Vincent 8327e34995SRabin Vincent static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) 8427e34995SRabin Vincent { 8527e34995SRabin Vincent int ret; 8627e34995SRabin Vincent 8727e34995SRabin Vincent ret = __stmpe_reg_read(stmpe, reg); 8827e34995SRabin Vincent if (ret < 0) 8927e34995SRabin Vincent return ret; 9027e34995SRabin Vincent 9127e34995SRabin Vincent ret &= ~mask; 9227e34995SRabin Vincent ret |= val; 9327e34995SRabin Vincent 9427e34995SRabin Vincent return __stmpe_reg_write(stmpe, reg, ret); 9527e34995SRabin Vincent } 9627e34995SRabin Vincent 9727e34995SRabin Vincent static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, 9827e34995SRabin Vincent u8 *values) 9927e34995SRabin Vincent { 10027e34995SRabin Vincent int ret; 10127e34995SRabin Vincent 1021a6e4b74SViresh Kumar ret = stmpe->ci->read_block(stmpe, reg, length, values); 10327e34995SRabin Vincent if (ret < 0) 1041a6e4b74SViresh Kumar dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret); 10527e34995SRabin Vincent 10627e34995SRabin Vincent dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret); 10727e34995SRabin Vincent stmpe_dump_bytes("stmpe rd: ", values, length); 10827e34995SRabin Vincent 10927e34995SRabin Vincent return ret; 11027e34995SRabin Vincent } 11127e34995SRabin Vincent 11227e34995SRabin Vincent static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, 11327e34995SRabin Vincent const u8 *values) 11427e34995SRabin Vincent { 11527e34995SRabin Vincent int ret; 11627e34995SRabin Vincent 11727e34995SRabin Vincent dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length); 11827e34995SRabin Vincent stmpe_dump_bytes("stmpe wr: ", values, length); 11927e34995SRabin Vincent 1201a6e4b74SViresh Kumar ret = stmpe->ci->write_block(stmpe, reg, length, values); 12127e34995SRabin Vincent if (ret < 0) 1221a6e4b74SViresh Kumar dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret); 12327e34995SRabin Vincent 12427e34995SRabin Vincent return ret; 12527e34995SRabin Vincent } 12627e34995SRabin Vincent 12727e34995SRabin Vincent /** 12827e34995SRabin Vincent * stmpe_enable - enable blocks on an STMPE device 12927e34995SRabin Vincent * @stmpe: Device to work on 13027e34995SRabin Vincent * @blocks: Mask of blocks (enum stmpe_block values) to enable 13127e34995SRabin Vincent */ 13227e34995SRabin Vincent int stmpe_enable(struct stmpe *stmpe, unsigned int blocks) 13327e34995SRabin Vincent { 13427e34995SRabin Vincent int ret; 13527e34995SRabin Vincent 13627e34995SRabin Vincent mutex_lock(&stmpe->lock); 13727e34995SRabin Vincent ret = __stmpe_enable(stmpe, blocks); 13827e34995SRabin Vincent mutex_unlock(&stmpe->lock); 13927e34995SRabin Vincent 14027e34995SRabin Vincent return ret; 14127e34995SRabin Vincent } 14227e34995SRabin Vincent EXPORT_SYMBOL_GPL(stmpe_enable); 14327e34995SRabin Vincent 14427e34995SRabin Vincent /** 14527e34995SRabin Vincent * stmpe_disable - disable blocks on an STMPE device 14627e34995SRabin Vincent * @stmpe: Device to work on 14727e34995SRabin Vincent * @blocks: Mask of blocks (enum stmpe_block values) to enable 14827e34995SRabin Vincent */ 14927e34995SRabin Vincent int stmpe_disable(struct stmpe *stmpe, unsigned int blocks) 15027e34995SRabin Vincent { 15127e34995SRabin Vincent int ret; 15227e34995SRabin Vincent 15327e34995SRabin Vincent mutex_lock(&stmpe->lock); 15427e34995SRabin Vincent ret = __stmpe_disable(stmpe, blocks); 15527e34995SRabin Vincent mutex_unlock(&stmpe->lock); 15627e34995SRabin Vincent 15727e34995SRabin Vincent return ret; 15827e34995SRabin Vincent } 15927e34995SRabin Vincent EXPORT_SYMBOL_GPL(stmpe_disable); 16027e34995SRabin Vincent 16127e34995SRabin Vincent /** 16227e34995SRabin Vincent * stmpe_reg_read() - read a single STMPE register 16327e34995SRabin Vincent * @stmpe: Device to read from 16427e34995SRabin Vincent * @reg: Register to read 16527e34995SRabin Vincent */ 16627e34995SRabin Vincent int stmpe_reg_read(struct stmpe *stmpe, u8 reg) 16727e34995SRabin Vincent { 16827e34995SRabin Vincent int ret; 16927e34995SRabin Vincent 17027e34995SRabin Vincent mutex_lock(&stmpe->lock); 17127e34995SRabin Vincent ret = __stmpe_reg_read(stmpe, reg); 17227e34995SRabin Vincent mutex_unlock(&stmpe->lock); 17327e34995SRabin Vincent 17427e34995SRabin Vincent return ret; 17527e34995SRabin Vincent } 17627e34995SRabin Vincent EXPORT_SYMBOL_GPL(stmpe_reg_read); 17727e34995SRabin Vincent 17827e34995SRabin Vincent /** 17927e34995SRabin Vincent * stmpe_reg_write() - write a single STMPE register 18027e34995SRabin Vincent * @stmpe: Device to write to 18127e34995SRabin Vincent * @reg: Register to write 18227e34995SRabin Vincent * @val: Value to write 18327e34995SRabin Vincent */ 18427e34995SRabin Vincent int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val) 18527e34995SRabin Vincent { 18627e34995SRabin Vincent int ret; 18727e34995SRabin Vincent 18827e34995SRabin Vincent mutex_lock(&stmpe->lock); 18927e34995SRabin Vincent ret = __stmpe_reg_write(stmpe, reg, val); 19027e34995SRabin Vincent mutex_unlock(&stmpe->lock); 19127e34995SRabin Vincent 19227e34995SRabin Vincent return ret; 19327e34995SRabin Vincent } 19427e34995SRabin Vincent EXPORT_SYMBOL_GPL(stmpe_reg_write); 19527e34995SRabin Vincent 19627e34995SRabin Vincent /** 19727e34995SRabin Vincent * stmpe_set_bits() - set the value of a bitfield in a STMPE register 19827e34995SRabin Vincent * @stmpe: Device to write to 19927e34995SRabin Vincent * @reg: Register to write 20027e34995SRabin Vincent * @mask: Mask of bits to set 20127e34995SRabin Vincent * @val: Value to set 20227e34995SRabin Vincent */ 20327e34995SRabin Vincent int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val) 20427e34995SRabin Vincent { 20527e34995SRabin Vincent int ret; 20627e34995SRabin Vincent 20727e34995SRabin Vincent mutex_lock(&stmpe->lock); 20827e34995SRabin Vincent ret = __stmpe_set_bits(stmpe, reg, mask, val); 20927e34995SRabin Vincent mutex_unlock(&stmpe->lock); 21027e34995SRabin Vincent 21127e34995SRabin Vincent return ret; 21227e34995SRabin Vincent } 21327e34995SRabin Vincent EXPORT_SYMBOL_GPL(stmpe_set_bits); 21427e34995SRabin Vincent 21527e34995SRabin Vincent /** 21627e34995SRabin Vincent * stmpe_block_read() - read multiple STMPE registers 21727e34995SRabin Vincent * @stmpe: Device to read from 21827e34995SRabin Vincent * @reg: First register 21927e34995SRabin Vincent * @length: Number of registers 22027e34995SRabin Vincent * @values: Buffer to write to 22127e34995SRabin Vincent */ 22227e34995SRabin Vincent int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values) 22327e34995SRabin Vincent { 22427e34995SRabin Vincent int ret; 22527e34995SRabin Vincent 22627e34995SRabin Vincent mutex_lock(&stmpe->lock); 22727e34995SRabin Vincent ret = __stmpe_block_read(stmpe, reg, length, values); 22827e34995SRabin Vincent mutex_unlock(&stmpe->lock); 22927e34995SRabin Vincent 23027e34995SRabin Vincent return ret; 23127e34995SRabin Vincent } 23227e34995SRabin Vincent EXPORT_SYMBOL_GPL(stmpe_block_read); 23327e34995SRabin Vincent 23427e34995SRabin Vincent /** 23527e34995SRabin Vincent * stmpe_block_write() - write multiple STMPE registers 23627e34995SRabin Vincent * @stmpe: Device to write to 23727e34995SRabin Vincent * @reg: First register 23827e34995SRabin Vincent * @length: Number of registers 23927e34995SRabin Vincent * @values: Values to write 24027e34995SRabin Vincent */ 24127e34995SRabin Vincent int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, 24227e34995SRabin Vincent const u8 *values) 24327e34995SRabin Vincent { 24427e34995SRabin Vincent int ret; 24527e34995SRabin Vincent 24627e34995SRabin Vincent mutex_lock(&stmpe->lock); 24727e34995SRabin Vincent ret = __stmpe_block_write(stmpe, reg, length, values); 24827e34995SRabin Vincent mutex_unlock(&stmpe->lock); 24927e34995SRabin Vincent 25027e34995SRabin Vincent return ret; 25127e34995SRabin Vincent } 25227e34995SRabin Vincent EXPORT_SYMBOL_GPL(stmpe_block_write); 25327e34995SRabin Vincent 25427e34995SRabin Vincent /** 2554dcaa6b6SOm Prakash * stmpe_set_altfunc()- set the alternate function for STMPE pins 25627e34995SRabin Vincent * @stmpe: Device to configure 25727e34995SRabin Vincent * @pins: Bitmask of pins to affect 25827e34995SRabin Vincent * @block: block to enable alternate functions for 25927e34995SRabin Vincent * 26027e34995SRabin Vincent * @pins is assumed to have a bit set for each of the bits whose alternate 26127e34995SRabin Vincent * function is to be changed, numbered according to the GPIOXY numbers. 26227e34995SRabin Vincent * 26327e34995SRabin Vincent * If the GPIO module is not enabled, this function automatically enables it in 26427e34995SRabin Vincent * order to perform the change. 26527e34995SRabin Vincent */ 26627e34995SRabin Vincent int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block) 26727e34995SRabin Vincent { 26827e34995SRabin Vincent struct stmpe_variant_info *variant = stmpe->variant; 26927e34995SRabin Vincent u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB]; 27027e34995SRabin Vincent int af_bits = variant->af_bits; 27127e34995SRabin Vincent int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8); 27227e34995SRabin Vincent int mask = (1 << af_bits) - 1; 2737929fa77SLee Jones u8 regs[8]; 2747f7f4ea1SViresh Kumar int af, afperreg, ret; 27527e34995SRabin Vincent 2767f7f4ea1SViresh Kumar if (!variant->get_altfunc) 2777f7f4ea1SViresh Kumar return 0; 2787f7f4ea1SViresh Kumar 2797f7f4ea1SViresh Kumar afperreg = 8 / af_bits; 28027e34995SRabin Vincent mutex_lock(&stmpe->lock); 28127e34995SRabin Vincent 28227e34995SRabin Vincent ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO); 28327e34995SRabin Vincent if (ret < 0) 28427e34995SRabin Vincent goto out; 28527e34995SRabin Vincent 28627e34995SRabin Vincent ret = __stmpe_block_read(stmpe, regaddr, numregs, regs); 28727e34995SRabin Vincent if (ret < 0) 28827e34995SRabin Vincent goto out; 28927e34995SRabin Vincent 29027e34995SRabin Vincent af = variant->get_altfunc(stmpe, block); 29127e34995SRabin Vincent 29227e34995SRabin Vincent while (pins) { 29327e34995SRabin Vincent int pin = __ffs(pins); 29427e34995SRabin Vincent int regoffset = numregs - (pin / afperreg) - 1; 29527e34995SRabin Vincent int pos = (pin % afperreg) * (8 / afperreg); 29627e34995SRabin Vincent 29727e34995SRabin Vincent regs[regoffset] &= ~(mask << pos); 29827e34995SRabin Vincent regs[regoffset] |= af << pos; 29927e34995SRabin Vincent 30027e34995SRabin Vincent pins &= ~(1 << pin); 30127e34995SRabin Vincent } 30227e34995SRabin Vincent 30327e34995SRabin Vincent ret = __stmpe_block_write(stmpe, regaddr, numregs, regs); 30427e34995SRabin Vincent 30527e34995SRabin Vincent out: 30627e34995SRabin Vincent mutex_unlock(&stmpe->lock); 30727e34995SRabin Vincent return ret; 30827e34995SRabin Vincent } 30927e34995SRabin Vincent EXPORT_SYMBOL_GPL(stmpe_set_altfunc); 31027e34995SRabin Vincent 31127e34995SRabin Vincent /* 31227e34995SRabin Vincent * GPIO (all variants) 31327e34995SRabin Vincent */ 31427e34995SRabin Vincent 31527e34995SRabin Vincent static struct resource stmpe_gpio_resources[] = { 31627e34995SRabin Vincent /* Start and end filled dynamically */ 31727e34995SRabin Vincent { 31827e34995SRabin Vincent .flags = IORESOURCE_IRQ, 31927e34995SRabin Vincent }, 32027e34995SRabin Vincent }; 32127e34995SRabin Vincent 3226bbb3c4cSGeert Uytterhoeven static const struct mfd_cell stmpe_gpio_cell = { 32327e34995SRabin Vincent .name = "stmpe-gpio", 32486605cfeSVipul Kumar Samar .of_compatible = "st,stmpe-gpio", 32527e34995SRabin Vincent .resources = stmpe_gpio_resources, 32627e34995SRabin Vincent .num_resources = ARRAY_SIZE(stmpe_gpio_resources), 32727e34995SRabin Vincent }; 32827e34995SRabin Vincent 3296bbb3c4cSGeert Uytterhoeven static const struct mfd_cell stmpe_gpio_cell_noirq = { 330e31f9b82SChris Blair .name = "stmpe-gpio", 33186605cfeSVipul Kumar Samar .of_compatible = "st,stmpe-gpio", 332e31f9b82SChris Blair /* gpio cell resources consist of an irq only so no resources here */ 333e31f9b82SChris Blair }; 334e31f9b82SChris Blair 33527e34995SRabin Vincent /* 33627e34995SRabin Vincent * Keypad (1601, 2401, 2403) 33727e34995SRabin Vincent */ 33827e34995SRabin Vincent 33927e34995SRabin Vincent static struct resource stmpe_keypad_resources[] = { 34027e34995SRabin Vincent { 34127e34995SRabin Vincent .name = "KEYPAD", 34227e34995SRabin Vincent .flags = IORESOURCE_IRQ, 34327e34995SRabin Vincent }, 34427e34995SRabin Vincent { 34527e34995SRabin Vincent .name = "KEYPAD_OVER", 34627e34995SRabin Vincent .flags = IORESOURCE_IRQ, 34727e34995SRabin Vincent }, 34827e34995SRabin Vincent }; 34927e34995SRabin Vincent 3506bbb3c4cSGeert Uytterhoeven static const struct mfd_cell stmpe_keypad_cell = { 35127e34995SRabin Vincent .name = "stmpe-keypad", 3526ea32387SDmitry Torokhov .of_compatible = "st,stmpe-keypad", 35327e34995SRabin Vincent .resources = stmpe_keypad_resources, 35427e34995SRabin Vincent .num_resources = ARRAY_SIZE(stmpe_keypad_resources), 35527e34995SRabin Vincent }; 35627e34995SRabin Vincent 35727e34995SRabin Vincent /* 358b273c5e0SLinus Walleij * PWM (1601, 2401, 2403) 359b273c5e0SLinus Walleij */ 360b273c5e0SLinus Walleij static struct resource stmpe_pwm_resources[] = { 361b273c5e0SLinus Walleij { 362b273c5e0SLinus Walleij .name = "PWM0", 363b273c5e0SLinus Walleij .flags = IORESOURCE_IRQ, 364b273c5e0SLinus Walleij }, 365b273c5e0SLinus Walleij { 366b273c5e0SLinus Walleij .name = "PWM1", 367b273c5e0SLinus Walleij .flags = IORESOURCE_IRQ, 368b273c5e0SLinus Walleij }, 369b273c5e0SLinus Walleij { 370b273c5e0SLinus Walleij .name = "PWM2", 371b273c5e0SLinus Walleij .flags = IORESOURCE_IRQ, 372b273c5e0SLinus Walleij }, 373b273c5e0SLinus Walleij }; 374b273c5e0SLinus Walleij 375b273c5e0SLinus Walleij static const struct mfd_cell stmpe_pwm_cell = { 376b273c5e0SLinus Walleij .name = "stmpe-pwm", 377b273c5e0SLinus Walleij .of_compatible = "st,stmpe-pwm", 378b273c5e0SLinus Walleij .resources = stmpe_pwm_resources, 379b273c5e0SLinus Walleij .num_resources = ARRAY_SIZE(stmpe_pwm_resources), 380b273c5e0SLinus Walleij }; 381b273c5e0SLinus Walleij 382b273c5e0SLinus Walleij /* 3837f7f4ea1SViresh Kumar * STMPE801 3847f7f4ea1SViresh Kumar */ 3857f7f4ea1SViresh Kumar static const u8 stmpe801_regs[] = { 3867f7f4ea1SViresh Kumar [STMPE_IDX_CHIP_ID] = STMPE801_REG_CHIP_ID, 3877f7f4ea1SViresh Kumar [STMPE_IDX_ICR_LSB] = STMPE801_REG_SYS_CTRL, 3887f7f4ea1SViresh Kumar [STMPE_IDX_GPMR_LSB] = STMPE801_REG_GPIO_MP_STA, 3897f7f4ea1SViresh Kumar [STMPE_IDX_GPSR_LSB] = STMPE801_REG_GPIO_SET_PIN, 3907f7f4ea1SViresh Kumar [STMPE_IDX_GPCR_LSB] = STMPE801_REG_GPIO_SET_PIN, 3917f7f4ea1SViresh Kumar [STMPE_IDX_GPDR_LSB] = STMPE801_REG_GPIO_DIR, 3927f7f4ea1SViresh Kumar [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN, 3937f7f4ea1SViresh Kumar [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA, 3947f7f4ea1SViresh Kumar 3957f7f4ea1SViresh Kumar }; 3967f7f4ea1SViresh Kumar 3977f7f4ea1SViresh Kumar static struct stmpe_variant_block stmpe801_blocks[] = { 3987f7f4ea1SViresh Kumar { 3997f7f4ea1SViresh Kumar .cell = &stmpe_gpio_cell, 4007f7f4ea1SViresh Kumar .irq = 0, 4017f7f4ea1SViresh Kumar .block = STMPE_BLOCK_GPIO, 4027f7f4ea1SViresh Kumar }, 4037f7f4ea1SViresh Kumar }; 4047f7f4ea1SViresh Kumar 405e31f9b82SChris Blair static struct stmpe_variant_block stmpe801_blocks_noirq[] = { 406e31f9b82SChris Blair { 407e31f9b82SChris Blair .cell = &stmpe_gpio_cell_noirq, 408e31f9b82SChris Blair .block = STMPE_BLOCK_GPIO, 409e31f9b82SChris Blair }, 410e31f9b82SChris Blair }; 411e31f9b82SChris Blair 4127f7f4ea1SViresh Kumar static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks, 4137f7f4ea1SViresh Kumar bool enable) 4147f7f4ea1SViresh Kumar { 4157f7f4ea1SViresh Kumar if (blocks & STMPE_BLOCK_GPIO) 4167f7f4ea1SViresh Kumar return 0; 4177f7f4ea1SViresh Kumar else 4187f7f4ea1SViresh Kumar return -EINVAL; 4197f7f4ea1SViresh Kumar } 4207f7f4ea1SViresh Kumar 4217f7f4ea1SViresh Kumar static struct stmpe_variant_info stmpe801 = { 4227f7f4ea1SViresh Kumar .name = "stmpe801", 4237f7f4ea1SViresh Kumar .id_val = STMPE801_ID, 4247f7f4ea1SViresh Kumar .id_mask = 0xffff, 4257f7f4ea1SViresh Kumar .num_gpios = 8, 4267f7f4ea1SViresh Kumar .regs = stmpe801_regs, 4277f7f4ea1SViresh Kumar .blocks = stmpe801_blocks, 4287f7f4ea1SViresh Kumar .num_blocks = ARRAY_SIZE(stmpe801_blocks), 4297f7f4ea1SViresh Kumar .num_irqs = STMPE801_NR_INTERNAL_IRQS, 4307f7f4ea1SViresh Kumar .enable = stmpe801_enable, 4317f7f4ea1SViresh Kumar }; 4327f7f4ea1SViresh Kumar 433e31f9b82SChris Blair static struct stmpe_variant_info stmpe801_noirq = { 434e31f9b82SChris Blair .name = "stmpe801", 435e31f9b82SChris Blair .id_val = STMPE801_ID, 436e31f9b82SChris Blair .id_mask = 0xffff, 437e31f9b82SChris Blair .num_gpios = 8, 438e31f9b82SChris Blair .regs = stmpe801_regs, 439e31f9b82SChris Blair .blocks = stmpe801_blocks_noirq, 440e31f9b82SChris Blair .num_blocks = ARRAY_SIZE(stmpe801_blocks_noirq), 441e31f9b82SChris Blair .enable = stmpe801_enable, 442e31f9b82SChris Blair }; 443e31f9b82SChris Blair 4447f7f4ea1SViresh Kumar /* 4451cda2394SViresh Kumar * Touchscreen (STMPE811 or STMPE610) 44627e34995SRabin Vincent */ 44727e34995SRabin Vincent 44827e34995SRabin Vincent static struct resource stmpe_ts_resources[] = { 44927e34995SRabin Vincent { 45027e34995SRabin Vincent .name = "TOUCH_DET", 45127e34995SRabin Vincent .flags = IORESOURCE_IRQ, 45227e34995SRabin Vincent }, 45327e34995SRabin Vincent { 45427e34995SRabin Vincent .name = "FIFO_TH", 45527e34995SRabin Vincent .flags = IORESOURCE_IRQ, 45627e34995SRabin Vincent }, 45727e34995SRabin Vincent }; 45827e34995SRabin Vincent 4596bbb3c4cSGeert Uytterhoeven static const struct mfd_cell stmpe_ts_cell = { 46027e34995SRabin Vincent .name = "stmpe-ts", 461037db524SVipul Kumar Samar .of_compatible = "st,stmpe-ts", 46227e34995SRabin Vincent .resources = stmpe_ts_resources, 46327e34995SRabin Vincent .num_resources = ARRAY_SIZE(stmpe_ts_resources), 46427e34995SRabin Vincent }; 46527e34995SRabin Vincent 46627e34995SRabin Vincent /* 4671cda2394SViresh Kumar * STMPE811 or STMPE610 46827e34995SRabin Vincent */ 46927e34995SRabin Vincent 47027e34995SRabin Vincent static const u8 stmpe811_regs[] = { 47127e34995SRabin Vincent [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID, 4720f4be8cfSPatrice Chotard [STMPE_IDX_SYS_CTRL] = STMPE811_REG_SYS_CTRL, 4730f4be8cfSPatrice Chotard [STMPE_IDX_SYS_CTRL2] = STMPE811_REG_SYS_CTRL2, 47427e34995SRabin Vincent [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL, 47527e34995SRabin Vincent [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN, 47627e34995SRabin Vincent [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA, 47727e34995SRabin Vincent [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA, 47827e34995SRabin Vincent [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN, 47927e34995SRabin Vincent [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN, 48027e34995SRabin Vincent [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR, 48127e34995SRabin Vincent [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE, 48227e34995SRabin Vincent [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE, 48327e34995SRabin Vincent [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF, 48427e34995SRabin Vincent [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN, 48527e34995SRabin Vincent [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA, 48627e34995SRabin Vincent [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED, 48727e34995SRabin Vincent }; 48827e34995SRabin Vincent 48927e34995SRabin Vincent static struct stmpe_variant_block stmpe811_blocks[] = { 49027e34995SRabin Vincent { 49127e34995SRabin Vincent .cell = &stmpe_gpio_cell, 49227e34995SRabin Vincent .irq = STMPE811_IRQ_GPIOC, 49327e34995SRabin Vincent .block = STMPE_BLOCK_GPIO, 49427e34995SRabin Vincent }, 49527e34995SRabin Vincent { 49627e34995SRabin Vincent .cell = &stmpe_ts_cell, 49727e34995SRabin Vincent .irq = STMPE811_IRQ_TOUCH_DET, 49827e34995SRabin Vincent .block = STMPE_BLOCK_TOUCHSCREEN, 49927e34995SRabin Vincent }, 50027e34995SRabin Vincent }; 50127e34995SRabin Vincent 50227e34995SRabin Vincent static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks, 50327e34995SRabin Vincent bool enable) 50427e34995SRabin Vincent { 50527e34995SRabin Vincent unsigned int mask = 0; 50627e34995SRabin Vincent 50727e34995SRabin Vincent if (blocks & STMPE_BLOCK_GPIO) 50827e34995SRabin Vincent mask |= STMPE811_SYS_CTRL2_GPIO_OFF; 50927e34995SRabin Vincent 51027e34995SRabin Vincent if (blocks & STMPE_BLOCK_ADC) 51127e34995SRabin Vincent mask |= STMPE811_SYS_CTRL2_ADC_OFF; 51227e34995SRabin Vincent 51327e34995SRabin Vincent if (blocks & STMPE_BLOCK_TOUCHSCREEN) 51427e34995SRabin Vincent mask |= STMPE811_SYS_CTRL2_TSC_OFF; 51527e34995SRabin Vincent 5160f4be8cfSPatrice Chotard return __stmpe_set_bits(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL2], mask, 51727e34995SRabin Vincent enable ? 0 : mask); 51827e34995SRabin Vincent } 51927e34995SRabin Vincent 52027e34995SRabin Vincent static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 52127e34995SRabin Vincent { 52227e34995SRabin Vincent /* 0 for touchscreen, 1 for GPIO */ 52327e34995SRabin Vincent return block != STMPE_BLOCK_TOUCHSCREEN; 52427e34995SRabin Vincent } 52527e34995SRabin Vincent 52627e34995SRabin Vincent static struct stmpe_variant_info stmpe811 = { 52727e34995SRabin Vincent .name = "stmpe811", 52827e34995SRabin Vincent .id_val = 0x0811, 52927e34995SRabin Vincent .id_mask = 0xffff, 53027e34995SRabin Vincent .num_gpios = 8, 53127e34995SRabin Vincent .af_bits = 1, 53227e34995SRabin Vincent .regs = stmpe811_regs, 53327e34995SRabin Vincent .blocks = stmpe811_blocks, 53427e34995SRabin Vincent .num_blocks = ARRAY_SIZE(stmpe811_blocks), 53527e34995SRabin Vincent .num_irqs = STMPE811_NR_INTERNAL_IRQS, 53627e34995SRabin Vincent .enable = stmpe811_enable, 53727e34995SRabin Vincent .get_altfunc = stmpe811_get_altfunc, 53827e34995SRabin Vincent }; 53927e34995SRabin Vincent 5401cda2394SViresh Kumar /* Similar to 811, except number of gpios */ 5411cda2394SViresh Kumar static struct stmpe_variant_info stmpe610 = { 5421cda2394SViresh Kumar .name = "stmpe610", 5431cda2394SViresh Kumar .id_val = 0x0811, 5441cda2394SViresh Kumar .id_mask = 0xffff, 5451cda2394SViresh Kumar .num_gpios = 6, 5461cda2394SViresh Kumar .af_bits = 1, 5471cda2394SViresh Kumar .regs = stmpe811_regs, 5481cda2394SViresh Kumar .blocks = stmpe811_blocks, 5491cda2394SViresh Kumar .num_blocks = ARRAY_SIZE(stmpe811_blocks), 5501cda2394SViresh Kumar .num_irqs = STMPE811_NR_INTERNAL_IRQS, 5511cda2394SViresh Kumar .enable = stmpe811_enable, 5521cda2394SViresh Kumar .get_altfunc = stmpe811_get_altfunc, 5531cda2394SViresh Kumar }; 5541cda2394SViresh Kumar 55527e34995SRabin Vincent /* 55627e34995SRabin Vincent * STMPE1601 55727e34995SRabin Vincent */ 55827e34995SRabin Vincent 55927e34995SRabin Vincent static const u8 stmpe1601_regs[] = { 56027e34995SRabin Vincent [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID, 5610f4be8cfSPatrice Chotard [STMPE_IDX_SYS_CTRL] = STMPE1601_REG_SYS_CTRL, 5620f4be8cfSPatrice Chotard [STMPE_IDX_SYS_CTRL2] = STMPE1601_REG_SYS_CTRL2, 56327e34995SRabin Vincent [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB, 56427e34995SRabin Vincent [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB, 56527e34995SRabin Vincent [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB, 56627e34995SRabin Vincent [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB, 56727e34995SRabin Vincent [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB, 56827e34995SRabin Vincent [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB, 56927e34995SRabin Vincent [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB, 57027e34995SRabin Vincent [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB, 57127e34995SRabin Vincent [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB, 57280e1dd82SLinus Walleij [STMPE_IDX_GPPUR_LSB] = STMPE1601_REG_GPIO_PU_LSB, 57327e34995SRabin Vincent [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB, 57427e34995SRabin Vincent [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB, 57527e34995SRabin Vincent [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB, 57627e34995SRabin Vincent [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB, 57727e34995SRabin Vincent }; 57827e34995SRabin Vincent 57927e34995SRabin Vincent static struct stmpe_variant_block stmpe1601_blocks[] = { 58027e34995SRabin Vincent { 58127e34995SRabin Vincent .cell = &stmpe_gpio_cell, 5825204e51dSLee Jones .irq = STMPE1601_IRQ_GPIOC, 58327e34995SRabin Vincent .block = STMPE_BLOCK_GPIO, 58427e34995SRabin Vincent }, 58527e34995SRabin Vincent { 58627e34995SRabin Vincent .cell = &stmpe_keypad_cell, 5875204e51dSLee Jones .irq = STMPE1601_IRQ_KEYPAD, 58827e34995SRabin Vincent .block = STMPE_BLOCK_KEYPAD, 58927e34995SRabin Vincent }, 590b273c5e0SLinus Walleij { 591b273c5e0SLinus Walleij .cell = &stmpe_pwm_cell, 592b273c5e0SLinus Walleij .irq = STMPE1601_IRQ_PWM0, 593b273c5e0SLinus Walleij .block = STMPE_BLOCK_PWM, 594b273c5e0SLinus Walleij }, 59527e34995SRabin Vincent }; 59627e34995SRabin Vincent 5975981f4e6SSundar R Iyer /* supported autosleep timeout delay (in msecs) */ 5985981f4e6SSundar R Iyer static const int stmpe_autosleep_delay[] = { 5995981f4e6SSundar R Iyer 4, 16, 32, 64, 128, 256, 512, 1024, 6005981f4e6SSundar R Iyer }; 6015981f4e6SSundar R Iyer 6025981f4e6SSundar R Iyer static int stmpe_round_timeout(int timeout) 6035981f4e6SSundar R Iyer { 6045981f4e6SSundar R Iyer int i; 6055981f4e6SSundar R Iyer 6065981f4e6SSundar R Iyer for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) { 6075981f4e6SSundar R Iyer if (stmpe_autosleep_delay[i] >= timeout) 6085981f4e6SSundar R Iyer return i; 6095981f4e6SSundar R Iyer } 6105981f4e6SSundar R Iyer 6115981f4e6SSundar R Iyer /* 6125981f4e6SSundar R Iyer * requests for delays longer than supported should not return the 6135981f4e6SSundar R Iyer * longest supported delay 6145981f4e6SSundar R Iyer */ 6155981f4e6SSundar R Iyer return -EINVAL; 6165981f4e6SSundar R Iyer } 6175981f4e6SSundar R Iyer 6185981f4e6SSundar R Iyer static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout) 6195981f4e6SSundar R Iyer { 6205981f4e6SSundar R Iyer int ret; 6215981f4e6SSundar R Iyer 6225981f4e6SSundar R Iyer if (!stmpe->variant->enable_autosleep) 6235981f4e6SSundar R Iyer return -ENOSYS; 6245981f4e6SSundar R Iyer 6255981f4e6SSundar R Iyer mutex_lock(&stmpe->lock); 6265981f4e6SSundar R Iyer ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout); 6275981f4e6SSundar R Iyer mutex_unlock(&stmpe->lock); 6285981f4e6SSundar R Iyer 6295981f4e6SSundar R Iyer return ret; 6305981f4e6SSundar R Iyer } 6315981f4e6SSundar R Iyer 6325981f4e6SSundar R Iyer /* 6335981f4e6SSundar R Iyer * Both stmpe 1601/2403 support same layout for autosleep 6345981f4e6SSundar R Iyer */ 6355981f4e6SSundar R Iyer static int stmpe1601_autosleep(struct stmpe *stmpe, 6365981f4e6SSundar R Iyer int autosleep_timeout) 6375981f4e6SSundar R Iyer { 6385981f4e6SSundar R Iyer int ret, timeout; 6395981f4e6SSundar R Iyer 6405981f4e6SSundar R Iyer /* choose the best available timeout */ 6415981f4e6SSundar R Iyer timeout = stmpe_round_timeout(autosleep_timeout); 6425981f4e6SSundar R Iyer if (timeout < 0) { 6435981f4e6SSundar R Iyer dev_err(stmpe->dev, "invalid timeout\n"); 6445981f4e6SSundar R Iyer return timeout; 6455981f4e6SSundar R Iyer } 6465981f4e6SSundar R Iyer 6470f4be8cfSPatrice Chotard ret = __stmpe_set_bits(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL2], 6485981f4e6SSundar R Iyer STMPE1601_AUTOSLEEP_TIMEOUT_MASK, 6495981f4e6SSundar R Iyer timeout); 6505981f4e6SSundar R Iyer if (ret < 0) 6515981f4e6SSundar R Iyer return ret; 6525981f4e6SSundar R Iyer 6530f4be8cfSPatrice Chotard return __stmpe_set_bits(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL2], 6545981f4e6SSundar R Iyer STPME1601_AUTOSLEEP_ENABLE, 6555981f4e6SSundar R Iyer STPME1601_AUTOSLEEP_ENABLE); 6565981f4e6SSundar R Iyer } 6575981f4e6SSundar R Iyer 65827e34995SRabin Vincent static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks, 65927e34995SRabin Vincent bool enable) 66027e34995SRabin Vincent { 66127e34995SRabin Vincent unsigned int mask = 0; 66227e34995SRabin Vincent 66327e34995SRabin Vincent if (blocks & STMPE_BLOCK_GPIO) 66427e34995SRabin Vincent mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO; 665b69d2ad6SLinus Walleij else 666b69d2ad6SLinus Walleij mask &= ~STMPE1601_SYS_CTRL_ENABLE_GPIO; 66727e34995SRabin Vincent 66827e34995SRabin Vincent if (blocks & STMPE_BLOCK_KEYPAD) 66927e34995SRabin Vincent mask |= STMPE1601_SYS_CTRL_ENABLE_KPC; 670b69d2ad6SLinus Walleij else 671b69d2ad6SLinus Walleij mask &= ~STMPE1601_SYS_CTRL_ENABLE_KPC; 672b69d2ad6SLinus Walleij 673b69d2ad6SLinus Walleij if (blocks & STMPE_BLOCK_PWM) 674b69d2ad6SLinus Walleij mask |= STMPE1601_SYS_CTRL_ENABLE_SPWM; 675b69d2ad6SLinus Walleij else 676b69d2ad6SLinus Walleij mask &= ~STMPE1601_SYS_CTRL_ENABLE_SPWM; 67727e34995SRabin Vincent 6780f4be8cfSPatrice Chotard return __stmpe_set_bits(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL], mask, 67927e34995SRabin Vincent enable ? mask : 0); 68027e34995SRabin Vincent } 68127e34995SRabin Vincent 68227e34995SRabin Vincent static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 68327e34995SRabin Vincent { 68427e34995SRabin Vincent switch (block) { 68527e34995SRabin Vincent case STMPE_BLOCK_PWM: 68627e34995SRabin Vincent return 2; 68727e34995SRabin Vincent 68827e34995SRabin Vincent case STMPE_BLOCK_KEYPAD: 68927e34995SRabin Vincent return 1; 69027e34995SRabin Vincent 69127e34995SRabin Vincent case STMPE_BLOCK_GPIO: 69227e34995SRabin Vincent default: 69327e34995SRabin Vincent return 0; 69427e34995SRabin Vincent } 69527e34995SRabin Vincent } 69627e34995SRabin Vincent 69727e34995SRabin Vincent static struct stmpe_variant_info stmpe1601 = { 69827e34995SRabin Vincent .name = "stmpe1601", 69927e34995SRabin Vincent .id_val = 0x0210, 70027e34995SRabin Vincent .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */ 70127e34995SRabin Vincent .num_gpios = 16, 70227e34995SRabin Vincent .af_bits = 2, 70327e34995SRabin Vincent .regs = stmpe1601_regs, 70427e34995SRabin Vincent .blocks = stmpe1601_blocks, 70527e34995SRabin Vincent .num_blocks = ARRAY_SIZE(stmpe1601_blocks), 70627e34995SRabin Vincent .num_irqs = STMPE1601_NR_INTERNAL_IRQS, 70727e34995SRabin Vincent .enable = stmpe1601_enable, 70827e34995SRabin Vincent .get_altfunc = stmpe1601_get_altfunc, 7095981f4e6SSundar R Iyer .enable_autosleep = stmpe1601_autosleep, 71027e34995SRabin Vincent }; 71127e34995SRabin Vincent 71227e34995SRabin Vincent /* 713230f13a5SJean-Nicolas Graux * STMPE1801 714230f13a5SJean-Nicolas Graux */ 715230f13a5SJean-Nicolas Graux static const u8 stmpe1801_regs[] = { 716230f13a5SJean-Nicolas Graux [STMPE_IDX_CHIP_ID] = STMPE1801_REG_CHIP_ID, 7170f4be8cfSPatrice Chotard [STMPE_IDX_SYS_CTRL] = STMPE1801_REG_SYS_CTRL, 718230f13a5SJean-Nicolas Graux [STMPE_IDX_ICR_LSB] = STMPE1801_REG_INT_CTRL_LOW, 719230f13a5SJean-Nicolas Graux [STMPE_IDX_IER_LSB] = STMPE1801_REG_INT_EN_MASK_LOW, 720230f13a5SJean-Nicolas Graux [STMPE_IDX_ISR_LSB] = STMPE1801_REG_INT_STA_LOW, 721230f13a5SJean-Nicolas Graux [STMPE_IDX_GPMR_LSB] = STMPE1801_REG_GPIO_MP_LOW, 722230f13a5SJean-Nicolas Graux [STMPE_IDX_GPSR_LSB] = STMPE1801_REG_GPIO_SET_LOW, 723230f13a5SJean-Nicolas Graux [STMPE_IDX_GPCR_LSB] = STMPE1801_REG_GPIO_CLR_LOW, 724230f13a5SJean-Nicolas Graux [STMPE_IDX_GPDR_LSB] = STMPE1801_REG_GPIO_SET_DIR_LOW, 725230f13a5SJean-Nicolas Graux [STMPE_IDX_GPRER_LSB] = STMPE1801_REG_GPIO_RE_LOW, 726230f13a5SJean-Nicolas Graux [STMPE_IDX_GPFER_LSB] = STMPE1801_REG_GPIO_FE_LOW, 72780e1dd82SLinus Walleij [STMPE_IDX_GPPUR_LSB] = STMPE1801_REG_GPIO_PULL_UP_LOW, 728230f13a5SJean-Nicolas Graux [STMPE_IDX_IEGPIOR_LSB] = STMPE1801_REG_INT_EN_GPIO_MASK_LOW, 729230f13a5SJean-Nicolas Graux [STMPE_IDX_ISGPIOR_LSB] = STMPE1801_REG_INT_STA_GPIO_LOW, 730230f13a5SJean-Nicolas Graux }; 731230f13a5SJean-Nicolas Graux 732230f13a5SJean-Nicolas Graux static struct stmpe_variant_block stmpe1801_blocks[] = { 733230f13a5SJean-Nicolas Graux { 734230f13a5SJean-Nicolas Graux .cell = &stmpe_gpio_cell, 735230f13a5SJean-Nicolas Graux .irq = STMPE1801_IRQ_GPIOC, 736230f13a5SJean-Nicolas Graux .block = STMPE_BLOCK_GPIO, 737230f13a5SJean-Nicolas Graux }, 738230f13a5SJean-Nicolas Graux { 739230f13a5SJean-Nicolas Graux .cell = &stmpe_keypad_cell, 740230f13a5SJean-Nicolas Graux .irq = STMPE1801_IRQ_KEYPAD, 741230f13a5SJean-Nicolas Graux .block = STMPE_BLOCK_KEYPAD, 742230f13a5SJean-Nicolas Graux }, 743230f13a5SJean-Nicolas Graux }; 744230f13a5SJean-Nicolas Graux 745230f13a5SJean-Nicolas Graux static int stmpe1801_enable(struct stmpe *stmpe, unsigned int blocks, 746230f13a5SJean-Nicolas Graux bool enable) 747230f13a5SJean-Nicolas Graux { 748230f13a5SJean-Nicolas Graux unsigned int mask = 0; 749230f13a5SJean-Nicolas Graux if (blocks & STMPE_BLOCK_GPIO) 750230f13a5SJean-Nicolas Graux mask |= STMPE1801_MSK_INT_EN_GPIO; 751230f13a5SJean-Nicolas Graux 752230f13a5SJean-Nicolas Graux if (blocks & STMPE_BLOCK_KEYPAD) 753230f13a5SJean-Nicolas Graux mask |= STMPE1801_MSK_INT_EN_KPC; 754230f13a5SJean-Nicolas Graux 755230f13a5SJean-Nicolas Graux return __stmpe_set_bits(stmpe, STMPE1801_REG_INT_EN_MASK_LOW, mask, 756230f13a5SJean-Nicolas Graux enable ? mask : 0); 757230f13a5SJean-Nicolas Graux } 758230f13a5SJean-Nicolas Graux 759*c4dd1ba3SPatrice Chotard static int stmpe_reset(struct stmpe *stmpe) 760230f13a5SJean-Nicolas Graux { 761*c4dd1ba3SPatrice Chotard u16 id_val = stmpe->variant->id_val; 762230f13a5SJean-Nicolas Graux unsigned long timeout; 763230f13a5SJean-Nicolas Graux int ret = 0; 764*c4dd1ba3SPatrice Chotard u8 reset_bit; 765*c4dd1ba3SPatrice Chotard 766*c4dd1ba3SPatrice Chotard if (id_val == STMPE811_ID) 767*c4dd1ba3SPatrice Chotard /* STMPE801 and STMPE610 use bit 1 of SYS_CTRL register */ 768*c4dd1ba3SPatrice Chotard reset_bit = STMPE811_SYS_CTRL_RESET; 769*c4dd1ba3SPatrice Chotard else 770*c4dd1ba3SPatrice Chotard /* all other STMPE variant use bit 7 of SYS_CTRL register */ 771*c4dd1ba3SPatrice Chotard reset_bit = STMPE_SYS_CTRL_RESET; 772230f13a5SJean-Nicolas Graux 7730f4be8cfSPatrice Chotard ret = __stmpe_set_bits(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL], 774*c4dd1ba3SPatrice Chotard reset_bit, reset_bit); 775230f13a5SJean-Nicolas Graux if (ret < 0) 776230f13a5SJean-Nicolas Graux return ret; 777230f13a5SJean-Nicolas Graux 778230f13a5SJean-Nicolas Graux timeout = jiffies + msecs_to_jiffies(100); 779230f13a5SJean-Nicolas Graux while (time_before(jiffies, timeout)) { 7800f4be8cfSPatrice Chotard ret = __stmpe_reg_read(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL]); 781230f13a5SJean-Nicolas Graux if (ret < 0) 782230f13a5SJean-Nicolas Graux return ret; 783*c4dd1ba3SPatrice Chotard if (!(ret & reset_bit)) 784230f13a5SJean-Nicolas Graux return 0; 785230f13a5SJean-Nicolas Graux usleep_range(100, 200); 78652397fe1SSachin Kamat } 787230f13a5SJean-Nicolas Graux return -EIO; 788230f13a5SJean-Nicolas Graux } 789230f13a5SJean-Nicolas Graux 790230f13a5SJean-Nicolas Graux static struct stmpe_variant_info stmpe1801 = { 791230f13a5SJean-Nicolas Graux .name = "stmpe1801", 792230f13a5SJean-Nicolas Graux .id_val = STMPE1801_ID, 793230f13a5SJean-Nicolas Graux .id_mask = 0xfff0, 794230f13a5SJean-Nicolas Graux .num_gpios = 18, 795230f13a5SJean-Nicolas Graux .af_bits = 0, 796230f13a5SJean-Nicolas Graux .regs = stmpe1801_regs, 797230f13a5SJean-Nicolas Graux .blocks = stmpe1801_blocks, 798230f13a5SJean-Nicolas Graux .num_blocks = ARRAY_SIZE(stmpe1801_blocks), 799230f13a5SJean-Nicolas Graux .num_irqs = STMPE1801_NR_INTERNAL_IRQS, 800230f13a5SJean-Nicolas Graux .enable = stmpe1801_enable, 801230f13a5SJean-Nicolas Graux /* stmpe1801 do not have any gpio alternate function */ 802230f13a5SJean-Nicolas Graux .get_altfunc = NULL, 803230f13a5SJean-Nicolas Graux }; 804230f13a5SJean-Nicolas Graux 805230f13a5SJean-Nicolas Graux /* 80627e34995SRabin Vincent * STMPE24XX 80727e34995SRabin Vincent */ 80827e34995SRabin Vincent 80927e34995SRabin Vincent static const u8 stmpe24xx_regs[] = { 81027e34995SRabin Vincent [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID, 8110f4be8cfSPatrice Chotard [STMPE_IDX_SYS_CTRL] = STMPE24XX_REG_SYS_CTRL, 8120f4be8cfSPatrice Chotard [STMPE_IDX_SYS_CTRL2] = STMPE24XX_REG_SYS_CTRL2, 81327e34995SRabin Vincent [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB, 81427e34995SRabin Vincent [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB, 81527e34995SRabin Vincent [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB, 81627e34995SRabin Vincent [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB, 81727e34995SRabin Vincent [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB, 81827e34995SRabin Vincent [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB, 81927e34995SRabin Vincent [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB, 82027e34995SRabin Vincent [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB, 82127e34995SRabin Vincent [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB, 82280e1dd82SLinus Walleij [STMPE_IDX_GPPUR_LSB] = STMPE24XX_REG_GPPUR_LSB, 82380e1dd82SLinus Walleij [STMPE_IDX_GPPDR_LSB] = STMPE24XX_REG_GPPDR_LSB, 82427e34995SRabin Vincent [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB, 82527e34995SRabin Vincent [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB, 82627e34995SRabin Vincent [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB, 82727e34995SRabin Vincent [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB, 82827e34995SRabin Vincent }; 82927e34995SRabin Vincent 83027e34995SRabin Vincent static struct stmpe_variant_block stmpe24xx_blocks[] = { 83127e34995SRabin Vincent { 83227e34995SRabin Vincent .cell = &stmpe_gpio_cell, 83327e34995SRabin Vincent .irq = STMPE24XX_IRQ_GPIOC, 83427e34995SRabin Vincent .block = STMPE_BLOCK_GPIO, 83527e34995SRabin Vincent }, 83627e34995SRabin Vincent { 83727e34995SRabin Vincent .cell = &stmpe_keypad_cell, 83827e34995SRabin Vincent .irq = STMPE24XX_IRQ_KEYPAD, 83927e34995SRabin Vincent .block = STMPE_BLOCK_KEYPAD, 84027e34995SRabin Vincent }, 841b273c5e0SLinus Walleij { 842b273c5e0SLinus Walleij .cell = &stmpe_pwm_cell, 843b273c5e0SLinus Walleij .irq = STMPE24XX_IRQ_PWM0, 844b273c5e0SLinus Walleij .block = STMPE_BLOCK_PWM, 845b273c5e0SLinus Walleij }, 84627e34995SRabin Vincent }; 84727e34995SRabin Vincent 84827e34995SRabin Vincent static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks, 84927e34995SRabin Vincent bool enable) 85027e34995SRabin Vincent { 85127e34995SRabin Vincent unsigned int mask = 0; 85227e34995SRabin Vincent 85327e34995SRabin Vincent if (blocks & STMPE_BLOCK_GPIO) 85427e34995SRabin Vincent mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO; 85527e34995SRabin Vincent 85627e34995SRabin Vincent if (blocks & STMPE_BLOCK_KEYPAD) 85727e34995SRabin Vincent mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC; 85827e34995SRabin Vincent 8590f4be8cfSPatrice Chotard return __stmpe_set_bits(stmpe, stmpe->regs[STMPE_IDX_SYS_CTRL], mask, 86027e34995SRabin Vincent enable ? mask : 0); 86127e34995SRabin Vincent } 86227e34995SRabin Vincent 86327e34995SRabin Vincent static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block) 86427e34995SRabin Vincent { 86527e34995SRabin Vincent switch (block) { 86627e34995SRabin Vincent case STMPE_BLOCK_ROTATOR: 86727e34995SRabin Vincent return 2; 86827e34995SRabin Vincent 86927e34995SRabin Vincent case STMPE_BLOCK_KEYPAD: 870f6d10341SLinus Walleij case STMPE_BLOCK_PWM: 87127e34995SRabin Vincent return 1; 87227e34995SRabin Vincent 87327e34995SRabin Vincent case STMPE_BLOCK_GPIO: 87427e34995SRabin Vincent default: 87527e34995SRabin Vincent return 0; 87627e34995SRabin Vincent } 87727e34995SRabin Vincent } 87827e34995SRabin Vincent 87927e34995SRabin Vincent static struct stmpe_variant_info stmpe2401 = { 88027e34995SRabin Vincent .name = "stmpe2401", 88127e34995SRabin Vincent .id_val = 0x0101, 88227e34995SRabin Vincent .id_mask = 0xffff, 88327e34995SRabin Vincent .num_gpios = 24, 88427e34995SRabin Vincent .af_bits = 2, 88527e34995SRabin Vincent .regs = stmpe24xx_regs, 88627e34995SRabin Vincent .blocks = stmpe24xx_blocks, 88727e34995SRabin Vincent .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), 88827e34995SRabin Vincent .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, 88927e34995SRabin Vincent .enable = stmpe24xx_enable, 89027e34995SRabin Vincent .get_altfunc = stmpe24xx_get_altfunc, 89127e34995SRabin Vincent }; 89227e34995SRabin Vincent 89327e34995SRabin Vincent static struct stmpe_variant_info stmpe2403 = { 89427e34995SRabin Vincent .name = "stmpe2403", 89527e34995SRabin Vincent .id_val = 0x0120, 89627e34995SRabin Vincent .id_mask = 0xffff, 89727e34995SRabin Vincent .num_gpios = 24, 89827e34995SRabin Vincent .af_bits = 2, 89927e34995SRabin Vincent .regs = stmpe24xx_regs, 90027e34995SRabin Vincent .blocks = stmpe24xx_blocks, 90127e34995SRabin Vincent .num_blocks = ARRAY_SIZE(stmpe24xx_blocks), 90227e34995SRabin Vincent .num_irqs = STMPE24XX_NR_INTERNAL_IRQS, 90327e34995SRabin Vincent .enable = stmpe24xx_enable, 90427e34995SRabin Vincent .get_altfunc = stmpe24xx_get_altfunc, 9055981f4e6SSundar R Iyer .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */ 90627e34995SRabin Vincent }; 90727e34995SRabin Vincent 908e31f9b82SChris Blair static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = { 9091cda2394SViresh Kumar [STMPE610] = &stmpe610, 9107f7f4ea1SViresh Kumar [STMPE801] = &stmpe801, 91127e34995SRabin Vincent [STMPE811] = &stmpe811, 91227e34995SRabin Vincent [STMPE1601] = &stmpe1601, 913230f13a5SJean-Nicolas Graux [STMPE1801] = &stmpe1801, 91427e34995SRabin Vincent [STMPE2401] = &stmpe2401, 91527e34995SRabin Vincent [STMPE2403] = &stmpe2403, 91627e34995SRabin Vincent }; 91727e34995SRabin Vincent 918e31f9b82SChris Blair /* 919e31f9b82SChris Blair * These devices can be connected in a 'no-irq' configuration - the irq pin 920e31f9b82SChris Blair * is not used and the device cannot interrupt the CPU. Here we only list 921e31f9b82SChris Blair * devices which support this configuration - the driver will fail probing 922e31f9b82SChris Blair * for any devices not listed here which are configured in this way. 923e31f9b82SChris Blair */ 924e31f9b82SChris Blair static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = { 925e31f9b82SChris Blair [STMPE801] = &stmpe801_noirq, 926e31f9b82SChris Blair }; 927e31f9b82SChris Blair 92827e34995SRabin Vincent static irqreturn_t stmpe_irq(int irq, void *data) 92927e34995SRabin Vincent { 93027e34995SRabin Vincent struct stmpe *stmpe = data; 93127e34995SRabin Vincent struct stmpe_variant_info *variant = stmpe->variant; 93227e34995SRabin Vincent int num = DIV_ROUND_UP(variant->num_irqs, 8); 933230f13a5SJean-Nicolas Graux u8 israddr; 9347929fa77SLee Jones u8 isr[3]; 93527e34995SRabin Vincent int ret; 93627e34995SRabin Vincent int i; 93727e34995SRabin Vincent 9387f7f4ea1SViresh Kumar if (variant->id_val == STMPE801_ID) { 93976f93992SLee Jones int base = irq_create_mapping(stmpe->domain, 0); 94076f93992SLee Jones 94176f93992SLee Jones handle_nested_irq(base); 9427f7f4ea1SViresh Kumar return IRQ_HANDLED; 9437f7f4ea1SViresh Kumar } 9447f7f4ea1SViresh Kumar 945230f13a5SJean-Nicolas Graux if (variant->id_val == STMPE1801_ID) 946230f13a5SJean-Nicolas Graux israddr = stmpe->regs[STMPE_IDX_ISR_LSB]; 947230f13a5SJean-Nicolas Graux else 948230f13a5SJean-Nicolas Graux israddr = stmpe->regs[STMPE_IDX_ISR_MSB]; 949230f13a5SJean-Nicolas Graux 95027e34995SRabin Vincent ret = stmpe_block_read(stmpe, israddr, num, isr); 95127e34995SRabin Vincent if (ret < 0) 95227e34995SRabin Vincent return IRQ_NONE; 95327e34995SRabin Vincent 95427e34995SRabin Vincent for (i = 0; i < num; i++) { 95527e34995SRabin Vincent int bank = num - i - 1; 95627e34995SRabin Vincent u8 status = isr[i]; 95727e34995SRabin Vincent u8 clear; 95827e34995SRabin Vincent 95927e34995SRabin Vincent status &= stmpe->ier[bank]; 96027e34995SRabin Vincent if (!status) 96127e34995SRabin Vincent continue; 96227e34995SRabin Vincent 96327e34995SRabin Vincent clear = status; 96427e34995SRabin Vincent while (status) { 96527e34995SRabin Vincent int bit = __ffs(status); 96627e34995SRabin Vincent int line = bank * 8 + bit; 96776f93992SLee Jones int nestedirq = irq_create_mapping(stmpe->domain, line); 96827e34995SRabin Vincent 96976f93992SLee Jones handle_nested_irq(nestedirq); 97027e34995SRabin Vincent status &= ~(1 << bit); 97127e34995SRabin Vincent } 97227e34995SRabin Vincent 97327e34995SRabin Vincent stmpe_reg_write(stmpe, israddr + i, clear); 97427e34995SRabin Vincent } 97527e34995SRabin Vincent 97627e34995SRabin Vincent return IRQ_HANDLED; 97727e34995SRabin Vincent } 97827e34995SRabin Vincent 97943b8c084SMark Brown static void stmpe_irq_lock(struct irq_data *data) 98027e34995SRabin Vincent { 98143b8c084SMark Brown struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 98227e34995SRabin Vincent 98327e34995SRabin Vincent mutex_lock(&stmpe->irq_lock); 98427e34995SRabin Vincent } 98527e34995SRabin Vincent 98643b8c084SMark Brown static void stmpe_irq_sync_unlock(struct irq_data *data) 98727e34995SRabin Vincent { 98843b8c084SMark Brown struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 98927e34995SRabin Vincent struct stmpe_variant_info *variant = stmpe->variant; 99027e34995SRabin Vincent int num = DIV_ROUND_UP(variant->num_irqs, 8); 99127e34995SRabin Vincent int i; 99227e34995SRabin Vincent 99327e34995SRabin Vincent for (i = 0; i < num; i++) { 99427e34995SRabin Vincent u8 new = stmpe->ier[i]; 99527e34995SRabin Vincent u8 old = stmpe->oldier[i]; 99627e34995SRabin Vincent 99727e34995SRabin Vincent if (new == old) 99827e34995SRabin Vincent continue; 99927e34995SRabin Vincent 100027e34995SRabin Vincent stmpe->oldier[i] = new; 100127e34995SRabin Vincent stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new); 100227e34995SRabin Vincent } 100327e34995SRabin Vincent 100427e34995SRabin Vincent mutex_unlock(&stmpe->irq_lock); 100527e34995SRabin Vincent } 100627e34995SRabin Vincent 100743b8c084SMark Brown static void stmpe_irq_mask(struct irq_data *data) 100827e34995SRabin Vincent { 100943b8c084SMark Brown struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 101076f93992SLee Jones int offset = data->hwirq; 101127e34995SRabin Vincent int regoffset = offset / 8; 101227e34995SRabin Vincent int mask = 1 << (offset % 8); 101327e34995SRabin Vincent 101427e34995SRabin Vincent stmpe->ier[regoffset] &= ~mask; 101527e34995SRabin Vincent } 101627e34995SRabin Vincent 101743b8c084SMark Brown static void stmpe_irq_unmask(struct irq_data *data) 101827e34995SRabin Vincent { 101943b8c084SMark Brown struct stmpe *stmpe = irq_data_get_irq_chip_data(data); 102076f93992SLee Jones int offset = data->hwirq; 102127e34995SRabin Vincent int regoffset = offset / 8; 102227e34995SRabin Vincent int mask = 1 << (offset % 8); 102327e34995SRabin Vincent 102427e34995SRabin Vincent stmpe->ier[regoffset] |= mask; 102527e34995SRabin Vincent } 102627e34995SRabin Vincent 102727e34995SRabin Vincent static struct irq_chip stmpe_irq_chip = { 102827e34995SRabin Vincent .name = "stmpe", 102943b8c084SMark Brown .irq_bus_lock = stmpe_irq_lock, 103043b8c084SMark Brown .irq_bus_sync_unlock = stmpe_irq_sync_unlock, 103143b8c084SMark Brown .irq_mask = stmpe_irq_mask, 103243b8c084SMark Brown .irq_unmask = stmpe_irq_unmask, 103327e34995SRabin Vincent }; 103427e34995SRabin Vincent 103576f93992SLee Jones static int stmpe_irq_map(struct irq_domain *d, unsigned int virq, 103676f93992SLee Jones irq_hw_number_t hwirq) 103727e34995SRabin Vincent { 103876f93992SLee Jones struct stmpe *stmpe = d->host_data; 10397f7f4ea1SViresh Kumar struct irq_chip *chip = NULL; 104027e34995SRabin Vincent 10417f7f4ea1SViresh Kumar if (stmpe->variant->id_val != STMPE801_ID) 10427f7f4ea1SViresh Kumar chip = &stmpe_irq_chip; 10437f7f4ea1SViresh Kumar 104476f93992SLee Jones irq_set_chip_data(virq, stmpe); 104576f93992SLee Jones irq_set_chip_and_handler(virq, chip, handle_edge_irq); 104676f93992SLee Jones irq_set_nested_thread(virq, 1); 104776f93992SLee Jones irq_set_noprobe(virq); 104827e34995SRabin Vincent 104927e34995SRabin Vincent return 0; 105027e34995SRabin Vincent } 105127e34995SRabin Vincent 105276f93992SLee Jones static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq) 105327e34995SRabin Vincent { 105476f93992SLee Jones irq_set_chip_and_handler(virq, NULL, NULL); 105576f93992SLee Jones irq_set_chip_data(virq, NULL); 105627e34995SRabin Vincent } 105776f93992SLee Jones 10587ce7b26fSKrzysztof Kozlowski static const struct irq_domain_ops stmpe_irq_ops = { 105976f93992SLee Jones .map = stmpe_irq_map, 106076f93992SLee Jones .unmap = stmpe_irq_unmap, 106176f93992SLee Jones .xlate = irq_domain_xlate_twocell, 106276f93992SLee Jones }; 106376f93992SLee Jones 1064612b95cdSGreg Kroah-Hartman static int stmpe_irq_init(struct stmpe *stmpe, struct device_node *np) 106576f93992SLee Jones { 1066b20a4371SLee Jones int base = 0; 106776f93992SLee Jones int num_irqs = stmpe->variant->num_irqs; 106876f93992SLee Jones 1069b20a4371SLee Jones stmpe->domain = irq_domain_add_simple(np, num_irqs, base, 1070b20a4371SLee Jones &stmpe_irq_ops, stmpe); 107176f93992SLee Jones if (!stmpe->domain) { 107276f93992SLee Jones dev_err(stmpe->dev, "Failed to create irqdomain\n"); 107376f93992SLee Jones return -ENOSYS; 107476f93992SLee Jones } 107576f93992SLee Jones 107676f93992SLee Jones return 0; 107727e34995SRabin Vincent } 107827e34995SRabin Vincent 1079612b95cdSGreg Kroah-Hartman static int stmpe_chip_init(struct stmpe *stmpe) 108027e34995SRabin Vincent { 108127e34995SRabin Vincent unsigned int irq_trigger = stmpe->pdata->irq_trigger; 10825981f4e6SSundar R Iyer int autosleep_timeout = stmpe->pdata->autosleep_timeout; 108327e34995SRabin Vincent struct stmpe_variant_info *variant = stmpe->variant; 1084e31f9b82SChris Blair u8 icr = 0; 108527e34995SRabin Vincent unsigned int id; 108627e34995SRabin Vincent u8 data[2]; 108727e34995SRabin Vincent int ret; 108827e34995SRabin Vincent 108927e34995SRabin Vincent ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID], 109027e34995SRabin Vincent ARRAY_SIZE(data), data); 109127e34995SRabin Vincent if (ret < 0) 109227e34995SRabin Vincent return ret; 109327e34995SRabin Vincent 109427e34995SRabin Vincent id = (data[0] << 8) | data[1]; 109527e34995SRabin Vincent if ((id & variant->id_mask) != variant->id_val) { 109627e34995SRabin Vincent dev_err(stmpe->dev, "unknown chip id: %#x\n", id); 109727e34995SRabin Vincent return -EINVAL; 109827e34995SRabin Vincent } 109927e34995SRabin Vincent 110027e34995SRabin Vincent dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id); 110127e34995SRabin Vincent 110227e34995SRabin Vincent /* Disable all modules -- subdrivers should enable what they need. */ 110327e34995SRabin Vincent ret = stmpe_disable(stmpe, ~0); 110427e34995SRabin Vincent if (ret) 110527e34995SRabin Vincent return ret; 110627e34995SRabin Vincent 1107*c4dd1ba3SPatrice Chotard ret = stmpe_reset(stmpe); 1108230f13a5SJean-Nicolas Graux if (ret < 0) 1109230f13a5SJean-Nicolas Graux return ret; 1110230f13a5SJean-Nicolas Graux 1111e31f9b82SChris Blair if (stmpe->irq >= 0) { 11127f7f4ea1SViresh Kumar if (id == STMPE801_ID) 11137f7f4ea1SViresh Kumar icr = STMPE801_REG_SYS_CTRL_INT_EN; 11147f7f4ea1SViresh Kumar else 11157f7f4ea1SViresh Kumar icr = STMPE_ICR_LSB_GIM; 11167f7f4ea1SViresh Kumar 11177f7f4ea1SViresh Kumar /* STMPE801 doesn't support Edge interrupts */ 11187f7f4ea1SViresh Kumar if (id != STMPE801_ID) { 111927e34995SRabin Vincent if (irq_trigger == IRQF_TRIGGER_FALLING || 112027e34995SRabin Vincent irq_trigger == IRQF_TRIGGER_RISING) 112127e34995SRabin Vincent icr |= STMPE_ICR_LSB_EDGE; 11227f7f4ea1SViresh Kumar } 112327e34995SRabin Vincent 112427e34995SRabin Vincent if (irq_trigger == IRQF_TRIGGER_RISING || 11257f7f4ea1SViresh Kumar irq_trigger == IRQF_TRIGGER_HIGH) { 11267f7f4ea1SViresh Kumar if (id == STMPE801_ID) 11277f7f4ea1SViresh Kumar icr |= STMPE801_REG_SYS_CTRL_INT_HI; 11287f7f4ea1SViresh Kumar else 112927e34995SRabin Vincent icr |= STMPE_ICR_LSB_HIGH; 11307f7f4ea1SViresh Kumar } 1131e31f9b82SChris Blair } 113227e34995SRabin Vincent 11335981f4e6SSundar R Iyer if (stmpe->pdata->autosleep) { 11345981f4e6SSundar R Iyer ret = stmpe_autosleep(stmpe, autosleep_timeout); 11355981f4e6SSundar R Iyer if (ret) 11365981f4e6SSundar R Iyer return ret; 11375981f4e6SSundar R Iyer } 11385981f4e6SSundar R Iyer 113927e34995SRabin Vincent return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr); 114027e34995SRabin Vincent } 114127e34995SRabin Vincent 11426bbb3c4cSGeert Uytterhoeven static int stmpe_add_device(struct stmpe *stmpe, const struct mfd_cell *cell) 114327e34995SRabin Vincent { 114427e34995SRabin Vincent return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1, 11459e9dc7d9SLinus Walleij NULL, 0, stmpe->domain); 114627e34995SRabin Vincent } 114727e34995SRabin Vincent 1148612b95cdSGreg Kroah-Hartman static int stmpe_devices_init(struct stmpe *stmpe) 114927e34995SRabin Vincent { 115027e34995SRabin Vincent struct stmpe_variant_info *variant = stmpe->variant; 115127e34995SRabin Vincent unsigned int platform_blocks = stmpe->pdata->blocks; 115227e34995SRabin Vincent int ret = -EINVAL; 11537da0cbfcSLee Jones int i, j; 115427e34995SRabin Vincent 115527e34995SRabin Vincent for (i = 0; i < variant->num_blocks; i++) { 115627e34995SRabin Vincent struct stmpe_variant_block *block = &variant->blocks[i]; 115727e34995SRabin Vincent 115827e34995SRabin Vincent if (!(platform_blocks & block->block)) 115927e34995SRabin Vincent continue; 116027e34995SRabin Vincent 11617da0cbfcSLee Jones for (j = 0; j < block->cell->num_resources; j++) { 11627da0cbfcSLee Jones struct resource *res = 11637da0cbfcSLee Jones (struct resource *) &block->cell->resources[j]; 11647da0cbfcSLee Jones 11657da0cbfcSLee Jones /* Dynamically fill in a variant's IRQ. */ 11667da0cbfcSLee Jones if (res->flags & IORESOURCE_IRQ) 11677da0cbfcSLee Jones res->start = res->end = block->irq + j; 11687da0cbfcSLee Jones } 11697da0cbfcSLee Jones 117027e34995SRabin Vincent platform_blocks &= ~block->block; 11717da0cbfcSLee Jones ret = stmpe_add_device(stmpe, block->cell); 117227e34995SRabin Vincent if (ret) 117327e34995SRabin Vincent return ret; 117427e34995SRabin Vincent } 117527e34995SRabin Vincent 117627e34995SRabin Vincent if (platform_blocks) 117727e34995SRabin Vincent dev_warn(stmpe->dev, 117827e34995SRabin Vincent "platform wants blocks (%#x) not present on variant", 117927e34995SRabin Vincent platform_blocks); 118027e34995SRabin Vincent 118127e34995SRabin Vincent return ret; 118227e34995SRabin Vincent } 118327e34995SRabin Vincent 1184a9c4055dSMark Brown static void stmpe_of_probe(struct stmpe_platform_data *pdata, 1185a9c4055dSMark Brown struct device_node *np) 1186909582caSLee Jones { 1187909582caSLee Jones struct device_node *child; 1188909582caSLee Jones 1189408a3fa8SGabriel Fernandez pdata->id = of_alias_get_id(np, "stmpe-i2c"); 1190408a3fa8SGabriel Fernandez if (pdata->id < 0) 1191ac713cc9SVipul Kumar Samar pdata->id = -1; 1192408a3fa8SGabriel Fernandez 1193851ec596SSean Cross pdata->irq_gpio = of_get_named_gpio_flags(np, "irq-gpio", 0, 1194851ec596SSean Cross &pdata->irq_trigger); 1195851ec596SSean Cross if (gpio_is_valid(pdata->irq_gpio)) 1196851ec596SSean Cross pdata->irq_over_gpio = 1; 1197851ec596SSean Cross else 1198ac713cc9SVipul Kumar Samar pdata->irq_trigger = IRQF_TRIGGER_NONE; 1199ac713cc9SVipul Kumar Samar 1200909582caSLee Jones of_property_read_u32(np, "st,autosleep-timeout", 1201909582caSLee Jones &pdata->autosleep_timeout); 1202909582caSLee Jones 1203909582caSLee Jones pdata->autosleep = (pdata->autosleep_timeout) ? true : false; 1204909582caSLee Jones 1205909582caSLee Jones for_each_child_of_node(np, child) { 1206909582caSLee Jones if (!strcmp(child->name, "stmpe_gpio")) { 1207909582caSLee Jones pdata->blocks |= STMPE_BLOCK_GPIO; 1208ac713cc9SVipul Kumar Samar } else if (!strcmp(child->name, "stmpe_keypad")) { 1209909582caSLee Jones pdata->blocks |= STMPE_BLOCK_KEYPAD; 1210ac713cc9SVipul Kumar Samar } else if (!strcmp(child->name, "stmpe_touchscreen")) { 1211909582caSLee Jones pdata->blocks |= STMPE_BLOCK_TOUCHSCREEN; 1212ac713cc9SVipul Kumar Samar } else if (!strcmp(child->name, "stmpe_adc")) { 1213909582caSLee Jones pdata->blocks |= STMPE_BLOCK_ADC; 1214ac713cc9SVipul Kumar Samar } else if (!strcmp(child->name, "stmpe_pwm")) { 1215ac713cc9SVipul Kumar Samar pdata->blocks |= STMPE_BLOCK_PWM; 1216ac713cc9SVipul Kumar Samar } else if (!strcmp(child->name, "stmpe_rotator")) { 1217ac713cc9SVipul Kumar Samar pdata->blocks |= STMPE_BLOCK_ROTATOR; 1218909582caSLee Jones } 1219909582caSLee Jones } 1220909582caSLee Jones } 1221909582caSLee Jones 12221a6e4b74SViresh Kumar /* Called from client specific probe routines */ 1223c00572bcSLee Jones int stmpe_probe(struct stmpe_client_info *ci, enum stmpe_partnum partnum) 1224208c4343SSundar Iyer { 1225fc1882dcSLinus Walleij struct stmpe_platform_data *pdata; 1226909582caSLee Jones struct device_node *np = ci->dev->of_node; 122727e34995SRabin Vincent struct stmpe *stmpe; 122827e34995SRabin Vincent int ret; 122927e34995SRabin Vincent 1230cb5faba9SViresh Kumar pdata = devm_kzalloc(ci->dev, sizeof(*pdata), GFP_KERNEL); 123127e34995SRabin Vincent if (!pdata) 1232909582caSLee Jones return -ENOMEM; 1233909582caSLee Jones 1234909582caSLee Jones stmpe_of_probe(pdata, np); 1235a200e320SGabriel Fernandez 1236a200e320SGabriel Fernandez if (of_find_property(np, "interrupts", NULL) == NULL) 1237a200e320SGabriel Fernandez ci->irq = -1; 123827e34995SRabin Vincent 1239cb5faba9SViresh Kumar stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL); 124027e34995SRabin Vincent if (!stmpe) 124127e34995SRabin Vincent return -ENOMEM; 124227e34995SRabin Vincent 124327e34995SRabin Vincent mutex_init(&stmpe->irq_lock); 124427e34995SRabin Vincent mutex_init(&stmpe->lock); 124527e34995SRabin Vincent 12461a6e4b74SViresh Kumar stmpe->dev = ci->dev; 12471a6e4b74SViresh Kumar stmpe->client = ci->client; 124827e34995SRabin Vincent stmpe->pdata = pdata; 12491a6e4b74SViresh Kumar stmpe->ci = ci; 12501a6e4b74SViresh Kumar stmpe->partnum = partnum; 12511a6e4b74SViresh Kumar stmpe->variant = stmpe_variant_info[partnum]; 125227e34995SRabin Vincent stmpe->regs = stmpe->variant->regs; 125327e34995SRabin Vincent stmpe->num_gpios = stmpe->variant->num_gpios; 12549c9e3214SLinus Walleij stmpe->vcc = devm_regulator_get_optional(ci->dev, "vcc"); 12559c9e3214SLinus Walleij if (!IS_ERR(stmpe->vcc)) { 12569c9e3214SLinus Walleij ret = regulator_enable(stmpe->vcc); 12579c9e3214SLinus Walleij if (ret) 12589c9e3214SLinus Walleij dev_warn(ci->dev, "failed to enable VCC supply\n"); 12599c9e3214SLinus Walleij } 12609c9e3214SLinus Walleij stmpe->vio = devm_regulator_get_optional(ci->dev, "vio"); 12619c9e3214SLinus Walleij if (!IS_ERR(stmpe->vio)) { 12629c9e3214SLinus Walleij ret = regulator_enable(stmpe->vio); 12639c9e3214SLinus Walleij if (ret) 12649c9e3214SLinus Walleij dev_warn(ci->dev, "failed to enable VIO supply\n"); 12659c9e3214SLinus Walleij } 12661a6e4b74SViresh Kumar dev_set_drvdata(stmpe->dev, stmpe); 126727e34995SRabin Vincent 12681a6e4b74SViresh Kumar if (ci->init) 12691a6e4b74SViresh Kumar ci->init(stmpe); 127027e34995SRabin Vincent 127173de16dbSViresh Kumar if (pdata->irq_over_gpio) { 1272cb5faba9SViresh Kumar ret = devm_gpio_request_one(ci->dev, pdata->irq_gpio, 1273cb5faba9SViresh Kumar GPIOF_DIR_IN, "stmpe"); 127473de16dbSViresh Kumar if (ret) { 127573de16dbSViresh Kumar dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n", 127673de16dbSViresh Kumar ret); 1277cb5faba9SViresh Kumar return ret; 127873de16dbSViresh Kumar } 127973de16dbSViresh Kumar 128073de16dbSViresh Kumar stmpe->irq = gpio_to_irq(pdata->irq_gpio); 128173de16dbSViresh Kumar } else { 12821a6e4b74SViresh Kumar stmpe->irq = ci->irq; 128373de16dbSViresh Kumar } 128473de16dbSViresh Kumar 1285e31f9b82SChris Blair if (stmpe->irq < 0) { 1286e31f9b82SChris Blair /* use alternate variant info for no-irq mode, if supported */ 1287e31f9b82SChris Blair dev_info(stmpe->dev, 1288e31f9b82SChris Blair "%s configured in no-irq mode by platform data\n", 1289e31f9b82SChris Blair stmpe->variant->name); 1290e31f9b82SChris Blair if (!stmpe_noirq_variant_info[stmpe->partnum]) { 1291e31f9b82SChris Blair dev_err(stmpe->dev, 1292e31f9b82SChris Blair "%s does not support no-irq mode!\n", 1293e31f9b82SChris Blair stmpe->variant->name); 1294cb5faba9SViresh Kumar return -ENODEV; 1295e31f9b82SChris Blair } 1296e31f9b82SChris Blair stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum]; 1297ac713cc9SVipul Kumar Samar } else if (pdata->irq_trigger == IRQF_TRIGGER_NONE) { 12981a5595cbSJavier Martinez Canillas pdata->irq_trigger = irq_get_trigger_type(stmpe->irq); 1299e31f9b82SChris Blair } 1300e31f9b82SChris Blair 130127e34995SRabin Vincent ret = stmpe_chip_init(stmpe); 130227e34995SRabin Vincent if (ret) 1303cb5faba9SViresh Kumar return ret; 130427e34995SRabin Vincent 1305e31f9b82SChris Blair if (stmpe->irq >= 0) { 1306909582caSLee Jones ret = stmpe_irq_init(stmpe, np); 130727e34995SRabin Vincent if (ret) 1308cb5faba9SViresh Kumar return ret; 130927e34995SRabin Vincent 1310cb5faba9SViresh Kumar ret = devm_request_threaded_irq(ci->dev, stmpe->irq, NULL, 1311cb5faba9SViresh Kumar stmpe_irq, pdata->irq_trigger | IRQF_ONESHOT, 1312e31f9b82SChris Blair "stmpe", stmpe); 131327e34995SRabin Vincent if (ret) { 1314e31f9b82SChris Blair dev_err(stmpe->dev, "failed to request IRQ: %d\n", 1315e31f9b82SChris Blair ret); 1316cb5faba9SViresh Kumar return ret; 131727e34995SRabin Vincent } 1318e31f9b82SChris Blair } 131927e34995SRabin Vincent 132027e34995SRabin Vincent ret = stmpe_devices_init(stmpe); 1321cb5faba9SViresh Kumar if (!ret) 132227e34995SRabin Vincent return 0; 132327e34995SRabin Vincent 1324cb5faba9SViresh Kumar dev_err(stmpe->dev, "failed to add children\n"); 132527e34995SRabin Vincent mfd_remove_devices(stmpe->dev); 1326cb5faba9SViresh Kumar 132727e34995SRabin Vincent return ret; 132827e34995SRabin Vincent } 132927e34995SRabin Vincent 13301a6e4b74SViresh Kumar int stmpe_remove(struct stmpe *stmpe) 133127e34995SRabin Vincent { 13329c9e3214SLinus Walleij if (!IS_ERR(stmpe->vio)) 13339c9e3214SLinus Walleij regulator_disable(stmpe->vio); 13349c9e3214SLinus Walleij if (!IS_ERR(stmpe->vcc)) 13359c9e3214SLinus Walleij regulator_disable(stmpe->vcc); 13369c9e3214SLinus Walleij 133727e34995SRabin Vincent mfd_remove_devices(stmpe->dev); 133827e34995SRabin Vincent 133927e34995SRabin Vincent return 0; 134027e34995SRabin Vincent } 134127e34995SRabin Vincent 1342208c4343SSundar Iyer #ifdef CONFIG_PM 13431a6e4b74SViresh Kumar static int stmpe_suspend(struct device *dev) 13441a6e4b74SViresh Kumar { 13451a6e4b74SViresh Kumar struct stmpe *stmpe = dev_get_drvdata(dev); 13461a6e4b74SViresh Kumar 1347e31f9b82SChris Blair if (stmpe->irq >= 0 && device_may_wakeup(dev)) 13481a6e4b74SViresh Kumar enable_irq_wake(stmpe->irq); 13491a6e4b74SViresh Kumar 13501a6e4b74SViresh Kumar return 0; 13511a6e4b74SViresh Kumar } 13521a6e4b74SViresh Kumar 13531a6e4b74SViresh Kumar static int stmpe_resume(struct device *dev) 13541a6e4b74SViresh Kumar { 13551a6e4b74SViresh Kumar struct stmpe *stmpe = dev_get_drvdata(dev); 13561a6e4b74SViresh Kumar 1357e31f9b82SChris Blair if (stmpe->irq >= 0 && device_may_wakeup(dev)) 13581a6e4b74SViresh Kumar disable_irq_wake(stmpe->irq); 13591a6e4b74SViresh Kumar 13601a6e4b74SViresh Kumar return 0; 13611a6e4b74SViresh Kumar } 13621a6e4b74SViresh Kumar 13631a6e4b74SViresh Kumar const struct dev_pm_ops stmpe_dev_pm_ops = { 1364208c4343SSundar Iyer .suspend = stmpe_suspend, 1365208c4343SSundar Iyer .resume = stmpe_resume, 1366208c4343SSundar Iyer }; 1367208c4343SSundar Iyer #endif 1368