xref: /linux/drivers/mfd/arizona-core.c (revision eb3d3ec567e868c8a3bfbfdfc9465ffd52983d11)
1 /*
2  * Arizona core driver
3  *
4  * Copyright 2012 Wolfson Microelectronics plc
5  *
6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/of_gpio.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/slab.h>
27 
28 #include <linux/mfd/arizona/core.h>
29 #include <linux/mfd/arizona/registers.h>
30 
31 #include "arizona.h"
32 
33 static const char *wm5102_core_supplies[] = {
34 	"AVDD",
35 	"DBVDD1",
36 };
37 
38 int arizona_clk32k_enable(struct arizona *arizona)
39 {
40 	int ret = 0;
41 
42 	mutex_lock(&arizona->clk_lock);
43 
44 	arizona->clk32k_ref++;
45 
46 	if (arizona->clk32k_ref == 1) {
47 		switch (arizona->pdata.clk32k_src) {
48 		case ARIZONA_32KZ_MCLK1:
49 			ret = pm_runtime_get_sync(arizona->dev);
50 			if (ret != 0)
51 				goto out;
52 			break;
53 		}
54 
55 		ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 					 ARIZONA_CLK_32K_ENA,
57 					 ARIZONA_CLK_32K_ENA);
58 	}
59 
60 out:
61 	if (ret != 0)
62 		arizona->clk32k_ref--;
63 
64 	mutex_unlock(&arizona->clk_lock);
65 
66 	return ret;
67 }
68 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69 
70 int arizona_clk32k_disable(struct arizona *arizona)
71 {
72 	int ret = 0;
73 
74 	mutex_lock(&arizona->clk_lock);
75 
76 	BUG_ON(arizona->clk32k_ref <= 0);
77 
78 	arizona->clk32k_ref--;
79 
80 	if (arizona->clk32k_ref == 0) {
81 		regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 				   ARIZONA_CLK_32K_ENA, 0);
83 
84 		switch (arizona->pdata.clk32k_src) {
85 		case ARIZONA_32KZ_MCLK1:
86 			pm_runtime_put_sync(arizona->dev);
87 			break;
88 		}
89 	}
90 
91 	mutex_unlock(&arizona->clk_lock);
92 
93 	return ret;
94 }
95 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
96 
97 static irqreturn_t arizona_clkgen_err(int irq, void *data)
98 {
99 	struct arizona *arizona = data;
100 
101 	dev_err(arizona->dev, "CLKGEN error\n");
102 
103 	return IRQ_HANDLED;
104 }
105 
106 static irqreturn_t arizona_underclocked(int irq, void *data)
107 {
108 	struct arizona *arizona = data;
109 	unsigned int val;
110 	int ret;
111 
112 	ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
113 			  &val);
114 	if (ret != 0) {
115 		dev_err(arizona->dev, "Failed to read underclock status: %d\n",
116 			ret);
117 		return IRQ_NONE;
118 	}
119 
120 	if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 		dev_err(arizona->dev, "AIF3 underclocked\n");
122 	if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
123 		dev_err(arizona->dev, "AIF2 underclocked\n");
124 	if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
125 		dev_err(arizona->dev, "AIF1 underclocked\n");
126 	if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
127 		dev_err(arizona->dev, "ISRC2 underclocked\n");
128 	if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
129 		dev_err(arizona->dev, "ISRC1 underclocked\n");
130 	if (val & ARIZONA_FX_UNDERCLOCKED_STS)
131 		dev_err(arizona->dev, "FX underclocked\n");
132 	if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
133 		dev_err(arizona->dev, "ASRC underclocked\n");
134 	if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
135 		dev_err(arizona->dev, "DAC underclocked\n");
136 	if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
137 		dev_err(arizona->dev, "ADC underclocked\n");
138 	if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
139 		dev_err(arizona->dev, "Mixer dropped sample\n");
140 
141 	return IRQ_HANDLED;
142 }
143 
144 static irqreturn_t arizona_overclocked(int irq, void *data)
145 {
146 	struct arizona *arizona = data;
147 	unsigned int val[2];
148 	int ret;
149 
150 	ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
151 			       &val[0], 2);
152 	if (ret != 0) {
153 		dev_err(arizona->dev, "Failed to read overclock status: %d\n",
154 			ret);
155 		return IRQ_NONE;
156 	}
157 
158 	if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
159 		dev_err(arizona->dev, "PWM overclocked\n");
160 	if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
161 		dev_err(arizona->dev, "FX core overclocked\n");
162 	if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
163 		dev_err(arizona->dev, "DAC SYS overclocked\n");
164 	if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
165 		dev_err(arizona->dev, "DAC WARP overclocked\n");
166 	if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
167 		dev_err(arizona->dev, "ADC overclocked\n");
168 	if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
169 		dev_err(arizona->dev, "Mixer overclocked\n");
170 	if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
171 		dev_err(arizona->dev, "AIF3 overclocked\n");
172 	if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
173 		dev_err(arizona->dev, "AIF2 overclocked\n");
174 	if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
175 		dev_err(arizona->dev, "AIF1 overclocked\n");
176 	if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
177 		dev_err(arizona->dev, "Pad control overclocked\n");
178 
179 	if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
180 		dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
181 	if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
182 		dev_err(arizona->dev, "Slimbus async overclocked\n");
183 	if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
184 		dev_err(arizona->dev, "Slimbus sync overclocked\n");
185 	if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
186 		dev_err(arizona->dev, "ASRC async system overclocked\n");
187 	if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
188 		dev_err(arizona->dev, "ASRC async WARP overclocked\n");
189 	if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
190 		dev_err(arizona->dev, "ASRC sync system overclocked\n");
191 	if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
192 		dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
193 	if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
194 		dev_err(arizona->dev, "DSP1 overclocked\n");
195 	if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
196 		dev_err(arizona->dev, "ISRC2 overclocked\n");
197 	if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
198 		dev_err(arizona->dev, "ISRC1 overclocked\n");
199 
200 	return IRQ_HANDLED;
201 }
202 
203 static int arizona_poll_reg(struct arizona *arizona,
204 			    int timeout, unsigned int reg,
205 			    unsigned int mask, unsigned int target)
206 {
207 	unsigned int val = 0;
208 	int ret, i;
209 
210 	for (i = 0; i < timeout; i++) {
211 		ret = regmap_read(arizona->regmap, reg, &val);
212 		if (ret != 0) {
213 			dev_err(arizona->dev, "Failed to read reg %u: %d\n",
214 				reg, ret);
215 			continue;
216 		}
217 
218 		if ((val & mask) == target)
219 			return 0;
220 
221 		msleep(1);
222 	}
223 
224 	dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
225 	return -ETIMEDOUT;
226 }
227 
228 static int arizona_wait_for_boot(struct arizona *arizona)
229 {
230 	int ret;
231 
232 	/*
233 	 * We can't use an interrupt as we need to runtime resume to do so,
234 	 * we won't race with the interrupt handler as it'll be blocked on
235 	 * runtime resume.
236 	 */
237 	ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
238 			       ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
239 
240 	if (!ret)
241 		regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
242 			     ARIZONA_BOOT_DONE_STS);
243 
244 	pm_runtime_mark_last_busy(arizona->dev);
245 
246 	return ret;
247 }
248 
249 static int arizona_apply_hardware_patch(struct arizona* arizona)
250 {
251 	unsigned int fll, sysclk;
252 	int ret, err;
253 
254 	/* Cache existing FLL and SYSCLK settings */
255 	ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
256 	if (ret != 0) {
257 		dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
258 			ret);
259 		return ret;
260 	}
261 	ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
262 	if (ret != 0) {
263 		dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
264 			ret);
265 		return ret;
266 	}
267 
268 	/* Start up SYSCLK using the FLL in free running mode */
269 	ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
270 			ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
271 	if (ret != 0) {
272 		dev_err(arizona->dev,
273 			"Failed to start FLL in freerunning mode: %d\n",
274 			ret);
275 		return ret;
276 	}
277 	ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
278 			       ARIZONA_FLL1_CLOCK_OK_STS,
279 			       ARIZONA_FLL1_CLOCK_OK_STS);
280 	if (ret != 0) {
281 		ret = -ETIMEDOUT;
282 		goto err_fll;
283 	}
284 
285 	ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
286 	if (ret != 0) {
287 		dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
288 		goto err_fll;
289 	}
290 
291 	/* Start the write sequencer and wait for it to finish */
292 	ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
293 			ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
294 	if (ret != 0) {
295 		dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
296 			ret);
297 		goto err_sysclk;
298 	}
299 	ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
300 			       ARIZONA_WSEQ_BUSY, 0);
301 	if (ret != 0) {
302 		regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
303 				ARIZONA_WSEQ_ABORT);
304 		ret = -ETIMEDOUT;
305 	}
306 
307 err_sysclk:
308 	err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
309 	if (err != 0) {
310 		dev_err(arizona->dev,
311 			"Failed to re-apply old SYSCLK settings: %d\n",
312 			err);
313 	}
314 
315 err_fll:
316 	err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
317 	if (err != 0) {
318 		dev_err(arizona->dev,
319 			"Failed to re-apply old FLL settings: %d\n",
320 			err);
321 	}
322 
323 	if (ret != 0)
324 		return ret;
325 	else
326 		return err;
327 }
328 
329 #ifdef CONFIG_PM_RUNTIME
330 static int arizona_runtime_resume(struct device *dev)
331 {
332 	struct arizona *arizona = dev_get_drvdata(dev);
333 	int ret;
334 
335 	dev_dbg(arizona->dev, "Leaving AoD mode\n");
336 
337 	ret = regulator_enable(arizona->dcvdd);
338 	if (ret != 0) {
339 		dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
340 		return ret;
341 	}
342 
343 	regcache_cache_only(arizona->regmap, false);
344 
345 	switch (arizona->type) {
346 	case WM5102:
347 		if (arizona->external_dcvdd) {
348 			ret = regmap_update_bits(arizona->regmap,
349 						 ARIZONA_ISOLATION_CONTROL,
350 						 ARIZONA_ISOLATE_DCVDD1, 0);
351 			if (ret != 0) {
352 				dev_err(arizona->dev,
353 					"Failed to connect DCVDD: %d\n", ret);
354 				goto err;
355 			}
356 		}
357 
358 		ret = wm5102_patch(arizona);
359 		if (ret != 0) {
360 			dev_err(arizona->dev, "Failed to apply patch: %d\n",
361 				ret);
362 			goto err;
363 		}
364 
365 		ret = arizona_apply_hardware_patch(arizona);
366 		if (ret != 0) {
367 			dev_err(arizona->dev,
368 				"Failed to apply hardware patch: %d\n",
369 				ret);
370 			goto err;
371 		}
372 		break;
373 	default:
374 		ret = arizona_wait_for_boot(arizona);
375 		if (ret != 0) {
376 			goto err;
377 		}
378 
379 		if (arizona->external_dcvdd) {
380 			ret = regmap_update_bits(arizona->regmap,
381 						 ARIZONA_ISOLATION_CONTROL,
382 						 ARIZONA_ISOLATE_DCVDD1, 0);
383 			if (ret != 0) {
384 				dev_err(arizona->dev,
385 					"Failed to connect DCVDD: %d\n", ret);
386 				goto err;
387 			}
388 		}
389 		break;
390 	}
391 
392 	switch (arizona->type) {
393 	case WM5102:
394 		ret = wm5102_patch(arizona);
395 		if (ret != 0) {
396 			dev_err(arizona->dev, "Failed to apply patch: %d\n",
397 				ret);
398 			goto err;
399 		}
400 	default:
401 		break;
402 	}
403 
404 	ret = regcache_sync(arizona->regmap);
405 	if (ret != 0) {
406 		dev_err(arizona->dev, "Failed to restore register cache\n");
407 		goto err;
408 	}
409 
410 	return 0;
411 
412 err:
413 	regcache_cache_only(arizona->regmap, true);
414 	regulator_disable(arizona->dcvdd);
415 	return ret;
416 }
417 
418 static int arizona_runtime_suspend(struct device *dev)
419 {
420 	struct arizona *arizona = dev_get_drvdata(dev);
421 	int ret;
422 
423 	dev_dbg(arizona->dev, "Entering AoD mode\n");
424 
425 	if (arizona->external_dcvdd) {
426 		ret = regmap_update_bits(arizona->regmap,
427 					 ARIZONA_ISOLATION_CONTROL,
428 					 ARIZONA_ISOLATE_DCVDD1,
429 					 ARIZONA_ISOLATE_DCVDD1);
430 		if (ret != 0) {
431 			dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
432 				ret);
433 			return ret;
434 		}
435 	}
436 
437 	regcache_cache_only(arizona->regmap, true);
438 	regcache_mark_dirty(arizona->regmap);
439 	regulator_disable(arizona->dcvdd);
440 
441 	return 0;
442 }
443 #endif
444 
445 #ifdef CONFIG_PM_SLEEP
446 static int arizona_suspend(struct device *dev)
447 {
448 	struct arizona *arizona = dev_get_drvdata(dev);
449 
450 	dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
451 	disable_irq(arizona->irq);
452 
453 	return 0;
454 }
455 
456 static int arizona_suspend_late(struct device *dev)
457 {
458 	struct arizona *arizona = dev_get_drvdata(dev);
459 
460 	dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
461 	enable_irq(arizona->irq);
462 
463 	return 0;
464 }
465 
466 static int arizona_resume_noirq(struct device *dev)
467 {
468 	struct arizona *arizona = dev_get_drvdata(dev);
469 
470 	dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
471 	disable_irq(arizona->irq);
472 
473 	return 0;
474 }
475 
476 static int arizona_resume(struct device *dev)
477 {
478 	struct arizona *arizona = dev_get_drvdata(dev);
479 
480 	dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
481 	enable_irq(arizona->irq);
482 
483 	return 0;
484 }
485 #endif
486 
487 const struct dev_pm_ops arizona_pm_ops = {
488 	SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
489 			   arizona_runtime_resume,
490 			   NULL)
491 	SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
492 #ifdef CONFIG_PM_SLEEP
493 	.suspend_late = arizona_suspend_late,
494 	.resume_noirq = arizona_resume_noirq,
495 #endif
496 };
497 EXPORT_SYMBOL_GPL(arizona_pm_ops);
498 
499 #ifdef CONFIG_OF
500 int arizona_of_get_type(struct device *dev)
501 {
502 	const struct of_device_id *id = of_match_device(arizona_of_match, dev);
503 
504 	if (id)
505 		return (int)id->data;
506 	else
507 		return 0;
508 }
509 EXPORT_SYMBOL_GPL(arizona_of_get_type);
510 
511 int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
512 			      bool mandatory)
513 {
514 	int gpio;
515 
516 	gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
517 	if (gpio < 0) {
518 		if (mandatory)
519 			dev_err(arizona->dev,
520 				"Mandatory DT gpio %s missing/malformed: %d\n",
521 				prop, gpio);
522 
523 		gpio = 0;
524 	}
525 
526 	return gpio;
527 }
528 EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
529 
530 static int arizona_of_get_core_pdata(struct arizona *arizona)
531 {
532 	struct arizona_pdata *pdata = &arizona->pdata;
533 	int ret, i;
534 
535 	pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
536 
537 	ret = of_property_read_u32_array(arizona->dev->of_node,
538 					 "wlf,gpio-defaults",
539 					 arizona->pdata.gpio_defaults,
540 					 ARRAY_SIZE(arizona->pdata.gpio_defaults));
541 	if (ret >= 0) {
542 		/*
543 		 * All values are literal except out of range values
544 		 * which are chip default, translate into platform
545 		 * data which uses 0 as chip default and out of range
546 		 * as zero.
547 		 */
548 		for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
549 			if (arizona->pdata.gpio_defaults[i] > 0xffff)
550 				arizona->pdata.gpio_defaults[i] = 0;
551 			else if (arizona->pdata.gpio_defaults[i] == 0)
552 				arizona->pdata.gpio_defaults[i] = 0x10000;
553 		}
554 	} else {
555 		dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
556 			ret);
557 	}
558 
559 	return 0;
560 }
561 
562 const struct of_device_id arizona_of_match[] = {
563 	{ .compatible = "wlf,wm5102", .data = (void *)WM5102 },
564 	{ .compatible = "wlf,wm5110", .data = (void *)WM5110 },
565 	{ .compatible = "wlf,wm8997", .data = (void *)WM8997 },
566 	{},
567 };
568 EXPORT_SYMBOL_GPL(arizona_of_match);
569 #else
570 static inline int arizona_of_get_core_pdata(struct arizona *arizona)
571 {
572 	return 0;
573 }
574 #endif
575 
576 static const struct mfd_cell early_devs[] = {
577 	{ .name = "arizona-ldo1" },
578 };
579 
580 static const char *wm5102_supplies[] = {
581 	"DBVDD2",
582 	"DBVDD3",
583 	"CPVDD",
584 	"SPKVDDL",
585 	"SPKVDDR",
586 };
587 
588 static const struct mfd_cell wm5102_devs[] = {
589 	{ .name = "arizona-micsupp" },
590 	{ .name = "arizona-extcon" },
591 	{ .name = "arizona-gpio" },
592 	{ .name = "arizona-haptics" },
593 	{ .name = "arizona-pwm" },
594 	{
595 		.name = "wm5102-codec",
596 		.parent_supplies = wm5102_supplies,
597 		.num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
598 	},
599 };
600 
601 static const struct mfd_cell wm5110_devs[] = {
602 	{ .name = "arizona-micsupp" },
603 	{ .name = "arizona-extcon" },
604 	{ .name = "arizona-gpio" },
605 	{ .name = "arizona-haptics" },
606 	{ .name = "arizona-pwm" },
607 	{
608 		.name = "wm5110-codec",
609 		.parent_supplies = wm5102_supplies,
610 		.num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
611 	},
612 };
613 
614 static const char *wm8997_supplies[] = {
615 	"DBVDD2",
616 	"CPVDD",
617 	"SPKVDD",
618 };
619 
620 static const struct mfd_cell wm8997_devs[] = {
621 	{ .name = "arizona-micsupp" },
622 	{ .name = "arizona-extcon" },
623 	{ .name = "arizona-gpio" },
624 	{ .name = "arizona-haptics" },
625 	{ .name = "arizona-pwm" },
626 	{
627 		.name = "wm8997-codec",
628 		.parent_supplies = wm8997_supplies,
629 		.num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
630 	},
631 };
632 
633 int arizona_dev_init(struct arizona *arizona)
634 {
635 	struct device *dev = arizona->dev;
636 	const char *type_name;
637 	unsigned int reg, val;
638 	int (*apply_patch)(struct arizona *) = NULL;
639 	int ret, i;
640 
641 	dev_set_drvdata(arizona->dev, arizona);
642 	mutex_init(&arizona->clk_lock);
643 
644 	if (dev_get_platdata(arizona->dev))
645 		memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
646 		       sizeof(arizona->pdata));
647 	else
648 		arizona_of_get_core_pdata(arizona);
649 
650 	regcache_cache_only(arizona->regmap, true);
651 
652 	switch (arizona->type) {
653 	case WM5102:
654 	case WM5110:
655 	case WM8997:
656 		for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
657 			arizona->core_supplies[i].supply
658 				= wm5102_core_supplies[i];
659 		arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
660 		break;
661 	default:
662 		dev_err(arizona->dev, "Unknown device type %d\n",
663 			arizona->type);
664 		return -EINVAL;
665 	}
666 
667 	/* Mark DCVDD as external, LDO1 driver will clear if internal */
668 	arizona->external_dcvdd = true;
669 
670 	ret = mfd_add_devices(arizona->dev, -1, early_devs,
671 			      ARRAY_SIZE(early_devs), NULL, 0, NULL);
672 	if (ret != 0) {
673 		dev_err(dev, "Failed to add early children: %d\n", ret);
674 		return ret;
675 	}
676 
677 	ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
678 				      arizona->core_supplies);
679 	if (ret != 0) {
680 		dev_err(dev, "Failed to request core supplies: %d\n",
681 			ret);
682 		goto err_early;
683 	}
684 
685 	arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
686 	if (IS_ERR(arizona->dcvdd)) {
687 		ret = PTR_ERR(arizona->dcvdd);
688 		dev_err(dev, "Failed to request DCVDD: %d\n", ret);
689 		goto err_early;
690 	}
691 
692 	if (arizona->pdata.reset) {
693 		/* Start out with /RESET low to put the chip into reset */
694 		ret = gpio_request_one(arizona->pdata.reset,
695 				       GPIOF_DIR_OUT | GPIOF_INIT_LOW,
696 				       "arizona /RESET");
697 		if (ret != 0) {
698 			dev_err(dev, "Failed to request /RESET: %d\n", ret);
699 			goto err_early;
700 		}
701 	}
702 
703 	ret = regulator_bulk_enable(arizona->num_core_supplies,
704 				    arizona->core_supplies);
705 	if (ret != 0) {
706 		dev_err(dev, "Failed to enable core supplies: %d\n",
707 			ret);
708 		goto err_early;
709 	}
710 
711 	ret = regulator_enable(arizona->dcvdd);
712 	if (ret != 0) {
713 		dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
714 		goto err_enable;
715 	}
716 
717 	if (arizona->pdata.reset) {
718 		gpio_set_value_cansleep(arizona->pdata.reset, 1);
719 		msleep(1);
720 	}
721 
722 	regcache_cache_only(arizona->regmap, false);
723 
724 	/* Verify that this is a chip we know about */
725 	ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
726 	if (ret != 0) {
727 		dev_err(dev, "Failed to read ID register: %d\n", ret);
728 		goto err_reset;
729 	}
730 
731 	switch (reg) {
732 	case 0x5102:
733 	case 0x5110:
734 	case 0x8997:
735 		break;
736 	default:
737 		dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
738 		goto err_reset;
739 	}
740 
741 	/* If we have a /RESET GPIO we'll already be reset */
742 	if (!arizona->pdata.reset) {
743 		regcache_mark_dirty(arizona->regmap);
744 
745 		ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
746 		if (ret != 0) {
747 			dev_err(dev, "Failed to reset device: %d\n", ret);
748 			goto err_reset;
749 		}
750 
751 		msleep(1);
752 
753 		ret = regcache_sync(arizona->regmap);
754 		if (ret != 0) {
755 			dev_err(dev, "Failed to sync device: %d\n", ret);
756 			goto err_reset;
757 		}
758 	}
759 
760 	/* Ensure device startup is complete */
761 	switch (arizona->type) {
762 	case WM5102:
763 		ret = regmap_read(arizona->regmap, 0x19, &val);
764 		if (ret != 0)
765 			dev_err(dev,
766 				"Failed to check write sequencer state: %d\n",
767 				ret);
768 		else if (val & 0x01)
769 			break;
770 		/* Fall through */
771 	default:
772 		ret = arizona_wait_for_boot(arizona);
773 		if (ret != 0) {
774 			dev_err(arizona->dev,
775 				"Device failed initial boot: %d\n", ret);
776 			goto err_reset;
777 		}
778 		break;
779 	}
780 
781 	/* Read the device ID information & do device specific stuff */
782 	ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
783 	if (ret != 0) {
784 		dev_err(dev, "Failed to read ID register: %d\n", ret);
785 		goto err_reset;
786 	}
787 
788 	ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
789 			  &arizona->rev);
790 	if (ret != 0) {
791 		dev_err(dev, "Failed to read revision register: %d\n", ret);
792 		goto err_reset;
793 	}
794 	arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
795 
796 	switch (reg) {
797 #ifdef CONFIG_MFD_WM5102
798 	case 0x5102:
799 		type_name = "WM5102";
800 		if (arizona->type != WM5102) {
801 			dev_err(arizona->dev, "WM5102 registered as %d\n",
802 				arizona->type);
803 			arizona->type = WM5102;
804 		}
805 		apply_patch = wm5102_patch;
806 		arizona->rev &= 0x7;
807 		break;
808 #endif
809 #ifdef CONFIG_MFD_WM5110
810 	case 0x5110:
811 		type_name = "WM5110";
812 		if (arizona->type != WM5110) {
813 			dev_err(arizona->dev, "WM5110 registered as %d\n",
814 				arizona->type);
815 			arizona->type = WM5110;
816 		}
817 		apply_patch = wm5110_patch;
818 		break;
819 #endif
820 #ifdef CONFIG_MFD_WM8997
821 	case 0x8997:
822 		type_name = "WM8997";
823 		if (arizona->type != WM8997) {
824 			dev_err(arizona->dev, "WM8997 registered as %d\n",
825 				arizona->type);
826 			arizona->type = WM8997;
827 		}
828 		apply_patch = wm8997_patch;
829 		break;
830 #endif
831 	default:
832 		dev_err(arizona->dev, "Unknown device ID %x\n", reg);
833 		goto err_reset;
834 	}
835 
836 	dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
837 
838 	if (apply_patch) {
839 		ret = apply_patch(arizona);
840 		if (ret != 0) {
841 			dev_err(arizona->dev, "Failed to apply patch: %d\n",
842 				ret);
843 			goto err_reset;
844 		}
845 
846 		switch (arizona->type) {
847 		case WM5102:
848 			ret = arizona_apply_hardware_patch(arizona);
849 			if (ret != 0) {
850 				dev_err(arizona->dev,
851 					"Failed to apply hardware patch: %d\n",
852 					ret);
853 				goto err_reset;
854 			}
855 			break;
856 		default:
857 			break;
858 		}
859 	}
860 
861 	for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
862 		if (!arizona->pdata.gpio_defaults[i])
863 			continue;
864 
865 		regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
866 			     arizona->pdata.gpio_defaults[i]);
867 	}
868 
869 	pm_runtime_set_autosuspend_delay(arizona->dev, 100);
870 	pm_runtime_use_autosuspend(arizona->dev);
871 	pm_runtime_enable(arizona->dev);
872 
873 	/* Chip default */
874 	if (!arizona->pdata.clk32k_src)
875 		arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
876 
877 	switch (arizona->pdata.clk32k_src) {
878 	case ARIZONA_32KZ_MCLK1:
879 	case ARIZONA_32KZ_MCLK2:
880 		regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
881 				   ARIZONA_CLK_32K_SRC_MASK,
882 				   arizona->pdata.clk32k_src - 1);
883 		arizona_clk32k_enable(arizona);
884 		break;
885 	case ARIZONA_32KZ_NONE:
886 		regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
887 				   ARIZONA_CLK_32K_SRC_MASK, 2);
888 		break;
889 	default:
890 		dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
891 			arizona->pdata.clk32k_src);
892 		ret = -EINVAL;
893 		goto err_reset;
894 	}
895 
896 	for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
897 		if (!arizona->pdata.micbias[i].mV &&
898 		    !arizona->pdata.micbias[i].bypass)
899 			continue;
900 
901 		/* Apply default for bypass mode */
902 		if (!arizona->pdata.micbias[i].mV)
903 			arizona->pdata.micbias[i].mV = 2800;
904 
905 		val = (arizona->pdata.micbias[i].mV - 1500) / 100;
906 
907 		val <<= ARIZONA_MICB1_LVL_SHIFT;
908 
909 		if (arizona->pdata.micbias[i].ext_cap)
910 			val |= ARIZONA_MICB1_EXT_CAP;
911 
912 		if (arizona->pdata.micbias[i].discharge)
913 			val |= ARIZONA_MICB1_DISCH;
914 
915 		if (arizona->pdata.micbias[i].soft_start)
916 			val |= ARIZONA_MICB1_RATE;
917 
918 		if (arizona->pdata.micbias[i].bypass)
919 			val |= ARIZONA_MICB1_BYPASS;
920 
921 		regmap_update_bits(arizona->regmap,
922 				   ARIZONA_MIC_BIAS_CTRL_1 + i,
923 				   ARIZONA_MICB1_LVL_MASK |
924 				   ARIZONA_MICB1_DISCH |
925 				   ARIZONA_MICB1_BYPASS |
926 				   ARIZONA_MICB1_RATE, val);
927 	}
928 
929 	for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
930 		/* Default for both is 0 so noop with defaults */
931 		val = arizona->pdata.dmic_ref[i]
932 			<< ARIZONA_IN1_DMIC_SUP_SHIFT;
933 		val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
934 
935 		regmap_update_bits(arizona->regmap,
936 				   ARIZONA_IN1L_CONTROL + (i * 8),
937 				   ARIZONA_IN1_DMIC_SUP_MASK |
938 				   ARIZONA_IN1_MODE_MASK, val);
939 	}
940 
941 	for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
942 		/* Default is 0 so noop with defaults */
943 		if (arizona->pdata.out_mono[i])
944 			val = ARIZONA_OUT1_MONO;
945 		else
946 			val = 0;
947 
948 		regmap_update_bits(arizona->regmap,
949 				   ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
950 				   ARIZONA_OUT1_MONO, val);
951 	}
952 
953 	for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
954 		if (arizona->pdata.spk_mute[i])
955 			regmap_update_bits(arizona->regmap,
956 					   ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
957 					   ARIZONA_SPK1_MUTE_ENDIAN_MASK |
958 					   ARIZONA_SPK1_MUTE_SEQ1_MASK,
959 					   arizona->pdata.spk_mute[i]);
960 
961 		if (arizona->pdata.spk_fmt[i])
962 			regmap_update_bits(arizona->regmap,
963 					   ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
964 					   ARIZONA_SPK1_FMT_MASK,
965 					   arizona->pdata.spk_fmt[i]);
966 	}
967 
968 	/* Set up for interrupts */
969 	ret = arizona_irq_init(arizona);
970 	if (ret != 0)
971 		goto err_reset;
972 
973 	arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
974 			    arizona_clkgen_err, arizona);
975 	arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
976 			    arizona_overclocked, arizona);
977 	arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
978 			    arizona_underclocked, arizona);
979 
980 	switch (arizona->type) {
981 	case WM5102:
982 		ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
983 				      ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
984 		break;
985 	case WM5110:
986 		ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
987 				      ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
988 		break;
989 	case WM8997:
990 		ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
991 				      ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
992 		break;
993 	}
994 
995 	if (ret != 0) {
996 		dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
997 		goto err_irq;
998 	}
999 
1000 #ifdef CONFIG_PM_RUNTIME
1001 	regulator_disable(arizona->dcvdd);
1002 #endif
1003 
1004 	return 0;
1005 
1006 err_irq:
1007 	arizona_irq_exit(arizona);
1008 err_reset:
1009 	if (arizona->pdata.reset) {
1010 		gpio_set_value_cansleep(arizona->pdata.reset, 0);
1011 		gpio_free(arizona->pdata.reset);
1012 	}
1013 	regulator_disable(arizona->dcvdd);
1014 err_enable:
1015 	regulator_bulk_disable(arizona->num_core_supplies,
1016 			       arizona->core_supplies);
1017 err_early:
1018 	mfd_remove_devices(dev);
1019 	return ret;
1020 }
1021 EXPORT_SYMBOL_GPL(arizona_dev_init);
1022 
1023 int arizona_dev_exit(struct arizona *arizona)
1024 {
1025 	mfd_remove_devices(arizona->dev);
1026 	arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1027 	arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1028 	arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1029 	pm_runtime_disable(arizona->dev);
1030 	arizona_irq_exit(arizona);
1031 	if (arizona->pdata.reset)
1032 		gpio_set_value_cansleep(arizona->pdata.reset, 0);
1033 	regulator_disable(arizona->dcvdd);
1034 	regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies),
1035 			       arizona->core_supplies);
1036 	return 0;
1037 }
1038 EXPORT_SYMBOL_GPL(arizona_dev_exit);
1039