1*c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 25740f4e7SHans Verkuil /* 35740f4e7SHans Verkuil * tw68_risc.c 45740f4e7SHans Verkuil * Part of the device driver for Techwell 68xx based cards 55740f4e7SHans Verkuil * 65740f4e7SHans Verkuil * Much of this code is derived from the cx88 and sa7134 drivers, which 75740f4e7SHans Verkuil * were in turn derived from the bt87x driver. The original work was by 85740f4e7SHans Verkuil * Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab, 95740f4e7SHans Verkuil * Hans Verkuil, Andy Walls and many others. Their work is gratefully 105740f4e7SHans Verkuil * acknowledged. Full credit goes to them - any problems within this code 115740f4e7SHans Verkuil * are mine. 125740f4e7SHans Verkuil * 13e15d1c12SHans Verkuil * Copyright (C) 2009 William M. Brack 14e15d1c12SHans Verkuil * 15e15d1c12SHans Verkuil * Refactored and updated to the latest v4l core frameworks: 16e15d1c12SHans Verkuil * 17e15d1c12SHans Verkuil * Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl> 185740f4e7SHans Verkuil */ 195740f4e7SHans Verkuil 205740f4e7SHans Verkuil #include "tw68.h" 215740f4e7SHans Verkuil 225740f4e7SHans Verkuil /** 23ef69f8d2SMauro Carvalho Chehab * tw68_risc_field 24ef69f8d2SMauro Carvalho Chehab * @rp: pointer to current risc program position 25ef69f8d2SMauro Carvalho Chehab * @sglist: pointer to "scatter-gather list" of buffer pointers 26ef69f8d2SMauro Carvalho Chehab * @offset: offset to target memory buffer 27ef69f8d2SMauro Carvalho Chehab * @sync_line: 0 -> no sync, 1 -> odd sync, 2 -> even sync 28ef69f8d2SMauro Carvalho Chehab * @bpl: number of bytes per scan line 29ef69f8d2SMauro Carvalho Chehab * @padding: number of bytes of padding to add 30ef69f8d2SMauro Carvalho Chehab * @lines: number of lines in field 31ef69f8d2SMauro Carvalho Chehab * @jump: insert a jump at the start 325740f4e7SHans Verkuil */ 335740f4e7SHans Verkuil static __le32 *tw68_risc_field(__le32 *rp, struct scatterlist *sglist, 345740f4e7SHans Verkuil unsigned int offset, u32 sync_line, 355740f4e7SHans Verkuil unsigned int bpl, unsigned int padding, 36e15d1c12SHans Verkuil unsigned int lines, bool jump) 375740f4e7SHans Verkuil { 385740f4e7SHans Verkuil struct scatterlist *sg; 395740f4e7SHans Verkuil unsigned int line, todo, done; 405740f4e7SHans Verkuil 41e15d1c12SHans Verkuil if (jump) { 42e15d1c12SHans Verkuil *(rp++) = cpu_to_le32(RISC_JUMP); 43e15d1c12SHans Verkuil *(rp++) = 0; 44e15d1c12SHans Verkuil } 45e15d1c12SHans Verkuil 465740f4e7SHans Verkuil /* sync instruction */ 475740f4e7SHans Verkuil if (sync_line == 1) 485740f4e7SHans Verkuil *(rp++) = cpu_to_le32(RISC_SYNCO); 495740f4e7SHans Verkuil else 505740f4e7SHans Verkuil *(rp++) = cpu_to_le32(RISC_SYNCE); 515740f4e7SHans Verkuil *(rp++) = 0; 52e15d1c12SHans Verkuil 535740f4e7SHans Verkuil /* scan lines */ 545740f4e7SHans Verkuil sg = sglist; 555740f4e7SHans Verkuil for (line = 0; line < lines; line++) { 565740f4e7SHans Verkuil /* calculate next starting position */ 575740f4e7SHans Verkuil while (offset && offset >= sg_dma_len(sg)) { 585740f4e7SHans Verkuil offset -= sg_dma_len(sg); 59e15d1c12SHans Verkuil sg = sg_next(sg); 605740f4e7SHans Verkuil } 615740f4e7SHans Verkuil if (bpl <= sg_dma_len(sg) - offset) { 625740f4e7SHans Verkuil /* fits into current chunk */ 635740f4e7SHans Verkuil *(rp++) = cpu_to_le32(RISC_LINESTART | 645740f4e7SHans Verkuil /* (offset<<12) |*/ bpl); 655740f4e7SHans Verkuil *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset); 665740f4e7SHans Verkuil offset += bpl; 675740f4e7SHans Verkuil } else { 685740f4e7SHans Verkuil /* 695740f4e7SHans Verkuil * scanline needs to be split. Put the start in 705740f4e7SHans Verkuil * whatever memory remains using RISC_LINESTART, 715740f4e7SHans Verkuil * then the remainder into following addresses 725740f4e7SHans Verkuil * given by the scatter-gather list. 735740f4e7SHans Verkuil */ 745740f4e7SHans Verkuil todo = bpl; /* one full line to be done */ 755740f4e7SHans Verkuil /* first fragment */ 765740f4e7SHans Verkuil done = (sg_dma_len(sg) - offset); 775740f4e7SHans Verkuil *(rp++) = cpu_to_le32(RISC_LINESTART | 785740f4e7SHans Verkuil (7 << 24) | 795740f4e7SHans Verkuil done); 805740f4e7SHans Verkuil *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset); 815740f4e7SHans Verkuil todo -= done; 82e15d1c12SHans Verkuil sg = sg_next(sg); 835740f4e7SHans Verkuil /* succeeding fragments have no offset */ 845740f4e7SHans Verkuil while (todo > sg_dma_len(sg)) { 855740f4e7SHans Verkuil *(rp++) = cpu_to_le32(RISC_INLINE | 865740f4e7SHans Verkuil (done << 12) | 875740f4e7SHans Verkuil sg_dma_len(sg)); 885740f4e7SHans Verkuil *(rp++) = cpu_to_le32(sg_dma_address(sg)); 895740f4e7SHans Verkuil todo -= sg_dma_len(sg); 90e15d1c12SHans Verkuil sg = sg_next(sg); 915740f4e7SHans Verkuil done += sg_dma_len(sg); 925740f4e7SHans Verkuil } 935740f4e7SHans Verkuil if (todo) { 945740f4e7SHans Verkuil /* final chunk - offset 0, count 'todo' */ 955740f4e7SHans Verkuil *(rp++) = cpu_to_le32(RISC_INLINE | 965740f4e7SHans Verkuil (done << 12) | 975740f4e7SHans Verkuil todo); 985740f4e7SHans Verkuil *(rp++) = cpu_to_le32(sg_dma_address(sg)); 995740f4e7SHans Verkuil } 1005740f4e7SHans Verkuil offset = todo; 1015740f4e7SHans Verkuil } 1025740f4e7SHans Verkuil offset += padding; 1035740f4e7SHans Verkuil } 1045740f4e7SHans Verkuil 1055740f4e7SHans Verkuil return rp; 1065740f4e7SHans Verkuil } 1075740f4e7SHans Verkuil 1085740f4e7SHans Verkuil /** 1095740f4e7SHans Verkuil * tw68_risc_buffer 1105740f4e7SHans Verkuil * 1115740f4e7SHans Verkuil * This routine is called by tw68-video. It allocates 1125740f4e7SHans Verkuil * memory for the dma controller "program" and then fills in that 1135740f4e7SHans Verkuil * memory with the appropriate "instructions". 1145740f4e7SHans Verkuil * 115ef69f8d2SMauro Carvalho Chehab * @pci: structure with info about the pci 1165740f4e7SHans Verkuil * slot which our device is in. 117ef69f8d2SMauro Carvalho Chehab * @buf: structure with info about the memory 1185740f4e7SHans Verkuil * used for our controller program. 119ef69f8d2SMauro Carvalho Chehab * @sglist: scatter-gather list entry 120ef69f8d2SMauro Carvalho Chehab * @top_offset: offset within the risc program area for the 1215740f4e7SHans Verkuil * first odd frame line 122ef69f8d2SMauro Carvalho Chehab * @bottom_offset: offset within the risc program area for the 1235740f4e7SHans Verkuil * first even frame line 124ef69f8d2SMauro Carvalho Chehab * @bpl: number of data bytes per scan line 125ef69f8d2SMauro Carvalho Chehab * @padding: number of extra bytes to add at end of line 126ef69f8d2SMauro Carvalho Chehab * @lines: number of scan lines 1275740f4e7SHans Verkuil */ 1285740f4e7SHans Verkuil int tw68_risc_buffer(struct pci_dev *pci, 129e15d1c12SHans Verkuil struct tw68_buf *buf, 1305740f4e7SHans Verkuil struct scatterlist *sglist, 1315740f4e7SHans Verkuil unsigned int top_offset, 1325740f4e7SHans Verkuil unsigned int bottom_offset, 1335740f4e7SHans Verkuil unsigned int bpl, 1345740f4e7SHans Verkuil unsigned int padding, 1355740f4e7SHans Verkuil unsigned int lines) 1365740f4e7SHans Verkuil { 1375740f4e7SHans Verkuil u32 instructions, fields; 1385740f4e7SHans Verkuil __le32 *rp; 1395740f4e7SHans Verkuil 1405740f4e7SHans Verkuil fields = 0; 1415740f4e7SHans Verkuil if (UNSET != top_offset) 1425740f4e7SHans Verkuil fields++; 1435740f4e7SHans Verkuil if (UNSET != bottom_offset) 1445740f4e7SHans Verkuil fields++; 1455740f4e7SHans Verkuil /* 1465740f4e7SHans Verkuil * estimate risc mem: worst case is one write per page border + 147e15d1c12SHans Verkuil * one write per scan line + syncs + 2 jumps (all 2 dwords). 1485740f4e7SHans Verkuil * Padding can cause next bpl to start close to a page border. 1495740f4e7SHans Verkuil * First DMA region may be smaller than PAGE_SIZE 1505740f4e7SHans Verkuil */ 1515740f4e7SHans Verkuil instructions = fields * (1 + (((bpl + padding) * lines) / 152e15d1c12SHans Verkuil PAGE_SIZE) + lines) + 4; 153e15d1c12SHans Verkuil buf->size = instructions * 8; 154e15d1c12SHans Verkuil buf->cpu = pci_alloc_consistent(pci, buf->size, &buf->dma); 155e15d1c12SHans Verkuil if (buf->cpu == NULL) 156e15d1c12SHans Verkuil return -ENOMEM; 1575740f4e7SHans Verkuil 1585740f4e7SHans Verkuil /* write risc instructions */ 159e15d1c12SHans Verkuil rp = buf->cpu; 1605740f4e7SHans Verkuil if (UNSET != top_offset) /* generates SYNCO */ 1615740f4e7SHans Verkuil rp = tw68_risc_field(rp, sglist, top_offset, 1, 162e15d1c12SHans Verkuil bpl, padding, lines, true); 1635740f4e7SHans Verkuil if (UNSET != bottom_offset) /* generates SYNCE */ 1645740f4e7SHans Verkuil rp = tw68_risc_field(rp, sglist, bottom_offset, 2, 165e15d1c12SHans Verkuil bpl, padding, lines, top_offset == UNSET); 1665740f4e7SHans Verkuil 1675740f4e7SHans Verkuil /* save pointer to jmp instruction address */ 168e15d1c12SHans Verkuil buf->jmp = rp; 169e15d1c12SHans Verkuil buf->cpu[1] = cpu_to_le32(buf->dma + 8); 1705740f4e7SHans Verkuil /* assure risc buffer hasn't overflowed */ 171e15d1c12SHans Verkuil BUG_ON((buf->jmp - buf->cpu + 2) * sizeof(buf->cpu[0]) > buf->size); 1725740f4e7SHans Verkuil return 0; 1735740f4e7SHans Verkuil } 1745740f4e7SHans Verkuil 1755740f4e7SHans Verkuil #if 0 1765740f4e7SHans Verkuil /* ------------------------------------------------------------------ */ 1775740f4e7SHans Verkuil /* debug helper code */ 1785740f4e7SHans Verkuil 1795740f4e7SHans Verkuil static void tw68_risc_decode(u32 risc, u32 addr) 1805740f4e7SHans Verkuil { 1815740f4e7SHans Verkuil #define RISC_OP(reg) (((reg) >> 28) & 7) 1825740f4e7SHans Verkuil static struct instr_details { 1835740f4e7SHans Verkuil char *name; 1845740f4e7SHans Verkuil u8 has_data_type; 1855740f4e7SHans Verkuil u8 has_byte_info; 1865740f4e7SHans Verkuil u8 has_addr; 1875740f4e7SHans Verkuil } instr[8] = { 1885740f4e7SHans Verkuil [RISC_OP(RISC_SYNCO)] = {"syncOdd", 0, 0, 0}, 1895740f4e7SHans Verkuil [RISC_OP(RISC_SYNCE)] = {"syncEven", 0, 0, 0}, 1905740f4e7SHans Verkuil [RISC_OP(RISC_JUMP)] = {"jump", 0, 0, 1}, 1915740f4e7SHans Verkuil [RISC_OP(RISC_LINESTART)] = {"lineStart", 1, 1, 1}, 1925740f4e7SHans Verkuil [RISC_OP(RISC_INLINE)] = {"inline", 1, 1, 1}, 1935740f4e7SHans Verkuil }; 1945740f4e7SHans Verkuil u32 p; 1955740f4e7SHans Verkuil 1965740f4e7SHans Verkuil p = RISC_OP(risc); 1975740f4e7SHans Verkuil if (!(risc & 0x80000000) || !instr[p].name) { 198e15d1c12SHans Verkuil pr_debug("0x%08x [ INVALID ]\n", risc); 1995740f4e7SHans Verkuil return; 2005740f4e7SHans Verkuil } 201e15d1c12SHans Verkuil pr_debug("0x%08x %-9s IRQ=%d", 2025740f4e7SHans Verkuil risc, instr[p].name, (risc >> 27) & 1); 2035740f4e7SHans Verkuil if (instr[p].has_data_type) 204e15d1c12SHans Verkuil pr_debug(" Type=%d", (risc >> 24) & 7); 2055740f4e7SHans Verkuil if (instr[p].has_byte_info) 206e15d1c12SHans Verkuil pr_debug(" Start=0x%03x Count=%03u", 2075740f4e7SHans Verkuil (risc >> 12) & 0xfff, risc & 0xfff); 2085740f4e7SHans Verkuil if (instr[p].has_addr) 209e15d1c12SHans Verkuil pr_debug(" StartAddr=0x%08x", addr); 210e15d1c12SHans Verkuil pr_debug("\n"); 2115740f4e7SHans Verkuil } 2125740f4e7SHans Verkuil 213e15d1c12SHans Verkuil void tw68_risc_program_dump(struct tw68_core *core, struct tw68_buf *buf) 2145740f4e7SHans Verkuil { 215e15d1c12SHans Verkuil const __le32 *addr; 2165740f4e7SHans Verkuil 217e15d1c12SHans Verkuil pr_debug("%s: risc_program_dump: risc=%p, buf->cpu=0x%p, buf->jmp=0x%p\n", 218e15d1c12SHans Verkuil core->name, buf, buf->cpu, buf->jmp); 219e15d1c12SHans Verkuil for (addr = buf->cpu; addr <= buf->jmp; addr += 2) 2205740f4e7SHans Verkuil tw68_risc_decode(*addr, *(addr+1)); 2215740f4e7SHans Verkuil } 2225740f4e7SHans Verkuil #endif 223