1 /* 2 * 3 * device driver for Conexant 2388x based TV cards 4 * video4linux video interface 5 * 6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] 7 * 8 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org> 9 * - Multituner support 10 * - video_ioctl2 conversion 11 * - PAL/M fixes 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 26 */ 27 28 #include <linux/init.h> 29 #include <linux/list.h> 30 #include <linux/module.h> 31 #include <linux/kmod.h> 32 #include <linux/kernel.h> 33 #include <linux/slab.h> 34 #include <linux/interrupt.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/delay.h> 37 #include <linux/kthread.h> 38 #include <asm/div64.h> 39 40 #include "cx88.h" 41 #include <media/v4l2-common.h> 42 #include <media/v4l2-ioctl.h> 43 #include <media/v4l2-event.h> 44 #include <media/wm8775.h> 45 46 MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards"); 47 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); 48 MODULE_LICENSE("GPL"); 49 MODULE_VERSION(CX88_VERSION); 50 51 /* ------------------------------------------------------------------ */ 52 53 static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; 54 static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; 55 static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; 56 57 module_param_array(video_nr, int, NULL, 0444); 58 module_param_array(vbi_nr, int, NULL, 0444); 59 module_param_array(radio_nr, int, NULL, 0444); 60 61 MODULE_PARM_DESC(video_nr,"video device numbers"); 62 MODULE_PARM_DESC(vbi_nr,"vbi device numbers"); 63 MODULE_PARM_DESC(radio_nr,"radio device numbers"); 64 65 static unsigned int video_debug; 66 module_param(video_debug,int,0644); 67 MODULE_PARM_DESC(video_debug,"enable debug messages [video]"); 68 69 static unsigned int irq_debug; 70 module_param(irq_debug,int,0644); 71 MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]"); 72 73 #define dprintk(level,fmt, arg...) if (video_debug >= level) \ 74 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg) 75 76 /* ------------------------------------------------------------------- */ 77 /* static data */ 78 79 static const struct cx8800_fmt formats[] = { 80 { 81 .name = "8 bpp, gray", 82 .fourcc = V4L2_PIX_FMT_GREY, 83 .cxformat = ColorFormatY8, 84 .depth = 8, 85 .flags = FORMAT_FLAGS_PACKED, 86 },{ 87 .name = "15 bpp RGB, le", 88 .fourcc = V4L2_PIX_FMT_RGB555, 89 .cxformat = ColorFormatRGB15, 90 .depth = 16, 91 .flags = FORMAT_FLAGS_PACKED, 92 },{ 93 .name = "15 bpp RGB, be", 94 .fourcc = V4L2_PIX_FMT_RGB555X, 95 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP, 96 .depth = 16, 97 .flags = FORMAT_FLAGS_PACKED, 98 },{ 99 .name = "16 bpp RGB, le", 100 .fourcc = V4L2_PIX_FMT_RGB565, 101 .cxformat = ColorFormatRGB16, 102 .depth = 16, 103 .flags = FORMAT_FLAGS_PACKED, 104 },{ 105 .name = "16 bpp RGB, be", 106 .fourcc = V4L2_PIX_FMT_RGB565X, 107 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP, 108 .depth = 16, 109 .flags = FORMAT_FLAGS_PACKED, 110 },{ 111 .name = "24 bpp RGB, le", 112 .fourcc = V4L2_PIX_FMT_BGR24, 113 .cxformat = ColorFormatRGB24, 114 .depth = 24, 115 .flags = FORMAT_FLAGS_PACKED, 116 },{ 117 .name = "32 bpp RGB, le", 118 .fourcc = V4L2_PIX_FMT_BGR32, 119 .cxformat = ColorFormatRGB32, 120 .depth = 32, 121 .flags = FORMAT_FLAGS_PACKED, 122 },{ 123 .name = "32 bpp RGB, be", 124 .fourcc = V4L2_PIX_FMT_RGB32, 125 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP, 126 .depth = 32, 127 .flags = FORMAT_FLAGS_PACKED, 128 },{ 129 .name = "4:2:2, packed, YUYV", 130 .fourcc = V4L2_PIX_FMT_YUYV, 131 .cxformat = ColorFormatYUY2, 132 .depth = 16, 133 .flags = FORMAT_FLAGS_PACKED, 134 },{ 135 .name = "4:2:2, packed, UYVY", 136 .fourcc = V4L2_PIX_FMT_UYVY, 137 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP, 138 .depth = 16, 139 .flags = FORMAT_FLAGS_PACKED, 140 }, 141 }; 142 143 static const struct cx8800_fmt* format_by_fourcc(unsigned int fourcc) 144 { 145 unsigned int i; 146 147 for (i = 0; i < ARRAY_SIZE(formats); i++) 148 if (formats[i].fourcc == fourcc) 149 return formats+i; 150 return NULL; 151 } 152 153 /* ------------------------------------------------------------------- */ 154 155 struct cx88_ctrl { 156 /* control information */ 157 u32 id; 158 s32 minimum; 159 s32 maximum; 160 u32 step; 161 s32 default_value; 162 163 /* control register information */ 164 u32 off; 165 u32 reg; 166 u32 sreg; 167 u32 mask; 168 u32 shift; 169 }; 170 171 static const struct cx88_ctrl cx8800_vid_ctls[] = { 172 /* --- video --- */ 173 { 174 .id = V4L2_CID_BRIGHTNESS, 175 .minimum = 0x00, 176 .maximum = 0xff, 177 .step = 1, 178 .default_value = 0x7f, 179 .off = 128, 180 .reg = MO_CONTR_BRIGHT, 181 .mask = 0x00ff, 182 .shift = 0, 183 },{ 184 .id = V4L2_CID_CONTRAST, 185 .minimum = 0, 186 .maximum = 0xff, 187 .step = 1, 188 .default_value = 0x3f, 189 .off = 0, 190 .reg = MO_CONTR_BRIGHT, 191 .mask = 0xff00, 192 .shift = 8, 193 },{ 194 .id = V4L2_CID_HUE, 195 .minimum = 0, 196 .maximum = 0xff, 197 .step = 1, 198 .default_value = 0x7f, 199 .off = 128, 200 .reg = MO_HUE, 201 .mask = 0x00ff, 202 .shift = 0, 203 },{ 204 /* strictly, this only describes only U saturation. 205 * V saturation is handled specially through code. 206 */ 207 .id = V4L2_CID_SATURATION, 208 .minimum = 0, 209 .maximum = 0xff, 210 .step = 1, 211 .default_value = 0x7f, 212 .off = 0, 213 .reg = MO_UV_SATURATION, 214 .mask = 0x00ff, 215 .shift = 0, 216 }, { 217 .id = V4L2_CID_SHARPNESS, 218 .minimum = 0, 219 .maximum = 4, 220 .step = 1, 221 .default_value = 0x0, 222 .off = 0, 223 /* NOTE: the value is converted and written to both even 224 and odd registers in the code */ 225 .reg = MO_FILTER_ODD, 226 .mask = 7 << 7, 227 .shift = 7, 228 }, { 229 .id = V4L2_CID_CHROMA_AGC, 230 .minimum = 0, 231 .maximum = 1, 232 .default_value = 0x1, 233 .reg = MO_INPUT_FORMAT, 234 .mask = 1 << 10, 235 .shift = 10, 236 }, { 237 .id = V4L2_CID_COLOR_KILLER, 238 .minimum = 0, 239 .maximum = 1, 240 .default_value = 0x1, 241 .reg = MO_INPUT_FORMAT, 242 .mask = 1 << 9, 243 .shift = 9, 244 }, { 245 .id = V4L2_CID_BAND_STOP_FILTER, 246 .minimum = 0, 247 .maximum = 1, 248 .step = 1, 249 .default_value = 0x0, 250 .off = 0, 251 .reg = MO_HTOTAL, 252 .mask = 3 << 11, 253 .shift = 11, 254 } 255 }; 256 257 static const struct cx88_ctrl cx8800_aud_ctls[] = { 258 { 259 /* --- audio --- */ 260 .id = V4L2_CID_AUDIO_MUTE, 261 .minimum = 0, 262 .maximum = 1, 263 .default_value = 1, 264 .reg = AUD_VOL_CTL, 265 .sreg = SHADOW_AUD_VOL_CTL, 266 .mask = (1 << 6), 267 .shift = 6, 268 },{ 269 .id = V4L2_CID_AUDIO_VOLUME, 270 .minimum = 0, 271 .maximum = 0x3f, 272 .step = 1, 273 .default_value = 0x3f, 274 .reg = AUD_VOL_CTL, 275 .sreg = SHADOW_AUD_VOL_CTL, 276 .mask = 0x3f, 277 .shift = 0, 278 },{ 279 .id = V4L2_CID_AUDIO_BALANCE, 280 .minimum = 0, 281 .maximum = 0x7f, 282 .step = 1, 283 .default_value = 0x40, 284 .reg = AUD_BAL_CTL, 285 .sreg = SHADOW_AUD_BAL_CTL, 286 .mask = 0x7f, 287 .shift = 0, 288 } 289 }; 290 291 enum { 292 CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls), 293 CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls), 294 }; 295 296 /* ------------------------------------------------------------------ */ 297 298 int cx88_video_mux(struct cx88_core *core, unsigned int input) 299 { 300 /* struct cx88_core *core = dev->core; */ 301 302 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n", 303 input, INPUT(input).vmux, 304 INPUT(input).gpio0,INPUT(input).gpio1, 305 INPUT(input).gpio2,INPUT(input).gpio3); 306 core->input = input; 307 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14); 308 cx_write(MO_GP3_IO, INPUT(input).gpio3); 309 cx_write(MO_GP0_IO, INPUT(input).gpio0); 310 cx_write(MO_GP1_IO, INPUT(input).gpio1); 311 cx_write(MO_GP2_IO, INPUT(input).gpio2); 312 313 switch (INPUT(input).type) { 314 case CX88_VMUX_SVIDEO: 315 cx_set(MO_AFECFG_IO, 0x00000001); 316 cx_set(MO_INPUT_FORMAT, 0x00010010); 317 cx_set(MO_FILTER_EVEN, 0x00002020); 318 cx_set(MO_FILTER_ODD, 0x00002020); 319 break; 320 default: 321 cx_clear(MO_AFECFG_IO, 0x00000001); 322 cx_clear(MO_INPUT_FORMAT, 0x00010010); 323 cx_clear(MO_FILTER_EVEN, 0x00002020); 324 cx_clear(MO_FILTER_ODD, 0x00002020); 325 break; 326 } 327 328 /* if there are audioroutes defined, we have an external 329 ADC to deal with audio */ 330 if (INPUT(input).audioroute) { 331 /* The wm8775 module has the "2" route hardwired into 332 the initialization. Some boards may use different 333 routes for different inputs. HVR-1300 surely does */ 334 if (core->sd_wm8775) { 335 call_all(core, audio, s_routing, 336 INPUT(input).audioroute, 0, 0); 337 } 338 /* cx2388's C-ADC is connected to the tuner only. 339 When used with S-Video, that ADC is busy dealing with 340 chroma, so an external must be used for baseband audio */ 341 if (INPUT(input).type != CX88_VMUX_TELEVISION && 342 INPUT(input).type != CX88_VMUX_CABLE) { 343 /* "I2S ADC mode" */ 344 core->tvaudio = WW_I2SADC; 345 cx88_set_tvaudio(core); 346 } else { 347 /* Normal mode */ 348 cx_write(AUD_I2SCNTL, 0x0); 349 cx_clear(AUD_CTL, EN_I2SIN_ENABLE); 350 } 351 } 352 353 return 0; 354 } 355 EXPORT_SYMBOL(cx88_video_mux); 356 357 /* ------------------------------------------------------------------ */ 358 359 static int start_video_dma(struct cx8800_dev *dev, 360 struct cx88_dmaqueue *q, 361 struct cx88_buffer *buf) 362 { 363 struct cx88_core *core = dev->core; 364 365 /* setup fifo + format */ 366 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21], 367 buf->bpl, buf->risc.dma); 368 cx88_set_scale(core, core->width, core->height, core->field); 369 cx_write(MO_COLOR_CTRL, dev->fmt->cxformat | ColorFormatGamma); 370 371 /* reset counter */ 372 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET); 373 q->count = 1; 374 375 /* enable irqs */ 376 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT); 377 378 /* Enables corresponding bits at PCI_INT_STAT: 379 bits 0 to 4: video, audio, transport stream, VIP, Host 380 bit 7: timer 381 bits 8 and 9: DMA complete for: SRC, DST 382 bits 10 and 11: BERR signal asserted for RISC: RD, WR 383 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB 384 */ 385 cx_set(MO_VID_INTMSK, 0x0f0011); 386 387 /* enable capture */ 388 cx_set(VID_CAPTURE_CONTROL,0x06); 389 390 /* start dma */ 391 cx_set(MO_DEV_CNTRL2, (1<<5)); 392 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */ 393 394 return 0; 395 } 396 397 #ifdef CONFIG_PM 398 static int stop_video_dma(struct cx8800_dev *dev) 399 { 400 struct cx88_core *core = dev->core; 401 402 /* stop dma */ 403 cx_clear(MO_VID_DMACNTRL, 0x11); 404 405 /* disable capture */ 406 cx_clear(VID_CAPTURE_CONTROL,0x06); 407 408 /* disable irqs */ 409 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT); 410 cx_clear(MO_VID_INTMSK, 0x0f0011); 411 return 0; 412 } 413 #endif 414 415 static int restart_video_queue(struct cx8800_dev *dev, 416 struct cx88_dmaqueue *q) 417 { 418 struct cx88_core *core = dev->core; 419 struct cx88_buffer *buf; 420 421 if (!list_empty(&q->active)) { 422 buf = list_entry(q->active.next, struct cx88_buffer, list); 423 dprintk(2,"restart_queue [%p/%d]: restart dma\n", 424 buf, buf->vb.v4l2_buf.index); 425 start_video_dma(dev, q, buf); 426 list_for_each_entry(buf, &q->active, list) 427 buf->count = q->count++; 428 } 429 return 0; 430 } 431 432 /* ------------------------------------------------------------------ */ 433 434 static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt, 435 unsigned int *num_buffers, unsigned int *num_planes, 436 unsigned int sizes[], void *alloc_ctxs[]) 437 { 438 struct cx8800_dev *dev = q->drv_priv; 439 struct cx88_core *core = dev->core; 440 441 *num_planes = 1; 442 sizes[0] = (dev->fmt->depth * core->width * core->height) >> 3; 443 return 0; 444 } 445 446 static int buffer_prepare(struct vb2_buffer *vb) 447 { 448 struct cx8800_dev *dev = vb->vb2_queue->drv_priv; 449 struct cx88_core *core = dev->core; 450 struct cx88_buffer *buf = container_of(vb, struct cx88_buffer, vb); 451 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0); 452 int rc; 453 454 buf->bpl = core->width * dev->fmt->depth >> 3; 455 456 if (vb2_plane_size(vb, 0) < core->height * buf->bpl) 457 return -EINVAL; 458 vb2_set_plane_payload(vb, 0, core->height * buf->bpl); 459 460 rc = dma_map_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE); 461 if (!rc) 462 return -EIO; 463 464 switch (core->field) { 465 case V4L2_FIELD_TOP: 466 cx88_risc_buffer(dev->pci, &buf->risc, 467 sgt->sgl, 0, UNSET, 468 buf->bpl, 0, core->height); 469 break; 470 case V4L2_FIELD_BOTTOM: 471 cx88_risc_buffer(dev->pci, &buf->risc, 472 sgt->sgl, UNSET, 0, 473 buf->bpl, 0, core->height); 474 break; 475 case V4L2_FIELD_SEQ_TB: 476 cx88_risc_buffer(dev->pci, &buf->risc, 477 sgt->sgl, 478 0, buf->bpl * (core->height >> 1), 479 buf->bpl, 0, 480 core->height >> 1); 481 break; 482 case V4L2_FIELD_SEQ_BT: 483 cx88_risc_buffer(dev->pci, &buf->risc, 484 sgt->sgl, 485 buf->bpl * (core->height >> 1), 0, 486 buf->bpl, 0, 487 core->height >> 1); 488 break; 489 case V4L2_FIELD_INTERLACED: 490 default: 491 cx88_risc_buffer(dev->pci, &buf->risc, 492 sgt->sgl, 0, buf->bpl, 493 buf->bpl, buf->bpl, 494 core->height >> 1); 495 break; 496 } 497 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n", 498 buf, buf->vb.v4l2_buf.index, 499 core->width, core->height, dev->fmt->depth, dev->fmt->name, 500 (unsigned long)buf->risc.dma); 501 return 0; 502 } 503 504 static void buffer_finish(struct vb2_buffer *vb) 505 { 506 struct cx8800_dev *dev = vb->vb2_queue->drv_priv; 507 struct cx88_buffer *buf = container_of(vb, struct cx88_buffer, vb); 508 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0); 509 struct cx88_riscmem *risc = &buf->risc; 510 511 if (risc->cpu) 512 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma); 513 memset(risc, 0, sizeof(*risc)); 514 515 dma_unmap_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE); 516 } 517 518 static void buffer_queue(struct vb2_buffer *vb) 519 { 520 struct cx8800_dev *dev = vb->vb2_queue->drv_priv; 521 struct cx88_buffer *buf = container_of(vb, struct cx88_buffer, vb); 522 struct cx88_buffer *prev; 523 struct cx88_core *core = dev->core; 524 struct cx88_dmaqueue *q = &dev->vidq; 525 526 /* add jump to start */ 527 buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8); 528 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC); 529 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8); 530 531 if (list_empty(&q->active)) { 532 list_add_tail(&buf->list, &q->active); 533 start_video_dma(dev, q, buf); 534 buf->count = q->count++; 535 dprintk(2,"[%p/%d] buffer_queue - first active\n", 536 buf, buf->vb.v4l2_buf.index); 537 538 } else { 539 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1); 540 prev = list_entry(q->active.prev, struct cx88_buffer, list); 541 list_add_tail(&buf->list, &q->active); 542 buf->count = q->count++; 543 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); 544 dprintk(2, "[%p/%d] buffer_queue - append to active\n", 545 buf, buf->vb.v4l2_buf.index); 546 } 547 } 548 549 static int start_streaming(struct vb2_queue *q, unsigned int count) 550 { 551 struct cx8800_dev *dev = q->drv_priv; 552 struct cx88_dmaqueue *dmaq = &dev->vidq; 553 struct cx88_buffer *buf = list_entry(dmaq->active.next, 554 struct cx88_buffer, list); 555 556 start_video_dma(dev, dmaq, buf); 557 return 0; 558 } 559 560 static void stop_streaming(struct vb2_queue *q) 561 { 562 struct cx8800_dev *dev = q->drv_priv; 563 struct cx88_core *core = dev->core; 564 struct cx88_dmaqueue *dmaq = &dev->vidq; 565 unsigned long flags; 566 567 cx_clear(MO_VID_DMACNTRL, 0x11); 568 cx_clear(VID_CAPTURE_CONTROL, 0x06); 569 spin_lock_irqsave(&dev->slock, flags); 570 while (!list_empty(&dmaq->active)) { 571 struct cx88_buffer *buf = list_entry(dmaq->active.next, 572 struct cx88_buffer, list); 573 574 list_del(&buf->list); 575 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); 576 } 577 spin_unlock_irqrestore(&dev->slock, flags); 578 } 579 580 static struct vb2_ops cx8800_video_qops = { 581 .queue_setup = queue_setup, 582 .buf_prepare = buffer_prepare, 583 .buf_finish = buffer_finish, 584 .buf_queue = buffer_queue, 585 .wait_prepare = vb2_ops_wait_prepare, 586 .wait_finish = vb2_ops_wait_finish, 587 .start_streaming = start_streaming, 588 .stop_streaming = stop_streaming, 589 }; 590 591 /* ------------------------------------------------------------------ */ 592 593 static int radio_open(struct file *file) 594 { 595 struct cx8800_dev *dev = video_drvdata(file); 596 struct cx88_core *core = dev->core; 597 int ret = v4l2_fh_open(file); 598 599 if (ret) 600 return ret; 601 602 cx_write(MO_GP3_IO, core->board.radio.gpio3); 603 cx_write(MO_GP0_IO, core->board.radio.gpio0); 604 cx_write(MO_GP1_IO, core->board.radio.gpio1); 605 cx_write(MO_GP2_IO, core->board.radio.gpio2); 606 if (core->board.radio.audioroute) { 607 if (core->sd_wm8775) { 608 call_all(core, audio, s_routing, 609 core->board.radio.audioroute, 0, 0); 610 } 611 /* "I2S ADC mode" */ 612 core->tvaudio = WW_I2SADC; 613 cx88_set_tvaudio(core); 614 } else { 615 /* FM Mode */ 616 core->tvaudio = WW_FM; 617 cx88_set_tvaudio(core); 618 cx88_set_stereo(core, V4L2_TUNER_MODE_STEREO, 1); 619 } 620 call_all(core, tuner, s_radio); 621 return 0; 622 } 623 624 /* ------------------------------------------------------------------ */ 625 /* VIDEO CTRL IOCTLS */ 626 627 static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl) 628 { 629 struct cx88_core *core = 630 container_of(ctrl->handler, struct cx88_core, video_hdl); 631 const struct cx88_ctrl *cc = ctrl->priv; 632 u32 value, mask; 633 634 mask = cc->mask; 635 switch (ctrl->id) { 636 case V4L2_CID_SATURATION: 637 /* special v_sat handling */ 638 639 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask; 640 641 if (core->tvnorm & V4L2_STD_SECAM) { 642 /* For SECAM, both U and V sat should be equal */ 643 value = value << 8 | value; 644 } else { 645 /* Keeps U Saturation proportional to V Sat */ 646 value = (value * 0x5a) / 0x7f << 8 | value; 647 } 648 mask = 0xffff; 649 break; 650 case V4L2_CID_SHARPNESS: 651 /* 0b000, 0b100, 0b101, 0b110, or 0b111 */ 652 value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7)); 653 /* needs to be set for both fields */ 654 cx_andor(MO_FILTER_EVEN, mask, value); 655 break; 656 case V4L2_CID_CHROMA_AGC: 657 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask; 658 break; 659 default: 660 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask; 661 break; 662 } 663 dprintk(1, "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n", 664 ctrl->id, ctrl->name, ctrl->val, cc->reg, value, 665 mask, cc->sreg ? " [shadowed]" : ""); 666 if (cc->sreg) 667 cx_sandor(cc->sreg, cc->reg, mask, value); 668 else 669 cx_andor(cc->reg, mask, value); 670 return 0; 671 } 672 673 static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl) 674 { 675 struct cx88_core *core = 676 container_of(ctrl->handler, struct cx88_core, audio_hdl); 677 const struct cx88_ctrl *cc = ctrl->priv; 678 u32 value,mask; 679 680 /* Pass changes onto any WM8775 */ 681 if (core->sd_wm8775) { 682 switch (ctrl->id) { 683 case V4L2_CID_AUDIO_MUTE: 684 wm8775_s_ctrl(core, ctrl->id, ctrl->val); 685 break; 686 case V4L2_CID_AUDIO_VOLUME: 687 wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ? 688 (0x90 + ctrl->val) << 8 : 0); 689 break; 690 case V4L2_CID_AUDIO_BALANCE: 691 wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9); 692 break; 693 default: 694 break; 695 } 696 } 697 698 mask = cc->mask; 699 switch (ctrl->id) { 700 case V4L2_CID_AUDIO_BALANCE: 701 value = (ctrl->val < 0x40) ? (0x7f - ctrl->val) : (ctrl->val - 0x40); 702 break; 703 case V4L2_CID_AUDIO_VOLUME: 704 value = 0x3f - (ctrl->val & 0x3f); 705 break; 706 default: 707 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask; 708 break; 709 } 710 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n", 711 ctrl->id, ctrl->name, ctrl->val, cc->reg, value, 712 mask, cc->sreg ? " [shadowed]" : ""); 713 if (cc->sreg) 714 cx_sandor(cc->sreg, cc->reg, mask, value); 715 else 716 cx_andor(cc->reg, mask, value); 717 return 0; 718 } 719 720 /* ------------------------------------------------------------------ */ 721 /* VIDEO IOCTLS */ 722 723 static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, 724 struct v4l2_format *f) 725 { 726 struct cx8800_dev *dev = video_drvdata(file); 727 struct cx88_core *core = dev->core; 728 729 f->fmt.pix.width = core->width; 730 f->fmt.pix.height = core->height; 731 f->fmt.pix.field = core->field; 732 f->fmt.pix.pixelformat = dev->fmt->fourcc; 733 f->fmt.pix.bytesperline = 734 (f->fmt.pix.width * dev->fmt->depth) >> 3; 735 f->fmt.pix.sizeimage = 736 f->fmt.pix.height * f->fmt.pix.bytesperline; 737 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; 738 return 0; 739 } 740 741 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, 742 struct v4l2_format *f) 743 { 744 struct cx8800_dev *dev = video_drvdata(file); 745 struct cx88_core *core = dev->core; 746 const struct cx8800_fmt *fmt; 747 enum v4l2_field field; 748 unsigned int maxw, maxh; 749 750 fmt = format_by_fourcc(f->fmt.pix.pixelformat); 751 if (NULL == fmt) 752 return -EINVAL; 753 754 maxw = norm_maxw(core->tvnorm); 755 maxh = norm_maxh(core->tvnorm); 756 757 field = f->fmt.pix.field; 758 759 switch (field) { 760 case V4L2_FIELD_TOP: 761 case V4L2_FIELD_BOTTOM: 762 case V4L2_FIELD_INTERLACED: 763 case V4L2_FIELD_SEQ_BT: 764 case V4L2_FIELD_SEQ_TB: 765 break; 766 default: 767 field = (f->fmt.pix.height > maxh / 2) 768 ? V4L2_FIELD_INTERLACED 769 : V4L2_FIELD_BOTTOM; 770 break; 771 } 772 if (V4L2_FIELD_HAS_T_OR_B(field)) 773 maxh /= 2; 774 775 v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2, 776 &f->fmt.pix.height, 32, maxh, 0, 0); 777 f->fmt.pix.field = field; 778 f->fmt.pix.bytesperline = 779 (f->fmt.pix.width * fmt->depth) >> 3; 780 f->fmt.pix.sizeimage = 781 f->fmt.pix.height * f->fmt.pix.bytesperline; 782 783 return 0; 784 } 785 786 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, 787 struct v4l2_format *f) 788 { 789 struct cx8800_dev *dev = video_drvdata(file); 790 struct cx88_core *core = dev->core; 791 int err = vidioc_try_fmt_vid_cap (file,priv,f); 792 793 if (0 != err) 794 return err; 795 if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq)) 796 return -EBUSY; 797 if (core->dvbdev && vb2_is_busy(&core->dvbdev->vb2_mpegq)) 798 return -EBUSY; 799 dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat); 800 core->width = f->fmt.pix.width; 801 core->height = f->fmt.pix.height; 802 core->field = f->fmt.pix.field; 803 return 0; 804 } 805 806 void cx88_querycap(struct file *file, struct cx88_core *core, 807 struct v4l2_capability *cap) 808 { 809 struct video_device *vdev = video_devdata(file); 810 811 strlcpy(cap->card, core->board.name, sizeof(cap->card)); 812 cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; 813 if (UNSET != core->board.tuner_type) 814 cap->device_caps |= V4L2_CAP_TUNER; 815 switch (vdev->vfl_type) { 816 case VFL_TYPE_RADIO: 817 cap->device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER; 818 break; 819 case VFL_TYPE_GRABBER: 820 cap->device_caps |= V4L2_CAP_VIDEO_CAPTURE; 821 break; 822 case VFL_TYPE_VBI: 823 cap->device_caps |= V4L2_CAP_VBI_CAPTURE; 824 break; 825 } 826 cap->capabilities = cap->device_caps | V4L2_CAP_VIDEO_CAPTURE | 827 V4L2_CAP_VBI_CAPTURE | V4L2_CAP_DEVICE_CAPS; 828 if (core->board.radio.type == CX88_RADIO) 829 cap->capabilities |= V4L2_CAP_RADIO; 830 } 831 EXPORT_SYMBOL(cx88_querycap); 832 833 static int vidioc_querycap(struct file *file, void *priv, 834 struct v4l2_capability *cap) 835 { 836 struct cx8800_dev *dev = video_drvdata(file); 837 struct cx88_core *core = dev->core; 838 839 strcpy(cap->driver, "cx8800"); 840 sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci)); 841 cx88_querycap(file, core, cap); 842 return 0; 843 } 844 845 static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv, 846 struct v4l2_fmtdesc *f) 847 { 848 if (unlikely(f->index >= ARRAY_SIZE(formats))) 849 return -EINVAL; 850 851 strlcpy(f->description,formats[f->index].name,sizeof(f->description)); 852 f->pixelformat = formats[f->index].fourcc; 853 854 return 0; 855 } 856 857 static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm) 858 { 859 struct cx8800_dev *dev = video_drvdata(file); 860 struct cx88_core *core = dev->core; 861 862 *tvnorm = core->tvnorm; 863 return 0; 864 } 865 866 static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms) 867 { 868 struct cx8800_dev *dev = video_drvdata(file); 869 struct cx88_core *core = dev->core; 870 871 return cx88_set_tvnorm(core, tvnorms); 872 } 873 874 /* only one input in this sample driver */ 875 int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i) 876 { 877 static const char * const iname[] = { 878 [ CX88_VMUX_COMPOSITE1 ] = "Composite1", 879 [ CX88_VMUX_COMPOSITE2 ] = "Composite2", 880 [ CX88_VMUX_COMPOSITE3 ] = "Composite3", 881 [ CX88_VMUX_COMPOSITE4 ] = "Composite4", 882 [ CX88_VMUX_SVIDEO ] = "S-Video", 883 [ CX88_VMUX_TELEVISION ] = "Television", 884 [ CX88_VMUX_CABLE ] = "Cable TV", 885 [ CX88_VMUX_DVB ] = "DVB", 886 [ CX88_VMUX_DEBUG ] = "for debug only", 887 }; 888 unsigned int n = i->index; 889 890 if (n >= 4) 891 return -EINVAL; 892 if (0 == INPUT(n).type) 893 return -EINVAL; 894 i->type = V4L2_INPUT_TYPE_CAMERA; 895 strcpy(i->name,iname[INPUT(n).type]); 896 if ((CX88_VMUX_TELEVISION == INPUT(n).type) || 897 (CX88_VMUX_CABLE == INPUT(n).type)) { 898 i->type = V4L2_INPUT_TYPE_TUNER; 899 } 900 i->std = CX88_NORMS; 901 return 0; 902 } 903 EXPORT_SYMBOL(cx88_enum_input); 904 905 static int vidioc_enum_input (struct file *file, void *priv, 906 struct v4l2_input *i) 907 { 908 struct cx8800_dev *dev = video_drvdata(file); 909 struct cx88_core *core = dev->core; 910 return cx88_enum_input (core,i); 911 } 912 913 static int vidioc_g_input (struct file *file, void *priv, unsigned int *i) 914 { 915 struct cx8800_dev *dev = video_drvdata(file); 916 struct cx88_core *core = dev->core; 917 918 *i = core->input; 919 return 0; 920 } 921 922 static int vidioc_s_input (struct file *file, void *priv, unsigned int i) 923 { 924 struct cx8800_dev *dev = video_drvdata(file); 925 struct cx88_core *core = dev->core; 926 927 if (i >= 4) 928 return -EINVAL; 929 if (0 == INPUT(i).type) 930 return -EINVAL; 931 932 cx88_newstation(core); 933 cx88_video_mux(core,i); 934 return 0; 935 } 936 937 static int vidioc_g_tuner (struct file *file, void *priv, 938 struct v4l2_tuner *t) 939 { 940 struct cx8800_dev *dev = video_drvdata(file); 941 struct cx88_core *core = dev->core; 942 u32 reg; 943 944 if (unlikely(UNSET == core->board.tuner_type)) 945 return -EINVAL; 946 if (0 != t->index) 947 return -EINVAL; 948 949 strcpy(t->name, "Television"); 950 t->capability = V4L2_TUNER_CAP_NORM; 951 t->rangehigh = 0xffffffffUL; 952 call_all(core, tuner, g_tuner, t); 953 954 cx88_get_stereo(core ,t); 955 reg = cx_read(MO_DEVICE_STATUS); 956 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000; 957 return 0; 958 } 959 960 static int vidioc_s_tuner (struct file *file, void *priv, 961 const struct v4l2_tuner *t) 962 { 963 struct cx8800_dev *dev = video_drvdata(file); 964 struct cx88_core *core = dev->core; 965 966 if (UNSET == core->board.tuner_type) 967 return -EINVAL; 968 if (0 != t->index) 969 return -EINVAL; 970 971 cx88_set_stereo(core, t->audmode, 1); 972 return 0; 973 } 974 975 static int vidioc_g_frequency (struct file *file, void *priv, 976 struct v4l2_frequency *f) 977 { 978 struct cx8800_dev *dev = video_drvdata(file); 979 struct cx88_core *core = dev->core; 980 981 if (unlikely(UNSET == core->board.tuner_type)) 982 return -EINVAL; 983 if (f->tuner) 984 return -EINVAL; 985 986 f->frequency = core->freq; 987 988 call_all(core, tuner, g_frequency, f); 989 990 return 0; 991 } 992 993 int cx88_set_freq (struct cx88_core *core, 994 const struct v4l2_frequency *f) 995 { 996 struct v4l2_frequency new_freq = *f; 997 998 if (unlikely(UNSET == core->board.tuner_type)) 999 return -EINVAL; 1000 if (unlikely(f->tuner != 0)) 1001 return -EINVAL; 1002 1003 cx88_newstation(core); 1004 call_all(core, tuner, s_frequency, f); 1005 call_all(core, tuner, g_frequency, &new_freq); 1006 core->freq = new_freq.frequency; 1007 1008 /* When changing channels it is required to reset TVAUDIO */ 1009 msleep (10); 1010 cx88_set_tvaudio(core); 1011 1012 return 0; 1013 } 1014 EXPORT_SYMBOL(cx88_set_freq); 1015 1016 static int vidioc_s_frequency (struct file *file, void *priv, 1017 const struct v4l2_frequency *f) 1018 { 1019 struct cx8800_dev *dev = video_drvdata(file); 1020 struct cx88_core *core = dev->core; 1021 1022 return cx88_set_freq(core, f); 1023 } 1024 1025 #ifdef CONFIG_VIDEO_ADV_DEBUG 1026 static int vidioc_g_register (struct file *file, void *fh, 1027 struct v4l2_dbg_register *reg) 1028 { 1029 struct cx8800_dev *dev = video_drvdata(file); 1030 struct cx88_core *core = dev->core; 1031 1032 /* cx2388x has a 24-bit register space */ 1033 reg->val = cx_read(reg->reg & 0xfffffc); 1034 reg->size = 4; 1035 return 0; 1036 } 1037 1038 static int vidioc_s_register (struct file *file, void *fh, 1039 const struct v4l2_dbg_register *reg) 1040 { 1041 struct cx8800_dev *dev = video_drvdata(file); 1042 struct cx88_core *core = dev->core; 1043 1044 cx_write(reg->reg & 0xfffffc, reg->val); 1045 return 0; 1046 } 1047 #endif 1048 1049 /* ----------------------------------------------------------- */ 1050 /* RADIO ESPECIFIC IOCTLS */ 1051 /* ----------------------------------------------------------- */ 1052 1053 static int radio_g_tuner (struct file *file, void *priv, 1054 struct v4l2_tuner *t) 1055 { 1056 struct cx8800_dev *dev = video_drvdata(file); 1057 struct cx88_core *core = dev->core; 1058 1059 if (unlikely(t->index > 0)) 1060 return -EINVAL; 1061 1062 strcpy(t->name, "Radio"); 1063 1064 call_all(core, tuner, g_tuner, t); 1065 return 0; 1066 } 1067 1068 static int radio_s_tuner (struct file *file, void *priv, 1069 const struct v4l2_tuner *t) 1070 { 1071 struct cx8800_dev *dev = video_drvdata(file); 1072 struct cx88_core *core = dev->core; 1073 1074 if (0 != t->index) 1075 return -EINVAL; 1076 1077 call_all(core, tuner, s_tuner, t); 1078 return 0; 1079 } 1080 1081 /* ----------------------------------------------------------- */ 1082 1083 static const char *cx88_vid_irqs[32] = { 1084 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1", 1085 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2", 1086 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow", 1087 "y_sync", "u_sync", "v_sync", "vbi_sync", 1088 "opc_err", "par_err", "rip_err", "pci_abort", 1089 }; 1090 1091 static void cx8800_vid_irq(struct cx8800_dev *dev) 1092 { 1093 struct cx88_core *core = dev->core; 1094 u32 status, mask, count; 1095 1096 status = cx_read(MO_VID_INTSTAT); 1097 mask = cx_read(MO_VID_INTMSK); 1098 if (0 == (status & mask)) 1099 return; 1100 cx_write(MO_VID_INTSTAT, status); 1101 if (irq_debug || (status & mask & ~0xff)) 1102 cx88_print_irqbits(core->name, "irq vid", 1103 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs), 1104 status, mask); 1105 1106 /* risc op code error */ 1107 if (status & (1 << 16)) { 1108 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name); 1109 cx_clear(MO_VID_DMACNTRL, 0x11); 1110 cx_clear(VID_CAPTURE_CONTROL, 0x06); 1111 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]); 1112 } 1113 1114 /* risc1 y */ 1115 if (status & 0x01) { 1116 spin_lock(&dev->slock); 1117 count = cx_read(MO_VIDY_GPCNT); 1118 cx88_wakeup(core, &dev->vidq, count); 1119 spin_unlock(&dev->slock); 1120 } 1121 1122 /* risc1 vbi */ 1123 if (status & 0x08) { 1124 spin_lock(&dev->slock); 1125 count = cx_read(MO_VBI_GPCNT); 1126 cx88_wakeup(core, &dev->vbiq, count); 1127 spin_unlock(&dev->slock); 1128 } 1129 } 1130 1131 static irqreturn_t cx8800_irq(int irq, void *dev_id) 1132 { 1133 struct cx8800_dev *dev = dev_id; 1134 struct cx88_core *core = dev->core; 1135 u32 status; 1136 int loop, handled = 0; 1137 1138 for (loop = 0; loop < 10; loop++) { 1139 status = cx_read(MO_PCI_INTSTAT) & 1140 (core->pci_irqmask | PCI_INT_VIDINT); 1141 if (0 == status) 1142 goto out; 1143 cx_write(MO_PCI_INTSTAT, status); 1144 handled = 1; 1145 1146 if (status & core->pci_irqmask) 1147 cx88_core_irq(core,status); 1148 if (status & PCI_INT_VIDINT) 1149 cx8800_vid_irq(dev); 1150 } 1151 if (10 == loop) { 1152 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n", 1153 core->name); 1154 cx_write(MO_PCI_INTMSK,0); 1155 } 1156 1157 out: 1158 return IRQ_RETVAL(handled); 1159 } 1160 1161 /* ----------------------------------------------------------- */ 1162 /* exported stuff */ 1163 1164 static const struct v4l2_file_operations video_fops = 1165 { 1166 .owner = THIS_MODULE, 1167 .open = v4l2_fh_open, 1168 .release = vb2_fop_release, 1169 .read = vb2_fop_read, 1170 .poll = vb2_fop_poll, 1171 .mmap = vb2_fop_mmap, 1172 .unlocked_ioctl = video_ioctl2, 1173 }; 1174 1175 static const struct v4l2_ioctl_ops video_ioctl_ops = { 1176 .vidioc_querycap = vidioc_querycap, 1177 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, 1178 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, 1179 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, 1180 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, 1181 .vidioc_reqbufs = vb2_ioctl_reqbufs, 1182 .vidioc_querybuf = vb2_ioctl_querybuf, 1183 .vidioc_qbuf = vb2_ioctl_qbuf, 1184 .vidioc_dqbuf = vb2_ioctl_dqbuf, 1185 .vidioc_g_std = vidioc_g_std, 1186 .vidioc_s_std = vidioc_s_std, 1187 .vidioc_enum_input = vidioc_enum_input, 1188 .vidioc_g_input = vidioc_g_input, 1189 .vidioc_s_input = vidioc_s_input, 1190 .vidioc_streamon = vb2_ioctl_streamon, 1191 .vidioc_streamoff = vb2_ioctl_streamoff, 1192 .vidioc_g_tuner = vidioc_g_tuner, 1193 .vidioc_s_tuner = vidioc_s_tuner, 1194 .vidioc_g_frequency = vidioc_g_frequency, 1195 .vidioc_s_frequency = vidioc_s_frequency, 1196 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, 1197 .vidioc_unsubscribe_event = v4l2_event_unsubscribe, 1198 #ifdef CONFIG_VIDEO_ADV_DEBUG 1199 .vidioc_g_register = vidioc_g_register, 1200 .vidioc_s_register = vidioc_s_register, 1201 #endif 1202 }; 1203 1204 static const struct video_device cx8800_video_template = { 1205 .name = "cx8800-video", 1206 .fops = &video_fops, 1207 .ioctl_ops = &video_ioctl_ops, 1208 .tvnorms = CX88_NORMS, 1209 }; 1210 1211 static const struct v4l2_ioctl_ops vbi_ioctl_ops = { 1212 .vidioc_querycap = vidioc_querycap, 1213 .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt, 1214 .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt, 1215 .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt, 1216 .vidioc_reqbufs = vb2_ioctl_reqbufs, 1217 .vidioc_querybuf = vb2_ioctl_querybuf, 1218 .vidioc_qbuf = vb2_ioctl_qbuf, 1219 .vidioc_dqbuf = vb2_ioctl_dqbuf, 1220 .vidioc_g_std = vidioc_g_std, 1221 .vidioc_s_std = vidioc_s_std, 1222 .vidioc_enum_input = vidioc_enum_input, 1223 .vidioc_g_input = vidioc_g_input, 1224 .vidioc_s_input = vidioc_s_input, 1225 .vidioc_streamon = vb2_ioctl_streamon, 1226 .vidioc_streamoff = vb2_ioctl_streamoff, 1227 .vidioc_g_tuner = vidioc_g_tuner, 1228 .vidioc_s_tuner = vidioc_s_tuner, 1229 .vidioc_g_frequency = vidioc_g_frequency, 1230 .vidioc_s_frequency = vidioc_s_frequency, 1231 #ifdef CONFIG_VIDEO_ADV_DEBUG 1232 .vidioc_g_register = vidioc_g_register, 1233 .vidioc_s_register = vidioc_s_register, 1234 #endif 1235 }; 1236 1237 static const struct video_device cx8800_vbi_template = { 1238 .name = "cx8800-vbi", 1239 .fops = &video_fops, 1240 .ioctl_ops = &vbi_ioctl_ops, 1241 .tvnorms = CX88_NORMS, 1242 }; 1243 1244 static const struct v4l2_file_operations radio_fops = 1245 { 1246 .owner = THIS_MODULE, 1247 .open = radio_open, 1248 .poll = v4l2_ctrl_poll, 1249 .release = v4l2_fh_release, 1250 .unlocked_ioctl = video_ioctl2, 1251 }; 1252 1253 static const struct v4l2_ioctl_ops radio_ioctl_ops = { 1254 .vidioc_querycap = vidioc_querycap, 1255 .vidioc_g_tuner = radio_g_tuner, 1256 .vidioc_s_tuner = radio_s_tuner, 1257 .vidioc_g_frequency = vidioc_g_frequency, 1258 .vidioc_s_frequency = vidioc_s_frequency, 1259 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, 1260 .vidioc_unsubscribe_event = v4l2_event_unsubscribe, 1261 #ifdef CONFIG_VIDEO_ADV_DEBUG 1262 .vidioc_g_register = vidioc_g_register, 1263 .vidioc_s_register = vidioc_s_register, 1264 #endif 1265 }; 1266 1267 static const struct video_device cx8800_radio_template = { 1268 .name = "cx8800-radio", 1269 .fops = &radio_fops, 1270 .ioctl_ops = &radio_ioctl_ops, 1271 }; 1272 1273 static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = { 1274 .s_ctrl = cx8800_s_vid_ctrl, 1275 }; 1276 1277 static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = { 1278 .s_ctrl = cx8800_s_aud_ctrl, 1279 }; 1280 1281 /* ----------------------------------------------------------- */ 1282 1283 static void cx8800_unregister_video(struct cx8800_dev *dev) 1284 { 1285 if (dev->radio_dev) { 1286 if (video_is_registered(dev->radio_dev)) 1287 video_unregister_device(dev->radio_dev); 1288 else 1289 video_device_release(dev->radio_dev); 1290 dev->radio_dev = NULL; 1291 } 1292 if (dev->vbi_dev) { 1293 if (video_is_registered(dev->vbi_dev)) 1294 video_unregister_device(dev->vbi_dev); 1295 else 1296 video_device_release(dev->vbi_dev); 1297 dev->vbi_dev = NULL; 1298 } 1299 if (dev->video_dev) { 1300 if (video_is_registered(dev->video_dev)) 1301 video_unregister_device(dev->video_dev); 1302 else 1303 video_device_release(dev->video_dev); 1304 dev->video_dev = NULL; 1305 } 1306 } 1307 1308 static int cx8800_initdev(struct pci_dev *pci_dev, 1309 const struct pci_device_id *pci_id) 1310 { 1311 struct cx8800_dev *dev; 1312 struct cx88_core *core; 1313 struct vb2_queue *q; 1314 int err; 1315 int i; 1316 1317 dev = kzalloc(sizeof(*dev),GFP_KERNEL); 1318 if (NULL == dev) 1319 return -ENOMEM; 1320 1321 /* pci init */ 1322 dev->pci = pci_dev; 1323 if (pci_enable_device(pci_dev)) { 1324 err = -EIO; 1325 goto fail_free; 1326 } 1327 core = cx88_core_get(dev->pci); 1328 if (NULL == core) { 1329 err = -EINVAL; 1330 goto fail_free; 1331 } 1332 dev->core = core; 1333 1334 /* print pci info */ 1335 dev->pci_rev = pci_dev->revision; 1336 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat); 1337 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, " 1338 "latency: %d, mmio: 0x%llx\n", core->name, 1339 pci_name(pci_dev), dev->pci_rev, pci_dev->irq, 1340 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0)); 1341 1342 pci_set_master(pci_dev); 1343 if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) { 1344 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name); 1345 err = -EIO; 1346 goto fail_core; 1347 } 1348 1349 /* initialize driver struct */ 1350 spin_lock_init(&dev->slock); 1351 1352 /* init video dma queues */ 1353 INIT_LIST_HEAD(&dev->vidq.active); 1354 1355 /* init vbi dma queues */ 1356 INIT_LIST_HEAD(&dev->vbiq.active); 1357 1358 /* get irq */ 1359 err = request_irq(pci_dev->irq, cx8800_irq, 1360 IRQF_SHARED, core->name, dev); 1361 if (err < 0) { 1362 printk(KERN_ERR "%s/0: can't get IRQ %d\n", 1363 core->name,pci_dev->irq); 1364 goto fail_core; 1365 } 1366 cx_set(MO_PCI_INTMSK, core->pci_irqmask); 1367 1368 for (i = 0; i < CX8800_AUD_CTLS; i++) { 1369 const struct cx88_ctrl *cc = &cx8800_aud_ctls[i]; 1370 struct v4l2_ctrl *vc; 1371 1372 vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops, 1373 cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value); 1374 if (vc == NULL) { 1375 err = core->audio_hdl.error; 1376 goto fail_core; 1377 } 1378 vc->priv = (void *)cc; 1379 } 1380 1381 for (i = 0; i < CX8800_VID_CTLS; i++) { 1382 const struct cx88_ctrl *cc = &cx8800_vid_ctls[i]; 1383 struct v4l2_ctrl *vc; 1384 1385 vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops, 1386 cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value); 1387 if (vc == NULL) { 1388 err = core->video_hdl.error; 1389 goto fail_core; 1390 } 1391 vc->priv = (void *)cc; 1392 if (vc->id == V4L2_CID_CHROMA_AGC) 1393 core->chroma_agc = vc; 1394 } 1395 v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL); 1396 1397 /* load and configure helper modules */ 1398 1399 if (core->board.audio_chip == CX88_AUDIO_WM8775) { 1400 struct i2c_board_info wm8775_info = { 1401 .type = "wm8775", 1402 .addr = 0x36 >> 1, 1403 .platform_data = &core->wm8775_data, 1404 }; 1405 struct v4l2_subdev *sd; 1406 1407 if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1) 1408 core->wm8775_data.is_nova_s = true; 1409 else 1410 core->wm8775_data.is_nova_s = false; 1411 1412 sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap, 1413 &wm8775_info, NULL); 1414 if (sd != NULL) { 1415 core->sd_wm8775 = sd; 1416 sd->grp_id = WM8775_GID; 1417 } 1418 } 1419 1420 if (core->board.audio_chip == CX88_AUDIO_TVAUDIO) { 1421 /* This probes for a tda9874 as is used on some 1422 Pixelview Ultra boards. */ 1423 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap, 1424 "tvaudio", 0, I2C_ADDRS(0xb0 >> 1)); 1425 } 1426 1427 switch (core->boardnr) { 1428 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD: 1429 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: { 1430 static const struct i2c_board_info rtc_info = { 1431 I2C_BOARD_INFO("isl1208", 0x6f) 1432 }; 1433 1434 request_module("rtc-isl1208"); 1435 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info); 1436 } 1437 /* break intentionally omitted */ 1438 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO: 1439 request_module("ir-kbd-i2c"); 1440 } 1441 1442 /* Sets device info at pci_dev */ 1443 pci_set_drvdata(pci_dev, dev); 1444 1445 dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24); 1446 1447 /* Maintain a reference so cx88-blackbird can query the 8800 device. */ 1448 core->v4ldev = dev; 1449 1450 /* initial device configuration */ 1451 mutex_lock(&core->lock); 1452 cx88_set_tvnorm(core, core->tvnorm); 1453 v4l2_ctrl_handler_setup(&core->video_hdl); 1454 v4l2_ctrl_handler_setup(&core->audio_hdl); 1455 cx88_video_mux(core, 0); 1456 1457 q = &dev->vb2_vidq; 1458 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1459 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; 1460 q->gfp_flags = GFP_DMA32; 1461 q->min_buffers_needed = 2; 1462 q->drv_priv = dev; 1463 q->buf_struct_size = sizeof(struct cx88_buffer); 1464 q->ops = &cx8800_video_qops; 1465 q->mem_ops = &vb2_dma_sg_memops; 1466 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; 1467 q->lock = &core->lock; 1468 1469 err = vb2_queue_init(q); 1470 if (err < 0) 1471 goto fail_unreg; 1472 1473 q = &dev->vb2_vbiq; 1474 q->type = V4L2_BUF_TYPE_VBI_CAPTURE; 1475 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; 1476 q->gfp_flags = GFP_DMA32; 1477 q->min_buffers_needed = 2; 1478 q->drv_priv = dev; 1479 q->buf_struct_size = sizeof(struct cx88_buffer); 1480 q->ops = &cx8800_vbi_qops; 1481 q->mem_ops = &vb2_dma_sg_memops; 1482 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; 1483 q->lock = &core->lock; 1484 1485 err = vb2_queue_init(q); 1486 if (err < 0) 1487 goto fail_unreg; 1488 1489 /* register v4l devices */ 1490 dev->video_dev = cx88_vdev_init(core,dev->pci, 1491 &cx8800_video_template,"video"); 1492 video_set_drvdata(dev->video_dev, dev); 1493 dev->video_dev->ctrl_handler = &core->video_hdl; 1494 dev->video_dev->queue = &dev->vb2_vidq; 1495 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER, 1496 video_nr[core->nr]); 1497 if (err < 0) { 1498 printk(KERN_ERR "%s/0: can't register video device\n", 1499 core->name); 1500 goto fail_unreg; 1501 } 1502 printk(KERN_INFO "%s/0: registered device %s [v4l2]\n", 1503 core->name, video_device_node_name(dev->video_dev)); 1504 1505 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi"); 1506 video_set_drvdata(dev->vbi_dev, dev); 1507 dev->vbi_dev->queue = &dev->vb2_vbiq; 1508 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI, 1509 vbi_nr[core->nr]); 1510 if (err < 0) { 1511 printk(KERN_ERR "%s/0: can't register vbi device\n", 1512 core->name); 1513 goto fail_unreg; 1514 } 1515 printk(KERN_INFO "%s/0: registered device %s\n", 1516 core->name, video_device_node_name(dev->vbi_dev)); 1517 1518 if (core->board.radio.type == CX88_RADIO) { 1519 dev->radio_dev = cx88_vdev_init(core,dev->pci, 1520 &cx8800_radio_template,"radio"); 1521 video_set_drvdata(dev->radio_dev, dev); 1522 dev->radio_dev->ctrl_handler = &core->audio_hdl; 1523 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO, 1524 radio_nr[core->nr]); 1525 if (err < 0) { 1526 printk(KERN_ERR "%s/0: can't register radio device\n", 1527 core->name); 1528 goto fail_unreg; 1529 } 1530 printk(KERN_INFO "%s/0: registered device %s\n", 1531 core->name, video_device_node_name(dev->radio_dev)); 1532 } 1533 1534 /* start tvaudio thread */ 1535 if (core->board.tuner_type != UNSET) { 1536 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio"); 1537 if (IS_ERR(core->kthread)) { 1538 err = PTR_ERR(core->kthread); 1539 printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n", 1540 core->name, err); 1541 } 1542 } 1543 mutex_unlock(&core->lock); 1544 1545 return 0; 1546 1547 fail_unreg: 1548 cx8800_unregister_video(dev); 1549 free_irq(pci_dev->irq, dev); 1550 mutex_unlock(&core->lock); 1551 fail_core: 1552 core->v4ldev = NULL; 1553 cx88_core_put(core,dev->pci); 1554 fail_free: 1555 kfree(dev); 1556 return err; 1557 } 1558 1559 static void cx8800_finidev(struct pci_dev *pci_dev) 1560 { 1561 struct cx8800_dev *dev = pci_get_drvdata(pci_dev); 1562 struct cx88_core *core = dev->core; 1563 1564 /* stop thread */ 1565 if (core->kthread) { 1566 kthread_stop(core->kthread); 1567 core->kthread = NULL; 1568 } 1569 1570 if (core->ir) 1571 cx88_ir_stop(core); 1572 1573 cx88_shutdown(core); /* FIXME */ 1574 1575 /* unregister stuff */ 1576 1577 free_irq(pci_dev->irq, dev); 1578 cx8800_unregister_video(dev); 1579 pci_disable_device(pci_dev); 1580 1581 core->v4ldev = NULL; 1582 1583 /* free memory */ 1584 cx88_core_put(core,dev->pci); 1585 kfree(dev); 1586 } 1587 1588 #ifdef CONFIG_PM 1589 static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state) 1590 { 1591 struct cx8800_dev *dev = pci_get_drvdata(pci_dev); 1592 struct cx88_core *core = dev->core; 1593 unsigned long flags; 1594 1595 /* stop video+vbi capture */ 1596 spin_lock_irqsave(&dev->slock, flags); 1597 if (!list_empty(&dev->vidq.active)) { 1598 printk("%s/0: suspend video\n", core->name); 1599 stop_video_dma(dev); 1600 } 1601 if (!list_empty(&dev->vbiq.active)) { 1602 printk("%s/0: suspend vbi\n", core->name); 1603 cx8800_stop_vbi_dma(dev); 1604 } 1605 spin_unlock_irqrestore(&dev->slock, flags); 1606 1607 if (core->ir) 1608 cx88_ir_stop(core); 1609 /* FIXME -- shutdown device */ 1610 cx88_shutdown(core); 1611 1612 pci_save_state(pci_dev); 1613 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) { 1614 pci_disable_device(pci_dev); 1615 dev->state.disabled = 1; 1616 } 1617 return 0; 1618 } 1619 1620 static int cx8800_resume(struct pci_dev *pci_dev) 1621 { 1622 struct cx8800_dev *dev = pci_get_drvdata(pci_dev); 1623 struct cx88_core *core = dev->core; 1624 unsigned long flags; 1625 int err; 1626 1627 if (dev->state.disabled) { 1628 err=pci_enable_device(pci_dev); 1629 if (err) { 1630 printk(KERN_ERR "%s/0: can't enable device\n", 1631 core->name); 1632 return err; 1633 } 1634 1635 dev->state.disabled = 0; 1636 } 1637 err= pci_set_power_state(pci_dev, PCI_D0); 1638 if (err) { 1639 printk(KERN_ERR "%s/0: can't set power state\n", core->name); 1640 pci_disable_device(pci_dev); 1641 dev->state.disabled = 1; 1642 1643 return err; 1644 } 1645 pci_restore_state(pci_dev); 1646 1647 /* FIXME: re-initialize hardware */ 1648 cx88_reset(core); 1649 if (core->ir) 1650 cx88_ir_start(core); 1651 1652 cx_set(MO_PCI_INTMSK, core->pci_irqmask); 1653 1654 /* restart video+vbi capture */ 1655 spin_lock_irqsave(&dev->slock, flags); 1656 if (!list_empty(&dev->vidq.active)) { 1657 printk("%s/0: resume video\n", core->name); 1658 restart_video_queue(dev,&dev->vidq); 1659 } 1660 if (!list_empty(&dev->vbiq.active)) { 1661 printk("%s/0: resume vbi\n", core->name); 1662 cx8800_restart_vbi_queue(dev,&dev->vbiq); 1663 } 1664 spin_unlock_irqrestore(&dev->slock, flags); 1665 1666 return 0; 1667 } 1668 #endif 1669 1670 /* ----------------------------------------------------------- */ 1671 1672 static const struct pci_device_id cx8800_pci_tbl[] = { 1673 { 1674 .vendor = 0x14f1, 1675 .device = 0x8800, 1676 .subvendor = PCI_ANY_ID, 1677 .subdevice = PCI_ANY_ID, 1678 },{ 1679 /* --- end of list --- */ 1680 } 1681 }; 1682 MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl); 1683 1684 static struct pci_driver cx8800_pci_driver = { 1685 .name = "cx8800", 1686 .id_table = cx8800_pci_tbl, 1687 .probe = cx8800_initdev, 1688 .remove = cx8800_finidev, 1689 #ifdef CONFIG_PM 1690 .suspend = cx8800_suspend, 1691 .resume = cx8800_resume, 1692 #endif 1693 }; 1694 1695 module_pci_driver(cx8800_pci_driver); 1696