1b23e4fc4SChunyan Zhang // SPDX-License-Identifier: GPL-2.0-only
2b23e4fc4SChunyan Zhang /*
3b23e4fc4SChunyan Zhang * Unisoc IOMMU driver
4b23e4fc4SChunyan Zhang *
5b23e4fc4SChunyan Zhang * Copyright (C) 2020 Unisoc, Inc.
6b23e4fc4SChunyan Zhang * Author: Chunyan Zhang <chunyan.zhang@unisoc.com>
7b23e4fc4SChunyan Zhang */
8b23e4fc4SChunyan Zhang
9b23e4fc4SChunyan Zhang #include <linux/clk.h>
10b23e4fc4SChunyan Zhang #include <linux/device.h>
11b23e4fc4SChunyan Zhang #include <linux/dma-mapping.h>
12b23e4fc4SChunyan Zhang #include <linux/errno.h>
13b23e4fc4SChunyan Zhang #include <linux/iommu.h>
14b23e4fc4SChunyan Zhang #include <linux/mfd/syscon.h>
15b23e4fc4SChunyan Zhang #include <linux/module.h>
16b23e4fc4SChunyan Zhang #include <linux/of_platform.h>
17d477f603SRob Herring #include <linux/platform_device.h>
18b23e4fc4SChunyan Zhang #include <linux/regmap.h>
19b23e4fc4SChunyan Zhang #include <linux/slab.h>
20b23e4fc4SChunyan Zhang
21b23e4fc4SChunyan Zhang #define SPRD_IOMMU_PAGE_SHIFT 12
22b23e4fc4SChunyan Zhang #define SPRD_IOMMU_PAGE_SIZE SZ_4K
23b23e4fc4SChunyan Zhang
24b23e4fc4SChunyan Zhang #define SPRD_EX_CFG 0x0
25b23e4fc4SChunyan Zhang #define SPRD_IOMMU_VAOR_BYPASS BIT(4)
26b23e4fc4SChunyan Zhang #define SPRD_IOMMU_GATE_EN BIT(1)
27b23e4fc4SChunyan Zhang #define SPRD_IOMMU_EN BIT(0)
28b23e4fc4SChunyan Zhang #define SPRD_EX_UPDATE 0x4
29b23e4fc4SChunyan Zhang #define SPRD_EX_FIRST_VPN 0x8
30b23e4fc4SChunyan Zhang #define SPRD_EX_VPN_RANGE 0xc
31b23e4fc4SChunyan Zhang #define SPRD_EX_FIRST_PPN 0x10
32b23e4fc4SChunyan Zhang #define SPRD_EX_DEFAULT_PPN 0x14
33b23e4fc4SChunyan Zhang
34b23e4fc4SChunyan Zhang #define SPRD_IOMMU_VERSION 0x0
35b23e4fc4SChunyan Zhang #define SPRD_VERSION_MASK GENMASK(15, 8)
36b23e4fc4SChunyan Zhang #define SPRD_VERSION_SHIFT 0x8
37b23e4fc4SChunyan Zhang #define SPRD_VAU_CFG 0x4
38b23e4fc4SChunyan Zhang #define SPRD_VAU_UPDATE 0x8
39b23e4fc4SChunyan Zhang #define SPRD_VAU_AUTH_CFG 0xc
40b23e4fc4SChunyan Zhang #define SPRD_VAU_FIRST_PPN 0x10
41b23e4fc4SChunyan Zhang #define SPRD_VAU_DEFAULT_PPN_RD 0x14
42b23e4fc4SChunyan Zhang #define SPRD_VAU_DEFAULT_PPN_WR 0x18
43b23e4fc4SChunyan Zhang #define SPRD_VAU_FIRST_VPN 0x1c
44b23e4fc4SChunyan Zhang #define SPRD_VAU_VPN_RANGE 0x20
45b23e4fc4SChunyan Zhang
46b23e4fc4SChunyan Zhang enum sprd_iommu_version {
47b23e4fc4SChunyan Zhang SPRD_IOMMU_EX,
48b23e4fc4SChunyan Zhang SPRD_IOMMU_VAU,
49b23e4fc4SChunyan Zhang };
50b23e4fc4SChunyan Zhang
51b23e4fc4SChunyan Zhang /*
52b23e4fc4SChunyan Zhang * struct sprd_iommu_device - high-level sprd IOMMU device representation,
53b23e4fc4SChunyan Zhang * including hardware information and configuration, also driver data, etc
54b23e4fc4SChunyan Zhang *
55b23e4fc4SChunyan Zhang * @ver: sprd IOMMU IP version
56b23e4fc4SChunyan Zhang * @prot_page_va: protect page base virtual address
57b23e4fc4SChunyan Zhang * @prot_page_pa: protect page base physical address, data would be
58b23e4fc4SChunyan Zhang * written to here while translation fault
59b23e4fc4SChunyan Zhang * @base: mapped base address for accessing registers
60b23e4fc4SChunyan Zhang * @dev: pointer to basic device structure
61b23e4fc4SChunyan Zhang * @iommu: IOMMU core representation
62b23e4fc4SChunyan Zhang * @group: IOMMU group
63b23e4fc4SChunyan Zhang * @eb: gate clock which controls IOMMU access
64b23e4fc4SChunyan Zhang */
65b23e4fc4SChunyan Zhang struct sprd_iommu_device {
66816c698cSChunyan Zhang struct sprd_iommu_domain *dom;
67b23e4fc4SChunyan Zhang enum sprd_iommu_version ver;
68b23e4fc4SChunyan Zhang u32 *prot_page_va;
69b23e4fc4SChunyan Zhang dma_addr_t prot_page_pa;
70b23e4fc4SChunyan Zhang void __iomem *base;
71b23e4fc4SChunyan Zhang struct device *dev;
72b23e4fc4SChunyan Zhang struct iommu_device iommu;
73b23e4fc4SChunyan Zhang struct clk *eb;
74b23e4fc4SChunyan Zhang };
75b23e4fc4SChunyan Zhang
76b23e4fc4SChunyan Zhang struct sprd_iommu_domain {
77b23e4fc4SChunyan Zhang spinlock_t pgtlock; /* lock for page table */
78b23e4fc4SChunyan Zhang struct iommu_domain domain;
79b23e4fc4SChunyan Zhang u32 *pgt_va; /* page table virtual address base */
80b23e4fc4SChunyan Zhang dma_addr_t pgt_pa; /* page table physical address base */
81b23e4fc4SChunyan Zhang struct sprd_iommu_device *sdev;
82b23e4fc4SChunyan Zhang };
83b23e4fc4SChunyan Zhang
84b23e4fc4SChunyan Zhang static const struct iommu_ops sprd_iommu_ops;
85b23e4fc4SChunyan Zhang
to_sprd_domain(struct iommu_domain * dom)86b23e4fc4SChunyan Zhang static struct sprd_iommu_domain *to_sprd_domain(struct iommu_domain *dom)
87b23e4fc4SChunyan Zhang {
88b23e4fc4SChunyan Zhang return container_of(dom, struct sprd_iommu_domain, domain);
89b23e4fc4SChunyan Zhang }
90b23e4fc4SChunyan Zhang
91b23e4fc4SChunyan Zhang static inline void
sprd_iommu_write(struct sprd_iommu_device * sdev,unsigned int reg,u32 val)92b23e4fc4SChunyan Zhang sprd_iommu_write(struct sprd_iommu_device *sdev, unsigned int reg, u32 val)
93b23e4fc4SChunyan Zhang {
94b23e4fc4SChunyan Zhang writel_relaxed(val, sdev->base + reg);
95b23e4fc4SChunyan Zhang }
96b23e4fc4SChunyan Zhang
97b23e4fc4SChunyan Zhang static inline u32
sprd_iommu_read(struct sprd_iommu_device * sdev,unsigned int reg)98b23e4fc4SChunyan Zhang sprd_iommu_read(struct sprd_iommu_device *sdev, unsigned int reg)
99b23e4fc4SChunyan Zhang {
100b23e4fc4SChunyan Zhang return readl_relaxed(sdev->base + reg);
101b23e4fc4SChunyan Zhang }
102b23e4fc4SChunyan Zhang
103b23e4fc4SChunyan Zhang static inline void
sprd_iommu_update_bits(struct sprd_iommu_device * sdev,unsigned int reg,u32 mask,u32 shift,u32 val)104b23e4fc4SChunyan Zhang sprd_iommu_update_bits(struct sprd_iommu_device *sdev, unsigned int reg,
105b23e4fc4SChunyan Zhang u32 mask, u32 shift, u32 val)
106b23e4fc4SChunyan Zhang {
107b23e4fc4SChunyan Zhang u32 t = sprd_iommu_read(sdev, reg);
108b23e4fc4SChunyan Zhang
109b23e4fc4SChunyan Zhang t = (t & (~(mask << shift))) | ((val & mask) << shift);
110b23e4fc4SChunyan Zhang sprd_iommu_write(sdev, reg, t);
111b23e4fc4SChunyan Zhang }
112b23e4fc4SChunyan Zhang
113b23e4fc4SChunyan Zhang static inline int
sprd_iommu_get_version(struct sprd_iommu_device * sdev)114b23e4fc4SChunyan Zhang sprd_iommu_get_version(struct sprd_iommu_device *sdev)
115b23e4fc4SChunyan Zhang {
116b23e4fc4SChunyan Zhang int ver = (sprd_iommu_read(sdev, SPRD_IOMMU_VERSION) &
117b23e4fc4SChunyan Zhang SPRD_VERSION_MASK) >> SPRD_VERSION_SHIFT;
118b23e4fc4SChunyan Zhang
119b23e4fc4SChunyan Zhang switch (ver) {
120b23e4fc4SChunyan Zhang case SPRD_IOMMU_EX:
121b23e4fc4SChunyan Zhang case SPRD_IOMMU_VAU:
122b23e4fc4SChunyan Zhang return ver;
123b23e4fc4SChunyan Zhang default:
124b23e4fc4SChunyan Zhang return -EINVAL;
125b23e4fc4SChunyan Zhang }
126b23e4fc4SChunyan Zhang }
127b23e4fc4SChunyan Zhang
128b23e4fc4SChunyan Zhang static size_t
sprd_iommu_pgt_size(struct iommu_domain * domain)129b23e4fc4SChunyan Zhang sprd_iommu_pgt_size(struct iommu_domain *domain)
130b23e4fc4SChunyan Zhang {
131b23e4fc4SChunyan Zhang return ((domain->geometry.aperture_end -
132b23e4fc4SChunyan Zhang domain->geometry.aperture_start + 1) >>
133b23e4fc4SChunyan Zhang SPRD_IOMMU_PAGE_SHIFT) * sizeof(u32);
134b23e4fc4SChunyan Zhang }
135b23e4fc4SChunyan Zhang
sprd_iommu_domain_alloc_paging(struct device * dev)1363529375eSJason Gunthorpe static struct iommu_domain *sprd_iommu_domain_alloc_paging(struct device *dev)
137b23e4fc4SChunyan Zhang {
138b23e4fc4SChunyan Zhang struct sprd_iommu_domain *dom;
139b23e4fc4SChunyan Zhang
140b23e4fc4SChunyan Zhang dom = kzalloc(sizeof(*dom), GFP_KERNEL);
141b23e4fc4SChunyan Zhang if (!dom)
142b23e4fc4SChunyan Zhang return NULL;
143b23e4fc4SChunyan Zhang
144b23e4fc4SChunyan Zhang spin_lock_init(&dom->pgtlock);
145b23e4fc4SChunyan Zhang
146b23e4fc4SChunyan Zhang dom->domain.geometry.aperture_start = 0;
147b23e4fc4SChunyan Zhang dom->domain.geometry.aperture_end = SZ_256M - 1;
148d48a5128SJason Gunthorpe dom->domain.geometry.force_aperture = true;
149b23e4fc4SChunyan Zhang
150b23e4fc4SChunyan Zhang return &dom->domain;
151b23e4fc4SChunyan Zhang }
152b23e4fc4SChunyan Zhang
sprd_iommu_first_vpn(struct sprd_iommu_domain * dom)153b23e4fc4SChunyan Zhang static void sprd_iommu_first_vpn(struct sprd_iommu_domain *dom)
154b23e4fc4SChunyan Zhang {
155b23e4fc4SChunyan Zhang struct sprd_iommu_device *sdev = dom->sdev;
156b23e4fc4SChunyan Zhang u32 val;
157b23e4fc4SChunyan Zhang unsigned int reg;
158b23e4fc4SChunyan Zhang
159b23e4fc4SChunyan Zhang if (sdev->ver == SPRD_IOMMU_EX)
160b23e4fc4SChunyan Zhang reg = SPRD_EX_FIRST_VPN;
161b23e4fc4SChunyan Zhang else
162b23e4fc4SChunyan Zhang reg = SPRD_VAU_FIRST_VPN;
163b23e4fc4SChunyan Zhang
164b23e4fc4SChunyan Zhang val = dom->domain.geometry.aperture_start >> SPRD_IOMMU_PAGE_SHIFT;
165b23e4fc4SChunyan Zhang sprd_iommu_write(sdev, reg, val);
166b23e4fc4SChunyan Zhang }
167b23e4fc4SChunyan Zhang
sprd_iommu_vpn_range(struct sprd_iommu_domain * dom)168b23e4fc4SChunyan Zhang static void sprd_iommu_vpn_range(struct sprd_iommu_domain *dom)
169b23e4fc4SChunyan Zhang {
170b23e4fc4SChunyan Zhang struct sprd_iommu_device *sdev = dom->sdev;
171b23e4fc4SChunyan Zhang u32 val;
172b23e4fc4SChunyan Zhang unsigned int reg;
173b23e4fc4SChunyan Zhang
174b23e4fc4SChunyan Zhang if (sdev->ver == SPRD_IOMMU_EX)
175b23e4fc4SChunyan Zhang reg = SPRD_EX_VPN_RANGE;
176b23e4fc4SChunyan Zhang else
177b23e4fc4SChunyan Zhang reg = SPRD_VAU_VPN_RANGE;
178b23e4fc4SChunyan Zhang
179b23e4fc4SChunyan Zhang val = (dom->domain.geometry.aperture_end -
180b23e4fc4SChunyan Zhang dom->domain.geometry.aperture_start) >> SPRD_IOMMU_PAGE_SHIFT;
181b23e4fc4SChunyan Zhang sprd_iommu_write(sdev, reg, val);
182b23e4fc4SChunyan Zhang }
183b23e4fc4SChunyan Zhang
sprd_iommu_first_ppn(struct sprd_iommu_domain * dom)184b23e4fc4SChunyan Zhang static void sprd_iommu_first_ppn(struct sprd_iommu_domain *dom)
185b23e4fc4SChunyan Zhang {
186b23e4fc4SChunyan Zhang u32 val = dom->pgt_pa >> SPRD_IOMMU_PAGE_SHIFT;
187b23e4fc4SChunyan Zhang struct sprd_iommu_device *sdev = dom->sdev;
188b23e4fc4SChunyan Zhang unsigned int reg;
189b23e4fc4SChunyan Zhang
190b23e4fc4SChunyan Zhang if (sdev->ver == SPRD_IOMMU_EX)
191b23e4fc4SChunyan Zhang reg = SPRD_EX_FIRST_PPN;
192b23e4fc4SChunyan Zhang else
193b23e4fc4SChunyan Zhang reg = SPRD_VAU_FIRST_PPN;
194b23e4fc4SChunyan Zhang
195b23e4fc4SChunyan Zhang sprd_iommu_write(sdev, reg, val);
196b23e4fc4SChunyan Zhang }
197b23e4fc4SChunyan Zhang
sprd_iommu_default_ppn(struct sprd_iommu_device * sdev)198b23e4fc4SChunyan Zhang static void sprd_iommu_default_ppn(struct sprd_iommu_device *sdev)
199b23e4fc4SChunyan Zhang {
200b23e4fc4SChunyan Zhang u32 val = sdev->prot_page_pa >> SPRD_IOMMU_PAGE_SHIFT;
201b23e4fc4SChunyan Zhang
202b23e4fc4SChunyan Zhang if (sdev->ver == SPRD_IOMMU_EX) {
203b23e4fc4SChunyan Zhang sprd_iommu_write(sdev, SPRD_EX_DEFAULT_PPN, val);
204b23e4fc4SChunyan Zhang } else if (sdev->ver == SPRD_IOMMU_VAU) {
205b23e4fc4SChunyan Zhang sprd_iommu_write(sdev, SPRD_VAU_DEFAULT_PPN_RD, val);
206b23e4fc4SChunyan Zhang sprd_iommu_write(sdev, SPRD_VAU_DEFAULT_PPN_WR, val);
207b23e4fc4SChunyan Zhang }
208b23e4fc4SChunyan Zhang }
209b23e4fc4SChunyan Zhang
sprd_iommu_hw_en(struct sprd_iommu_device * sdev,bool en)210b23e4fc4SChunyan Zhang static void sprd_iommu_hw_en(struct sprd_iommu_device *sdev, bool en)
211b23e4fc4SChunyan Zhang {
212b23e4fc4SChunyan Zhang unsigned int reg_cfg;
213b23e4fc4SChunyan Zhang u32 mask, val;
214b23e4fc4SChunyan Zhang
215b23e4fc4SChunyan Zhang if (sdev->ver == SPRD_IOMMU_EX)
216b23e4fc4SChunyan Zhang reg_cfg = SPRD_EX_CFG;
217b23e4fc4SChunyan Zhang else
218b23e4fc4SChunyan Zhang reg_cfg = SPRD_VAU_CFG;
219b23e4fc4SChunyan Zhang
220b23e4fc4SChunyan Zhang mask = SPRD_IOMMU_EN | SPRD_IOMMU_GATE_EN;
221b23e4fc4SChunyan Zhang val = en ? mask : 0;
222b23e4fc4SChunyan Zhang sprd_iommu_update_bits(sdev, reg_cfg, mask, 0, val);
223b23e4fc4SChunyan Zhang }
224b23e4fc4SChunyan Zhang
sprd_iommu_cleanup(struct sprd_iommu_domain * dom)2259afea573SChunyan Zhang static void sprd_iommu_cleanup(struct sprd_iommu_domain *dom)
2269afea573SChunyan Zhang {
2279afea573SChunyan Zhang size_t pgt_size;
2289afea573SChunyan Zhang
2299afea573SChunyan Zhang /* Nothing need to do if the domain hasn't been attached */
2309afea573SChunyan Zhang if (!dom->sdev)
2319afea573SChunyan Zhang return;
2329afea573SChunyan Zhang
2339afea573SChunyan Zhang pgt_size = sprd_iommu_pgt_size(&dom->domain);
2349afea573SChunyan Zhang dma_free_coherent(dom->sdev->dev, pgt_size, dom->pgt_va, dom->pgt_pa);
2359afea573SChunyan Zhang sprd_iommu_hw_en(dom->sdev, false);
236*630482eeSArtem Chernyshev dom->sdev = NULL;
2379afea573SChunyan Zhang }
2389afea573SChunyan Zhang
sprd_iommu_domain_free(struct iommu_domain * domain)2399afea573SChunyan Zhang static void sprd_iommu_domain_free(struct iommu_domain *domain)
2409afea573SChunyan Zhang {
2419afea573SChunyan Zhang struct sprd_iommu_domain *dom = to_sprd_domain(domain);
2429afea573SChunyan Zhang
2439afea573SChunyan Zhang sprd_iommu_cleanup(dom);
2449afea573SChunyan Zhang kfree(dom);
2459afea573SChunyan Zhang }
2469afea573SChunyan Zhang
sprd_iommu_attach_device(struct iommu_domain * domain,struct device * dev)247b23e4fc4SChunyan Zhang static int sprd_iommu_attach_device(struct iommu_domain *domain,
248b23e4fc4SChunyan Zhang struct device *dev)
249b23e4fc4SChunyan Zhang {
250b23e4fc4SChunyan Zhang struct sprd_iommu_device *sdev = dev_iommu_priv_get(dev);
251b23e4fc4SChunyan Zhang struct sprd_iommu_domain *dom = to_sprd_domain(domain);
252b23e4fc4SChunyan Zhang size_t pgt_size = sprd_iommu_pgt_size(domain);
253b23e4fc4SChunyan Zhang
254816c698cSChunyan Zhang /* The device is attached to this domain */
255816c698cSChunyan Zhang if (sdev->dom == dom)
256816c698cSChunyan Zhang return 0;
257b23e4fc4SChunyan Zhang
258816c698cSChunyan Zhang /* The first time that domain is attaching to a device */
259816c698cSChunyan Zhang if (!dom->pgt_va) {
260b23e4fc4SChunyan Zhang dom->pgt_va = dma_alloc_coherent(sdev->dev, pgt_size, &dom->pgt_pa, GFP_KERNEL);
261b23e4fc4SChunyan Zhang if (!dom->pgt_va)
262b23e4fc4SChunyan Zhang return -ENOMEM;
263b23e4fc4SChunyan Zhang
264b23e4fc4SChunyan Zhang dom->sdev = sdev;
265816c698cSChunyan Zhang }
266b23e4fc4SChunyan Zhang
267816c698cSChunyan Zhang sdev->dom = dom;
268816c698cSChunyan Zhang
269816c698cSChunyan Zhang /*
270816c698cSChunyan Zhang * One sprd IOMMU serves one client device only, disabled it before
271816c698cSChunyan Zhang * configure mapping table to avoid access conflict in case other
272816c698cSChunyan Zhang * mapping table is stored in.
273816c698cSChunyan Zhang */
274816c698cSChunyan Zhang sprd_iommu_hw_en(sdev, false);
275b23e4fc4SChunyan Zhang sprd_iommu_first_ppn(dom);
276b23e4fc4SChunyan Zhang sprd_iommu_first_vpn(dom);
277b23e4fc4SChunyan Zhang sprd_iommu_vpn_range(dom);
278b23e4fc4SChunyan Zhang sprd_iommu_default_ppn(sdev);
279b23e4fc4SChunyan Zhang sprd_iommu_hw_en(sdev, true);
280b23e4fc4SChunyan Zhang
281b23e4fc4SChunyan Zhang return 0;
282b23e4fc4SChunyan Zhang }
283b23e4fc4SChunyan Zhang
sprd_iommu_map(struct iommu_domain * domain,unsigned long iova,phys_addr_t paddr,size_t pgsize,size_t pgcount,int prot,gfp_t gfp,size_t * mapped)284b23e4fc4SChunyan Zhang static int sprd_iommu_map(struct iommu_domain *domain, unsigned long iova,
285a05d5857SRobin Murphy phys_addr_t paddr, size_t pgsize, size_t pgcount,
286a05d5857SRobin Murphy int prot, gfp_t gfp, size_t *mapped)
287b23e4fc4SChunyan Zhang {
288b23e4fc4SChunyan Zhang struct sprd_iommu_domain *dom = to_sprd_domain(domain);
289a05d5857SRobin Murphy size_t size = pgcount * SPRD_IOMMU_PAGE_SIZE;
290b23e4fc4SChunyan Zhang unsigned long flags;
291b23e4fc4SChunyan Zhang unsigned int i;
292b23e4fc4SChunyan Zhang u32 *pgt_base_iova;
293b23e4fc4SChunyan Zhang u32 pabase = (u32)paddr;
294b23e4fc4SChunyan Zhang unsigned long start = domain->geometry.aperture_start;
295b23e4fc4SChunyan Zhang unsigned long end = domain->geometry.aperture_end;
296b23e4fc4SChunyan Zhang
297b23e4fc4SChunyan Zhang if (!dom->sdev) {
298b23e4fc4SChunyan Zhang pr_err("No sprd_iommu_device attached to the domain\n");
299b23e4fc4SChunyan Zhang return -EINVAL;
300b23e4fc4SChunyan Zhang }
301b23e4fc4SChunyan Zhang
302b23e4fc4SChunyan Zhang if (iova < start || (iova + size) > (end + 1)) {
3030bb868e1SColin Ian King dev_err(dom->sdev->dev, "(iova(0x%lx) + size(%zx)) are not in the range!\n",
304b23e4fc4SChunyan Zhang iova, size);
305b23e4fc4SChunyan Zhang return -EINVAL;
306b23e4fc4SChunyan Zhang }
307b23e4fc4SChunyan Zhang
308b23e4fc4SChunyan Zhang pgt_base_iova = dom->pgt_va + ((iova - start) >> SPRD_IOMMU_PAGE_SHIFT);
309b23e4fc4SChunyan Zhang
310b23e4fc4SChunyan Zhang spin_lock_irqsave(&dom->pgtlock, flags);
311a05d5857SRobin Murphy for (i = 0; i < pgcount; i++) {
312b23e4fc4SChunyan Zhang pgt_base_iova[i] = pabase >> SPRD_IOMMU_PAGE_SHIFT;
313b23e4fc4SChunyan Zhang pabase += SPRD_IOMMU_PAGE_SIZE;
314b23e4fc4SChunyan Zhang }
315b23e4fc4SChunyan Zhang spin_unlock_irqrestore(&dom->pgtlock, flags);
316b23e4fc4SChunyan Zhang
317a05d5857SRobin Murphy *mapped = size;
318b23e4fc4SChunyan Zhang return 0;
319b23e4fc4SChunyan Zhang }
320b23e4fc4SChunyan Zhang
sprd_iommu_unmap(struct iommu_domain * domain,unsigned long iova,size_t pgsize,size_t pgcount,struct iommu_iotlb_gather * iotlb_gather)321b23e4fc4SChunyan Zhang static size_t sprd_iommu_unmap(struct iommu_domain *domain, unsigned long iova,
322a05d5857SRobin Murphy size_t pgsize, size_t pgcount,
323a05d5857SRobin Murphy struct iommu_iotlb_gather *iotlb_gather)
324b23e4fc4SChunyan Zhang {
325b23e4fc4SChunyan Zhang struct sprd_iommu_domain *dom = to_sprd_domain(domain);
326b23e4fc4SChunyan Zhang unsigned long flags;
327b23e4fc4SChunyan Zhang u32 *pgt_base_iova;
328a05d5857SRobin Murphy size_t size = pgcount * SPRD_IOMMU_PAGE_SIZE;
329b23e4fc4SChunyan Zhang unsigned long start = domain->geometry.aperture_start;
330b23e4fc4SChunyan Zhang unsigned long end = domain->geometry.aperture_end;
331b23e4fc4SChunyan Zhang
332b23e4fc4SChunyan Zhang if (iova < start || (iova + size) > (end + 1))
333a05d5857SRobin Murphy return 0;
334b23e4fc4SChunyan Zhang
335b23e4fc4SChunyan Zhang pgt_base_iova = dom->pgt_va + ((iova - start) >> SPRD_IOMMU_PAGE_SHIFT);
336b23e4fc4SChunyan Zhang
337b23e4fc4SChunyan Zhang spin_lock_irqsave(&dom->pgtlock, flags);
338a05d5857SRobin Murphy memset(pgt_base_iova, 0, pgcount * sizeof(u32));
339b23e4fc4SChunyan Zhang spin_unlock_irqrestore(&dom->pgtlock, flags);
340b23e4fc4SChunyan Zhang
341a05d5857SRobin Murphy return size;
342b23e4fc4SChunyan Zhang }
343b23e4fc4SChunyan Zhang
sprd_iommu_sync_map(struct iommu_domain * domain,unsigned long iova,size_t size)344fa4c4507SNiklas Schnelle static int sprd_iommu_sync_map(struct iommu_domain *domain,
345b23e4fc4SChunyan Zhang unsigned long iova, size_t size)
346b23e4fc4SChunyan Zhang {
347b23e4fc4SChunyan Zhang struct sprd_iommu_domain *dom = to_sprd_domain(domain);
348b23e4fc4SChunyan Zhang unsigned int reg;
349b23e4fc4SChunyan Zhang
350b23e4fc4SChunyan Zhang if (dom->sdev->ver == SPRD_IOMMU_EX)
351b23e4fc4SChunyan Zhang reg = SPRD_EX_UPDATE;
352b23e4fc4SChunyan Zhang else
353b23e4fc4SChunyan Zhang reg = SPRD_VAU_UPDATE;
354b23e4fc4SChunyan Zhang
355b23e4fc4SChunyan Zhang /* clear IOMMU TLB buffer after page table updated */
356b23e4fc4SChunyan Zhang sprd_iommu_write(dom->sdev, reg, 0xffffffff);
357fa4c4507SNiklas Schnelle return 0;
358b23e4fc4SChunyan Zhang }
359b23e4fc4SChunyan Zhang
sprd_iommu_sync(struct iommu_domain * domain,struct iommu_iotlb_gather * iotlb_gather)360b23e4fc4SChunyan Zhang static void sprd_iommu_sync(struct iommu_domain *domain,
361b23e4fc4SChunyan Zhang struct iommu_iotlb_gather *iotlb_gather)
362b23e4fc4SChunyan Zhang {
363b23e4fc4SChunyan Zhang sprd_iommu_sync_map(domain, 0, 0);
364b23e4fc4SChunyan Zhang }
365b23e4fc4SChunyan Zhang
sprd_iommu_iova_to_phys(struct iommu_domain * domain,dma_addr_t iova)366b23e4fc4SChunyan Zhang static phys_addr_t sprd_iommu_iova_to_phys(struct iommu_domain *domain,
367b23e4fc4SChunyan Zhang dma_addr_t iova)
368b23e4fc4SChunyan Zhang {
369b23e4fc4SChunyan Zhang struct sprd_iommu_domain *dom = to_sprd_domain(domain);
370b23e4fc4SChunyan Zhang unsigned long flags;
371b23e4fc4SChunyan Zhang phys_addr_t pa;
372b23e4fc4SChunyan Zhang unsigned long start = domain->geometry.aperture_start;
373b23e4fc4SChunyan Zhang unsigned long end = domain->geometry.aperture_end;
374b23e4fc4SChunyan Zhang
375b23e4fc4SChunyan Zhang if (WARN_ON(iova < start || iova > end))
376b23e4fc4SChunyan Zhang return 0;
377b23e4fc4SChunyan Zhang
378b23e4fc4SChunyan Zhang spin_lock_irqsave(&dom->pgtlock, flags);
379b23e4fc4SChunyan Zhang pa = *(dom->pgt_va + ((iova - start) >> SPRD_IOMMU_PAGE_SHIFT));
380b23e4fc4SChunyan Zhang pa = (pa << SPRD_IOMMU_PAGE_SHIFT) + ((iova - start) & (SPRD_IOMMU_PAGE_SIZE - 1));
381b23e4fc4SChunyan Zhang spin_unlock_irqrestore(&dom->pgtlock, flags);
382b23e4fc4SChunyan Zhang
383b23e4fc4SChunyan Zhang return pa;
384b23e4fc4SChunyan Zhang }
385b23e4fc4SChunyan Zhang
sprd_iommu_probe_device(struct device * dev)386b23e4fc4SChunyan Zhang static struct iommu_device *sprd_iommu_probe_device(struct device *dev)
387b23e4fc4SChunyan Zhang {
388e7080665SRobin Murphy struct sprd_iommu_device *sdev = dev_iommu_priv_get(dev);
389b23e4fc4SChunyan Zhang
390b23e4fc4SChunyan Zhang return &sdev->iommu;
391b23e4fc4SChunyan Zhang }
392b23e4fc4SChunyan Zhang
sprd_iommu_of_xlate(struct device * dev,const struct of_phandle_args * args)393b42a905bSKrzysztof Kozlowski static int sprd_iommu_of_xlate(struct device *dev,
394b42a905bSKrzysztof Kozlowski const struct of_phandle_args *args)
395b23e4fc4SChunyan Zhang {
396b23e4fc4SChunyan Zhang struct platform_device *pdev;
397b23e4fc4SChunyan Zhang
398b23e4fc4SChunyan Zhang if (!dev_iommu_priv_get(dev)) {
399b23e4fc4SChunyan Zhang pdev = of_find_device_by_node(args->np);
400b23e4fc4SChunyan Zhang dev_iommu_priv_set(dev, platform_get_drvdata(pdev));
401b23e4fc4SChunyan Zhang platform_device_put(pdev);
402b23e4fc4SChunyan Zhang }
403b23e4fc4SChunyan Zhang
404b23e4fc4SChunyan Zhang return 0;
405b23e4fc4SChunyan Zhang }
406b23e4fc4SChunyan Zhang
407b23e4fc4SChunyan Zhang
408b23e4fc4SChunyan Zhang static const struct iommu_ops sprd_iommu_ops = {
4093529375eSJason Gunthorpe .domain_alloc_paging = sprd_iommu_domain_alloc_paging,
4109a630a4bSLu Baolu .probe_device = sprd_iommu_probe_device,
411a62cafe1SJason Gunthorpe .device_group = generic_single_device_group,
4129a630a4bSLu Baolu .of_xlate = sprd_iommu_of_xlate,
413a05d5857SRobin Murphy .pgsize_bitmap = SPRD_IOMMU_PAGE_SIZE,
4149a630a4bSLu Baolu .owner = THIS_MODULE,
4159a630a4bSLu Baolu .default_domain_ops = &(const struct iommu_domain_ops) {
416b23e4fc4SChunyan Zhang .attach_dev = sprd_iommu_attach_device,
417a05d5857SRobin Murphy .map_pages = sprd_iommu_map,
418a05d5857SRobin Murphy .unmap_pages = sprd_iommu_unmap,
419b23e4fc4SChunyan Zhang .iotlb_sync_map = sprd_iommu_sync_map,
420b23e4fc4SChunyan Zhang .iotlb_sync = sprd_iommu_sync,
421b23e4fc4SChunyan Zhang .iova_to_phys = sprd_iommu_iova_to_phys,
4229a630a4bSLu Baolu .free = sprd_iommu_domain_free,
4239a630a4bSLu Baolu }
424b23e4fc4SChunyan Zhang };
425b23e4fc4SChunyan Zhang
426b23e4fc4SChunyan Zhang static const struct of_device_id sprd_iommu_of_match[] = {
427b23e4fc4SChunyan Zhang { .compatible = "sprd,iommu-v1" },
428b23e4fc4SChunyan Zhang { },
429b23e4fc4SChunyan Zhang };
430b23e4fc4SChunyan Zhang MODULE_DEVICE_TABLE(of, sprd_iommu_of_match);
431b23e4fc4SChunyan Zhang
432b23e4fc4SChunyan Zhang /*
433b23e4fc4SChunyan Zhang * Clock is not required, access to some of IOMMUs is controlled by gate
434b23e4fc4SChunyan Zhang * clk, enabled clocks for that kind of IOMMUs before accessing.
435b23e4fc4SChunyan Zhang * Return 0 for success or no clocks found.
436b23e4fc4SChunyan Zhang */
sprd_iommu_clk_enable(struct sprd_iommu_device * sdev)437b23e4fc4SChunyan Zhang static int sprd_iommu_clk_enable(struct sprd_iommu_device *sdev)
438b23e4fc4SChunyan Zhang {
439b23e4fc4SChunyan Zhang struct clk *eb;
440b23e4fc4SChunyan Zhang
441a56af062SChunyan Zhang eb = devm_clk_get_optional(sdev->dev, NULL);
442b23e4fc4SChunyan Zhang if (!eb)
443b23e4fc4SChunyan Zhang return 0;
444b23e4fc4SChunyan Zhang
445b23e4fc4SChunyan Zhang if (IS_ERR(eb))
446b23e4fc4SChunyan Zhang return PTR_ERR(eb);
447b23e4fc4SChunyan Zhang
448b23e4fc4SChunyan Zhang sdev->eb = eb;
449b23e4fc4SChunyan Zhang return clk_prepare_enable(eb);
450b23e4fc4SChunyan Zhang }
451b23e4fc4SChunyan Zhang
sprd_iommu_clk_disable(struct sprd_iommu_device * sdev)452b23e4fc4SChunyan Zhang static void sprd_iommu_clk_disable(struct sprd_iommu_device *sdev)
453b23e4fc4SChunyan Zhang {
454b23e4fc4SChunyan Zhang if (sdev->eb)
455b23e4fc4SChunyan Zhang clk_disable_unprepare(sdev->eb);
456b23e4fc4SChunyan Zhang }
457b23e4fc4SChunyan Zhang
sprd_iommu_probe(struct platform_device * pdev)458b23e4fc4SChunyan Zhang static int sprd_iommu_probe(struct platform_device *pdev)
459b23e4fc4SChunyan Zhang {
460b23e4fc4SChunyan Zhang struct sprd_iommu_device *sdev;
461b23e4fc4SChunyan Zhang struct device *dev = &pdev->dev;
462b23e4fc4SChunyan Zhang void __iomem *base;
463b23e4fc4SChunyan Zhang int ret;
464b23e4fc4SChunyan Zhang
465b23e4fc4SChunyan Zhang sdev = devm_kzalloc(dev, sizeof(*sdev), GFP_KERNEL);
466b23e4fc4SChunyan Zhang if (!sdev)
467b23e4fc4SChunyan Zhang return -ENOMEM;
468b23e4fc4SChunyan Zhang
469b23e4fc4SChunyan Zhang base = devm_platform_ioremap_resource(pdev, 0);
470b23e4fc4SChunyan Zhang if (IS_ERR(base)) {
471b23e4fc4SChunyan Zhang dev_err(dev, "Failed to get ioremap resource.\n");
472b23e4fc4SChunyan Zhang return PTR_ERR(base);
473b23e4fc4SChunyan Zhang }
474b23e4fc4SChunyan Zhang sdev->base = base;
475b23e4fc4SChunyan Zhang
476b23e4fc4SChunyan Zhang sdev->prot_page_va = dma_alloc_coherent(dev, SPRD_IOMMU_PAGE_SIZE,
477b23e4fc4SChunyan Zhang &sdev->prot_page_pa, GFP_KERNEL);
478b23e4fc4SChunyan Zhang if (!sdev->prot_page_va)
479b23e4fc4SChunyan Zhang return -ENOMEM;
480b23e4fc4SChunyan Zhang
481b23e4fc4SChunyan Zhang platform_set_drvdata(pdev, sdev);
482b23e4fc4SChunyan Zhang sdev->dev = dev;
483b23e4fc4SChunyan Zhang
484b23e4fc4SChunyan Zhang ret = iommu_device_sysfs_add(&sdev->iommu, dev, NULL, dev_name(dev));
485b23e4fc4SChunyan Zhang if (ret)
486a62cafe1SJason Gunthorpe goto free_page;
487b23e4fc4SChunyan Zhang
4882d471b20SRobin Murphy ret = iommu_device_register(&sdev->iommu, &sprd_iommu_ops, dev);
489b23e4fc4SChunyan Zhang if (ret)
490b23e4fc4SChunyan Zhang goto remove_sysfs;
491b23e4fc4SChunyan Zhang
492b23e4fc4SChunyan Zhang ret = sprd_iommu_clk_enable(sdev);
493b23e4fc4SChunyan Zhang if (ret)
494b23e4fc4SChunyan Zhang goto unregister_iommu;
495b23e4fc4SChunyan Zhang
496b23e4fc4SChunyan Zhang ret = sprd_iommu_get_version(sdev);
497b23e4fc4SChunyan Zhang if (ret < 0) {
498b23e4fc4SChunyan Zhang dev_err(dev, "IOMMU version(%d) is invalid.\n", ret);
499b23e4fc4SChunyan Zhang goto disable_clk;
500b23e4fc4SChunyan Zhang }
501b23e4fc4SChunyan Zhang sdev->ver = ret;
502b23e4fc4SChunyan Zhang
503b23e4fc4SChunyan Zhang return 0;
504b23e4fc4SChunyan Zhang
505b23e4fc4SChunyan Zhang disable_clk:
506b23e4fc4SChunyan Zhang sprd_iommu_clk_disable(sdev);
507b23e4fc4SChunyan Zhang unregister_iommu:
508b23e4fc4SChunyan Zhang iommu_device_unregister(&sdev->iommu);
509b23e4fc4SChunyan Zhang remove_sysfs:
510b23e4fc4SChunyan Zhang iommu_device_sysfs_remove(&sdev->iommu);
511b23e4fc4SChunyan Zhang free_page:
512b23e4fc4SChunyan Zhang dma_free_coherent(sdev->dev, SPRD_IOMMU_PAGE_SIZE, sdev->prot_page_va, sdev->prot_page_pa);
513b23e4fc4SChunyan Zhang return ret;
514b23e4fc4SChunyan Zhang }
515b23e4fc4SChunyan Zhang
sprd_iommu_remove(struct platform_device * pdev)516421b6093SUwe Kleine-König static void sprd_iommu_remove(struct platform_device *pdev)
517b23e4fc4SChunyan Zhang {
518b23e4fc4SChunyan Zhang struct sprd_iommu_device *sdev = platform_get_drvdata(pdev);
519b23e4fc4SChunyan Zhang
520b23e4fc4SChunyan Zhang dma_free_coherent(sdev->dev, SPRD_IOMMU_PAGE_SIZE, sdev->prot_page_va, sdev->prot_page_pa);
521b23e4fc4SChunyan Zhang
522b23e4fc4SChunyan Zhang platform_set_drvdata(pdev, NULL);
523b23e4fc4SChunyan Zhang iommu_device_sysfs_remove(&sdev->iommu);
524b23e4fc4SChunyan Zhang iommu_device_unregister(&sdev->iommu);
525b23e4fc4SChunyan Zhang }
526b23e4fc4SChunyan Zhang
527b23e4fc4SChunyan Zhang static struct platform_driver sprd_iommu_driver = {
528b23e4fc4SChunyan Zhang .driver = {
529b23e4fc4SChunyan Zhang .name = "sprd-iommu",
530b23e4fc4SChunyan Zhang .of_match_table = sprd_iommu_of_match,
531b23e4fc4SChunyan Zhang .suppress_bind_attrs = true,
532b23e4fc4SChunyan Zhang },
533b23e4fc4SChunyan Zhang .probe = sprd_iommu_probe,
534421b6093SUwe Kleine-König .remove_new = sprd_iommu_remove,
535b23e4fc4SChunyan Zhang };
536b23e4fc4SChunyan Zhang module_platform_driver(sprd_iommu_driver);
537b23e4fc4SChunyan Zhang
538b23e4fc4SChunyan Zhang MODULE_DESCRIPTION("IOMMU driver for Unisoc SoCs");
539b23e4fc4SChunyan Zhang MODULE_ALIAS("platform:sprd-iommu");
540b23e4fc4SChunyan Zhang MODULE_LICENSE("GPL");
541