1 /* 2 Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com> 3 4 National Semiconductor SCx200 ACCESS.bus support 5 Also supports the AMD CS5535 and AMD CS5536 6 7 Based on i2c-keywest.c which is: 8 Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org> 9 Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com> 10 11 This program is free software; you can redistribute it and/or 12 modify it under the terms of the GNU General Public License as 13 published by the Free Software Foundation; either version 2 of the 14 License, or (at your option) any later version. 15 16 This program is distributed in the hope that it will be useful, 17 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 General Public License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; if not, write to the Free Software 23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 */ 25 26 #include <linux/module.h> 27 #include <linux/errno.h> 28 #include <linux/kernel.h> 29 #include <linux/init.h> 30 #include <linux/i2c.h> 31 #include <linux/smp_lock.h> 32 #include <linux/pci.h> 33 #include <linux/delay.h> 34 #include <linux/mutex.h> 35 #include <asm/io.h> 36 37 #include <linux/scx200.h> 38 39 #define NAME "scx200_acb" 40 41 MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>"); 42 MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver"); 43 MODULE_LICENSE("GPL"); 44 45 #define MAX_DEVICES 4 46 static int base[MAX_DEVICES] = { 0x820, 0x840 }; 47 module_param_array(base, int, NULL, 0); 48 MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers"); 49 50 #define POLL_TIMEOUT (HZ/5) 51 52 enum scx200_acb_state { 53 state_idle, 54 state_address, 55 state_command, 56 state_repeat_start, 57 state_quick, 58 state_read, 59 state_write, 60 }; 61 62 static const char *scx200_acb_state_name[] = { 63 "idle", 64 "address", 65 "command", 66 "repeat_start", 67 "quick", 68 "read", 69 "write", 70 }; 71 72 /* Physical interface */ 73 struct scx200_acb_iface { 74 struct scx200_acb_iface *next; 75 struct i2c_adapter adapter; 76 unsigned base; 77 struct mutex mutex; 78 79 /* State machine data */ 80 enum scx200_acb_state state; 81 int result; 82 u8 address_byte; 83 u8 command; 84 u8 *ptr; 85 char needs_reset; 86 unsigned len; 87 88 /* PCI device info */ 89 struct pci_dev *pdev; 90 int bar; 91 }; 92 93 /* Register Definitions */ 94 #define ACBSDA (iface->base + 0) 95 #define ACBST (iface->base + 1) 96 #define ACBST_SDAST 0x40 /* SDA Status */ 97 #define ACBST_BER 0x20 98 #define ACBST_NEGACK 0x10 /* Negative Acknowledge */ 99 #define ACBST_STASTR 0x08 /* Stall After Start */ 100 #define ACBST_MASTER 0x02 101 #define ACBCST (iface->base + 2) 102 #define ACBCST_BB 0x02 103 #define ACBCTL1 (iface->base + 3) 104 #define ACBCTL1_STASTRE 0x80 105 #define ACBCTL1_NMINTE 0x40 106 #define ACBCTL1_ACK 0x10 107 #define ACBCTL1_STOP 0x02 108 #define ACBCTL1_START 0x01 109 #define ACBADDR (iface->base + 4) 110 #define ACBCTL2 (iface->base + 5) 111 #define ACBCTL2_ENABLE 0x01 112 113 /************************************************************************/ 114 115 static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status) 116 { 117 const char *errmsg; 118 119 dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n", 120 scx200_acb_state_name[iface->state], status); 121 122 if (status & ACBST_BER) { 123 errmsg = "bus error"; 124 goto error; 125 } 126 if (!(status & ACBST_MASTER)) { 127 errmsg = "not master"; 128 goto error; 129 } 130 if (status & ACBST_NEGACK) { 131 dev_dbg(&iface->adapter.dev, "negative ack in state %s\n", 132 scx200_acb_state_name[iface->state]); 133 134 iface->state = state_idle; 135 iface->result = -ENXIO; 136 137 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); 138 outb(ACBST_STASTR | ACBST_NEGACK, ACBST); 139 140 /* Reset the status register */ 141 outb(0, ACBST); 142 return; 143 } 144 145 switch (iface->state) { 146 case state_idle: 147 dev_warn(&iface->adapter.dev, "interrupt in idle state\n"); 148 break; 149 150 case state_address: 151 /* Do a pointer write first */ 152 outb(iface->address_byte & ~1, ACBSDA); 153 154 iface->state = state_command; 155 break; 156 157 case state_command: 158 outb(iface->command, ACBSDA); 159 160 if (iface->address_byte & 1) 161 iface->state = state_repeat_start; 162 else 163 iface->state = state_write; 164 break; 165 166 case state_repeat_start: 167 outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1); 168 /* fallthrough */ 169 170 case state_quick: 171 if (iface->address_byte & 1) { 172 if (iface->len == 1) 173 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1); 174 else 175 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1); 176 outb(iface->address_byte, ACBSDA); 177 178 iface->state = state_read; 179 } else { 180 outb(iface->address_byte, ACBSDA); 181 182 iface->state = state_write; 183 } 184 break; 185 186 case state_read: 187 /* Set ACK if receiving the last byte */ 188 if (iface->len == 1) 189 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1); 190 else 191 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1); 192 193 *iface->ptr++ = inb(ACBSDA); 194 --iface->len; 195 196 if (iface->len == 0) { 197 iface->result = 0; 198 iface->state = state_idle; 199 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); 200 } 201 202 break; 203 204 case state_write: 205 if (iface->len == 0) { 206 iface->result = 0; 207 iface->state = state_idle; 208 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); 209 break; 210 } 211 212 outb(*iface->ptr++, ACBSDA); 213 --iface->len; 214 215 break; 216 } 217 218 return; 219 220 error: 221 dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg, 222 scx200_acb_state_name[iface->state]); 223 224 iface->state = state_idle; 225 iface->result = -EIO; 226 iface->needs_reset = 1; 227 } 228 229 static void scx200_acb_poll(struct scx200_acb_iface *iface) 230 { 231 u8 status; 232 unsigned long timeout; 233 234 timeout = jiffies + POLL_TIMEOUT; 235 while (time_before(jiffies, timeout)) { 236 status = inb(ACBST); 237 238 /* Reset the status register to avoid the hang */ 239 outb(0, ACBST); 240 241 if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) { 242 scx200_acb_machine(iface, status); 243 return; 244 } 245 yield(); 246 } 247 248 dev_err(&iface->adapter.dev, "timeout in state %s\n", 249 scx200_acb_state_name[iface->state]); 250 251 iface->state = state_idle; 252 iface->result = -EIO; 253 iface->needs_reset = 1; 254 } 255 256 static void scx200_acb_reset(struct scx200_acb_iface *iface) 257 { 258 /* Disable the ACCESS.bus device and Configure the SCL 259 frequency: 16 clock cycles */ 260 outb(0x70, ACBCTL2); 261 /* Polling mode */ 262 outb(0, ACBCTL1); 263 /* Disable slave address */ 264 outb(0, ACBADDR); 265 /* Enable the ACCESS.bus device */ 266 outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2); 267 /* Free STALL after START */ 268 outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1); 269 /* Send a STOP */ 270 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); 271 /* Clear BER, NEGACK and STASTR bits */ 272 outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST); 273 /* Clear BB bit */ 274 outb(inb(ACBCST) | ACBCST_BB, ACBCST); 275 } 276 277 static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter, 278 u16 address, unsigned short flags, 279 char rw, u8 command, int size, 280 union i2c_smbus_data *data) 281 { 282 struct scx200_acb_iface *iface = i2c_get_adapdata(adapter); 283 int len; 284 u8 *buffer; 285 u16 cur_word; 286 int rc; 287 288 switch (size) { 289 case I2C_SMBUS_QUICK: 290 len = 0; 291 buffer = NULL; 292 break; 293 294 case I2C_SMBUS_BYTE: 295 len = 1; 296 buffer = rw ? &data->byte : &command; 297 break; 298 299 case I2C_SMBUS_BYTE_DATA: 300 len = 1; 301 buffer = &data->byte; 302 break; 303 304 case I2C_SMBUS_WORD_DATA: 305 len = 2; 306 cur_word = cpu_to_le16(data->word); 307 buffer = (u8 *)&cur_word; 308 break; 309 310 case I2C_SMBUS_BLOCK_DATA: 311 len = data->block[0]; 312 buffer = &data->block[1]; 313 break; 314 315 default: 316 return -EINVAL; 317 } 318 319 dev_dbg(&adapter->dev, 320 "size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n", 321 size, address, command, len, rw); 322 323 if (!len && rw == I2C_SMBUS_READ) { 324 dev_dbg(&adapter->dev, "zero length read\n"); 325 return -EINVAL; 326 } 327 328 mutex_lock(&iface->mutex); 329 330 iface->address_byte = (address << 1) | rw; 331 iface->command = command; 332 iface->ptr = buffer; 333 iface->len = len; 334 iface->result = -EINVAL; 335 iface->needs_reset = 0; 336 337 outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1); 338 339 if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE) 340 iface->state = state_quick; 341 else 342 iface->state = state_address; 343 344 while (iface->state != state_idle) 345 scx200_acb_poll(iface); 346 347 if (iface->needs_reset) 348 scx200_acb_reset(iface); 349 350 rc = iface->result; 351 352 mutex_unlock(&iface->mutex); 353 354 if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ) 355 data->word = le16_to_cpu(cur_word); 356 357 #ifdef DEBUG 358 dev_dbg(&adapter->dev, "transfer done, result: %d", rc); 359 if (buffer) { 360 int i; 361 printk(" data:"); 362 for (i = 0; i < len; ++i) 363 printk(" %02x", buffer[i]); 364 } 365 printk("\n"); 366 #endif 367 368 return rc; 369 } 370 371 static u32 scx200_acb_func(struct i2c_adapter *adapter) 372 { 373 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 374 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 375 I2C_FUNC_SMBUS_BLOCK_DATA; 376 } 377 378 /* For now, we only handle combined mode (smbus) */ 379 static struct i2c_algorithm scx200_acb_algorithm = { 380 .smbus_xfer = scx200_acb_smbus_xfer, 381 .functionality = scx200_acb_func, 382 }; 383 384 static struct scx200_acb_iface *scx200_acb_list; 385 static DECLARE_MUTEX(scx200_acb_list_mutex); 386 387 static __init int scx200_acb_probe(struct scx200_acb_iface *iface) 388 { 389 u8 val; 390 391 /* Disable the ACCESS.bus device and Configure the SCL 392 frequency: 16 clock cycles */ 393 outb(0x70, ACBCTL2); 394 395 if (inb(ACBCTL2) != 0x70) { 396 pr_debug(NAME ": ACBCTL2 readback failed\n"); 397 return -ENXIO; 398 } 399 400 outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1); 401 402 val = inb(ACBCTL1); 403 if (val) { 404 pr_debug(NAME ": disabled, but ACBCTL1=0x%02x\n", 405 val); 406 return -ENXIO; 407 } 408 409 outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2); 410 411 outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1); 412 413 val = inb(ACBCTL1); 414 if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) { 415 pr_debug(NAME ": enabled, but NMINTE won't be set, " 416 "ACBCTL1=0x%02x\n", val); 417 return -ENXIO; 418 } 419 420 return 0; 421 } 422 423 static __init struct scx200_acb_iface *scx200_create_iface(const char *text, 424 int index) 425 { 426 struct scx200_acb_iface *iface; 427 struct i2c_adapter *adapter; 428 429 iface = kzalloc(sizeof(*iface), GFP_KERNEL); 430 if (!iface) { 431 printk(KERN_ERR NAME ": can't allocate memory\n"); 432 return NULL; 433 } 434 435 adapter = &iface->adapter; 436 i2c_set_adapdata(adapter, iface); 437 snprintf(adapter->name, I2C_NAME_SIZE, "%s ACB%d", text, index); 438 adapter->owner = THIS_MODULE; 439 adapter->id = I2C_HW_SMBUS_SCX200; 440 adapter->algo = &scx200_acb_algorithm; 441 adapter->class = I2C_CLASS_HWMON; 442 443 mutex_init(&iface->mutex); 444 445 return iface; 446 } 447 448 static int __init scx200_acb_create(struct scx200_acb_iface *iface) 449 { 450 struct i2c_adapter *adapter; 451 int rc; 452 453 adapter = &iface->adapter; 454 455 rc = scx200_acb_probe(iface); 456 if (rc) { 457 printk(KERN_WARNING NAME ": probe failed\n"); 458 return rc; 459 } 460 461 scx200_acb_reset(iface); 462 463 if (i2c_add_adapter(adapter) < 0) { 464 printk(KERN_ERR NAME ": failed to register\n"); 465 return -ENODEV; 466 } 467 468 down(&scx200_acb_list_mutex); 469 iface->next = scx200_acb_list; 470 scx200_acb_list = iface; 471 up(&scx200_acb_list_mutex); 472 473 return 0; 474 } 475 476 static __init int scx200_create_pci(const char *text, struct pci_dev *pdev, 477 int bar) 478 { 479 struct scx200_acb_iface *iface; 480 int rc; 481 482 iface = scx200_create_iface(text, 0); 483 484 if (iface == NULL) 485 return -ENOMEM; 486 487 iface->pdev = pdev; 488 iface->bar = bar; 489 490 pci_enable_device_bars(iface->pdev, 1 << iface->bar); 491 492 rc = pci_request_region(iface->pdev, iface->bar, iface->adapter.name); 493 494 if (rc != 0) { 495 printk(KERN_ERR NAME ": can't allocate PCI BAR %d\n", 496 iface->bar); 497 goto errout_free; 498 } 499 500 iface->base = pci_resource_start(iface->pdev, iface->bar); 501 rc = scx200_acb_create(iface); 502 503 if (rc == 0) 504 return 0; 505 506 pci_release_region(iface->pdev, iface->bar); 507 pci_dev_put(iface->pdev); 508 errout_free: 509 kfree(iface); 510 return rc; 511 } 512 513 static int __init scx200_create_isa(const char *text, unsigned long base, 514 int index) 515 { 516 struct scx200_acb_iface *iface; 517 int rc; 518 519 iface = scx200_create_iface(text, index); 520 521 if (iface == NULL) 522 return -ENOMEM; 523 524 if (request_region(base, 8, iface->adapter.name) == 0) { 525 printk(KERN_ERR NAME ": can't allocate io 0x%lx-0x%lx\n", 526 base, base + 8 - 1); 527 rc = -EBUSY; 528 goto errout_free; 529 } 530 531 iface->base = base; 532 rc = scx200_acb_create(iface); 533 534 if (rc == 0) 535 return 0; 536 537 release_region(base, 8); 538 errout_free: 539 kfree(iface); 540 return rc; 541 } 542 543 /* Driver data is an index into the scx200_data array that indicates 544 * the name and the BAR where the I/O address resource is located. ISA 545 * devices are flagged with a bar value of -1 */ 546 547 static struct pci_device_id scx200_pci[] = { 548 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE), 549 .driver_data = 0 }, 550 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE), 551 .driver_data = 0 }, 552 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA), 553 .driver_data = 1 }, 554 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA), 555 .driver_data = 2 } 556 }; 557 558 static struct { 559 const char *name; 560 int bar; 561 } scx200_data[] = { 562 { "SCx200", -1 }, 563 { "CS5535", 0 }, 564 { "CS5536", 0 } 565 }; 566 567 static __init int scx200_scan_pci(void) 568 { 569 int data, dev; 570 int rc = -ENODEV; 571 struct pci_dev *pdev; 572 573 for(dev = 0; dev < ARRAY_SIZE(scx200_pci); dev++) { 574 pdev = pci_get_device(scx200_pci[dev].vendor, 575 scx200_pci[dev].device, NULL); 576 577 if (pdev == NULL) 578 continue; 579 580 data = scx200_pci[dev].driver_data; 581 582 /* if .bar is greater or equal to zero, this is a 583 * PCI device - otherwise, we assume 584 that the ports are ISA based 585 */ 586 587 if (scx200_data[data].bar >= 0) 588 rc = scx200_create_pci(scx200_data[data].name, pdev, 589 scx200_data[data].bar); 590 else { 591 int i; 592 593 for (i = 0; i < MAX_DEVICES; ++i) { 594 if (base[i] == 0) 595 continue; 596 597 rc = scx200_create_isa(scx200_data[data].name, 598 base[i], 599 i); 600 } 601 } 602 603 break; 604 } 605 606 return rc; 607 } 608 609 static int __init scx200_acb_init(void) 610 { 611 int rc; 612 613 pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n"); 614 615 rc = scx200_scan_pci(); 616 617 /* If at least one bus was created, init must succeed */ 618 if (scx200_acb_list) 619 return 0; 620 return rc; 621 } 622 623 static void __exit scx200_acb_cleanup(void) 624 { 625 struct scx200_acb_iface *iface; 626 627 down(&scx200_acb_list_mutex); 628 while ((iface = scx200_acb_list) != NULL) { 629 scx200_acb_list = iface->next; 630 up(&scx200_acb_list_mutex); 631 632 i2c_del_adapter(&iface->adapter); 633 634 if (iface->pdev) { 635 pci_release_region(iface->pdev, iface->bar); 636 pci_dev_put(iface->pdev); 637 } 638 else 639 release_region(iface->base, 8); 640 641 kfree(iface); 642 down(&scx200_acb_list_mutex); 643 } 644 up(&scx200_acb_list_mutex); 645 } 646 647 module_init(scx200_acb_init); 648 module_exit(scx200_acb_cleanup); 649