1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2022 Intel Corporation 4 */ 5 6 #include "xe_query.h" 7 8 #include <linux/nospec.h> 9 #include <linux/sched/clock.h> 10 11 #include <drm/ttm/ttm_placement.h> 12 #include <generated/xe_wa_oob.h> 13 #include <uapi/drm/xe_drm.h> 14 15 #include "regs/xe_engine_regs.h" 16 #include "regs/xe_gt_regs.h" 17 #include "xe_bo.h" 18 #include "xe_device.h" 19 #include "xe_exec_queue.h" 20 #include "xe_force_wake.h" 21 #include "xe_ggtt.h" 22 #include "xe_gt.h" 23 #include "xe_guc_hwconfig.h" 24 #include "xe_macros.h" 25 #include "xe_mmio.h" 26 #include "xe_ttm_vram_mgr.h" 27 #include "xe_wa.h" 28 29 static const u16 xe_to_user_engine_class[] = { 30 [XE_ENGINE_CLASS_RENDER] = DRM_XE_ENGINE_CLASS_RENDER, 31 [XE_ENGINE_CLASS_COPY] = DRM_XE_ENGINE_CLASS_COPY, 32 [XE_ENGINE_CLASS_VIDEO_DECODE] = DRM_XE_ENGINE_CLASS_VIDEO_DECODE, 33 [XE_ENGINE_CLASS_VIDEO_ENHANCE] = DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE, 34 [XE_ENGINE_CLASS_COMPUTE] = DRM_XE_ENGINE_CLASS_COMPUTE, 35 }; 36 37 static const enum xe_engine_class user_to_xe_engine_class[] = { 38 [DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER, 39 [DRM_XE_ENGINE_CLASS_COPY] = XE_ENGINE_CLASS_COPY, 40 [DRM_XE_ENGINE_CLASS_VIDEO_DECODE] = XE_ENGINE_CLASS_VIDEO_DECODE, 41 [DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE] = XE_ENGINE_CLASS_VIDEO_ENHANCE, 42 [DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE, 43 }; 44 45 static size_t calc_hw_engine_info_size(struct xe_device *xe) 46 { 47 struct xe_hw_engine *hwe; 48 enum xe_hw_engine_id id; 49 struct xe_gt *gt; 50 u8 gt_id; 51 int i = 0; 52 53 for_each_gt(gt, xe, gt_id) 54 for_each_hw_engine(hwe, gt, id) { 55 if (xe_hw_engine_is_reserved(hwe)) 56 continue; 57 i++; 58 } 59 60 return sizeof(struct drm_xe_query_engines) + 61 i * sizeof(struct drm_xe_engine); 62 } 63 64 typedef u64 (*__ktime_func_t)(void); 65 static __ktime_func_t __clock_id_to_func(clockid_t clk_id) 66 { 67 /* 68 * Use logic same as the perf subsystem to allow user to select the 69 * reference clock id to be used for timestamps. 70 */ 71 switch (clk_id) { 72 case CLOCK_MONOTONIC: 73 return &ktime_get_ns; 74 case CLOCK_MONOTONIC_RAW: 75 return &ktime_get_raw_ns; 76 case CLOCK_REALTIME: 77 return &ktime_get_real_ns; 78 case CLOCK_BOOTTIME: 79 return &ktime_get_boottime_ns; 80 case CLOCK_TAI: 81 return &ktime_get_clocktai_ns; 82 default: 83 return NULL; 84 } 85 } 86 87 static void 88 __read_timestamps(struct xe_gt *gt, 89 struct xe_reg lower_reg, 90 struct xe_reg upper_reg, 91 u64 *engine_ts, 92 u64 *cpu_ts, 93 u64 *cpu_delta, 94 __ktime_func_t cpu_clock) 95 { 96 struct xe_mmio *mmio = >->mmio; 97 u32 upper, lower, old_upper, loop = 0; 98 99 upper = xe_mmio_read32(mmio, upper_reg); 100 do { 101 *cpu_delta = local_clock(); 102 *cpu_ts = cpu_clock(); 103 lower = xe_mmio_read32(mmio, lower_reg); 104 *cpu_delta = local_clock() - *cpu_delta; 105 old_upper = upper; 106 upper = xe_mmio_read32(mmio, upper_reg); 107 } while (upper != old_upper && loop++ < 2); 108 109 *engine_ts = (u64)upper << 32 | lower; 110 } 111 112 static int 113 query_engine_cycles(struct xe_device *xe, 114 struct drm_xe_device_query *query) 115 { 116 struct drm_xe_query_engine_cycles __user *query_ptr; 117 struct drm_xe_engine_class_instance *eci; 118 struct drm_xe_query_engine_cycles resp; 119 size_t size = sizeof(resp); 120 __ktime_func_t cpu_clock; 121 struct xe_hw_engine *hwe; 122 struct xe_gt *gt; 123 124 if (query->size == 0) { 125 query->size = size; 126 return 0; 127 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 128 return -EINVAL; 129 } 130 131 query_ptr = u64_to_user_ptr(query->data); 132 if (copy_from_user(&resp, query_ptr, size)) 133 return -EFAULT; 134 135 cpu_clock = __clock_id_to_func(resp.clockid); 136 if (!cpu_clock) 137 return -EINVAL; 138 139 eci = &resp.eci; 140 if (eci->gt_id >= XE_MAX_GT_PER_TILE) 141 return -EINVAL; 142 143 gt = xe_device_get_gt(xe, eci->gt_id); 144 if (!gt) 145 return -EINVAL; 146 147 if (eci->engine_class >= ARRAY_SIZE(user_to_xe_engine_class)) 148 return -EINVAL; 149 150 hwe = xe_gt_hw_engine(gt, user_to_xe_engine_class[eci->engine_class], 151 eci->engine_instance, true); 152 if (!hwe) 153 return -EINVAL; 154 155 if (xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL)) 156 return -EIO; 157 158 __read_timestamps(gt, 159 RING_TIMESTAMP(hwe->mmio_base), 160 RING_TIMESTAMP_UDW(hwe->mmio_base), 161 &resp.engine_cycles, 162 &resp.cpu_timestamp, 163 &resp.cpu_delta, 164 cpu_clock); 165 166 xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL); 167 resp.width = 36; 168 169 /* Only write to the output fields of user query */ 170 if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp)) 171 return -EFAULT; 172 173 if (put_user(resp.cpu_delta, &query_ptr->cpu_delta)) 174 return -EFAULT; 175 176 if (put_user(resp.engine_cycles, &query_ptr->engine_cycles)) 177 return -EFAULT; 178 179 if (put_user(resp.width, &query_ptr->width)) 180 return -EFAULT; 181 182 return 0; 183 } 184 185 static int query_engines(struct xe_device *xe, 186 struct drm_xe_device_query *query) 187 { 188 size_t size = calc_hw_engine_info_size(xe); 189 struct drm_xe_query_engines __user *query_ptr = 190 u64_to_user_ptr(query->data); 191 struct drm_xe_query_engines *engines; 192 struct xe_hw_engine *hwe; 193 enum xe_hw_engine_id id; 194 struct xe_gt *gt; 195 u8 gt_id; 196 int i = 0; 197 198 if (query->size == 0) { 199 query->size = size; 200 return 0; 201 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 202 return -EINVAL; 203 } 204 205 engines = kzalloc(size, GFP_KERNEL); 206 if (!engines) 207 return -ENOMEM; 208 209 for_each_gt(gt, xe, gt_id) 210 for_each_hw_engine(hwe, gt, id) { 211 if (xe_hw_engine_is_reserved(hwe)) 212 continue; 213 214 engines->engines[i].instance.engine_class = 215 xe_to_user_engine_class[hwe->class]; 216 engines->engines[i].instance.engine_instance = 217 hwe->logical_instance; 218 engines->engines[i].instance.gt_id = gt->info.id; 219 220 i++; 221 } 222 223 engines->num_engines = i; 224 225 if (copy_to_user(query_ptr, engines, size)) { 226 kfree(engines); 227 return -EFAULT; 228 } 229 kfree(engines); 230 231 return 0; 232 } 233 234 static size_t calc_mem_regions_size(struct xe_device *xe) 235 { 236 u32 num_managers = 1; 237 int i; 238 239 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) 240 if (ttm_manager_type(&xe->ttm, i)) 241 num_managers++; 242 243 return offsetof(struct drm_xe_query_mem_regions, mem_regions[num_managers]); 244 } 245 246 static int query_mem_regions(struct xe_device *xe, 247 struct drm_xe_device_query *query) 248 { 249 size_t size = calc_mem_regions_size(xe); 250 struct drm_xe_query_mem_regions *mem_regions; 251 struct drm_xe_query_mem_regions __user *query_ptr = 252 u64_to_user_ptr(query->data); 253 struct ttm_resource_manager *man; 254 int ret, i; 255 256 if (query->size == 0) { 257 query->size = size; 258 return 0; 259 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 260 return -EINVAL; 261 } 262 263 mem_regions = kzalloc(size, GFP_KERNEL); 264 if (XE_IOCTL_DBG(xe, !mem_regions)) 265 return -ENOMEM; 266 267 man = ttm_manager_type(&xe->ttm, XE_PL_TT); 268 mem_regions->mem_regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM; 269 /* 270 * The instance needs to be a unique number that represents the index 271 * in the placement mask used at xe_gem_create_ioctl() for the 272 * xe_bo_create() placement. 273 */ 274 mem_regions->mem_regions[0].instance = 0; 275 mem_regions->mem_regions[0].min_page_size = PAGE_SIZE; 276 mem_regions->mem_regions[0].total_size = man->size << PAGE_SHIFT; 277 if (perfmon_capable()) 278 mem_regions->mem_regions[0].used = ttm_resource_manager_usage(man); 279 mem_regions->num_mem_regions = 1; 280 281 for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) { 282 man = ttm_manager_type(&xe->ttm, i); 283 if (man) { 284 mem_regions->mem_regions[mem_regions->num_mem_regions].mem_class = 285 DRM_XE_MEM_REGION_CLASS_VRAM; 286 mem_regions->mem_regions[mem_regions->num_mem_regions].instance = 287 mem_regions->num_mem_regions; 288 mem_regions->mem_regions[mem_regions->num_mem_regions].min_page_size = 289 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? 290 SZ_64K : PAGE_SIZE; 291 mem_regions->mem_regions[mem_regions->num_mem_regions].total_size = 292 man->size; 293 294 if (perfmon_capable()) { 295 xe_ttm_vram_get_used(man, 296 &mem_regions->mem_regions 297 [mem_regions->num_mem_regions].used, 298 &mem_regions->mem_regions 299 [mem_regions->num_mem_regions].cpu_visible_used); 300 } 301 302 mem_regions->mem_regions[mem_regions->num_mem_regions].cpu_visible_size = 303 xe_ttm_vram_get_cpu_visible_size(man); 304 mem_regions->num_mem_regions++; 305 } 306 } 307 308 if (!copy_to_user(query_ptr, mem_regions, size)) 309 ret = 0; 310 else 311 ret = -ENOSPC; 312 313 kfree(mem_regions); 314 return ret; 315 } 316 317 static int query_config(struct xe_device *xe, struct drm_xe_device_query *query) 318 { 319 const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1; 320 size_t size = 321 sizeof(struct drm_xe_query_config) + num_params * sizeof(u64); 322 struct drm_xe_query_config __user *query_ptr = 323 u64_to_user_ptr(query->data); 324 struct drm_xe_query_config *config; 325 326 if (query->size == 0) { 327 query->size = size; 328 return 0; 329 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 330 return -EINVAL; 331 } 332 333 config = kzalloc(size, GFP_KERNEL); 334 if (!config) 335 return -ENOMEM; 336 337 config->num_params = num_params; 338 config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] = 339 xe->info.devid | (xe->info.revid << 16); 340 if (xe_device_get_root_tile(xe)->mem.vram.usable_size) 341 config->info[DRM_XE_QUERY_CONFIG_FLAGS] = 342 DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM; 343 config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] = 344 xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K; 345 config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits; 346 config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] = 347 xe_exec_queue_device_get_max_priority(xe); 348 349 if (copy_to_user(query_ptr, config, size)) { 350 kfree(config); 351 return -EFAULT; 352 } 353 kfree(config); 354 355 return 0; 356 } 357 358 static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query) 359 { 360 struct xe_gt *gt; 361 size_t size = sizeof(struct drm_xe_query_gt_list) + 362 xe->info.gt_count * sizeof(struct drm_xe_gt); 363 struct drm_xe_query_gt_list __user *query_ptr = 364 u64_to_user_ptr(query->data); 365 struct drm_xe_query_gt_list *gt_list; 366 u8 id; 367 368 if (query->size == 0) { 369 query->size = size; 370 return 0; 371 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 372 return -EINVAL; 373 } 374 375 gt_list = kzalloc(size, GFP_KERNEL); 376 if (!gt_list) 377 return -ENOMEM; 378 379 gt_list->num_gt = xe->info.gt_count; 380 381 for_each_gt(gt, xe, id) { 382 if (xe_gt_is_media_type(gt)) 383 gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA; 384 else 385 gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN; 386 gt_list->gt_list[id].tile_id = gt_to_tile(gt)->id; 387 gt_list->gt_list[id].gt_id = gt->info.id; 388 gt_list->gt_list[id].reference_clock = gt->info.reference_clock; 389 /* 390 * The mem_regions indexes in the mask below need to 391 * directly identify the struct 392 * drm_xe_query_mem_regions' instance constructed at 393 * query_mem_regions() 394 * 395 * For our current platforms: 396 * Bit 0 -> System Memory 397 * Bit 1 -> VRAM0 on Tile0 398 * Bit 2 -> VRAM1 on Tile1 399 * However the uAPI is generic and it's userspace's 400 * responsibility to check the mem_class, without any 401 * assumption. 402 */ 403 if (!IS_DGFX(xe)) 404 gt_list->gt_list[id].near_mem_regions = 0x1; 405 else 406 gt_list->gt_list[id].near_mem_regions = 407 BIT(gt_to_tile(gt)->id) << 1; 408 gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^ 409 gt_list->gt_list[id].near_mem_regions; 410 411 gt_list->gt_list[id].ip_ver_major = 412 REG_FIELD_GET(GMD_ID_ARCH_MASK, gt->info.gmdid); 413 gt_list->gt_list[id].ip_ver_minor = 414 REG_FIELD_GET(GMD_ID_RELEASE_MASK, gt->info.gmdid); 415 gt_list->gt_list[id].ip_ver_rev = 416 REG_FIELD_GET(GMD_ID_REVID, gt->info.gmdid); 417 } 418 419 if (copy_to_user(query_ptr, gt_list, size)) { 420 kfree(gt_list); 421 return -EFAULT; 422 } 423 kfree(gt_list); 424 425 return 0; 426 } 427 428 static int query_hwconfig(struct xe_device *xe, 429 struct drm_xe_device_query *query) 430 { 431 struct xe_gt *gt = xe_root_mmio_gt(xe); 432 size_t size = xe_guc_hwconfig_size(>->uc.guc); 433 void __user *query_ptr = u64_to_user_ptr(query->data); 434 void *hwconfig; 435 436 if (query->size == 0) { 437 query->size = size; 438 return 0; 439 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 440 return -EINVAL; 441 } 442 443 hwconfig = kzalloc(size, GFP_KERNEL); 444 if (!hwconfig) 445 return -ENOMEM; 446 447 xe_guc_hwconfig_copy(>->uc.guc, hwconfig); 448 449 if (copy_to_user(query_ptr, hwconfig, size)) { 450 kfree(hwconfig); 451 return -EFAULT; 452 } 453 kfree(hwconfig); 454 455 return 0; 456 } 457 458 static size_t calc_topo_query_size(struct xe_device *xe) 459 { 460 struct xe_gt *gt; 461 size_t query_size = 0; 462 int id; 463 464 for_each_gt(gt, xe, id) { 465 query_size += 3 * sizeof(struct drm_xe_query_topology_mask) + 466 sizeof_field(struct xe_gt, fuse_topo.g_dss_mask) + 467 sizeof_field(struct xe_gt, fuse_topo.c_dss_mask) + 468 sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss); 469 470 /* L3bank mask may not be available for some GTs */ 471 if (!XE_WA(gt, no_media_l3)) 472 query_size += sizeof(struct drm_xe_query_topology_mask) + 473 sizeof_field(struct xe_gt, fuse_topo.l3_bank_mask); 474 } 475 476 return query_size; 477 } 478 479 static int copy_mask(void __user **ptr, 480 struct drm_xe_query_topology_mask *topo, 481 void *mask, size_t mask_size) 482 { 483 topo->num_bytes = mask_size; 484 485 if (copy_to_user(*ptr, topo, sizeof(*topo))) 486 return -EFAULT; 487 *ptr += sizeof(topo); 488 489 if (copy_to_user(*ptr, mask, mask_size)) 490 return -EFAULT; 491 *ptr += mask_size; 492 493 return 0; 494 } 495 496 static int query_gt_topology(struct xe_device *xe, 497 struct drm_xe_device_query *query) 498 { 499 void __user *query_ptr = u64_to_user_ptr(query->data); 500 size_t size = calc_topo_query_size(xe); 501 struct drm_xe_query_topology_mask topo; 502 struct xe_gt *gt; 503 int id; 504 505 if (query->size == 0) { 506 query->size = size; 507 return 0; 508 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 509 return -EINVAL; 510 } 511 512 for_each_gt(gt, xe, id) { 513 int err; 514 515 topo.gt_id = id; 516 517 topo.type = DRM_XE_TOPO_DSS_GEOMETRY; 518 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask, 519 sizeof(gt->fuse_topo.g_dss_mask)); 520 if (err) 521 return err; 522 523 topo.type = DRM_XE_TOPO_DSS_COMPUTE; 524 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask, 525 sizeof(gt->fuse_topo.c_dss_mask)); 526 if (err) 527 return err; 528 529 /* 530 * If the kernel doesn't have a way to obtain a correct L3bank 531 * mask, then it's better to omit L3 from the query rather than 532 * reporting bogus or zeroed information to userspace. 533 */ 534 if (!XE_WA(gt, no_media_l3)) { 535 topo.type = DRM_XE_TOPO_L3_BANK; 536 err = copy_mask(&query_ptr, &topo, gt->fuse_topo.l3_bank_mask, 537 sizeof(gt->fuse_topo.l3_bank_mask)); 538 if (err) 539 return err; 540 } 541 542 topo.type = gt->fuse_topo.eu_type == XE_GT_EU_TYPE_SIMD16 ? 543 DRM_XE_TOPO_SIMD16_EU_PER_DSS : 544 DRM_XE_TOPO_EU_PER_DSS; 545 err = copy_mask(&query_ptr, &topo, 546 gt->fuse_topo.eu_mask_per_dss, 547 sizeof(gt->fuse_topo.eu_mask_per_dss)); 548 if (err) 549 return err; 550 } 551 552 return 0; 553 } 554 555 static int 556 query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query) 557 { 558 struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data); 559 size_t size = sizeof(struct drm_xe_query_uc_fw_version); 560 struct drm_xe_query_uc_fw_version resp; 561 struct xe_uc_fw_version *version = NULL; 562 563 if (query->size == 0) { 564 query->size = size; 565 return 0; 566 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 567 return -EINVAL; 568 } 569 570 if (copy_from_user(&resp, query_ptr, size)) 571 return -EFAULT; 572 573 if (XE_IOCTL_DBG(xe, resp.pad || resp.pad2 || resp.reserved)) 574 return -EINVAL; 575 576 switch (resp.uc_type) { 577 case XE_QUERY_UC_TYPE_GUC_SUBMISSION: { 578 struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc; 579 580 version = &guc->fw.versions.found[XE_UC_FW_VER_COMPATIBILITY]; 581 break; 582 } 583 case XE_QUERY_UC_TYPE_HUC: { 584 struct xe_gt *media_gt = NULL; 585 struct xe_huc *huc; 586 587 if (MEDIA_VER(xe) >= 13) { 588 struct xe_tile *tile; 589 u8 gt_id; 590 591 for_each_tile(tile, xe, gt_id) { 592 if (tile->media_gt) { 593 media_gt = tile->media_gt; 594 break; 595 } 596 } 597 } else { 598 media_gt = xe->tiles[0].primary_gt; 599 } 600 601 if (!media_gt) 602 break; 603 604 huc = &media_gt->uc.huc; 605 if (huc->fw.status == XE_UC_FIRMWARE_RUNNING) 606 version = &huc->fw.versions.found[XE_UC_FW_VER_RELEASE]; 607 break; 608 } 609 default: 610 return -EINVAL; 611 } 612 613 if (version) { 614 resp.branch_ver = 0; 615 resp.major_ver = version->major; 616 resp.minor_ver = version->minor; 617 resp.patch_ver = version->patch; 618 } else { 619 return -ENODEV; 620 } 621 622 if (copy_to_user(query_ptr, &resp, size)) 623 return -EFAULT; 624 625 return 0; 626 } 627 628 static size_t calc_oa_unit_query_size(struct xe_device *xe) 629 { 630 size_t size = sizeof(struct drm_xe_query_oa_units); 631 struct xe_gt *gt; 632 int i, id; 633 634 for_each_gt(gt, xe, id) { 635 for (i = 0; i < gt->oa.num_oa_units; i++) { 636 size += sizeof(struct drm_xe_oa_unit); 637 size += gt->oa.oa_unit[i].num_engines * 638 sizeof(struct drm_xe_engine_class_instance); 639 } 640 } 641 642 return size; 643 } 644 645 static int query_oa_units(struct xe_device *xe, 646 struct drm_xe_device_query *query) 647 { 648 void __user *query_ptr = u64_to_user_ptr(query->data); 649 size_t size = calc_oa_unit_query_size(xe); 650 struct drm_xe_query_oa_units *qoa; 651 enum xe_hw_engine_id hwe_id; 652 struct drm_xe_oa_unit *du; 653 struct xe_hw_engine *hwe; 654 struct xe_oa_unit *u; 655 int gt_id, i, j, ret; 656 struct xe_gt *gt; 657 u8 *pdu; 658 659 if (query->size == 0) { 660 query->size = size; 661 return 0; 662 } else if (XE_IOCTL_DBG(xe, query->size != size)) { 663 return -EINVAL; 664 } 665 666 qoa = kzalloc(size, GFP_KERNEL); 667 if (!qoa) 668 return -ENOMEM; 669 670 pdu = (u8 *)&qoa->oa_units[0]; 671 for_each_gt(gt, xe, gt_id) { 672 for (i = 0; i < gt->oa.num_oa_units; i++) { 673 u = >->oa.oa_unit[i]; 674 du = (struct drm_xe_oa_unit *)pdu; 675 676 du->oa_unit_id = u->oa_unit_id; 677 du->oa_unit_type = u->type; 678 du->oa_timestamp_freq = xe_oa_timestamp_frequency(gt); 679 du->capabilities = DRM_XE_OA_CAPS_BASE; 680 681 j = 0; 682 for_each_hw_engine(hwe, gt, hwe_id) { 683 if (!xe_hw_engine_is_reserved(hwe) && 684 xe_oa_unit_id(hwe) == u->oa_unit_id) { 685 du->eci[j].engine_class = 686 xe_to_user_engine_class[hwe->class]; 687 du->eci[j].engine_instance = hwe->logical_instance; 688 du->eci[j].gt_id = gt->info.id; 689 j++; 690 } 691 } 692 du->num_engines = j; 693 pdu += sizeof(*du) + j * sizeof(du->eci[0]); 694 qoa->num_oa_units++; 695 } 696 } 697 698 ret = copy_to_user(query_ptr, qoa, size); 699 kfree(qoa); 700 701 return ret ? -EFAULT : 0; 702 } 703 704 static int (* const xe_query_funcs[])(struct xe_device *xe, 705 struct drm_xe_device_query *query) = { 706 query_engines, 707 query_mem_regions, 708 query_config, 709 query_gt_list, 710 query_hwconfig, 711 query_gt_topology, 712 query_engine_cycles, 713 query_uc_fw_version, 714 query_oa_units, 715 }; 716 717 int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file) 718 { 719 struct xe_device *xe = to_xe_device(dev); 720 struct drm_xe_device_query *query = data; 721 u32 idx; 722 723 if (XE_IOCTL_DBG(xe, query->extensions) || 724 XE_IOCTL_DBG(xe, query->reserved[0] || query->reserved[1])) 725 return -EINVAL; 726 727 if (XE_IOCTL_DBG(xe, query->query >= ARRAY_SIZE(xe_query_funcs))) 728 return -EINVAL; 729 730 idx = array_index_nospec(query->query, ARRAY_SIZE(xe_query_funcs)); 731 if (XE_IOCTL_DBG(xe, !xe_query_funcs[idx])) 732 return -EINVAL; 733 734 return xe_query_funcs[idx](xe, query); 735 } 736