1dd08ebf6SMatthew Brost /* SPDX-License-Identifier: MIT */ 2dd08ebf6SMatthew Brost /* 3dd08ebf6SMatthew Brost * Copyright © 2022 Intel Corporation 4dd08ebf6SMatthew Brost */ 5dd08ebf6SMatthew Brost 6dd08ebf6SMatthew Brost #ifndef _XE_PCODE_H_ 7dd08ebf6SMatthew Brost #define _XE_PCODE_H_ 8dd08ebf6SMatthew Brost 9dd08ebf6SMatthew Brost #include <linux/types.h> 10*fe13fd68SMatt Roper struct xe_tile; 11933fd5ffSRiana Tauro struct xe_device; 12dd08ebf6SMatthew Brost 13*fe13fd68SMatt Roper void xe_pcode_init(struct xe_tile *tile); 14933fd5ffSRiana Tauro int xe_pcode_probe_early(struct xe_device *xe); 15933fd5ffSRiana Tauro int xe_pcode_ready(struct xe_device *xe, bool locked); 16*fe13fd68SMatt Roper int xe_pcode_init_min_freq_table(struct xe_tile *tile, u32 min_gt_freq, 17dd08ebf6SMatthew Brost u32 max_gt_freq); 18*fe13fd68SMatt Roper int xe_pcode_read(struct xe_tile *tile, u32 mbox, u32 *val, u32 *val1); 19*fe13fd68SMatt Roper int xe_pcode_write_timeout(struct xe_tile *tile, u32 mbox, u32 val, 20dd08ebf6SMatthew Brost int timeout_ms); 21*fe13fd68SMatt Roper #define xe_pcode_write(tile, mbox, val) \ 22*fe13fd68SMatt Roper xe_pcode_write_timeout(tile, mbox, val, 1) 23dd08ebf6SMatthew Brost 24*fe13fd68SMatt Roper int xe_pcode_request(struct xe_tile *tile, u32 mbox, u32 request, 25dd08ebf6SMatthew Brost u32 reply_mask, u32 reply, int timeout_ms); 26dd08ebf6SMatthew Brost 2792d44a42SBadal Nilawar #define PCODE_MBOX(mbcmd, param1, param2)\ 2892d44a42SBadal Nilawar (FIELD_PREP(PCODE_MB_COMMAND, mbcmd)\ 2992d44a42SBadal Nilawar | FIELD_PREP(PCODE_MB_PARAM1, param1)\ 3092d44a42SBadal Nilawar | FIELD_PREP(PCODE_MB_PARAM2, param2)) 3192d44a42SBadal Nilawar 32dd08ebf6SMatthew Brost #endif 33