1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright(c) 2023, Intel Corporation. All rights reserved. 4 */ 5 6 #include <linux/irq.h> 7 #include <linux/mei_aux.h> 8 #include <linux/pci.h> 9 #include <linux/sizes.h> 10 11 #include <drm/drm_print.h> 12 13 #include "xe_device_types.h" 14 #include "xe_drv.h" 15 #include "xe_heci_gsc.h" 16 #include "regs/xe_gsc_regs.h" 17 #include "xe_platform_types.h" 18 #include "xe_survivability_mode.h" 19 20 #define GSC_BAR_LENGTH 0x00000FFC 21 22 static void heci_gsc_irq_mask(struct irq_data *d) 23 { 24 /* generic irq handling */ 25 } 26 27 static void heci_gsc_irq_unmask(struct irq_data *d) 28 { 29 /* generic irq handling */ 30 } 31 32 static const struct irq_chip heci_gsc_irq_chip = { 33 .name = "gsc_irq_chip", 34 .irq_mask = heci_gsc_irq_mask, 35 .irq_unmask = heci_gsc_irq_unmask, 36 }; 37 38 static int heci_gsc_irq_init(int irq) 39 { 40 irq_set_chip_and_handler_name(irq, &heci_gsc_irq_chip, 41 handle_simple_irq, "heci_gsc_irq_handler"); 42 43 return irq_set_chip_data(irq, NULL); 44 } 45 46 /** 47 * struct heci_gsc_def - graphics security controller heci interface definitions 48 * 49 * @name: name of the heci device 50 * @bar: address of the mmio bar 51 * @bar_size: size of the mmio bar 52 * @use_polling: indication of using polling mode for the device 53 * @slow_firmware: indication of whether the device is slow (needs longer timeouts) 54 */ 55 struct heci_gsc_def { 56 const char *name; 57 unsigned long bar; 58 size_t bar_size; 59 bool use_polling; 60 bool slow_firmware; 61 }; 62 63 /* gsc resources and definitions */ 64 static const struct heci_gsc_def heci_gsc_def_dg1 = { 65 .name = "mei-gscfi", 66 .bar = DG1_GSC_HECI2_BASE, 67 .bar_size = GSC_BAR_LENGTH, 68 }; 69 70 static const struct heci_gsc_def heci_gsc_def_dg2 = { 71 .name = "mei-gscfi", 72 .bar = DG2_GSC_HECI2_BASE, 73 .bar_size = GSC_BAR_LENGTH, 74 }; 75 76 static const struct heci_gsc_def heci_gsc_def_pvc = { 77 .name = "mei-gscfi", 78 .bar = PVC_GSC_HECI2_BASE, 79 .bar_size = GSC_BAR_LENGTH, 80 .slow_firmware = true, 81 }; 82 83 static void heci_gsc_release_dev(struct device *dev) 84 { 85 struct auxiliary_device *aux_dev = to_auxiliary_dev(dev); 86 struct mei_aux_device *adev = auxiliary_dev_to_mei_aux_dev(aux_dev); 87 88 kfree(adev); 89 } 90 91 static void xe_heci_gsc_fini(void *arg) 92 { 93 struct xe_heci_gsc *heci_gsc = arg; 94 95 if (heci_gsc->adev) { 96 struct auxiliary_device *aux_dev = &heci_gsc->adev->aux_dev; 97 98 auxiliary_device_delete(aux_dev); 99 auxiliary_device_uninit(aux_dev); 100 heci_gsc->adev = NULL; 101 } 102 103 if (heci_gsc->irq >= 0) 104 irq_free_desc(heci_gsc->irq); 105 106 heci_gsc->irq = -1; 107 } 108 109 static int heci_gsc_irq_setup(struct xe_device *xe) 110 { 111 struct xe_heci_gsc *heci_gsc = &xe->heci_gsc; 112 int ret; 113 114 heci_gsc->irq = irq_alloc_desc(0); 115 if (heci_gsc->irq < 0) { 116 drm_err(&xe->drm, "gsc irq error %d\n", heci_gsc->irq); 117 return heci_gsc->irq; 118 } 119 120 ret = heci_gsc_irq_init(heci_gsc->irq); 121 if (ret < 0) 122 drm_err(&xe->drm, "gsc irq init failed %d\n", ret); 123 124 return ret; 125 } 126 127 static int heci_gsc_add_device(struct xe_device *xe, const struct heci_gsc_def *def) 128 { 129 struct xe_heci_gsc *heci_gsc = &xe->heci_gsc; 130 struct pci_dev *pdev = to_pci_dev(xe->drm.dev); 131 struct auxiliary_device *aux_dev; 132 struct mei_aux_device *adev; 133 int ret; 134 135 adev = kzalloc(sizeof(*adev), GFP_KERNEL); 136 if (!adev) 137 return -ENOMEM; 138 adev->irq = heci_gsc->irq; 139 adev->bar.parent = &pdev->resource[0]; 140 adev->bar.start = def->bar + pdev->resource[0].start; 141 adev->bar.end = adev->bar.start + def->bar_size - 1; 142 adev->bar.flags = IORESOURCE_MEM; 143 adev->bar.desc = IORES_DESC_NONE; 144 adev->slow_firmware = def->slow_firmware; 145 146 aux_dev = &adev->aux_dev; 147 aux_dev->name = def->name; 148 aux_dev->id = (pci_domain_nr(pdev->bus) << 16) | 149 PCI_DEVID(pdev->bus->number, pdev->devfn); 150 aux_dev->dev.parent = &pdev->dev; 151 aux_dev->dev.release = heci_gsc_release_dev; 152 153 ret = auxiliary_device_init(aux_dev); 154 if (ret < 0) { 155 drm_err(&xe->drm, "gsc aux init failed %d\n", ret); 156 kfree(adev); 157 return ret; 158 } 159 160 heci_gsc->adev = adev; /* needed by the notifier */ 161 ret = auxiliary_device_add(aux_dev); 162 if (ret < 0) { 163 drm_err(&xe->drm, "gsc aux add failed %d\n", ret); 164 heci_gsc->adev = NULL; 165 166 /* adev will be freed with the put_device() and .release sequence */ 167 auxiliary_device_uninit(aux_dev); 168 } 169 return ret; 170 } 171 172 int xe_heci_gsc_init(struct xe_device *xe) 173 { 174 struct xe_heci_gsc *heci_gsc = &xe->heci_gsc; 175 const struct heci_gsc_def *def = NULL; 176 int ret; 177 178 if (!xe->info.has_heci_gscfi && !xe->info.has_heci_cscfi) 179 return 0; 180 181 heci_gsc->irq = -1; 182 183 if (xe->info.platform == XE_BATTLEMAGE) { 184 def = &heci_gsc_def_dg2; 185 } else if (xe->info.platform == XE_PVC) { 186 def = &heci_gsc_def_pvc; 187 } else if (xe->info.platform == XE_DG2) { 188 def = &heci_gsc_def_dg2; 189 } else if (xe->info.platform == XE_DG1) { 190 def = &heci_gsc_def_dg1; 191 } 192 193 if (!def || !def->name) { 194 drm_warn(&xe->drm, "HECI is not implemented!\n"); 195 return 0; 196 } 197 198 ret = devm_add_action_or_reset(xe->drm.dev, xe_heci_gsc_fini, heci_gsc); 199 if (ret) 200 return ret; 201 202 if (!def->use_polling && !xe_survivability_mode_is_boot_enabled(xe)) { 203 ret = heci_gsc_irq_setup(xe); 204 if (ret) 205 return ret; 206 } 207 208 return heci_gsc_add_device(xe, def); 209 } 210 211 void xe_heci_gsc_irq_handler(struct xe_device *xe, u32 iir) 212 { 213 int ret; 214 215 if ((iir & GSC_IRQ_INTF(1)) == 0) 216 return; 217 218 if (!xe->info.has_heci_gscfi) { 219 drm_warn_once(&xe->drm, "GSC irq: not supported"); 220 return; 221 } 222 223 if (xe->heci_gsc.irq < 0) 224 return; 225 226 ret = generic_handle_irq(xe->heci_gsc.irq); 227 if (ret) 228 drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n", ret); 229 } 230 231 void xe_heci_csc_irq_handler(struct xe_device *xe, u32 iir) 232 { 233 int ret; 234 235 if ((iir & CSC_IRQ_INTF(1)) == 0) 236 return; 237 238 if (!xe->info.has_heci_cscfi) { 239 drm_warn_once(&xe->drm, "CSC irq: not supported"); 240 return; 241 } 242 243 if (xe->heci_gsc.irq < 0) 244 return; 245 246 ret = generic_handle_irq(xe->heci_gsc.irq); 247 if (ret) 248 drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n", ret); 249 } 250