1e2842570SBenjamin Gaignard // SPDX-License-Identifier: GPL-2.0 25402626cSBenjamin Gaignard /* 35402626cSBenjamin Gaignard * Copyright (C) STMicroelectronics SA 2014 45402626cSBenjamin Gaignard * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics. 55402626cSBenjamin Gaignard */ 65402626cSBenjamin Gaignard 75402626cSBenjamin Gaignard #include <linux/clk.h> 85402626cSBenjamin Gaignard #include <linux/component.h> 97ea6e6e4SVincent Abriou #include <linux/debugfs.h> 105402626cSBenjamin Gaignard #include <linux/hdmi.h> 11a204f974SVille Syrjälä #include <linux/i2c.h> 125402626cSBenjamin Gaignard #include <linux/module.h> 13acff2f86SLinus Walleij #include <linux/io.h> 145402626cSBenjamin Gaignard #include <linux/platform_device.h> 155402626cSBenjamin Gaignard #include <linux/reset.h> 165402626cSBenjamin Gaignard 17de4b00b0SBenjamin Gaignard #include <drm/drm_atomic_helper.h> 18ee68c743SBoris Brezillon #include <drm/drm_bridge.h> 195e2f97a9SSam Ravnborg #include <drm/drm_debugfs.h> 205e2f97a9SSam Ravnborg #include <drm/drm_drv.h> 215402626cSBenjamin Gaignard #include <drm/drm_edid.h> 225e2f97a9SSam Ravnborg #include <drm/drm_file.h> 235e2f97a9SSam Ravnborg #include <drm/drm_print.h> 24fcd70cd3SDaniel Vetter #include <drm/drm_probe_helper.h> 255402626cSBenjamin Gaignard 262c348e50SArnaud Pouliquen #include <sound/hdmi-codec.h> 272c348e50SArnaud Pouliquen 285402626cSBenjamin Gaignard #include "sti_hdmi.h" 295402626cSBenjamin Gaignard #include "sti_hdmi_tx3g4c28phy.h" 305402626cSBenjamin Gaignard #include "sti_vtg.h" 315402626cSBenjamin Gaignard 325402626cSBenjamin Gaignard #define HDMI_CFG 0x0000 335402626cSBenjamin Gaignard #define HDMI_INT_EN 0x0004 345402626cSBenjamin Gaignard #define HDMI_INT_STA 0x0008 355402626cSBenjamin Gaignard #define HDMI_INT_CLR 0x000C 365402626cSBenjamin Gaignard #define HDMI_STA 0x0010 375402626cSBenjamin Gaignard #define HDMI_ACTIVE_VID_XMIN 0x0100 385402626cSBenjamin Gaignard #define HDMI_ACTIVE_VID_XMAX 0x0104 395402626cSBenjamin Gaignard #define HDMI_ACTIVE_VID_YMIN 0x0108 405402626cSBenjamin Gaignard #define HDMI_ACTIVE_VID_YMAX 0x010C 415402626cSBenjamin Gaignard #define HDMI_DFLT_CHL0_DAT 0x0110 425402626cSBenjamin Gaignard #define HDMI_DFLT_CHL1_DAT 0x0114 435402626cSBenjamin Gaignard #define HDMI_DFLT_CHL2_DAT 0x0118 442c348e50SArnaud Pouliquen #define HDMI_AUDIO_CFG 0x0200 452c348e50SArnaud Pouliquen #define HDMI_SPDIF_FIFO_STATUS 0x0204 465402626cSBenjamin Gaignard #define HDMI_SW_DI_1_HEAD_WORD 0x0210 475402626cSBenjamin Gaignard #define HDMI_SW_DI_1_PKT_WORD0 0x0214 485402626cSBenjamin Gaignard #define HDMI_SW_DI_1_PKT_WORD1 0x0218 495402626cSBenjamin Gaignard #define HDMI_SW_DI_1_PKT_WORD2 0x021C 505402626cSBenjamin Gaignard #define HDMI_SW_DI_1_PKT_WORD3 0x0220 515402626cSBenjamin Gaignard #define HDMI_SW_DI_1_PKT_WORD4 0x0224 525402626cSBenjamin Gaignard #define HDMI_SW_DI_1_PKT_WORD5 0x0228 535402626cSBenjamin Gaignard #define HDMI_SW_DI_1_PKT_WORD6 0x022C 545402626cSBenjamin Gaignard #define HDMI_SW_DI_CFG 0x0230 552c348e50SArnaud Pouliquen #define HDMI_SAMPLE_FLAT_MASK 0x0244 562c348e50SArnaud Pouliquen #define HDMI_AUDN 0x0400 572c348e50SArnaud Pouliquen #define HDMI_AUD_CTS 0x0404 58cffe1e89SArnaud Pouliquen #define HDMI_SW_DI_2_HEAD_WORD 0x0600 59cffe1e89SArnaud Pouliquen #define HDMI_SW_DI_2_PKT_WORD0 0x0604 60cffe1e89SArnaud Pouliquen #define HDMI_SW_DI_2_PKT_WORD1 0x0608 61cffe1e89SArnaud Pouliquen #define HDMI_SW_DI_2_PKT_WORD2 0x060C 62cffe1e89SArnaud Pouliquen #define HDMI_SW_DI_2_PKT_WORD3 0x0610 63cffe1e89SArnaud Pouliquen #define HDMI_SW_DI_2_PKT_WORD4 0x0614 64cffe1e89SArnaud Pouliquen #define HDMI_SW_DI_2_PKT_WORD5 0x0618 65cffe1e89SArnaud Pouliquen #define HDMI_SW_DI_2_PKT_WORD6 0x061C 66e42e7bd7SVincent Abriou #define HDMI_SW_DI_3_HEAD_WORD 0x0620 67e42e7bd7SVincent Abriou #define HDMI_SW_DI_3_PKT_WORD0 0x0624 68e42e7bd7SVincent Abriou #define HDMI_SW_DI_3_PKT_WORD1 0x0628 69e42e7bd7SVincent Abriou #define HDMI_SW_DI_3_PKT_WORD2 0x062C 70e42e7bd7SVincent Abriou #define HDMI_SW_DI_3_PKT_WORD3 0x0630 71e42e7bd7SVincent Abriou #define HDMI_SW_DI_3_PKT_WORD4 0x0634 72e42e7bd7SVincent Abriou #define HDMI_SW_DI_3_PKT_WORD5 0x0638 73e42e7bd7SVincent Abriou #define HDMI_SW_DI_3_PKT_WORD6 0x063C 745402626cSBenjamin Gaignard 755402626cSBenjamin Gaignard #define HDMI_IFRAME_SLOT_AVI 1 76cffe1e89SArnaud Pouliquen #define HDMI_IFRAME_SLOT_AUDIO 2 77e42e7bd7SVincent Abriou #define HDMI_IFRAME_SLOT_VENDOR 3 785402626cSBenjamin Gaignard 795402626cSBenjamin Gaignard #define XCAT(prefix, x, suffix) prefix ## x ## suffix 805402626cSBenjamin Gaignard #define HDMI_SW_DI_N_HEAD_WORD(x) XCAT(HDMI_SW_DI_, x, _HEAD_WORD) 815402626cSBenjamin Gaignard #define HDMI_SW_DI_N_PKT_WORD0(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD0) 825402626cSBenjamin Gaignard #define HDMI_SW_DI_N_PKT_WORD1(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD1) 835402626cSBenjamin Gaignard #define HDMI_SW_DI_N_PKT_WORD2(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD2) 845402626cSBenjamin Gaignard #define HDMI_SW_DI_N_PKT_WORD3(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD3) 855402626cSBenjamin Gaignard #define HDMI_SW_DI_N_PKT_WORD4(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD4) 865402626cSBenjamin Gaignard #define HDMI_SW_DI_N_PKT_WORD5(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD5) 875402626cSBenjamin Gaignard #define HDMI_SW_DI_N_PKT_WORD6(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD6) 885402626cSBenjamin Gaignard 89181975a2SVincent Abriou #define HDMI_SW_DI_MAX_WORD 7 90181975a2SVincent Abriou 915402626cSBenjamin Gaignard #define HDMI_IFRAME_DISABLED 0x0 925402626cSBenjamin Gaignard #define HDMI_IFRAME_SINGLE_SHOT 0x1 935402626cSBenjamin Gaignard #define HDMI_IFRAME_FIELD 0x2 945402626cSBenjamin Gaignard #define HDMI_IFRAME_FRAME 0x3 955402626cSBenjamin Gaignard #define HDMI_IFRAME_MASK 0x3 965402626cSBenjamin Gaignard #define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4)) /* n from 1 to 6 */ 975402626cSBenjamin Gaignard 985402626cSBenjamin Gaignard #define HDMI_CFG_DEVICE_EN BIT(0) 995402626cSBenjamin Gaignard #define HDMI_CFG_HDMI_NOT_DVI BIT(1) 1005402626cSBenjamin Gaignard #define HDMI_CFG_HDCP_EN BIT(2) 1015402626cSBenjamin Gaignard #define HDMI_CFG_ESS_NOT_OESS BIT(3) 1025402626cSBenjamin Gaignard #define HDMI_CFG_H_SYNC_POL_NEG BIT(4) 1035402626cSBenjamin Gaignard #define HDMI_CFG_V_SYNC_POL_NEG BIT(6) 1045402626cSBenjamin Gaignard #define HDMI_CFG_422_EN BIT(8) 1055402626cSBenjamin Gaignard #define HDMI_CFG_FIFO_OVERRUN_CLR BIT(12) 1065402626cSBenjamin Gaignard #define HDMI_CFG_FIFO_UNDERRUN_CLR BIT(13) 1075402626cSBenjamin Gaignard #define HDMI_CFG_SW_RST_EN BIT(31) 1085402626cSBenjamin Gaignard 1095402626cSBenjamin Gaignard #define HDMI_INT_GLOBAL BIT(0) 1105402626cSBenjamin Gaignard #define HDMI_INT_SW_RST BIT(1) 1115402626cSBenjamin Gaignard #define HDMI_INT_PIX_CAP BIT(3) 1125402626cSBenjamin Gaignard #define HDMI_INT_HOT_PLUG BIT(4) 1135402626cSBenjamin Gaignard #define HDMI_INT_DLL_LCK BIT(5) 1145402626cSBenjamin Gaignard #define HDMI_INT_NEW_FRAME BIT(6) 1155402626cSBenjamin Gaignard #define HDMI_INT_GENCTRL_PKT BIT(7) 1162c348e50SArnaud Pouliquen #define HDMI_INT_AUDIO_FIFO_XRUN BIT(8) 1175402626cSBenjamin Gaignard #define HDMI_INT_SINK_TERM_PRESENT BIT(11) 1185402626cSBenjamin Gaignard 1195402626cSBenjamin Gaignard #define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \ 1205402626cSBenjamin Gaignard | HDMI_INT_DLL_LCK \ 1215402626cSBenjamin Gaignard | HDMI_INT_HOT_PLUG \ 1225402626cSBenjamin Gaignard | HDMI_INT_GLOBAL) 1235402626cSBenjamin Gaignard 1245402626cSBenjamin Gaignard #define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \ 1252c348e50SArnaud Pouliquen | HDMI_INT_AUDIO_FIFO_XRUN \ 1265402626cSBenjamin Gaignard | HDMI_INT_GENCTRL_PKT \ 1275402626cSBenjamin Gaignard | HDMI_INT_NEW_FRAME \ 1285402626cSBenjamin Gaignard | HDMI_INT_DLL_LCK \ 1295402626cSBenjamin Gaignard | HDMI_INT_HOT_PLUG \ 1305402626cSBenjamin Gaignard | HDMI_INT_PIX_CAP \ 1315402626cSBenjamin Gaignard | HDMI_INT_SW_RST \ 1325402626cSBenjamin Gaignard | HDMI_INT_GLOBAL) 1335402626cSBenjamin Gaignard 1345402626cSBenjamin Gaignard #define HDMI_STA_SW_RST BIT(1) 1355402626cSBenjamin Gaignard 1362c348e50SArnaud Pouliquen #define HDMI_AUD_CFG_8CH BIT(0) 1372c348e50SArnaud Pouliquen #define HDMI_AUD_CFG_SPDIF_DIV_2 BIT(1) 1382c348e50SArnaud Pouliquen #define HDMI_AUD_CFG_SPDIF_DIV_3 BIT(2) 1392c348e50SArnaud Pouliquen #define HDMI_AUD_CFG_SPDIF_CLK_DIV_4 (BIT(1) | BIT(2)) 1402c348e50SArnaud Pouliquen #define HDMI_AUD_CFG_CTS_CLK_256FS BIT(12) 1412c348e50SArnaud Pouliquen #define HDMI_AUD_CFG_DTS_INVALID BIT(16) 1422c348e50SArnaud Pouliquen #define HDMI_AUD_CFG_ONE_BIT_INVALID (BIT(18) | BIT(19) | BIT(20) | BIT(21)) 1432c348e50SArnaud Pouliquen #define HDMI_AUD_CFG_CH12_VALID BIT(28) 1442c348e50SArnaud Pouliquen #define HDMI_AUD_CFG_CH34_VALID BIT(29) 1452c348e50SArnaud Pouliquen #define HDMI_AUD_CFG_CH56_VALID BIT(30) 1462c348e50SArnaud Pouliquen #define HDMI_AUD_CFG_CH78_VALID BIT(31) 1472c348e50SArnaud Pouliquen 1482c348e50SArnaud Pouliquen /* sample flat mask */ 1492c348e50SArnaud Pouliquen #define HDMI_SAMPLE_FLAT_NO 0 1502c348e50SArnaud Pouliquen #define HDMI_SAMPLE_FLAT_SP0 BIT(0) 1512c348e50SArnaud Pouliquen #define HDMI_SAMPLE_FLAT_SP1 BIT(1) 1522c348e50SArnaud Pouliquen #define HDMI_SAMPLE_FLAT_SP2 BIT(2) 1532c348e50SArnaud Pouliquen #define HDMI_SAMPLE_FLAT_SP3 BIT(3) 1542c348e50SArnaud Pouliquen #define HDMI_SAMPLE_FLAT_ALL (HDMI_SAMPLE_FLAT_SP0 | HDMI_SAMPLE_FLAT_SP1 |\ 1552c348e50SArnaud Pouliquen HDMI_SAMPLE_FLAT_SP2 | HDMI_SAMPLE_FLAT_SP3) 1562c348e50SArnaud Pouliquen 157cffe1e89SArnaud Pouliquen #define HDMI_INFOFRAME_HEADER_TYPE(x) (((x) & 0xff) << 0) 158cffe1e89SArnaud Pouliquen #define HDMI_INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) << 8) 159cffe1e89SArnaud Pouliquen #define HDMI_INFOFRAME_HEADER_LEN(x) (((x) & 0x0f) << 16) 160cffe1e89SArnaud Pouliquen 1615402626cSBenjamin Gaignard struct sti_hdmi_connector { 1625402626cSBenjamin Gaignard struct drm_connector drm_connector; 1635402626cSBenjamin Gaignard struct drm_encoder *encoder; 1645402626cSBenjamin Gaignard struct sti_hdmi *hdmi; 1655671cefbSVincent Abriou struct drm_property *colorspace_property; 1665402626cSBenjamin Gaignard }; 1675402626cSBenjamin Gaignard 1685402626cSBenjamin Gaignard #define to_sti_hdmi_connector(x) \ 1695402626cSBenjamin Gaignard container_of(x, struct sti_hdmi_connector, drm_connector) 1705402626cSBenjamin Gaignard 171e88904bfSLee Jones static const struct drm_prop_enum_list colorspace_mode_names[] = { 172e88904bfSLee Jones { HDMI_COLORSPACE_RGB, "rgb" }, 173e88904bfSLee Jones { HDMI_COLORSPACE_YUV422, "yuv422" }, 174e88904bfSLee Jones { HDMI_COLORSPACE_YUV444, "yuv444" }, 175e88904bfSLee Jones }; 176e88904bfSLee Jones 1775402626cSBenjamin Gaignard u32 hdmi_read(struct sti_hdmi *hdmi, int offset) 1785402626cSBenjamin Gaignard { 1795402626cSBenjamin Gaignard return readl(hdmi->regs + offset); 1805402626cSBenjamin Gaignard } 1815402626cSBenjamin Gaignard 1825402626cSBenjamin Gaignard void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset) 1835402626cSBenjamin Gaignard { 1845402626cSBenjamin Gaignard writel(val, hdmi->regs + offset); 1855402626cSBenjamin Gaignard } 1865402626cSBenjamin Gaignard 18725d4cb51SRandy Dunlap /* 1885402626cSBenjamin Gaignard * HDMI interrupt handler threaded 1895402626cSBenjamin Gaignard * 1905402626cSBenjamin Gaignard * @irq: irq number 1915402626cSBenjamin Gaignard * @arg: connector structure 1925402626cSBenjamin Gaignard */ 1935402626cSBenjamin Gaignard static irqreturn_t hdmi_irq_thread(int irq, void *arg) 1945402626cSBenjamin Gaignard { 1955402626cSBenjamin Gaignard struct sti_hdmi *hdmi = arg; 1965402626cSBenjamin Gaignard 1975402626cSBenjamin Gaignard /* Hot plug/unplug IRQ */ 1985402626cSBenjamin Gaignard if (hdmi->irq_status & HDMI_INT_HOT_PLUG) { 19976569207SBenjamin Gaignard hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG; 2005402626cSBenjamin Gaignard if (hdmi->drm_dev) 2015402626cSBenjamin Gaignard drm_helper_hpd_irq_event(hdmi->drm_dev); 2025402626cSBenjamin Gaignard } 2035402626cSBenjamin Gaignard 2045402626cSBenjamin Gaignard /* Sw reset and PLL lock are exclusive so we can use the same 2055402626cSBenjamin Gaignard * event to signal them 2065402626cSBenjamin Gaignard */ 2075402626cSBenjamin Gaignard if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) { 2085402626cSBenjamin Gaignard hdmi->event_received = true; 2095402626cSBenjamin Gaignard wake_up_interruptible(&hdmi->wait_event); 2105402626cSBenjamin Gaignard } 2115402626cSBenjamin Gaignard 2122c348e50SArnaud Pouliquen /* Audio FIFO underrun IRQ */ 2132c348e50SArnaud Pouliquen if (hdmi->irq_status & HDMI_INT_AUDIO_FIFO_XRUN) 21429ffa776SFabien Dessenne DRM_INFO("Warning: audio FIFO underrun occurs!\n"); 2152c348e50SArnaud Pouliquen 2165402626cSBenjamin Gaignard return IRQ_HANDLED; 2175402626cSBenjamin Gaignard } 2185402626cSBenjamin Gaignard 21925d4cb51SRandy Dunlap /* 2205402626cSBenjamin Gaignard * HDMI interrupt handler 2215402626cSBenjamin Gaignard * 2225402626cSBenjamin Gaignard * @irq: irq number 2235402626cSBenjamin Gaignard * @arg: connector structure 2245402626cSBenjamin Gaignard */ 2255402626cSBenjamin Gaignard static irqreturn_t hdmi_irq(int irq, void *arg) 2265402626cSBenjamin Gaignard { 2275402626cSBenjamin Gaignard struct sti_hdmi *hdmi = arg; 2285402626cSBenjamin Gaignard 2295402626cSBenjamin Gaignard /* read interrupt status */ 2305402626cSBenjamin Gaignard hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA); 2315402626cSBenjamin Gaignard 2325402626cSBenjamin Gaignard /* clear interrupt status */ 2335402626cSBenjamin Gaignard hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR); 2345402626cSBenjamin Gaignard 2355402626cSBenjamin Gaignard /* force sync bus write */ 2365402626cSBenjamin Gaignard hdmi_read(hdmi, HDMI_INT_STA); 2375402626cSBenjamin Gaignard 2385402626cSBenjamin Gaignard return IRQ_WAKE_THREAD; 2395402626cSBenjamin Gaignard } 2405402626cSBenjamin Gaignard 24125d4cb51SRandy Dunlap /* 2425402626cSBenjamin Gaignard * Set hdmi active area depending on the drm display mode selected 2435402626cSBenjamin Gaignard * 2445402626cSBenjamin Gaignard * @hdmi: pointer on the hdmi internal structure 2455402626cSBenjamin Gaignard */ 2465402626cSBenjamin Gaignard static void hdmi_active_area(struct sti_hdmi *hdmi) 2475402626cSBenjamin Gaignard { 2485402626cSBenjamin Gaignard u32 xmin, xmax; 2495402626cSBenjamin Gaignard u32 ymin, ymax; 2505402626cSBenjamin Gaignard 2518661532aSVincent Abriou xmin = sti_vtg_get_pixel_number(hdmi->mode, 1); 2528661532aSVincent Abriou xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay); 2535402626cSBenjamin Gaignard ymin = sti_vtg_get_line_number(hdmi->mode, 0); 2545402626cSBenjamin Gaignard ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1); 2555402626cSBenjamin Gaignard 2565402626cSBenjamin Gaignard hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN); 2575402626cSBenjamin Gaignard hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX); 2585402626cSBenjamin Gaignard hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN); 2595402626cSBenjamin Gaignard hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX); 2605402626cSBenjamin Gaignard } 2615402626cSBenjamin Gaignard 26225d4cb51SRandy Dunlap /* 2635402626cSBenjamin Gaignard * Overall hdmi configuration 2645402626cSBenjamin Gaignard * 2655402626cSBenjamin Gaignard * @hdmi: pointer on the hdmi internal structure 2665402626cSBenjamin Gaignard */ 2675402626cSBenjamin Gaignard static void hdmi_config(struct sti_hdmi *hdmi) 2685402626cSBenjamin Gaignard { 269851c1aaeSJani Nikula struct drm_connector *connector = hdmi->drm_connector; 2705402626cSBenjamin Gaignard u32 conf; 2715402626cSBenjamin Gaignard 2725402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("\n"); 2735402626cSBenjamin Gaignard 2745402626cSBenjamin Gaignard /* Clear overrun and underrun fifo */ 2755402626cSBenjamin Gaignard conf = HDMI_CFG_FIFO_OVERRUN_CLR | HDMI_CFG_FIFO_UNDERRUN_CLR; 2765402626cSBenjamin Gaignard 277ffc4a6a1SVincent Abriou /* Select encryption type and the framing mode */ 278ffc4a6a1SVincent Abriou conf |= HDMI_CFG_ESS_NOT_OESS; 279851c1aaeSJani Nikula if (connector->display_info.is_hdmi) 280ffc4a6a1SVincent Abriou conf |= HDMI_CFG_HDMI_NOT_DVI; 2815402626cSBenjamin Gaignard 2825402626cSBenjamin Gaignard /* Set Hsync polarity */ 2835402626cSBenjamin Gaignard if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) { 2845402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("H Sync Negative\n"); 2855402626cSBenjamin Gaignard conf |= HDMI_CFG_H_SYNC_POL_NEG; 2865402626cSBenjamin Gaignard } 2875402626cSBenjamin Gaignard 2885402626cSBenjamin Gaignard /* Set Vsync polarity */ 2895402626cSBenjamin Gaignard if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) { 2905402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("V Sync Negative\n"); 2915402626cSBenjamin Gaignard conf |= HDMI_CFG_V_SYNC_POL_NEG; 2925402626cSBenjamin Gaignard } 2935402626cSBenjamin Gaignard 2945402626cSBenjamin Gaignard /* Enable HDMI */ 2955402626cSBenjamin Gaignard conf |= HDMI_CFG_DEVICE_EN; 2965402626cSBenjamin Gaignard 2975402626cSBenjamin Gaignard hdmi_write(hdmi, conf, HDMI_CFG); 2985402626cSBenjamin Gaignard } 2995402626cSBenjamin Gaignard 300181975a2SVincent Abriou /* 301181975a2SVincent Abriou * Helper to reset info frame 302181975a2SVincent Abriou * 303181975a2SVincent Abriou * @hdmi: pointer on the hdmi internal structure 304181975a2SVincent Abriou * @slot: infoframe to reset 305181975a2SVincent Abriou */ 306181975a2SVincent Abriou static void hdmi_infoframe_reset(struct sti_hdmi *hdmi, 307181975a2SVincent Abriou u32 slot) 308181975a2SVincent Abriou { 309181975a2SVincent Abriou u32 val, i; 310181975a2SVincent Abriou u32 head_offset, pack_offset; 311181975a2SVincent Abriou 312181975a2SVincent Abriou switch (slot) { 313181975a2SVincent Abriou case HDMI_IFRAME_SLOT_AVI: 314181975a2SVincent Abriou head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI); 315181975a2SVincent Abriou pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI); 316181975a2SVincent Abriou break; 317181975a2SVincent Abriou case HDMI_IFRAME_SLOT_AUDIO: 318181975a2SVincent Abriou head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO); 319181975a2SVincent Abriou pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO); 320181975a2SVincent Abriou break; 321e42e7bd7SVincent Abriou case HDMI_IFRAME_SLOT_VENDOR: 322e42e7bd7SVincent Abriou head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_VENDOR); 323e42e7bd7SVincent Abriou pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_VENDOR); 324e42e7bd7SVincent Abriou break; 325181975a2SVincent Abriou default: 326181975a2SVincent Abriou DRM_ERROR("unsupported infoframe slot: %#x\n", slot); 327181975a2SVincent Abriou return; 328181975a2SVincent Abriou } 329181975a2SVincent Abriou 330181975a2SVincent Abriou /* Disable transmission for the selected slot */ 331181975a2SVincent Abriou val = hdmi_read(hdmi, HDMI_SW_DI_CFG); 332181975a2SVincent Abriou val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot); 333181975a2SVincent Abriou hdmi_write(hdmi, val, HDMI_SW_DI_CFG); 334181975a2SVincent Abriou 335181975a2SVincent Abriou /* Reset info frame registers */ 336181975a2SVincent Abriou hdmi_write(hdmi, 0x0, head_offset); 337181975a2SVincent Abriou for (i = 0; i < HDMI_SW_DI_MAX_WORD; i += sizeof(u32)) 338181975a2SVincent Abriou hdmi_write(hdmi, 0x0, pack_offset + i); 339181975a2SVincent Abriou } 340181975a2SVincent Abriou 34125d4cb51SRandy Dunlap /* 342cffe1e89SArnaud Pouliquen * Helper to concatenate infoframe in 32 bits word 343cffe1e89SArnaud Pouliquen * 344cffe1e89SArnaud Pouliquen * @ptr: pointer on the hdmi internal structure 345cffe1e89SArnaud Pouliquen * @size: size to write 346cffe1e89SArnaud Pouliquen */ 347cffe1e89SArnaud Pouliquen static inline unsigned int hdmi_infoframe_subpack(const u8 *ptr, size_t size) 348cffe1e89SArnaud Pouliquen { 349cffe1e89SArnaud Pouliquen unsigned long value = 0; 350cffe1e89SArnaud Pouliquen size_t i; 351cffe1e89SArnaud Pouliquen 352cffe1e89SArnaud Pouliquen for (i = size; i > 0; i--) 353cffe1e89SArnaud Pouliquen value = (value << 8) | ptr[i - 1]; 354cffe1e89SArnaud Pouliquen 355cffe1e89SArnaud Pouliquen return value; 356cffe1e89SArnaud Pouliquen } 357cffe1e89SArnaud Pouliquen 35825d4cb51SRandy Dunlap /* 359cffe1e89SArnaud Pouliquen * Helper to write info frame 360cffe1e89SArnaud Pouliquen * 361cffe1e89SArnaud Pouliquen * @hdmi: pointer on the hdmi internal structure 362cffe1e89SArnaud Pouliquen * @data: infoframe to write 363cffe1e89SArnaud Pouliquen * @size: size to write 364cffe1e89SArnaud Pouliquen */ 365e42e7bd7SVincent Abriou static void hdmi_infoframe_write_infopack(struct sti_hdmi *hdmi, 366e42e7bd7SVincent Abriou const u8 *data, 367e42e7bd7SVincent Abriou size_t size) 368cffe1e89SArnaud Pouliquen { 369cffe1e89SArnaud Pouliquen const u8 *ptr = data; 370cffe1e89SArnaud Pouliquen u32 val, slot, mode, i; 371cffe1e89SArnaud Pouliquen u32 head_offset, pack_offset; 372cffe1e89SArnaud Pouliquen 373cffe1e89SArnaud Pouliquen switch (*ptr) { 374cffe1e89SArnaud Pouliquen case HDMI_INFOFRAME_TYPE_AVI: 375cffe1e89SArnaud Pouliquen slot = HDMI_IFRAME_SLOT_AVI; 376cffe1e89SArnaud Pouliquen mode = HDMI_IFRAME_FIELD; 377cffe1e89SArnaud Pouliquen head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI); 378cffe1e89SArnaud Pouliquen pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI); 379cffe1e89SArnaud Pouliquen break; 380cffe1e89SArnaud Pouliquen case HDMI_INFOFRAME_TYPE_AUDIO: 381cffe1e89SArnaud Pouliquen slot = HDMI_IFRAME_SLOT_AUDIO; 382cffe1e89SArnaud Pouliquen mode = HDMI_IFRAME_FRAME; 383cffe1e89SArnaud Pouliquen head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO); 384cffe1e89SArnaud Pouliquen pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO); 385cffe1e89SArnaud Pouliquen break; 386e42e7bd7SVincent Abriou case HDMI_INFOFRAME_TYPE_VENDOR: 387e42e7bd7SVincent Abriou slot = HDMI_IFRAME_SLOT_VENDOR; 388e42e7bd7SVincent Abriou mode = HDMI_IFRAME_FRAME; 389e42e7bd7SVincent Abriou head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_VENDOR); 390e42e7bd7SVincent Abriou pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_VENDOR); 391e42e7bd7SVincent Abriou break; 392cffe1e89SArnaud Pouliquen default: 393cffe1e89SArnaud Pouliquen DRM_ERROR("unsupported infoframe type: %#x\n", *ptr); 394cffe1e89SArnaud Pouliquen return; 395cffe1e89SArnaud Pouliquen } 396cffe1e89SArnaud Pouliquen 397cffe1e89SArnaud Pouliquen /* Disable transmission slot for updated infoframe */ 398cffe1e89SArnaud Pouliquen val = hdmi_read(hdmi, HDMI_SW_DI_CFG); 399cffe1e89SArnaud Pouliquen val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot); 400cffe1e89SArnaud Pouliquen hdmi_write(hdmi, val, HDMI_SW_DI_CFG); 401cffe1e89SArnaud Pouliquen 402cffe1e89SArnaud Pouliquen val = HDMI_INFOFRAME_HEADER_TYPE(*ptr++); 403cffe1e89SArnaud Pouliquen val |= HDMI_INFOFRAME_HEADER_VERSION(*ptr++); 404cffe1e89SArnaud Pouliquen val |= HDMI_INFOFRAME_HEADER_LEN(*ptr++); 405cffe1e89SArnaud Pouliquen writel(val, hdmi->regs + head_offset); 406cffe1e89SArnaud Pouliquen 407cffe1e89SArnaud Pouliquen /* 408cffe1e89SArnaud Pouliquen * Each subpack contains 4 bytes 409cffe1e89SArnaud Pouliquen * The First Bytes of the first subpacket must contain the checksum 410e42e7bd7SVincent Abriou * Packet size is increase by one. 411cffe1e89SArnaud Pouliquen */ 412e42e7bd7SVincent Abriou size = size - HDMI_INFOFRAME_HEADER_SIZE + 1; 413cffe1e89SArnaud Pouliquen for (i = 0; i < size; i += sizeof(u32)) { 414cffe1e89SArnaud Pouliquen size_t num; 415cffe1e89SArnaud Pouliquen 416cffe1e89SArnaud Pouliquen num = min_t(size_t, size - i, sizeof(u32)); 417cffe1e89SArnaud Pouliquen val = hdmi_infoframe_subpack(ptr, num); 418cffe1e89SArnaud Pouliquen ptr += sizeof(u32); 419cffe1e89SArnaud Pouliquen writel(val, hdmi->regs + pack_offset + i); 420cffe1e89SArnaud Pouliquen } 421cffe1e89SArnaud Pouliquen 422cffe1e89SArnaud Pouliquen /* Enable transmission slot for updated infoframe */ 423cffe1e89SArnaud Pouliquen val = hdmi_read(hdmi, HDMI_SW_DI_CFG); 42450f2138aSVincent Abriou val |= HDMI_IFRAME_CFG_DI_N(mode, slot); 425cffe1e89SArnaud Pouliquen hdmi_write(hdmi, val, HDMI_SW_DI_CFG); 426cffe1e89SArnaud Pouliquen } 427cffe1e89SArnaud Pouliquen 42825d4cb51SRandy Dunlap /* 4295402626cSBenjamin Gaignard * Prepare and configure the AVI infoframe 4305402626cSBenjamin Gaignard * 4315402626cSBenjamin Gaignard * AVI infoframe are transmitted at least once per two video field and 4325402626cSBenjamin Gaignard * contains information about HDMI transmission mode such as color space, 4335402626cSBenjamin Gaignard * colorimetry, ... 4345402626cSBenjamin Gaignard * 4355402626cSBenjamin Gaignard * @hdmi: pointer on the hdmi internal structure 4365402626cSBenjamin Gaignard * 4375402626cSBenjamin Gaignard * Return negative value if error occurs 4385402626cSBenjamin Gaignard */ 4395402626cSBenjamin Gaignard static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi) 4405402626cSBenjamin Gaignard { 4415402626cSBenjamin Gaignard struct drm_display_mode *mode = &hdmi->mode; 4425402626cSBenjamin Gaignard struct hdmi_avi_infoframe infoframe; 4435402626cSBenjamin Gaignard u8 buffer[HDMI_INFOFRAME_SIZE(AVI)]; 4445402626cSBenjamin Gaignard int ret; 4455402626cSBenjamin Gaignard 4465402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("\n"); 4475402626cSBenjamin Gaignard 44813d0add3SVille Syrjälä ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe, 44913d0add3SVille Syrjälä hdmi->drm_connector, mode); 4505402626cSBenjamin Gaignard if (ret < 0) { 4515402626cSBenjamin Gaignard DRM_ERROR("failed to setup AVI infoframe: %d\n", ret); 4525402626cSBenjamin Gaignard return ret; 4535402626cSBenjamin Gaignard } 4545402626cSBenjamin Gaignard 4555402626cSBenjamin Gaignard /* fixed infoframe configuration not linked to the mode */ 4565671cefbSVincent Abriou infoframe.colorspace = hdmi->colorspace; 4575402626cSBenjamin Gaignard infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; 4585402626cSBenjamin Gaignard infoframe.colorimetry = HDMI_COLORIMETRY_NONE; 4595402626cSBenjamin Gaignard 4605402626cSBenjamin Gaignard ret = hdmi_avi_infoframe_pack(&infoframe, buffer, sizeof(buffer)); 4615402626cSBenjamin Gaignard if (ret < 0) { 4625402626cSBenjamin Gaignard DRM_ERROR("failed to pack AVI infoframe: %d\n", ret); 4635402626cSBenjamin Gaignard return ret; 4645402626cSBenjamin Gaignard } 4655402626cSBenjamin Gaignard 466e42e7bd7SVincent Abriou hdmi_infoframe_write_infopack(hdmi, buffer, ret); 4675402626cSBenjamin Gaignard 468cffe1e89SArnaud Pouliquen return 0; 469cffe1e89SArnaud Pouliquen } 4705402626cSBenjamin Gaignard 47125d4cb51SRandy Dunlap /* 472cffe1e89SArnaud Pouliquen * Prepare and configure the AUDIO infoframe 473cffe1e89SArnaud Pouliquen * 474cffe1e89SArnaud Pouliquen * AUDIO infoframe are transmitted once per frame and 475cffe1e89SArnaud Pouliquen * contains information about HDMI transmission mode such as audio codec, 476cffe1e89SArnaud Pouliquen * sample size, ... 477cffe1e89SArnaud Pouliquen * 478cffe1e89SArnaud Pouliquen * @hdmi: pointer on the hdmi internal structure 479cffe1e89SArnaud Pouliquen * 480cffe1e89SArnaud Pouliquen * Return negative value if error occurs 4815402626cSBenjamin Gaignard */ 482cffe1e89SArnaud Pouliquen static int hdmi_audio_infoframe_config(struct sti_hdmi *hdmi) 483cffe1e89SArnaud Pouliquen { 4842c348e50SArnaud Pouliquen struct hdmi_audio_params *audio = &hdmi->audio; 485cffe1e89SArnaud Pouliquen u8 buffer[HDMI_INFOFRAME_SIZE(AUDIO)]; 4862c348e50SArnaud Pouliquen int ret, val; 487cffe1e89SArnaud Pouliquen 4882c348e50SArnaud Pouliquen DRM_DEBUG_DRIVER("enter %s, AIF %s\n", __func__, 4892c348e50SArnaud Pouliquen audio->enabled ? "enable" : "disable"); 4902c348e50SArnaud Pouliquen if (audio->enabled) { 4912c348e50SArnaud Pouliquen /* set audio parameters stored*/ 4922c348e50SArnaud Pouliquen ret = hdmi_audio_infoframe_pack(&audio->cea, buffer, 4932c348e50SArnaud Pouliquen sizeof(buffer)); 494cffe1e89SArnaud Pouliquen if (ret < 0) { 495cffe1e89SArnaud Pouliquen DRM_ERROR("failed to pack audio infoframe: %d\n", ret); 496cffe1e89SArnaud Pouliquen return ret; 497cffe1e89SArnaud Pouliquen } 498e42e7bd7SVincent Abriou hdmi_infoframe_write_infopack(hdmi, buffer, ret); 4992c348e50SArnaud Pouliquen } else { 5002c348e50SArnaud Pouliquen /*disable audio info frame transmission */ 5012c348e50SArnaud Pouliquen val = hdmi_read(hdmi, HDMI_SW_DI_CFG); 5022c348e50SArnaud Pouliquen val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 5032c348e50SArnaud Pouliquen HDMI_IFRAME_SLOT_AUDIO); 5042c348e50SArnaud Pouliquen hdmi_write(hdmi, val, HDMI_SW_DI_CFG); 5052c348e50SArnaud Pouliquen } 506e42e7bd7SVincent Abriou 507e42e7bd7SVincent Abriou return 0; 508e42e7bd7SVincent Abriou } 509e42e7bd7SVincent Abriou 510e42e7bd7SVincent Abriou /* 511e42e7bd7SVincent Abriou * Prepare and configure the VS infoframe 512e42e7bd7SVincent Abriou * 513e42e7bd7SVincent Abriou * Vendor Specific infoframe are transmitted once per frame and 514e42e7bd7SVincent Abriou * contains vendor specific information. 515e42e7bd7SVincent Abriou * 516e42e7bd7SVincent Abriou * @hdmi: pointer on the hdmi internal structure 517e42e7bd7SVincent Abriou * 518e42e7bd7SVincent Abriou * Return negative value if error occurs 519e42e7bd7SVincent Abriou */ 520e42e7bd7SVincent Abriou #define HDMI_VENDOR_INFOFRAME_MAX_SIZE 6 521e42e7bd7SVincent Abriou static int hdmi_vendor_infoframe_config(struct sti_hdmi *hdmi) 522e42e7bd7SVincent Abriou { 523e42e7bd7SVincent Abriou struct drm_display_mode *mode = &hdmi->mode; 524e42e7bd7SVincent Abriou struct hdmi_vendor_infoframe infoframe; 525e42e7bd7SVincent Abriou u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_VENDOR_INFOFRAME_MAX_SIZE]; 526e42e7bd7SVincent Abriou int ret; 527e42e7bd7SVincent Abriou 528e42e7bd7SVincent Abriou DRM_DEBUG_DRIVER("\n"); 529e42e7bd7SVincent Abriou 530f1781e9bSVille Syrjälä ret = drm_hdmi_vendor_infoframe_from_display_mode(&infoframe, 531f1781e9bSVille Syrjälä hdmi->drm_connector, 532f1781e9bSVille Syrjälä mode); 533e42e7bd7SVincent Abriou if (ret < 0) { 534e42e7bd7SVincent Abriou /* 535e42e7bd7SVincent Abriou * Going into that statement does not means vendor infoframe 536e42e7bd7SVincent Abriou * fails. It just informed us that vendor infoframe is not 537e42e7bd7SVincent Abriou * needed for the selected mode. Only 4k or stereoscopic 3D 538e42e7bd7SVincent Abriou * mode requires vendor infoframe. So just simply return 0. 539e42e7bd7SVincent Abriou */ 540e42e7bd7SVincent Abriou return 0; 541e42e7bd7SVincent Abriou } 542e42e7bd7SVincent Abriou 543e42e7bd7SVincent Abriou ret = hdmi_vendor_infoframe_pack(&infoframe, buffer, sizeof(buffer)); 544e42e7bd7SVincent Abriou if (ret < 0) { 545e42e7bd7SVincent Abriou DRM_ERROR("failed to pack VS infoframe: %d\n", ret); 546e42e7bd7SVincent Abriou return ret; 547e42e7bd7SVincent Abriou } 548e42e7bd7SVincent Abriou 549e42e7bd7SVincent Abriou hdmi_infoframe_write_infopack(hdmi, buffer, ret); 5505402626cSBenjamin Gaignard 5515402626cSBenjamin Gaignard return 0; 5525402626cSBenjamin Gaignard } 5535402626cSBenjamin Gaignard 5545dec1affSBenjamin Gaignard #define HDMI_TIMEOUT_SWRESET 100 /*milliseconds */ 5555dec1affSBenjamin Gaignard 55625d4cb51SRandy Dunlap /* 5575402626cSBenjamin Gaignard * Software reset of the hdmi subsystem 5585402626cSBenjamin Gaignard * 5595402626cSBenjamin Gaignard * @hdmi: pointer on the hdmi internal structure 5605402626cSBenjamin Gaignard * 5615402626cSBenjamin Gaignard */ 5625402626cSBenjamin Gaignard static void hdmi_swreset(struct sti_hdmi *hdmi) 5635402626cSBenjamin Gaignard { 5645402626cSBenjamin Gaignard u32 val; 5655402626cSBenjamin Gaignard 5665402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("\n"); 5675402626cSBenjamin Gaignard 5685402626cSBenjamin Gaignard /* Enable hdmi_audio clock only during hdmi reset */ 5695402626cSBenjamin Gaignard if (clk_prepare_enable(hdmi->clk_audio)) 5705402626cSBenjamin Gaignard DRM_INFO("Failed to prepare/enable hdmi_audio clk\n"); 5715402626cSBenjamin Gaignard 5725402626cSBenjamin Gaignard /* Sw reset */ 5735402626cSBenjamin Gaignard hdmi->event_received = false; 5745402626cSBenjamin Gaignard 5755402626cSBenjamin Gaignard val = hdmi_read(hdmi, HDMI_CFG); 5765402626cSBenjamin Gaignard val |= HDMI_CFG_SW_RST_EN; 5775402626cSBenjamin Gaignard hdmi_write(hdmi, val, HDMI_CFG); 5785402626cSBenjamin Gaignard 5795402626cSBenjamin Gaignard /* Wait reset completed */ 5805402626cSBenjamin Gaignard wait_event_interruptible_timeout(hdmi->wait_event, 5817c0ca70bSBenjamin Gaignard hdmi->event_received, 5825402626cSBenjamin Gaignard msecs_to_jiffies 5835402626cSBenjamin Gaignard (HDMI_TIMEOUT_SWRESET)); 5845402626cSBenjamin Gaignard 5855402626cSBenjamin Gaignard /* 5865402626cSBenjamin Gaignard * HDMI_STA_SW_RST bit is set to '1' when SW_RST bit in HDMI_CFG is 5875402626cSBenjamin Gaignard * set to '1' and clk_audio is running. 5885402626cSBenjamin Gaignard */ 5895402626cSBenjamin Gaignard if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0) 5905402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n"); 5915402626cSBenjamin Gaignard 5925402626cSBenjamin Gaignard val = hdmi_read(hdmi, HDMI_CFG); 5935402626cSBenjamin Gaignard val &= ~HDMI_CFG_SW_RST_EN; 5945402626cSBenjamin Gaignard hdmi_write(hdmi, val, HDMI_CFG); 5955402626cSBenjamin Gaignard 5965402626cSBenjamin Gaignard /* Disable hdmi_audio clock. Not used anymore for drm purpose */ 5975402626cSBenjamin Gaignard clk_disable_unprepare(hdmi->clk_audio); 5985402626cSBenjamin Gaignard } 5995402626cSBenjamin Gaignard 6007ea6e6e4SVincent Abriou #define DBGFS_PRINT_STR(str1, str2) seq_printf(s, "%-24s %s\n", str1, str2) 6017ea6e6e4SVincent Abriou #define DBGFS_PRINT_INT(str1, int2) seq_printf(s, "%-24s %d\n", str1, int2) 6027ea6e6e4SVincent Abriou #define DBGFS_DUMP(str, reg) seq_printf(s, "%s %-25s 0x%08X", str, #reg, \ 6037ea6e6e4SVincent Abriou hdmi_read(hdmi, reg)) 6047ea6e6e4SVincent Abriou #define DBGFS_DUMP_DI(reg, slot) DBGFS_DUMP("\n", reg(slot)) 6057ea6e6e4SVincent Abriou 6067ea6e6e4SVincent Abriou static void hdmi_dbg_cfg(struct seq_file *s, int val) 6077ea6e6e4SVincent Abriou { 6087ea6e6e4SVincent Abriou int tmp; 6097ea6e6e4SVincent Abriou 610e9635133SMarkus Elfring seq_putc(s, '\t'); 6117ea6e6e4SVincent Abriou tmp = val & HDMI_CFG_HDMI_NOT_DVI; 6127ea6e6e4SVincent Abriou DBGFS_PRINT_STR("mode:", tmp ? "HDMI" : "DVI"); 6137ea6e6e4SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 6147ea6e6e4SVincent Abriou tmp = val & HDMI_CFG_HDCP_EN; 6157ea6e6e4SVincent Abriou DBGFS_PRINT_STR("HDCP:", tmp ? "enable" : "disable"); 6167ea6e6e4SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 6177ea6e6e4SVincent Abriou tmp = val & HDMI_CFG_ESS_NOT_OESS; 6187ea6e6e4SVincent Abriou DBGFS_PRINT_STR("HDCP mode:", tmp ? "ESS enable" : "OESS enable"); 6197ea6e6e4SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 6207ea6e6e4SVincent Abriou tmp = val & HDMI_CFG_H_SYNC_POL_NEG; 6217ea6e6e4SVincent Abriou DBGFS_PRINT_STR("Hsync polarity:", tmp ? "inverted" : "normal"); 6227ea6e6e4SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 6237ea6e6e4SVincent Abriou tmp = val & HDMI_CFG_V_SYNC_POL_NEG; 6247ea6e6e4SVincent Abriou DBGFS_PRINT_STR("Vsync polarity:", tmp ? "inverted" : "normal"); 6257ea6e6e4SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 6267ea6e6e4SVincent Abriou tmp = val & HDMI_CFG_422_EN; 6277ea6e6e4SVincent Abriou DBGFS_PRINT_STR("YUV422 format:", tmp ? "enable" : "disable"); 6287ea6e6e4SVincent Abriou } 6297ea6e6e4SVincent Abriou 6307ea6e6e4SVincent Abriou static void hdmi_dbg_sta(struct seq_file *s, int val) 6317ea6e6e4SVincent Abriou { 6327ea6e6e4SVincent Abriou int tmp; 6337ea6e6e4SVincent Abriou 634e9635133SMarkus Elfring seq_putc(s, '\t'); 6357ea6e6e4SVincent Abriou tmp = (val & HDMI_STA_DLL_LCK); 6367ea6e6e4SVincent Abriou DBGFS_PRINT_STR("pll:", tmp ? "locked" : "not locked"); 6377ea6e6e4SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 6387ea6e6e4SVincent Abriou tmp = (val & HDMI_STA_HOT_PLUG); 6397ea6e6e4SVincent Abriou DBGFS_PRINT_STR("hdmi cable:", tmp ? "connected" : "not connected"); 6407ea6e6e4SVincent Abriou } 6417ea6e6e4SVincent Abriou 6427ea6e6e4SVincent Abriou static void hdmi_dbg_sw_di_cfg(struct seq_file *s, int val) 6437ea6e6e4SVincent Abriou { 6447ea6e6e4SVincent Abriou int tmp; 6457ea6e6e4SVincent Abriou char *const en_di[] = {"no transmission", 6467ea6e6e4SVincent Abriou "single transmission", 6477ea6e6e4SVincent Abriou "once every field", 6487ea6e6e4SVincent Abriou "once every frame"}; 6497ea6e6e4SVincent Abriou 650e9635133SMarkus Elfring seq_putc(s, '\t'); 6517ea6e6e4SVincent Abriou tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 1)); 6527ea6e6e4SVincent Abriou DBGFS_PRINT_STR("Data island 1:", en_di[tmp]); 6537ea6e6e4SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 6547ea6e6e4SVincent Abriou tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 2)) >> 4; 6557ea6e6e4SVincent Abriou DBGFS_PRINT_STR("Data island 2:", en_di[tmp]); 6567ea6e6e4SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 6577ea6e6e4SVincent Abriou tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 3)) >> 8; 6587ea6e6e4SVincent Abriou DBGFS_PRINT_STR("Data island 3:", en_di[tmp]); 6597ea6e6e4SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 6607ea6e6e4SVincent Abriou tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 4)) >> 12; 6617ea6e6e4SVincent Abriou DBGFS_PRINT_STR("Data island 4:", en_di[tmp]); 6627ea6e6e4SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 6637ea6e6e4SVincent Abriou tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 5)) >> 16; 6647ea6e6e4SVincent Abriou DBGFS_PRINT_STR("Data island 5:", en_di[tmp]); 6657ea6e6e4SVincent Abriou seq_puts(s, "\t\t\t\t\t"); 6667ea6e6e4SVincent Abriou tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 6)) >> 20; 6677ea6e6e4SVincent Abriou DBGFS_PRINT_STR("Data island 6:", en_di[tmp]); 6687ea6e6e4SVincent Abriou } 6697ea6e6e4SVincent Abriou 6707ea6e6e4SVincent Abriou static int hdmi_dbg_show(struct seq_file *s, void *data) 6717ea6e6e4SVincent Abriou { 6727ea6e6e4SVincent Abriou struct drm_info_node *node = s->private; 6737ea6e6e4SVincent Abriou struct sti_hdmi *hdmi = (struct sti_hdmi *)node->info_ent->data; 6747ea6e6e4SVincent Abriou 6757ea6e6e4SVincent Abriou seq_printf(s, "HDMI: (vaddr = 0x%p)", hdmi->regs); 6767ea6e6e4SVincent Abriou DBGFS_DUMP("\n", HDMI_CFG); 6777ea6e6e4SVincent Abriou hdmi_dbg_cfg(s, hdmi_read(hdmi, HDMI_CFG)); 6787ea6e6e4SVincent Abriou DBGFS_DUMP("", HDMI_INT_EN); 6797ea6e6e4SVincent Abriou DBGFS_DUMP("\n", HDMI_STA); 6807ea6e6e4SVincent Abriou hdmi_dbg_sta(s, hdmi_read(hdmi, HDMI_STA)); 6817ea6e6e4SVincent Abriou DBGFS_DUMP("", HDMI_ACTIVE_VID_XMIN); 682e9635133SMarkus Elfring seq_putc(s, '\t'); 6837ea6e6e4SVincent Abriou DBGFS_PRINT_INT("Xmin:", hdmi_read(hdmi, HDMI_ACTIVE_VID_XMIN)); 6847ea6e6e4SVincent Abriou DBGFS_DUMP("", HDMI_ACTIVE_VID_XMAX); 685e9635133SMarkus Elfring seq_putc(s, '\t'); 6867ea6e6e4SVincent Abriou DBGFS_PRINT_INT("Xmax:", hdmi_read(hdmi, HDMI_ACTIVE_VID_XMAX)); 6877ea6e6e4SVincent Abriou DBGFS_DUMP("", HDMI_ACTIVE_VID_YMIN); 688e9635133SMarkus Elfring seq_putc(s, '\t'); 6897ea6e6e4SVincent Abriou DBGFS_PRINT_INT("Ymin:", hdmi_read(hdmi, HDMI_ACTIVE_VID_YMIN)); 6907ea6e6e4SVincent Abriou DBGFS_DUMP("", HDMI_ACTIVE_VID_YMAX); 691e9635133SMarkus Elfring seq_putc(s, '\t'); 6927ea6e6e4SVincent Abriou DBGFS_PRINT_INT("Ymax:", hdmi_read(hdmi, HDMI_ACTIVE_VID_YMAX)); 6937ea6e6e4SVincent Abriou DBGFS_DUMP("", HDMI_SW_DI_CFG); 6947ea6e6e4SVincent Abriou hdmi_dbg_sw_di_cfg(s, hdmi_read(hdmi, HDMI_SW_DI_CFG)); 6957ea6e6e4SVincent Abriou 6962c348e50SArnaud Pouliquen DBGFS_DUMP("\n", HDMI_AUDIO_CFG); 6972c348e50SArnaud Pouliquen DBGFS_DUMP("\n", HDMI_SPDIF_FIFO_STATUS); 6982c348e50SArnaud Pouliquen DBGFS_DUMP("\n", HDMI_AUDN); 6992c348e50SArnaud Pouliquen 7007ea6e6e4SVincent Abriou seq_printf(s, "\n AVI Infoframe (Data Island slot N=%d):", 7017ea6e6e4SVincent Abriou HDMI_IFRAME_SLOT_AVI); 7027ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_HEAD_WORD, HDMI_IFRAME_SLOT_AVI); 7037ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD0, HDMI_IFRAME_SLOT_AVI); 7047ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD1, HDMI_IFRAME_SLOT_AVI); 7057ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD2, HDMI_IFRAME_SLOT_AVI); 7067ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD3, HDMI_IFRAME_SLOT_AVI); 7077ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD4, HDMI_IFRAME_SLOT_AVI); 7087ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD5, HDMI_IFRAME_SLOT_AVI); 7097ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD6, HDMI_IFRAME_SLOT_AVI); 710ecf79d15SMarkus Elfring seq_printf(s, "\n\n AUDIO Infoframe (Data Island slot N=%d):", 7117ea6e6e4SVincent Abriou HDMI_IFRAME_SLOT_AUDIO); 7127ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_HEAD_WORD, HDMI_IFRAME_SLOT_AUDIO); 7137ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD0, HDMI_IFRAME_SLOT_AUDIO); 7147ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD1, HDMI_IFRAME_SLOT_AUDIO); 7157ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD2, HDMI_IFRAME_SLOT_AUDIO); 7167ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD3, HDMI_IFRAME_SLOT_AUDIO); 7177ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD4, HDMI_IFRAME_SLOT_AUDIO); 7187ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD5, HDMI_IFRAME_SLOT_AUDIO); 7197ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD6, HDMI_IFRAME_SLOT_AUDIO); 720ecf79d15SMarkus Elfring seq_printf(s, "\n\n VENDOR SPECIFIC Infoframe (Data Island slot N=%d):", 7217ea6e6e4SVincent Abriou HDMI_IFRAME_SLOT_VENDOR); 7227ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_HEAD_WORD, HDMI_IFRAME_SLOT_VENDOR); 7237ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD0, HDMI_IFRAME_SLOT_VENDOR); 7247ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD1, HDMI_IFRAME_SLOT_VENDOR); 7257ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD2, HDMI_IFRAME_SLOT_VENDOR); 7267ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD3, HDMI_IFRAME_SLOT_VENDOR); 7277ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD4, HDMI_IFRAME_SLOT_VENDOR); 7287ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD5, HDMI_IFRAME_SLOT_VENDOR); 7297ea6e6e4SVincent Abriou DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD6, HDMI_IFRAME_SLOT_VENDOR); 730e9635133SMarkus Elfring seq_putc(s, '\n'); 7317ea6e6e4SVincent Abriou return 0; 7327ea6e6e4SVincent Abriou } 7337ea6e6e4SVincent Abriou 7347ea6e6e4SVincent Abriou static struct drm_info_list hdmi_debugfs_files[] = { 7357ea6e6e4SVincent Abriou { "hdmi", hdmi_dbg_show, 0, NULL }, 7367ea6e6e4SVincent Abriou }; 7377ea6e6e4SVincent Abriou 73854ac836bSWambui Karuga static void hdmi_debugfs_init(struct sti_hdmi *hdmi, struct drm_minor *minor) 7397ea6e6e4SVincent Abriou { 7407ea6e6e4SVincent Abriou unsigned int i; 7417ea6e6e4SVincent Abriou 7427ea6e6e4SVincent Abriou for (i = 0; i < ARRAY_SIZE(hdmi_debugfs_files); i++) 7437ea6e6e4SVincent Abriou hdmi_debugfs_files[i].data = hdmi; 7447ea6e6e4SVincent Abriou 74554ac836bSWambui Karuga drm_debugfs_create_files(hdmi_debugfs_files, 7467ea6e6e4SVincent Abriou ARRAY_SIZE(hdmi_debugfs_files), 7477ea6e6e4SVincent Abriou minor->debugfs_root, minor); 7487ea6e6e4SVincent Abriou } 7497ea6e6e4SVincent Abriou 7505402626cSBenjamin Gaignard static void sti_hdmi_disable(struct drm_bridge *bridge) 7515402626cSBenjamin Gaignard { 7525402626cSBenjamin Gaignard struct sti_hdmi *hdmi = bridge->driver_private; 7535402626cSBenjamin Gaignard 7545402626cSBenjamin Gaignard u32 val = hdmi_read(hdmi, HDMI_CFG); 7555402626cSBenjamin Gaignard 7565402626cSBenjamin Gaignard if (!hdmi->enabled) 7575402626cSBenjamin Gaignard return; 7585402626cSBenjamin Gaignard 7595402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("\n"); 7605402626cSBenjamin Gaignard 7615402626cSBenjamin Gaignard /* Disable HDMI */ 7625402626cSBenjamin Gaignard val &= ~HDMI_CFG_DEVICE_EN; 7635402626cSBenjamin Gaignard hdmi_write(hdmi, val, HDMI_CFG); 7645402626cSBenjamin Gaignard 7655402626cSBenjamin Gaignard hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR); 7665402626cSBenjamin Gaignard 7675402626cSBenjamin Gaignard /* Stop the phy */ 7685402626cSBenjamin Gaignard hdmi->phy_ops->stop(hdmi); 7695402626cSBenjamin Gaignard 770181975a2SVincent Abriou /* Reset info frame transmission */ 771181975a2SVincent Abriou hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AVI); 772181975a2SVincent Abriou hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AUDIO); 773e42e7bd7SVincent Abriou hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_VENDOR); 774181975a2SVincent Abriou 7755402626cSBenjamin Gaignard /* Set the default channel data to be a dark red */ 7765402626cSBenjamin Gaignard hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT); 7775402626cSBenjamin Gaignard hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT); 7785402626cSBenjamin Gaignard hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT); 7795402626cSBenjamin Gaignard 7805402626cSBenjamin Gaignard /* Disable/unprepare hdmi clock */ 7815402626cSBenjamin Gaignard clk_disable_unprepare(hdmi->clk_phy); 7825402626cSBenjamin Gaignard clk_disable_unprepare(hdmi->clk_tmds); 7835402626cSBenjamin Gaignard clk_disable_unprepare(hdmi->clk_pix); 7845402626cSBenjamin Gaignard 7855402626cSBenjamin Gaignard hdmi->enabled = false; 786bca55958SBenjamin Gaignard 787bca55958SBenjamin Gaignard cec_notifier_set_phys_addr(hdmi->notifier, CEC_PHYS_ADDR_INVALID); 7885402626cSBenjamin Gaignard } 7895402626cSBenjamin Gaignard 79025d4cb51SRandy Dunlap /* 791dd841870SArnaud Pouliquen * sti_hdmi_audio_get_non_coherent_n() - get N parameter for non-coherent 792dd841870SArnaud Pouliquen * clocks. None-coherent clocks means that audio and TMDS clocks have not the 793dd841870SArnaud Pouliquen * same source (drifts between clocks). In this case assumption is that CTS is 794dd841870SArnaud Pouliquen * automatically calculated by hardware. 795dd841870SArnaud Pouliquen * 796dd841870SArnaud Pouliquen * @audio_fs: audio frame clock frequency in Hz 797dd841870SArnaud Pouliquen * 798dd841870SArnaud Pouliquen * Values computed are based on table described in HDMI specification 1.4b 799dd841870SArnaud Pouliquen * 800dd841870SArnaud Pouliquen * Returns n value. 801dd841870SArnaud Pouliquen */ 802dd841870SArnaud Pouliquen static int sti_hdmi_audio_get_non_coherent_n(unsigned int audio_fs) 803dd841870SArnaud Pouliquen { 804dd841870SArnaud Pouliquen unsigned int n; 805dd841870SArnaud Pouliquen 806dd841870SArnaud Pouliquen switch (audio_fs) { 807dd841870SArnaud Pouliquen case 32000: 808dd841870SArnaud Pouliquen n = 4096; 809dd841870SArnaud Pouliquen break; 810dd841870SArnaud Pouliquen case 44100: 811dd841870SArnaud Pouliquen n = 6272; 812dd841870SArnaud Pouliquen break; 813dd841870SArnaud Pouliquen case 48000: 814dd841870SArnaud Pouliquen n = 6144; 815dd841870SArnaud Pouliquen break; 816dd841870SArnaud Pouliquen case 88200: 817dd841870SArnaud Pouliquen n = 6272 * 2; 818dd841870SArnaud Pouliquen break; 819dd841870SArnaud Pouliquen case 96000: 820dd841870SArnaud Pouliquen n = 6144 * 2; 821dd841870SArnaud Pouliquen break; 822dd841870SArnaud Pouliquen case 176400: 823dd841870SArnaud Pouliquen n = 6272 * 4; 824dd841870SArnaud Pouliquen break; 825dd841870SArnaud Pouliquen case 192000: 826dd841870SArnaud Pouliquen n = 6144 * 4; 827dd841870SArnaud Pouliquen break; 828dd841870SArnaud Pouliquen default: 829dd841870SArnaud Pouliquen /* Not pre-defined, recommended value: 128 * fs / 1000 */ 830dd841870SArnaud Pouliquen n = (audio_fs * 128) / 1000; 831dd841870SArnaud Pouliquen } 832dd841870SArnaud Pouliquen 833dd841870SArnaud Pouliquen return n; 834dd841870SArnaud Pouliquen } 835dd841870SArnaud Pouliquen 836dd841870SArnaud Pouliquen static int hdmi_audio_configure(struct sti_hdmi *hdmi) 837dd841870SArnaud Pouliquen { 838dd841870SArnaud Pouliquen int audio_cfg, n; 839dd841870SArnaud Pouliquen struct hdmi_audio_params *params = &hdmi->audio; 840dd841870SArnaud Pouliquen struct hdmi_audio_infoframe *info = ¶ms->cea; 841dd841870SArnaud Pouliquen 842dd841870SArnaud Pouliquen DRM_DEBUG_DRIVER("\n"); 843dd841870SArnaud Pouliquen 844dd841870SArnaud Pouliquen if (!hdmi->enabled) 845dd841870SArnaud Pouliquen return 0; 846dd841870SArnaud Pouliquen 847dd841870SArnaud Pouliquen /* update N parameter */ 848dd841870SArnaud Pouliquen n = sti_hdmi_audio_get_non_coherent_n(params->sample_rate); 849dd841870SArnaud Pouliquen 850dd841870SArnaud Pouliquen DRM_DEBUG_DRIVER("Audio rate = %d Hz, TMDS clock = %d Hz, n = %d\n", 851dd841870SArnaud Pouliquen params->sample_rate, hdmi->mode.clock * 1000, n); 852dd841870SArnaud Pouliquen hdmi_write(hdmi, n, HDMI_AUDN); 853dd841870SArnaud Pouliquen 854dd841870SArnaud Pouliquen /* update HDMI registers according to configuration */ 855dd841870SArnaud Pouliquen audio_cfg = HDMI_AUD_CFG_SPDIF_DIV_2 | HDMI_AUD_CFG_DTS_INVALID | 856dd841870SArnaud Pouliquen HDMI_AUD_CFG_ONE_BIT_INVALID; 857dd841870SArnaud Pouliquen 858dd841870SArnaud Pouliquen switch (info->channels) { 859dd841870SArnaud Pouliquen case 8: 860dd841870SArnaud Pouliquen audio_cfg |= HDMI_AUD_CFG_CH78_VALID; 861df561f66SGustavo A. R. Silva fallthrough; 862dd841870SArnaud Pouliquen case 6: 863dd841870SArnaud Pouliquen audio_cfg |= HDMI_AUD_CFG_CH56_VALID; 864df561f66SGustavo A. R. Silva fallthrough; 865dd841870SArnaud Pouliquen case 4: 866dd841870SArnaud Pouliquen audio_cfg |= HDMI_AUD_CFG_CH34_VALID | HDMI_AUD_CFG_8CH; 867df561f66SGustavo A. R. Silva fallthrough; 868dd841870SArnaud Pouliquen case 2: 869dd841870SArnaud Pouliquen audio_cfg |= HDMI_AUD_CFG_CH12_VALID; 870dd841870SArnaud Pouliquen break; 871dd841870SArnaud Pouliquen default: 872dd841870SArnaud Pouliquen DRM_ERROR("ERROR: Unsupported number of channels (%d)!\n", 873dd841870SArnaud Pouliquen info->channels); 874dd841870SArnaud Pouliquen return -EINVAL; 875dd841870SArnaud Pouliquen } 876dd841870SArnaud Pouliquen 877dd841870SArnaud Pouliquen hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG); 878dd841870SArnaud Pouliquen 879dd841870SArnaud Pouliquen return hdmi_audio_infoframe_config(hdmi); 880dd841870SArnaud Pouliquen } 881dd841870SArnaud Pouliquen 8825402626cSBenjamin Gaignard static void sti_hdmi_pre_enable(struct drm_bridge *bridge) 8835402626cSBenjamin Gaignard { 8845402626cSBenjamin Gaignard struct sti_hdmi *hdmi = bridge->driver_private; 8855402626cSBenjamin Gaignard 8865402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("\n"); 8875402626cSBenjamin Gaignard 8885402626cSBenjamin Gaignard if (hdmi->enabled) 8895402626cSBenjamin Gaignard return; 8905402626cSBenjamin Gaignard 8915402626cSBenjamin Gaignard /* Prepare/enable clocks */ 8925402626cSBenjamin Gaignard if (clk_prepare_enable(hdmi->clk_pix)) 8935402626cSBenjamin Gaignard DRM_ERROR("Failed to prepare/enable hdmi_pix clk\n"); 8945402626cSBenjamin Gaignard if (clk_prepare_enable(hdmi->clk_tmds)) 8955402626cSBenjamin Gaignard DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n"); 8965402626cSBenjamin Gaignard if (clk_prepare_enable(hdmi->clk_phy)) 89715431b11SColin Ian King DRM_ERROR("Failed to prepare/enable hdmi_rejection_pll clk\n"); 8985402626cSBenjamin Gaignard 8995402626cSBenjamin Gaignard hdmi->enabled = true; 9005402626cSBenjamin Gaignard 9015402626cSBenjamin Gaignard /* Program hdmi serializer and start phy */ 9025402626cSBenjamin Gaignard if (!hdmi->phy_ops->start(hdmi)) { 9035402626cSBenjamin Gaignard DRM_ERROR("Unable to start hdmi phy\n"); 9045402626cSBenjamin Gaignard return; 9055402626cSBenjamin Gaignard } 9065402626cSBenjamin Gaignard 9075402626cSBenjamin Gaignard /* Program hdmi active area */ 9085402626cSBenjamin Gaignard hdmi_active_area(hdmi); 9095402626cSBenjamin Gaignard 9105402626cSBenjamin Gaignard /* Enable working interrupts */ 9115402626cSBenjamin Gaignard hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN); 9125402626cSBenjamin Gaignard 9135402626cSBenjamin Gaignard /* Program hdmi config */ 9145402626cSBenjamin Gaignard hdmi_config(hdmi); 9155402626cSBenjamin Gaignard 9165402626cSBenjamin Gaignard /* Program AVI infoframe */ 9175402626cSBenjamin Gaignard if (hdmi_avi_infoframe_config(hdmi)) 9185402626cSBenjamin Gaignard DRM_ERROR("Unable to configure AVI infoframe\n"); 9195402626cSBenjamin Gaignard 920dd841870SArnaud Pouliquen if (hdmi->audio.enabled) { 921dd841870SArnaud Pouliquen if (hdmi_audio_configure(hdmi)) 922dd841870SArnaud Pouliquen DRM_ERROR("Unable to configure audio\n"); 923dd841870SArnaud Pouliquen } else { 924dd841870SArnaud Pouliquen hdmi_audio_infoframe_config(hdmi); 925dd841870SArnaud Pouliquen } 926cffe1e89SArnaud Pouliquen 927e42e7bd7SVincent Abriou /* Program VS infoframe */ 928e42e7bd7SVincent Abriou if (hdmi_vendor_infoframe_config(hdmi)) 929e42e7bd7SVincent Abriou DRM_ERROR("Unable to configure VS infoframe\n"); 930e42e7bd7SVincent Abriou 9315402626cSBenjamin Gaignard /* Sw reset */ 9325402626cSBenjamin Gaignard hdmi_swreset(hdmi); 9335402626cSBenjamin Gaignard } 9345402626cSBenjamin Gaignard 9355402626cSBenjamin Gaignard static void sti_hdmi_set_mode(struct drm_bridge *bridge, 93663f8f3baSLaurent Pinchart const struct drm_display_mode *mode, 93763f8f3baSLaurent Pinchart const struct drm_display_mode *adjusted_mode) 9385402626cSBenjamin Gaignard { 9395402626cSBenjamin Gaignard struct sti_hdmi *hdmi = bridge->driver_private; 9405402626cSBenjamin Gaignard int ret; 9415402626cSBenjamin Gaignard 9425402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("\n"); 9435402626cSBenjamin Gaignard 9445402626cSBenjamin Gaignard /* Copy the drm display mode in the connector local structure */ 945442cf8e2SVille Syrjälä drm_mode_copy(&hdmi->mode, mode); 9465402626cSBenjamin Gaignard 9475402626cSBenjamin Gaignard /* Update clock framerate according to the selected mode */ 9485402626cSBenjamin Gaignard ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000); 9495402626cSBenjamin Gaignard if (ret < 0) { 9505402626cSBenjamin Gaignard DRM_ERROR("Cannot set rate (%dHz) for hdmi_pix clk\n", 9515402626cSBenjamin Gaignard mode->clock * 1000); 9525402626cSBenjamin Gaignard return; 9535402626cSBenjamin Gaignard } 9545402626cSBenjamin Gaignard ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000); 9555402626cSBenjamin Gaignard if (ret < 0) { 9565402626cSBenjamin Gaignard DRM_ERROR("Cannot set rate (%dHz) for hdmi_rejection_pll clk\n", 9575402626cSBenjamin Gaignard mode->clock * 1000); 9585402626cSBenjamin Gaignard return; 9595402626cSBenjamin Gaignard } 9605402626cSBenjamin Gaignard } 9615402626cSBenjamin Gaignard 9625402626cSBenjamin Gaignard static void sti_hdmi_bridge_nope(struct drm_bridge *bridge) 9635402626cSBenjamin Gaignard { 9645402626cSBenjamin Gaignard /* do nothing */ 9655402626cSBenjamin Gaignard } 9665402626cSBenjamin Gaignard 9675402626cSBenjamin Gaignard static const struct drm_bridge_funcs sti_hdmi_bridge_funcs = { 9685402626cSBenjamin Gaignard .pre_enable = sti_hdmi_pre_enable, 9695402626cSBenjamin Gaignard .enable = sti_hdmi_bridge_nope, 9705402626cSBenjamin Gaignard .disable = sti_hdmi_disable, 9715402626cSBenjamin Gaignard .post_disable = sti_hdmi_bridge_nope, 9725402626cSBenjamin Gaignard .mode_set = sti_hdmi_set_mode, 9735402626cSBenjamin Gaignard }; 9745402626cSBenjamin Gaignard 9755402626cSBenjamin Gaignard static int sti_hdmi_connector_get_modes(struct drm_connector *connector) 9765402626cSBenjamin Gaignard { 977*f7945d9fSJani Nikula const struct drm_display_info *info = &connector->display_info; 97841a14623SBenjamin Gaignard struct sti_hdmi_connector *hdmi_connector 97941a14623SBenjamin Gaignard = to_sti_hdmi_connector(connector); 98041a14623SBenjamin Gaignard struct sti_hdmi *hdmi = hdmi_connector->hdmi; 981*f7945d9fSJani Nikula const struct drm_edid *drm_edid; 9825402626cSBenjamin Gaignard int count; 9835402626cSBenjamin Gaignard 9845402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("\n"); 9855402626cSBenjamin Gaignard 986*f7945d9fSJani Nikula drm_edid = drm_edid_read(connector); 987*f7945d9fSJani Nikula 988*f7945d9fSJani Nikula drm_edid_connector_update(connector, drm_edid); 989*f7945d9fSJani Nikula 990*f7945d9fSJani Nikula cec_notifier_set_phys_addr(hdmi->notifier, 991*f7945d9fSJani Nikula connector->display_info.source_physical_address); 992*f7945d9fSJani Nikula 993*f7945d9fSJani Nikula if (!drm_edid) 9945402626cSBenjamin Gaignard goto fail; 9955402626cSBenjamin Gaignard 996*f7945d9fSJani Nikula count = drm_edid_connector_add_modes(connector); 9975402626cSBenjamin Gaignard 998851c1aaeSJani Nikula DRM_DEBUG_KMS("%s : %dx%d cm\n", 999*f7945d9fSJani Nikula info->is_hdmi ? "hdmi monitor" : "dvi monitor", 1000*f7945d9fSJani Nikula info->width_mm / 10, info->height_mm / 10); 1001851c1aaeSJani Nikula 1002*f7945d9fSJani Nikula drm_edid_free(drm_edid); 10035402626cSBenjamin Gaignard return count; 10045402626cSBenjamin Gaignard 10055402626cSBenjamin Gaignard fail: 1006871bcdfeSVincent Abriou DRM_ERROR("Can't read HDMI EDID\n"); 10075402626cSBenjamin Gaignard return 0; 10085402626cSBenjamin Gaignard } 10095402626cSBenjamin Gaignard 10105402626cSBenjamin Gaignard #define CLK_TOLERANCE_HZ 50 10115402626cSBenjamin Gaignard 10120ad811ccSNathan Chancellor static enum drm_mode_status 10130ad811ccSNathan Chancellor sti_hdmi_connector_mode_valid(struct drm_connector *connector, 10145402626cSBenjamin Gaignard struct drm_display_mode *mode) 10155402626cSBenjamin Gaignard { 10165402626cSBenjamin Gaignard int target = mode->clock * 1000; 10175402626cSBenjamin Gaignard int target_min = target - CLK_TOLERANCE_HZ; 10185402626cSBenjamin Gaignard int target_max = target + CLK_TOLERANCE_HZ; 10195402626cSBenjamin Gaignard int result; 10205402626cSBenjamin Gaignard struct sti_hdmi_connector *hdmi_connector 10215402626cSBenjamin Gaignard = to_sti_hdmi_connector(connector); 10225402626cSBenjamin Gaignard struct sti_hdmi *hdmi = hdmi_connector->hdmi; 10235402626cSBenjamin Gaignard 10245402626cSBenjamin Gaignard 10255402626cSBenjamin Gaignard result = clk_round_rate(hdmi->clk_pix, target); 10265402626cSBenjamin Gaignard 10275402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n", 10285402626cSBenjamin Gaignard target, result); 10295402626cSBenjamin Gaignard 10305402626cSBenjamin Gaignard if ((result < target_min) || (result > target_max)) { 10315402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target); 10325402626cSBenjamin Gaignard return MODE_BAD; 10335402626cSBenjamin Gaignard } 10345402626cSBenjamin Gaignard 10355402626cSBenjamin Gaignard return MODE_OK; 10365402626cSBenjamin Gaignard } 10375402626cSBenjamin Gaignard 1038c5de4853SVille Syrjälä static const 1039c5de4853SVille Syrjälä struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs = { 10405402626cSBenjamin Gaignard .get_modes = sti_hdmi_connector_get_modes, 10415402626cSBenjamin Gaignard .mode_valid = sti_hdmi_connector_mode_valid, 10425402626cSBenjamin Gaignard }; 10435402626cSBenjamin Gaignard 10445402626cSBenjamin Gaignard /* get detection status of display device */ 10455402626cSBenjamin Gaignard static enum drm_connector_status 10465402626cSBenjamin Gaignard sti_hdmi_connector_detect(struct drm_connector *connector, bool force) 10475402626cSBenjamin Gaignard { 10485402626cSBenjamin Gaignard struct sti_hdmi_connector *hdmi_connector 10495402626cSBenjamin Gaignard = to_sti_hdmi_connector(connector); 10505402626cSBenjamin Gaignard struct sti_hdmi *hdmi = hdmi_connector->hdmi; 10515402626cSBenjamin Gaignard 10525402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("\n"); 10535402626cSBenjamin Gaignard 10545402626cSBenjamin Gaignard if (hdmi->hpd) { 10555402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("hdmi cable connected\n"); 10565402626cSBenjamin Gaignard return connector_status_connected; 10575402626cSBenjamin Gaignard } 10585402626cSBenjamin Gaignard 10595402626cSBenjamin Gaignard DRM_DEBUG_DRIVER("hdmi cable disconnected\n"); 1060bca55958SBenjamin Gaignard cec_notifier_set_phys_addr(hdmi->notifier, CEC_PHYS_ADDR_INVALID); 10615402626cSBenjamin Gaignard return connector_status_disconnected; 10625402626cSBenjamin Gaignard } 10635402626cSBenjamin Gaignard 10645671cefbSVincent Abriou static void sti_hdmi_connector_init_property(struct drm_device *drm_dev, 10655671cefbSVincent Abriou struct drm_connector *connector) 10665671cefbSVincent Abriou { 10675671cefbSVincent Abriou struct sti_hdmi_connector *hdmi_connector 10685671cefbSVincent Abriou = to_sti_hdmi_connector(connector); 10695671cefbSVincent Abriou struct sti_hdmi *hdmi = hdmi_connector->hdmi; 10705671cefbSVincent Abriou struct drm_property *prop; 10715671cefbSVincent Abriou 10725671cefbSVincent Abriou /* colorspace property */ 10735671cefbSVincent Abriou hdmi->colorspace = DEFAULT_COLORSPACE_MODE; 10745671cefbSVincent Abriou prop = drm_property_create_enum(drm_dev, 0, "colorspace", 10755671cefbSVincent Abriou colorspace_mode_names, 10765671cefbSVincent Abriou ARRAY_SIZE(colorspace_mode_names)); 10775671cefbSVincent Abriou if (!prop) { 10785671cefbSVincent Abriou DRM_ERROR("fails to create colorspace property\n"); 10795671cefbSVincent Abriou return; 10805671cefbSVincent Abriou } 10815671cefbSVincent Abriou hdmi_connector->colorspace_property = prop; 10825671cefbSVincent Abriou drm_object_attach_property(&connector->base, prop, hdmi->colorspace); 10835671cefbSVincent Abriou } 10845671cefbSVincent Abriou 10855671cefbSVincent Abriou static int 10865671cefbSVincent Abriou sti_hdmi_connector_set_property(struct drm_connector *connector, 10875671cefbSVincent Abriou struct drm_connector_state *state, 10885671cefbSVincent Abriou struct drm_property *property, 10895671cefbSVincent Abriou uint64_t val) 10905671cefbSVincent Abriou { 10915671cefbSVincent Abriou struct sti_hdmi_connector *hdmi_connector 10925671cefbSVincent Abriou = to_sti_hdmi_connector(connector); 10935671cefbSVincent Abriou struct sti_hdmi *hdmi = hdmi_connector->hdmi; 10945671cefbSVincent Abriou 10955671cefbSVincent Abriou if (property == hdmi_connector->colorspace_property) { 10965671cefbSVincent Abriou hdmi->colorspace = val; 10975671cefbSVincent Abriou return 0; 10985671cefbSVincent Abriou } 10995671cefbSVincent Abriou 11005671cefbSVincent Abriou DRM_ERROR("failed to set hdmi connector property\n"); 11015671cefbSVincent Abriou return -EINVAL; 11025671cefbSVincent Abriou } 11035671cefbSVincent Abriou 11045671cefbSVincent Abriou static int 11055671cefbSVincent Abriou sti_hdmi_connector_get_property(struct drm_connector *connector, 11065671cefbSVincent Abriou const struct drm_connector_state *state, 11075671cefbSVincent Abriou struct drm_property *property, 11085671cefbSVincent Abriou uint64_t *val) 11095671cefbSVincent Abriou { 11105671cefbSVincent Abriou struct sti_hdmi_connector *hdmi_connector 11115671cefbSVincent Abriou = to_sti_hdmi_connector(connector); 11125671cefbSVincent Abriou struct sti_hdmi *hdmi = hdmi_connector->hdmi; 11135671cefbSVincent Abriou 11145671cefbSVincent Abriou if (property == hdmi_connector->colorspace_property) { 11155671cefbSVincent Abriou *val = hdmi->colorspace; 11165671cefbSVincent Abriou return 0; 11175671cefbSVincent Abriou } 11185671cefbSVincent Abriou 11195671cefbSVincent Abriou DRM_ERROR("failed to get hdmi connector property\n"); 11205671cefbSVincent Abriou return -EINVAL; 11215671cefbSVincent Abriou } 11225671cefbSVincent Abriou 112383af0a48SBenjamin Gaignard static int sti_hdmi_late_register(struct drm_connector *connector) 112483af0a48SBenjamin Gaignard { 112583af0a48SBenjamin Gaignard struct sti_hdmi_connector *hdmi_connector 112683af0a48SBenjamin Gaignard = to_sti_hdmi_connector(connector); 112783af0a48SBenjamin Gaignard struct sti_hdmi *hdmi = hdmi_connector->hdmi; 112883af0a48SBenjamin Gaignard 112954ac836bSWambui Karuga hdmi_debugfs_init(hdmi, hdmi->drm_dev->primary); 113083af0a48SBenjamin Gaignard 113183af0a48SBenjamin Gaignard return 0; 113283af0a48SBenjamin Gaignard } 113383af0a48SBenjamin Gaignard 1134c5de4853SVille Syrjälä static const struct drm_connector_funcs sti_hdmi_connector_funcs = { 11355402626cSBenjamin Gaignard .fill_modes = drm_helper_probe_single_connector_modes, 11365402626cSBenjamin Gaignard .detect = sti_hdmi_connector_detect, 113784601dbdSBenjamin Gaignard .destroy = drm_connector_cleanup, 1138de4b00b0SBenjamin Gaignard .reset = drm_atomic_helper_connector_reset, 11395671cefbSVincent Abriou .atomic_set_property = sti_hdmi_connector_set_property, 11405671cefbSVincent Abriou .atomic_get_property = sti_hdmi_connector_get_property, 1141de4b00b0SBenjamin Gaignard .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 1142de4b00b0SBenjamin Gaignard .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 114383af0a48SBenjamin Gaignard .late_register = sti_hdmi_late_register, 11445402626cSBenjamin Gaignard }; 11455402626cSBenjamin Gaignard 11465402626cSBenjamin Gaignard static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev) 11475402626cSBenjamin Gaignard { 11485402626cSBenjamin Gaignard struct drm_encoder *encoder; 11495402626cSBenjamin Gaignard 11505402626cSBenjamin Gaignard list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 11515402626cSBenjamin Gaignard if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) 11525402626cSBenjamin Gaignard return encoder; 11535402626cSBenjamin Gaignard } 11545402626cSBenjamin Gaignard 11555402626cSBenjamin Gaignard return NULL; 11565402626cSBenjamin Gaignard } 11575402626cSBenjamin Gaignard 11585dd0775eSDave Airlie static void hdmi_audio_shutdown(struct device *dev, void *data) 11592c348e50SArnaud Pouliquen { 11602c348e50SArnaud Pouliquen struct sti_hdmi *hdmi = dev_get_drvdata(dev); 11612c348e50SArnaud Pouliquen int audio_cfg; 11622c348e50SArnaud Pouliquen 11632c348e50SArnaud Pouliquen DRM_DEBUG_DRIVER("\n"); 11642c348e50SArnaud Pouliquen 11652c348e50SArnaud Pouliquen /* disable audio */ 11662c348e50SArnaud Pouliquen audio_cfg = HDMI_AUD_CFG_SPDIF_DIV_2 | HDMI_AUD_CFG_DTS_INVALID | 11672c348e50SArnaud Pouliquen HDMI_AUD_CFG_ONE_BIT_INVALID; 11682c348e50SArnaud Pouliquen hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG); 11692c348e50SArnaud Pouliquen 11707c0ca70bSBenjamin Gaignard hdmi->audio.enabled = false; 11712c348e50SArnaud Pouliquen hdmi_audio_infoframe_config(hdmi); 11722c348e50SArnaud Pouliquen } 11732c348e50SArnaud Pouliquen 11742c348e50SArnaud Pouliquen static int hdmi_audio_hw_params(struct device *dev, 11755dd0775eSDave Airlie void *data, 11762c348e50SArnaud Pouliquen struct hdmi_codec_daifmt *daifmt, 11772c348e50SArnaud Pouliquen struct hdmi_codec_params *params) 11782c348e50SArnaud Pouliquen { 11792c348e50SArnaud Pouliquen struct sti_hdmi *hdmi = dev_get_drvdata(dev); 11802c348e50SArnaud Pouliquen int ret; 11812c348e50SArnaud Pouliquen 11822c348e50SArnaud Pouliquen DRM_DEBUG_DRIVER("\n"); 11832c348e50SArnaud Pouliquen 11842c348e50SArnaud Pouliquen if ((daifmt->fmt != HDMI_I2S) || daifmt->bit_clk_inv || 11859f1c8677SMark Brown daifmt->frame_clk_inv || daifmt->bit_clk_provider || 11869f1c8677SMark Brown daifmt->frame_clk_provider) { 11872c348e50SArnaud Pouliquen dev_err(dev, "%s: Bad flags %d %d %d %d\n", __func__, 11882c348e50SArnaud Pouliquen daifmt->bit_clk_inv, daifmt->frame_clk_inv, 11899f1c8677SMark Brown daifmt->bit_clk_provider, 11909f1c8677SMark Brown daifmt->frame_clk_provider); 11912c348e50SArnaud Pouliquen return -EINVAL; 11922c348e50SArnaud Pouliquen } 11932c348e50SArnaud Pouliquen 1194dd841870SArnaud Pouliquen hdmi->audio.sample_width = params->sample_width; 1195dd841870SArnaud Pouliquen hdmi->audio.sample_rate = params->sample_rate; 1196dd841870SArnaud Pouliquen hdmi->audio.cea = params->cea; 11972c348e50SArnaud Pouliquen 1198dd841870SArnaud Pouliquen hdmi->audio.enabled = true; 1199dd841870SArnaud Pouliquen 1200dd841870SArnaud Pouliquen ret = hdmi_audio_configure(hdmi); 12012c348e50SArnaud Pouliquen if (ret < 0) 12022c348e50SArnaud Pouliquen return ret; 12032c348e50SArnaud Pouliquen 12042c348e50SArnaud Pouliquen return 0; 12052c348e50SArnaud Pouliquen } 12062c348e50SArnaud Pouliquen 1207d789710fSKuninori Morimoto static int hdmi_audio_mute(struct device *dev, void *data, 1208d789710fSKuninori Morimoto bool enable, int direction) 12092c348e50SArnaud Pouliquen { 12102c348e50SArnaud Pouliquen struct sti_hdmi *hdmi = dev_get_drvdata(dev); 12112c348e50SArnaud Pouliquen 12122c348e50SArnaud Pouliquen DRM_DEBUG_DRIVER("%s\n", enable ? "enable" : "disable"); 12132c348e50SArnaud Pouliquen 12142c348e50SArnaud Pouliquen if (enable) 12152c348e50SArnaud Pouliquen hdmi_write(hdmi, HDMI_SAMPLE_FLAT_ALL, HDMI_SAMPLE_FLAT_MASK); 12162c348e50SArnaud Pouliquen else 12172c348e50SArnaud Pouliquen hdmi_write(hdmi, HDMI_SAMPLE_FLAT_NO, HDMI_SAMPLE_FLAT_MASK); 12182c348e50SArnaud Pouliquen 12192c348e50SArnaud Pouliquen return 0; 12202c348e50SArnaud Pouliquen } 12212c348e50SArnaud Pouliquen 12225dd0775eSDave Airlie static int hdmi_audio_get_eld(struct device *dev, void *data, uint8_t *buf, size_t len) 12232c348e50SArnaud Pouliquen { 12242c348e50SArnaud Pouliquen struct sti_hdmi *hdmi = dev_get_drvdata(dev); 12252c348e50SArnaud Pouliquen struct drm_connector *connector = hdmi->drm_connector; 12262c348e50SArnaud Pouliquen 12272c348e50SArnaud Pouliquen DRM_DEBUG_DRIVER("\n"); 12282c348e50SArnaud Pouliquen memcpy(buf, connector->eld, min(sizeof(connector->eld), len)); 12292c348e50SArnaud Pouliquen 12302c348e50SArnaud Pouliquen return 0; 12312c348e50SArnaud Pouliquen } 12322c348e50SArnaud Pouliquen 12332c348e50SArnaud Pouliquen static const struct hdmi_codec_ops audio_codec_ops = { 12342c348e50SArnaud Pouliquen .hw_params = hdmi_audio_hw_params, 12352c348e50SArnaud Pouliquen .audio_shutdown = hdmi_audio_shutdown, 1236d789710fSKuninori Morimoto .mute_stream = hdmi_audio_mute, 12372c348e50SArnaud Pouliquen .get_eld = hdmi_audio_get_eld, 1238d789710fSKuninori Morimoto .no_capture_mute = 1, 12392c348e50SArnaud Pouliquen }; 12402c348e50SArnaud Pouliquen 12412c348e50SArnaud Pouliquen static int sti_hdmi_register_audio_driver(struct device *dev, 12422c348e50SArnaud Pouliquen struct sti_hdmi *hdmi) 12432c348e50SArnaud Pouliquen { 12442c348e50SArnaud Pouliquen struct hdmi_codec_pdata codec_data = { 12452c348e50SArnaud Pouliquen .ops = &audio_codec_ops, 12462c348e50SArnaud Pouliquen .max_i2s_channels = 8, 12472c348e50SArnaud Pouliquen .i2s = 1, 12482c348e50SArnaud Pouliquen }; 12492c348e50SArnaud Pouliquen 12502c348e50SArnaud Pouliquen DRM_DEBUG_DRIVER("\n"); 12512c348e50SArnaud Pouliquen 12527c0ca70bSBenjamin Gaignard hdmi->audio.enabled = false; 12532c348e50SArnaud Pouliquen 12542c348e50SArnaud Pouliquen hdmi->audio_pdev = platform_device_register_data( 12552c348e50SArnaud Pouliquen dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO, 12562c348e50SArnaud Pouliquen &codec_data, sizeof(codec_data)); 12572c348e50SArnaud Pouliquen 12582c348e50SArnaud Pouliquen if (IS_ERR(hdmi->audio_pdev)) 12592c348e50SArnaud Pouliquen return PTR_ERR(hdmi->audio_pdev); 12602c348e50SArnaud Pouliquen 12612c348e50SArnaud Pouliquen DRM_INFO("%s Driver bound %s\n", HDMI_CODEC_DRV_NAME, dev_name(dev)); 12622c348e50SArnaud Pouliquen 12632c348e50SArnaud Pouliquen return 0; 12642c348e50SArnaud Pouliquen } 12652c348e50SArnaud Pouliquen 12665402626cSBenjamin Gaignard static int sti_hdmi_bind(struct device *dev, struct device *master, void *data) 12675402626cSBenjamin Gaignard { 12685402626cSBenjamin Gaignard struct sti_hdmi *hdmi = dev_get_drvdata(dev); 12695402626cSBenjamin Gaignard struct drm_device *drm_dev = data; 12705402626cSBenjamin Gaignard struct drm_encoder *encoder; 12715402626cSBenjamin Gaignard struct sti_hdmi_connector *connector; 1272536cce14SDariusz Marcinkiewicz struct cec_connector_info conn_info; 12735402626cSBenjamin Gaignard struct drm_connector *drm_connector; 12745402626cSBenjamin Gaignard struct drm_bridge *bridge; 12755402626cSBenjamin Gaignard int err; 12765402626cSBenjamin Gaignard 12775402626cSBenjamin Gaignard /* Set the drm device handle */ 12785402626cSBenjamin Gaignard hdmi->drm_dev = drm_dev; 12795402626cSBenjamin Gaignard 12805402626cSBenjamin Gaignard encoder = sti_hdmi_find_encoder(drm_dev); 12815402626cSBenjamin Gaignard if (!encoder) 1282807642d7SVladimir Zapolskiy return -EINVAL; 12835402626cSBenjamin Gaignard 12845402626cSBenjamin Gaignard connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL); 12855402626cSBenjamin Gaignard if (!connector) 1286807642d7SVladimir Zapolskiy return -EINVAL; 12875402626cSBenjamin Gaignard 12885402626cSBenjamin Gaignard connector->hdmi = hdmi; 12895402626cSBenjamin Gaignard 12905402626cSBenjamin Gaignard bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL); 12915402626cSBenjamin Gaignard if (!bridge) 1292807642d7SVladimir Zapolskiy return -EINVAL; 12935402626cSBenjamin Gaignard 12945402626cSBenjamin Gaignard bridge->driver_private = hdmi; 1295b07b90fdSAjay Kumar bridge->funcs = &sti_hdmi_bridge_funcs; 1296a25b988fSLaurent Pinchart drm_bridge_attach(encoder, bridge, NULL, 0); 12975402626cSBenjamin Gaignard 12985402626cSBenjamin Gaignard connector->encoder = encoder; 12995402626cSBenjamin Gaignard 13005402626cSBenjamin Gaignard drm_connector = (struct drm_connector *)connector; 13015402626cSBenjamin Gaignard 13025402626cSBenjamin Gaignard drm_connector->polled = DRM_CONNECTOR_POLL_HPD; 13035402626cSBenjamin Gaignard 13047058e766SAndrzej Pietrasiewicz drm_connector_init_with_ddc(drm_dev, drm_connector, 13057058e766SAndrzej Pietrasiewicz &sti_hdmi_connector_funcs, 13067058e766SAndrzej Pietrasiewicz DRM_MODE_CONNECTOR_HDMIA, 13077058e766SAndrzej Pietrasiewicz hdmi->ddc_adapt); 13085402626cSBenjamin Gaignard drm_connector_helper_add(drm_connector, 13095402626cSBenjamin Gaignard &sti_hdmi_connector_helper_funcs); 13105402626cSBenjamin Gaignard 13115671cefbSVincent Abriou /* initialise property */ 13125671cefbSVincent Abriou sti_hdmi_connector_init_property(drm_dev, drm_connector); 13135671cefbSVincent Abriou 13142c348e50SArnaud Pouliquen hdmi->drm_connector = drm_connector; 13152c348e50SArnaud Pouliquen 1316cde4c44dSDaniel Vetter err = drm_connector_attach_encoder(drm_connector, encoder); 13175402626cSBenjamin Gaignard if (err) { 13185402626cSBenjamin Gaignard DRM_ERROR("Failed to attach a connector to a encoder\n"); 13195402626cSBenjamin Gaignard goto err_sysfs; 13205402626cSBenjamin Gaignard } 13215402626cSBenjamin Gaignard 13222c348e50SArnaud Pouliquen err = sti_hdmi_register_audio_driver(dev, hdmi); 13232c348e50SArnaud Pouliquen if (err) { 13242c348e50SArnaud Pouliquen DRM_ERROR("Failed to attach an audio codec\n"); 13252c348e50SArnaud Pouliquen goto err_sysfs; 13262c348e50SArnaud Pouliquen } 13272c348e50SArnaud Pouliquen 13282c348e50SArnaud Pouliquen /* Initialize audio infoframe */ 13292c348e50SArnaud Pouliquen err = hdmi_audio_infoframe_init(&hdmi->audio.cea); 13302c348e50SArnaud Pouliquen if (err) { 13312c348e50SArnaud Pouliquen DRM_ERROR("Failed to init audio infoframe\n"); 13322c348e50SArnaud Pouliquen goto err_sysfs; 13332c348e50SArnaud Pouliquen } 13342c348e50SArnaud Pouliquen 1335536cce14SDariusz Marcinkiewicz cec_fill_conn_info_from_drm(&conn_info, drm_connector); 1336536cce14SDariusz Marcinkiewicz hdmi->notifier = cec_notifier_conn_register(&hdmi->dev, NULL, 1337536cce14SDariusz Marcinkiewicz &conn_info); 1338536cce14SDariusz Marcinkiewicz if (!hdmi->notifier) { 1339536cce14SDariusz Marcinkiewicz hdmi->drm_connector = NULL; 1340536cce14SDariusz Marcinkiewicz return -ENOMEM; 1341536cce14SDariusz Marcinkiewicz } 1342536cce14SDariusz Marcinkiewicz 13435402626cSBenjamin Gaignard /* Enable default interrupts */ 13445402626cSBenjamin Gaignard hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN); 13455402626cSBenjamin Gaignard 13465402626cSBenjamin Gaignard return 0; 13475402626cSBenjamin Gaignard 13485402626cSBenjamin Gaignard err_sysfs: 13492c348e50SArnaud Pouliquen hdmi->drm_connector = NULL; 13505402626cSBenjamin Gaignard return -EINVAL; 13515402626cSBenjamin Gaignard } 13525402626cSBenjamin Gaignard 13535402626cSBenjamin Gaignard static void sti_hdmi_unbind(struct device *dev, 13545402626cSBenjamin Gaignard struct device *master, void *data) 13555402626cSBenjamin Gaignard { 1356536cce14SDariusz Marcinkiewicz struct sti_hdmi *hdmi = dev_get_drvdata(dev); 1357536cce14SDariusz Marcinkiewicz 1358536cce14SDariusz Marcinkiewicz cec_notifier_conn_unregister(hdmi->notifier); 13595402626cSBenjamin Gaignard } 13605402626cSBenjamin Gaignard 13615402626cSBenjamin Gaignard static const struct component_ops sti_hdmi_ops = { 13625402626cSBenjamin Gaignard .bind = sti_hdmi_bind, 13635402626cSBenjamin Gaignard .unbind = sti_hdmi_unbind, 13645402626cSBenjamin Gaignard }; 13655402626cSBenjamin Gaignard 13668e932cf0SKiran Padwal static const struct of_device_id hdmi_of_match[] = { 13675402626cSBenjamin Gaignard { 13685402626cSBenjamin Gaignard .compatible = "st,stih407-hdmi", 13695402626cSBenjamin Gaignard .data = &tx3g4c28phy_ops, 13705402626cSBenjamin Gaignard }, { 13715402626cSBenjamin Gaignard /* end node */ 13725402626cSBenjamin Gaignard } 13735402626cSBenjamin Gaignard }; 13745402626cSBenjamin Gaignard MODULE_DEVICE_TABLE(of, hdmi_of_match); 13755402626cSBenjamin Gaignard 13765402626cSBenjamin Gaignard static int sti_hdmi_probe(struct platform_device *pdev) 13775402626cSBenjamin Gaignard { 13785402626cSBenjamin Gaignard struct device *dev = &pdev->dev; 13795402626cSBenjamin Gaignard struct sti_hdmi *hdmi; 13805402626cSBenjamin Gaignard struct device_node *np = dev->of_node; 13815402626cSBenjamin Gaignard struct resource *res; 138253bdcf5fSBenjamin Gaignard struct device_node *ddc; 13835402626cSBenjamin Gaignard int ret; 13845402626cSBenjamin Gaignard 13855402626cSBenjamin Gaignard DRM_INFO("%s\n", __func__); 13865402626cSBenjamin Gaignard 13875402626cSBenjamin Gaignard hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL); 13885402626cSBenjamin Gaignard if (!hdmi) 13895402626cSBenjamin Gaignard return -ENOMEM; 13905402626cSBenjamin Gaignard 139153bdcf5fSBenjamin Gaignard ddc = of_parse_phandle(pdev->dev.of_node, "ddc", 0); 139253bdcf5fSBenjamin Gaignard if (ddc) { 13934d5821a7SVladimir Zapolskiy hdmi->ddc_adapt = of_get_i2c_adapter_by_node(ddc); 139453bdcf5fSBenjamin Gaignard of_node_put(ddc); 13954d5821a7SVladimir Zapolskiy if (!hdmi->ddc_adapt) 139653bdcf5fSBenjamin Gaignard return -EPROBE_DEFER; 139753bdcf5fSBenjamin Gaignard } 139853bdcf5fSBenjamin Gaignard 13995402626cSBenjamin Gaignard hdmi->dev = pdev->dev; 14005402626cSBenjamin Gaignard 14015402626cSBenjamin Gaignard /* Get resources */ 14025402626cSBenjamin Gaignard res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi-reg"); 14035402626cSBenjamin Gaignard if (!res) { 14045402626cSBenjamin Gaignard DRM_ERROR("Invalid hdmi resource\n"); 1405807642d7SVladimir Zapolskiy ret = -ENOMEM; 1406807642d7SVladimir Zapolskiy goto release_adapter; 14075402626cSBenjamin Gaignard } 14084bdc0d67SChristoph Hellwig hdmi->regs = devm_ioremap(dev, res->start, resource_size(res)); 1409807642d7SVladimir Zapolskiy if (!hdmi->regs) { 1410807642d7SVladimir Zapolskiy ret = -ENOMEM; 1411807642d7SVladimir Zapolskiy goto release_adapter; 1412807642d7SVladimir Zapolskiy } 14135402626cSBenjamin Gaignard 14145402626cSBenjamin Gaignard hdmi->phy_ops = (struct hdmi_phy_ops *) 14155402626cSBenjamin Gaignard of_match_node(hdmi_of_match, np)->data; 14165402626cSBenjamin Gaignard 14175402626cSBenjamin Gaignard /* Get clock resources */ 14185402626cSBenjamin Gaignard hdmi->clk_pix = devm_clk_get(dev, "pix"); 14195402626cSBenjamin Gaignard if (IS_ERR(hdmi->clk_pix)) { 14205402626cSBenjamin Gaignard DRM_ERROR("Cannot get hdmi_pix clock\n"); 1421807642d7SVladimir Zapolskiy ret = PTR_ERR(hdmi->clk_pix); 1422807642d7SVladimir Zapolskiy goto release_adapter; 14235402626cSBenjamin Gaignard } 14245402626cSBenjamin Gaignard 14255402626cSBenjamin Gaignard hdmi->clk_tmds = devm_clk_get(dev, "tmds"); 14265402626cSBenjamin Gaignard if (IS_ERR(hdmi->clk_tmds)) { 14275402626cSBenjamin Gaignard DRM_ERROR("Cannot get hdmi_tmds clock\n"); 1428807642d7SVladimir Zapolskiy ret = PTR_ERR(hdmi->clk_tmds); 1429807642d7SVladimir Zapolskiy goto release_adapter; 14305402626cSBenjamin Gaignard } 14315402626cSBenjamin Gaignard 14325402626cSBenjamin Gaignard hdmi->clk_phy = devm_clk_get(dev, "phy"); 14335402626cSBenjamin Gaignard if (IS_ERR(hdmi->clk_phy)) { 14345402626cSBenjamin Gaignard DRM_ERROR("Cannot get hdmi_phy clock\n"); 1435807642d7SVladimir Zapolskiy ret = PTR_ERR(hdmi->clk_phy); 1436807642d7SVladimir Zapolskiy goto release_adapter; 14375402626cSBenjamin Gaignard } 14385402626cSBenjamin Gaignard 14395402626cSBenjamin Gaignard hdmi->clk_audio = devm_clk_get(dev, "audio"); 14405402626cSBenjamin Gaignard if (IS_ERR(hdmi->clk_audio)) { 14415402626cSBenjamin Gaignard DRM_ERROR("Cannot get hdmi_audio clock\n"); 1442807642d7SVladimir Zapolskiy ret = PTR_ERR(hdmi->clk_audio); 1443807642d7SVladimir Zapolskiy goto release_adapter; 14445402626cSBenjamin Gaignard } 14455402626cSBenjamin Gaignard 144676569207SBenjamin Gaignard hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG; 14475402626cSBenjamin Gaignard 14485402626cSBenjamin Gaignard init_waitqueue_head(&hdmi->wait_event); 14495402626cSBenjamin Gaignard 14505402626cSBenjamin Gaignard hdmi->irq = platform_get_irq_byname(pdev, "irq"); 1451c83ecfa5SArvind Yadav if (hdmi->irq < 0) { 1452c83ecfa5SArvind Yadav DRM_ERROR("Cannot get HDMI irq\n"); 1453c83ecfa5SArvind Yadav ret = hdmi->irq; 1454c83ecfa5SArvind Yadav goto release_adapter; 1455c83ecfa5SArvind Yadav } 14565402626cSBenjamin Gaignard 14575402626cSBenjamin Gaignard ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq, 14585402626cSBenjamin Gaignard hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi); 14595402626cSBenjamin Gaignard if (ret) { 14605402626cSBenjamin Gaignard DRM_ERROR("Failed to register HDMI interrupt\n"); 1461807642d7SVladimir Zapolskiy goto release_adapter; 14625402626cSBenjamin Gaignard } 14635402626cSBenjamin Gaignard 14645402626cSBenjamin Gaignard hdmi->reset = devm_reset_control_get(dev, "hdmi"); 14655402626cSBenjamin Gaignard /* Take hdmi out of reset */ 14665402626cSBenjamin Gaignard if (!IS_ERR(hdmi->reset)) 14675402626cSBenjamin Gaignard reset_control_deassert(hdmi->reset); 14685402626cSBenjamin Gaignard 14695402626cSBenjamin Gaignard platform_set_drvdata(pdev, hdmi); 14705402626cSBenjamin Gaignard 14715402626cSBenjamin Gaignard return component_add(&pdev->dev, &sti_hdmi_ops); 1472807642d7SVladimir Zapolskiy 1473807642d7SVladimir Zapolskiy release_adapter: 14744d5821a7SVladimir Zapolskiy i2c_put_adapter(hdmi->ddc_adapt); 1475807642d7SVladimir Zapolskiy 1476807642d7SVladimir Zapolskiy return ret; 14775402626cSBenjamin Gaignard } 14785402626cSBenjamin Gaignard 14799a865e45SUwe Kleine-König static void sti_hdmi_remove(struct platform_device *pdev) 14805402626cSBenjamin Gaignard { 148141a14623SBenjamin Gaignard struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev); 148241a14623SBenjamin Gaignard 14834d5821a7SVladimir Zapolskiy i2c_put_adapter(hdmi->ddc_adapt); 14842c348e50SArnaud Pouliquen if (hdmi->audio_pdev) 14852c348e50SArnaud Pouliquen platform_device_unregister(hdmi->audio_pdev); 14865402626cSBenjamin Gaignard component_del(&pdev->dev, &sti_hdmi_ops); 14875402626cSBenjamin Gaignard } 14885402626cSBenjamin Gaignard 14895402626cSBenjamin Gaignard struct platform_driver sti_hdmi_driver = { 14905402626cSBenjamin Gaignard .driver = { 14915402626cSBenjamin Gaignard .name = "sti-hdmi", 14925402626cSBenjamin Gaignard .of_match_table = hdmi_of_match, 14935402626cSBenjamin Gaignard }, 14945402626cSBenjamin Gaignard .probe = sti_hdmi_probe, 14959a865e45SUwe Kleine-König .remove_new = sti_hdmi_remove, 14965402626cSBenjamin Gaignard }; 14975402626cSBenjamin Gaignard 14985402626cSBenjamin Gaignard MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 14995402626cSBenjamin Gaignard MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver"); 15005402626cSBenjamin Gaignard MODULE_LICENSE("GPL"); 1501