1 /* 2 * Copyright 2009 Jerome Glisse. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 19 * USE OR OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * The above copyright notice and this permission notice (including the 22 * next paragraph) shall be included in all copies or substantial portions 23 * of the Software. 24 * 25 */ 26 /* 27 * Authors: 28 * Jerome Glisse <glisse@freedesktop.org> 29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> 30 * Dave Airlie 31 */ 32 33 #include <linux/debugfs.h> 34 #include <linux/dma-mapping.h> 35 #include <linux/pagemap.h> 36 #include <linux/pci.h> 37 #include <linux/seq_file.h> 38 #include <linux/slab.h> 39 #include <linux/swap.h> 40 41 #include <drm/drm_device.h> 42 #include <drm/drm_file.h> 43 #include <drm/drm_prime.h> 44 #include <drm/radeon_drm.h> 45 #include <drm/ttm/ttm_bo.h> 46 #include <drm/ttm/ttm_placement.h> 47 #include <drm/ttm/ttm_range_manager.h> 48 #include <drm/ttm/ttm_tt.h> 49 50 #include "radeon_reg.h" 51 #include "radeon.h" 52 #include "radeon_ttm.h" 53 54 static void radeon_ttm_debugfs_init(struct radeon_device *rdev); 55 56 static int radeon_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm, 57 struct ttm_resource *bo_mem); 58 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm); 59 60 struct radeon_device *radeon_get_rdev(struct ttm_device *bdev) 61 { 62 struct radeon_mman *mman; 63 struct radeon_device *rdev; 64 65 mman = container_of(bdev, struct radeon_mman, bdev); 66 rdev = container_of(mman, struct radeon_device, mman); 67 return rdev; 68 } 69 70 static int radeon_ttm_init_vram(struct radeon_device *rdev) 71 { 72 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM, 73 false, rdev->mc.real_vram_size >> PAGE_SHIFT); 74 } 75 76 static int radeon_ttm_init_gtt(struct radeon_device *rdev) 77 { 78 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT, 79 true, rdev->mc.gtt_size >> PAGE_SHIFT); 80 } 81 82 static void radeon_evict_flags(struct ttm_buffer_object *bo, 83 struct ttm_placement *placement) 84 { 85 static const struct ttm_place placements = { 86 .fpfn = 0, 87 .lpfn = 0, 88 .mem_type = TTM_PL_SYSTEM, 89 .flags = 0 90 }; 91 92 struct radeon_bo *rbo; 93 94 if (!radeon_ttm_bo_is_radeon_bo(bo)) { 95 placement->placement = &placements; 96 placement->num_placement = 1; 97 return; 98 } 99 rbo = container_of(bo, struct radeon_bo, tbo); 100 switch (bo->resource->mem_type) { 101 case TTM_PL_VRAM: 102 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false) 103 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 104 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size && 105 bo->resource->start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) { 106 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; 107 int i; 108 109 /* Try evicting to the CPU inaccessible part of VRAM 110 * first, but only set GTT as busy placement, so this 111 * BO will be evicted to GTT rather than causing other 112 * BOs to be evicted from VRAM 113 */ 114 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM | 115 RADEON_GEM_DOMAIN_GTT); 116 for (i = 0; i < rbo->placement.num_placement; i++) { 117 if (rbo->placements[i].mem_type == TTM_PL_VRAM) { 118 if (rbo->placements[i].fpfn < fpfn) 119 rbo->placements[i].fpfn = fpfn; 120 rbo->placements[0].flags |= TTM_PL_FLAG_DESIRED; 121 } 122 } 123 } else 124 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); 125 break; 126 case TTM_PL_TT: 127 default: 128 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 129 } 130 *placement = rbo->placement; 131 } 132 133 static int radeon_move_blit(struct ttm_buffer_object *bo, 134 bool evict, 135 struct ttm_resource *new_mem, 136 struct ttm_resource *old_mem) 137 { 138 struct radeon_device *rdev; 139 uint64_t old_start, new_start; 140 struct radeon_fence *fence; 141 unsigned num_pages; 142 int r, ridx; 143 144 rdev = radeon_get_rdev(bo->bdev); 145 ridx = radeon_copy_ring_index(rdev); 146 old_start = (u64)old_mem->start << PAGE_SHIFT; 147 new_start = (u64)new_mem->start << PAGE_SHIFT; 148 149 switch (old_mem->mem_type) { 150 case TTM_PL_VRAM: 151 old_start += rdev->mc.vram_start; 152 break; 153 case TTM_PL_TT: 154 old_start += rdev->mc.gtt_start; 155 break; 156 default: 157 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 158 return -EINVAL; 159 } 160 switch (new_mem->mem_type) { 161 case TTM_PL_VRAM: 162 new_start += rdev->mc.vram_start; 163 break; 164 case TTM_PL_TT: 165 new_start += rdev->mc.gtt_start; 166 break; 167 default: 168 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 169 return -EINVAL; 170 } 171 if (!rdev->ring[ridx].ready) { 172 DRM_ERROR("Trying to move memory with ring turned off.\n"); 173 return -EINVAL; 174 } 175 176 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0); 177 178 num_pages = PFN_UP(new_mem->size) * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); 179 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv); 180 if (IS_ERR(fence)) 181 return PTR_ERR(fence); 182 183 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem); 184 radeon_fence_unref(&fence); 185 return r; 186 } 187 188 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, 189 struct ttm_operation_ctx *ctx, 190 struct ttm_resource *new_mem, 191 struct ttm_place *hop) 192 { 193 struct ttm_resource *old_mem = bo->resource; 194 struct radeon_device *rdev; 195 int r; 196 197 if (new_mem->mem_type == TTM_PL_TT) { 198 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem); 199 if (r) 200 return r; 201 } 202 203 r = ttm_bo_wait_ctx(bo, ctx); 204 if (r) 205 return r; 206 207 rdev = radeon_get_rdev(bo->bdev); 208 if (!old_mem || (old_mem->mem_type == TTM_PL_SYSTEM && 209 bo->ttm == NULL)) { 210 ttm_bo_move_null(bo, new_mem); 211 goto out; 212 } 213 if (old_mem->mem_type == TTM_PL_SYSTEM && 214 new_mem->mem_type == TTM_PL_TT) { 215 ttm_bo_move_null(bo, new_mem); 216 goto out; 217 } 218 219 if (old_mem->mem_type == TTM_PL_TT && 220 new_mem->mem_type == TTM_PL_SYSTEM) { 221 radeon_ttm_tt_unbind(bo->bdev, bo->ttm); 222 ttm_resource_free(bo, &bo->resource); 223 ttm_bo_assign_mem(bo, new_mem); 224 goto out; 225 } 226 if (rdev->ring[radeon_copy_ring_index(rdev)].ready && 227 rdev->asic->copy.copy != NULL) { 228 if ((old_mem->mem_type == TTM_PL_SYSTEM && 229 new_mem->mem_type == TTM_PL_VRAM) || 230 (old_mem->mem_type == TTM_PL_VRAM && 231 new_mem->mem_type == TTM_PL_SYSTEM)) { 232 hop->fpfn = 0; 233 hop->lpfn = 0; 234 hop->mem_type = TTM_PL_TT; 235 hop->flags = 0; 236 return -EMULTIHOP; 237 } 238 239 r = radeon_move_blit(bo, evict, new_mem, old_mem); 240 } else { 241 r = -ENODEV; 242 } 243 244 if (r) { 245 r = ttm_bo_move_memcpy(bo, ctx, new_mem); 246 if (r) 247 return r; 248 } 249 250 out: 251 /* update statistics */ 252 atomic64_add(bo->base.size, &rdev->num_bytes_moved); 253 radeon_bo_move_notify(bo); 254 return 0; 255 } 256 257 static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *mem) 258 { 259 struct radeon_device *rdev = radeon_get_rdev(bdev); 260 size_t bus_size = (size_t)mem->size; 261 262 switch (mem->mem_type) { 263 case TTM_PL_SYSTEM: 264 /* system memory */ 265 return 0; 266 case TTM_PL_TT: 267 #if IS_ENABLED(CONFIG_AGP) 268 if (rdev->flags & RADEON_IS_AGP) { 269 /* RADEON_IS_AGP is set only if AGP is active */ 270 mem->bus.offset = (mem->start << PAGE_SHIFT) + 271 rdev->mc.agp_base; 272 mem->bus.is_iomem = !rdev->agp->cant_use_aperture; 273 mem->bus.caching = ttm_write_combined; 274 } 275 #endif 276 break; 277 case TTM_PL_VRAM: 278 mem->bus.offset = mem->start << PAGE_SHIFT; 279 /* check if it's visible */ 280 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size) 281 return -EINVAL; 282 mem->bus.offset += rdev->mc.aper_base; 283 mem->bus.is_iomem = true; 284 mem->bus.caching = ttm_write_combined; 285 #ifdef __alpha__ 286 /* 287 * Alpha: use bus.addr to hold the ioremap() return, 288 * so we can modify bus.base below. 289 */ 290 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size); 291 if (!mem->bus.addr) 292 return -ENOMEM; 293 294 /* 295 * Alpha: Use just the bus offset plus 296 * the hose/domain memory base for bus.base. 297 * It then can be used to build PTEs for VRAM 298 * access, as done in ttm_bo_vm_fault(). 299 */ 300 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) + 301 rdev->hose->dense_mem_base; 302 #endif 303 break; 304 default: 305 return -EINVAL; 306 } 307 return 0; 308 } 309 310 /* 311 * TTM backend functions. 312 */ 313 struct radeon_ttm_tt { 314 struct ttm_tt ttm; 315 u64 offset; 316 317 uint64_t userptr; 318 struct mm_struct *usermm; 319 uint32_t userflags; 320 bool bound; 321 }; 322 323 /* prepare the sg table with the user pages */ 324 static int radeon_ttm_tt_pin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm) 325 { 326 struct radeon_device *rdev = radeon_get_rdev(bdev); 327 struct radeon_ttm_tt *gtt = (void *)ttm; 328 unsigned pinned = 0; 329 int r; 330 331 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 332 enum dma_data_direction direction = write ? 333 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 334 335 if (current->mm != gtt->usermm) 336 return -EPERM; 337 338 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) { 339 /* check that we only pin down anonymous memory 340 to prevent problems with writeback */ 341 unsigned long end = gtt->userptr + (u64)ttm->num_pages * PAGE_SIZE; 342 struct vm_area_struct *vma; 343 vma = find_vma(gtt->usermm, gtt->userptr); 344 if (!vma || vma->vm_file || vma->vm_end < end) 345 return -EPERM; 346 } 347 348 do { 349 unsigned num_pages = ttm->num_pages - pinned; 350 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE; 351 struct page **pages = ttm->pages + pinned; 352 353 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0, 354 pages); 355 if (r < 0) 356 goto release_pages; 357 358 pinned += r; 359 360 } while (pinned < ttm->num_pages); 361 362 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0, 363 (u64)ttm->num_pages << PAGE_SHIFT, 364 GFP_KERNEL); 365 if (r) 366 goto release_sg; 367 368 r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0); 369 if (r) 370 goto release_sg; 371 372 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, 373 ttm->num_pages); 374 375 return 0; 376 377 release_sg: 378 kfree(ttm->sg); 379 380 release_pages: 381 release_pages(ttm->pages, pinned); 382 return r; 383 } 384 385 static void radeon_ttm_tt_unpin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm) 386 { 387 struct radeon_device *rdev = radeon_get_rdev(bdev); 388 struct radeon_ttm_tt *gtt = (void *)ttm; 389 struct sg_page_iter sg_iter; 390 391 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 392 enum dma_data_direction direction = write ? 393 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 394 395 /* double check that we don't free the table twice */ 396 if (!ttm->sg || !ttm->sg->sgl) 397 return; 398 399 /* free the sg table and pages again */ 400 dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0); 401 402 for_each_sgtable_page(ttm->sg, &sg_iter, 0) { 403 struct page *page = sg_page_iter_page(&sg_iter); 404 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY)) 405 set_page_dirty(page); 406 407 mark_page_accessed(page); 408 put_page(page); 409 } 410 411 sg_free_table(ttm->sg); 412 } 413 414 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm) 415 { 416 struct radeon_ttm_tt *gtt = (void*)ttm; 417 418 return (gtt->bound); 419 } 420 421 static int radeon_ttm_backend_bind(struct ttm_device *bdev, 422 struct ttm_tt *ttm, 423 struct ttm_resource *bo_mem) 424 { 425 struct radeon_ttm_tt *gtt = (void*)ttm; 426 struct radeon_device *rdev = radeon_get_rdev(bdev); 427 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ | 428 RADEON_GART_PAGE_WRITE; 429 int r; 430 431 if (gtt->bound) 432 return 0; 433 434 if (gtt->userptr) { 435 radeon_ttm_tt_pin_userptr(bdev, ttm); 436 flags &= ~RADEON_GART_PAGE_WRITE; 437 } 438 439 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT); 440 if (!ttm->num_pages) { 441 WARN(1, "nothing to bind %u pages for mreg %p back %p!\n", 442 ttm->num_pages, bo_mem, ttm); 443 } 444 if (ttm->caching == ttm_cached) 445 flags |= RADEON_GART_PAGE_SNOOP; 446 r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages, 447 ttm->pages, gtt->ttm.dma_address, flags); 448 if (r) { 449 DRM_ERROR("failed to bind %u pages at 0x%08X\n", 450 ttm->num_pages, (unsigned)gtt->offset); 451 return r; 452 } 453 gtt->bound = true; 454 return 0; 455 } 456 457 static void radeon_ttm_backend_unbind(struct ttm_device *bdev, struct ttm_tt *ttm) 458 { 459 struct radeon_ttm_tt *gtt = (void *)ttm; 460 struct radeon_device *rdev = radeon_get_rdev(bdev); 461 462 if (gtt->userptr) 463 radeon_ttm_tt_unpin_userptr(bdev, ttm); 464 465 if (!gtt->bound) 466 return; 467 468 radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages); 469 470 gtt->bound = false; 471 } 472 473 static void radeon_ttm_backend_destroy(struct ttm_device *bdev, struct ttm_tt *ttm) 474 { 475 struct radeon_ttm_tt *gtt = (void *)ttm; 476 477 ttm_tt_fini(>t->ttm); 478 kfree(gtt); 479 } 480 481 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, 482 uint32_t page_flags) 483 { 484 struct radeon_ttm_tt *gtt; 485 enum ttm_caching caching; 486 struct radeon_bo *rbo; 487 #if IS_ENABLED(CONFIG_AGP) 488 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); 489 490 if (rdev->flags & RADEON_IS_AGP) { 491 return ttm_agp_tt_create(bo, rdev->agp->bridge, page_flags); 492 } 493 #endif 494 rbo = container_of(bo, struct radeon_bo, tbo); 495 496 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); 497 if (gtt == NULL) { 498 return NULL; 499 } 500 501 if (rbo->flags & RADEON_GEM_GTT_UC) 502 caching = ttm_uncached; 503 else if (rbo->flags & RADEON_GEM_GTT_WC) 504 caching = ttm_write_combined; 505 else 506 caching = ttm_cached; 507 508 if (ttm_sg_tt_init(>t->ttm, bo, page_flags, caching)) { 509 kfree(gtt); 510 return NULL; 511 } 512 return >t->ttm; 513 } 514 515 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev, 516 struct ttm_tt *ttm) 517 { 518 #if IS_ENABLED(CONFIG_AGP) 519 if (rdev->flags & RADEON_IS_AGP) 520 return NULL; 521 #endif 522 523 if (!ttm) 524 return NULL; 525 return container_of(ttm, struct radeon_ttm_tt, ttm); 526 } 527 528 static int radeon_ttm_tt_populate(struct ttm_device *bdev, 529 struct ttm_tt *ttm, 530 struct ttm_operation_ctx *ctx) 531 { 532 struct radeon_device *rdev = radeon_get_rdev(bdev); 533 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 534 bool slave = !!(ttm->page_flags & TTM_TT_FLAG_EXTERNAL); 535 536 if (gtt && gtt->userptr) { 537 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL); 538 if (!ttm->sg) 539 return -ENOMEM; 540 541 ttm->page_flags |= TTM_TT_FLAG_EXTERNAL; 542 return 0; 543 } 544 545 if (slave && ttm->sg) { 546 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, 547 ttm->num_pages); 548 return 0; 549 } 550 551 return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx); 552 } 553 554 static void radeon_ttm_tt_unpopulate(struct ttm_device *bdev, struct ttm_tt *ttm) 555 { 556 struct radeon_device *rdev = radeon_get_rdev(bdev); 557 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 558 bool slave = !!(ttm->page_flags & TTM_TT_FLAG_EXTERNAL); 559 560 radeon_ttm_tt_unbind(bdev, ttm); 561 562 if (gtt && gtt->userptr) { 563 kfree(ttm->sg); 564 ttm->page_flags &= ~TTM_TT_FLAG_EXTERNAL; 565 return; 566 } 567 568 if (slave) 569 return; 570 571 return ttm_pool_free(&rdev->mman.bdev.pool, ttm); 572 } 573 574 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev, 575 struct ttm_tt *ttm, uint64_t addr, 576 uint32_t flags) 577 { 578 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 579 580 if (gtt == NULL) 581 return -EINVAL; 582 583 gtt->userptr = addr; 584 gtt->usermm = current->mm; 585 gtt->userflags = flags; 586 return 0; 587 } 588 589 bool radeon_ttm_tt_is_bound(struct ttm_device *bdev, 590 struct ttm_tt *ttm) 591 { 592 #if IS_ENABLED(CONFIG_AGP) 593 struct radeon_device *rdev = radeon_get_rdev(bdev); 594 if (rdev->flags & RADEON_IS_AGP) 595 return ttm_agp_is_bound(ttm); 596 #endif 597 return radeon_ttm_backend_is_bound(ttm); 598 } 599 600 static int radeon_ttm_tt_bind(struct ttm_device *bdev, 601 struct ttm_tt *ttm, 602 struct ttm_resource *bo_mem) 603 { 604 #if IS_ENABLED(CONFIG_AGP) 605 struct radeon_device *rdev = radeon_get_rdev(bdev); 606 #endif 607 608 if (!bo_mem) 609 return -EINVAL; 610 #if IS_ENABLED(CONFIG_AGP) 611 if (rdev->flags & RADEON_IS_AGP) 612 return ttm_agp_bind(ttm, bo_mem); 613 #endif 614 615 return radeon_ttm_backend_bind(bdev, ttm, bo_mem); 616 } 617 618 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, 619 struct ttm_tt *ttm) 620 { 621 #if IS_ENABLED(CONFIG_AGP) 622 struct radeon_device *rdev = radeon_get_rdev(bdev); 623 624 if (rdev->flags & RADEON_IS_AGP) { 625 ttm_agp_unbind(ttm); 626 return; 627 } 628 #endif 629 radeon_ttm_backend_unbind(bdev, ttm); 630 } 631 632 static void radeon_ttm_tt_destroy(struct ttm_device *bdev, 633 struct ttm_tt *ttm) 634 { 635 #if IS_ENABLED(CONFIG_AGP) 636 struct radeon_device *rdev = radeon_get_rdev(bdev); 637 638 if (rdev->flags & RADEON_IS_AGP) { 639 ttm_agp_destroy(ttm); 640 return; 641 } 642 #endif 643 radeon_ttm_backend_destroy(bdev, ttm); 644 } 645 646 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev, 647 struct ttm_tt *ttm) 648 { 649 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 650 651 if (gtt == NULL) 652 return false; 653 654 return !!gtt->userptr; 655 } 656 657 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev, 658 struct ttm_tt *ttm) 659 { 660 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 661 662 if (gtt == NULL) 663 return false; 664 665 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 666 } 667 668 static struct ttm_device_funcs radeon_bo_driver = { 669 .ttm_tt_create = &radeon_ttm_tt_create, 670 .ttm_tt_populate = &radeon_ttm_tt_populate, 671 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate, 672 .ttm_tt_destroy = &radeon_ttm_tt_destroy, 673 .eviction_valuable = ttm_bo_eviction_valuable, 674 .evict_flags = &radeon_evict_flags, 675 .move = &radeon_bo_move, 676 .io_mem_reserve = &radeon_ttm_io_mem_reserve, 677 }; 678 679 int radeon_ttm_init(struct radeon_device *rdev) 680 { 681 int r; 682 683 /* No others user of address space so set it to 0 */ 684 r = ttm_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev, 685 rdev->ddev->anon_inode->i_mapping, 686 rdev->ddev->vma_offset_manager, 687 rdev->need_swiotlb, 688 dma_addressing_limited(&rdev->pdev->dev)); 689 if (r) { 690 DRM_ERROR("failed initializing buffer object driver(%d).\n", r); 691 return r; 692 } 693 rdev->mman.initialized = true; 694 695 r = radeon_ttm_init_vram(rdev); 696 if (r) { 697 DRM_ERROR("Failed initializing VRAM heap.\n"); 698 return r; 699 } 700 /* Change the size here instead of the init above so only lpfn is affected */ 701 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); 702 703 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true, 704 RADEON_GEM_DOMAIN_VRAM, 0, NULL, 705 NULL, &rdev->stolen_vga_memory); 706 if (r) { 707 return r; 708 } 709 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 710 if (r) 711 return r; 712 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL); 713 radeon_bo_unreserve(rdev->stolen_vga_memory); 714 if (r) { 715 radeon_bo_unref(&rdev->stolen_vga_memory); 716 return r; 717 } 718 DRM_INFO("radeon: %uM of VRAM memory ready\n", 719 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024))); 720 721 r = radeon_ttm_init_gtt(rdev); 722 if (r) { 723 DRM_ERROR("Failed initializing GTT heap.\n"); 724 return r; 725 } 726 DRM_INFO("radeon: %uM of GTT memory ready.\n", 727 (unsigned)(rdev->mc.gtt_size / (1024 * 1024))); 728 729 radeon_ttm_debugfs_init(rdev); 730 731 return 0; 732 } 733 734 void radeon_ttm_fini(struct radeon_device *rdev) 735 { 736 int r; 737 738 if (!rdev->mman.initialized) 739 return; 740 741 if (rdev->stolen_vga_memory) { 742 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 743 if (r == 0) { 744 radeon_bo_unpin(rdev->stolen_vga_memory); 745 radeon_bo_unreserve(rdev->stolen_vga_memory); 746 } 747 radeon_bo_unref(&rdev->stolen_vga_memory); 748 } 749 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM); 750 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT); 751 ttm_device_fini(&rdev->mman.bdev); 752 radeon_gart_fini(rdev); 753 rdev->mman.initialized = false; 754 DRM_INFO("radeon: ttm finalized\n"); 755 } 756 757 /* this should only be called at bootup or when userspace 758 * isn't running */ 759 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size) 760 { 761 struct ttm_resource_manager *man; 762 763 if (!rdev->mman.initialized) 764 return; 765 766 man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM); 767 /* this just adjusts TTM size idea, which sets lpfn to the correct value */ 768 man->size = size >> PAGE_SHIFT; 769 } 770 771 #if defined(CONFIG_DEBUG_FS) 772 773 static int radeon_ttm_page_pool_show(struct seq_file *m, void *data) 774 { 775 struct radeon_device *rdev = m->private; 776 777 return ttm_pool_debugfs(&rdev->mman.bdev.pool, m); 778 } 779 780 DEFINE_SHOW_ATTRIBUTE(radeon_ttm_page_pool); 781 782 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep) 783 { 784 struct radeon_device *rdev = inode->i_private; 785 i_size_write(inode, rdev->mc.mc_vram_size); 786 filep->private_data = inode->i_private; 787 return 0; 788 } 789 790 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf, 791 size_t size, loff_t *pos) 792 { 793 struct radeon_device *rdev = f->private_data; 794 ssize_t result = 0; 795 int r; 796 797 if (size & 0x3 || *pos & 0x3) 798 return -EINVAL; 799 800 while (size) { 801 unsigned long flags; 802 uint32_t value; 803 804 if (*pos >= rdev->mc.mc_vram_size) 805 return result; 806 807 spin_lock_irqsave(&rdev->mmio_idx_lock, flags); 808 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000); 809 if (rdev->family >= CHIP_CEDAR) 810 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31); 811 value = RREG32(RADEON_MM_DATA); 812 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); 813 814 r = put_user(value, (uint32_t __user *)buf); 815 if (r) 816 return r; 817 818 result += 4; 819 buf += 4; 820 *pos += 4; 821 size -= 4; 822 } 823 824 return result; 825 } 826 827 static const struct file_operations radeon_ttm_vram_fops = { 828 .owner = THIS_MODULE, 829 .open = radeon_ttm_vram_open, 830 .read = radeon_ttm_vram_read, 831 .llseek = default_llseek 832 }; 833 834 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep) 835 { 836 struct radeon_device *rdev = inode->i_private; 837 i_size_write(inode, rdev->mc.gtt_size); 838 filep->private_data = inode->i_private; 839 return 0; 840 } 841 842 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf, 843 size_t size, loff_t *pos) 844 { 845 struct radeon_device *rdev = f->private_data; 846 ssize_t result = 0; 847 int r; 848 849 while (size) { 850 loff_t p = *pos / PAGE_SIZE; 851 unsigned off = *pos & ~PAGE_MASK; 852 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off); 853 struct page *page; 854 void *ptr; 855 856 if (p >= rdev->gart.num_cpu_pages) 857 return result; 858 859 page = rdev->gart.pages[p]; 860 if (page) { 861 ptr = kmap_local_page(page); 862 ptr += off; 863 864 r = copy_to_user(buf, ptr, cur_size); 865 kunmap_local(ptr); 866 } else 867 r = clear_user(buf, cur_size); 868 869 if (r) 870 return -EFAULT; 871 872 result += cur_size; 873 buf += cur_size; 874 *pos += cur_size; 875 size -= cur_size; 876 } 877 878 return result; 879 } 880 881 static const struct file_operations radeon_ttm_gtt_fops = { 882 .owner = THIS_MODULE, 883 .open = radeon_ttm_gtt_open, 884 .read = radeon_ttm_gtt_read, 885 .llseek = default_llseek 886 }; 887 888 #endif 889 890 static void radeon_ttm_debugfs_init(struct radeon_device *rdev) 891 { 892 #if defined(CONFIG_DEBUG_FS) 893 struct drm_minor *minor = rdev->ddev->primary; 894 struct dentry *root = minor->debugfs_root; 895 896 debugfs_create_file("radeon_vram", 0444, root, rdev, 897 &radeon_ttm_vram_fops); 898 debugfs_create_file("radeon_gtt", 0444, root, rdev, 899 &radeon_ttm_gtt_fops); 900 debugfs_create_file("ttm_page_pool", 0444, root, rdev, 901 &radeon_ttm_page_pool_fops); 902 ttm_resource_manager_create_debugfs(ttm_manager_type(&rdev->mman.bdev, 903 TTM_PL_VRAM), 904 root, "radeon_vram_mm"); 905 ttm_resource_manager_create_debugfs(ttm_manager_type(&rdev->mman.bdev, 906 TTM_PL_TT), 907 root, "radeon_gtt_mm"); 908 #endif 909 } 910