xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.c (revision 0ea5c948cb64bab5bc7a5516774eb8536f05aa0d)
1fb3e9c61SBen Skeggs /*
2fb3e9c61SBen Skeggs  * Copyright 2016 Red Hat Inc.
3fb3e9c61SBen Skeggs  *
4fb3e9c61SBen Skeggs  * Permission is hereby granted, free of charge, to any person obtaining a
5fb3e9c61SBen Skeggs  * copy of this software and associated documentation files (the "Software"),
6fb3e9c61SBen Skeggs  * to deal in the Software without restriction, including without limitation
7fb3e9c61SBen Skeggs  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8fb3e9c61SBen Skeggs  * and/or sell copies of the Software, and to permit persons to whom the
9fb3e9c61SBen Skeggs  * Software is furnished to do so, subject to the following conditions:
10fb3e9c61SBen Skeggs  *
11fb3e9c61SBen Skeggs  * The above copyright notice and this permission notice shall be included in
12fb3e9c61SBen Skeggs  * all copies or substantial portions of the Software.
13fb3e9c61SBen Skeggs  *
14fb3e9c61SBen Skeggs  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15fb3e9c61SBen Skeggs  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16fb3e9c61SBen Skeggs  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17fb3e9c61SBen Skeggs  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18fb3e9c61SBen Skeggs  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19fb3e9c61SBen Skeggs  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20fb3e9c61SBen Skeggs  * OTHER DEALINGS IN THE SOFTWARE.
21fb3e9c61SBen Skeggs  *
22fb3e9c61SBen Skeggs  * Authors: Ben Skeggs <bskeggs@redhat.com>
23fb3e9c61SBen Skeggs  */
24fb3e9c61SBen Skeggs #include "priv.h"
25fb3e9c61SBen Skeggs 
26*d4c9cd34SBen Skeggs #include <subdev/gsp.h>
27*d4c9cd34SBen Skeggs 
28fb3e9c61SBen Skeggs static int
gk104_top_parse(struct nvkm_top * top)29eec3f6dfSBen Skeggs gk104_top_parse(struct nvkm_top *top)
30fb3e9c61SBen Skeggs {
31fb3e9c61SBen Skeggs 	struct nvkm_subdev *subdev = &top->subdev;
32fb3e9c61SBen Skeggs 	struct nvkm_device *device = subdev->device;
33fb3e9c61SBen Skeggs 	struct nvkm_top_device *info = NULL;
3451012a39SBen Skeggs 	u32 data, type, inst;
35fb3e9c61SBen Skeggs 	int i;
36fb3e9c61SBen Skeggs 
37fb3e9c61SBen Skeggs 	for (i = 0; i < 64; i++) {
38fb3e9c61SBen Skeggs 		if (!info) {
39fb3e9c61SBen Skeggs 			if (!(info = nvkm_top_device_new(top)))
40fb3e9c61SBen Skeggs 				return -ENOMEM;
41fb3e9c61SBen Skeggs 			type = ~0;
4251012a39SBen Skeggs 			inst = 0;
43fb3e9c61SBen Skeggs 		}
44fb3e9c61SBen Skeggs 
45fb3e9c61SBen Skeggs 		data = nvkm_rd32(device, 0x022700 + (i * 0x04));
46fb3e9c61SBen Skeggs 		nvkm_trace(subdev, "%02x: %08x\n", i, data);
47fb3e9c61SBen Skeggs 		switch (data & 0x00000003) {
48fb3e9c61SBen Skeggs 		case 0x00000000: /* NOT_VALID */
49fb3e9c61SBen Skeggs 			continue;
50fb3e9c61SBen Skeggs 		case 0x00000001: /* DATA */
5151012a39SBen Skeggs 			inst        = (data & 0x3c000000) >> 26;
52fb3e9c61SBen Skeggs 			info->addr  = (data & 0x00fff000);
53a1c771a5SBen Skeggs 			if (data & 0x00000004)
54a1c771a5SBen Skeggs 				info->fault = (data & 0x000003f8) >> 3;
55fb3e9c61SBen Skeggs 			break;
56fb3e9c61SBen Skeggs 		case 0x00000002: /* ENUM */
57fb3e9c61SBen Skeggs 			if (data & 0x00000020)
58fb3e9c61SBen Skeggs 				info->engine  = (data & 0x3c000000) >> 26;
59fb3e9c61SBen Skeggs 			if (data & 0x00000010)
60fb3e9c61SBen Skeggs 				info->runlist = (data & 0x01e00000) >> 21;
61fb3e9c61SBen Skeggs 			if (data & 0x00000008)
62fb3e9c61SBen Skeggs 				info->intr    = (data & 0x000f8000) >> 15;
63fb3e9c61SBen Skeggs 			if (data & 0x00000004)
64fb3e9c61SBen Skeggs 				info->reset   = (data & 0x00003e00) >> 9;
65fb3e9c61SBen Skeggs 			break;
66fb3e9c61SBen Skeggs 		case 0x00000003: /* ENGINE_TYPE */
67fb3e9c61SBen Skeggs 			type = (data & 0x7ffffffc) >> 2;
68fb3e9c61SBen Skeggs 			break;
69fb3e9c61SBen Skeggs 		}
70fb3e9c61SBen Skeggs 
71fb3e9c61SBen Skeggs 		if (data & 0x80000000)
72fb3e9c61SBen Skeggs 			continue;
73fb3e9c61SBen Skeggs 
74fb3e9c61SBen Skeggs 		/* Translate engine type to NVKM engine identifier. */
75ba083ec7SBen Skeggs #define I_(T,I) do { info->type = (T); info->inst = (I); } while(0)
765e0d3dbcSBen Skeggs #define O_(T,I) do { WARN_ON(inst); I_(T, I); } while (0)
77fb3e9c61SBen Skeggs 		switch (type) {
785e0d3dbcSBen Skeggs 		case 0x00000000: O_(NVKM_ENGINE_GR    ,    0); break;
795e0d3dbcSBen Skeggs 		case 0x00000001: O_(NVKM_ENGINE_CE    ,    0); break;
805e0d3dbcSBen Skeggs 		case 0x00000002: O_(NVKM_ENGINE_CE    ,    1); break;
815e0d3dbcSBen Skeggs 		case 0x00000003: O_(NVKM_ENGINE_CE    ,    2); break;
825e0d3dbcSBen Skeggs 		case 0x00000008: O_(NVKM_ENGINE_MSPDEC,    0); break;
835e0d3dbcSBen Skeggs 		case 0x00000009: O_(NVKM_ENGINE_MSPPP ,    0); break;
845e0d3dbcSBen Skeggs 		case 0x0000000a: O_(NVKM_ENGINE_MSVLD ,    0); break;
855e0d3dbcSBen Skeggs 		case 0x0000000b: O_(NVKM_ENGINE_MSENC ,    0); break;
865e0d3dbcSBen Skeggs 		case 0x0000000c: O_(NVKM_ENGINE_VIC   ,    0); break;
875e0d3dbcSBen Skeggs 		case 0x0000000d: O_(NVKM_ENGINE_SEC2  ,    0); break;
885e0d3dbcSBen Skeggs 		case 0x0000000e: I_(NVKM_ENGINE_NVENC , inst); break;
895e0d3dbcSBen Skeggs 		case 0x0000000f: O_(NVKM_ENGINE_NVENC ,    1); break;
905e0d3dbcSBen Skeggs 		case 0x00000010: I_(NVKM_ENGINE_NVDEC , inst); break;
9118618fc6SBen Skeggs 		case 0x00000012: I_(NVKM_SUBDEV_IOCTRL, inst); break;
925e0d3dbcSBen Skeggs 		case 0x00000013: I_(NVKM_ENGINE_CE    , inst); break;
935e0d3dbcSBen Skeggs 		case 0x00000014: O_(NVKM_SUBDEV_GSP   ,    0); break;
94e8669270SBen Skeggs 		case 0x00000015: I_(NVKM_ENGINE_NVJPG , inst); break;
95fb3e9c61SBen Skeggs 		default:
96fb3e9c61SBen Skeggs 			break;
97fb3e9c61SBen Skeggs 		}
98fb3e9c61SBen Skeggs 
9951012a39SBen Skeggs 		nvkm_debug(subdev, "%02x.%d (%8s): addr %06x fault %2d "
10051012a39SBen Skeggs 				   "engine %2d runlist %2d intr %2d "
10151012a39SBen Skeggs 				   "reset %2d\n", type, inst,
1025e0d3dbcSBen Skeggs 			   info->type == NVKM_SUBDEV_NR ? "????????" : nvkm_subdev_type[info->type],
103fb3e9c61SBen Skeggs 			   info->addr, info->fault, info->engine, info->runlist,
104fb3e9c61SBen Skeggs 			   info->intr, info->reset);
105fb3e9c61SBen Skeggs 		info = NULL;
106fb3e9c61SBen Skeggs 	}
107fb3e9c61SBen Skeggs 
108fb3e9c61SBen Skeggs 	return 0;
109fb3e9c61SBen Skeggs }
110fb3e9c61SBen Skeggs 
111fb3e9c61SBen Skeggs static const struct nvkm_top_func
112fb3e9c61SBen Skeggs gk104_top = {
113eec3f6dfSBen Skeggs 	.parse = gk104_top_parse,
114fb3e9c61SBen Skeggs };
115fb3e9c61SBen Skeggs 
116fb3e9c61SBen Skeggs int
gk104_top_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_top ** ptop)117601c2a06SBen Skeggs gk104_top_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
118601c2a06SBen Skeggs 	      struct nvkm_top **ptop)
119fb3e9c61SBen Skeggs {
120*d4c9cd34SBen Skeggs 	if (nvkm_gsp_rm(device->gsp))
121*d4c9cd34SBen Skeggs 		return -ENODEV;
122*d4c9cd34SBen Skeggs 
123601c2a06SBen Skeggs 	return nvkm_top_new_(&gk104_top, device, type, inst, ptop);
124fb3e9c61SBen Skeggs }
125