1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 #include <drm/drm_print.h> 7 8 #include "gem/i915_gem_lmem.h" 9 #include "gem/i915_gem_region.h" 10 #include "i915_drv.h" 11 #include "intel_crtc.h" 12 #include "intel_display.h" 13 #include "intel_display_core.h" 14 #include "intel_display_types.h" 15 #include "intel_fb.h" 16 #include "intel_frontbuffer.h" 17 #include "intel_plane.h" 18 #include "intel_plane_initial.h" 19 20 void intel_plane_initial_vblank_wait(struct intel_crtc *crtc) 21 { 22 intel_crtc_wait_for_next_vblank(crtc); 23 } 24 25 static bool 26 intel_reuse_initial_plane_obj(struct intel_crtc *this, 27 const struct intel_initial_plane_config plane_configs[], 28 struct drm_framebuffer **fb, 29 struct i915_vma **vma) 30 { 31 struct intel_display *display = to_intel_display(this); 32 struct intel_crtc *crtc; 33 34 for_each_intel_crtc(display->drm, crtc) { 35 struct intel_plane *plane = 36 to_intel_plane(crtc->base.primary); 37 const struct intel_plane_state *plane_state = 38 to_intel_plane_state(plane->base.state); 39 const struct intel_crtc_state *crtc_state = 40 to_intel_crtc_state(crtc->base.state); 41 42 if (!crtc_state->uapi.active) 43 continue; 44 45 if (!plane_state->ggtt_vma) 46 continue; 47 48 if (plane_configs[this->pipe].base == plane_configs[crtc->pipe].base) { 49 *fb = plane_state->hw.fb; 50 *vma = plane_state->ggtt_vma; 51 return true; 52 } 53 } 54 55 return false; 56 } 57 58 static enum intel_memory_type 59 initial_plane_memory_type(struct intel_display *display) 60 { 61 struct drm_i915_private *i915 = to_i915(display->drm); 62 63 if (display->platform.dgfx) 64 return INTEL_MEMORY_LOCAL; 65 else if (HAS_LMEMBAR_SMEM_STOLEN(i915)) 66 return INTEL_MEMORY_STOLEN_LOCAL; 67 else 68 return INTEL_MEMORY_STOLEN_SYSTEM; 69 } 70 71 static bool 72 initial_plane_phys(struct intel_display *display, 73 struct intel_initial_plane_config *plane_config) 74 { 75 struct drm_i915_private *i915 = to_i915(display->drm); 76 struct i915_ggtt *ggtt = to_gt(i915)->ggtt; 77 struct intel_memory_region *mem; 78 enum intel_memory_type mem_type; 79 bool is_present, is_local; 80 dma_addr_t dma_addr; 81 u32 base; 82 83 mem_type = initial_plane_memory_type(display); 84 mem = intel_memory_region_by_type(i915, mem_type); 85 if (!mem) { 86 drm_dbg_kms(display->drm, 87 "Initial plane memory region (type %s) not initialized\n", 88 intel_memory_type_str(mem_type)); 89 return false; 90 } 91 92 base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT); 93 94 dma_addr = intel_ggtt_read_entry(&ggtt->vm, base, &is_present, &is_local); 95 96 if (!is_present) { 97 drm_err(display->drm, 98 "Initial plane FB PTE not present\n"); 99 return false; 100 } 101 102 if (intel_memory_type_is_local(mem->type) != is_local) { 103 drm_err(display->drm, 104 "Initial plane FB PTE unsuitable for %s\n", 105 mem->region.name); 106 return false; 107 } 108 109 if (dma_addr < mem->region.start || dma_addr > mem->region.end) { 110 drm_err(display->drm, 111 "Initial plane programming using invalid range, dma_addr=%pa (%s [%pa-%pa])\n", 112 &dma_addr, mem->region.name, &mem->region.start, &mem->region.end); 113 return false; 114 } 115 116 drm_dbg(display->drm, 117 "Using dma_addr=%pa, based on initial plane programming\n", 118 &dma_addr); 119 120 plane_config->phys_base = dma_addr - mem->region.start; 121 plane_config->mem = mem; 122 123 return true; 124 } 125 126 static struct i915_vma * 127 initial_plane_vma(struct intel_display *display, 128 struct intel_initial_plane_config *plane_config) 129 { 130 struct drm_i915_private *i915 = to_i915(display->drm); 131 struct intel_memory_region *mem; 132 struct drm_i915_gem_object *obj; 133 struct drm_mm_node orig_mm = {}; 134 struct i915_vma *vma; 135 resource_size_t phys_base; 136 u32 base, size; 137 u64 pinctl; 138 139 if (plane_config->size == 0) 140 return NULL; 141 142 if (!initial_plane_phys(display, plane_config)) 143 return NULL; 144 145 phys_base = plane_config->phys_base; 146 mem = plane_config->mem; 147 148 base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT); 149 size = round_up(plane_config->base + plane_config->size, 150 mem->min_page_size); 151 size -= base; 152 153 /* 154 * If the FB is too big, just don't use it since fbdev is not very 155 * important and we should probably use that space with FBC or other 156 * features. 157 */ 158 if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) && 159 mem == i915->mm.stolen_region && 160 size * 2 > i915->dsm.usable_size) { 161 drm_dbg_kms(display->drm, "Initial FB size exceeds half of stolen, discarding\n"); 162 return NULL; 163 } 164 165 obj = i915_gem_object_create_region_at(mem, phys_base, size, 166 I915_BO_ALLOC_USER | 167 I915_BO_PREALLOC); 168 if (IS_ERR(obj)) { 169 drm_dbg_kms(display->drm, "Failed to preallocate initial FB in %s\n", 170 mem->region.name); 171 return NULL; 172 } 173 174 /* 175 * Mark it WT ahead of time to avoid changing the 176 * cache_level during fbdev initialization. The 177 * unbind there would get stuck waiting for rcu. 178 */ 179 i915_gem_object_set_cache_coherency(obj, HAS_WT(i915) ? 180 I915_CACHE_WT : I915_CACHE_NONE); 181 182 switch (plane_config->tiling) { 183 case I915_TILING_NONE: 184 break; 185 case I915_TILING_X: 186 case I915_TILING_Y: 187 obj->tiling_and_stride = 188 plane_config->fb->base.pitches[0] | 189 plane_config->tiling; 190 break; 191 default: 192 MISSING_CASE(plane_config->tiling); 193 goto err_obj; 194 } 195 196 /* 197 * MTL GOP likes to place the framebuffer high up in ggtt, 198 * which can cause problems for ggtt_reserve_guc_top(). 199 * Try to pin it to a low ggtt address instead to avoid that. 200 */ 201 base = 0; 202 203 if (base != plane_config->base) { 204 struct i915_ggtt *ggtt = to_gt(i915)->ggtt; 205 int ret; 206 207 /* 208 * Make sure the original and new locations 209 * can't overlap. That would corrupt the original 210 * PTEs which are still being used for scanout. 211 */ 212 ret = i915_gem_gtt_reserve(&ggtt->vm, NULL, &orig_mm, 213 size, plane_config->base, 214 I915_COLOR_UNEVICTABLE, PIN_NOEVICT); 215 if (ret) 216 goto err_obj; 217 } 218 219 vma = i915_vma_instance(obj, &to_gt(i915)->ggtt->vm, NULL); 220 if (IS_ERR(vma)) 221 goto err_obj; 222 223 retry: 224 pinctl = PIN_GLOBAL | PIN_OFFSET_FIXED | base; 225 if (!i915_gem_object_is_lmem(obj)) 226 pinctl |= PIN_MAPPABLE; 227 if (i915_vma_pin(vma, 0, 0, pinctl)) { 228 if (drm_mm_node_allocated(&orig_mm)) { 229 drm_mm_remove_node(&orig_mm); 230 /* 231 * Try again, but this time pin 232 * it to its original location. 233 */ 234 base = plane_config->base; 235 goto retry; 236 } 237 goto err_obj; 238 } 239 240 if (i915_gem_object_is_tiled(obj) && 241 !i915_vma_is_map_and_fenceable(vma)) 242 goto err_obj; 243 244 if (drm_mm_node_allocated(&orig_mm)) 245 drm_mm_remove_node(&orig_mm); 246 247 drm_dbg_kms(display->drm, 248 "Initial plane fb bound to 0x%x in the ggtt (original 0x%x)\n", 249 i915_ggtt_offset(vma), plane_config->base); 250 251 return vma; 252 253 err_obj: 254 if (drm_mm_node_allocated(&orig_mm)) 255 drm_mm_remove_node(&orig_mm); 256 i915_gem_object_put(obj); 257 return NULL; 258 } 259 260 static bool 261 intel_alloc_initial_plane_obj(struct intel_crtc *crtc, 262 struct intel_initial_plane_config *plane_config) 263 { 264 struct intel_display *display = to_intel_display(crtc); 265 struct drm_mode_fb_cmd2 mode_cmd = {}; 266 struct drm_framebuffer *fb = &plane_config->fb->base; 267 struct i915_vma *vma; 268 269 switch (fb->modifier) { 270 case DRM_FORMAT_MOD_LINEAR: 271 case I915_FORMAT_MOD_X_TILED: 272 case I915_FORMAT_MOD_Y_TILED: 273 case I915_FORMAT_MOD_4_TILED: 274 break; 275 default: 276 drm_dbg(display->drm, 277 "Unsupported modifier for initial FB: 0x%llx\n", 278 fb->modifier); 279 return false; 280 } 281 282 vma = initial_plane_vma(display, plane_config); 283 if (!vma) 284 return false; 285 286 mode_cmd.pixel_format = fb->format->format; 287 mode_cmd.width = fb->width; 288 mode_cmd.height = fb->height; 289 mode_cmd.pitches[0] = fb->pitches[0]; 290 mode_cmd.modifier[0] = fb->modifier; 291 mode_cmd.flags = DRM_MODE_FB_MODIFIERS; 292 293 if (intel_framebuffer_init(to_intel_framebuffer(fb), 294 intel_bo_to_drm_bo(vma->obj), 295 fb->format, &mode_cmd)) { 296 drm_dbg_kms(display->drm, "intel fb init failed\n"); 297 goto err_vma; 298 } 299 300 plane_config->vma = vma; 301 return true; 302 303 err_vma: 304 i915_vma_put(vma); 305 return false; 306 } 307 308 static void 309 intel_find_initial_plane_obj(struct intel_crtc *crtc, 310 struct intel_initial_plane_config plane_configs[]) 311 { 312 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); 313 struct intel_initial_plane_config *plane_config = 314 &plane_configs[crtc->pipe]; 315 struct intel_plane *plane = 316 to_intel_plane(crtc->base.primary); 317 struct intel_plane_state *plane_state = 318 to_intel_plane_state(plane->base.state); 319 struct drm_framebuffer *fb; 320 struct i915_vma *vma; 321 322 /* 323 * TODO: 324 * Disable planes if get_initial_plane_config() failed. 325 * Make sure things work if the surface base is not page aligned. 326 */ 327 if (!plane_config->fb) 328 return; 329 330 if (intel_alloc_initial_plane_obj(crtc, plane_config)) { 331 fb = &plane_config->fb->base; 332 vma = plane_config->vma; 333 goto valid_fb; 334 } 335 336 /* 337 * Failed to alloc the obj, check to see if we should share 338 * an fb with another CRTC instead 339 */ 340 if (intel_reuse_initial_plane_obj(crtc, plane_configs, &fb, &vma)) 341 goto valid_fb; 342 343 /* 344 * We've failed to reconstruct the BIOS FB. Current display state 345 * indicates that the primary plane is visible, but has a NULL FB, 346 * which will lead to problems later if we don't fix it up. The 347 * simplest solution is to just disable the primary plane now and 348 * pretend the BIOS never had it enabled. 349 */ 350 intel_plane_disable_noatomic(crtc, plane); 351 352 return; 353 354 valid_fb: 355 plane_state->uapi.rotation = plane_config->rotation; 356 intel_fb_fill_view(to_intel_framebuffer(fb), 357 plane_state->uapi.rotation, &plane_state->view); 358 359 __i915_vma_pin(vma); 360 plane_state->ggtt_vma = i915_vma_get(vma); 361 if (intel_plane_uses_fence(plane_state) && 362 i915_vma_pin_fence(vma) == 0 && vma->fence) 363 plane_state->flags |= PLANE_HAS_FENCE; 364 365 plane_state->surf = i915_ggtt_offset(plane_state->ggtt_vma); 366 367 plane_state->uapi.src_x = 0; 368 plane_state->uapi.src_y = 0; 369 plane_state->uapi.src_w = fb->width << 16; 370 plane_state->uapi.src_h = fb->height << 16; 371 372 plane_state->uapi.crtc_x = 0; 373 plane_state->uapi.crtc_y = 0; 374 plane_state->uapi.crtc_w = fb->width; 375 plane_state->uapi.crtc_h = fb->height; 376 377 if (plane_config->tiling) 378 dev_priv->preserve_bios_swizzle = true; 379 380 plane_state->uapi.fb = fb; 381 drm_framebuffer_get(fb); 382 383 plane_state->uapi.crtc = &crtc->base; 384 intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc); 385 386 atomic_or(plane->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits); 387 } 388 389 static void plane_config_fini(struct intel_initial_plane_config *plane_config) 390 { 391 if (plane_config->fb) { 392 struct drm_framebuffer *fb = &plane_config->fb->base; 393 394 /* We may only have the stub and not a full framebuffer */ 395 if (drm_framebuffer_read_refcount(fb)) 396 drm_framebuffer_put(fb); 397 else 398 kfree(fb); 399 } 400 401 if (plane_config->vma) 402 i915_vma_put(plane_config->vma); 403 } 404 405 void intel_initial_plane_config(struct intel_display *display) 406 { 407 struct intel_initial_plane_config plane_configs[I915_MAX_PIPES] = {}; 408 struct intel_crtc *crtc; 409 410 for_each_intel_crtc(display->drm, crtc) { 411 struct intel_initial_plane_config *plane_config = 412 &plane_configs[crtc->pipe]; 413 414 if (!to_intel_crtc_state(crtc->base.state)->uapi.active) 415 continue; 416 417 /* 418 * Note that reserving the BIOS fb up front prevents us 419 * from stuffing other stolen allocations like the ring 420 * on top. This prevents some ugliness at boot time, and 421 * can even allow for smooth boot transitions if the BIOS 422 * fb is large enough for the active pipe configuration. 423 */ 424 display->funcs.display->get_initial_plane_config(crtc, plane_config); 425 426 /* 427 * If the fb is shared between multiple heads, we'll 428 * just get the first one. 429 */ 430 intel_find_initial_plane_obj(crtc, plane_configs); 431 432 if (display->funcs.display->fixup_initial_plane_config(crtc, plane_config)) 433 intel_plane_initial_vblank_wait(crtc); 434 435 plane_config_fini(plane_config); 436 } 437 } 438