1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18 * USE OR OTHER DEALINGS IN THE SOFTWARE. 19 * 20 * The above copyright notice and this permission notice (including the 21 * next paragraph) shall be included in all copies or substantial portions 22 * of the Software. 23 * 24 */ 25 /* 26 * Authors: Dave Airlie <airlied@redhat.com> 27 */ 28 #ifndef __AST_DRV_H__ 29 #define __AST_DRV_H__ 30 31 #include <linux/io.h> 32 #include <linux/types.h> 33 34 #include <drm/drm_connector.h> 35 #include <drm/drm_crtc.h> 36 #include <drm/drm_encoder.h> 37 #include <drm/drm_mode.h> 38 #include <drm/drm_framebuffer.h> 39 40 #include "ast_reg.h" 41 42 struct ast_vbios_enhtable; 43 44 #define DRIVER_AUTHOR "Dave Airlie" 45 46 #define DRIVER_NAME "ast" 47 #define DRIVER_DESC "AST" 48 49 #define DRIVER_MAJOR 0 50 #define DRIVER_MINOR 1 51 #define DRIVER_PATCHLEVEL 0 52 53 #define PCI_CHIP_AST2000 0x2000 54 #define PCI_CHIP_AST2100 0x2010 55 56 #define __AST_CHIP(__gen, __index) ((__gen) << 16 | (__index)) 57 58 enum ast_chip { 59 /* 1st gen */ 60 AST1000 = __AST_CHIP(1, 0), // unused 61 AST2000 = __AST_CHIP(1, 1), 62 /* 2nd gen */ 63 AST1100 = __AST_CHIP(2, 0), 64 AST2100 = __AST_CHIP(2, 1), 65 AST2050 = __AST_CHIP(2, 2), // unused 66 /* 3rd gen */ 67 AST2200 = __AST_CHIP(3, 0), 68 AST2150 = __AST_CHIP(3, 1), 69 /* 4th gen */ 70 AST2300 = __AST_CHIP(4, 0), 71 AST1300 = __AST_CHIP(4, 1), 72 AST1050 = __AST_CHIP(4, 2), // unused 73 /* 5th gen */ 74 AST2400 = __AST_CHIP(5, 0), 75 AST1400 = __AST_CHIP(5, 1), 76 AST1250 = __AST_CHIP(5, 2), // unused 77 /* 6th gen */ 78 AST2500 = __AST_CHIP(6, 0), 79 AST2510 = __AST_CHIP(6, 1), 80 AST2520 = __AST_CHIP(6, 2), // unused 81 /* 7th gen */ 82 AST2600 = __AST_CHIP(7, 0), 83 AST2620 = __AST_CHIP(7, 1), // unused 84 }; 85 86 #define __AST_CHIP_GEN(__chip) (((unsigned long)(__chip)) >> 16) 87 88 enum ast_tx_chip { 89 AST_TX_NONE, 90 AST_TX_SIL164, 91 AST_TX_DP501, 92 AST_TX_ASTDP, 93 }; 94 95 enum ast_config_mode { 96 ast_use_p2a, 97 ast_use_dt, 98 ast_use_defaults 99 }; 100 101 enum ast_dram_layout { 102 AST_DRAM_512Mx16 = 0, 103 AST_DRAM_1Gx16 = 1, 104 AST_DRAM_512Mx32 = 2, 105 AST_DRAM_1Gx32 = 3, 106 AST_DRAM_2Gx16 = 6, 107 AST_DRAM_4Gx16 = 7, 108 AST_DRAM_8Gx16 = 8, 109 }; 110 111 /* 112 * Hardware cursor 113 */ 114 115 #define AST_MAX_HWC_WIDTH 64 116 #define AST_MAX_HWC_HEIGHT 64 117 #define AST_HWC_PITCH (AST_MAX_HWC_WIDTH * SZ_2) 118 #define AST_HWC_SIZE (AST_MAX_HWC_HEIGHT * AST_HWC_PITCH) 119 120 /* 121 * Planes 122 */ 123 124 struct ast_plane { 125 struct drm_plane base; 126 127 u64 offset; 128 unsigned long size; 129 }; 130 131 static inline struct ast_plane *to_ast_plane(struct drm_plane *plane) 132 { 133 return container_of(plane, struct ast_plane, base); 134 } 135 136 struct ast_cursor_plane { 137 struct ast_plane base; 138 139 u8 argb4444[AST_HWC_SIZE]; 140 }; 141 142 static inline struct ast_cursor_plane *to_ast_cursor_plane(struct drm_plane *plane) 143 { 144 return container_of(to_ast_plane(plane), struct ast_cursor_plane, base); 145 } 146 147 /* 148 * Connector 149 */ 150 151 struct ast_connector { 152 struct drm_connector base; 153 154 enum drm_connector_status physical_status; 155 }; 156 157 static inline struct ast_connector * 158 to_ast_connector(struct drm_connector *connector) 159 { 160 return container_of(connector, struct ast_connector, base); 161 } 162 163 /* 164 * Device 165 */ 166 167 struct ast_device_quirks { 168 /* 169 * CRTC memory request threshold 170 */ 171 unsigned char crtc_mem_req_threshold_low; 172 unsigned char crtc_mem_req_threshold_high; 173 174 /* 175 * Adjust hsync values to load next scanline early. Signalled 176 * by AST2500PreCatchCRT in VBIOS mode flags. 177 */ 178 bool crtc_hsync_precatch_needed; 179 180 /* 181 * Workaround for modes with HSync Time that is not a multiple 182 * of 8 (e.g., 1920x1080@60Hz, HSync +44 pixels). 183 */ 184 bool crtc_hsync_add4_needed; 185 }; 186 187 struct ast_device { 188 struct drm_device base; 189 190 const struct ast_device_quirks *quirks; 191 192 void __iomem *regs; 193 void __iomem *ioregs; 194 void __iomem *dp501_fw_buf; 195 196 enum ast_config_mode config_mode; 197 enum ast_chip chip; 198 199 const struct ast_vbios_dclk_info *dclk_table; 200 201 void __iomem *vram; 202 unsigned long vram_base; 203 unsigned long vram_size; 204 205 struct mutex modeset_lock; /* Protects access to modeset I/O registers in ioregs */ 206 207 enum ast_tx_chip tx_chip; 208 209 struct ast_plane primary_plane; 210 struct ast_cursor_plane cursor_plane; 211 struct drm_crtc crtc; 212 union { 213 struct { 214 struct drm_encoder encoder; 215 struct ast_connector connector; 216 } vga; 217 struct { 218 struct drm_encoder encoder; 219 struct ast_connector connector; 220 } sil164; 221 struct { 222 struct drm_encoder encoder; 223 struct ast_connector connector; 224 } dp501; 225 struct { 226 struct drm_encoder encoder; 227 struct ast_connector connector; 228 } astdp; 229 } output; 230 231 bool support_wsxga_p; /* 1680x1050 */ 232 bool support_fullhd; /* 1920x1080 */ 233 bool support_wuxga; /* 1920x1200 */ 234 235 u8 *dp501_fw_addr; 236 const struct firmware *dp501_fw; /* dp501 fw */ 237 }; 238 239 static inline struct ast_device *to_ast_device(struct drm_device *dev) 240 { 241 return container_of(dev, struct ast_device, base); 242 } 243 244 static inline unsigned long __ast_gen(struct ast_device *ast) 245 { 246 return __AST_CHIP_GEN(ast->chip); 247 } 248 #define AST_GEN(__ast) __ast_gen(__ast) 249 250 static inline bool __ast_gen_is_eq(struct ast_device *ast, unsigned long gen) 251 { 252 return __ast_gen(ast) == gen; 253 } 254 #define IS_AST_GEN1(__ast) __ast_gen_is_eq(__ast, 1) 255 #define IS_AST_GEN2(__ast) __ast_gen_is_eq(__ast, 2) 256 #define IS_AST_GEN3(__ast) __ast_gen_is_eq(__ast, 3) 257 #define IS_AST_GEN4(__ast) __ast_gen_is_eq(__ast, 4) 258 #define IS_AST_GEN5(__ast) __ast_gen_is_eq(__ast, 5) 259 #define IS_AST_GEN6(__ast) __ast_gen_is_eq(__ast, 6) 260 #define IS_AST_GEN7(__ast) __ast_gen_is_eq(__ast, 7) 261 262 static inline u8 __ast_read8(const void __iomem *addr, u32 reg) 263 { 264 return ioread8(addr + reg); 265 } 266 267 static inline u32 __ast_read32(const void __iomem *addr, u32 reg) 268 { 269 return ioread32(addr + reg); 270 } 271 272 static inline void __ast_write8(void __iomem *addr, u32 reg, u8 val) 273 { 274 iowrite8(val, addr + reg); 275 } 276 277 static inline void __ast_write32(void __iomem *addr, u32 reg, u32 val) 278 { 279 iowrite32(val, addr + reg); 280 } 281 282 static inline u8 __ast_read8_i(void __iomem *addr, u32 reg, u8 index) 283 { 284 __ast_write8(addr, reg, index); 285 return __ast_read8(addr, reg + 1); 286 } 287 288 static inline u8 __ast_read8_i_masked(void __iomem *addr, u32 reg, u8 index, u8 read_mask) 289 { 290 u8 val = __ast_read8_i(addr, reg, index); 291 292 return val & read_mask; 293 } 294 295 static inline void __ast_write8_i(void __iomem *addr, u32 reg, u8 index, u8 val) 296 { 297 __ast_write8(addr, reg, index); 298 __ast_write8(addr, reg + 1, val); 299 } 300 301 static inline void __ast_write8_i_masked(void __iomem *addr, u32 reg, u8 index, u8 read_mask, 302 u8 val) 303 { 304 u8 tmp = __ast_read8_i_masked(addr, reg, index, read_mask); 305 306 tmp |= val; 307 __ast_write8_i(addr, reg, index, tmp); 308 } 309 310 static inline u32 ast_read32(struct ast_device *ast, u32 reg) 311 { 312 return __ast_read32(ast->regs, reg); 313 } 314 315 static inline void ast_write32(struct ast_device *ast, u32 reg, u32 val) 316 { 317 __ast_write32(ast->regs, reg, val); 318 } 319 320 static inline u8 ast_io_read8(struct ast_device *ast, u32 reg) 321 { 322 return __ast_read8(ast->ioregs, reg); 323 } 324 325 static inline void ast_io_write8(struct ast_device *ast, u32 reg, u8 val) 326 { 327 __ast_write8(ast->ioregs, reg, val); 328 } 329 330 static inline u8 ast_get_index_reg(struct ast_device *ast, u32 base, u8 index) 331 { 332 return __ast_read8_i(ast->ioregs, base, index); 333 } 334 335 static inline u8 ast_get_index_reg_mask(struct ast_device *ast, u32 base, u8 index, 336 u8 preserve_mask) 337 { 338 return __ast_read8_i_masked(ast->ioregs, base, index, preserve_mask); 339 } 340 341 static inline void ast_set_index_reg(struct ast_device *ast, u32 base, u8 index, u8 val) 342 { 343 __ast_write8_i(ast->ioregs, base, index, val); 344 } 345 346 static inline void ast_set_index_reg_mask(struct ast_device *ast, u32 base, u8 index, 347 u8 preserve_mask, u8 val) 348 { 349 __ast_write8_i_masked(ast->ioregs, base, index, preserve_mask, val); 350 } 351 352 struct ast_vbios_stdtable { 353 u8 misc; 354 u8 seq[4]; 355 u8 crtc[25]; 356 u8 ar[20]; 357 u8 gr[9]; 358 }; 359 360 struct ast_vbios_dclk_info { 361 u8 param1; 362 u8 param2; 363 u8 param3; 364 }; 365 366 struct ast_crtc_state { 367 struct drm_crtc_state base; 368 369 /* Last known format of primary plane */ 370 const struct drm_format_info *format; 371 372 const struct ast_vbios_stdtable *std_table; 373 const struct ast_vbios_enhtable *vmode; 374 }; 375 376 #define to_ast_crtc_state(state) container_of(state, struct ast_crtc_state, base) 377 378 #define AST_MM_ALIGN_SHIFT 4 379 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) 380 381 #define AST_DP501_FW_VERSION_MASK GENMASK(7, 4) 382 #define AST_DP501_FW_VERSION_1 BIT(4) 383 #define AST_DP501_PNP_CONNECTED BIT(1) 384 385 #define AST_DP501_DEFAULT_DCLK 65 386 387 #define AST_DP501_GBL_VERSION 0xf000 388 #define AST_DP501_PNPMONITOR 0xf010 389 #define AST_DP501_LINKRATE 0xf014 390 #define AST_DP501_EDID_DATA 0xf020 391 392 /* 393 * ASTDP resoultion table: 394 * EX: ASTDP_A_B_C: 395 * A: Resolution 396 * B: Refresh Rate 397 * C: Misc information, such as CVT, Reduce Blanked 398 */ 399 #define ASTDP_640x480_60 0x00 400 #define ASTDP_640x480_72 0x01 401 #define ASTDP_640x480_75 0x02 402 #define ASTDP_640x480_85 0x03 403 #define ASTDP_800x600_56 0x04 404 #define ASTDP_800x600_60 0x05 405 #define ASTDP_800x600_72 0x06 406 #define ASTDP_800x600_75 0x07 407 #define ASTDP_800x600_85 0x08 408 #define ASTDP_1024x768_60 0x09 409 #define ASTDP_1024x768_70 0x0A 410 #define ASTDP_1024x768_75 0x0B 411 #define ASTDP_1024x768_85 0x0C 412 #define ASTDP_1280x1024_60 0x0D 413 #define ASTDP_1280x1024_75 0x0E 414 #define ASTDP_1280x1024_85 0x0F 415 #define ASTDP_1600x1200_60 0x10 416 #define ASTDP_320x240_60 0x11 417 #define ASTDP_400x300_60 0x12 418 #define ASTDP_512x384_60 0x13 419 #define ASTDP_1920x1200_60 0x14 420 #define ASTDP_1920x1080_60 0x15 421 #define ASTDP_1280x800_60 0x16 422 #define ASTDP_1280x800_60_RB 0x17 423 #define ASTDP_1440x900_60 0x18 424 #define ASTDP_1440x900_60_RB 0x19 425 #define ASTDP_1680x1050_60 0x1A 426 #define ASTDP_1680x1050_60_RB 0x1B 427 #define ASTDP_1600x900_60 0x1C 428 #define ASTDP_1600x900_60_RB 0x1D 429 #define ASTDP_1366x768_60 0x1E 430 #define ASTDP_1152x864_75 0x1F 431 432 int ast_mm_init(struct ast_device *ast); 433 434 /* ast_drv.c */ 435 void ast_device_init(struct ast_device *ast, 436 enum ast_chip chip, 437 enum ast_config_mode config_mode, 438 void __iomem *regs, 439 void __iomem *ioregs, 440 const struct ast_device_quirks *quirks); 441 void __ast_device_set_tx_chip(struct ast_device *ast, enum ast_tx_chip tx_chip); 442 443 /* ast_2000.c */ 444 int ast_2000_post(struct ast_device *ast); 445 extern const struct ast_vbios_dclk_info ast_2000_dclk_table[]; 446 void ast_2000_detect_tx_chip(struct ast_device *ast, bool need_post); 447 struct drm_device *ast_2000_device_create(struct pci_dev *pdev, 448 const struct drm_driver *drv, 449 enum ast_chip chip, 450 enum ast_config_mode config_mode, 451 void __iomem *regs, 452 void __iomem *ioregs, 453 bool need_post); 454 455 /* ast_2100.c */ 456 int ast_2100_post(struct ast_device *ast); 457 bool __ast_2100_detect_wsxga_p(struct ast_device *ast); 458 bool __ast_2100_detect_wuxga(struct ast_device *ast); 459 struct drm_device *ast_2100_device_create(struct pci_dev *pdev, 460 const struct drm_driver *drv, 461 enum ast_chip chip, 462 enum ast_config_mode config_mode, 463 void __iomem *regs, 464 void __iomem *ioregs, 465 bool need_post); 466 467 /* ast_2200.c */ 468 struct drm_device *ast_2200_device_create(struct pci_dev *pdev, 469 const struct drm_driver *drv, 470 enum ast_chip chip, 471 enum ast_config_mode config_mode, 472 void __iomem *regs, 473 void __iomem *ioregs, 474 bool need_post); 475 476 /* ast_2300.c */ 477 int ast_2300_post(struct ast_device *ast); 478 void ast_2300_detect_tx_chip(struct ast_device *ast); 479 struct drm_device *ast_2300_device_create(struct pci_dev *pdev, 480 const struct drm_driver *drv, 481 enum ast_chip chip, 482 enum ast_config_mode config_mode, 483 void __iomem *regs, 484 void __iomem *ioregs, 485 bool need_post); 486 487 /* ast_2400.c */ 488 struct drm_device *ast_2400_device_create(struct pci_dev *pdev, 489 const struct drm_driver *drv, 490 enum ast_chip chip, 491 enum ast_config_mode config_mode, 492 void __iomem *regs, 493 void __iomem *ioregs, 494 bool need_post); 495 496 /* ast_2500.c */ 497 void ast_2500_patch_ahb(void __iomem *regs); 498 int ast_2500_post(struct ast_device *ast); 499 extern const struct ast_vbios_dclk_info ast_2500_dclk_table[]; 500 struct drm_device *ast_2500_device_create(struct pci_dev *pdev, 501 const struct drm_driver *drv, 502 enum ast_chip chip, 503 enum ast_config_mode config_mode, 504 void __iomem *regs, 505 void __iomem *ioregs, 506 bool need_post); 507 508 /* ast_2600.c */ 509 int ast_2600_post(struct ast_device *ast); 510 struct drm_device *ast_2600_device_create(struct pci_dev *pdev, 511 const struct drm_driver *drv, 512 enum ast_chip chip, 513 enum ast_config_mode config_mode, 514 void __iomem *regs, 515 void __iomem *ioregs, 516 bool need_post); 517 518 /* ast post */ 519 int ast_post_gpu(struct ast_device *ast); 520 u32 ast_mindwm(struct ast_device *ast, u32 r); 521 void ast_moutdwm(struct ast_device *ast, u32 r, u32 v); 522 523 int ast_vga_output_init(struct ast_device *ast); 524 int ast_sil164_output_init(struct ast_device *ast); 525 526 /* ast_cursor.c */ 527 long ast_cursor_vram_offset(struct ast_device *ast); 528 int ast_cursor_plane_init(struct ast_device *ast); 529 530 /* ast dp501 */ 531 bool ast_backup_fw(struct ast_device *ast, u8 *addr, u32 size); 532 void ast_init_3rdtx(struct ast_device *ast); 533 int ast_dp501_output_init(struct ast_device *ast); 534 535 /* aspeed DP */ 536 int ast_dp_launch(struct ast_device *ast); 537 int ast_astdp_output_init(struct ast_device *ast); 538 539 /* ast_mode.c */ 540 int ast_mode_config_init(struct ast_device *ast); 541 int ast_plane_init(struct drm_device *dev, struct ast_plane *ast_plane, 542 u64 offset, unsigned long size, 543 uint32_t possible_crtcs, 544 const struct drm_plane_funcs *funcs, 545 const uint32_t *formats, unsigned int format_count, 546 const uint64_t *format_modifiers, 547 enum drm_plane_type type); 548 void __iomem *ast_plane_vaddr(struct ast_plane *ast); 549 550 #endif 551