1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18 * USE OR OTHER DEALINGS IN THE SOFTWARE. 19 * 20 * The above copyright notice and this permission notice (including the 21 * next paragraph) shall be included in all copies or substantial portions 22 * of the Software. 23 * 24 */ 25 /* 26 * Authors: Dave Airlie <airlied@redhat.com> 27 */ 28 #ifndef __AST_DRV_H__ 29 #define __AST_DRV_H__ 30 31 #include <linux/io.h> 32 #include <linux/types.h> 33 34 #include <drm/drm_connector.h> 35 #include <drm/drm_crtc.h> 36 #include <drm/drm_encoder.h> 37 #include <drm/drm_mode.h> 38 #include <drm/drm_framebuffer.h> 39 40 #include "ast_reg.h" 41 42 struct ast_vbios_enhtable; 43 44 #define DRIVER_AUTHOR "Dave Airlie" 45 46 #define DRIVER_NAME "ast" 47 #define DRIVER_DESC "AST" 48 49 #define DRIVER_MAJOR 0 50 #define DRIVER_MINOR 1 51 #define DRIVER_PATCHLEVEL 0 52 53 #define PCI_CHIP_AST2000 0x2000 54 #define PCI_CHIP_AST2100 0x2010 55 56 #define __AST_CHIP(__gen, __index) ((__gen) << 16 | (__index)) 57 58 enum ast_chip { 59 /* 1st gen */ 60 AST1000 = __AST_CHIP(1, 0), // unused 61 AST2000 = __AST_CHIP(1, 1), 62 /* 2nd gen */ 63 AST1100 = __AST_CHIP(2, 0), 64 AST2100 = __AST_CHIP(2, 1), 65 AST2050 = __AST_CHIP(2, 2), // unused 66 /* 3rd gen */ 67 AST2200 = __AST_CHIP(3, 0), 68 AST2150 = __AST_CHIP(3, 1), 69 /* 4th gen */ 70 AST2300 = __AST_CHIP(4, 0), 71 AST1300 = __AST_CHIP(4, 1), 72 AST1050 = __AST_CHIP(4, 2), // unused 73 /* 5th gen */ 74 AST2400 = __AST_CHIP(5, 0), 75 AST1400 = __AST_CHIP(5, 1), 76 AST1250 = __AST_CHIP(5, 2), // unused 77 /* 6th gen */ 78 AST2500 = __AST_CHIP(6, 0), 79 AST2510 = __AST_CHIP(6, 1), 80 AST2520 = __AST_CHIP(6, 2), // unused 81 /* 7th gen */ 82 AST2600 = __AST_CHIP(7, 0), 83 AST2620 = __AST_CHIP(7, 1), // unused 84 }; 85 86 #define __AST_CHIP_GEN(__chip) (((unsigned long)(__chip)) >> 16) 87 88 enum ast_tx_chip { 89 AST_TX_NONE, 90 AST_TX_SIL164, 91 AST_TX_DP501, 92 AST_TX_ASTDP, 93 }; 94 95 enum ast_config_mode { 96 ast_use_p2a, 97 ast_use_dt, 98 ast_use_defaults 99 }; 100 101 enum ast_dram_layout { 102 AST_DRAM_512Mx16 = 0, 103 AST_DRAM_1Gx16 = 1, 104 AST_DRAM_512Mx32 = 2, 105 AST_DRAM_1Gx32 = 3, 106 AST_DRAM_2Gx16 = 6, 107 AST_DRAM_4Gx16 = 7, 108 AST_DRAM_8Gx16 = 8, 109 }; 110 111 /* 112 * Hardware cursor 113 */ 114 115 #define AST_MAX_HWC_WIDTH 64 116 #define AST_MAX_HWC_HEIGHT 64 117 #define AST_HWC_PITCH (AST_MAX_HWC_WIDTH * SZ_2) 118 #define AST_HWC_SIZE (AST_MAX_HWC_HEIGHT * AST_HWC_PITCH) 119 120 /* 121 * Planes 122 */ 123 124 struct ast_plane { 125 struct drm_plane base; 126 127 u64 offset; 128 unsigned long size; 129 }; 130 131 static inline struct ast_plane *to_ast_plane(struct drm_plane *plane) 132 { 133 return container_of(plane, struct ast_plane, base); 134 } 135 136 struct ast_cursor_plane { 137 struct ast_plane base; 138 139 u8 argb4444[AST_HWC_SIZE]; 140 }; 141 142 static inline struct ast_cursor_plane *to_ast_cursor_plane(struct drm_plane *plane) 143 { 144 return container_of(to_ast_plane(plane), struct ast_cursor_plane, base); 145 } 146 147 /* 148 * Connector 149 */ 150 151 struct ast_connector { 152 struct drm_connector base; 153 154 enum drm_connector_status physical_status; 155 }; 156 157 static inline struct ast_connector * 158 to_ast_connector(struct drm_connector *connector) 159 { 160 return container_of(connector, struct ast_connector, base); 161 } 162 163 /* 164 * Device 165 */ 166 167 struct ast_device { 168 struct drm_device base; 169 170 void __iomem *regs; 171 void __iomem *ioregs; 172 void __iomem *dp501_fw_buf; 173 174 enum ast_config_mode config_mode; 175 enum ast_chip chip; 176 177 void __iomem *vram; 178 unsigned long vram_base; 179 unsigned long vram_size; 180 181 struct mutex modeset_lock; /* Protects access to modeset I/O registers in ioregs */ 182 183 enum ast_tx_chip tx_chip; 184 185 struct ast_plane primary_plane; 186 struct ast_cursor_plane cursor_plane; 187 struct drm_crtc crtc; 188 union { 189 struct { 190 struct drm_encoder encoder; 191 struct ast_connector connector; 192 } vga; 193 struct { 194 struct drm_encoder encoder; 195 struct ast_connector connector; 196 } sil164; 197 struct { 198 struct drm_encoder encoder; 199 struct ast_connector connector; 200 } dp501; 201 struct { 202 struct drm_encoder encoder; 203 struct ast_connector connector; 204 } astdp; 205 } output; 206 207 bool support_wsxga_p; /* 1680x1050 */ 208 bool support_fullhd; /* 1920x1080 */ 209 bool support_wuxga; /* 1920x1200 */ 210 211 u8 *dp501_fw_addr; 212 const struct firmware *dp501_fw; /* dp501 fw */ 213 }; 214 215 static inline struct ast_device *to_ast_device(struct drm_device *dev) 216 { 217 return container_of(dev, struct ast_device, base); 218 } 219 220 static inline unsigned long __ast_gen(struct ast_device *ast) 221 { 222 return __AST_CHIP_GEN(ast->chip); 223 } 224 #define AST_GEN(__ast) __ast_gen(__ast) 225 226 static inline bool __ast_gen_is_eq(struct ast_device *ast, unsigned long gen) 227 { 228 return __ast_gen(ast) == gen; 229 } 230 #define IS_AST_GEN1(__ast) __ast_gen_is_eq(__ast, 1) 231 #define IS_AST_GEN2(__ast) __ast_gen_is_eq(__ast, 2) 232 #define IS_AST_GEN3(__ast) __ast_gen_is_eq(__ast, 3) 233 #define IS_AST_GEN4(__ast) __ast_gen_is_eq(__ast, 4) 234 #define IS_AST_GEN5(__ast) __ast_gen_is_eq(__ast, 5) 235 #define IS_AST_GEN6(__ast) __ast_gen_is_eq(__ast, 6) 236 #define IS_AST_GEN7(__ast) __ast_gen_is_eq(__ast, 7) 237 238 static inline u8 __ast_read8(const void __iomem *addr, u32 reg) 239 { 240 return ioread8(addr + reg); 241 } 242 243 static inline u32 __ast_read32(const void __iomem *addr, u32 reg) 244 { 245 return ioread32(addr + reg); 246 } 247 248 static inline void __ast_write8(void __iomem *addr, u32 reg, u8 val) 249 { 250 iowrite8(val, addr + reg); 251 } 252 253 static inline void __ast_write32(void __iomem *addr, u32 reg, u32 val) 254 { 255 iowrite32(val, addr + reg); 256 } 257 258 static inline u8 __ast_read8_i(void __iomem *addr, u32 reg, u8 index) 259 { 260 __ast_write8(addr, reg, index); 261 return __ast_read8(addr, reg + 1); 262 } 263 264 static inline u8 __ast_read8_i_masked(void __iomem *addr, u32 reg, u8 index, u8 read_mask) 265 { 266 u8 val = __ast_read8_i(addr, reg, index); 267 268 return val & read_mask; 269 } 270 271 static inline void __ast_write8_i(void __iomem *addr, u32 reg, u8 index, u8 val) 272 { 273 __ast_write8(addr, reg, index); 274 __ast_write8(addr, reg + 1, val); 275 } 276 277 static inline void __ast_write8_i_masked(void __iomem *addr, u32 reg, u8 index, u8 read_mask, 278 u8 val) 279 { 280 u8 tmp = __ast_read8_i_masked(addr, reg, index, read_mask); 281 282 tmp |= val; 283 __ast_write8_i(addr, reg, index, tmp); 284 } 285 286 static inline u32 ast_read32(struct ast_device *ast, u32 reg) 287 { 288 return __ast_read32(ast->regs, reg); 289 } 290 291 static inline void ast_write32(struct ast_device *ast, u32 reg, u32 val) 292 { 293 __ast_write32(ast->regs, reg, val); 294 } 295 296 static inline u8 ast_io_read8(struct ast_device *ast, u32 reg) 297 { 298 return __ast_read8(ast->ioregs, reg); 299 } 300 301 static inline void ast_io_write8(struct ast_device *ast, u32 reg, u8 val) 302 { 303 __ast_write8(ast->ioregs, reg, val); 304 } 305 306 static inline u8 ast_get_index_reg(struct ast_device *ast, u32 base, u8 index) 307 { 308 return __ast_read8_i(ast->ioregs, base, index); 309 } 310 311 static inline u8 ast_get_index_reg_mask(struct ast_device *ast, u32 base, u8 index, 312 u8 preserve_mask) 313 { 314 return __ast_read8_i_masked(ast->ioregs, base, index, preserve_mask); 315 } 316 317 static inline void ast_set_index_reg(struct ast_device *ast, u32 base, u8 index, u8 val) 318 { 319 __ast_write8_i(ast->ioregs, base, index, val); 320 } 321 322 static inline void ast_set_index_reg_mask(struct ast_device *ast, u32 base, u8 index, 323 u8 preserve_mask, u8 val) 324 { 325 __ast_write8_i_masked(ast->ioregs, base, index, preserve_mask, val); 326 } 327 328 struct ast_vbios_stdtable { 329 u8 misc; 330 u8 seq[4]; 331 u8 crtc[25]; 332 u8 ar[20]; 333 u8 gr[9]; 334 }; 335 336 struct ast_vbios_dclk_info { 337 u8 param1; 338 u8 param2; 339 u8 param3; 340 }; 341 342 struct ast_crtc_state { 343 struct drm_crtc_state base; 344 345 /* Last known format of primary plane */ 346 const struct drm_format_info *format; 347 348 const struct ast_vbios_stdtable *std_table; 349 const struct ast_vbios_enhtable *vmode; 350 }; 351 352 #define to_ast_crtc_state(state) container_of(state, struct ast_crtc_state, base) 353 354 #define AST_MM_ALIGN_SHIFT 4 355 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) 356 357 #define AST_DP501_FW_VERSION_MASK GENMASK(7, 4) 358 #define AST_DP501_FW_VERSION_1 BIT(4) 359 #define AST_DP501_PNP_CONNECTED BIT(1) 360 361 #define AST_DP501_DEFAULT_DCLK 65 362 363 #define AST_DP501_GBL_VERSION 0xf000 364 #define AST_DP501_PNPMONITOR 0xf010 365 #define AST_DP501_LINKRATE 0xf014 366 #define AST_DP501_EDID_DATA 0xf020 367 368 /* 369 * ASTDP resoultion table: 370 * EX: ASTDP_A_B_C: 371 * A: Resolution 372 * B: Refresh Rate 373 * C: Misc information, such as CVT, Reduce Blanked 374 */ 375 #define ASTDP_640x480_60 0x00 376 #define ASTDP_640x480_72 0x01 377 #define ASTDP_640x480_75 0x02 378 #define ASTDP_640x480_85 0x03 379 #define ASTDP_800x600_56 0x04 380 #define ASTDP_800x600_60 0x05 381 #define ASTDP_800x600_72 0x06 382 #define ASTDP_800x600_75 0x07 383 #define ASTDP_800x600_85 0x08 384 #define ASTDP_1024x768_60 0x09 385 #define ASTDP_1024x768_70 0x0A 386 #define ASTDP_1024x768_75 0x0B 387 #define ASTDP_1024x768_85 0x0C 388 #define ASTDP_1280x1024_60 0x0D 389 #define ASTDP_1280x1024_75 0x0E 390 #define ASTDP_1280x1024_85 0x0F 391 #define ASTDP_1600x1200_60 0x10 392 #define ASTDP_320x240_60 0x11 393 #define ASTDP_400x300_60 0x12 394 #define ASTDP_512x384_60 0x13 395 #define ASTDP_1920x1200_60 0x14 396 #define ASTDP_1920x1080_60 0x15 397 #define ASTDP_1280x800_60 0x16 398 #define ASTDP_1280x800_60_RB 0x17 399 #define ASTDP_1440x900_60 0x18 400 #define ASTDP_1440x900_60_RB 0x19 401 #define ASTDP_1680x1050_60 0x1A 402 #define ASTDP_1680x1050_60_RB 0x1B 403 #define ASTDP_1600x900_60 0x1C 404 #define ASTDP_1600x900_60_RB 0x1D 405 #define ASTDP_1366x768_60 0x1E 406 #define ASTDP_1152x864_75 0x1F 407 408 int ast_mm_init(struct ast_device *ast); 409 410 /* ast_drv.c */ 411 void ast_device_init(struct ast_device *ast, 412 enum ast_chip chip, 413 enum ast_config_mode config_mode, 414 void __iomem *regs, 415 void __iomem *ioregs); 416 void __ast_device_set_tx_chip(struct ast_device *ast, enum ast_tx_chip tx_chip); 417 418 /* ast_2000.c */ 419 int ast_2000_post(struct ast_device *ast); 420 extern const struct ast_vbios_dclk_info ast_2000_dclk_table[]; 421 void ast_2000_detect_tx_chip(struct ast_device *ast, bool need_post); 422 struct drm_device *ast_2000_device_create(struct pci_dev *pdev, 423 const struct drm_driver *drv, 424 enum ast_chip chip, 425 enum ast_config_mode config_mode, 426 void __iomem *regs, 427 void __iomem *ioregs, 428 bool need_post); 429 430 /* ast_2100.c */ 431 int ast_2100_post(struct ast_device *ast); 432 bool __ast_2100_detect_wsxga_p(struct ast_device *ast); 433 bool __ast_2100_detect_wuxga(struct ast_device *ast); 434 struct drm_device *ast_2100_device_create(struct pci_dev *pdev, 435 const struct drm_driver *drv, 436 enum ast_chip chip, 437 enum ast_config_mode config_mode, 438 void __iomem *regs, 439 void __iomem *ioregs, 440 bool need_post); 441 442 /* ast_2200.c */ 443 struct drm_device *ast_2200_device_create(struct pci_dev *pdev, 444 const struct drm_driver *drv, 445 enum ast_chip chip, 446 enum ast_config_mode config_mode, 447 void __iomem *regs, 448 void __iomem *ioregs, 449 bool need_post); 450 451 /* ast_2300.c */ 452 int ast_2300_post(struct ast_device *ast); 453 void ast_2300_detect_tx_chip(struct ast_device *ast); 454 struct drm_device *ast_2300_device_create(struct pci_dev *pdev, 455 const struct drm_driver *drv, 456 enum ast_chip chip, 457 enum ast_config_mode config_mode, 458 void __iomem *regs, 459 void __iomem *ioregs, 460 bool need_post); 461 462 /* ast_2400.c */ 463 struct drm_device *ast_2400_device_create(struct pci_dev *pdev, 464 const struct drm_driver *drv, 465 enum ast_chip chip, 466 enum ast_config_mode config_mode, 467 void __iomem *regs, 468 void __iomem *ioregs, 469 bool need_post); 470 471 /* ast_2500.c */ 472 void ast_2500_patch_ahb(void __iomem *regs); 473 int ast_2500_post(struct ast_device *ast); 474 extern const struct ast_vbios_dclk_info ast_2500_dclk_table[]; 475 struct drm_device *ast_2500_device_create(struct pci_dev *pdev, 476 const struct drm_driver *drv, 477 enum ast_chip chip, 478 enum ast_config_mode config_mode, 479 void __iomem *regs, 480 void __iomem *ioregs, 481 bool need_post); 482 483 /* ast_2600.c */ 484 int ast_2600_post(struct ast_device *ast); 485 struct drm_device *ast_2600_device_create(struct pci_dev *pdev, 486 const struct drm_driver *drv, 487 enum ast_chip chip, 488 enum ast_config_mode config_mode, 489 void __iomem *regs, 490 void __iomem *ioregs, 491 bool need_post); 492 493 /* ast post */ 494 int ast_post_gpu(struct ast_device *ast); 495 u32 ast_mindwm(struct ast_device *ast, u32 r); 496 void ast_moutdwm(struct ast_device *ast, u32 r, u32 v); 497 498 int ast_vga_output_init(struct ast_device *ast); 499 int ast_sil164_output_init(struct ast_device *ast); 500 501 /* ast_cursor.c */ 502 long ast_cursor_vram_offset(struct ast_device *ast); 503 int ast_cursor_plane_init(struct ast_device *ast); 504 505 /* ast dp501 */ 506 bool ast_backup_fw(struct ast_device *ast, u8 *addr, u32 size); 507 void ast_init_3rdtx(struct ast_device *ast); 508 int ast_dp501_output_init(struct ast_device *ast); 509 510 /* aspeed DP */ 511 int ast_dp_launch(struct ast_device *ast); 512 int ast_astdp_output_init(struct ast_device *ast); 513 514 /* ast_mode.c */ 515 int ast_mode_config_init(struct ast_device *ast); 516 int ast_plane_init(struct drm_device *dev, struct ast_plane *ast_plane, 517 u64 offset, unsigned long size, 518 uint32_t possible_crtcs, 519 const struct drm_plane_funcs *funcs, 520 const uint32_t *formats, unsigned int format_count, 521 const uint64_t *format_modifiers, 522 enum drm_plane_type type); 523 void __iomem *ast_plane_vaddr(struct ast_plane *ast); 524 525 #endif 526