1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18 * USE OR OTHER DEALINGS IN THE SOFTWARE. 19 * 20 * The above copyright notice and this permission notice (including the 21 * next paragraph) shall be included in all copies or substantial portions 22 * of the Software. 23 * 24 */ 25 /* 26 * Authors: Dave Airlie <airlied@redhat.com> 27 */ 28 29 #include <linux/aperture.h> 30 #include <linux/module.h> 31 #include <linux/of.h> 32 #include <linux/pci.h> 33 34 #include <drm/clients/drm_client_setup.h> 35 #include <drm/drm_atomic_helper.h> 36 #include <drm/drm_drv.h> 37 #include <drm/drm_fbdev_shmem.h> 38 #include <drm/drm_gem_shmem_helper.h> 39 #include <drm/drm_module.h> 40 #include <drm/drm_print.h> 41 #include <drm/drm_probe_helper.h> 42 43 #include "ast_drv.h" 44 45 static int ast_modeset = -1; 46 47 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 48 module_param_named(modeset, ast_modeset, int, 0400); 49 50 void ast_device_init(struct ast_device *ast, 51 enum ast_chip chip, 52 enum ast_config_mode config_mode, 53 void __iomem *regs, 54 void __iomem *ioregs) 55 { 56 ast->chip = chip; 57 ast->config_mode = config_mode; 58 ast->regs = regs; 59 ast->ioregs = ioregs; 60 } 61 62 void __ast_device_set_tx_chip(struct ast_device *ast, enum ast_tx_chip tx_chip) 63 { 64 static const char * const info_str[] = { 65 "analog VGA", 66 "Sil164 TMDS transmitter", 67 "DP501 DisplayPort transmitter", 68 "ASPEED DisplayPort transmitter", 69 }; 70 71 drm_info(&ast->base, "Using %s\n", info_str[tx_chip]); 72 73 ast->tx_chip = tx_chip; 74 } 75 76 /* 77 * DRM driver 78 */ 79 80 DEFINE_DRM_GEM_FOPS(ast_fops); 81 82 static const struct drm_driver ast_driver = { 83 .driver_features = DRIVER_ATOMIC | 84 DRIVER_GEM | 85 DRIVER_MODESET, 86 87 .fops = &ast_fops, 88 .name = DRIVER_NAME, 89 .desc = DRIVER_DESC, 90 .major = DRIVER_MAJOR, 91 .minor = DRIVER_MINOR, 92 .patchlevel = DRIVER_PATCHLEVEL, 93 94 DRM_GEM_SHMEM_DRIVER_OPS, 95 DRM_FBDEV_SHMEM_DRIVER_OPS, 96 }; 97 98 /* 99 * PCI driver 100 */ 101 102 #define PCI_VENDOR_ASPEED 0x1a03 103 104 #define AST_VGA_DEVICE(id, info) { \ 105 .class = PCI_BASE_CLASS_DISPLAY << 16, \ 106 .class_mask = 0xff0000, \ 107 .vendor = PCI_VENDOR_ASPEED, \ 108 .device = id, \ 109 .subvendor = PCI_ANY_ID, \ 110 .subdevice = PCI_ANY_ID, \ 111 .driver_data = (unsigned long) info } 112 113 static const struct pci_device_id ast_pciidlist[] = { 114 AST_VGA_DEVICE(PCI_CHIP_AST2000, NULL), 115 AST_VGA_DEVICE(PCI_CHIP_AST2100, NULL), 116 {0, 0, 0}, 117 }; 118 119 MODULE_DEVICE_TABLE(pci, ast_pciidlist); 120 121 static bool ast_is_vga_enabled(void __iomem *ioregs) 122 { 123 u8 vgaer = __ast_read8(ioregs, AST_IO_VGAER); 124 125 return vgaer & AST_IO_VGAER_VGA_ENABLE; 126 } 127 128 static void ast_enable_vga(void __iomem *ioregs) 129 { 130 __ast_write8(ioregs, AST_IO_VGAER, AST_IO_VGAER_VGA_ENABLE); 131 __ast_write8(ioregs, AST_IO_VGAMR_W, AST_IO_VGAMR_IOSEL); 132 } 133 134 /* 135 * Run this function as part of the HW device cleanup; not 136 * when the DRM device gets released. 137 */ 138 static void ast_enable_mmio_release(void *data) 139 { 140 void __iomem *ioregs = (void __force __iomem *)data; 141 142 /* enable standard VGA decode */ 143 __ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1, AST_IO_VGACRA1_MMIO_ENABLED); 144 } 145 146 static int ast_enable_mmio(struct device *dev, void __iomem *ioregs) 147 { 148 void *data = (void __force *)ioregs; 149 150 __ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1, 151 AST_IO_VGACRA1_MMIO_ENABLED | 152 AST_IO_VGACRA1_VGAIO_DISABLED); 153 154 return devm_add_action_or_reset(dev, ast_enable_mmio_release, data); 155 } 156 157 static void ast_open_key(void __iomem *ioregs) 158 { 159 __ast_write8_i(ioregs, AST_IO_VGACRI, 0x80, AST_IO_VGACR80_PASSWORD); 160 } 161 162 static int ast_detect_chip(struct pci_dev *pdev, 163 void __iomem *regs, void __iomem *ioregs, 164 enum ast_chip *chip_out, 165 enum ast_config_mode *config_mode_out) 166 { 167 struct device *dev = &pdev->dev; 168 struct device_node *np = dev->of_node; 169 enum ast_config_mode config_mode = ast_use_defaults; 170 uint32_t scu_rev = 0xffffffff; 171 enum ast_chip chip; 172 u32 data; 173 u8 vgacrd0, vgacrd1; 174 175 /* 176 * Find configuration mode and read SCU revision 177 */ 178 179 /* Check if we have device-tree properties */ 180 if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", &data)) { 181 /* We do, disable P2A access */ 182 config_mode = ast_use_dt; 183 scu_rev = data; 184 } else if (pdev->device == PCI_CHIP_AST2000) { // Not all families have a P2A bridge 185 /* 186 * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge 187 * is disabled. We force using P2A if VGA only mode bit 188 * is set D[7] 189 */ 190 vgacrd0 = __ast_read8_i(ioregs, AST_IO_VGACRI, 0xd0); 191 vgacrd1 = __ast_read8_i(ioregs, AST_IO_VGACRI, 0xd1); 192 if (!(vgacrd0 & 0x80) || !(vgacrd1 & 0x10)) { 193 194 /* 195 * We have a P2A bridge and it is enabled. 196 */ 197 198 /* Patch AST2500/AST2510 */ 199 if ((pdev->revision & 0xf0) == 0x40) { 200 if (!(vgacrd0 & AST_IO_VGACRD0_VRAM_INIT_STATUS_MASK)) 201 ast_2500_patch_ahb(regs); 202 } 203 204 /* Double check that it's actually working */ 205 data = __ast_read32(regs, 0xf004); 206 if ((data != 0xffffffff) && (data != 0x00)) { 207 config_mode = ast_use_p2a; 208 209 /* Read SCU7c (silicon revision register) */ 210 __ast_write32(regs, 0xf004, 0x1e6e0000); 211 __ast_write32(regs, 0xf000, 0x1); 212 scu_rev = __ast_read32(regs, 0x1207c); 213 } 214 } 215 } 216 217 switch (config_mode) { 218 case ast_use_defaults: 219 dev_info(dev, "Using default configuration\n"); 220 break; 221 case ast_use_dt: 222 dev_info(dev, "Using device-tree for configuration\n"); 223 break; 224 case ast_use_p2a: 225 dev_info(dev, "Using P2A bridge for configuration\n"); 226 break; 227 } 228 229 /* 230 * Identify chipset 231 */ 232 233 if (pdev->revision >= 0x50) { 234 chip = AST2600; 235 dev_info(dev, "AST 2600 detected\n"); 236 } else if (pdev->revision >= 0x40) { 237 switch (scu_rev & 0x300) { 238 case 0x0100: 239 chip = AST2510; 240 dev_info(dev, "AST 2510 detected\n"); 241 break; 242 default: 243 chip = AST2500; 244 dev_info(dev, "AST 2500 detected\n"); 245 break; 246 } 247 } else if (pdev->revision >= 0x30) { 248 switch (scu_rev & 0x300) { 249 case 0x0100: 250 chip = AST1400; 251 dev_info(dev, "AST 1400 detected\n"); 252 break; 253 default: 254 chip = AST2400; 255 dev_info(dev, "AST 2400 detected\n"); 256 break; 257 } 258 } else if (pdev->revision >= 0x20) { 259 switch (scu_rev & 0x300) { 260 case 0x0000: 261 chip = AST1300; 262 dev_info(dev, "AST 1300 detected\n"); 263 break; 264 default: 265 chip = AST2300; 266 dev_info(dev, "AST 2300 detected\n"); 267 break; 268 } 269 } else if (pdev->revision >= 0x10) { 270 switch (scu_rev & 0x0300) { 271 case 0x0200: 272 chip = AST1100; 273 dev_info(dev, "AST 1100 detected\n"); 274 break; 275 case 0x0100: 276 chip = AST2200; 277 dev_info(dev, "AST 2200 detected\n"); 278 break; 279 case 0x0000: 280 chip = AST2150; 281 dev_info(dev, "AST 2150 detected\n"); 282 break; 283 default: 284 chip = AST2100; 285 dev_info(dev, "AST 2100 detected\n"); 286 break; 287 } 288 } else { 289 chip = AST2000; 290 dev_info(dev, "AST 2000 detected\n"); 291 } 292 293 *chip_out = chip; 294 *config_mode_out = config_mode; 295 296 return __AST_CHIP_GEN(chip); 297 } 298 299 static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 300 { 301 struct device *dev = &pdev->dev; 302 int ret; 303 void __iomem *regs; 304 void __iomem *ioregs; 305 enum ast_config_mode config_mode; 306 enum ast_chip chip; 307 unsigned int chip_gen; 308 struct drm_device *drm; 309 bool need_post = false; 310 311 ret = aperture_remove_conflicting_pci_devices(pdev, ast_driver.name); 312 if (ret) 313 return ret; 314 315 ret = pcim_enable_device(pdev); 316 if (ret) 317 return ret; 318 319 regs = pcim_iomap_region(pdev, 1, "ast"); 320 if (IS_ERR(regs)) 321 return PTR_ERR(regs); 322 323 if (pdev->revision >= 0x40) { 324 /* 325 * On AST2500 and later models, MMIO is enabled by 326 * default. Adopt it to be compatible with ARM. 327 */ 328 resource_size_t len = pci_resource_len(pdev, 1); 329 330 if (len < AST_IO_MM_OFFSET) 331 return -EIO; 332 if ((len - AST_IO_MM_OFFSET) < AST_IO_MM_LENGTH) 333 return -EIO; 334 ioregs = regs + AST_IO_MM_OFFSET; 335 } else if (pci_resource_flags(pdev, 2) & IORESOURCE_IO) { 336 /* 337 * Map I/O registers if we have a PCI BAR for I/O. 338 */ 339 resource_size_t len = pci_resource_len(pdev, 2); 340 341 if (len < AST_IO_MM_LENGTH) 342 return -EIO; 343 ioregs = pcim_iomap_region(pdev, 2, "ast"); 344 if (IS_ERR(ioregs)) 345 return PTR_ERR(ioregs); 346 } else { 347 /* 348 * Anything else is best effort. 349 */ 350 resource_size_t len = pci_resource_len(pdev, 1); 351 352 if (len < AST_IO_MM_OFFSET) 353 return -EIO; 354 if ((len - AST_IO_MM_OFFSET) < AST_IO_MM_LENGTH) 355 return -EIO; 356 ioregs = regs + AST_IO_MM_OFFSET; 357 358 dev_info(dev, "Platform has no I/O space, using MMIO\n"); 359 } 360 361 if (!ast_is_vga_enabled(ioregs)) { 362 dev_info(dev, "VGA not enabled on entry, requesting chip POST\n"); 363 need_post = true; 364 } 365 366 /* 367 * If VGA isn't enabled, we need to enable now or subsequent 368 * access to the scratch registers will fail. 369 */ 370 if (need_post) 371 ast_enable_vga(ioregs); 372 /* Enable extended register access */ 373 ast_open_key(ioregs); 374 375 ret = ast_enable_mmio(dev, ioregs); 376 if (ret) 377 return ret; 378 379 ret = ast_detect_chip(pdev, regs, ioregs, &chip, &config_mode); 380 if (ret < 0) 381 return ret; 382 chip_gen = ret; 383 384 switch (chip_gen) { 385 case 1: 386 drm = ast_2000_device_create(pdev, &ast_driver, chip, config_mode, 387 regs, ioregs, need_post); 388 break; 389 case 2: 390 drm = ast_2100_device_create(pdev, &ast_driver, chip, config_mode, 391 regs, ioregs, need_post); 392 break; 393 case 3: 394 drm = ast_2200_device_create(pdev, &ast_driver, chip, config_mode, 395 regs, ioregs, need_post); 396 break; 397 case 4: 398 drm = ast_2300_device_create(pdev, &ast_driver, chip, config_mode, 399 regs, ioregs, need_post); 400 break; 401 case 5: 402 drm = ast_2400_device_create(pdev, &ast_driver, chip, config_mode, 403 regs, ioregs, need_post); 404 break; 405 case 6: 406 drm = ast_2500_device_create(pdev, &ast_driver, chip, config_mode, 407 regs, ioregs, need_post); 408 break; 409 case 7: 410 drm = ast_2600_device_create(pdev, &ast_driver, chip, config_mode, 411 regs, ioregs, need_post); 412 break; 413 default: 414 dev_err(&pdev->dev, "Gen%d not supported\n", chip_gen); 415 return -ENODEV; 416 } 417 if (IS_ERR(drm)) 418 return PTR_ERR(drm); 419 pci_set_drvdata(pdev, drm); 420 421 ret = drm_dev_register(drm, ent->driver_data); 422 if (ret) 423 return ret; 424 425 drm_client_setup(drm, NULL); 426 427 return 0; 428 } 429 430 static void ast_pci_remove(struct pci_dev *pdev) 431 { 432 struct drm_device *dev = pci_get_drvdata(pdev); 433 434 drm_dev_unregister(dev); 435 drm_atomic_helper_shutdown(dev); 436 } 437 438 static void ast_pci_shutdown(struct pci_dev *pdev) 439 { 440 drm_atomic_helper_shutdown(pci_get_drvdata(pdev)); 441 } 442 443 static int ast_drm_freeze(struct drm_device *dev) 444 { 445 int error; 446 447 error = drm_mode_config_helper_suspend(dev); 448 if (error) 449 return error; 450 pci_save_state(to_pci_dev(dev->dev)); 451 return 0; 452 } 453 454 static int ast_drm_thaw(struct drm_device *dev) 455 { 456 struct ast_device *ast = to_ast_device(dev); 457 int ret; 458 459 ast_enable_vga(ast->ioregs); 460 ast_open_key(ast->ioregs); 461 ast_enable_mmio(dev->dev, ast->ioregs); 462 463 ret = ast_post_gpu(ast); 464 if (ret) 465 return ret; 466 467 return drm_mode_config_helper_resume(dev); 468 } 469 470 static int ast_drm_resume(struct drm_device *dev) 471 { 472 if (pci_enable_device(to_pci_dev(dev->dev))) 473 return -EIO; 474 475 return ast_drm_thaw(dev); 476 } 477 478 static int ast_pm_suspend(struct device *dev) 479 { 480 struct pci_dev *pdev = to_pci_dev(dev); 481 struct drm_device *ddev = pci_get_drvdata(pdev); 482 int error; 483 484 error = ast_drm_freeze(ddev); 485 if (error) 486 return error; 487 488 pci_disable_device(pdev); 489 pci_set_power_state(pdev, PCI_D3hot); 490 return 0; 491 } 492 493 static int ast_pm_resume(struct device *dev) 494 { 495 struct pci_dev *pdev = to_pci_dev(dev); 496 struct drm_device *ddev = pci_get_drvdata(pdev); 497 return ast_drm_resume(ddev); 498 } 499 500 static int ast_pm_freeze(struct device *dev) 501 { 502 struct pci_dev *pdev = to_pci_dev(dev); 503 struct drm_device *ddev = pci_get_drvdata(pdev); 504 return ast_drm_freeze(ddev); 505 } 506 507 static int ast_pm_thaw(struct device *dev) 508 { 509 struct pci_dev *pdev = to_pci_dev(dev); 510 struct drm_device *ddev = pci_get_drvdata(pdev); 511 return ast_drm_thaw(ddev); 512 } 513 514 static int ast_pm_poweroff(struct device *dev) 515 { 516 struct pci_dev *pdev = to_pci_dev(dev); 517 struct drm_device *ddev = pci_get_drvdata(pdev); 518 519 return ast_drm_freeze(ddev); 520 } 521 522 static const struct dev_pm_ops ast_pm_ops = { 523 .suspend = ast_pm_suspend, 524 .resume = ast_pm_resume, 525 .freeze = ast_pm_freeze, 526 .thaw = ast_pm_thaw, 527 .poweroff = ast_pm_poweroff, 528 .restore = ast_pm_resume, 529 }; 530 531 static struct pci_driver ast_pci_driver = { 532 .name = DRIVER_NAME, 533 .id_table = ast_pciidlist, 534 .probe = ast_pci_probe, 535 .remove = ast_pci_remove, 536 .shutdown = ast_pci_shutdown, 537 .driver.pm = &ast_pm_ops, 538 }; 539 540 drm_module_pci_driver_if_modeset(ast_pci_driver, ast_modeset); 541 542 MODULE_AUTHOR(DRIVER_AUTHOR); 543 MODULE_DESCRIPTION(DRIVER_DESC); 544 MODULE_LICENSE("GPL and additional rights"); 545