1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) COPYRIGHT 2016 ARM Limited. All rights reserved. 4 * Author: Brian Starkey <brian.starkey@arm.com> 5 * 6 * ARM Mali DP Writeback connector implementation 7 */ 8 9 #include <drm/drm_atomic.h> 10 #include <drm/drm_atomic_helper.h> 11 #include <drm/drm_crtc.h> 12 #include <drm/drm_edid.h> 13 #include <drm/drm_fb_dma_helper.h> 14 #include <drm/drm_fourcc.h> 15 #include <drm/drm_framebuffer.h> 16 #include <drm/drm_gem_dma_helper.h> 17 #include <drm/drm_print.h> 18 #include <drm/drm_probe_helper.h> 19 #include <drm/drm_writeback.h> 20 21 #include "malidp_drv.h" 22 #include "malidp_hw.h" 23 #include "malidp_mw.h" 24 25 #define to_mw_state(_state) (struct malidp_mw_connector_state *)(_state) 26 27 struct malidp_mw_connector_state { 28 struct drm_connector_state base; 29 dma_addr_t addrs[2]; 30 s32 pitches[2]; 31 u8 format; 32 u8 n_planes; 33 bool rgb2yuv_initialized; 34 const s16 *rgb2yuv_coeffs; 35 }; 36 37 static int malidp_mw_connector_get_modes(struct drm_connector *connector) 38 { 39 struct drm_device *dev = connector->dev; 40 41 return drm_add_modes_noedid(connector, dev->mode_config.max_width, 42 dev->mode_config.max_height); 43 } 44 45 static enum drm_mode_status 46 malidp_mw_connector_mode_valid(struct drm_connector *connector, 47 const struct drm_display_mode *mode) 48 { 49 struct drm_device *dev = connector->dev; 50 struct drm_mode_config *mode_config = &dev->mode_config; 51 int w = mode->hdisplay, h = mode->vdisplay; 52 53 if ((w < mode_config->min_width) || (w > mode_config->max_width)) 54 return MODE_BAD_HVALUE; 55 56 if ((h < mode_config->min_height) || (h > mode_config->max_height)) 57 return MODE_BAD_VVALUE; 58 59 return MODE_OK; 60 } 61 62 static const struct drm_connector_helper_funcs malidp_mw_connector_helper_funcs = { 63 .get_modes = malidp_mw_connector_get_modes, 64 .mode_valid = malidp_mw_connector_mode_valid, 65 }; 66 67 static void malidp_mw_connector_reset(struct drm_connector *connector) 68 { 69 struct malidp_mw_connector_state *mw_state = 70 kzalloc(sizeof(*mw_state), GFP_KERNEL); 71 72 if (connector->state) 73 __drm_atomic_helper_connector_destroy_state(connector->state); 74 75 kfree(connector->state); 76 connector->state = NULL; 77 78 if (mw_state) 79 __drm_atomic_helper_connector_reset(connector, &mw_state->base); 80 } 81 82 static enum drm_connector_status 83 malidp_mw_connector_detect(struct drm_connector *connector, bool force) 84 { 85 return connector_status_connected; 86 } 87 88 static void malidp_mw_connector_destroy(struct drm_connector *connector) 89 { 90 drm_connector_cleanup(connector); 91 } 92 93 static struct drm_connector_state * 94 malidp_mw_connector_duplicate_state(struct drm_connector *connector) 95 { 96 struct malidp_mw_connector_state *mw_state, *mw_current_state; 97 98 if (WARN_ON(!connector->state)) 99 return NULL; 100 101 mw_state = kzalloc(sizeof(*mw_state), GFP_KERNEL); 102 if (!mw_state) 103 return NULL; 104 105 mw_current_state = to_mw_state(connector->state); 106 mw_state->rgb2yuv_coeffs = mw_current_state->rgb2yuv_coeffs; 107 mw_state->rgb2yuv_initialized = mw_current_state->rgb2yuv_initialized; 108 109 __drm_atomic_helper_connector_duplicate_state(connector, &mw_state->base); 110 111 return &mw_state->base; 112 } 113 114 static const struct drm_connector_funcs malidp_mw_connector_funcs = { 115 .reset = malidp_mw_connector_reset, 116 .detect = malidp_mw_connector_detect, 117 .fill_modes = drm_helper_probe_single_connector_modes, 118 .destroy = malidp_mw_connector_destroy, 119 .atomic_duplicate_state = malidp_mw_connector_duplicate_state, 120 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 121 }; 122 123 static const s16 rgb2yuv_coeffs_bt709_limited[MALIDP_COLORADJ_NUM_COEFFS] = { 124 47, 157, 16, 125 -26, -87, 112, 126 112, -102, -10, 127 16, 128, 128 128 }; 129 130 static int 131 malidp_mw_encoder_atomic_check(struct drm_encoder *encoder, 132 struct drm_crtc_state *crtc_state, 133 struct drm_connector_state *conn_state) 134 { 135 struct malidp_mw_connector_state *mw_state = to_mw_state(conn_state); 136 struct malidp_drm *malidp = drm_to_malidp(encoder->dev); 137 struct drm_framebuffer *fb; 138 int i, n_planes; 139 140 if (!conn_state->writeback_job) 141 return 0; 142 143 fb = conn_state->writeback_job->fb; 144 if ((fb->width != crtc_state->mode.hdisplay) || 145 (fb->height != crtc_state->mode.vdisplay)) { 146 DRM_DEBUG_KMS("Invalid framebuffer size %ux%u\n", 147 fb->width, fb->height); 148 return -EINVAL; 149 } 150 151 if (fb->modifier) { 152 DRM_DEBUG_KMS("Writeback framebuffer does not support modifiers\n"); 153 return -EINVAL; 154 } 155 156 mw_state->format = 157 malidp_hw_get_format_id(&malidp->dev->hw->map, SE_MEMWRITE, 158 fb->format->format, !!fb->modifier); 159 if (mw_state->format == MALIDP_INVALID_FORMAT_ID) { 160 DRM_DEBUG_KMS("Invalid pixel format %p4cc\n", 161 &fb->format->format); 162 return -EINVAL; 163 } 164 165 n_planes = fb->format->num_planes; 166 for (i = 0; i < n_planes; i++) { 167 struct drm_gem_dma_object *obj = drm_fb_dma_get_gem_obj(fb, i); 168 /* memory write buffers are never rotated */ 169 u8 alignment = malidp_hw_get_pitch_align(malidp->dev, 0); 170 171 if (fb->pitches[i] & (alignment - 1)) { 172 DRM_DEBUG_KMS("Invalid pitch %u for plane %d\n", 173 fb->pitches[i], i); 174 return -EINVAL; 175 } 176 mw_state->pitches[i] = fb->pitches[i]; 177 mw_state->addrs[i] = obj->dma_addr + fb->offsets[i]; 178 } 179 mw_state->n_planes = n_planes; 180 181 if (fb->format->is_yuv) 182 mw_state->rgb2yuv_coeffs = rgb2yuv_coeffs_bt709_limited; 183 184 return 0; 185 } 186 187 static const struct drm_encoder_helper_funcs malidp_mw_encoder_helper_funcs = { 188 .atomic_check = malidp_mw_encoder_atomic_check, 189 }; 190 191 static u32 *get_writeback_formats(struct malidp_drm *malidp, int *n_formats) 192 { 193 const struct malidp_hw_regmap *map = &malidp->dev->hw->map; 194 u32 *formats; 195 int n, i; 196 197 formats = kcalloc(map->n_pixel_formats, sizeof(*formats), 198 GFP_KERNEL); 199 if (!formats) 200 return NULL; 201 202 for (n = 0, i = 0; i < map->n_pixel_formats; i++) { 203 if (map->pixel_formats[i].layer & SE_MEMWRITE) 204 formats[n++] = map->pixel_formats[i].format; 205 } 206 207 *n_formats = n; 208 209 return formats; 210 } 211 212 int malidp_mw_connector_init(struct drm_device *drm) 213 { 214 struct malidp_drm *malidp = drm_to_malidp(drm); 215 u32 *formats; 216 int ret, n_formats; 217 218 if (!malidp->dev->hw->enable_memwrite) 219 return 0; 220 221 drm_connector_helper_add(&malidp->mw_connector.base, 222 &malidp_mw_connector_helper_funcs); 223 224 formats = get_writeback_formats(malidp, &n_formats); 225 if (!formats) 226 return -ENOMEM; 227 228 ret = drm_writeback_connector_init(drm, &malidp->mw_connector, 229 &malidp_mw_connector_funcs, 230 &malidp_mw_encoder_helper_funcs, 231 formats, n_formats, 232 1 << drm_crtc_index(&malidp->crtc)); 233 kfree(formats); 234 if (ret) 235 return ret; 236 237 return 0; 238 } 239 240 void malidp_mw_atomic_commit(struct drm_device *drm, 241 struct drm_atomic_state *old_state) 242 { 243 struct malidp_drm *malidp = drm_to_malidp(drm); 244 struct drm_writeback_connector *mw_conn = &malidp->mw_connector; 245 struct drm_connector_state *conn_state = mw_conn->base.state; 246 struct malidp_hw_device *hwdev = malidp->dev; 247 struct malidp_mw_connector_state *mw_state; 248 249 if (!conn_state) 250 return; 251 252 mw_state = to_mw_state(conn_state); 253 254 if (conn_state->writeback_job) { 255 struct drm_framebuffer *fb = conn_state->writeback_job->fb; 256 257 DRM_DEV_DEBUG_DRIVER(drm->dev, 258 "Enable memwrite %ux%u:%d %pad fmt: %u\n", 259 fb->width, fb->height, 260 mw_state->pitches[0], 261 &mw_state->addrs[0], 262 mw_state->format); 263 264 drm_writeback_queue_job(mw_conn, conn_state); 265 hwdev->hw->enable_memwrite(hwdev, mw_state->addrs, 266 mw_state->pitches, mw_state->n_planes, 267 fb->width, fb->height, mw_state->format, 268 !mw_state->rgb2yuv_initialized ? 269 mw_state->rgb2yuv_coeffs : NULL); 270 mw_state->rgb2yuv_initialized = !!mw_state->rgb2yuv_coeffs; 271 } else { 272 DRM_DEV_DEBUG_DRIVER(drm->dev, "Disable memwrite\n"); 273 hwdev->hw->disable_memwrite(hwdev); 274 } 275 } 276