1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 202 return 0; 203 } 204 205 static int 206 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 207 unsigned long offset, unsigned long npages, 208 unsigned long *hmm_pfns) 209 { 210 struct kfd_process *p; 211 uint32_t gpuidx; 212 int r; 213 214 p = container_of(prange->svms, struct kfd_process, svms); 215 216 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 217 struct kfd_process_device *pdd; 218 219 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 220 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 221 if (!pdd) { 222 pr_debug("failed to find device idx %d\n", gpuidx); 223 return -EINVAL; 224 } 225 226 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 227 hmm_pfns, gpuidx); 228 if (r) 229 break; 230 } 231 232 return r; 233 } 234 235 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 236 unsigned long offset, unsigned long npages) 237 { 238 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 239 int i; 240 241 if (!dma_addr) 242 return; 243 244 for (i = offset; i < offset + npages; i++) { 245 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 246 continue; 247 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 248 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 249 dma_addr[i] = 0; 250 } 251 } 252 253 void svm_range_dma_unmap(struct svm_range *prange) 254 { 255 struct kfd_process_device *pdd; 256 dma_addr_t *dma_addr; 257 struct device *dev; 258 struct kfd_process *p; 259 uint32_t gpuidx; 260 261 p = container_of(prange->svms, struct kfd_process, svms); 262 263 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 264 dma_addr = prange->dma_addr[gpuidx]; 265 if (!dma_addr) 266 continue; 267 268 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 269 if (!pdd) { 270 pr_debug("failed to find device idx %d\n", gpuidx); 271 continue; 272 } 273 dev = &pdd->dev->adev->pdev->dev; 274 275 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 276 } 277 } 278 279 static void svm_range_free(struct svm_range *prange, bool do_unmap) 280 { 281 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 282 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 283 uint32_t gpuidx; 284 285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 286 prange->start, prange->last); 287 288 svm_range_vram_node_free(prange); 289 if (do_unmap) 290 svm_range_dma_unmap(prange); 291 292 if (do_unmap && !p->xnack_enabled) { 293 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 294 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 295 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 296 } 297 298 /* free dma_addr array for each gpu */ 299 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 300 if (prange->dma_addr[gpuidx]) { 301 kvfree(prange->dma_addr[gpuidx]); 302 prange->dma_addr[gpuidx] = NULL; 303 } 304 } 305 306 mutex_destroy(&prange->lock); 307 mutex_destroy(&prange->migrate_mutex); 308 kfree(prange); 309 } 310 311 static void 312 svm_range_set_default_attributes(struct svm_range_list *svms, int32_t *location, 313 int32_t *prefetch_loc, uint8_t *granularity, 314 uint32_t *flags) 315 { 316 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 317 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 318 *granularity = svms->default_granularity; 319 *flags = 320 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 321 } 322 323 static struct 324 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 325 uint64_t last, bool update_mem_usage) 326 { 327 uint64_t size = last - start + 1; 328 struct svm_range *prange; 329 struct kfd_process *p; 330 331 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 332 if (!prange) 333 return NULL; 334 335 p = container_of(svms, struct kfd_process, svms); 336 if (!p->xnack_enabled && update_mem_usage && 337 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 338 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 339 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 340 kfree(prange); 341 return NULL; 342 } 343 prange->npages = size; 344 prange->svms = svms; 345 prange->start = start; 346 prange->last = last; 347 INIT_LIST_HEAD(&prange->list); 348 INIT_LIST_HEAD(&prange->update_list); 349 INIT_LIST_HEAD(&prange->svm_bo_list); 350 INIT_LIST_HEAD(&prange->deferred_list); 351 INIT_LIST_HEAD(&prange->child_list); 352 atomic_set(&prange->invalid, 0); 353 prange->validate_timestamp = 0; 354 prange->vram_pages = 0; 355 mutex_init(&prange->migrate_mutex); 356 mutex_init(&prange->lock); 357 358 if (p->xnack_enabled) 359 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 360 MAX_GPU_INSTANCE); 361 362 svm_range_set_default_attributes(svms, &prange->preferred_loc, 363 &prange->prefetch_loc, 364 &prange->granularity, &prange->flags); 365 366 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 367 368 return prange; 369 } 370 371 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 372 { 373 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 374 return false; 375 376 return true; 377 } 378 379 static void svm_range_bo_release(struct kref *kref) 380 { 381 struct svm_range_bo *svm_bo; 382 383 svm_bo = container_of(kref, struct svm_range_bo, kref); 384 pr_debug("svm_bo 0x%p\n", svm_bo); 385 386 spin_lock(&svm_bo->list_lock); 387 while (!list_empty(&svm_bo->range_list)) { 388 struct svm_range *prange = 389 list_first_entry(&svm_bo->range_list, 390 struct svm_range, svm_bo_list); 391 /* list_del_init tells a concurrent svm_range_vram_node_new when 392 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 393 */ 394 list_del_init(&prange->svm_bo_list); 395 spin_unlock(&svm_bo->list_lock); 396 397 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 398 prange->start, prange->last); 399 mutex_lock(&prange->lock); 400 prange->svm_bo = NULL; 401 /* prange should not hold vram page now */ 402 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 403 mutex_unlock(&prange->lock); 404 405 spin_lock(&svm_bo->list_lock); 406 } 407 spin_unlock(&svm_bo->list_lock); 408 409 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 410 struct kfd_process_device *pdd; 411 struct kfd_process *p; 412 struct mm_struct *mm; 413 414 mm = svm_bo->eviction_fence->mm; 415 /* 416 * The forked child process takes svm_bo device pages ref, svm_bo could be 417 * released after parent process is gone. 418 */ 419 p = kfd_lookup_process_by_mm(mm); 420 if (p) { 421 pdd = kfd_get_process_device_data(svm_bo->node, p); 422 if (pdd) 423 atomic64_sub(amdgpu_bo_size(svm_bo->bo), &pdd->vram_usage); 424 kfd_unref_process(p); 425 } 426 mmput(mm); 427 } 428 429 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) 430 /* We're not in the eviction worker. Signal the fence. */ 431 dma_fence_signal(&svm_bo->eviction_fence->base); 432 dma_fence_put(&svm_bo->eviction_fence->base); 433 amdgpu_bo_unref(&svm_bo->bo); 434 kfree(svm_bo); 435 } 436 437 static void svm_range_bo_wq_release(struct work_struct *work) 438 { 439 struct svm_range_bo *svm_bo; 440 441 svm_bo = container_of(work, struct svm_range_bo, release_work); 442 svm_range_bo_release(&svm_bo->kref); 443 } 444 445 static void svm_range_bo_release_async(struct kref *kref) 446 { 447 struct svm_range_bo *svm_bo; 448 449 svm_bo = container_of(kref, struct svm_range_bo, kref); 450 pr_debug("svm_bo 0x%p\n", svm_bo); 451 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 452 schedule_work(&svm_bo->release_work); 453 } 454 455 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 456 { 457 kref_put(&svm_bo->kref, svm_range_bo_release_async); 458 } 459 460 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 461 { 462 if (svm_bo) 463 kref_put(&svm_bo->kref, svm_range_bo_release); 464 } 465 466 static bool 467 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 468 { 469 mutex_lock(&prange->lock); 470 if (!prange->svm_bo) { 471 mutex_unlock(&prange->lock); 472 return false; 473 } 474 if (prange->ttm_res) { 475 /* We still have a reference, all is well */ 476 mutex_unlock(&prange->lock); 477 return true; 478 } 479 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 480 /* 481 * Migrate from GPU to GPU, remove range from source svm_bo->node 482 * range list, and return false to allocate svm_bo from destination 483 * node. 484 */ 485 if (prange->svm_bo->node != node) { 486 mutex_unlock(&prange->lock); 487 488 spin_lock(&prange->svm_bo->list_lock); 489 list_del_init(&prange->svm_bo_list); 490 spin_unlock(&prange->svm_bo->list_lock); 491 492 svm_range_bo_unref(prange->svm_bo); 493 return false; 494 } 495 if (READ_ONCE(prange->svm_bo->evicting)) { 496 struct dma_fence *f; 497 struct svm_range_bo *svm_bo; 498 /* The BO is getting evicted, 499 * we need to get a new one 500 */ 501 mutex_unlock(&prange->lock); 502 svm_bo = prange->svm_bo; 503 f = dma_fence_get(&svm_bo->eviction_fence->base); 504 svm_range_bo_unref(prange->svm_bo); 505 /* wait for the fence to avoid long spin-loop 506 * at list_empty_careful 507 */ 508 dma_fence_wait(f, false); 509 dma_fence_put(f); 510 } else { 511 /* The BO was still around and we got 512 * a new reference to it 513 */ 514 mutex_unlock(&prange->lock); 515 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 516 prange->svms, prange->start, prange->last); 517 518 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 519 return true; 520 } 521 522 } else { 523 mutex_unlock(&prange->lock); 524 } 525 526 /* We need a new svm_bo. Spin-loop to wait for concurrent 527 * svm_range_bo_release to finish removing this range from 528 * its range list and set prange->svm_bo to null. After this, 529 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 530 */ 531 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 532 cond_resched(); 533 534 return false; 535 } 536 537 static struct svm_range_bo *svm_range_bo_new(void) 538 { 539 struct svm_range_bo *svm_bo; 540 541 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 542 if (!svm_bo) 543 return NULL; 544 545 kref_init(&svm_bo->kref); 546 INIT_LIST_HEAD(&svm_bo->range_list); 547 spin_lock_init(&svm_bo->list_lock); 548 549 return svm_bo; 550 } 551 552 int 553 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 554 bool clear) 555 { 556 struct kfd_process_device *pdd; 557 struct amdgpu_bo_param bp; 558 struct svm_range_bo *svm_bo; 559 struct amdgpu_bo_user *ubo; 560 struct amdgpu_bo *bo; 561 struct kfd_process *p; 562 struct mm_struct *mm; 563 int r; 564 565 p = container_of(prange->svms, struct kfd_process, svms); 566 pr_debug("process pid: %d svms 0x%p [0x%lx 0x%lx]\n", 567 p->lead_thread->pid, prange->svms, 568 prange->start, prange->last); 569 570 if (svm_range_validate_svm_bo(node, prange)) 571 return 0; 572 573 svm_bo = svm_range_bo_new(); 574 if (!svm_bo) { 575 pr_debug("failed to alloc svm bo\n"); 576 return -ENOMEM; 577 } 578 mm = get_task_mm(p->lead_thread); 579 if (!mm) { 580 pr_debug("failed to get mm\n"); 581 kfree(svm_bo); 582 return -ESRCH; 583 } 584 svm_bo->node = node; 585 svm_bo->eviction_fence = 586 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 587 mm, 588 svm_bo); 589 mmput(mm); 590 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 591 svm_bo->evicting = 0; 592 memset(&bp, 0, sizeof(bp)); 593 bp.size = prange->npages * PAGE_SIZE; 594 bp.byte_align = PAGE_SIZE; 595 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 596 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 597 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 598 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 599 bp.type = ttm_bo_type_device; 600 bp.resv = NULL; 601 if (node->xcp) 602 bp.xcp_id_plus1 = node->xcp->id + 1; 603 604 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 605 if (r) { 606 pr_debug("failed %d to create bo\n", r); 607 goto create_bo_failed; 608 } 609 bo = &ubo->bo; 610 611 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 612 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 613 bp.xcp_id_plus1 - 1); 614 615 r = amdgpu_bo_reserve(bo, true); 616 if (r) { 617 pr_debug("failed %d to reserve bo\n", r); 618 goto reserve_bo_failed; 619 } 620 621 if (clear) { 622 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 623 if (r) { 624 pr_debug("failed %d to sync bo\n", r); 625 amdgpu_bo_unreserve(bo); 626 goto reserve_bo_failed; 627 } 628 } 629 630 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 631 if (r) { 632 pr_debug("failed %d to reserve bo\n", r); 633 amdgpu_bo_unreserve(bo); 634 goto reserve_bo_failed; 635 } 636 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 637 638 amdgpu_bo_unreserve(bo); 639 640 svm_bo->bo = bo; 641 prange->svm_bo = svm_bo; 642 prange->ttm_res = bo->tbo.resource; 643 prange->offset = 0; 644 645 spin_lock(&svm_bo->list_lock); 646 list_add(&prange->svm_bo_list, &svm_bo->range_list); 647 spin_unlock(&svm_bo->list_lock); 648 649 pdd = svm_range_get_pdd_by_node(prange, node); 650 if (pdd) 651 atomic64_add(amdgpu_bo_size(bo), &pdd->vram_usage); 652 653 return 0; 654 655 reserve_bo_failed: 656 amdgpu_bo_unref(&bo); 657 create_bo_failed: 658 dma_fence_put(&svm_bo->eviction_fence->base); 659 kfree(svm_bo); 660 prange->ttm_res = NULL; 661 662 return r; 663 } 664 665 void svm_range_vram_node_free(struct svm_range *prange) 666 { 667 /* serialize prange->svm_bo unref */ 668 mutex_lock(&prange->lock); 669 /* prange->svm_bo has not been unref */ 670 if (prange->ttm_res) { 671 prange->ttm_res = NULL; 672 mutex_unlock(&prange->lock); 673 svm_range_bo_unref(prange->svm_bo); 674 } else 675 mutex_unlock(&prange->lock); 676 } 677 678 struct kfd_node * 679 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 680 { 681 struct kfd_process *p; 682 struct kfd_process_device *pdd; 683 684 p = container_of(prange->svms, struct kfd_process, svms); 685 pdd = kfd_process_device_data_by_id(p, gpu_id); 686 if (!pdd) { 687 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 688 return NULL; 689 } 690 691 return pdd->dev; 692 } 693 694 struct kfd_process_device * 695 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 696 { 697 struct kfd_process *p; 698 699 p = container_of(prange->svms, struct kfd_process, svms); 700 701 return kfd_get_process_device_data(node, p); 702 } 703 704 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 705 { 706 struct ttm_operation_ctx ctx = { false, false }; 707 708 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 709 710 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 711 } 712 713 static int 714 svm_range_check_attr(struct kfd_process *p, 715 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 716 { 717 uint32_t i; 718 719 for (i = 0; i < nattr; i++) { 720 uint32_t val = attrs[i].value; 721 int gpuidx = MAX_GPU_INSTANCE; 722 723 switch (attrs[i].type) { 724 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 725 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 726 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 727 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 728 break; 729 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 730 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 731 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 732 break; 733 case KFD_IOCTL_SVM_ATTR_ACCESS: 734 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 735 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 736 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 737 break; 738 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 739 break; 740 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 741 break; 742 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 743 break; 744 default: 745 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 746 return -EINVAL; 747 } 748 749 if (gpuidx < 0) { 750 pr_debug("no GPU 0x%x found\n", val); 751 return -EINVAL; 752 } else if (gpuidx < MAX_GPU_INSTANCE && 753 !test_bit(gpuidx, p->svms.bitmap_supported)) { 754 pr_debug("GPU 0x%x not supported\n", val); 755 return -EINVAL; 756 } 757 } 758 759 return 0; 760 } 761 762 static void 763 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 764 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 765 bool *update_mapping) 766 { 767 uint32_t i; 768 int gpuidx; 769 770 for (i = 0; i < nattr; i++) { 771 switch (attrs[i].type) { 772 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 773 prange->preferred_loc = attrs[i].value; 774 break; 775 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 776 prange->prefetch_loc = attrs[i].value; 777 break; 778 case KFD_IOCTL_SVM_ATTR_ACCESS: 779 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 780 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 781 if (!p->xnack_enabled) 782 *update_mapping = true; 783 784 gpuidx = kfd_process_gpuidx_from_gpuid(p, 785 attrs[i].value); 786 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 787 bitmap_clear(prange->bitmap_access, gpuidx, 1); 788 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 789 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 790 bitmap_set(prange->bitmap_access, gpuidx, 1); 791 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 792 } else { 793 bitmap_clear(prange->bitmap_access, gpuidx, 1); 794 bitmap_set(prange->bitmap_aip, gpuidx, 1); 795 } 796 break; 797 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 798 *update_mapping = true; 799 prange->flags |= attrs[i].value; 800 break; 801 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 802 *update_mapping = true; 803 prange->flags &= ~attrs[i].value; 804 break; 805 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 806 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 807 break; 808 default: 809 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 810 } 811 } 812 } 813 814 static bool 815 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 816 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 817 { 818 uint32_t i; 819 int gpuidx; 820 821 for (i = 0; i < nattr; i++) { 822 switch (attrs[i].type) { 823 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 824 if (prange->preferred_loc != attrs[i].value) 825 return false; 826 break; 827 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 828 /* Prefetch should always trigger a migration even 829 * if the value of the attribute didn't change. 830 */ 831 return false; 832 case KFD_IOCTL_SVM_ATTR_ACCESS: 833 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 834 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 835 gpuidx = kfd_process_gpuidx_from_gpuid(p, 836 attrs[i].value); 837 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 838 if (test_bit(gpuidx, prange->bitmap_access) || 839 test_bit(gpuidx, prange->bitmap_aip)) 840 return false; 841 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 842 if (!test_bit(gpuidx, prange->bitmap_access)) 843 return false; 844 } else { 845 if (!test_bit(gpuidx, prange->bitmap_aip)) 846 return false; 847 } 848 break; 849 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 850 if ((prange->flags & attrs[i].value) != attrs[i].value) 851 return false; 852 break; 853 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 854 if ((prange->flags & attrs[i].value) != 0) 855 return false; 856 break; 857 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 858 if (prange->granularity != attrs[i].value) 859 return false; 860 break; 861 default: 862 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 863 } 864 } 865 866 return true; 867 } 868 869 /** 870 * svm_range_debug_dump - print all range information from svms 871 * @svms: svm range list header 872 * 873 * debug output svm range start, end, prefetch location from svms 874 * interval tree and link list 875 * 876 * Context: The caller must hold svms->lock 877 */ 878 static void svm_range_debug_dump(struct svm_range_list *svms) 879 { 880 struct interval_tree_node *node; 881 struct svm_range *prange; 882 883 pr_debug("dump svms 0x%p list\n", svms); 884 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 885 886 list_for_each_entry(prange, &svms->list, list) { 887 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 888 prange, prange->start, prange->npages, 889 prange->start + prange->npages - 1, 890 prange->actual_loc); 891 } 892 893 pr_debug("dump svms 0x%p interval tree\n", svms); 894 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 895 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 896 while (node) { 897 prange = container_of(node, struct svm_range, it_node); 898 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 899 prange, prange->start, prange->npages, 900 prange->start + prange->npages - 1, 901 prange->actual_loc); 902 node = interval_tree_iter_next(node, 0, ~0ULL); 903 } 904 } 905 906 static void * 907 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 908 uint64_t offset, uint64_t *vram_pages) 909 { 910 unsigned char *src = (unsigned char *)psrc + offset; 911 unsigned char *dst; 912 uint64_t i; 913 914 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 915 if (!dst) 916 return NULL; 917 918 if (!vram_pages) { 919 memcpy(dst, src, num_elements * size); 920 return (void *)dst; 921 } 922 923 *vram_pages = 0; 924 for (i = 0; i < num_elements; i++) { 925 dma_addr_t *temp; 926 temp = (dma_addr_t *)dst + i; 927 *temp = *((dma_addr_t *)src + i); 928 if (*temp&SVM_RANGE_VRAM_DOMAIN) 929 (*vram_pages)++; 930 } 931 932 return (void *)dst; 933 } 934 935 static int 936 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 937 { 938 int i; 939 940 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 941 if (!src->dma_addr[i]) 942 continue; 943 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 944 sizeof(*src->dma_addr[i]), src->npages, 0, NULL); 945 if (!dst->dma_addr[i]) 946 return -ENOMEM; 947 } 948 949 return 0; 950 } 951 952 static int 953 svm_range_split_array(void *ppnew, void *ppold, size_t size, 954 uint64_t old_start, uint64_t old_n, 955 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages) 956 { 957 unsigned char *new, *old, *pold; 958 uint64_t d; 959 960 if (!ppold) 961 return 0; 962 pold = *(unsigned char **)ppold; 963 if (!pold) 964 return 0; 965 966 d = (new_start - old_start) * size; 967 /* get dma addr array for new range and calculte its vram page number */ 968 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages); 969 if (!new) 970 return -ENOMEM; 971 d = (new_start == old_start) ? new_n * size : 0; 972 old = svm_range_copy_array(pold, size, old_n, d, NULL); 973 if (!old) { 974 kvfree(new); 975 return -ENOMEM; 976 } 977 kvfree(pold); 978 *(void **)ppold = old; 979 *(void **)ppnew = new; 980 981 return 0; 982 } 983 984 static int 985 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 986 uint64_t start, uint64_t last) 987 { 988 uint64_t npages = last - start + 1; 989 int i, r; 990 991 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 992 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 993 sizeof(*old->dma_addr[i]), old->start, 994 npages, new->start, new->npages, 995 old->actual_loc ? &new->vram_pages : NULL); 996 if (r) 997 return r; 998 } 999 if (old->actual_loc) 1000 old->vram_pages -= new->vram_pages; 1001 1002 return 0; 1003 } 1004 1005 static int 1006 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 1007 uint64_t start, uint64_t last) 1008 { 1009 uint64_t npages = last - start + 1; 1010 1011 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 1012 new->svms, new, new->start, start, last); 1013 1014 if (new->start == old->start) { 1015 new->offset = old->offset; 1016 old->offset += new->npages; 1017 } else { 1018 new->offset = old->offset + npages; 1019 } 1020 1021 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1022 new->ttm_res = old->ttm_res; 1023 1024 spin_lock(&new->svm_bo->list_lock); 1025 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1026 spin_unlock(&new->svm_bo->list_lock); 1027 1028 return 0; 1029 } 1030 1031 /** 1032 * svm_range_split_adjust - split range and adjust 1033 * 1034 * @new: new range 1035 * @old: the old range 1036 * @start: the old range adjust to start address in pages 1037 * @last: the old range adjust to last address in pages 1038 * 1039 * Copy system memory dma_addr or vram ttm_res in old range to new 1040 * range from new_start up to size new->npages, the remaining old range is from 1041 * start to last 1042 * 1043 * Return: 1044 * 0 - OK, -ENOMEM - out of memory 1045 */ 1046 static int 1047 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1048 uint64_t start, uint64_t last) 1049 { 1050 int r; 1051 1052 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1053 new->svms, new->start, old->start, old->last, start, last); 1054 1055 if (new->start < old->start || 1056 new->last > old->last) { 1057 WARN_ONCE(1, "invalid new range start or last\n"); 1058 return -EINVAL; 1059 } 1060 1061 r = svm_range_split_pages(new, old, start, last); 1062 if (r) 1063 return r; 1064 1065 if (old->actual_loc && old->ttm_res) { 1066 r = svm_range_split_nodes(new, old, start, last); 1067 if (r) 1068 return r; 1069 } 1070 1071 old->npages = last - start + 1; 1072 old->start = start; 1073 old->last = last; 1074 new->flags = old->flags; 1075 new->preferred_loc = old->preferred_loc; 1076 new->prefetch_loc = old->prefetch_loc; 1077 new->actual_loc = old->actual_loc; 1078 new->granularity = old->granularity; 1079 new->mapped_to_gpu = old->mapped_to_gpu; 1080 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1081 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1082 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1083 1084 return 0; 1085 } 1086 1087 /** 1088 * svm_range_split - split a range in 2 ranges 1089 * 1090 * @prange: the svm range to split 1091 * @start: the remaining range start address in pages 1092 * @last: the remaining range last address in pages 1093 * @new: the result new range generated 1094 * 1095 * Two cases only: 1096 * case 1: if start == prange->start 1097 * prange ==> prange[start, last] 1098 * new range [last + 1, prange->last] 1099 * 1100 * case 2: if last == prange->last 1101 * prange ==> prange[start, last] 1102 * new range [prange->start, start - 1] 1103 * 1104 * Return: 1105 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1106 */ 1107 static int 1108 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1109 struct svm_range **new) 1110 { 1111 uint64_t old_start = prange->start; 1112 uint64_t old_last = prange->last; 1113 struct svm_range_list *svms; 1114 int r = 0; 1115 1116 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1117 old_start, old_last, start, last); 1118 1119 if (old_start != start && old_last != last) 1120 return -EINVAL; 1121 if (start < old_start || last > old_last) 1122 return -EINVAL; 1123 1124 svms = prange->svms; 1125 if (old_start == start) 1126 *new = svm_range_new(svms, last + 1, old_last, false); 1127 else 1128 *new = svm_range_new(svms, old_start, start - 1, false); 1129 if (!*new) 1130 return -ENOMEM; 1131 1132 r = svm_range_split_adjust(*new, prange, start, last); 1133 if (r) { 1134 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1135 r, old_start, old_last, start, last); 1136 svm_range_free(*new, false); 1137 *new = NULL; 1138 } 1139 1140 return r; 1141 } 1142 1143 static int 1144 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1145 struct list_head *insert_list, struct list_head *remap_list) 1146 { 1147 struct svm_range *tail = NULL; 1148 int r = svm_range_split(prange, prange->start, new_last, &tail); 1149 1150 if (!r) { 1151 list_add(&tail->list, insert_list); 1152 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity)) 1153 list_add(&tail->update_list, remap_list); 1154 } 1155 return r; 1156 } 1157 1158 static int 1159 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1160 struct list_head *insert_list, struct list_head *remap_list) 1161 { 1162 struct svm_range *head = NULL; 1163 int r = svm_range_split(prange, new_start, prange->last, &head); 1164 1165 if (!r) { 1166 list_add(&head->list, insert_list); 1167 if (!IS_ALIGNED(new_start, 1UL << prange->granularity)) 1168 list_add(&head->update_list, remap_list); 1169 } 1170 return r; 1171 } 1172 1173 static void 1174 svm_range_add_child(struct svm_range *prange, struct svm_range *pchild, enum svm_work_list_ops op) 1175 { 1176 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1177 pchild, pchild->start, pchild->last, prange, op); 1178 1179 pchild->work_item.mm = NULL; 1180 pchild->work_item.op = op; 1181 list_add_tail(&pchild->child_list, &prange->child_list); 1182 } 1183 1184 static bool 1185 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1186 { 1187 return (node_a->adev == node_b->adev || 1188 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1189 } 1190 1191 static uint64_t 1192 svm_range_get_pte_flags(struct kfd_node *node, struct amdgpu_vm *vm, 1193 struct svm_range *prange, int domain) 1194 { 1195 struct kfd_node *bo_node; 1196 uint32_t flags = prange->flags; 1197 uint32_t mapping_flags = 0; 1198 uint32_t gc_ip_version = KFD_GC_VERSION(node); 1199 uint64_t pte_flags; 1200 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1201 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1202 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1203 unsigned int mtype_local; 1204 1205 if (domain == SVM_RANGE_VRAM_DOMAIN) 1206 bo_node = prange->svm_bo->node; 1207 1208 switch (gc_ip_version) { 1209 case IP_VERSION(9, 4, 1): 1210 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1211 if (bo_node == node) { 1212 mapping_flags |= coherent ? 1213 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1214 } else { 1215 mapping_flags |= coherent ? 1216 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1217 if (svm_nodes_in_same_hive(node, bo_node)) 1218 snoop = true; 1219 } 1220 } else { 1221 mapping_flags |= coherent ? 1222 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1223 } 1224 break; 1225 case IP_VERSION(9, 4, 2): 1226 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1227 if (bo_node == node) { 1228 mapping_flags |= coherent ? 1229 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1230 if (node->adev->gmc.xgmi.connected_to_cpu) 1231 snoop = true; 1232 } else { 1233 mapping_flags |= coherent ? 1234 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1235 if (svm_nodes_in_same_hive(node, bo_node)) 1236 snoop = true; 1237 } 1238 } else { 1239 mapping_flags |= coherent ? 1240 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1241 } 1242 break; 1243 case IP_VERSION(9, 4, 3): 1244 case IP_VERSION(9, 4, 4): 1245 case IP_VERSION(9, 5, 0): 1246 if (ext_coherent) 1247 mtype_local = AMDGPU_VM_MTYPE_CC; 1248 else 1249 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1250 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1251 snoop = true; 1252 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1253 /* local HBM region close to partition */ 1254 if (bo_node->adev == node->adev && 1255 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1256 mapping_flags |= mtype_local; 1257 /* local HBM region far from partition or remote XGMI GPU 1258 * with regular system scope coherence 1259 */ 1260 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1261 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1262 /* PCIe P2P on GPUs pre-9.5.0 */ 1263 else if (gc_ip_version < IP_VERSION(9, 5, 0) && 1264 !svm_nodes_in_same_hive(bo_node, node)) 1265 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1266 /* Other remote memory */ 1267 else 1268 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1269 /* system memory accessed by the APU */ 1270 } else if (node->adev->flags & AMD_IS_APU) { 1271 /* On NUMA systems, locality is determined per-page 1272 * in amdgpu_gmc_override_vm_pte_flags 1273 */ 1274 if (num_possible_nodes() <= 1) 1275 mapping_flags |= mtype_local; 1276 else 1277 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1278 /* system memory accessed by the dGPU */ 1279 } else { 1280 if (gc_ip_version < IP_VERSION(9, 5, 0) || ext_coherent) 1281 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1282 else 1283 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1284 } 1285 break; 1286 case IP_VERSION(12, 0, 0): 1287 case IP_VERSION(12, 0, 1): 1288 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1289 break; 1290 default: 1291 mapping_flags |= coherent ? 1292 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1293 } 1294 1295 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1296 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1297 1298 pte_flags = AMDGPU_PTE_VALID; 1299 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1300 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1301 if (gc_ip_version >= IP_VERSION(12, 0, 0)) 1302 pte_flags |= AMDGPU_PTE_IS_PTE; 1303 1304 amdgpu_gmc_get_vm_pte(node->adev, vm, NULL, mapping_flags, &pte_flags); 1305 pte_flags |= AMDGPU_PTE_READABLE; 1306 if (!(flags & KFD_IOCTL_SVM_FLAG_GPU_RO)) 1307 pte_flags |= AMDGPU_PTE_WRITEABLE; 1308 return pte_flags; 1309 } 1310 1311 static int 1312 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1313 uint64_t start, uint64_t last, 1314 struct dma_fence **fence) 1315 { 1316 uint64_t init_pte_value = 0; 1317 1318 pr_debug("[0x%llx 0x%llx]\n", start, last); 1319 1320 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1321 last, init_pte_value, 0, 0, NULL, NULL, 1322 fence); 1323 } 1324 1325 static int 1326 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1327 unsigned long last, uint32_t trigger) 1328 { 1329 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1330 struct kfd_process_device *pdd; 1331 struct dma_fence *fence = NULL; 1332 struct kfd_process *p; 1333 uint32_t gpuidx; 1334 int r = 0; 1335 1336 if (!prange->mapped_to_gpu) { 1337 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1338 prange, prange->start, prange->last); 1339 return 0; 1340 } 1341 1342 if (prange->start == start && prange->last == last) { 1343 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1344 prange->mapped_to_gpu = false; 1345 } 1346 1347 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1348 MAX_GPU_INSTANCE); 1349 p = container_of(prange->svms, struct kfd_process, svms); 1350 1351 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1352 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1353 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1354 if (!pdd) { 1355 pr_debug("failed to find device idx %d\n", gpuidx); 1356 return -EINVAL; 1357 } 1358 1359 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1360 start, last, trigger); 1361 1362 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1363 drm_priv_to_vm(pdd->drm_priv), 1364 start, last, &fence); 1365 if (r) 1366 break; 1367 1368 if (fence) { 1369 r = dma_fence_wait(fence, false); 1370 dma_fence_put(fence); 1371 fence = NULL; 1372 if (r) 1373 break; 1374 } 1375 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1376 } 1377 1378 return r; 1379 } 1380 1381 static int 1382 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1383 unsigned long offset, unsigned long npages, bool readonly, 1384 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1385 struct dma_fence **fence, bool flush_tlb) 1386 { 1387 struct amdgpu_device *adev = pdd->dev->adev; 1388 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1389 uint64_t pte_flags; 1390 unsigned long last_start; 1391 int last_domain; 1392 int r = 0; 1393 int64_t i, j; 1394 1395 last_start = prange->start + offset; 1396 1397 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1398 last_start, last_start + npages - 1, readonly); 1399 1400 for (i = offset; i < offset + npages; i++) { 1401 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1402 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1403 1404 /* Collect all pages in the same address range and memory domain 1405 * that can be mapped with a single call to update mapping. 1406 */ 1407 if (i < offset + npages - 1 && 1408 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1409 continue; 1410 1411 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1412 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1413 1414 pte_flags = svm_range_get_pte_flags(pdd->dev, vm, prange, last_domain); 1415 if (readonly) 1416 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1417 1418 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1419 prange->svms, last_start, prange->start + i, 1420 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1421 pte_flags); 1422 1423 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1424 * different memory partition based on fpfn/lpfn, we should use 1425 * same vm_manager.vram_base_offset regardless memory partition. 1426 */ 1427 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1428 NULL, last_start, prange->start + i, 1429 pte_flags, 1430 (last_start - prange->start) << PAGE_SHIFT, 1431 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1432 NULL, dma_addr, &vm->last_update); 1433 1434 for (j = last_start - prange->start; j <= i; j++) 1435 dma_addr[j] |= last_domain; 1436 1437 if (r) { 1438 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1439 goto out; 1440 } 1441 last_start = prange->start + i + 1; 1442 } 1443 1444 r = amdgpu_vm_update_pdes(adev, vm, false); 1445 if (r) { 1446 pr_debug("failed %d to update directories 0x%lx\n", r, 1447 prange->start); 1448 goto out; 1449 } 1450 1451 if (fence) 1452 *fence = dma_fence_get(vm->last_update); 1453 1454 out: 1455 return r; 1456 } 1457 1458 static int 1459 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1460 unsigned long npages, bool readonly, 1461 unsigned long *bitmap, bool wait, bool flush_tlb) 1462 { 1463 struct kfd_process_device *pdd; 1464 struct amdgpu_device *bo_adev = NULL; 1465 struct kfd_process *p; 1466 struct dma_fence *fence = NULL; 1467 uint32_t gpuidx; 1468 int r = 0; 1469 1470 if (prange->svm_bo && prange->ttm_res) 1471 bo_adev = prange->svm_bo->node->adev; 1472 1473 p = container_of(prange->svms, struct kfd_process, svms); 1474 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1475 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1476 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1477 if (!pdd) { 1478 pr_debug("failed to find device idx %d\n", gpuidx); 1479 return -EINVAL; 1480 } 1481 1482 pdd = kfd_bind_process_to_device(pdd->dev, p); 1483 if (IS_ERR(pdd)) 1484 return -EINVAL; 1485 1486 if (bo_adev && pdd->dev->adev != bo_adev && 1487 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1488 pr_debug("cannot map to device idx %d\n", gpuidx); 1489 continue; 1490 } 1491 1492 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1493 prange->dma_addr[gpuidx], 1494 bo_adev, wait ? &fence : NULL, 1495 flush_tlb); 1496 if (r) 1497 break; 1498 1499 if (fence) { 1500 r = dma_fence_wait(fence, false); 1501 dma_fence_put(fence); 1502 fence = NULL; 1503 if (r) { 1504 pr_debug("failed %d to dma fence wait\n", r); 1505 break; 1506 } 1507 } 1508 1509 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1510 } 1511 1512 return r; 1513 } 1514 1515 struct svm_validate_context { 1516 struct kfd_process *process; 1517 struct svm_range *prange; 1518 bool intr; 1519 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1520 struct drm_exec exec; 1521 }; 1522 1523 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1524 { 1525 struct kfd_process_device *pdd; 1526 struct amdgpu_vm *vm; 1527 uint32_t gpuidx; 1528 int r; 1529 1530 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1531 drm_exec_until_all_locked(&ctx->exec) { 1532 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1533 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1534 if (!pdd) { 1535 pr_debug("failed to find device idx %d\n", gpuidx); 1536 r = -EINVAL; 1537 goto unreserve_out; 1538 } 1539 vm = drm_priv_to_vm(pdd->drm_priv); 1540 1541 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1542 drm_exec_retry_on_contention(&ctx->exec); 1543 if (unlikely(r)) { 1544 pr_debug("failed %d to reserve bo\n", r); 1545 goto unreserve_out; 1546 } 1547 } 1548 } 1549 1550 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1551 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1552 if (!pdd) { 1553 pr_debug("failed to find device idx %d\n", gpuidx); 1554 r = -EINVAL; 1555 goto unreserve_out; 1556 } 1557 1558 r = amdgpu_vm_validate(pdd->dev->adev, 1559 drm_priv_to_vm(pdd->drm_priv), NULL, 1560 svm_range_bo_validate, NULL); 1561 if (r) { 1562 pr_debug("failed %d validate pt bos\n", r); 1563 goto unreserve_out; 1564 } 1565 } 1566 1567 return 0; 1568 1569 unreserve_out: 1570 drm_exec_fini(&ctx->exec); 1571 return r; 1572 } 1573 1574 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1575 { 1576 drm_exec_fini(&ctx->exec); 1577 } 1578 1579 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1580 { 1581 struct kfd_process_device *pdd; 1582 1583 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1584 if (!pdd) 1585 return NULL; 1586 1587 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1588 } 1589 1590 /* 1591 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1592 * 1593 * To prevent concurrent destruction or change of range attributes, the 1594 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1595 * because that would block concurrent evictions and lead to deadlocks. To 1596 * serialize concurrent migrations or validations of the same range, the 1597 * prange->migrate_mutex must be held. 1598 * 1599 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1600 * eviction fence. 1601 * 1602 * The following sequence ensures race-free validation and GPU mapping: 1603 * 1604 * 1. Reserve page table (and SVM BO if range is in VRAM) 1605 * 2. hmm_range_fault to get page addresses (if system memory) 1606 * 3. DMA-map pages (if system memory) 1607 * 4-a. Take notifier lock 1608 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1609 * 4-c. Check that the range was not split or otherwise invalidated 1610 * 4-d. Update GPU page table 1611 * 4.e. Release notifier lock 1612 * 5. Release page table (and SVM BO) reservation 1613 */ 1614 static int svm_range_validate_and_map(struct mm_struct *mm, 1615 unsigned long map_start, unsigned long map_last, 1616 struct svm_range *prange, int32_t gpuidx, 1617 bool intr, bool wait, bool flush_tlb) 1618 { 1619 struct svm_validate_context *ctx; 1620 unsigned long start, end, addr; 1621 struct kfd_process *p; 1622 void *owner; 1623 int32_t idx; 1624 int r = 0; 1625 1626 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1627 if (!ctx) 1628 return -ENOMEM; 1629 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1630 ctx->prange = prange; 1631 ctx->intr = intr; 1632 1633 if (gpuidx < MAX_GPU_INSTANCE) { 1634 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1635 bitmap_set(ctx->bitmap, gpuidx, 1); 1636 } else if (ctx->process->xnack_enabled) { 1637 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1638 1639 /* If prefetch range to GPU, or GPU retry fault migrate range to 1640 * GPU, which has ACCESS attribute to the range, create mapping 1641 * on that GPU. 1642 */ 1643 if (prange->actual_loc) { 1644 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1645 prange->actual_loc); 1646 if (gpuidx < 0) { 1647 WARN_ONCE(1, "failed get device by id 0x%x\n", 1648 prange->actual_loc); 1649 r = -EINVAL; 1650 goto free_ctx; 1651 } 1652 if (test_bit(gpuidx, prange->bitmap_access)) 1653 bitmap_set(ctx->bitmap, gpuidx, 1); 1654 } 1655 1656 /* 1657 * If prange is already mapped or with always mapped flag, 1658 * update mapping on GPUs with ACCESS attribute 1659 */ 1660 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1661 if (prange->mapped_to_gpu || 1662 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED) 1663 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1664 } 1665 } else { 1666 bitmap_or(ctx->bitmap, prange->bitmap_access, 1667 prange->bitmap_aip, MAX_GPU_INSTANCE); 1668 } 1669 1670 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1671 r = 0; 1672 goto free_ctx; 1673 } 1674 1675 if (prange->actual_loc && !prange->ttm_res) { 1676 /* This should never happen. actual_loc gets set by 1677 * svm_migrate_ram_to_vram after allocating a BO. 1678 */ 1679 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1680 r = -EINVAL; 1681 goto free_ctx; 1682 } 1683 1684 r = svm_range_reserve_bos(ctx, intr); 1685 if (r) 1686 goto free_ctx; 1687 1688 p = container_of(prange->svms, struct kfd_process, svms); 1689 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1690 MAX_GPU_INSTANCE)); 1691 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1692 if (kfd_svm_page_owner(p, idx) != owner) { 1693 owner = NULL; 1694 break; 1695 } 1696 } 1697 1698 start = map_start << PAGE_SHIFT; 1699 end = (map_last + 1) << PAGE_SHIFT; 1700 for (addr = start; !r && addr < end; ) { 1701 struct amdgpu_hmm_range *range = NULL; 1702 unsigned long map_start_vma; 1703 unsigned long map_last_vma; 1704 struct vm_area_struct *vma; 1705 unsigned long next = 0; 1706 unsigned long offset; 1707 unsigned long npages; 1708 bool readonly; 1709 1710 vma = vma_lookup(mm, addr); 1711 if (vma) { 1712 readonly = !(vma->vm_flags & VM_WRITE); 1713 1714 next = min(vma->vm_end, end); 1715 npages = (next - addr) >> PAGE_SHIFT; 1716 /* HMM requires at least READ permissions. If provided with PROT_NONE, 1717 * unmap the memory. If it's not already mapped, this is a no-op 1718 * If PROT_WRITE is provided without READ, warn first then unmap 1719 */ 1720 if (!(vma->vm_flags & VM_READ)) { 1721 unsigned long e, s; 1722 1723 svm_range_lock(prange); 1724 if (vma->vm_flags & VM_WRITE) 1725 pr_debug("VM_WRITE without VM_READ is not supported"); 1726 s = max(start, prange->start); 1727 e = min(end, prange->last); 1728 if (e >= s) 1729 r = svm_range_unmap_from_gpus(prange, s, e, 1730 KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU); 1731 svm_range_unlock(prange); 1732 /* If unmap returns non-zero, we'll bail on the next for loop 1733 * iteration, so just leave r and continue 1734 */ 1735 addr = next; 1736 continue; 1737 } 1738 1739 WRITE_ONCE(p->svms.faulting_task, current); 1740 range = amdgpu_hmm_range_alloc(NULL); 1741 if (likely(range)) 1742 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1743 readonly, owner, range); 1744 else 1745 r = -ENOMEM; 1746 WRITE_ONCE(p->svms.faulting_task, NULL); 1747 if (r) 1748 pr_debug("failed %d to get svm range pages\n", r); 1749 } else { 1750 r = -EFAULT; 1751 } 1752 1753 if (!r) { 1754 offset = (addr >> PAGE_SHIFT) - prange->start; 1755 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1756 range->hmm_range.hmm_pfns); 1757 if (r) 1758 pr_debug("failed %d to dma map range\n", r); 1759 } 1760 1761 svm_range_lock(prange); 1762 1763 /* Free backing memory of hmm_range if it was initialized 1764 * Override return value to TRY AGAIN only if prior returns 1765 * were successful 1766 */ 1767 if (range && !amdgpu_hmm_range_valid(range) && !r) { 1768 pr_debug("hmm update the range, need validate again\n"); 1769 r = -EAGAIN; 1770 } 1771 1772 /* Free the hmm range */ 1773 amdgpu_hmm_range_free(range); 1774 1775 if (!r && !list_empty(&prange->child_list)) { 1776 pr_debug("range split by unmap in parallel, validate again\n"); 1777 r = -EAGAIN; 1778 } 1779 1780 if (!r) { 1781 map_start_vma = max(map_start, prange->start + offset); 1782 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1783 if (map_start_vma <= map_last_vma) { 1784 offset = map_start_vma - prange->start; 1785 npages = map_last_vma - map_start_vma + 1; 1786 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1787 ctx->bitmap, wait, flush_tlb); 1788 } 1789 } 1790 1791 if (!r && next == end) 1792 prange->mapped_to_gpu = true; 1793 1794 svm_range_unlock(prange); 1795 1796 addr = next; 1797 } 1798 1799 svm_range_unreserve_bos(ctx); 1800 if (!r) 1801 prange->validate_timestamp = ktime_get_boottime(); 1802 1803 free_ctx: 1804 kfree(ctx); 1805 1806 return r; 1807 } 1808 1809 /** 1810 * svm_range_list_lock_and_flush_work - flush pending deferred work 1811 * 1812 * @svms: the svm range list 1813 * @mm: the mm structure 1814 * 1815 * Context: Returns with mmap write lock held, pending deferred work flushed 1816 * 1817 */ 1818 void 1819 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1820 struct mm_struct *mm) 1821 { 1822 retry_flush_work: 1823 flush_work(&svms->deferred_list_work); 1824 mmap_write_lock(mm); 1825 1826 if (list_empty(&svms->deferred_range_list)) 1827 return; 1828 mmap_write_unlock(mm); 1829 pr_debug("retry flush\n"); 1830 goto retry_flush_work; 1831 } 1832 1833 static void svm_range_restore_work(struct work_struct *work) 1834 { 1835 struct delayed_work *dwork = to_delayed_work(work); 1836 struct amdkfd_process_info *process_info; 1837 struct svm_range_list *svms; 1838 struct svm_range *prange; 1839 struct kfd_process *p; 1840 struct mm_struct *mm; 1841 int evicted_ranges; 1842 int invalid; 1843 int r; 1844 1845 svms = container_of(dwork, struct svm_range_list, restore_work); 1846 evicted_ranges = atomic_read(&svms->evicted_ranges); 1847 if (!evicted_ranges) 1848 return; 1849 1850 pr_debug("restore svm ranges\n"); 1851 1852 p = container_of(svms, struct kfd_process, svms); 1853 process_info = p->kgd_process_info; 1854 1855 /* Keep mm reference when svm_range_validate_and_map ranges */ 1856 mm = get_task_mm(p->lead_thread); 1857 if (!mm) { 1858 pr_debug("svms 0x%p process mm gone\n", svms); 1859 return; 1860 } 1861 1862 mutex_lock(&process_info->lock); 1863 svm_range_list_lock_and_flush_work(svms, mm); 1864 mutex_lock(&svms->lock); 1865 1866 evicted_ranges = atomic_read(&svms->evicted_ranges); 1867 1868 list_for_each_entry(prange, &svms->list, list) { 1869 invalid = atomic_read(&prange->invalid); 1870 if (!invalid) 1871 continue; 1872 1873 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1874 prange->svms, prange, prange->start, prange->last, 1875 invalid); 1876 1877 /* 1878 * If range is migrating, wait for migration is done. 1879 */ 1880 mutex_lock(&prange->migrate_mutex); 1881 1882 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1883 MAX_GPU_INSTANCE, false, true, false); 1884 if (r) 1885 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1886 prange->start); 1887 1888 mutex_unlock(&prange->migrate_mutex); 1889 if (r) 1890 goto out_reschedule; 1891 1892 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1893 goto out_reschedule; 1894 } 1895 1896 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1897 evicted_ranges) 1898 goto out_reschedule; 1899 1900 evicted_ranges = 0; 1901 1902 r = kgd2kfd_resume_mm(mm); 1903 if (r) { 1904 /* No recovery from this failure. Probably the CP is 1905 * hanging. No point trying again. 1906 */ 1907 pr_debug("failed %d to resume KFD\n", r); 1908 } 1909 1910 pr_debug("restore svm ranges successfully\n"); 1911 1912 out_reschedule: 1913 mutex_unlock(&svms->lock); 1914 mmap_write_unlock(mm); 1915 mutex_unlock(&process_info->lock); 1916 1917 /* If validation failed, reschedule another attempt */ 1918 if (evicted_ranges) { 1919 pr_debug("reschedule to restore svm range\n"); 1920 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1921 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1922 1923 kfd_smi_event_queue_restore_rescheduled(mm); 1924 } 1925 mmput(mm); 1926 } 1927 1928 /** 1929 * svm_range_evict - evict svm range 1930 * @prange: svm range structure 1931 * @mm: current process mm_struct 1932 * @start: starting process queue number 1933 * @last: last process queue number 1934 * @event: mmu notifier event when range is evicted or migrated 1935 * 1936 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1937 * return to let CPU evict the buffer and proceed CPU pagetable update. 1938 * 1939 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1940 * If invalidation happens while restore work is running, restore work will 1941 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1942 * the queues. 1943 */ 1944 static int 1945 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1946 unsigned long start, unsigned long last, 1947 enum mmu_notifier_event event) 1948 { 1949 struct svm_range_list *svms = prange->svms; 1950 struct svm_range *pchild; 1951 struct kfd_process *p; 1952 int r = 0; 1953 1954 p = container_of(svms, struct kfd_process, svms); 1955 1956 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1957 svms, prange->start, prange->last, start, last); 1958 1959 if (!p->xnack_enabled || 1960 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1961 int evicted_ranges; 1962 bool mapped = prange->mapped_to_gpu; 1963 1964 list_for_each_entry(pchild, &prange->child_list, child_list) { 1965 if (!pchild->mapped_to_gpu) 1966 continue; 1967 mapped = true; 1968 mutex_lock_nested(&pchild->lock, 1); 1969 if (pchild->start <= last && pchild->last >= start) { 1970 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1971 pchild->start, pchild->last); 1972 atomic_inc(&pchild->invalid); 1973 } 1974 mutex_unlock(&pchild->lock); 1975 } 1976 1977 if (!mapped) 1978 return r; 1979 1980 if (prange->start <= last && prange->last >= start) 1981 atomic_inc(&prange->invalid); 1982 1983 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1984 if (evicted_ranges != 1) 1985 return r; 1986 1987 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1988 prange->svms, prange->start, prange->last); 1989 1990 /* First eviction, stop the queues */ 1991 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1992 if (r) 1993 pr_debug("failed to quiesce KFD\n"); 1994 1995 pr_debug("schedule to restore svm %p ranges\n", svms); 1996 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1997 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1998 } else { 1999 unsigned long s, l; 2000 uint32_t trigger; 2001 2002 if (event == MMU_NOTIFY_MIGRATE) 2003 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 2004 else 2005 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 2006 2007 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 2008 prange->svms, start, last); 2009 list_for_each_entry(pchild, &prange->child_list, child_list) { 2010 mutex_lock_nested(&pchild->lock, 1); 2011 s = max(start, pchild->start); 2012 l = min(last, pchild->last); 2013 if (l >= s) 2014 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2015 mutex_unlock(&pchild->lock); 2016 } 2017 s = max(start, prange->start); 2018 l = min(last, prange->last); 2019 if (l >= s) 2020 svm_range_unmap_from_gpus(prange, s, l, trigger); 2021 } 2022 2023 return r; 2024 } 2025 2026 static struct svm_range *svm_range_clone(struct svm_range *old) 2027 { 2028 struct svm_range *new; 2029 2030 new = svm_range_new(old->svms, old->start, old->last, false); 2031 if (!new) 2032 return NULL; 2033 if (svm_range_copy_dma_addrs(new, old)) { 2034 svm_range_free(new, false); 2035 return NULL; 2036 } 2037 if (old->svm_bo) { 2038 new->ttm_res = old->ttm_res; 2039 new->offset = old->offset; 2040 new->svm_bo = svm_range_bo_ref(old->svm_bo); 2041 spin_lock(&new->svm_bo->list_lock); 2042 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 2043 spin_unlock(&new->svm_bo->list_lock); 2044 } 2045 new->flags = old->flags; 2046 new->preferred_loc = old->preferred_loc; 2047 new->prefetch_loc = old->prefetch_loc; 2048 new->actual_loc = old->actual_loc; 2049 new->granularity = old->granularity; 2050 new->mapped_to_gpu = old->mapped_to_gpu; 2051 new->vram_pages = old->vram_pages; 2052 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 2053 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 2054 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 2055 2056 return new; 2057 } 2058 2059 void svm_range_set_max_pages(struct amdgpu_device *adev) 2060 { 2061 uint64_t max_pages; 2062 uint64_t pages, _pages; 2063 uint64_t min_pages = 0; 2064 int i, id; 2065 2066 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2067 if (adev->kfd.dev->nodes[i]->xcp) 2068 id = adev->kfd.dev->nodes[i]->xcp->id; 2069 else 2070 id = -1; 2071 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2072 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2073 pages = rounddown_pow_of_two(pages); 2074 min_pages = min_not_zero(min_pages, pages); 2075 } 2076 2077 do { 2078 max_pages = READ_ONCE(max_svm_range_pages); 2079 _pages = min_not_zero(max_pages, min_pages); 2080 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2081 } 2082 2083 static int 2084 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2085 uint64_t max_pages, struct list_head *insert_list, 2086 struct list_head *update_list) 2087 { 2088 struct svm_range *prange; 2089 uint64_t l; 2090 2091 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2092 max_pages, start, last); 2093 2094 while (last >= start) { 2095 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2096 2097 prange = svm_range_new(svms, start, l, true); 2098 if (!prange) 2099 return -ENOMEM; 2100 list_add(&prange->list, insert_list); 2101 list_add(&prange->update_list, update_list); 2102 2103 start = l + 1; 2104 } 2105 return 0; 2106 } 2107 2108 /** 2109 * svm_range_add - add svm range and handle overlap 2110 * @p: the range add to this process svms 2111 * @start: page size aligned 2112 * @size: page size aligned 2113 * @nattr: number of attributes 2114 * @attrs: array of attributes 2115 * @update_list: output, the ranges need validate and update GPU mapping 2116 * @insert_list: output, the ranges need insert to svms 2117 * @remove_list: output, the ranges are replaced and need remove from svms 2118 * @remap_list: output, remap unaligned svm ranges 2119 * 2120 * Check if the virtual address range has overlap with any existing ranges, 2121 * split partly overlapping ranges and add new ranges in the gaps. All changes 2122 * should be applied to the range_list and interval tree transactionally. If 2123 * any range split or allocation fails, the entire update fails. Therefore any 2124 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2125 * unchanged. 2126 * 2127 * If the transaction succeeds, the caller can update and insert clones and 2128 * new ranges, then free the originals. 2129 * 2130 * Otherwise the caller can free the clones and new ranges, while the old 2131 * svm_ranges remain unchanged. 2132 * 2133 * Context: Process context, caller must hold svms->lock 2134 * 2135 * Return: 2136 * 0 - OK, otherwise error code 2137 */ 2138 static int 2139 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2140 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2141 struct list_head *update_list, struct list_head *insert_list, 2142 struct list_head *remove_list, struct list_head *remap_list) 2143 { 2144 unsigned long last = start + size - 1UL; 2145 struct svm_range_list *svms = &p->svms; 2146 struct interval_tree_node *node; 2147 struct svm_range *prange; 2148 struct svm_range *tmp; 2149 struct list_head new_list; 2150 int r = 0; 2151 2152 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2153 2154 INIT_LIST_HEAD(update_list); 2155 INIT_LIST_HEAD(insert_list); 2156 INIT_LIST_HEAD(remove_list); 2157 INIT_LIST_HEAD(&new_list); 2158 INIT_LIST_HEAD(remap_list); 2159 2160 node = interval_tree_iter_first(&svms->objects, start, last); 2161 while (node) { 2162 struct interval_tree_node *next; 2163 unsigned long next_start; 2164 2165 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2166 node->last); 2167 2168 prange = container_of(node, struct svm_range, it_node); 2169 next = interval_tree_iter_next(node, start, last); 2170 next_start = min(node->last, last) + 1; 2171 2172 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2173 prange->mapped_to_gpu) { 2174 /* nothing to do */ 2175 } else if (node->start < start || node->last > last) { 2176 /* node intersects the update range and its attributes 2177 * will change. Clone and split it, apply updates only 2178 * to the overlapping part 2179 */ 2180 struct svm_range *old = prange; 2181 2182 prange = svm_range_clone(old); 2183 if (!prange) { 2184 r = -ENOMEM; 2185 goto out; 2186 } 2187 2188 list_add(&old->update_list, remove_list); 2189 list_add(&prange->list, insert_list); 2190 list_add(&prange->update_list, update_list); 2191 2192 if (node->start < start) { 2193 pr_debug("change old range start\n"); 2194 r = svm_range_split_head(prange, start, 2195 insert_list, remap_list); 2196 if (r) 2197 goto out; 2198 } 2199 if (node->last > last) { 2200 pr_debug("change old range last\n"); 2201 r = svm_range_split_tail(prange, last, 2202 insert_list, remap_list); 2203 if (r) 2204 goto out; 2205 } 2206 } else { 2207 /* The node is contained within start..last, 2208 * just update it 2209 */ 2210 list_add(&prange->update_list, update_list); 2211 } 2212 2213 /* insert a new node if needed */ 2214 if (node->start > start) { 2215 r = svm_range_split_new(svms, start, node->start - 1, 2216 READ_ONCE(max_svm_range_pages), 2217 &new_list, update_list); 2218 if (r) 2219 goto out; 2220 } 2221 2222 node = next; 2223 start = next_start; 2224 } 2225 2226 /* add a final range at the end if needed */ 2227 if (start <= last) 2228 r = svm_range_split_new(svms, start, last, 2229 READ_ONCE(max_svm_range_pages), 2230 &new_list, update_list); 2231 2232 out: 2233 if (r) { 2234 list_for_each_entry_safe(prange, tmp, insert_list, list) 2235 svm_range_free(prange, false); 2236 list_for_each_entry_safe(prange, tmp, &new_list, list) 2237 svm_range_free(prange, true); 2238 } else { 2239 list_splice(&new_list, insert_list); 2240 } 2241 2242 return r; 2243 } 2244 2245 static void 2246 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2247 struct svm_range *prange) 2248 { 2249 unsigned long start; 2250 unsigned long last; 2251 2252 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2253 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2254 2255 if (prange->start == start && prange->last == last) 2256 return; 2257 2258 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2259 prange->svms, prange, start, last, prange->start, 2260 prange->last); 2261 2262 if (start != 0 && last != 0) { 2263 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2264 svm_range_remove_notifier(prange); 2265 } 2266 prange->it_node.start = prange->start; 2267 prange->it_node.last = prange->last; 2268 2269 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2270 svm_range_add_notifier_locked(mm, prange); 2271 } 2272 2273 static void 2274 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2275 struct mm_struct *mm) 2276 { 2277 switch (prange->work_item.op) { 2278 case SVM_OP_NULL: 2279 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2280 svms, prange, prange->start, prange->last); 2281 break; 2282 case SVM_OP_UNMAP_RANGE: 2283 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2284 svms, prange, prange->start, prange->last); 2285 svm_range_unlink(prange); 2286 svm_range_remove_notifier(prange); 2287 svm_range_free(prange, true); 2288 break; 2289 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2290 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2291 svms, prange, prange->start, prange->last); 2292 svm_range_update_notifier_and_interval_tree(mm, prange); 2293 break; 2294 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2295 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2296 svms, prange, prange->start, prange->last); 2297 svm_range_update_notifier_and_interval_tree(mm, prange); 2298 /* TODO: implement deferred validation and mapping */ 2299 break; 2300 case SVM_OP_ADD_RANGE: 2301 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2302 prange->start, prange->last); 2303 svm_range_add_to_svms(prange); 2304 svm_range_add_notifier_locked(mm, prange); 2305 break; 2306 case SVM_OP_ADD_RANGE_AND_MAP: 2307 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2308 prange, prange->start, prange->last); 2309 svm_range_add_to_svms(prange); 2310 svm_range_add_notifier_locked(mm, prange); 2311 /* TODO: implement deferred validation and mapping */ 2312 break; 2313 default: 2314 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2315 prange->work_item.op); 2316 } 2317 } 2318 2319 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2320 { 2321 struct kfd_process_device *pdd; 2322 struct kfd_process *p; 2323 uint32_t i; 2324 2325 p = container_of(svms, struct kfd_process, svms); 2326 2327 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2328 pdd = p->pdds[i]; 2329 if (!pdd) 2330 continue; 2331 2332 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2333 2334 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2335 pdd->dev->adev->irq.retry_cam_enabled ? 2336 &pdd->dev->adev->irq.ih : 2337 &pdd->dev->adev->irq.ih1); 2338 2339 if (pdd->dev->adev->irq.retry_cam_enabled) 2340 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2341 &pdd->dev->adev->irq.ih_soft); 2342 2343 2344 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2345 } 2346 } 2347 2348 static void svm_range_deferred_list_work(struct work_struct *work) 2349 { 2350 struct svm_range_list *svms; 2351 struct svm_range *prange; 2352 struct mm_struct *mm; 2353 2354 svms = container_of(work, struct svm_range_list, deferred_list_work); 2355 pr_debug("enter svms 0x%p\n", svms); 2356 2357 spin_lock(&svms->deferred_list_lock); 2358 while (!list_empty(&svms->deferred_range_list)) { 2359 prange = list_first_entry(&svms->deferred_range_list, 2360 struct svm_range, deferred_list); 2361 spin_unlock(&svms->deferred_list_lock); 2362 2363 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2364 prange->start, prange->last, prange->work_item.op); 2365 2366 mm = prange->work_item.mm; 2367 2368 mmap_write_lock(mm); 2369 2370 /* Remove from deferred_list must be inside mmap write lock, for 2371 * two race cases: 2372 * 1. unmap_from_cpu may change work_item.op and add the range 2373 * to deferred_list again, cause use after free bug. 2374 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2375 * lock and continue because deferred_list is empty, but 2376 * deferred_list work is actually waiting for mmap lock. 2377 */ 2378 spin_lock(&svms->deferred_list_lock); 2379 list_del_init(&prange->deferred_list); 2380 spin_unlock(&svms->deferred_list_lock); 2381 2382 mutex_lock(&svms->lock); 2383 mutex_lock(&prange->migrate_mutex); 2384 while (!list_empty(&prange->child_list)) { 2385 struct svm_range *pchild; 2386 2387 pchild = list_first_entry(&prange->child_list, 2388 struct svm_range, child_list); 2389 pr_debug("child prange 0x%p op %d\n", pchild, 2390 pchild->work_item.op); 2391 list_del_init(&pchild->child_list); 2392 svm_range_handle_list_op(svms, pchild, mm); 2393 } 2394 mutex_unlock(&prange->migrate_mutex); 2395 2396 svm_range_handle_list_op(svms, prange, mm); 2397 mutex_unlock(&svms->lock); 2398 mmap_write_unlock(mm); 2399 2400 /* Pairs with mmget in svm_range_add_list_work. If dropping the 2401 * last mm refcount, schedule release work to avoid circular locking 2402 */ 2403 mmput_async(mm); 2404 2405 spin_lock(&svms->deferred_list_lock); 2406 } 2407 spin_unlock(&svms->deferred_list_lock); 2408 pr_debug("exit svms 0x%p\n", svms); 2409 } 2410 2411 void 2412 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2413 struct mm_struct *mm, enum svm_work_list_ops op) 2414 { 2415 spin_lock(&svms->deferred_list_lock); 2416 /* if prange is on the deferred list */ 2417 if (!list_empty(&prange->deferred_list)) { 2418 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2419 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2420 if (op != SVM_OP_NULL && 2421 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2422 prange->work_item.op = op; 2423 } else { 2424 /* Pairs with mmput in deferred_list_work. 2425 * If process is exiting and mm is gone, don't update mmu notifier. 2426 */ 2427 if (mmget_not_zero(mm)) { 2428 prange->work_item.mm = mm; 2429 prange->work_item.op = op; 2430 list_add_tail(&prange->deferred_list, 2431 &prange->svms->deferred_range_list); 2432 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2433 prange, prange->start, prange->last, op); 2434 } 2435 } 2436 spin_unlock(&svms->deferred_list_lock); 2437 } 2438 2439 void schedule_deferred_list_work(struct svm_range_list *svms) 2440 { 2441 spin_lock(&svms->deferred_list_lock); 2442 if (!list_empty(&svms->deferred_range_list)) 2443 schedule_work(&svms->deferred_list_work); 2444 spin_unlock(&svms->deferred_list_lock); 2445 } 2446 2447 static void 2448 svm_range_unmap_split(struct svm_range *parent, struct svm_range *prange, unsigned long start, 2449 unsigned long last) 2450 { 2451 struct svm_range *head; 2452 struct svm_range *tail; 2453 2454 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2455 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2456 prange->start, prange->last); 2457 return; 2458 } 2459 if (start > prange->last || last < prange->start) 2460 return; 2461 2462 head = tail = prange; 2463 if (start > prange->start) 2464 svm_range_split(prange, prange->start, start - 1, &tail); 2465 if (last < tail->last) 2466 svm_range_split(tail, last + 1, tail->last, &head); 2467 2468 if (head != prange && tail != prange) { 2469 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2470 svm_range_add_child(parent, tail, SVM_OP_ADD_RANGE); 2471 } else if (tail != prange) { 2472 svm_range_add_child(parent, tail, SVM_OP_UNMAP_RANGE); 2473 } else if (head != prange) { 2474 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2475 } else if (parent != prange) { 2476 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2477 } 2478 } 2479 2480 static void 2481 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2482 unsigned long start, unsigned long last) 2483 { 2484 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2485 struct svm_range_list *svms; 2486 struct svm_range *pchild; 2487 struct kfd_process *p; 2488 unsigned long s, l; 2489 bool unmap_parent; 2490 uint32_t i; 2491 2492 if (atomic_read(&prange->queue_refcount)) { 2493 int r; 2494 2495 pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n", 2496 prange->start << PAGE_SHIFT); 2497 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2498 if (r) 2499 pr_debug("failed %d to quiesce KFD queues\n", r); 2500 } 2501 2502 p = kfd_lookup_process_by_mm(mm); 2503 if (!p) 2504 return; 2505 svms = &p->svms; 2506 2507 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2508 prange, prange->start, prange->last, start, last); 2509 2510 /* calculate time stamps that are used to decide which page faults need be 2511 * dropped or handled before unmap pages from gpu vm 2512 */ 2513 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2514 struct kfd_process_device *pdd; 2515 struct amdgpu_device *adev; 2516 struct amdgpu_ih_ring *ih; 2517 uint32_t checkpoint_wptr; 2518 2519 pdd = p->pdds[i]; 2520 if (!pdd) 2521 continue; 2522 2523 adev = pdd->dev->adev; 2524 2525 /* Check and drain ih1 ring if cam not available */ 2526 if (adev->irq.ih1.ring_size) { 2527 ih = &adev->irq.ih1; 2528 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2529 if (ih->rptr != checkpoint_wptr) { 2530 svms->checkpoint_ts[i] = 2531 amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2532 continue; 2533 } 2534 } 2535 2536 /* check if dev->irq.ih_soft is not empty */ 2537 ih = &adev->irq.ih_soft; 2538 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2539 if (ih->rptr != checkpoint_wptr) 2540 svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2541 } 2542 2543 unmap_parent = start <= prange->start && last >= prange->last; 2544 2545 list_for_each_entry(pchild, &prange->child_list, child_list) { 2546 mutex_lock_nested(&pchild->lock, 1); 2547 s = max(start, pchild->start); 2548 l = min(last, pchild->last); 2549 if (l >= s) 2550 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2551 svm_range_unmap_split(prange, pchild, start, last); 2552 mutex_unlock(&pchild->lock); 2553 } 2554 s = max(start, prange->start); 2555 l = min(last, prange->last); 2556 if (l >= s) 2557 svm_range_unmap_from_gpus(prange, s, l, trigger); 2558 svm_range_unmap_split(prange, prange, start, last); 2559 2560 if (unmap_parent) 2561 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2562 else 2563 svm_range_add_list_work(svms, prange, mm, 2564 SVM_OP_UPDATE_RANGE_NOTIFIER); 2565 schedule_deferred_list_work(svms); 2566 2567 kfd_unref_process(p); 2568 } 2569 2570 /** 2571 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2572 * @mni: mmu_interval_notifier struct 2573 * @range: mmu_notifier_range struct 2574 * @cur_seq: value to pass to mmu_interval_set_seq() 2575 * 2576 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2577 * is from migration, or CPU page invalidation callback. 2578 * 2579 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2580 * work thread, and split prange if only part of prange is unmapped. 2581 * 2582 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2583 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2584 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2585 * update GPU mapping to recover. 2586 * 2587 * Context: mmap lock, notifier_invalidate_start lock are held 2588 * for invalidate event, prange lock is held if this is from migration 2589 */ 2590 static bool 2591 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2592 const struct mmu_notifier_range *range, 2593 unsigned long cur_seq) 2594 { 2595 struct svm_range *prange; 2596 unsigned long start; 2597 unsigned long last; 2598 2599 if (range->event == MMU_NOTIFY_RELEASE) 2600 return true; 2601 2602 start = mni->interval_tree.start; 2603 last = mni->interval_tree.last; 2604 start = max(start, range->start) >> PAGE_SHIFT; 2605 last = min(last, range->end - 1) >> PAGE_SHIFT; 2606 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2607 start, last, range->start >> PAGE_SHIFT, 2608 (range->end - 1) >> PAGE_SHIFT, 2609 mni->interval_tree.start >> PAGE_SHIFT, 2610 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2611 2612 prange = container_of(mni, struct svm_range, notifier); 2613 2614 svm_range_lock(prange); 2615 mmu_interval_set_seq(mni, cur_seq); 2616 2617 switch (range->event) { 2618 case MMU_NOTIFY_UNMAP: 2619 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2620 break; 2621 default: 2622 svm_range_evict(prange, mni->mm, start, last, range->event); 2623 break; 2624 } 2625 2626 svm_range_unlock(prange); 2627 2628 return true; 2629 } 2630 2631 /** 2632 * svm_range_from_addr - find svm range from fault address 2633 * @svms: svm range list header 2634 * @addr: address to search range interval tree, in pages 2635 * @parent: parent range if range is on child list 2636 * 2637 * Context: The caller must hold svms->lock 2638 * 2639 * Return: the svm_range found or NULL 2640 */ 2641 struct svm_range * 2642 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2643 struct svm_range **parent) 2644 { 2645 struct interval_tree_node *node; 2646 struct svm_range *prange; 2647 struct svm_range *pchild; 2648 2649 node = interval_tree_iter_first(&svms->objects, addr, addr); 2650 if (!node) 2651 return NULL; 2652 2653 prange = container_of(node, struct svm_range, it_node); 2654 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2655 addr, prange->start, prange->last, node->start, node->last); 2656 2657 if (addr >= prange->start && addr <= prange->last) { 2658 if (parent) 2659 *parent = prange; 2660 return prange; 2661 } 2662 list_for_each_entry(pchild, &prange->child_list, child_list) 2663 if (addr >= pchild->start && addr <= pchild->last) { 2664 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2665 addr, pchild->start, pchild->last); 2666 if (parent) 2667 *parent = prange; 2668 return pchild; 2669 } 2670 2671 return NULL; 2672 } 2673 2674 /* svm_range_best_restore_location - decide the best fault restore location 2675 * @prange: svm range structure 2676 * @adev: the GPU on which vm fault happened 2677 * 2678 * This is only called when xnack is on, to decide the best location to restore 2679 * the range mapping after GPU vm fault. Caller uses the best location to do 2680 * migration if actual loc is not best location, then update GPU page table 2681 * mapping to the best location. 2682 * 2683 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2684 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2685 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2686 * if range actual loc is cpu, best_loc is cpu 2687 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2688 * range actual loc. 2689 * Otherwise, GPU no access, best_loc is -1. 2690 * 2691 * Return: 2692 * -1 means vm fault GPU no access 2693 * 0 for CPU or GPU id 2694 */ 2695 static int32_t 2696 svm_range_best_restore_location(struct svm_range *prange, 2697 struct kfd_node *node, 2698 int32_t *gpuidx) 2699 { 2700 struct kfd_node *bo_node, *preferred_node; 2701 struct kfd_process *p; 2702 uint32_t gpuid; 2703 int r; 2704 2705 p = container_of(prange->svms, struct kfd_process, svms); 2706 2707 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2708 if (r < 0) { 2709 pr_debug("failed to get gpuid from kgd\n"); 2710 return -1; 2711 } 2712 2713 if (node->adev->apu_prefer_gtt) 2714 return 0; 2715 2716 if (prange->preferred_loc == gpuid || 2717 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2718 return prange->preferred_loc; 2719 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2720 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2721 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2722 return prange->preferred_loc; 2723 /* fall through */ 2724 } 2725 2726 if (test_bit(*gpuidx, prange->bitmap_access)) 2727 return gpuid; 2728 2729 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2730 if (!prange->actual_loc) 2731 return 0; 2732 2733 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2734 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2735 return prange->actual_loc; 2736 else 2737 return 0; 2738 } 2739 2740 return -1; 2741 } 2742 2743 static int 2744 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2745 unsigned long *start, unsigned long *last, 2746 bool *is_heap_stack) 2747 { 2748 struct vm_area_struct *vma; 2749 struct interval_tree_node *node; 2750 struct rb_node *rb_node; 2751 unsigned long start_limit, end_limit; 2752 2753 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2754 if (!vma) { 2755 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2756 return -EFAULT; 2757 } 2758 2759 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2760 2761 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2762 (unsigned long)ALIGN_DOWN(addr, 1UL << p->svms.default_granularity)); 2763 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2764 (unsigned long)ALIGN(addr + 1, 1UL << p->svms.default_granularity)); 2765 2766 /* First range that starts after the fault address */ 2767 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2768 if (node) { 2769 end_limit = min(end_limit, node->start); 2770 /* Last range that ends before the fault address */ 2771 rb_node = rb_prev(&node->rb); 2772 } else { 2773 /* Last range must end before addr because 2774 * there was no range after addr 2775 */ 2776 rb_node = rb_last(&p->svms.objects.rb_root); 2777 } 2778 if (rb_node) { 2779 node = container_of(rb_node, struct interval_tree_node, rb); 2780 if (node->last >= addr) { 2781 WARN(1, "Overlap with prev node and page fault addr\n"); 2782 return -EFAULT; 2783 } 2784 start_limit = max(start_limit, node->last + 1); 2785 } 2786 2787 *start = start_limit; 2788 *last = end_limit - 1; 2789 2790 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2791 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2792 *start, *last, *is_heap_stack); 2793 2794 return 0; 2795 } 2796 2797 static int 2798 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2799 uint64_t *bo_s, uint64_t *bo_l) 2800 { 2801 struct amdgpu_bo_va_mapping *mapping; 2802 struct interval_tree_node *node; 2803 struct amdgpu_bo *bo = NULL; 2804 unsigned long userptr; 2805 uint32_t i; 2806 int r; 2807 2808 for (i = 0; i < p->n_pdds; i++) { 2809 struct amdgpu_vm *vm; 2810 2811 if (!p->pdds[i]->drm_priv) 2812 continue; 2813 2814 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2815 r = amdgpu_bo_reserve(vm->root.bo, false); 2816 if (r) 2817 return r; 2818 2819 /* Check userptr by searching entire vm->va interval tree */ 2820 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2821 while (node) { 2822 mapping = container_of((struct rb_node *)node, 2823 struct amdgpu_bo_va_mapping, rb); 2824 bo = mapping->bo_va->base.bo; 2825 2826 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2827 start << PAGE_SHIFT, 2828 last << PAGE_SHIFT, 2829 &userptr)) { 2830 node = interval_tree_iter_next(node, 0, ~0ULL); 2831 continue; 2832 } 2833 2834 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2835 start, last); 2836 if (bo_s && bo_l) { 2837 *bo_s = userptr >> PAGE_SHIFT; 2838 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2839 } 2840 amdgpu_bo_unreserve(vm->root.bo); 2841 return -EADDRINUSE; 2842 } 2843 amdgpu_bo_unreserve(vm->root.bo); 2844 } 2845 return 0; 2846 } 2847 2848 static struct 2849 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2850 struct kfd_process *p, 2851 struct mm_struct *mm, 2852 int64_t addr) 2853 { 2854 struct svm_range *prange = NULL; 2855 unsigned long start, last; 2856 uint32_t gpuid, gpuidx; 2857 bool is_heap_stack; 2858 uint64_t bo_s = 0; 2859 uint64_t bo_l = 0; 2860 int r; 2861 2862 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2863 &is_heap_stack)) 2864 return NULL; 2865 2866 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2867 if (r != -EADDRINUSE) 2868 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2869 2870 if (r == -EADDRINUSE) { 2871 if (addr >= bo_s && addr <= bo_l) 2872 return NULL; 2873 2874 /* Create one page svm range if 2MB range overlapping */ 2875 start = addr; 2876 last = addr; 2877 } 2878 2879 prange = svm_range_new(&p->svms, start, last, true); 2880 if (!prange) { 2881 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2882 return NULL; 2883 } 2884 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2885 pr_debug("failed to get gpuid from kgd\n"); 2886 svm_range_free(prange, true); 2887 return NULL; 2888 } 2889 2890 if (is_heap_stack) 2891 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2892 2893 svm_range_add_to_svms(prange); 2894 svm_range_add_notifier_locked(mm, prange); 2895 2896 return prange; 2897 } 2898 2899 /* svm_range_skip_recover - decide if prange can be recovered 2900 * @prange: svm range structure 2901 * 2902 * GPU vm retry fault handle skip recover the range for cases: 2903 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2904 * deferred list work will drain the stale fault before free the prange. 2905 * 2. prange is on deferred list to add interval notifier after split, or 2906 * 3. prange is child range, it is split from parent prange, recover later 2907 * after interval notifier is added. 2908 * 2909 * Return: true to skip recover, false to recover 2910 */ 2911 static bool svm_range_skip_recover(struct svm_range *prange) 2912 { 2913 struct svm_range_list *svms = prange->svms; 2914 2915 spin_lock(&svms->deferred_list_lock); 2916 if (list_empty(&prange->deferred_list) && 2917 list_empty(&prange->child_list)) { 2918 spin_unlock(&svms->deferred_list_lock); 2919 return false; 2920 } 2921 spin_unlock(&svms->deferred_list_lock); 2922 2923 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2924 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2925 svms, prange, prange->start, prange->last); 2926 return true; 2927 } 2928 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2929 prange->work_item.op == SVM_OP_ADD_RANGE) { 2930 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2931 svms, prange, prange->start, prange->last); 2932 return true; 2933 } 2934 return false; 2935 } 2936 2937 static void 2938 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2939 int32_t gpuidx) 2940 { 2941 struct kfd_process_device *pdd; 2942 2943 /* fault is on different page of same range 2944 * or fault is skipped to recover later 2945 * or fault is on invalid virtual address 2946 */ 2947 if (gpuidx == MAX_GPU_INSTANCE) { 2948 uint32_t gpuid; 2949 int r; 2950 2951 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2952 if (r < 0) 2953 return; 2954 } 2955 2956 /* fault is recovered 2957 * or fault cannot recover because GPU no access on the range 2958 */ 2959 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2960 if (pdd) 2961 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2962 } 2963 2964 static bool 2965 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2966 { 2967 unsigned long requested = VM_READ; 2968 2969 if (write_fault) 2970 requested |= VM_WRITE; 2971 2972 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2973 vma->vm_flags); 2974 return (vma->vm_flags & requested) == requested; 2975 } 2976 2977 int 2978 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2979 uint32_t vmid, uint32_t node_id, 2980 uint64_t addr, uint64_t ts, bool write_fault) 2981 { 2982 unsigned long start, last, size; 2983 struct mm_struct *mm = NULL; 2984 struct svm_range_list *svms; 2985 struct svm_range *prange; 2986 struct kfd_process *p; 2987 ktime_t timestamp = ktime_get_boottime(); 2988 struct kfd_node *node; 2989 int32_t best_loc; 2990 int32_t gpuid, gpuidx = MAX_GPU_INSTANCE; 2991 bool write_locked = false; 2992 struct vm_area_struct *vma; 2993 bool migration = false; 2994 int r = 0; 2995 2996 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2997 pr_debug("device does not support SVM\n"); 2998 return -EFAULT; 2999 } 3000 3001 p = kfd_lookup_process_by_pasid(pasid, NULL); 3002 if (!p) { 3003 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 3004 return 0; 3005 } 3006 svms = &p->svms; 3007 3008 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 3009 3010 if (atomic_read(&svms->drain_pagefaults)) { 3011 pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr); 3012 r = 0; 3013 goto out; 3014 } 3015 3016 node = kfd_node_by_irq_ids(adev, node_id, vmid); 3017 if (!node) { 3018 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 3019 vmid); 3020 r = -EFAULT; 3021 goto out; 3022 } 3023 3024 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 3025 pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id); 3026 r = -EFAULT; 3027 goto out; 3028 } 3029 3030 if (!p->xnack_enabled) { 3031 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 3032 r = -EFAULT; 3033 goto out; 3034 } 3035 3036 /* p->lead_thread is available as kfd_process_wq_release flush the work 3037 * before releasing task ref. 3038 */ 3039 mm = get_task_mm(p->lead_thread); 3040 if (!mm) { 3041 pr_debug("svms 0x%p failed to get mm\n", svms); 3042 r = 0; 3043 goto out; 3044 } 3045 3046 mmap_read_lock(mm); 3047 retry_write_locked: 3048 mutex_lock(&svms->lock); 3049 3050 /* check if this page fault time stamp is before svms->checkpoint_ts */ 3051 if (svms->checkpoint_ts[gpuidx] != 0) { 3052 if (amdgpu_ih_ts_after_or_equal(ts, svms->checkpoint_ts[gpuidx])) { 3053 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 3054 if (write_locked) 3055 mmap_write_downgrade(mm); 3056 r = -EAGAIN; 3057 goto out_unlock_svms; 3058 } else { 3059 /* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts 3060 * to zero to avoid following ts wrap around give wrong comparing 3061 */ 3062 svms->checkpoint_ts[gpuidx] = 0; 3063 } 3064 } 3065 3066 prange = svm_range_from_addr(svms, addr, NULL); 3067 if (!prange) { 3068 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 3069 svms, addr); 3070 if (!write_locked) { 3071 /* Need the write lock to create new range with MMU notifier. 3072 * Also flush pending deferred work to make sure the interval 3073 * tree is up to date before we add a new range 3074 */ 3075 mutex_unlock(&svms->lock); 3076 mmap_read_unlock(mm); 3077 mmap_write_lock(mm); 3078 write_locked = true; 3079 goto retry_write_locked; 3080 } 3081 prange = svm_range_create_unregistered_range(node, p, mm, addr); 3082 if (!prange) { 3083 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 3084 svms, addr); 3085 mmap_write_downgrade(mm); 3086 r = -EFAULT; 3087 goto out_unlock_svms; 3088 } 3089 } 3090 if (write_locked) 3091 mmap_write_downgrade(mm); 3092 3093 mutex_lock(&prange->migrate_mutex); 3094 3095 if (svm_range_skip_recover(prange)) { 3096 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3097 r = 0; 3098 goto out_unlock_range; 3099 } 3100 3101 /* skip duplicate vm fault on different pages of same range */ 3102 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3103 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3104 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3105 svms, prange->start, prange->last); 3106 r = 0; 3107 goto out_unlock_range; 3108 } 3109 3110 /* __do_munmap removed VMA, return success as we are handling stale 3111 * retry fault. 3112 */ 3113 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3114 if (!vma) { 3115 pr_debug("address 0x%llx VMA is removed\n", addr); 3116 r = 0; 3117 goto out_unlock_range; 3118 } 3119 3120 if (!svm_fault_allowed(vma, write_fault)) { 3121 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3122 write_fault ? "write" : "read"); 3123 r = -EPERM; 3124 goto out_unlock_range; 3125 } 3126 3127 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3128 if (best_loc == -1) { 3129 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3130 svms, prange->start, prange->last); 3131 r = -EACCES; 3132 goto out_unlock_range; 3133 } 3134 3135 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3136 svms, prange->start, prange->last, best_loc, 3137 prange->actual_loc); 3138 3139 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3140 write_fault, timestamp); 3141 3142 /* Align migration range start and size to granularity size */ 3143 size = 1UL << prange->granularity; 3144 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3145 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3146 if (prange->actual_loc != 0 || best_loc != 0) { 3147 if (best_loc) { 3148 r = svm_migrate_to_vram(prange, best_loc, start, last, 3149 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3150 if (r) { 3151 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3152 r, addr); 3153 /* Fallback to system memory if migration to 3154 * VRAM failed 3155 */ 3156 if (prange->actual_loc && prange->actual_loc != best_loc) 3157 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3158 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3159 else 3160 r = 0; 3161 } 3162 } else { 3163 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3164 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3165 } 3166 if (r) { 3167 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3168 r, svms, start, last); 3169 goto out_migrate_fail; 3170 } else { 3171 migration = true; 3172 } 3173 } 3174 3175 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3176 false, false); 3177 if (r) 3178 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3179 r, svms, start, last); 3180 3181 out_migrate_fail: 3182 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3183 migration); 3184 3185 out_unlock_range: 3186 mutex_unlock(&prange->migrate_mutex); 3187 out_unlock_svms: 3188 mutex_unlock(&svms->lock); 3189 mmap_read_unlock(mm); 3190 3191 if (r != -EAGAIN) 3192 svm_range_count_fault(node, p, gpuidx); 3193 3194 mmput(mm); 3195 out: 3196 kfd_unref_process(p); 3197 3198 if (r == -EAGAIN) { 3199 pr_debug("recover vm fault later\n"); 3200 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3201 r = 0; 3202 } 3203 return r; 3204 } 3205 3206 int 3207 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3208 { 3209 struct svm_range *prange, *pchild; 3210 uint64_t reserved_size = 0; 3211 uint64_t size; 3212 int r = 0; 3213 3214 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3215 3216 mutex_lock(&p->svms.lock); 3217 3218 list_for_each_entry(prange, &p->svms.list, list) { 3219 svm_range_lock(prange); 3220 list_for_each_entry(pchild, &prange->child_list, child_list) { 3221 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3222 if (xnack_enabled) { 3223 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3224 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3225 } else { 3226 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3227 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3228 if (r) 3229 goto out_unlock; 3230 reserved_size += size; 3231 } 3232 } 3233 3234 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3235 if (xnack_enabled) { 3236 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3237 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3238 } else { 3239 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3240 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3241 if (r) 3242 goto out_unlock; 3243 reserved_size += size; 3244 } 3245 out_unlock: 3246 svm_range_unlock(prange); 3247 if (r) 3248 break; 3249 } 3250 3251 if (r) 3252 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3253 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3254 else 3255 /* Change xnack mode must be inside svms lock, to avoid race with 3256 * svm_range_deferred_list_work unreserve memory in parallel. 3257 */ 3258 p->xnack_enabled = xnack_enabled; 3259 3260 mutex_unlock(&p->svms.lock); 3261 return r; 3262 } 3263 3264 void svm_range_list_fini(struct kfd_process *p) 3265 { 3266 struct svm_range *prange; 3267 struct svm_range *next; 3268 3269 pr_debug("process pid %d svms 0x%p\n", p->lead_thread->pid, 3270 &p->svms); 3271 3272 cancel_delayed_work_sync(&p->svms.restore_work); 3273 3274 /* Ensure list work is finished before process is destroyed */ 3275 flush_work(&p->svms.deferred_list_work); 3276 3277 /* 3278 * Ensure no retry fault comes in afterwards, as page fault handler will 3279 * not find kfd process and take mm lock to recover fault. 3280 * stop kfd page fault handing, then wait pending page faults got drained 3281 */ 3282 atomic_set(&p->svms.drain_pagefaults, 1); 3283 svm_range_drain_retry_fault(&p->svms); 3284 3285 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3286 svm_range_unlink(prange); 3287 svm_range_remove_notifier(prange); 3288 svm_range_free(prange, true); 3289 } 3290 3291 mutex_destroy(&p->svms.lock); 3292 3293 pr_debug("process pid %d svms 0x%p done\n", 3294 p->lead_thread->pid, &p->svms); 3295 } 3296 3297 int svm_range_list_init(struct kfd_process *p) 3298 { 3299 struct svm_range_list *svms = &p->svms; 3300 int i; 3301 3302 svms->objects = RB_ROOT_CACHED; 3303 mutex_init(&svms->lock); 3304 INIT_LIST_HEAD(&svms->list); 3305 atomic_set(&svms->evicted_ranges, 0); 3306 atomic_set(&svms->drain_pagefaults, 0); 3307 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3308 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3309 INIT_LIST_HEAD(&svms->deferred_range_list); 3310 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3311 spin_lock_init(&svms->deferred_list_lock); 3312 3313 for (i = 0; i < p->n_pdds; i++) 3314 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3315 bitmap_set(svms->bitmap_supported, i, 1); 3316 3317 /* Value of default granularity cannot exceed 0x1B, the 3318 * number of pages supported by a 4-level paging table 3319 */ 3320 svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B); 3321 pr_debug("Default SVM Granularity to use: %d\n", svms->default_granularity); 3322 3323 return 0; 3324 } 3325 3326 /** 3327 * svm_range_check_vm - check if virtual address range mapped already 3328 * @p: current kfd_process 3329 * @start: range start address, in pages 3330 * @last: range last address, in pages 3331 * @bo_s: mapping start address in pages if address range already mapped 3332 * @bo_l: mapping last address in pages if address range already mapped 3333 * 3334 * The purpose is to avoid virtual address ranges already allocated by 3335 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3336 * It looks for each pdd in the kfd_process. 3337 * 3338 * Context: Process context 3339 * 3340 * Return 0 - OK, if the range is not mapped. 3341 * Otherwise error code: 3342 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3343 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3344 * a signal. Release all buffer reservations and return to user-space. 3345 */ 3346 static int 3347 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3348 uint64_t *bo_s, uint64_t *bo_l) 3349 { 3350 struct amdgpu_bo_va_mapping *mapping; 3351 struct interval_tree_node *node; 3352 uint32_t i; 3353 int r; 3354 3355 for (i = 0; i < p->n_pdds; i++) { 3356 struct amdgpu_vm *vm; 3357 3358 if (!p->pdds[i]->drm_priv) 3359 continue; 3360 3361 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3362 r = amdgpu_bo_reserve(vm->root.bo, false); 3363 if (r) 3364 return r; 3365 3366 node = interval_tree_iter_first(&vm->va, start, last); 3367 if (node) { 3368 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3369 start, last); 3370 mapping = container_of((struct rb_node *)node, 3371 struct amdgpu_bo_va_mapping, rb); 3372 if (bo_s && bo_l) { 3373 *bo_s = mapping->start; 3374 *bo_l = mapping->last; 3375 } 3376 amdgpu_bo_unreserve(vm->root.bo); 3377 return -EADDRINUSE; 3378 } 3379 amdgpu_bo_unreserve(vm->root.bo); 3380 } 3381 3382 return 0; 3383 } 3384 3385 /** 3386 * svm_range_is_valid - check if virtual address range is valid 3387 * @p: current kfd_process 3388 * @start: range start address, in pages 3389 * @size: range size, in pages 3390 * 3391 * Valid virtual address range means it belongs to one or more VMAs 3392 * 3393 * Context: Process context 3394 * 3395 * Return: 3396 * 0 - OK, otherwise error code 3397 */ 3398 static int 3399 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3400 { 3401 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3402 struct vm_area_struct *vma; 3403 unsigned long end; 3404 unsigned long start_unchg = start; 3405 3406 start <<= PAGE_SHIFT; 3407 end = start + (size << PAGE_SHIFT); 3408 do { 3409 vma = vma_lookup(p->mm, start); 3410 if (!vma || (vma->vm_flags & device_vma)) 3411 return -EFAULT; 3412 start = min(end, vma->vm_end); 3413 } while (start < end); 3414 3415 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3416 NULL); 3417 } 3418 3419 /** 3420 * svm_range_best_prefetch_location - decide the best prefetch location 3421 * @prange: svm range structure 3422 * 3423 * For xnack off: 3424 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3425 * can be CPU or GPU. 3426 * 3427 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3428 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3429 * the best prefetch location is always CPU, because GPU can not have coherent 3430 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3431 * 3432 * For xnack on: 3433 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3434 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3435 * 3436 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3437 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3438 * prefetch location is always CPU. 3439 * 3440 * Context: Process context 3441 * 3442 * Return: 3443 * 0 for CPU or GPU id 3444 */ 3445 static uint32_t 3446 svm_range_best_prefetch_location(struct svm_range *prange) 3447 { 3448 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3449 uint32_t best_loc = prange->prefetch_loc; 3450 struct kfd_process_device *pdd; 3451 struct kfd_node *bo_node; 3452 struct kfd_process *p; 3453 uint32_t gpuidx; 3454 3455 p = container_of(prange->svms, struct kfd_process, svms); 3456 3457 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3458 goto out; 3459 3460 bo_node = svm_range_get_node_by_id(prange, best_loc); 3461 if (!bo_node) { 3462 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3463 best_loc = 0; 3464 goto out; 3465 } 3466 3467 if (bo_node->adev->apu_prefer_gtt) { 3468 best_loc = 0; 3469 goto out; 3470 } 3471 3472 if (p->xnack_enabled) 3473 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3474 else 3475 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3476 MAX_GPU_INSTANCE); 3477 3478 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3479 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3480 if (!pdd) { 3481 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3482 continue; 3483 } 3484 3485 if (pdd->dev->adev == bo_node->adev) 3486 continue; 3487 3488 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3489 best_loc = 0; 3490 break; 3491 } 3492 } 3493 3494 out: 3495 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3496 p->xnack_enabled, &p->svms, prange->start, prange->last, 3497 best_loc); 3498 3499 return best_loc; 3500 } 3501 3502 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3503 * @mm: current process mm_struct 3504 * @prange: svm range structure 3505 * @migrated: output, true if migration is triggered 3506 * 3507 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3508 * from ram to vram. 3509 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3510 * from vram to ram. 3511 * 3512 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3513 * and restore work: 3514 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3515 * stops all queues, schedule restore work 3516 * 2. svm_range_restore_work wait for migration is done by 3517 * a. svm_range_validate_vram takes prange->migrate_mutex 3518 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3519 * 3. restore work update mappings of GPU, resume all queues. 3520 * 3521 * Context: Process context 3522 * 3523 * Return: 3524 * 0 - OK, otherwise - error code of migration 3525 */ 3526 static int 3527 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3528 bool *migrated) 3529 { 3530 uint32_t best_loc; 3531 int r = 0; 3532 3533 *migrated = false; 3534 best_loc = svm_range_best_prefetch_location(prange); 3535 3536 /* when best_loc is a gpu node and same as prange->actual_loc 3537 * we still need do migration as prange->actual_loc !=0 does 3538 * not mean all pages in prange are vram. hmm migrate will pick 3539 * up right pages during migration. 3540 */ 3541 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3542 (best_loc == 0 && prange->actual_loc == 0)) 3543 return 0; 3544 3545 if (!best_loc) { 3546 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3547 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3548 *migrated = !r; 3549 return r; 3550 } 3551 3552 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3553 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3554 *migrated = !r; 3555 3556 return 0; 3557 } 3558 3559 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3560 { 3561 /* Dereferencing fence->svm_bo is safe here because the fence hasn't 3562 * signaled yet and we're under the protection of the fence->lock. 3563 * After the fence is signaled in svm_range_bo_release, we cannot get 3564 * here any more. 3565 * 3566 * Reference is dropped in svm_range_evict_svm_bo_worker. 3567 */ 3568 if (svm_bo_ref_unless_zero(fence->svm_bo)) { 3569 WRITE_ONCE(fence->svm_bo->evicting, 1); 3570 schedule_work(&fence->svm_bo->eviction_work); 3571 } 3572 3573 return 0; 3574 } 3575 3576 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3577 { 3578 struct svm_range_bo *svm_bo; 3579 struct mm_struct *mm; 3580 int r = 0; 3581 3582 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3583 3584 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3585 mm = svm_bo->eviction_fence->mm; 3586 } else { 3587 svm_range_bo_unref(svm_bo); 3588 return; 3589 } 3590 3591 mmap_read_lock(mm); 3592 spin_lock(&svm_bo->list_lock); 3593 while (!list_empty(&svm_bo->range_list) && !r) { 3594 struct svm_range *prange = 3595 list_first_entry(&svm_bo->range_list, 3596 struct svm_range, svm_bo_list); 3597 int retries = 3; 3598 3599 list_del_init(&prange->svm_bo_list); 3600 spin_unlock(&svm_bo->list_lock); 3601 3602 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3603 prange->start, prange->last); 3604 3605 mutex_lock(&prange->migrate_mutex); 3606 do { 3607 /* migrate all vram pages in this prange to sys ram 3608 * after that prange->actual_loc should be zero 3609 */ 3610 r = svm_migrate_vram_to_ram(prange, mm, 3611 prange->start, prange->last, 3612 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3613 } while (!r && prange->actual_loc && --retries); 3614 3615 if (!r && prange->actual_loc) 3616 pr_info_once("Migration failed during eviction"); 3617 3618 if (!prange->actual_loc) { 3619 mutex_lock(&prange->lock); 3620 prange->svm_bo = NULL; 3621 mutex_unlock(&prange->lock); 3622 } 3623 mutex_unlock(&prange->migrate_mutex); 3624 3625 spin_lock(&svm_bo->list_lock); 3626 } 3627 spin_unlock(&svm_bo->list_lock); 3628 mmap_read_unlock(mm); 3629 mmput(mm); 3630 3631 dma_fence_signal(&svm_bo->eviction_fence->base); 3632 3633 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3634 * has been called in svm_migrate_vram_to_ram 3635 */ 3636 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3637 svm_range_bo_unref(svm_bo); 3638 } 3639 3640 static int 3641 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3642 uint64_t start, uint64_t size, uint32_t nattr, 3643 struct kfd_ioctl_svm_attribute *attrs) 3644 { 3645 struct amdkfd_process_info *process_info = p->kgd_process_info; 3646 struct list_head update_list; 3647 struct list_head insert_list; 3648 struct list_head remove_list; 3649 struct list_head remap_list; 3650 struct svm_range_list *svms; 3651 struct svm_range *prange; 3652 struct svm_range *next; 3653 bool update_mapping = false; 3654 bool flush_tlb; 3655 int r, ret = 0; 3656 3657 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3658 p->lead_thread->pid, &p->svms, start, start + size - 1, size); 3659 3660 r = svm_range_check_attr(p, nattr, attrs); 3661 if (r) 3662 return r; 3663 3664 svms = &p->svms; 3665 3666 mutex_lock(&process_info->lock); 3667 3668 svm_range_list_lock_and_flush_work(svms, mm); 3669 3670 r = svm_range_is_valid(p, start, size); 3671 if (r) { 3672 pr_debug("invalid range r=%d\n", r); 3673 mmap_write_unlock(mm); 3674 goto out; 3675 } 3676 3677 mutex_lock(&svms->lock); 3678 3679 /* Add new range and split existing ranges as needed */ 3680 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3681 &insert_list, &remove_list, &remap_list); 3682 if (r) { 3683 mutex_unlock(&svms->lock); 3684 mmap_write_unlock(mm); 3685 goto out; 3686 } 3687 /* Apply changes as a transaction */ 3688 list_for_each_entry_safe(prange, next, &insert_list, list) { 3689 svm_range_add_to_svms(prange); 3690 svm_range_add_notifier_locked(mm, prange); 3691 } 3692 list_for_each_entry(prange, &update_list, update_list) { 3693 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3694 /* TODO: unmap ranges from GPU that lost access */ 3695 } 3696 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3697 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3698 prange->svms, prange, prange->start, 3699 prange->last); 3700 svm_range_unlink(prange); 3701 svm_range_remove_notifier(prange); 3702 svm_range_free(prange, false); 3703 } 3704 3705 mmap_write_downgrade(mm); 3706 /* Trigger migrations and revalidate and map to GPUs as needed. If 3707 * this fails we may be left with partially completed actions. There 3708 * is no clean way of rolling back to the previous state in such a 3709 * case because the rollback wouldn't be guaranteed to work either. 3710 */ 3711 list_for_each_entry(prange, &update_list, update_list) { 3712 bool migrated; 3713 3714 mutex_lock(&prange->migrate_mutex); 3715 3716 r = svm_range_trigger_migration(mm, prange, &migrated); 3717 if (r) 3718 goto out_unlock_range; 3719 3720 if (migrated && (!p->xnack_enabled || 3721 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3722 prange->mapped_to_gpu) { 3723 pr_debug("restore_work will update mappings of GPUs\n"); 3724 mutex_unlock(&prange->migrate_mutex); 3725 continue; 3726 } 3727 3728 if (!migrated && !update_mapping) { 3729 mutex_unlock(&prange->migrate_mutex); 3730 continue; 3731 } 3732 3733 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3734 3735 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3736 MAX_GPU_INSTANCE, true, true, flush_tlb); 3737 if (r) 3738 pr_debug("failed %d to map svm range\n", r); 3739 3740 out_unlock_range: 3741 mutex_unlock(&prange->migrate_mutex); 3742 if (r) 3743 ret = r; 3744 } 3745 3746 list_for_each_entry(prange, &remap_list, update_list) { 3747 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3748 prange, prange->start, prange->last); 3749 mutex_lock(&prange->migrate_mutex); 3750 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3751 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu); 3752 if (r) 3753 pr_debug("failed %d on remap svm range\n", r); 3754 mutex_unlock(&prange->migrate_mutex); 3755 if (r) 3756 ret = r; 3757 } 3758 3759 dynamic_svm_range_dump(svms); 3760 3761 mutex_unlock(&svms->lock); 3762 mmap_read_unlock(mm); 3763 out: 3764 mutex_unlock(&process_info->lock); 3765 3766 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] done, r=%d\n", 3767 p->lead_thread->pid, &p->svms, start, start + size - 1, r); 3768 3769 return ret ? ret : r; 3770 } 3771 3772 static int 3773 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3774 uint64_t start, uint64_t size, uint32_t nattr, 3775 struct kfd_ioctl_svm_attribute *attrs) 3776 { 3777 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3778 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3779 bool get_preferred_loc = false; 3780 bool get_prefetch_loc = false; 3781 bool get_granularity = false; 3782 bool get_accessible = false; 3783 bool get_flags = false; 3784 uint64_t last = start + size - 1UL; 3785 uint8_t granularity = 0xff; 3786 struct interval_tree_node *node; 3787 struct svm_range_list *svms; 3788 struct svm_range *prange; 3789 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3790 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3791 uint32_t flags_and = 0xffffffff; 3792 uint32_t flags_or = 0; 3793 int gpuidx; 3794 uint32_t i; 3795 int r = 0; 3796 3797 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3798 start + size - 1, nattr); 3799 3800 /* Flush pending deferred work to avoid racing with deferred actions from 3801 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3802 * can still race with get_attr because we don't hold the mmap lock. But that 3803 * would be a race condition in the application anyway, and undefined 3804 * behaviour is acceptable in that case. 3805 */ 3806 flush_work(&p->svms.deferred_list_work); 3807 3808 mmap_read_lock(mm); 3809 r = svm_range_is_valid(p, start, size); 3810 mmap_read_unlock(mm); 3811 if (r) { 3812 pr_debug("invalid range r=%d\n", r); 3813 return r; 3814 } 3815 3816 for (i = 0; i < nattr; i++) { 3817 switch (attrs[i].type) { 3818 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3819 get_preferred_loc = true; 3820 break; 3821 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3822 get_prefetch_loc = true; 3823 break; 3824 case KFD_IOCTL_SVM_ATTR_ACCESS: 3825 get_accessible = true; 3826 break; 3827 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3828 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3829 get_flags = true; 3830 break; 3831 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3832 get_granularity = true; 3833 break; 3834 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3835 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3836 fallthrough; 3837 default: 3838 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3839 return -EINVAL; 3840 } 3841 } 3842 3843 svms = &p->svms; 3844 3845 mutex_lock(&svms->lock); 3846 3847 node = interval_tree_iter_first(&svms->objects, start, last); 3848 if (!node) { 3849 pr_debug("range attrs not found return default values\n"); 3850 svm_range_set_default_attributes(svms, &location, &prefetch_loc, 3851 &granularity, &flags_and); 3852 flags_or = flags_and; 3853 if (p->xnack_enabled) 3854 bitmap_copy(bitmap_access, svms->bitmap_supported, 3855 MAX_GPU_INSTANCE); 3856 else 3857 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3858 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3859 goto fill_values; 3860 } 3861 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3862 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3863 3864 while (node) { 3865 struct interval_tree_node *next; 3866 3867 prange = container_of(node, struct svm_range, it_node); 3868 next = interval_tree_iter_next(node, start, last); 3869 3870 if (get_preferred_loc) { 3871 if (prange->preferred_loc == 3872 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3873 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3874 location != prange->preferred_loc)) { 3875 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3876 get_preferred_loc = false; 3877 } else { 3878 location = prange->preferred_loc; 3879 } 3880 } 3881 if (get_prefetch_loc) { 3882 if (prange->prefetch_loc == 3883 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3884 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3885 prefetch_loc != prange->prefetch_loc)) { 3886 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3887 get_prefetch_loc = false; 3888 } else { 3889 prefetch_loc = prange->prefetch_loc; 3890 } 3891 } 3892 if (get_accessible) { 3893 bitmap_and(bitmap_access, bitmap_access, 3894 prange->bitmap_access, MAX_GPU_INSTANCE); 3895 bitmap_and(bitmap_aip, bitmap_aip, 3896 prange->bitmap_aip, MAX_GPU_INSTANCE); 3897 } 3898 if (get_flags) { 3899 flags_and &= prange->flags; 3900 flags_or |= prange->flags; 3901 } 3902 3903 if (get_granularity && prange->granularity < granularity) 3904 granularity = prange->granularity; 3905 3906 node = next; 3907 } 3908 fill_values: 3909 mutex_unlock(&svms->lock); 3910 3911 for (i = 0; i < nattr; i++) { 3912 switch (attrs[i].type) { 3913 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3914 attrs[i].value = location; 3915 break; 3916 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3917 attrs[i].value = prefetch_loc; 3918 break; 3919 case KFD_IOCTL_SVM_ATTR_ACCESS: 3920 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3921 attrs[i].value); 3922 if (gpuidx < 0) { 3923 pr_debug("invalid gpuid %x\n", attrs[i].value); 3924 return -EINVAL; 3925 } 3926 if (test_bit(gpuidx, bitmap_access)) 3927 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3928 else if (test_bit(gpuidx, bitmap_aip)) 3929 attrs[i].type = 3930 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3931 else 3932 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3933 break; 3934 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3935 attrs[i].value = flags_and; 3936 break; 3937 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3938 attrs[i].value = ~flags_or; 3939 break; 3940 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3941 attrs[i].value = (uint32_t)granularity; 3942 break; 3943 } 3944 } 3945 3946 return 0; 3947 } 3948 3949 int kfd_criu_resume_svm(struct kfd_process *p) 3950 { 3951 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3952 int nattr_common = 4, nattr_accessibility = 1; 3953 struct criu_svm_metadata *criu_svm_md = NULL; 3954 struct svm_range_list *svms = &p->svms; 3955 struct criu_svm_metadata *next = NULL; 3956 uint32_t set_flags = 0xffffffff; 3957 int i, j, num_attrs, ret = 0; 3958 uint64_t set_attr_size; 3959 struct mm_struct *mm; 3960 3961 if (list_empty(&svms->criu_svm_metadata_list)) { 3962 pr_debug("No SVM data from CRIU restore stage 2\n"); 3963 return ret; 3964 } 3965 3966 mm = get_task_mm(p->lead_thread); 3967 if (!mm) { 3968 pr_err("failed to get mm for the target process\n"); 3969 return -ESRCH; 3970 } 3971 3972 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3973 3974 i = j = 0; 3975 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3976 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3977 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3978 3979 for (j = 0; j < num_attrs; j++) { 3980 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3981 i, j, criu_svm_md->data.attrs[j].type, 3982 i, j, criu_svm_md->data.attrs[j].value); 3983 switch (criu_svm_md->data.attrs[j].type) { 3984 /* During Checkpoint operation, the query for 3985 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3986 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3987 * not used by the range which was checkpointed. Care 3988 * must be taken to not restore with an invalid value 3989 * otherwise the gpuidx value will be invalid and 3990 * set_attr would eventually fail so just replace those 3991 * with another dummy attribute such as 3992 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3993 */ 3994 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3995 if (criu_svm_md->data.attrs[j].value == 3996 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3997 criu_svm_md->data.attrs[j].type = 3998 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3999 criu_svm_md->data.attrs[j].value = 0; 4000 } 4001 break; 4002 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 4003 set_flags = criu_svm_md->data.attrs[j].value; 4004 break; 4005 default: 4006 break; 4007 } 4008 } 4009 4010 /* CLR_FLAGS is not available via get_attr during checkpoint but 4011 * it needs to be inserted before restoring the ranges so 4012 * allocate extra space for it before calling set_attr 4013 */ 4014 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4015 (num_attrs + 1); 4016 set_attr_new = krealloc(set_attr, set_attr_size, 4017 GFP_KERNEL); 4018 if (!set_attr_new) { 4019 ret = -ENOMEM; 4020 goto exit; 4021 } 4022 set_attr = set_attr_new; 4023 4024 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 4025 sizeof(struct kfd_ioctl_svm_attribute)); 4026 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 4027 set_attr[num_attrs].value = ~set_flags; 4028 4029 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 4030 criu_svm_md->data.size, num_attrs + 1, 4031 set_attr); 4032 if (ret) { 4033 pr_err("CRIU: failed to set range attributes\n"); 4034 goto exit; 4035 } 4036 4037 i++; 4038 } 4039 exit: 4040 kfree(set_attr); 4041 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 4042 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 4043 criu_svm_md->data.start_addr); 4044 kfree(criu_svm_md); 4045 } 4046 4047 mmput(mm); 4048 return ret; 4049 4050 } 4051 4052 int kfd_criu_restore_svm(struct kfd_process *p, 4053 uint8_t __user *user_priv_ptr, 4054 uint64_t *priv_data_offset, 4055 uint64_t max_priv_data_size) 4056 { 4057 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 4058 int nattr_common = 4, nattr_accessibility = 1; 4059 struct criu_svm_metadata *criu_svm_md = NULL; 4060 struct svm_range_list *svms = &p->svms; 4061 uint32_t num_devices; 4062 int ret = 0; 4063 4064 num_devices = p->n_pdds; 4065 /* Handle one SVM range object at a time, also the number of gpus are 4066 * assumed to be same on the restore node, checking must be done while 4067 * evaluating the topology earlier 4068 */ 4069 4070 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 4071 (nattr_common + nattr_accessibility * num_devices); 4072 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 4073 4074 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4075 svm_attrs_size; 4076 4077 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 4078 if (!criu_svm_md) { 4079 pr_err("failed to allocate memory to store svm metadata\n"); 4080 return -ENOMEM; 4081 } 4082 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 4083 ret = -EINVAL; 4084 goto exit; 4085 } 4086 4087 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 4088 svm_priv_data_size); 4089 if (ret) { 4090 ret = -EFAULT; 4091 goto exit; 4092 } 4093 *priv_data_offset += svm_priv_data_size; 4094 4095 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 4096 4097 return 0; 4098 4099 4100 exit: 4101 kfree(criu_svm_md); 4102 return ret; 4103 } 4104 4105 void svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 4106 uint64_t *svm_priv_data_size) 4107 { 4108 uint64_t total_size, accessibility_size, common_attr_size; 4109 int nattr_common = 4, nattr_accessibility = 1; 4110 int num_devices = p->n_pdds; 4111 struct svm_range_list *svms; 4112 struct svm_range *prange; 4113 uint32_t count = 0; 4114 4115 *svm_priv_data_size = 0; 4116 4117 svms = &p->svms; 4118 4119 mutex_lock(&svms->lock); 4120 list_for_each_entry(prange, &svms->list, list) { 4121 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4122 prange, prange->start, prange->npages, 4123 prange->start + prange->npages - 1); 4124 count++; 4125 } 4126 mutex_unlock(&svms->lock); 4127 4128 *num_svm_ranges = count; 4129 /* Only the accessbility attributes need to be queried for all the gpus 4130 * individually, remaining ones are spanned across the entire process 4131 * regardless of the various gpu nodes. Of the remaining attributes, 4132 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4133 * 4134 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4135 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4136 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4137 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4138 * 4139 * ** ACCESSBILITY ATTRIBUTES ** 4140 * (Considered as one, type is altered during query, value is gpuid) 4141 * KFD_IOCTL_SVM_ATTR_ACCESS 4142 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4143 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4144 */ 4145 if (*num_svm_ranges > 0) { 4146 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4147 nattr_common; 4148 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4149 nattr_accessibility * num_devices; 4150 4151 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4152 common_attr_size + accessibility_size; 4153 4154 *svm_priv_data_size = *num_svm_ranges * total_size; 4155 } 4156 4157 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4158 *svm_priv_data_size); 4159 } 4160 4161 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4162 uint8_t __user *user_priv_data, 4163 uint64_t *priv_data_offset) 4164 { 4165 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4166 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4167 uint64_t svm_priv_data_size, query_attr_size = 0; 4168 int index, nattr_common = 4, ret = 0; 4169 struct svm_range_list *svms; 4170 int num_devices = p->n_pdds; 4171 struct svm_range *prange; 4172 struct mm_struct *mm; 4173 4174 svms = &p->svms; 4175 4176 mm = get_task_mm(p->lead_thread); 4177 if (!mm) { 4178 pr_err("failed to get mm for the target process\n"); 4179 return -ESRCH; 4180 } 4181 4182 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4183 (nattr_common + num_devices); 4184 4185 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4186 if (!query_attr) { 4187 ret = -ENOMEM; 4188 goto exit; 4189 } 4190 4191 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4192 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4193 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4194 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4195 4196 for (index = 0; index < num_devices; index++) { 4197 struct kfd_process_device *pdd = p->pdds[index]; 4198 4199 query_attr[index + nattr_common].type = 4200 KFD_IOCTL_SVM_ATTR_ACCESS; 4201 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4202 } 4203 4204 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4205 4206 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4207 if (!svm_priv) { 4208 ret = -ENOMEM; 4209 goto exit_query; 4210 } 4211 4212 index = 0; 4213 list_for_each_entry(prange, &svms->list, list) { 4214 4215 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4216 svm_priv->start_addr = prange->start; 4217 svm_priv->size = prange->npages; 4218 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4219 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4220 prange, prange->start, prange->npages, 4221 prange->start + prange->npages - 1, 4222 prange->npages * PAGE_SIZE); 4223 4224 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4225 svm_priv->size, 4226 (nattr_common + num_devices), 4227 svm_priv->attrs); 4228 if (ret) { 4229 pr_err("CRIU: failed to obtain range attributes\n"); 4230 goto exit_priv; 4231 } 4232 4233 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4234 svm_priv_data_size)) { 4235 pr_err("Failed to copy svm priv to user\n"); 4236 ret = -EFAULT; 4237 goto exit_priv; 4238 } 4239 4240 *priv_data_offset += svm_priv_data_size; 4241 4242 } 4243 4244 4245 exit_priv: 4246 kfree(svm_priv); 4247 exit_query: 4248 kfree(query_attr); 4249 exit: 4250 mmput(mm); 4251 return ret; 4252 } 4253 4254 int 4255 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4256 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4257 { 4258 struct mm_struct *mm = current->mm; 4259 int r; 4260 4261 start >>= PAGE_SHIFT; 4262 size >>= PAGE_SHIFT; 4263 4264 switch (op) { 4265 case KFD_IOCTL_SVM_OP_SET_ATTR: 4266 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4267 break; 4268 case KFD_IOCTL_SVM_OP_GET_ATTR: 4269 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4270 break; 4271 default: 4272 r = -EINVAL; 4273 break; 4274 } 4275 4276 return r; 4277 } 4278