1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "kfd_priv.h" 37 #include "kfd_svm.h" 38 #include "kfd_migrate.h" 39 #include "kfd_smi_events.h" 40 41 #ifdef dev_fmt 42 #undef dev_fmt 43 #endif 44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 45 46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 47 48 /* Long enough to ensure no retry fault comes after svm range is restored and 49 * page table is updated. 50 */ 51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 53 #define dynamic_svm_range_dump(svms) \ 54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 55 #else 56 #define dynamic_svm_range_dump(svms) \ 57 do { if (0) svm_range_debug_dump(svms); } while (0) 58 #endif 59 60 /* Giant svm range split into smaller ranges based on this, it is decided using 61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 62 * power of 2MB. 63 */ 64 static uint64_t max_svm_range_pages; 65 66 struct criu_svm_metadata { 67 struct list_head list; 68 struct kfd_criu_svm_range_priv_data data; 69 }; 70 71 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 72 static bool 73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 74 const struct mmu_notifier_range *range, 75 unsigned long cur_seq); 76 static int 77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 78 uint64_t *bo_s, uint64_t *bo_l); 79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 80 .invalidate = svm_range_cpu_invalidate_pagetables, 81 }; 82 83 /** 84 * svm_range_unlink - unlink svm_range from lists and interval tree 85 * @prange: svm range structure to be removed 86 * 87 * Remove the svm_range from the svms and svm_bo lists and the svms 88 * interval tree. 89 * 90 * Context: The caller must hold svms->lock 91 */ 92 static void svm_range_unlink(struct svm_range *prange) 93 { 94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 95 prange, prange->start, prange->last); 96 97 if (prange->svm_bo) { 98 spin_lock(&prange->svm_bo->list_lock); 99 list_del(&prange->svm_bo_list); 100 spin_unlock(&prange->svm_bo->list_lock); 101 } 102 103 list_del(&prange->list); 104 if (prange->it_node.start != 0 && prange->it_node.last != 0) 105 interval_tree_remove(&prange->it_node, &prange->svms->objects); 106 } 107 108 static void 109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 110 { 111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 112 prange, prange->start, prange->last); 113 114 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 115 prange->start << PAGE_SHIFT, 116 prange->npages << PAGE_SHIFT, 117 &svm_range_mn_ops); 118 } 119 120 /** 121 * svm_range_add_to_svms - add svm range to svms 122 * @prange: svm range structure to be added 123 * 124 * Add the svm range to svms interval tree and link list 125 * 126 * Context: The caller must hold svms->lock 127 */ 128 static void svm_range_add_to_svms(struct svm_range *prange) 129 { 130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 131 prange, prange->start, prange->last); 132 133 list_move_tail(&prange->list, &prange->svms->list); 134 prange->it_node.start = prange->start; 135 prange->it_node.last = prange->last; 136 interval_tree_insert(&prange->it_node, &prange->svms->objects); 137 } 138 139 static void svm_range_remove_notifier(struct svm_range *prange) 140 { 141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 142 prange->svms, prange, 143 prange->notifier.interval_tree.start >> PAGE_SHIFT, 144 prange->notifier.interval_tree.last >> PAGE_SHIFT); 145 146 if (prange->notifier.interval_tree.start != 0 && 147 prange->notifier.interval_tree.last != 0) 148 mmu_interval_notifier_remove(&prange->notifier); 149 } 150 151 static bool 152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 153 { 154 return dma_addr && !dma_mapping_error(dev, dma_addr) && 155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 156 } 157 158 static int 159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 160 unsigned long offset, unsigned long npages, 161 unsigned long *hmm_pfns, uint32_t gpuidx) 162 { 163 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 164 dma_addr_t *addr = prange->dma_addr[gpuidx]; 165 struct device *dev = adev->dev; 166 struct page *page; 167 int i, r; 168 169 if (!addr) { 170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL); 171 if (!addr) 172 return -ENOMEM; 173 prange->dma_addr[gpuidx] = addr; 174 } 175 176 addr += offset; 177 for (i = 0; i < npages; i++) { 178 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 180 181 page = hmm_pfn_to_page(hmm_pfns[i]); 182 if (is_zone_device_page(page)) { 183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 184 185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 186 bo_adev->vm_manager.vram_base_offset - 187 bo_adev->kfd.pgmap.range.start; 188 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 190 continue; 191 } 192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 193 r = dma_mapping_error(dev, addr[i]); 194 if (r) { 195 dev_err(dev, "failed %d dma_map_page\n", r); 196 return r; 197 } 198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 199 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 200 } 201 202 return 0; 203 } 204 205 static int 206 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 207 unsigned long offset, unsigned long npages, 208 unsigned long *hmm_pfns) 209 { 210 struct kfd_process *p; 211 uint32_t gpuidx; 212 int r; 213 214 p = container_of(prange->svms, struct kfd_process, svms); 215 216 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 217 struct kfd_process_device *pdd; 218 219 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 220 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 221 if (!pdd) { 222 pr_debug("failed to find device idx %d\n", gpuidx); 223 return -EINVAL; 224 } 225 226 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 227 hmm_pfns, gpuidx); 228 if (r) 229 break; 230 } 231 232 return r; 233 } 234 235 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 236 unsigned long offset, unsigned long npages) 237 { 238 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 239 int i; 240 241 if (!dma_addr) 242 return; 243 244 for (i = offset; i < offset + npages; i++) { 245 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 246 continue; 247 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 248 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 249 dma_addr[i] = 0; 250 } 251 } 252 253 void svm_range_dma_unmap(struct svm_range *prange) 254 { 255 struct kfd_process_device *pdd; 256 dma_addr_t *dma_addr; 257 struct device *dev; 258 struct kfd_process *p; 259 uint32_t gpuidx; 260 261 p = container_of(prange->svms, struct kfd_process, svms); 262 263 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 264 dma_addr = prange->dma_addr[gpuidx]; 265 if (!dma_addr) 266 continue; 267 268 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 269 if (!pdd) { 270 pr_debug("failed to find device idx %d\n", gpuidx); 271 continue; 272 } 273 dev = &pdd->dev->adev->pdev->dev; 274 275 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 276 } 277 } 278 279 static void svm_range_free(struct svm_range *prange, bool do_unmap) 280 { 281 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 282 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 283 uint32_t gpuidx; 284 285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 286 prange->start, prange->last); 287 288 svm_range_vram_node_free(prange); 289 if (do_unmap) 290 svm_range_dma_unmap(prange); 291 292 if (do_unmap && !p->xnack_enabled) { 293 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 294 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 295 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 296 } 297 298 /* free dma_addr array for each gpu */ 299 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 300 if (prange->dma_addr[gpuidx]) { 301 kvfree(prange->dma_addr[gpuidx]); 302 prange->dma_addr[gpuidx] = NULL; 303 } 304 } 305 306 mutex_destroy(&prange->lock); 307 mutex_destroy(&prange->migrate_mutex); 308 kfree(prange); 309 } 310 311 static void 312 svm_range_set_default_attributes(struct svm_range_list *svms, int32_t *location, 313 int32_t *prefetch_loc, uint8_t *granularity, 314 uint32_t *flags) 315 { 316 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 317 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 318 *granularity = svms->default_granularity; 319 *flags = 320 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 321 } 322 323 static struct 324 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 325 uint64_t last, bool update_mem_usage) 326 { 327 uint64_t size = last - start + 1; 328 struct svm_range *prange; 329 struct kfd_process *p; 330 331 prange = kzalloc(sizeof(*prange), GFP_KERNEL); 332 if (!prange) 333 return NULL; 334 335 p = container_of(svms, struct kfd_process, svms); 336 if (!p->xnack_enabled && update_mem_usage && 337 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 338 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 339 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 340 kfree(prange); 341 return NULL; 342 } 343 prange->npages = size; 344 prange->svms = svms; 345 prange->start = start; 346 prange->last = last; 347 INIT_LIST_HEAD(&prange->list); 348 INIT_LIST_HEAD(&prange->update_list); 349 INIT_LIST_HEAD(&prange->svm_bo_list); 350 INIT_LIST_HEAD(&prange->deferred_list); 351 INIT_LIST_HEAD(&prange->child_list); 352 atomic_set(&prange->invalid, 0); 353 prange->validate_timestamp = 0; 354 prange->vram_pages = 0; 355 mutex_init(&prange->migrate_mutex); 356 mutex_init(&prange->lock); 357 358 if (p->xnack_enabled) 359 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 360 MAX_GPU_INSTANCE); 361 362 svm_range_set_default_attributes(svms, &prange->preferred_loc, 363 &prange->prefetch_loc, 364 &prange->granularity, &prange->flags); 365 366 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 367 368 return prange; 369 } 370 371 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 372 { 373 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 374 return false; 375 376 return true; 377 } 378 379 static void svm_range_bo_release(struct kref *kref) 380 { 381 struct svm_range_bo *svm_bo; 382 383 svm_bo = container_of(kref, struct svm_range_bo, kref); 384 pr_debug("svm_bo 0x%p\n", svm_bo); 385 386 spin_lock(&svm_bo->list_lock); 387 while (!list_empty(&svm_bo->range_list)) { 388 struct svm_range *prange = 389 list_first_entry(&svm_bo->range_list, 390 struct svm_range, svm_bo_list); 391 /* list_del_init tells a concurrent svm_range_vram_node_new when 392 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 393 */ 394 list_del_init(&prange->svm_bo_list); 395 spin_unlock(&svm_bo->list_lock); 396 397 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 398 prange->start, prange->last); 399 mutex_lock(&prange->lock); 400 prange->svm_bo = NULL; 401 /* prange should not hold vram page now */ 402 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 403 mutex_unlock(&prange->lock); 404 405 spin_lock(&svm_bo->list_lock); 406 } 407 spin_unlock(&svm_bo->list_lock); 408 409 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 410 struct kfd_process_device *pdd; 411 struct kfd_process *p; 412 struct mm_struct *mm; 413 414 mm = svm_bo->eviction_fence->mm; 415 /* 416 * The forked child process takes svm_bo device pages ref, svm_bo could be 417 * released after parent process is gone. 418 */ 419 p = kfd_lookup_process_by_mm(mm); 420 if (p) { 421 pdd = kfd_get_process_device_data(svm_bo->node, p); 422 if (pdd) 423 atomic64_sub(amdgpu_bo_size(svm_bo->bo), &pdd->vram_usage); 424 kfd_unref_process(p); 425 } 426 mmput(mm); 427 } 428 429 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) 430 /* We're not in the eviction worker. Signal the fence. */ 431 dma_fence_signal(&svm_bo->eviction_fence->base); 432 dma_fence_put(&svm_bo->eviction_fence->base); 433 amdgpu_bo_unref(&svm_bo->bo); 434 kfree(svm_bo); 435 } 436 437 static void svm_range_bo_wq_release(struct work_struct *work) 438 { 439 struct svm_range_bo *svm_bo; 440 441 svm_bo = container_of(work, struct svm_range_bo, release_work); 442 svm_range_bo_release(&svm_bo->kref); 443 } 444 445 static void svm_range_bo_release_async(struct kref *kref) 446 { 447 struct svm_range_bo *svm_bo; 448 449 svm_bo = container_of(kref, struct svm_range_bo, kref); 450 pr_debug("svm_bo 0x%p\n", svm_bo); 451 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 452 schedule_work(&svm_bo->release_work); 453 } 454 455 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 456 { 457 kref_put(&svm_bo->kref, svm_range_bo_release_async); 458 } 459 460 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 461 { 462 if (svm_bo) 463 kref_put(&svm_bo->kref, svm_range_bo_release); 464 } 465 466 static bool 467 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 468 { 469 mutex_lock(&prange->lock); 470 if (!prange->svm_bo) { 471 mutex_unlock(&prange->lock); 472 return false; 473 } 474 if (prange->ttm_res) { 475 /* We still have a reference, all is well */ 476 mutex_unlock(&prange->lock); 477 return true; 478 } 479 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 480 /* 481 * Migrate from GPU to GPU, remove range from source svm_bo->node 482 * range list, and return false to allocate svm_bo from destination 483 * node. 484 */ 485 if (prange->svm_bo->node != node) { 486 mutex_unlock(&prange->lock); 487 488 spin_lock(&prange->svm_bo->list_lock); 489 list_del_init(&prange->svm_bo_list); 490 spin_unlock(&prange->svm_bo->list_lock); 491 492 svm_range_bo_unref(prange->svm_bo); 493 return false; 494 } 495 if (READ_ONCE(prange->svm_bo->evicting)) { 496 struct dma_fence *f; 497 struct svm_range_bo *svm_bo; 498 /* The BO is getting evicted, 499 * we need to get a new one 500 */ 501 mutex_unlock(&prange->lock); 502 svm_bo = prange->svm_bo; 503 f = dma_fence_get(&svm_bo->eviction_fence->base); 504 svm_range_bo_unref(prange->svm_bo); 505 /* wait for the fence to avoid long spin-loop 506 * at list_empty_careful 507 */ 508 dma_fence_wait(f, false); 509 dma_fence_put(f); 510 } else { 511 /* The BO was still around and we got 512 * a new reference to it 513 */ 514 mutex_unlock(&prange->lock); 515 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 516 prange->svms, prange->start, prange->last); 517 518 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 519 return true; 520 } 521 522 } else { 523 mutex_unlock(&prange->lock); 524 } 525 526 /* We need a new svm_bo. Spin-loop to wait for concurrent 527 * svm_range_bo_release to finish removing this range from 528 * its range list and set prange->svm_bo to null. After this, 529 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 530 */ 531 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 532 cond_resched(); 533 534 return false; 535 } 536 537 static struct svm_range_bo *svm_range_bo_new(void) 538 { 539 struct svm_range_bo *svm_bo; 540 541 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL); 542 if (!svm_bo) 543 return NULL; 544 545 kref_init(&svm_bo->kref); 546 INIT_LIST_HEAD(&svm_bo->range_list); 547 spin_lock_init(&svm_bo->list_lock); 548 549 return svm_bo; 550 } 551 552 int 553 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 554 bool clear) 555 { 556 struct kfd_process_device *pdd; 557 struct amdgpu_bo_param bp; 558 struct svm_range_bo *svm_bo; 559 struct amdgpu_bo_user *ubo; 560 struct amdgpu_bo *bo; 561 struct kfd_process *p; 562 struct mm_struct *mm; 563 int r; 564 565 p = container_of(prange->svms, struct kfd_process, svms); 566 pr_debug("process pid: %d svms 0x%p [0x%lx 0x%lx]\n", 567 p->lead_thread->pid, prange->svms, 568 prange->start, prange->last); 569 570 if (svm_range_validate_svm_bo(node, prange)) 571 return 0; 572 573 svm_bo = svm_range_bo_new(); 574 if (!svm_bo) { 575 pr_debug("failed to alloc svm bo\n"); 576 return -ENOMEM; 577 } 578 mm = get_task_mm(p->lead_thread); 579 if (!mm) { 580 pr_debug("failed to get mm\n"); 581 kfree(svm_bo); 582 return -ESRCH; 583 } 584 svm_bo->node = node; 585 svm_bo->eviction_fence = 586 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 587 mm, 588 svm_bo); 589 mmput(mm); 590 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 591 svm_bo->evicting = 0; 592 memset(&bp, 0, sizeof(bp)); 593 bp.size = prange->npages * PAGE_SIZE; 594 bp.byte_align = PAGE_SIZE; 595 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 596 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 597 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 598 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 599 bp.type = ttm_bo_type_device; 600 bp.resv = NULL; 601 if (node->xcp) 602 bp.xcp_id_plus1 = node->xcp->id + 1; 603 604 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 605 if (r) { 606 pr_debug("failed %d to create bo\n", r); 607 goto create_bo_failed; 608 } 609 bo = &ubo->bo; 610 611 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 612 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 613 bp.xcp_id_plus1 - 1); 614 615 r = amdgpu_bo_reserve(bo, true); 616 if (r) { 617 pr_debug("failed %d to reserve bo\n", r); 618 goto reserve_bo_failed; 619 } 620 621 if (clear) { 622 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 623 if (r) { 624 pr_debug("failed %d to sync bo\n", r); 625 amdgpu_bo_unreserve(bo); 626 goto reserve_bo_failed; 627 } 628 } 629 630 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1); 631 if (r) { 632 pr_debug("failed %d to reserve bo\n", r); 633 amdgpu_bo_unreserve(bo); 634 goto reserve_bo_failed; 635 } 636 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 637 638 amdgpu_bo_unreserve(bo); 639 640 svm_bo->bo = bo; 641 prange->svm_bo = svm_bo; 642 prange->ttm_res = bo->tbo.resource; 643 prange->offset = 0; 644 645 spin_lock(&svm_bo->list_lock); 646 list_add(&prange->svm_bo_list, &svm_bo->range_list); 647 spin_unlock(&svm_bo->list_lock); 648 649 pdd = svm_range_get_pdd_by_node(prange, node); 650 if (pdd) 651 atomic64_add(amdgpu_bo_size(bo), &pdd->vram_usage); 652 653 return 0; 654 655 reserve_bo_failed: 656 amdgpu_bo_unref(&bo); 657 create_bo_failed: 658 dma_fence_put(&svm_bo->eviction_fence->base); 659 kfree(svm_bo); 660 prange->ttm_res = NULL; 661 662 return r; 663 } 664 665 void svm_range_vram_node_free(struct svm_range *prange) 666 { 667 /* serialize prange->svm_bo unref */ 668 mutex_lock(&prange->lock); 669 /* prange->svm_bo has not been unref */ 670 if (prange->ttm_res) { 671 prange->ttm_res = NULL; 672 mutex_unlock(&prange->lock); 673 svm_range_bo_unref(prange->svm_bo); 674 } else 675 mutex_unlock(&prange->lock); 676 } 677 678 struct kfd_node * 679 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 680 { 681 struct kfd_process *p; 682 struct kfd_process_device *pdd; 683 684 p = container_of(prange->svms, struct kfd_process, svms); 685 pdd = kfd_process_device_data_by_id(p, gpu_id); 686 if (!pdd) { 687 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 688 return NULL; 689 } 690 691 return pdd->dev; 692 } 693 694 struct kfd_process_device * 695 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 696 { 697 struct kfd_process *p; 698 699 p = container_of(prange->svms, struct kfd_process, svms); 700 701 return kfd_get_process_device_data(node, p); 702 } 703 704 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 705 { 706 struct ttm_operation_ctx ctx = { false, false }; 707 708 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 709 710 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 711 } 712 713 static int 714 svm_range_check_attr(struct kfd_process *p, 715 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 716 { 717 uint32_t i; 718 719 for (i = 0; i < nattr; i++) { 720 uint32_t val = attrs[i].value; 721 int gpuidx = MAX_GPU_INSTANCE; 722 723 switch (attrs[i].type) { 724 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 725 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 726 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 727 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 728 break; 729 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 730 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 731 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 732 break; 733 case KFD_IOCTL_SVM_ATTR_ACCESS: 734 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 735 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 736 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 737 break; 738 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 739 break; 740 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 741 break; 742 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 743 break; 744 default: 745 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 746 return -EINVAL; 747 } 748 749 if (gpuidx < 0) { 750 pr_debug("no GPU 0x%x found\n", val); 751 return -EINVAL; 752 } else if (gpuidx < MAX_GPU_INSTANCE && 753 !test_bit(gpuidx, p->svms.bitmap_supported)) { 754 pr_debug("GPU 0x%x not supported\n", val); 755 return -EINVAL; 756 } 757 } 758 759 return 0; 760 } 761 762 static void 763 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 764 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 765 bool *update_mapping) 766 { 767 uint32_t i; 768 int gpuidx; 769 770 for (i = 0; i < nattr; i++) { 771 switch (attrs[i].type) { 772 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 773 prange->preferred_loc = attrs[i].value; 774 break; 775 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 776 prange->prefetch_loc = attrs[i].value; 777 break; 778 case KFD_IOCTL_SVM_ATTR_ACCESS: 779 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 780 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 781 if (!p->xnack_enabled) 782 *update_mapping = true; 783 784 gpuidx = kfd_process_gpuidx_from_gpuid(p, 785 attrs[i].value); 786 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 787 bitmap_clear(prange->bitmap_access, gpuidx, 1); 788 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 789 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 790 bitmap_set(prange->bitmap_access, gpuidx, 1); 791 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 792 } else { 793 bitmap_clear(prange->bitmap_access, gpuidx, 1); 794 bitmap_set(prange->bitmap_aip, gpuidx, 1); 795 } 796 break; 797 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 798 *update_mapping = true; 799 prange->flags |= attrs[i].value; 800 break; 801 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 802 *update_mapping = true; 803 prange->flags &= ~attrs[i].value; 804 break; 805 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 806 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 807 break; 808 default: 809 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 810 } 811 } 812 } 813 814 static bool 815 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 816 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 817 { 818 uint32_t i; 819 int gpuidx; 820 821 for (i = 0; i < nattr; i++) { 822 switch (attrs[i].type) { 823 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 824 if (prange->preferred_loc != attrs[i].value) 825 return false; 826 break; 827 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 828 /* Prefetch should always trigger a migration even 829 * if the value of the attribute didn't change. 830 */ 831 return false; 832 case KFD_IOCTL_SVM_ATTR_ACCESS: 833 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 834 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 835 gpuidx = kfd_process_gpuidx_from_gpuid(p, 836 attrs[i].value); 837 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 838 if (test_bit(gpuidx, prange->bitmap_access) || 839 test_bit(gpuidx, prange->bitmap_aip)) 840 return false; 841 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 842 if (!test_bit(gpuidx, prange->bitmap_access)) 843 return false; 844 } else { 845 if (!test_bit(gpuidx, prange->bitmap_aip)) 846 return false; 847 } 848 break; 849 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 850 if ((prange->flags & attrs[i].value) != attrs[i].value) 851 return false; 852 break; 853 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 854 if ((prange->flags & attrs[i].value) != 0) 855 return false; 856 break; 857 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 858 if (prange->granularity != attrs[i].value) 859 return false; 860 break; 861 default: 862 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 863 } 864 } 865 866 return true; 867 } 868 869 /** 870 * svm_range_debug_dump - print all range information from svms 871 * @svms: svm range list header 872 * 873 * debug output svm range start, end, prefetch location from svms 874 * interval tree and link list 875 * 876 * Context: The caller must hold svms->lock 877 */ 878 static void svm_range_debug_dump(struct svm_range_list *svms) 879 { 880 struct interval_tree_node *node; 881 struct svm_range *prange; 882 883 pr_debug("dump svms 0x%p list\n", svms); 884 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 885 886 list_for_each_entry(prange, &svms->list, list) { 887 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 888 prange, prange->start, prange->npages, 889 prange->start + prange->npages - 1, 890 prange->actual_loc); 891 } 892 893 pr_debug("dump svms 0x%p interval tree\n", svms); 894 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 895 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 896 while (node) { 897 prange = container_of(node, struct svm_range, it_node); 898 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 899 prange, prange->start, prange->npages, 900 prange->start + prange->npages - 1, 901 prange->actual_loc); 902 node = interval_tree_iter_next(node, 0, ~0ULL); 903 } 904 } 905 906 static void * 907 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 908 uint64_t offset, uint64_t *vram_pages) 909 { 910 unsigned char *src = (unsigned char *)psrc + offset; 911 unsigned char *dst; 912 uint64_t i; 913 914 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 915 if (!dst) 916 return NULL; 917 918 if (!vram_pages) { 919 memcpy(dst, src, num_elements * size); 920 return (void *)dst; 921 } 922 923 *vram_pages = 0; 924 for (i = 0; i < num_elements; i++) { 925 dma_addr_t *temp; 926 temp = (dma_addr_t *)dst + i; 927 *temp = *((dma_addr_t *)src + i); 928 if (*temp&SVM_RANGE_VRAM_DOMAIN) 929 (*vram_pages)++; 930 } 931 932 return (void *)dst; 933 } 934 935 static int 936 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 937 { 938 int i; 939 940 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 941 if (!src->dma_addr[i]) 942 continue; 943 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 944 sizeof(*src->dma_addr[i]), src->npages, 0, NULL); 945 if (!dst->dma_addr[i]) 946 return -ENOMEM; 947 } 948 949 return 0; 950 } 951 952 static int 953 svm_range_split_array(void *ppnew, void *ppold, size_t size, 954 uint64_t old_start, uint64_t old_n, 955 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages) 956 { 957 unsigned char *new, *old, *pold; 958 uint64_t d; 959 960 if (!ppold) 961 return 0; 962 pold = *(unsigned char **)ppold; 963 if (!pold) 964 return 0; 965 966 d = (new_start - old_start) * size; 967 /* get dma addr array for new range and calculte its vram page number */ 968 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages); 969 if (!new) 970 return -ENOMEM; 971 d = (new_start == old_start) ? new_n * size : 0; 972 old = svm_range_copy_array(pold, size, old_n, d, NULL); 973 if (!old) { 974 kvfree(new); 975 return -ENOMEM; 976 } 977 kvfree(pold); 978 *(void **)ppold = old; 979 *(void **)ppnew = new; 980 981 return 0; 982 } 983 984 static int 985 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 986 uint64_t start, uint64_t last) 987 { 988 uint64_t npages = last - start + 1; 989 int i, r; 990 991 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 992 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 993 sizeof(*old->dma_addr[i]), old->start, 994 npages, new->start, new->npages, 995 old->actual_loc ? &new->vram_pages : NULL); 996 if (r) 997 return r; 998 } 999 if (old->actual_loc) 1000 old->vram_pages -= new->vram_pages; 1001 1002 return 0; 1003 } 1004 1005 static int 1006 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 1007 uint64_t start, uint64_t last) 1008 { 1009 uint64_t npages = last - start + 1; 1010 1011 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 1012 new->svms, new, new->start, start, last); 1013 1014 if (new->start == old->start) { 1015 new->offset = old->offset; 1016 old->offset += new->npages; 1017 } else { 1018 new->offset = old->offset + npages; 1019 } 1020 1021 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1022 new->ttm_res = old->ttm_res; 1023 1024 spin_lock(&new->svm_bo->list_lock); 1025 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1026 spin_unlock(&new->svm_bo->list_lock); 1027 1028 return 0; 1029 } 1030 1031 /** 1032 * svm_range_split_adjust - split range and adjust 1033 * 1034 * @new: new range 1035 * @old: the old range 1036 * @start: the old range adjust to start address in pages 1037 * @last: the old range adjust to last address in pages 1038 * 1039 * Copy system memory dma_addr or vram ttm_res in old range to new 1040 * range from new_start up to size new->npages, the remaining old range is from 1041 * start to last 1042 * 1043 * Return: 1044 * 0 - OK, -ENOMEM - out of memory 1045 */ 1046 static int 1047 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1048 uint64_t start, uint64_t last) 1049 { 1050 int r; 1051 1052 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1053 new->svms, new->start, old->start, old->last, start, last); 1054 1055 if (new->start < old->start || 1056 new->last > old->last) { 1057 WARN_ONCE(1, "invalid new range start or last\n"); 1058 return -EINVAL; 1059 } 1060 1061 r = svm_range_split_pages(new, old, start, last); 1062 if (r) 1063 return r; 1064 1065 if (old->actual_loc && old->ttm_res) { 1066 r = svm_range_split_nodes(new, old, start, last); 1067 if (r) 1068 return r; 1069 } 1070 1071 old->npages = last - start + 1; 1072 old->start = start; 1073 old->last = last; 1074 new->flags = old->flags; 1075 new->preferred_loc = old->preferred_loc; 1076 new->prefetch_loc = old->prefetch_loc; 1077 new->actual_loc = old->actual_loc; 1078 new->granularity = old->granularity; 1079 new->mapped_to_gpu = old->mapped_to_gpu; 1080 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1081 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1082 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1083 1084 return 0; 1085 } 1086 1087 /** 1088 * svm_range_split - split a range in 2 ranges 1089 * 1090 * @prange: the svm range to split 1091 * @start: the remaining range start address in pages 1092 * @last: the remaining range last address in pages 1093 * @new: the result new range generated 1094 * 1095 * Two cases only: 1096 * case 1: if start == prange->start 1097 * prange ==> prange[start, last] 1098 * new range [last + 1, prange->last] 1099 * 1100 * case 2: if last == prange->last 1101 * prange ==> prange[start, last] 1102 * new range [prange->start, start - 1] 1103 * 1104 * Return: 1105 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1106 */ 1107 static int 1108 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1109 struct svm_range **new) 1110 { 1111 uint64_t old_start = prange->start; 1112 uint64_t old_last = prange->last; 1113 struct svm_range_list *svms; 1114 int r = 0; 1115 1116 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1117 old_start, old_last, start, last); 1118 1119 if (old_start != start && old_last != last) 1120 return -EINVAL; 1121 if (start < old_start || last > old_last) 1122 return -EINVAL; 1123 1124 svms = prange->svms; 1125 if (old_start == start) 1126 *new = svm_range_new(svms, last + 1, old_last, false); 1127 else 1128 *new = svm_range_new(svms, old_start, start - 1, false); 1129 if (!*new) 1130 return -ENOMEM; 1131 1132 r = svm_range_split_adjust(*new, prange, start, last); 1133 if (r) { 1134 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1135 r, old_start, old_last, start, last); 1136 svm_range_free(*new, false); 1137 *new = NULL; 1138 } 1139 1140 return r; 1141 } 1142 1143 static int 1144 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1145 struct list_head *insert_list, struct list_head *remap_list) 1146 { 1147 struct svm_range *tail = NULL; 1148 int r = svm_range_split(prange, prange->start, new_last, &tail); 1149 1150 if (!r) { 1151 list_add(&tail->list, insert_list); 1152 if (!IS_ALIGNED(new_last + 1, 1UL << prange->granularity)) 1153 list_add(&tail->update_list, remap_list); 1154 } 1155 return r; 1156 } 1157 1158 static int 1159 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1160 struct list_head *insert_list, struct list_head *remap_list) 1161 { 1162 struct svm_range *head = NULL; 1163 int r = svm_range_split(prange, new_start, prange->last, &head); 1164 1165 if (!r) { 1166 list_add(&head->list, insert_list); 1167 if (!IS_ALIGNED(new_start, 1UL << prange->granularity)) 1168 list_add(&head->update_list, remap_list); 1169 } 1170 return r; 1171 } 1172 1173 static void 1174 svm_range_add_child(struct svm_range *prange, struct svm_range *pchild, enum svm_work_list_ops op) 1175 { 1176 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1177 pchild, pchild->start, pchild->last, prange, op); 1178 1179 pchild->work_item.mm = NULL; 1180 pchild->work_item.op = op; 1181 list_add_tail(&pchild->child_list, &prange->child_list); 1182 } 1183 1184 static bool 1185 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1186 { 1187 return (node_a->adev == node_b->adev || 1188 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1189 } 1190 1191 static uint64_t 1192 svm_range_get_pte_flags(struct kfd_node *node, struct amdgpu_vm *vm, 1193 struct svm_range *prange, int domain) 1194 { 1195 struct kfd_node *bo_node; 1196 uint32_t flags = prange->flags; 1197 uint32_t mapping_flags = 0; 1198 uint32_t gc_ip_version = KFD_GC_VERSION(node); 1199 uint64_t pte_flags; 1200 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1201 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1202 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1203 unsigned int mtype_local; 1204 1205 if (domain == SVM_RANGE_VRAM_DOMAIN) 1206 bo_node = prange->svm_bo->node; 1207 1208 switch (gc_ip_version) { 1209 case IP_VERSION(9, 4, 1): 1210 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1211 if (bo_node == node) { 1212 mapping_flags |= coherent ? 1213 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1214 } else { 1215 mapping_flags |= coherent ? 1216 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1217 if (svm_nodes_in_same_hive(node, bo_node)) 1218 snoop = true; 1219 } 1220 } else { 1221 mapping_flags |= coherent ? 1222 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1223 } 1224 break; 1225 case IP_VERSION(9, 4, 2): 1226 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1227 if (bo_node == node) { 1228 mapping_flags |= coherent ? 1229 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1230 if (node->adev->gmc.xgmi.connected_to_cpu) 1231 snoop = true; 1232 } else { 1233 mapping_flags |= coherent ? 1234 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1235 if (svm_nodes_in_same_hive(node, bo_node)) 1236 snoop = true; 1237 } 1238 } else { 1239 mapping_flags |= coherent ? 1240 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1241 } 1242 break; 1243 case IP_VERSION(9, 4, 3): 1244 case IP_VERSION(9, 4, 4): 1245 case IP_VERSION(9, 5, 0): 1246 if (ext_coherent) 1247 mtype_local = AMDGPU_VM_MTYPE_CC; 1248 else 1249 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1250 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1251 snoop = true; 1252 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1253 /* local HBM region close to partition */ 1254 if (bo_node->adev == node->adev && 1255 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1256 mapping_flags |= mtype_local; 1257 /* local HBM region far from partition or remote XGMI GPU 1258 * with regular system scope coherence 1259 */ 1260 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1261 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1262 /* PCIe P2P on GPUs pre-9.5.0 */ 1263 else if (gc_ip_version < IP_VERSION(9, 5, 0) && 1264 !svm_nodes_in_same_hive(bo_node, node)) 1265 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1266 /* Other remote memory */ 1267 else 1268 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1269 /* system memory accessed by the APU */ 1270 } else if (node->adev->flags & AMD_IS_APU) { 1271 /* On NUMA systems, locality is determined per-page 1272 * in amdgpu_gmc_override_vm_pte_flags 1273 */ 1274 if (num_possible_nodes() <= 1) 1275 mapping_flags |= mtype_local; 1276 else 1277 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1278 /* system memory accessed by the dGPU */ 1279 } else { 1280 if (gc_ip_version < IP_VERSION(9, 5, 0) || ext_coherent) 1281 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1282 else 1283 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1284 } 1285 break; 1286 case IP_VERSION(12, 0, 0): 1287 case IP_VERSION(12, 0, 1): 1288 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1289 break; 1290 default: 1291 mapping_flags |= coherent ? 1292 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1293 } 1294 1295 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1296 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1297 1298 pte_flags = AMDGPU_PTE_VALID; 1299 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1300 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1301 if (gc_ip_version >= IP_VERSION(12, 0, 0)) 1302 pte_flags |= AMDGPU_PTE_IS_PTE; 1303 1304 amdgpu_gmc_get_vm_pte(node->adev, vm, NULL, mapping_flags, &pte_flags); 1305 pte_flags |= AMDGPU_PTE_READABLE; 1306 if (!(flags & KFD_IOCTL_SVM_FLAG_GPU_RO)) 1307 pte_flags |= AMDGPU_PTE_WRITEABLE; 1308 return pte_flags; 1309 } 1310 1311 static int 1312 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1313 uint64_t start, uint64_t last, 1314 struct dma_fence **fence) 1315 { 1316 uint64_t init_pte_value = 0; 1317 1318 pr_debug("[0x%llx 0x%llx]\n", start, last); 1319 1320 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, start, 1321 last, init_pte_value, 0, 0, NULL, NULL, 1322 fence); 1323 } 1324 1325 static int 1326 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1327 unsigned long last, uint32_t trigger) 1328 { 1329 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1330 struct kfd_process_device *pdd; 1331 struct dma_fence *fence = NULL; 1332 struct kfd_process *p; 1333 uint32_t gpuidx; 1334 int r = 0; 1335 1336 if (!prange->mapped_to_gpu) { 1337 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1338 prange, prange->start, prange->last); 1339 return 0; 1340 } 1341 1342 if (prange->start == start && prange->last == last) { 1343 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1344 prange->mapped_to_gpu = false; 1345 } 1346 1347 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 1348 MAX_GPU_INSTANCE); 1349 p = container_of(prange->svms, struct kfd_process, svms); 1350 1351 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1352 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1353 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1354 if (!pdd) { 1355 pr_debug("failed to find device idx %d\n", gpuidx); 1356 return -EINVAL; 1357 } 1358 1359 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1360 start, last, trigger); 1361 1362 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1363 drm_priv_to_vm(pdd->drm_priv), 1364 start, last, &fence); 1365 if (r) 1366 break; 1367 1368 if (fence) { 1369 r = dma_fence_wait(fence, false); 1370 dma_fence_put(fence); 1371 fence = NULL; 1372 if (r) 1373 break; 1374 } 1375 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1376 } 1377 1378 return r; 1379 } 1380 1381 static int 1382 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1383 unsigned long offset, unsigned long npages, bool readonly, 1384 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1385 struct dma_fence **fence, bool flush_tlb) 1386 { 1387 struct amdgpu_device *adev = pdd->dev->adev; 1388 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1389 uint64_t pte_flags; 1390 unsigned long last_start; 1391 int last_domain; 1392 int r = 0; 1393 int64_t i, j; 1394 1395 last_start = prange->start + offset; 1396 1397 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1398 last_start, last_start + npages - 1, readonly); 1399 1400 for (i = offset; i < offset + npages; i++) { 1401 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1402 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1403 1404 /* Collect all pages in the same address range and memory domain 1405 * that can be mapped with a single call to update mapping. 1406 */ 1407 if (i < offset + npages - 1 && 1408 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1409 continue; 1410 1411 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1412 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1413 1414 pte_flags = svm_range_get_pte_flags(pdd->dev, vm, prange, last_domain); 1415 if (readonly) 1416 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1417 1418 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n", 1419 prange->svms, last_start, prange->start + i, 1420 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1421 pte_flags); 1422 1423 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1424 * different memory partition based on fpfn/lpfn, we should use 1425 * same vm_manager.vram_base_offset regardless memory partition. 1426 */ 1427 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1428 NULL, last_start, prange->start + i, 1429 pte_flags, 1430 (last_start - prange->start) << PAGE_SHIFT, 1431 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1432 NULL, dma_addr, &vm->last_update); 1433 1434 for (j = last_start - prange->start; j <= i; j++) 1435 dma_addr[j] |= last_domain; 1436 1437 if (r) { 1438 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1439 goto out; 1440 } 1441 last_start = prange->start + i + 1; 1442 } 1443 1444 r = amdgpu_vm_update_pdes(adev, vm, false); 1445 if (r) { 1446 pr_debug("failed %d to update directories 0x%lx\n", r, 1447 prange->start); 1448 goto out; 1449 } 1450 1451 if (fence) 1452 *fence = dma_fence_get(vm->last_update); 1453 1454 out: 1455 return r; 1456 } 1457 1458 static int 1459 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1460 unsigned long npages, bool readonly, 1461 unsigned long *bitmap, bool wait, bool flush_tlb) 1462 { 1463 struct kfd_process_device *pdd; 1464 struct amdgpu_device *bo_adev = NULL; 1465 struct kfd_process *p; 1466 struct dma_fence *fence = NULL; 1467 uint32_t gpuidx; 1468 int r = 0; 1469 1470 if (prange->svm_bo && prange->ttm_res) 1471 bo_adev = prange->svm_bo->node->adev; 1472 1473 p = container_of(prange->svms, struct kfd_process, svms); 1474 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1475 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1476 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1477 if (!pdd) { 1478 pr_debug("failed to find device idx %d\n", gpuidx); 1479 return -EINVAL; 1480 } 1481 1482 pdd = kfd_bind_process_to_device(pdd->dev, p); 1483 if (IS_ERR(pdd)) 1484 return -EINVAL; 1485 1486 if (bo_adev && pdd->dev->adev != bo_adev && 1487 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1488 pr_debug("cannot map to device idx %d\n", gpuidx); 1489 continue; 1490 } 1491 1492 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1493 prange->dma_addr[gpuidx], 1494 bo_adev, wait ? &fence : NULL, 1495 flush_tlb); 1496 if (r) 1497 break; 1498 1499 if (fence) { 1500 r = dma_fence_wait(fence, false); 1501 dma_fence_put(fence); 1502 fence = NULL; 1503 if (r) { 1504 pr_debug("failed %d to dma fence wait\n", r); 1505 break; 1506 } 1507 } 1508 1509 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1510 } 1511 1512 return r; 1513 } 1514 1515 struct svm_validate_context { 1516 struct kfd_process *process; 1517 struct svm_range *prange; 1518 bool intr; 1519 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1520 struct drm_exec exec; 1521 }; 1522 1523 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1524 { 1525 struct kfd_process_device *pdd; 1526 struct amdgpu_vm *vm; 1527 uint32_t gpuidx; 1528 int r; 1529 1530 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1531 drm_exec_until_all_locked(&ctx->exec) { 1532 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1533 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1534 if (!pdd) { 1535 pr_debug("failed to find device idx %d\n", gpuidx); 1536 r = -EINVAL; 1537 goto unreserve_out; 1538 } 1539 vm = drm_priv_to_vm(pdd->drm_priv); 1540 1541 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1542 drm_exec_retry_on_contention(&ctx->exec); 1543 if (unlikely(r)) { 1544 pr_debug("failed %d to reserve bo\n", r); 1545 goto unreserve_out; 1546 } 1547 } 1548 } 1549 1550 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1551 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1552 if (!pdd) { 1553 pr_debug("failed to find device idx %d\n", gpuidx); 1554 r = -EINVAL; 1555 goto unreserve_out; 1556 } 1557 1558 r = amdgpu_vm_validate(pdd->dev->adev, 1559 drm_priv_to_vm(pdd->drm_priv), NULL, 1560 svm_range_bo_validate, NULL); 1561 if (r) { 1562 pr_debug("failed %d validate pt bos\n", r); 1563 goto unreserve_out; 1564 } 1565 } 1566 1567 return 0; 1568 1569 unreserve_out: 1570 drm_exec_fini(&ctx->exec); 1571 return r; 1572 } 1573 1574 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1575 { 1576 drm_exec_fini(&ctx->exec); 1577 } 1578 1579 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1580 { 1581 struct kfd_process_device *pdd; 1582 1583 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1584 if (!pdd) 1585 return NULL; 1586 1587 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1588 } 1589 1590 /* 1591 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1592 * 1593 * To prevent concurrent destruction or change of range attributes, the 1594 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1595 * because that would block concurrent evictions and lead to deadlocks. To 1596 * serialize concurrent migrations or validations of the same range, the 1597 * prange->migrate_mutex must be held. 1598 * 1599 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1600 * eviction fence. 1601 * 1602 * The following sequence ensures race-free validation and GPU mapping: 1603 * 1604 * 1. Reserve page table (and SVM BO if range is in VRAM) 1605 * 2. hmm_range_fault to get page addresses (if system memory) 1606 * 3. DMA-map pages (if system memory) 1607 * 4-a. Take notifier lock 1608 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1609 * 4-c. Check that the range was not split or otherwise invalidated 1610 * 4-d. Update GPU page table 1611 * 4.e. Release notifier lock 1612 * 5. Release page table (and SVM BO) reservation 1613 */ 1614 static int svm_range_validate_and_map(struct mm_struct *mm, 1615 unsigned long map_start, unsigned long map_last, 1616 struct svm_range *prange, int32_t gpuidx, 1617 bool intr, bool wait, bool flush_tlb) 1618 { 1619 struct svm_validate_context *ctx; 1620 unsigned long start, end, addr; 1621 struct kfd_process *p; 1622 void *owner; 1623 int32_t idx; 1624 int r = 0; 1625 1626 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL); 1627 if (!ctx) 1628 return -ENOMEM; 1629 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1630 ctx->prange = prange; 1631 ctx->intr = intr; 1632 1633 if (gpuidx < MAX_GPU_INSTANCE) { 1634 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1635 bitmap_set(ctx->bitmap, gpuidx, 1); 1636 } else if (ctx->process->xnack_enabled) { 1637 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1638 1639 /* If prefetch range to GPU, or GPU retry fault migrate range to 1640 * GPU, which has ACCESS attribute to the range, create mapping 1641 * on that GPU. 1642 */ 1643 if (prange->actual_loc) { 1644 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1645 prange->actual_loc); 1646 if (gpuidx < 0) { 1647 WARN_ONCE(1, "failed get device by id 0x%x\n", 1648 prange->actual_loc); 1649 r = -EINVAL; 1650 goto free_ctx; 1651 } 1652 if (test_bit(gpuidx, prange->bitmap_access)) 1653 bitmap_set(ctx->bitmap, gpuidx, 1); 1654 } 1655 1656 /* 1657 * If prange is already mapped or with always mapped flag, 1658 * update mapping on GPUs with ACCESS attribute 1659 */ 1660 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1661 if (prange->mapped_to_gpu || 1662 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED) 1663 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1664 } 1665 } else { 1666 bitmap_or(ctx->bitmap, prange->bitmap_access, 1667 prange->bitmap_aip, MAX_GPU_INSTANCE); 1668 } 1669 1670 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1671 r = 0; 1672 goto free_ctx; 1673 } 1674 1675 if (prange->actual_loc && !prange->ttm_res) { 1676 /* This should never happen. actual_loc gets set by 1677 * svm_migrate_ram_to_vram after allocating a BO. 1678 */ 1679 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1680 r = -EINVAL; 1681 goto free_ctx; 1682 } 1683 1684 r = svm_range_reserve_bos(ctx, intr); 1685 if (r) 1686 goto free_ctx; 1687 1688 p = container_of(prange->svms, struct kfd_process, svms); 1689 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1690 MAX_GPU_INSTANCE)); 1691 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1692 if (kfd_svm_page_owner(p, idx) != owner) { 1693 owner = NULL; 1694 break; 1695 } 1696 } 1697 1698 start = map_start << PAGE_SHIFT; 1699 end = (map_last + 1) << PAGE_SHIFT; 1700 for (addr = start; !r && addr < end; ) { 1701 struct hmm_range *hmm_range = NULL; 1702 unsigned long map_start_vma; 1703 unsigned long map_last_vma; 1704 struct vm_area_struct *vma; 1705 unsigned long next = 0; 1706 unsigned long offset; 1707 unsigned long npages; 1708 bool readonly; 1709 1710 vma = vma_lookup(mm, addr); 1711 if (vma) { 1712 readonly = !(vma->vm_flags & VM_WRITE); 1713 1714 next = min(vma->vm_end, end); 1715 npages = (next - addr) >> PAGE_SHIFT; 1716 WRITE_ONCE(p->svms.faulting_task, current); 1717 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1718 readonly, owner, NULL, 1719 &hmm_range); 1720 WRITE_ONCE(p->svms.faulting_task, NULL); 1721 if (r) 1722 pr_debug("failed %d to get svm range pages\n", r); 1723 } else { 1724 r = -EFAULT; 1725 } 1726 1727 if (!r) { 1728 offset = (addr >> PAGE_SHIFT) - prange->start; 1729 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1730 hmm_range->hmm_pfns); 1731 if (r) 1732 pr_debug("failed %d to dma map range\n", r); 1733 } 1734 1735 svm_range_lock(prange); 1736 1737 /* Free backing memory of hmm_range if it was initialized 1738 * Overrride return value to TRY AGAIN only if prior returns 1739 * were successful 1740 */ 1741 if (hmm_range && amdgpu_hmm_range_get_pages_done(hmm_range) && !r) { 1742 pr_debug("hmm update the range, need validate again\n"); 1743 r = -EAGAIN; 1744 } 1745 1746 if (!r && !list_empty(&prange->child_list)) { 1747 pr_debug("range split by unmap in parallel, validate again\n"); 1748 r = -EAGAIN; 1749 } 1750 1751 if (!r) { 1752 map_start_vma = max(map_start, prange->start + offset); 1753 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1754 if (map_start_vma <= map_last_vma) { 1755 offset = map_start_vma - prange->start; 1756 npages = map_last_vma - map_start_vma + 1; 1757 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1758 ctx->bitmap, wait, flush_tlb); 1759 } 1760 } 1761 1762 if (!r && next == end) 1763 prange->mapped_to_gpu = true; 1764 1765 svm_range_unlock(prange); 1766 1767 addr = next; 1768 } 1769 1770 svm_range_unreserve_bos(ctx); 1771 if (!r) 1772 prange->validate_timestamp = ktime_get_boottime(); 1773 1774 free_ctx: 1775 kfree(ctx); 1776 1777 return r; 1778 } 1779 1780 /** 1781 * svm_range_list_lock_and_flush_work - flush pending deferred work 1782 * 1783 * @svms: the svm range list 1784 * @mm: the mm structure 1785 * 1786 * Context: Returns with mmap write lock held, pending deferred work flushed 1787 * 1788 */ 1789 void 1790 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1791 struct mm_struct *mm) 1792 { 1793 retry_flush_work: 1794 flush_work(&svms->deferred_list_work); 1795 mmap_write_lock(mm); 1796 1797 if (list_empty(&svms->deferred_range_list)) 1798 return; 1799 mmap_write_unlock(mm); 1800 pr_debug("retry flush\n"); 1801 goto retry_flush_work; 1802 } 1803 1804 static void svm_range_restore_work(struct work_struct *work) 1805 { 1806 struct delayed_work *dwork = to_delayed_work(work); 1807 struct amdkfd_process_info *process_info; 1808 struct svm_range_list *svms; 1809 struct svm_range *prange; 1810 struct kfd_process *p; 1811 struct mm_struct *mm; 1812 int evicted_ranges; 1813 int invalid; 1814 int r; 1815 1816 svms = container_of(dwork, struct svm_range_list, restore_work); 1817 evicted_ranges = atomic_read(&svms->evicted_ranges); 1818 if (!evicted_ranges) 1819 return; 1820 1821 pr_debug("restore svm ranges\n"); 1822 1823 p = container_of(svms, struct kfd_process, svms); 1824 process_info = p->kgd_process_info; 1825 1826 /* Keep mm reference when svm_range_validate_and_map ranges */ 1827 mm = get_task_mm(p->lead_thread); 1828 if (!mm) { 1829 pr_debug("svms 0x%p process mm gone\n", svms); 1830 return; 1831 } 1832 1833 mutex_lock(&process_info->lock); 1834 svm_range_list_lock_and_flush_work(svms, mm); 1835 mutex_lock(&svms->lock); 1836 1837 evicted_ranges = atomic_read(&svms->evicted_ranges); 1838 1839 list_for_each_entry(prange, &svms->list, list) { 1840 invalid = atomic_read(&prange->invalid); 1841 if (!invalid) 1842 continue; 1843 1844 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1845 prange->svms, prange, prange->start, prange->last, 1846 invalid); 1847 1848 /* 1849 * If range is migrating, wait for migration is done. 1850 */ 1851 mutex_lock(&prange->migrate_mutex); 1852 1853 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1854 MAX_GPU_INSTANCE, false, true, false); 1855 if (r) 1856 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1857 prange->start); 1858 1859 mutex_unlock(&prange->migrate_mutex); 1860 if (r) 1861 goto out_reschedule; 1862 1863 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1864 goto out_reschedule; 1865 } 1866 1867 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1868 evicted_ranges) 1869 goto out_reschedule; 1870 1871 evicted_ranges = 0; 1872 1873 r = kgd2kfd_resume_mm(mm); 1874 if (r) { 1875 /* No recovery from this failure. Probably the CP is 1876 * hanging. No point trying again. 1877 */ 1878 pr_debug("failed %d to resume KFD\n", r); 1879 } 1880 1881 pr_debug("restore svm ranges successfully\n"); 1882 1883 out_reschedule: 1884 mutex_unlock(&svms->lock); 1885 mmap_write_unlock(mm); 1886 mutex_unlock(&process_info->lock); 1887 1888 /* If validation failed, reschedule another attempt */ 1889 if (evicted_ranges) { 1890 pr_debug("reschedule to restore svm range\n"); 1891 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1892 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1893 1894 kfd_smi_event_queue_restore_rescheduled(mm); 1895 } 1896 mmput(mm); 1897 } 1898 1899 /** 1900 * svm_range_evict - evict svm range 1901 * @prange: svm range structure 1902 * @mm: current process mm_struct 1903 * @start: starting process queue number 1904 * @last: last process queue number 1905 * @event: mmu notifier event when range is evicted or migrated 1906 * 1907 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1908 * return to let CPU evict the buffer and proceed CPU pagetable update. 1909 * 1910 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1911 * If invalidation happens while restore work is running, restore work will 1912 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1913 * the queues. 1914 */ 1915 static int 1916 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 1917 unsigned long start, unsigned long last, 1918 enum mmu_notifier_event event) 1919 { 1920 struct svm_range_list *svms = prange->svms; 1921 struct svm_range *pchild; 1922 struct kfd_process *p; 1923 int r = 0; 1924 1925 p = container_of(svms, struct kfd_process, svms); 1926 1927 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 1928 svms, prange->start, prange->last, start, last); 1929 1930 if (!p->xnack_enabled || 1931 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 1932 int evicted_ranges; 1933 bool mapped = prange->mapped_to_gpu; 1934 1935 list_for_each_entry(pchild, &prange->child_list, child_list) { 1936 if (!pchild->mapped_to_gpu) 1937 continue; 1938 mapped = true; 1939 mutex_lock_nested(&pchild->lock, 1); 1940 if (pchild->start <= last && pchild->last >= start) { 1941 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 1942 pchild->start, pchild->last); 1943 atomic_inc(&pchild->invalid); 1944 } 1945 mutex_unlock(&pchild->lock); 1946 } 1947 1948 if (!mapped) 1949 return r; 1950 1951 if (prange->start <= last && prange->last >= start) 1952 atomic_inc(&prange->invalid); 1953 1954 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 1955 if (evicted_ranges != 1) 1956 return r; 1957 1958 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 1959 prange->svms, prange->start, prange->last); 1960 1961 /* First eviction, stop the queues */ 1962 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 1963 if (r) 1964 pr_debug("failed to quiesce KFD\n"); 1965 1966 pr_debug("schedule to restore svm %p ranges\n", svms); 1967 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1968 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1969 } else { 1970 unsigned long s, l; 1971 uint32_t trigger; 1972 1973 if (event == MMU_NOTIFY_MIGRATE) 1974 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 1975 else 1976 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 1977 1978 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 1979 prange->svms, start, last); 1980 list_for_each_entry(pchild, &prange->child_list, child_list) { 1981 mutex_lock_nested(&pchild->lock, 1); 1982 s = max(start, pchild->start); 1983 l = min(last, pchild->last); 1984 if (l >= s) 1985 svm_range_unmap_from_gpus(pchild, s, l, trigger); 1986 mutex_unlock(&pchild->lock); 1987 } 1988 s = max(start, prange->start); 1989 l = min(last, prange->last); 1990 if (l >= s) 1991 svm_range_unmap_from_gpus(prange, s, l, trigger); 1992 } 1993 1994 return r; 1995 } 1996 1997 static struct svm_range *svm_range_clone(struct svm_range *old) 1998 { 1999 struct svm_range *new; 2000 2001 new = svm_range_new(old->svms, old->start, old->last, false); 2002 if (!new) 2003 return NULL; 2004 if (svm_range_copy_dma_addrs(new, old)) { 2005 svm_range_free(new, false); 2006 return NULL; 2007 } 2008 if (old->svm_bo) { 2009 new->ttm_res = old->ttm_res; 2010 new->offset = old->offset; 2011 new->svm_bo = svm_range_bo_ref(old->svm_bo); 2012 spin_lock(&new->svm_bo->list_lock); 2013 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 2014 spin_unlock(&new->svm_bo->list_lock); 2015 } 2016 new->flags = old->flags; 2017 new->preferred_loc = old->preferred_loc; 2018 new->prefetch_loc = old->prefetch_loc; 2019 new->actual_loc = old->actual_loc; 2020 new->granularity = old->granularity; 2021 new->mapped_to_gpu = old->mapped_to_gpu; 2022 new->vram_pages = old->vram_pages; 2023 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 2024 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 2025 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 2026 2027 return new; 2028 } 2029 2030 void svm_range_set_max_pages(struct amdgpu_device *adev) 2031 { 2032 uint64_t max_pages; 2033 uint64_t pages, _pages; 2034 uint64_t min_pages = 0; 2035 int i, id; 2036 2037 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2038 if (adev->kfd.dev->nodes[i]->xcp) 2039 id = adev->kfd.dev->nodes[i]->xcp->id; 2040 else 2041 id = -1; 2042 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2043 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2044 pages = rounddown_pow_of_two(pages); 2045 min_pages = min_not_zero(min_pages, pages); 2046 } 2047 2048 do { 2049 max_pages = READ_ONCE(max_svm_range_pages); 2050 _pages = min_not_zero(max_pages, min_pages); 2051 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2052 } 2053 2054 static int 2055 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2056 uint64_t max_pages, struct list_head *insert_list, 2057 struct list_head *update_list) 2058 { 2059 struct svm_range *prange; 2060 uint64_t l; 2061 2062 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2063 max_pages, start, last); 2064 2065 while (last >= start) { 2066 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2067 2068 prange = svm_range_new(svms, start, l, true); 2069 if (!prange) 2070 return -ENOMEM; 2071 list_add(&prange->list, insert_list); 2072 list_add(&prange->update_list, update_list); 2073 2074 start = l + 1; 2075 } 2076 return 0; 2077 } 2078 2079 /** 2080 * svm_range_add - add svm range and handle overlap 2081 * @p: the range add to this process svms 2082 * @start: page size aligned 2083 * @size: page size aligned 2084 * @nattr: number of attributes 2085 * @attrs: array of attributes 2086 * @update_list: output, the ranges need validate and update GPU mapping 2087 * @insert_list: output, the ranges need insert to svms 2088 * @remove_list: output, the ranges are replaced and need remove from svms 2089 * @remap_list: output, remap unaligned svm ranges 2090 * 2091 * Check if the virtual address range has overlap with any existing ranges, 2092 * split partly overlapping ranges and add new ranges in the gaps. All changes 2093 * should be applied to the range_list and interval tree transactionally. If 2094 * any range split or allocation fails, the entire update fails. Therefore any 2095 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2096 * unchanged. 2097 * 2098 * If the transaction succeeds, the caller can update and insert clones and 2099 * new ranges, then free the originals. 2100 * 2101 * Otherwise the caller can free the clones and new ranges, while the old 2102 * svm_ranges remain unchanged. 2103 * 2104 * Context: Process context, caller must hold svms->lock 2105 * 2106 * Return: 2107 * 0 - OK, otherwise error code 2108 */ 2109 static int 2110 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2111 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2112 struct list_head *update_list, struct list_head *insert_list, 2113 struct list_head *remove_list, struct list_head *remap_list) 2114 { 2115 unsigned long last = start + size - 1UL; 2116 struct svm_range_list *svms = &p->svms; 2117 struct interval_tree_node *node; 2118 struct svm_range *prange; 2119 struct svm_range *tmp; 2120 struct list_head new_list; 2121 int r = 0; 2122 2123 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2124 2125 INIT_LIST_HEAD(update_list); 2126 INIT_LIST_HEAD(insert_list); 2127 INIT_LIST_HEAD(remove_list); 2128 INIT_LIST_HEAD(&new_list); 2129 INIT_LIST_HEAD(remap_list); 2130 2131 node = interval_tree_iter_first(&svms->objects, start, last); 2132 while (node) { 2133 struct interval_tree_node *next; 2134 unsigned long next_start; 2135 2136 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2137 node->last); 2138 2139 prange = container_of(node, struct svm_range, it_node); 2140 next = interval_tree_iter_next(node, start, last); 2141 next_start = min(node->last, last) + 1; 2142 2143 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2144 prange->mapped_to_gpu) { 2145 /* nothing to do */ 2146 } else if (node->start < start || node->last > last) { 2147 /* node intersects the update range and its attributes 2148 * will change. Clone and split it, apply updates only 2149 * to the overlapping part 2150 */ 2151 struct svm_range *old = prange; 2152 2153 prange = svm_range_clone(old); 2154 if (!prange) { 2155 r = -ENOMEM; 2156 goto out; 2157 } 2158 2159 list_add(&old->update_list, remove_list); 2160 list_add(&prange->list, insert_list); 2161 list_add(&prange->update_list, update_list); 2162 2163 if (node->start < start) { 2164 pr_debug("change old range start\n"); 2165 r = svm_range_split_head(prange, start, 2166 insert_list, remap_list); 2167 if (r) 2168 goto out; 2169 } 2170 if (node->last > last) { 2171 pr_debug("change old range last\n"); 2172 r = svm_range_split_tail(prange, last, 2173 insert_list, remap_list); 2174 if (r) 2175 goto out; 2176 } 2177 } else { 2178 /* The node is contained within start..last, 2179 * just update it 2180 */ 2181 list_add(&prange->update_list, update_list); 2182 } 2183 2184 /* insert a new node if needed */ 2185 if (node->start > start) { 2186 r = svm_range_split_new(svms, start, node->start - 1, 2187 READ_ONCE(max_svm_range_pages), 2188 &new_list, update_list); 2189 if (r) 2190 goto out; 2191 } 2192 2193 node = next; 2194 start = next_start; 2195 } 2196 2197 /* add a final range at the end if needed */ 2198 if (start <= last) 2199 r = svm_range_split_new(svms, start, last, 2200 READ_ONCE(max_svm_range_pages), 2201 &new_list, update_list); 2202 2203 out: 2204 if (r) { 2205 list_for_each_entry_safe(prange, tmp, insert_list, list) 2206 svm_range_free(prange, false); 2207 list_for_each_entry_safe(prange, tmp, &new_list, list) 2208 svm_range_free(prange, true); 2209 } else { 2210 list_splice(&new_list, insert_list); 2211 } 2212 2213 return r; 2214 } 2215 2216 static void 2217 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2218 struct svm_range *prange) 2219 { 2220 unsigned long start; 2221 unsigned long last; 2222 2223 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2224 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2225 2226 if (prange->start == start && prange->last == last) 2227 return; 2228 2229 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2230 prange->svms, prange, start, last, prange->start, 2231 prange->last); 2232 2233 if (start != 0 && last != 0) { 2234 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2235 svm_range_remove_notifier(prange); 2236 } 2237 prange->it_node.start = prange->start; 2238 prange->it_node.last = prange->last; 2239 2240 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2241 svm_range_add_notifier_locked(mm, prange); 2242 } 2243 2244 static void 2245 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2246 struct mm_struct *mm) 2247 { 2248 switch (prange->work_item.op) { 2249 case SVM_OP_NULL: 2250 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2251 svms, prange, prange->start, prange->last); 2252 break; 2253 case SVM_OP_UNMAP_RANGE: 2254 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2255 svms, prange, prange->start, prange->last); 2256 svm_range_unlink(prange); 2257 svm_range_remove_notifier(prange); 2258 svm_range_free(prange, true); 2259 break; 2260 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2261 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2262 svms, prange, prange->start, prange->last); 2263 svm_range_update_notifier_and_interval_tree(mm, prange); 2264 break; 2265 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2266 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2267 svms, prange, prange->start, prange->last); 2268 svm_range_update_notifier_and_interval_tree(mm, prange); 2269 /* TODO: implement deferred validation and mapping */ 2270 break; 2271 case SVM_OP_ADD_RANGE: 2272 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2273 prange->start, prange->last); 2274 svm_range_add_to_svms(prange); 2275 svm_range_add_notifier_locked(mm, prange); 2276 break; 2277 case SVM_OP_ADD_RANGE_AND_MAP: 2278 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2279 prange, prange->start, prange->last); 2280 svm_range_add_to_svms(prange); 2281 svm_range_add_notifier_locked(mm, prange); 2282 /* TODO: implement deferred validation and mapping */ 2283 break; 2284 default: 2285 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2286 prange->work_item.op); 2287 } 2288 } 2289 2290 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2291 { 2292 struct kfd_process_device *pdd; 2293 struct kfd_process *p; 2294 uint32_t i; 2295 2296 p = container_of(svms, struct kfd_process, svms); 2297 2298 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2299 pdd = p->pdds[i]; 2300 if (!pdd) 2301 continue; 2302 2303 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2304 2305 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2306 pdd->dev->adev->irq.retry_cam_enabled ? 2307 &pdd->dev->adev->irq.ih : 2308 &pdd->dev->adev->irq.ih1); 2309 2310 if (pdd->dev->adev->irq.retry_cam_enabled) 2311 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2312 &pdd->dev->adev->irq.ih_soft); 2313 2314 2315 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2316 } 2317 } 2318 2319 static void svm_range_deferred_list_work(struct work_struct *work) 2320 { 2321 struct svm_range_list *svms; 2322 struct svm_range *prange; 2323 struct mm_struct *mm; 2324 2325 svms = container_of(work, struct svm_range_list, deferred_list_work); 2326 pr_debug("enter svms 0x%p\n", svms); 2327 2328 spin_lock(&svms->deferred_list_lock); 2329 while (!list_empty(&svms->deferred_range_list)) { 2330 prange = list_first_entry(&svms->deferred_range_list, 2331 struct svm_range, deferred_list); 2332 spin_unlock(&svms->deferred_list_lock); 2333 2334 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2335 prange->start, prange->last, prange->work_item.op); 2336 2337 mm = prange->work_item.mm; 2338 2339 mmap_write_lock(mm); 2340 2341 /* Remove from deferred_list must be inside mmap write lock, for 2342 * two race cases: 2343 * 1. unmap_from_cpu may change work_item.op and add the range 2344 * to deferred_list again, cause use after free bug. 2345 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2346 * lock and continue because deferred_list is empty, but 2347 * deferred_list work is actually waiting for mmap lock. 2348 */ 2349 spin_lock(&svms->deferred_list_lock); 2350 list_del_init(&prange->deferred_list); 2351 spin_unlock(&svms->deferred_list_lock); 2352 2353 mutex_lock(&svms->lock); 2354 mutex_lock(&prange->migrate_mutex); 2355 while (!list_empty(&prange->child_list)) { 2356 struct svm_range *pchild; 2357 2358 pchild = list_first_entry(&prange->child_list, 2359 struct svm_range, child_list); 2360 pr_debug("child prange 0x%p op %d\n", pchild, 2361 pchild->work_item.op); 2362 list_del_init(&pchild->child_list); 2363 svm_range_handle_list_op(svms, pchild, mm); 2364 } 2365 mutex_unlock(&prange->migrate_mutex); 2366 2367 svm_range_handle_list_op(svms, prange, mm); 2368 mutex_unlock(&svms->lock); 2369 mmap_write_unlock(mm); 2370 2371 /* Pairs with mmget in svm_range_add_list_work. If dropping the 2372 * last mm refcount, schedule release work to avoid circular locking 2373 */ 2374 mmput_async(mm); 2375 2376 spin_lock(&svms->deferred_list_lock); 2377 } 2378 spin_unlock(&svms->deferred_list_lock); 2379 pr_debug("exit svms 0x%p\n", svms); 2380 } 2381 2382 void 2383 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2384 struct mm_struct *mm, enum svm_work_list_ops op) 2385 { 2386 spin_lock(&svms->deferred_list_lock); 2387 /* if prange is on the deferred list */ 2388 if (!list_empty(&prange->deferred_list)) { 2389 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2390 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2391 if (op != SVM_OP_NULL && 2392 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2393 prange->work_item.op = op; 2394 } else { 2395 /* Pairs with mmput in deferred_list_work. 2396 * If process is exiting and mm is gone, don't update mmu notifier. 2397 */ 2398 if (mmget_not_zero(mm)) { 2399 prange->work_item.mm = mm; 2400 prange->work_item.op = op; 2401 list_add_tail(&prange->deferred_list, 2402 &prange->svms->deferred_range_list); 2403 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2404 prange, prange->start, prange->last, op); 2405 } 2406 } 2407 spin_unlock(&svms->deferred_list_lock); 2408 } 2409 2410 void schedule_deferred_list_work(struct svm_range_list *svms) 2411 { 2412 spin_lock(&svms->deferred_list_lock); 2413 if (!list_empty(&svms->deferred_range_list)) 2414 schedule_work(&svms->deferred_list_work); 2415 spin_unlock(&svms->deferred_list_lock); 2416 } 2417 2418 static void 2419 svm_range_unmap_split(struct svm_range *parent, struct svm_range *prange, unsigned long start, 2420 unsigned long last) 2421 { 2422 struct svm_range *head; 2423 struct svm_range *tail; 2424 2425 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2426 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2427 prange->start, prange->last); 2428 return; 2429 } 2430 if (start > prange->last || last < prange->start) 2431 return; 2432 2433 head = tail = prange; 2434 if (start > prange->start) 2435 svm_range_split(prange, prange->start, start - 1, &tail); 2436 if (last < tail->last) 2437 svm_range_split(tail, last + 1, tail->last, &head); 2438 2439 if (head != prange && tail != prange) { 2440 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2441 svm_range_add_child(parent, tail, SVM_OP_ADD_RANGE); 2442 } else if (tail != prange) { 2443 svm_range_add_child(parent, tail, SVM_OP_UNMAP_RANGE); 2444 } else if (head != prange) { 2445 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2446 } else if (parent != prange) { 2447 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2448 } 2449 } 2450 2451 static void 2452 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2453 unsigned long start, unsigned long last) 2454 { 2455 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2456 struct svm_range_list *svms; 2457 struct svm_range *pchild; 2458 struct kfd_process *p; 2459 unsigned long s, l; 2460 bool unmap_parent; 2461 uint32_t i; 2462 2463 if (atomic_read(&prange->queue_refcount)) { 2464 int r; 2465 2466 pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n", 2467 prange->start << PAGE_SHIFT); 2468 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2469 if (r) 2470 pr_debug("failed %d to quiesce KFD queues\n", r); 2471 } 2472 2473 p = kfd_lookup_process_by_mm(mm); 2474 if (!p) 2475 return; 2476 svms = &p->svms; 2477 2478 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2479 prange, prange->start, prange->last, start, last); 2480 2481 /* calculate time stamps that are used to decide which page faults need be 2482 * dropped or handled before unmap pages from gpu vm 2483 */ 2484 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2485 struct kfd_process_device *pdd; 2486 struct amdgpu_device *adev; 2487 struct amdgpu_ih_ring *ih; 2488 uint32_t checkpoint_wptr; 2489 2490 pdd = p->pdds[i]; 2491 if (!pdd) 2492 continue; 2493 2494 adev = pdd->dev->adev; 2495 2496 /* Check and drain ih1 ring if cam not available */ 2497 if (adev->irq.ih1.ring_size) { 2498 ih = &adev->irq.ih1; 2499 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2500 if (ih->rptr != checkpoint_wptr) { 2501 svms->checkpoint_ts[i] = 2502 amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2503 continue; 2504 } 2505 } 2506 2507 /* check if dev->irq.ih_soft is not empty */ 2508 ih = &adev->irq.ih_soft; 2509 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2510 if (ih->rptr != checkpoint_wptr) 2511 svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2512 } 2513 2514 unmap_parent = start <= prange->start && last >= prange->last; 2515 2516 list_for_each_entry(pchild, &prange->child_list, child_list) { 2517 mutex_lock_nested(&pchild->lock, 1); 2518 s = max(start, pchild->start); 2519 l = min(last, pchild->last); 2520 if (l >= s) 2521 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2522 svm_range_unmap_split(prange, pchild, start, last); 2523 mutex_unlock(&pchild->lock); 2524 } 2525 s = max(start, prange->start); 2526 l = min(last, prange->last); 2527 if (l >= s) 2528 svm_range_unmap_from_gpus(prange, s, l, trigger); 2529 svm_range_unmap_split(prange, prange, start, last); 2530 2531 if (unmap_parent) 2532 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2533 else 2534 svm_range_add_list_work(svms, prange, mm, 2535 SVM_OP_UPDATE_RANGE_NOTIFIER); 2536 schedule_deferred_list_work(svms); 2537 2538 kfd_unref_process(p); 2539 } 2540 2541 /** 2542 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2543 * @mni: mmu_interval_notifier struct 2544 * @range: mmu_notifier_range struct 2545 * @cur_seq: value to pass to mmu_interval_set_seq() 2546 * 2547 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2548 * is from migration, or CPU page invalidation callback. 2549 * 2550 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2551 * work thread, and split prange if only part of prange is unmapped. 2552 * 2553 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2554 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2555 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2556 * update GPU mapping to recover. 2557 * 2558 * Context: mmap lock, notifier_invalidate_start lock are held 2559 * for invalidate event, prange lock is held if this is from migration 2560 */ 2561 static bool 2562 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2563 const struct mmu_notifier_range *range, 2564 unsigned long cur_seq) 2565 { 2566 struct svm_range *prange; 2567 unsigned long start; 2568 unsigned long last; 2569 2570 if (range->event == MMU_NOTIFY_RELEASE) 2571 return true; 2572 2573 start = mni->interval_tree.start; 2574 last = mni->interval_tree.last; 2575 start = max(start, range->start) >> PAGE_SHIFT; 2576 last = min(last, range->end - 1) >> PAGE_SHIFT; 2577 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2578 start, last, range->start >> PAGE_SHIFT, 2579 (range->end - 1) >> PAGE_SHIFT, 2580 mni->interval_tree.start >> PAGE_SHIFT, 2581 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2582 2583 prange = container_of(mni, struct svm_range, notifier); 2584 2585 svm_range_lock(prange); 2586 mmu_interval_set_seq(mni, cur_seq); 2587 2588 switch (range->event) { 2589 case MMU_NOTIFY_UNMAP: 2590 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2591 break; 2592 default: 2593 svm_range_evict(prange, mni->mm, start, last, range->event); 2594 break; 2595 } 2596 2597 svm_range_unlock(prange); 2598 2599 return true; 2600 } 2601 2602 /** 2603 * svm_range_from_addr - find svm range from fault address 2604 * @svms: svm range list header 2605 * @addr: address to search range interval tree, in pages 2606 * @parent: parent range if range is on child list 2607 * 2608 * Context: The caller must hold svms->lock 2609 * 2610 * Return: the svm_range found or NULL 2611 */ 2612 struct svm_range * 2613 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2614 struct svm_range **parent) 2615 { 2616 struct interval_tree_node *node; 2617 struct svm_range *prange; 2618 struct svm_range *pchild; 2619 2620 node = interval_tree_iter_first(&svms->objects, addr, addr); 2621 if (!node) 2622 return NULL; 2623 2624 prange = container_of(node, struct svm_range, it_node); 2625 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2626 addr, prange->start, prange->last, node->start, node->last); 2627 2628 if (addr >= prange->start && addr <= prange->last) { 2629 if (parent) 2630 *parent = prange; 2631 return prange; 2632 } 2633 list_for_each_entry(pchild, &prange->child_list, child_list) 2634 if (addr >= pchild->start && addr <= pchild->last) { 2635 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2636 addr, pchild->start, pchild->last); 2637 if (parent) 2638 *parent = prange; 2639 return pchild; 2640 } 2641 2642 return NULL; 2643 } 2644 2645 /* svm_range_best_restore_location - decide the best fault restore location 2646 * @prange: svm range structure 2647 * @adev: the GPU on which vm fault happened 2648 * 2649 * This is only called when xnack is on, to decide the best location to restore 2650 * the range mapping after GPU vm fault. Caller uses the best location to do 2651 * migration if actual loc is not best location, then update GPU page table 2652 * mapping to the best location. 2653 * 2654 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2655 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2656 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2657 * if range actual loc is cpu, best_loc is cpu 2658 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2659 * range actual loc. 2660 * Otherwise, GPU no access, best_loc is -1. 2661 * 2662 * Return: 2663 * -1 means vm fault GPU no access 2664 * 0 for CPU or GPU id 2665 */ 2666 static int32_t 2667 svm_range_best_restore_location(struct svm_range *prange, 2668 struct kfd_node *node, 2669 int32_t *gpuidx) 2670 { 2671 struct kfd_node *bo_node, *preferred_node; 2672 struct kfd_process *p; 2673 uint32_t gpuid; 2674 int r; 2675 2676 p = container_of(prange->svms, struct kfd_process, svms); 2677 2678 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2679 if (r < 0) { 2680 pr_debug("failed to get gpuid from kgd\n"); 2681 return -1; 2682 } 2683 2684 if (node->adev->apu_prefer_gtt) 2685 return 0; 2686 2687 if (prange->preferred_loc == gpuid || 2688 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2689 return prange->preferred_loc; 2690 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2691 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2692 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2693 return prange->preferred_loc; 2694 /* fall through */ 2695 } 2696 2697 if (test_bit(*gpuidx, prange->bitmap_access)) 2698 return gpuid; 2699 2700 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2701 if (!prange->actual_loc) 2702 return 0; 2703 2704 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2705 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2706 return prange->actual_loc; 2707 else 2708 return 0; 2709 } 2710 2711 return -1; 2712 } 2713 2714 static int 2715 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2716 unsigned long *start, unsigned long *last, 2717 bool *is_heap_stack) 2718 { 2719 struct vm_area_struct *vma; 2720 struct interval_tree_node *node; 2721 struct rb_node *rb_node; 2722 unsigned long start_limit, end_limit; 2723 2724 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2725 if (!vma) { 2726 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2727 return -EFAULT; 2728 } 2729 2730 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2731 2732 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2733 (unsigned long)ALIGN_DOWN(addr, 1UL << p->svms.default_granularity)); 2734 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2735 (unsigned long)ALIGN(addr + 1, 1UL << p->svms.default_granularity)); 2736 2737 /* First range that starts after the fault address */ 2738 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2739 if (node) { 2740 end_limit = min(end_limit, node->start); 2741 /* Last range that ends before the fault address */ 2742 rb_node = rb_prev(&node->rb); 2743 } else { 2744 /* Last range must end before addr because 2745 * there was no range after addr 2746 */ 2747 rb_node = rb_last(&p->svms.objects.rb_root); 2748 } 2749 if (rb_node) { 2750 node = container_of(rb_node, struct interval_tree_node, rb); 2751 if (node->last >= addr) { 2752 WARN(1, "Overlap with prev node and page fault addr\n"); 2753 return -EFAULT; 2754 } 2755 start_limit = max(start_limit, node->last + 1); 2756 } 2757 2758 *start = start_limit; 2759 *last = end_limit - 1; 2760 2761 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2762 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2763 *start, *last, *is_heap_stack); 2764 2765 return 0; 2766 } 2767 2768 static int 2769 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2770 uint64_t *bo_s, uint64_t *bo_l) 2771 { 2772 struct amdgpu_bo_va_mapping *mapping; 2773 struct interval_tree_node *node; 2774 struct amdgpu_bo *bo = NULL; 2775 unsigned long userptr; 2776 uint32_t i; 2777 int r; 2778 2779 for (i = 0; i < p->n_pdds; i++) { 2780 struct amdgpu_vm *vm; 2781 2782 if (!p->pdds[i]->drm_priv) 2783 continue; 2784 2785 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2786 r = amdgpu_bo_reserve(vm->root.bo, false); 2787 if (r) 2788 return r; 2789 2790 /* Check userptr by searching entire vm->va interval tree */ 2791 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2792 while (node) { 2793 mapping = container_of((struct rb_node *)node, 2794 struct amdgpu_bo_va_mapping, rb); 2795 bo = mapping->bo_va->base.bo; 2796 2797 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2798 start << PAGE_SHIFT, 2799 last << PAGE_SHIFT, 2800 &userptr)) { 2801 node = interval_tree_iter_next(node, 0, ~0ULL); 2802 continue; 2803 } 2804 2805 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2806 start, last); 2807 if (bo_s && bo_l) { 2808 *bo_s = userptr >> PAGE_SHIFT; 2809 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2810 } 2811 amdgpu_bo_unreserve(vm->root.bo); 2812 return -EADDRINUSE; 2813 } 2814 amdgpu_bo_unreserve(vm->root.bo); 2815 } 2816 return 0; 2817 } 2818 2819 static struct 2820 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2821 struct kfd_process *p, 2822 struct mm_struct *mm, 2823 int64_t addr) 2824 { 2825 struct svm_range *prange = NULL; 2826 unsigned long start, last; 2827 uint32_t gpuid, gpuidx; 2828 bool is_heap_stack; 2829 uint64_t bo_s = 0; 2830 uint64_t bo_l = 0; 2831 int r; 2832 2833 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2834 &is_heap_stack)) 2835 return NULL; 2836 2837 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2838 if (r != -EADDRINUSE) 2839 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2840 2841 if (r == -EADDRINUSE) { 2842 if (addr >= bo_s && addr <= bo_l) 2843 return NULL; 2844 2845 /* Create one page svm range if 2MB range overlapping */ 2846 start = addr; 2847 last = addr; 2848 } 2849 2850 prange = svm_range_new(&p->svms, start, last, true); 2851 if (!prange) { 2852 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2853 return NULL; 2854 } 2855 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2856 pr_debug("failed to get gpuid from kgd\n"); 2857 svm_range_free(prange, true); 2858 return NULL; 2859 } 2860 2861 if (is_heap_stack) 2862 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2863 2864 svm_range_add_to_svms(prange); 2865 svm_range_add_notifier_locked(mm, prange); 2866 2867 return prange; 2868 } 2869 2870 /* svm_range_skip_recover - decide if prange can be recovered 2871 * @prange: svm range structure 2872 * 2873 * GPU vm retry fault handle skip recover the range for cases: 2874 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2875 * deferred list work will drain the stale fault before free the prange. 2876 * 2. prange is on deferred list to add interval notifier after split, or 2877 * 3. prange is child range, it is split from parent prange, recover later 2878 * after interval notifier is added. 2879 * 2880 * Return: true to skip recover, false to recover 2881 */ 2882 static bool svm_range_skip_recover(struct svm_range *prange) 2883 { 2884 struct svm_range_list *svms = prange->svms; 2885 2886 spin_lock(&svms->deferred_list_lock); 2887 if (list_empty(&prange->deferred_list) && 2888 list_empty(&prange->child_list)) { 2889 spin_unlock(&svms->deferred_list_lock); 2890 return false; 2891 } 2892 spin_unlock(&svms->deferred_list_lock); 2893 2894 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2895 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2896 svms, prange, prange->start, prange->last); 2897 return true; 2898 } 2899 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2900 prange->work_item.op == SVM_OP_ADD_RANGE) { 2901 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2902 svms, prange, prange->start, prange->last); 2903 return true; 2904 } 2905 return false; 2906 } 2907 2908 static void 2909 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2910 int32_t gpuidx) 2911 { 2912 struct kfd_process_device *pdd; 2913 2914 /* fault is on different page of same range 2915 * or fault is skipped to recover later 2916 * or fault is on invalid virtual address 2917 */ 2918 if (gpuidx == MAX_GPU_INSTANCE) { 2919 uint32_t gpuid; 2920 int r; 2921 2922 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 2923 if (r < 0) 2924 return; 2925 } 2926 2927 /* fault is recovered 2928 * or fault cannot recover because GPU no access on the range 2929 */ 2930 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 2931 if (pdd) 2932 WRITE_ONCE(pdd->faults, pdd->faults + 1); 2933 } 2934 2935 static bool 2936 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 2937 { 2938 unsigned long requested = VM_READ; 2939 2940 if (write_fault) 2941 requested |= VM_WRITE; 2942 2943 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 2944 vma->vm_flags); 2945 return (vma->vm_flags & requested) == requested; 2946 } 2947 2948 int 2949 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 2950 uint32_t vmid, uint32_t node_id, 2951 uint64_t addr, uint64_t ts, bool write_fault) 2952 { 2953 unsigned long start, last, size; 2954 struct mm_struct *mm = NULL; 2955 struct svm_range_list *svms; 2956 struct svm_range *prange; 2957 struct kfd_process *p; 2958 ktime_t timestamp = ktime_get_boottime(); 2959 struct kfd_node *node; 2960 int32_t best_loc; 2961 int32_t gpuid, gpuidx = MAX_GPU_INSTANCE; 2962 bool write_locked = false; 2963 struct vm_area_struct *vma; 2964 bool migration = false; 2965 int r = 0; 2966 2967 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 2968 pr_debug("device does not support SVM\n"); 2969 return -EFAULT; 2970 } 2971 2972 p = kfd_lookup_process_by_pasid(pasid, NULL); 2973 if (!p) { 2974 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 2975 return 0; 2976 } 2977 svms = &p->svms; 2978 2979 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 2980 2981 if (atomic_read(&svms->drain_pagefaults)) { 2982 pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr); 2983 r = 0; 2984 goto out; 2985 } 2986 2987 node = kfd_node_by_irq_ids(adev, node_id, vmid); 2988 if (!node) { 2989 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 2990 vmid); 2991 r = -EFAULT; 2992 goto out; 2993 } 2994 2995 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2996 pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id); 2997 r = -EFAULT; 2998 goto out; 2999 } 3000 3001 if (!p->xnack_enabled) { 3002 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 3003 r = -EFAULT; 3004 goto out; 3005 } 3006 3007 /* p->lead_thread is available as kfd_process_wq_release flush the work 3008 * before releasing task ref. 3009 */ 3010 mm = get_task_mm(p->lead_thread); 3011 if (!mm) { 3012 pr_debug("svms 0x%p failed to get mm\n", svms); 3013 r = 0; 3014 goto out; 3015 } 3016 3017 mmap_read_lock(mm); 3018 retry_write_locked: 3019 mutex_lock(&svms->lock); 3020 3021 /* check if this page fault time stamp is before svms->checkpoint_ts */ 3022 if (svms->checkpoint_ts[gpuidx] != 0) { 3023 if (amdgpu_ih_ts_after_or_equal(ts, svms->checkpoint_ts[gpuidx])) { 3024 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 3025 r = -EAGAIN; 3026 goto out_unlock_svms; 3027 } else { 3028 /* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts 3029 * to zero to avoid following ts wrap around give wrong comparing 3030 */ 3031 svms->checkpoint_ts[gpuidx] = 0; 3032 } 3033 } 3034 3035 prange = svm_range_from_addr(svms, addr, NULL); 3036 if (!prange) { 3037 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 3038 svms, addr); 3039 if (!write_locked) { 3040 /* Need the write lock to create new range with MMU notifier. 3041 * Also flush pending deferred work to make sure the interval 3042 * tree is up to date before we add a new range 3043 */ 3044 mutex_unlock(&svms->lock); 3045 mmap_read_unlock(mm); 3046 mmap_write_lock(mm); 3047 write_locked = true; 3048 goto retry_write_locked; 3049 } 3050 prange = svm_range_create_unregistered_range(node, p, mm, addr); 3051 if (!prange) { 3052 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 3053 svms, addr); 3054 mmap_write_downgrade(mm); 3055 r = -EFAULT; 3056 goto out_unlock_svms; 3057 } 3058 } 3059 if (write_locked) 3060 mmap_write_downgrade(mm); 3061 3062 mutex_lock(&prange->migrate_mutex); 3063 3064 if (svm_range_skip_recover(prange)) { 3065 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3066 r = 0; 3067 goto out_unlock_range; 3068 } 3069 3070 /* skip duplicate vm fault on different pages of same range */ 3071 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3072 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3073 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3074 svms, prange->start, prange->last); 3075 r = 0; 3076 goto out_unlock_range; 3077 } 3078 3079 /* __do_munmap removed VMA, return success as we are handling stale 3080 * retry fault. 3081 */ 3082 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3083 if (!vma) { 3084 pr_debug("address 0x%llx VMA is removed\n", addr); 3085 r = 0; 3086 goto out_unlock_range; 3087 } 3088 3089 if (!svm_fault_allowed(vma, write_fault)) { 3090 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3091 write_fault ? "write" : "read"); 3092 r = -EPERM; 3093 goto out_unlock_range; 3094 } 3095 3096 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3097 if (best_loc == -1) { 3098 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3099 svms, prange->start, prange->last); 3100 r = -EACCES; 3101 goto out_unlock_range; 3102 } 3103 3104 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3105 svms, prange->start, prange->last, best_loc, 3106 prange->actual_loc); 3107 3108 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3109 write_fault, timestamp); 3110 3111 /* Align migration range start and size to granularity size */ 3112 size = 1UL << prange->granularity; 3113 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3114 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3115 if (prange->actual_loc != 0 || best_loc != 0) { 3116 if (best_loc) { 3117 r = svm_migrate_to_vram(prange, best_loc, start, last, 3118 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3119 if (r) { 3120 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3121 r, addr); 3122 /* Fallback to system memory if migration to 3123 * VRAM failed 3124 */ 3125 if (prange->actual_loc && prange->actual_loc != best_loc) 3126 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3127 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3128 else 3129 r = 0; 3130 } 3131 } else { 3132 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3133 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3134 } 3135 if (r) { 3136 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3137 r, svms, start, last); 3138 goto out_migrate_fail; 3139 } else { 3140 migration = true; 3141 } 3142 } 3143 3144 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3145 false, false); 3146 if (r) 3147 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3148 r, svms, start, last); 3149 3150 out_migrate_fail: 3151 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3152 migration); 3153 3154 out_unlock_range: 3155 mutex_unlock(&prange->migrate_mutex); 3156 out_unlock_svms: 3157 mutex_unlock(&svms->lock); 3158 mmap_read_unlock(mm); 3159 3160 if (r != -EAGAIN) 3161 svm_range_count_fault(node, p, gpuidx); 3162 3163 mmput(mm); 3164 out: 3165 kfd_unref_process(p); 3166 3167 if (r == -EAGAIN) { 3168 pr_debug("recover vm fault later\n"); 3169 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3170 r = 0; 3171 } 3172 return r; 3173 } 3174 3175 int 3176 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3177 { 3178 struct svm_range *prange, *pchild; 3179 uint64_t reserved_size = 0; 3180 uint64_t size; 3181 int r = 0; 3182 3183 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3184 3185 mutex_lock(&p->svms.lock); 3186 3187 list_for_each_entry(prange, &p->svms.list, list) { 3188 svm_range_lock(prange); 3189 list_for_each_entry(pchild, &prange->child_list, child_list) { 3190 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3191 if (xnack_enabled) { 3192 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3193 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3194 } else { 3195 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3196 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3197 if (r) 3198 goto out_unlock; 3199 reserved_size += size; 3200 } 3201 } 3202 3203 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3204 if (xnack_enabled) { 3205 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3206 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3207 } else { 3208 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3209 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3210 if (r) 3211 goto out_unlock; 3212 reserved_size += size; 3213 } 3214 out_unlock: 3215 svm_range_unlock(prange); 3216 if (r) 3217 break; 3218 } 3219 3220 if (r) 3221 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3222 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3223 else 3224 /* Change xnack mode must be inside svms lock, to avoid race with 3225 * svm_range_deferred_list_work unreserve memory in parallel. 3226 */ 3227 p->xnack_enabled = xnack_enabled; 3228 3229 mutex_unlock(&p->svms.lock); 3230 return r; 3231 } 3232 3233 void svm_range_list_fini(struct kfd_process *p) 3234 { 3235 struct svm_range *prange; 3236 struct svm_range *next; 3237 3238 pr_debug("process pid %d svms 0x%p\n", p->lead_thread->pid, 3239 &p->svms); 3240 3241 cancel_delayed_work_sync(&p->svms.restore_work); 3242 3243 /* Ensure list work is finished before process is destroyed */ 3244 flush_work(&p->svms.deferred_list_work); 3245 3246 /* 3247 * Ensure no retry fault comes in afterwards, as page fault handler will 3248 * not find kfd process and take mm lock to recover fault. 3249 * stop kfd page fault handing, then wait pending page faults got drained 3250 */ 3251 atomic_set(&p->svms.drain_pagefaults, 1); 3252 svm_range_drain_retry_fault(&p->svms); 3253 3254 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3255 svm_range_unlink(prange); 3256 svm_range_remove_notifier(prange); 3257 svm_range_free(prange, true); 3258 } 3259 3260 mutex_destroy(&p->svms.lock); 3261 3262 pr_debug("process pid %d svms 0x%p done\n", 3263 p->lead_thread->pid, &p->svms); 3264 } 3265 3266 int svm_range_list_init(struct kfd_process *p) 3267 { 3268 struct svm_range_list *svms = &p->svms; 3269 int i; 3270 3271 svms->objects = RB_ROOT_CACHED; 3272 mutex_init(&svms->lock); 3273 INIT_LIST_HEAD(&svms->list); 3274 atomic_set(&svms->evicted_ranges, 0); 3275 atomic_set(&svms->drain_pagefaults, 0); 3276 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3277 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3278 INIT_LIST_HEAD(&svms->deferred_range_list); 3279 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3280 spin_lock_init(&svms->deferred_list_lock); 3281 3282 for (i = 0; i < p->n_pdds; i++) 3283 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3284 bitmap_set(svms->bitmap_supported, i, 1); 3285 3286 /* Value of default granularity cannot exceed 0x1B, the 3287 * number of pages supported by a 4-level paging table 3288 */ 3289 svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B); 3290 pr_debug("Default SVM Granularity to use: %d\n", svms->default_granularity); 3291 3292 return 0; 3293 } 3294 3295 /** 3296 * svm_range_check_vm - check if virtual address range mapped already 3297 * @p: current kfd_process 3298 * @start: range start address, in pages 3299 * @last: range last address, in pages 3300 * @bo_s: mapping start address in pages if address range already mapped 3301 * @bo_l: mapping last address in pages if address range already mapped 3302 * 3303 * The purpose is to avoid virtual address ranges already allocated by 3304 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3305 * It looks for each pdd in the kfd_process. 3306 * 3307 * Context: Process context 3308 * 3309 * Return 0 - OK, if the range is not mapped. 3310 * Otherwise error code: 3311 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3312 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3313 * a signal. Release all buffer reservations and return to user-space. 3314 */ 3315 static int 3316 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3317 uint64_t *bo_s, uint64_t *bo_l) 3318 { 3319 struct amdgpu_bo_va_mapping *mapping; 3320 struct interval_tree_node *node; 3321 uint32_t i; 3322 int r; 3323 3324 for (i = 0; i < p->n_pdds; i++) { 3325 struct amdgpu_vm *vm; 3326 3327 if (!p->pdds[i]->drm_priv) 3328 continue; 3329 3330 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3331 r = amdgpu_bo_reserve(vm->root.bo, false); 3332 if (r) 3333 return r; 3334 3335 node = interval_tree_iter_first(&vm->va, start, last); 3336 if (node) { 3337 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3338 start, last); 3339 mapping = container_of((struct rb_node *)node, 3340 struct amdgpu_bo_va_mapping, rb); 3341 if (bo_s && bo_l) { 3342 *bo_s = mapping->start; 3343 *bo_l = mapping->last; 3344 } 3345 amdgpu_bo_unreserve(vm->root.bo); 3346 return -EADDRINUSE; 3347 } 3348 amdgpu_bo_unreserve(vm->root.bo); 3349 } 3350 3351 return 0; 3352 } 3353 3354 /** 3355 * svm_range_is_valid - check if virtual address range is valid 3356 * @p: current kfd_process 3357 * @start: range start address, in pages 3358 * @size: range size, in pages 3359 * 3360 * Valid virtual address range means it belongs to one or more VMAs 3361 * 3362 * Context: Process context 3363 * 3364 * Return: 3365 * 0 - OK, otherwise error code 3366 */ 3367 static int 3368 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3369 { 3370 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3371 struct vm_area_struct *vma; 3372 unsigned long end; 3373 unsigned long start_unchg = start; 3374 3375 start <<= PAGE_SHIFT; 3376 end = start + (size << PAGE_SHIFT); 3377 do { 3378 vma = vma_lookup(p->mm, start); 3379 if (!vma || (vma->vm_flags & device_vma)) 3380 return -EFAULT; 3381 start = min(end, vma->vm_end); 3382 } while (start < end); 3383 3384 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3385 NULL); 3386 } 3387 3388 /** 3389 * svm_range_best_prefetch_location - decide the best prefetch location 3390 * @prange: svm range structure 3391 * 3392 * For xnack off: 3393 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3394 * can be CPU or GPU. 3395 * 3396 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3397 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3398 * the best prefetch location is always CPU, because GPU can not have coherent 3399 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3400 * 3401 * For xnack on: 3402 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3403 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3404 * 3405 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3406 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3407 * prefetch location is always CPU. 3408 * 3409 * Context: Process context 3410 * 3411 * Return: 3412 * 0 for CPU or GPU id 3413 */ 3414 static uint32_t 3415 svm_range_best_prefetch_location(struct svm_range *prange) 3416 { 3417 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3418 uint32_t best_loc = prange->prefetch_loc; 3419 struct kfd_process_device *pdd; 3420 struct kfd_node *bo_node; 3421 struct kfd_process *p; 3422 uint32_t gpuidx; 3423 3424 p = container_of(prange->svms, struct kfd_process, svms); 3425 3426 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3427 goto out; 3428 3429 bo_node = svm_range_get_node_by_id(prange, best_loc); 3430 if (!bo_node) { 3431 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3432 best_loc = 0; 3433 goto out; 3434 } 3435 3436 if (bo_node->adev->apu_prefer_gtt) { 3437 best_loc = 0; 3438 goto out; 3439 } 3440 3441 if (p->xnack_enabled) 3442 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3443 else 3444 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3445 MAX_GPU_INSTANCE); 3446 3447 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3448 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3449 if (!pdd) { 3450 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3451 continue; 3452 } 3453 3454 if (pdd->dev->adev == bo_node->adev) 3455 continue; 3456 3457 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3458 best_loc = 0; 3459 break; 3460 } 3461 } 3462 3463 out: 3464 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3465 p->xnack_enabled, &p->svms, prange->start, prange->last, 3466 best_loc); 3467 3468 return best_loc; 3469 } 3470 3471 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3472 * @mm: current process mm_struct 3473 * @prange: svm range structure 3474 * @migrated: output, true if migration is triggered 3475 * 3476 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3477 * from ram to vram. 3478 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3479 * from vram to ram. 3480 * 3481 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3482 * and restore work: 3483 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3484 * stops all queues, schedule restore work 3485 * 2. svm_range_restore_work wait for migration is done by 3486 * a. svm_range_validate_vram takes prange->migrate_mutex 3487 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3488 * 3. restore work update mappings of GPU, resume all queues. 3489 * 3490 * Context: Process context 3491 * 3492 * Return: 3493 * 0 - OK, otherwise - error code of migration 3494 */ 3495 static int 3496 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3497 bool *migrated) 3498 { 3499 uint32_t best_loc; 3500 int r = 0; 3501 3502 *migrated = false; 3503 best_loc = svm_range_best_prefetch_location(prange); 3504 3505 /* when best_loc is a gpu node and same as prange->actual_loc 3506 * we still need do migration as prange->actual_loc !=0 does 3507 * not mean all pages in prange are vram. hmm migrate will pick 3508 * up right pages during migration. 3509 */ 3510 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3511 (best_loc == 0 && prange->actual_loc == 0)) 3512 return 0; 3513 3514 if (!best_loc) { 3515 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3516 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3517 *migrated = !r; 3518 return r; 3519 } 3520 3521 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3522 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3523 *migrated = !r; 3524 3525 return 0; 3526 } 3527 3528 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3529 { 3530 /* Dereferencing fence->svm_bo is safe here because the fence hasn't 3531 * signaled yet and we're under the protection of the fence->lock. 3532 * After the fence is signaled in svm_range_bo_release, we cannot get 3533 * here any more. 3534 * 3535 * Reference is dropped in svm_range_evict_svm_bo_worker. 3536 */ 3537 if (svm_bo_ref_unless_zero(fence->svm_bo)) { 3538 WRITE_ONCE(fence->svm_bo->evicting, 1); 3539 schedule_work(&fence->svm_bo->eviction_work); 3540 } 3541 3542 return 0; 3543 } 3544 3545 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3546 { 3547 struct svm_range_bo *svm_bo; 3548 struct mm_struct *mm; 3549 int r = 0; 3550 3551 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3552 3553 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3554 mm = svm_bo->eviction_fence->mm; 3555 } else { 3556 svm_range_bo_unref(svm_bo); 3557 return; 3558 } 3559 3560 mmap_read_lock(mm); 3561 spin_lock(&svm_bo->list_lock); 3562 while (!list_empty(&svm_bo->range_list) && !r) { 3563 struct svm_range *prange = 3564 list_first_entry(&svm_bo->range_list, 3565 struct svm_range, svm_bo_list); 3566 int retries = 3; 3567 3568 list_del_init(&prange->svm_bo_list); 3569 spin_unlock(&svm_bo->list_lock); 3570 3571 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3572 prange->start, prange->last); 3573 3574 mutex_lock(&prange->migrate_mutex); 3575 do { 3576 /* migrate all vram pages in this prange to sys ram 3577 * after that prange->actual_loc should be zero 3578 */ 3579 r = svm_migrate_vram_to_ram(prange, mm, 3580 prange->start, prange->last, 3581 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3582 } while (!r && prange->actual_loc && --retries); 3583 3584 if (!r && prange->actual_loc) 3585 pr_info_once("Migration failed during eviction"); 3586 3587 if (!prange->actual_loc) { 3588 mutex_lock(&prange->lock); 3589 prange->svm_bo = NULL; 3590 mutex_unlock(&prange->lock); 3591 } 3592 mutex_unlock(&prange->migrate_mutex); 3593 3594 spin_lock(&svm_bo->list_lock); 3595 } 3596 spin_unlock(&svm_bo->list_lock); 3597 mmap_read_unlock(mm); 3598 mmput(mm); 3599 3600 dma_fence_signal(&svm_bo->eviction_fence->base); 3601 3602 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3603 * has been called in svm_migrate_vram_to_ram 3604 */ 3605 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3606 svm_range_bo_unref(svm_bo); 3607 } 3608 3609 static int 3610 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3611 uint64_t start, uint64_t size, uint32_t nattr, 3612 struct kfd_ioctl_svm_attribute *attrs) 3613 { 3614 struct amdkfd_process_info *process_info = p->kgd_process_info; 3615 struct list_head update_list; 3616 struct list_head insert_list; 3617 struct list_head remove_list; 3618 struct list_head remap_list; 3619 struct svm_range_list *svms; 3620 struct svm_range *prange; 3621 struct svm_range *next; 3622 bool update_mapping = false; 3623 bool flush_tlb; 3624 int r, ret = 0; 3625 3626 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3627 p->lead_thread->pid, &p->svms, start, start + size - 1, size); 3628 3629 r = svm_range_check_attr(p, nattr, attrs); 3630 if (r) 3631 return r; 3632 3633 svms = &p->svms; 3634 3635 mutex_lock(&process_info->lock); 3636 3637 svm_range_list_lock_and_flush_work(svms, mm); 3638 3639 r = svm_range_is_valid(p, start, size); 3640 if (r) { 3641 pr_debug("invalid range r=%d\n", r); 3642 mmap_write_unlock(mm); 3643 goto out; 3644 } 3645 3646 mutex_lock(&svms->lock); 3647 3648 /* Add new range and split existing ranges as needed */ 3649 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3650 &insert_list, &remove_list, &remap_list); 3651 if (r) { 3652 mutex_unlock(&svms->lock); 3653 mmap_write_unlock(mm); 3654 goto out; 3655 } 3656 /* Apply changes as a transaction */ 3657 list_for_each_entry_safe(prange, next, &insert_list, list) { 3658 svm_range_add_to_svms(prange); 3659 svm_range_add_notifier_locked(mm, prange); 3660 } 3661 list_for_each_entry(prange, &update_list, update_list) { 3662 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3663 /* TODO: unmap ranges from GPU that lost access */ 3664 } 3665 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3666 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3667 prange->svms, prange, prange->start, 3668 prange->last); 3669 svm_range_unlink(prange); 3670 svm_range_remove_notifier(prange); 3671 svm_range_free(prange, false); 3672 } 3673 3674 mmap_write_downgrade(mm); 3675 /* Trigger migrations and revalidate and map to GPUs as needed. If 3676 * this fails we may be left with partially completed actions. There 3677 * is no clean way of rolling back to the previous state in such a 3678 * case because the rollback wouldn't be guaranteed to work either. 3679 */ 3680 list_for_each_entry(prange, &update_list, update_list) { 3681 bool migrated; 3682 3683 mutex_lock(&prange->migrate_mutex); 3684 3685 r = svm_range_trigger_migration(mm, prange, &migrated); 3686 if (r) 3687 goto out_unlock_range; 3688 3689 if (migrated && (!p->xnack_enabled || 3690 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3691 prange->mapped_to_gpu) { 3692 pr_debug("restore_work will update mappings of GPUs\n"); 3693 mutex_unlock(&prange->migrate_mutex); 3694 continue; 3695 } 3696 3697 if (!migrated && !update_mapping) { 3698 mutex_unlock(&prange->migrate_mutex); 3699 continue; 3700 } 3701 3702 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3703 3704 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3705 MAX_GPU_INSTANCE, true, true, flush_tlb); 3706 if (r) 3707 pr_debug("failed %d to map svm range\n", r); 3708 3709 out_unlock_range: 3710 mutex_unlock(&prange->migrate_mutex); 3711 if (r) 3712 ret = r; 3713 } 3714 3715 list_for_each_entry(prange, &remap_list, update_list) { 3716 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3717 prange, prange->start, prange->last); 3718 mutex_lock(&prange->migrate_mutex); 3719 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3720 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu); 3721 if (r) 3722 pr_debug("failed %d on remap svm range\n", r); 3723 mutex_unlock(&prange->migrate_mutex); 3724 if (r) 3725 ret = r; 3726 } 3727 3728 dynamic_svm_range_dump(svms); 3729 3730 mutex_unlock(&svms->lock); 3731 mmap_read_unlock(mm); 3732 out: 3733 mutex_unlock(&process_info->lock); 3734 3735 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] done, r=%d\n", 3736 p->lead_thread->pid, &p->svms, start, start + size - 1, r); 3737 3738 return ret ? ret : r; 3739 } 3740 3741 static int 3742 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3743 uint64_t start, uint64_t size, uint32_t nattr, 3744 struct kfd_ioctl_svm_attribute *attrs) 3745 { 3746 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3747 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3748 bool get_preferred_loc = false; 3749 bool get_prefetch_loc = false; 3750 bool get_granularity = false; 3751 bool get_accessible = false; 3752 bool get_flags = false; 3753 uint64_t last = start + size - 1UL; 3754 uint8_t granularity = 0xff; 3755 struct interval_tree_node *node; 3756 struct svm_range_list *svms; 3757 struct svm_range *prange; 3758 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3759 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3760 uint32_t flags_and = 0xffffffff; 3761 uint32_t flags_or = 0; 3762 int gpuidx; 3763 uint32_t i; 3764 int r = 0; 3765 3766 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3767 start + size - 1, nattr); 3768 3769 /* Flush pending deferred work to avoid racing with deferred actions from 3770 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3771 * can still race with get_attr because we don't hold the mmap lock. But that 3772 * would be a race condition in the application anyway, and undefined 3773 * behaviour is acceptable in that case. 3774 */ 3775 flush_work(&p->svms.deferred_list_work); 3776 3777 mmap_read_lock(mm); 3778 r = svm_range_is_valid(p, start, size); 3779 mmap_read_unlock(mm); 3780 if (r) { 3781 pr_debug("invalid range r=%d\n", r); 3782 return r; 3783 } 3784 3785 for (i = 0; i < nattr; i++) { 3786 switch (attrs[i].type) { 3787 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3788 get_preferred_loc = true; 3789 break; 3790 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3791 get_prefetch_loc = true; 3792 break; 3793 case KFD_IOCTL_SVM_ATTR_ACCESS: 3794 get_accessible = true; 3795 break; 3796 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3797 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3798 get_flags = true; 3799 break; 3800 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3801 get_granularity = true; 3802 break; 3803 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3804 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3805 fallthrough; 3806 default: 3807 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3808 return -EINVAL; 3809 } 3810 } 3811 3812 svms = &p->svms; 3813 3814 mutex_lock(&svms->lock); 3815 3816 node = interval_tree_iter_first(&svms->objects, start, last); 3817 if (!node) { 3818 pr_debug("range attrs not found return default values\n"); 3819 svm_range_set_default_attributes(svms, &location, &prefetch_loc, 3820 &granularity, &flags_and); 3821 flags_or = flags_and; 3822 if (p->xnack_enabled) 3823 bitmap_copy(bitmap_access, svms->bitmap_supported, 3824 MAX_GPU_INSTANCE); 3825 else 3826 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3827 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3828 goto fill_values; 3829 } 3830 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3831 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3832 3833 while (node) { 3834 struct interval_tree_node *next; 3835 3836 prange = container_of(node, struct svm_range, it_node); 3837 next = interval_tree_iter_next(node, start, last); 3838 3839 if (get_preferred_loc) { 3840 if (prange->preferred_loc == 3841 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3842 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3843 location != prange->preferred_loc)) { 3844 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3845 get_preferred_loc = false; 3846 } else { 3847 location = prange->preferred_loc; 3848 } 3849 } 3850 if (get_prefetch_loc) { 3851 if (prange->prefetch_loc == 3852 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3853 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3854 prefetch_loc != prange->prefetch_loc)) { 3855 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3856 get_prefetch_loc = false; 3857 } else { 3858 prefetch_loc = prange->prefetch_loc; 3859 } 3860 } 3861 if (get_accessible) { 3862 bitmap_and(bitmap_access, bitmap_access, 3863 prange->bitmap_access, MAX_GPU_INSTANCE); 3864 bitmap_and(bitmap_aip, bitmap_aip, 3865 prange->bitmap_aip, MAX_GPU_INSTANCE); 3866 } 3867 if (get_flags) { 3868 flags_and &= prange->flags; 3869 flags_or |= prange->flags; 3870 } 3871 3872 if (get_granularity && prange->granularity < granularity) 3873 granularity = prange->granularity; 3874 3875 node = next; 3876 } 3877 fill_values: 3878 mutex_unlock(&svms->lock); 3879 3880 for (i = 0; i < nattr; i++) { 3881 switch (attrs[i].type) { 3882 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3883 attrs[i].value = location; 3884 break; 3885 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3886 attrs[i].value = prefetch_loc; 3887 break; 3888 case KFD_IOCTL_SVM_ATTR_ACCESS: 3889 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3890 attrs[i].value); 3891 if (gpuidx < 0) { 3892 pr_debug("invalid gpuid %x\n", attrs[i].value); 3893 return -EINVAL; 3894 } 3895 if (test_bit(gpuidx, bitmap_access)) 3896 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3897 else if (test_bit(gpuidx, bitmap_aip)) 3898 attrs[i].type = 3899 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3900 else 3901 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3902 break; 3903 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3904 attrs[i].value = flags_and; 3905 break; 3906 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3907 attrs[i].value = ~flags_or; 3908 break; 3909 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3910 attrs[i].value = (uint32_t)granularity; 3911 break; 3912 } 3913 } 3914 3915 return 0; 3916 } 3917 3918 int kfd_criu_resume_svm(struct kfd_process *p) 3919 { 3920 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 3921 int nattr_common = 4, nattr_accessibility = 1; 3922 struct criu_svm_metadata *criu_svm_md = NULL; 3923 struct svm_range_list *svms = &p->svms; 3924 struct criu_svm_metadata *next = NULL; 3925 uint32_t set_flags = 0xffffffff; 3926 int i, j, num_attrs, ret = 0; 3927 uint64_t set_attr_size; 3928 struct mm_struct *mm; 3929 3930 if (list_empty(&svms->criu_svm_metadata_list)) { 3931 pr_debug("No SVM data from CRIU restore stage 2\n"); 3932 return ret; 3933 } 3934 3935 mm = get_task_mm(p->lead_thread); 3936 if (!mm) { 3937 pr_err("failed to get mm for the target process\n"); 3938 return -ESRCH; 3939 } 3940 3941 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 3942 3943 i = j = 0; 3944 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 3945 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 3946 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 3947 3948 for (j = 0; j < num_attrs; j++) { 3949 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 3950 i, j, criu_svm_md->data.attrs[j].type, 3951 i, j, criu_svm_md->data.attrs[j].value); 3952 switch (criu_svm_md->data.attrs[j].type) { 3953 /* During Checkpoint operation, the query for 3954 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 3955 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 3956 * not used by the range which was checkpointed. Care 3957 * must be taken to not restore with an invalid value 3958 * otherwise the gpuidx value will be invalid and 3959 * set_attr would eventually fail so just replace those 3960 * with another dummy attribute such as 3961 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 3962 */ 3963 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3964 if (criu_svm_md->data.attrs[j].value == 3965 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 3966 criu_svm_md->data.attrs[j].type = 3967 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 3968 criu_svm_md->data.attrs[j].value = 0; 3969 } 3970 break; 3971 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3972 set_flags = criu_svm_md->data.attrs[j].value; 3973 break; 3974 default: 3975 break; 3976 } 3977 } 3978 3979 /* CLR_FLAGS is not available via get_attr during checkpoint but 3980 * it needs to be inserted before restoring the ranges so 3981 * allocate extra space for it before calling set_attr 3982 */ 3983 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 3984 (num_attrs + 1); 3985 set_attr_new = krealloc(set_attr, set_attr_size, 3986 GFP_KERNEL); 3987 if (!set_attr_new) { 3988 ret = -ENOMEM; 3989 goto exit; 3990 } 3991 set_attr = set_attr_new; 3992 3993 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 3994 sizeof(struct kfd_ioctl_svm_attribute)); 3995 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 3996 set_attr[num_attrs].value = ~set_flags; 3997 3998 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 3999 criu_svm_md->data.size, num_attrs + 1, 4000 set_attr); 4001 if (ret) { 4002 pr_err("CRIU: failed to set range attributes\n"); 4003 goto exit; 4004 } 4005 4006 i++; 4007 } 4008 exit: 4009 kfree(set_attr); 4010 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 4011 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 4012 criu_svm_md->data.start_addr); 4013 kfree(criu_svm_md); 4014 } 4015 4016 mmput(mm); 4017 return ret; 4018 4019 } 4020 4021 int kfd_criu_restore_svm(struct kfd_process *p, 4022 uint8_t __user *user_priv_ptr, 4023 uint64_t *priv_data_offset, 4024 uint64_t max_priv_data_size) 4025 { 4026 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 4027 int nattr_common = 4, nattr_accessibility = 1; 4028 struct criu_svm_metadata *criu_svm_md = NULL; 4029 struct svm_range_list *svms = &p->svms; 4030 uint32_t num_devices; 4031 int ret = 0; 4032 4033 num_devices = p->n_pdds; 4034 /* Handle one SVM range object at a time, also the number of gpus are 4035 * assumed to be same on the restore node, checking must be done while 4036 * evaluating the topology earlier 4037 */ 4038 4039 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 4040 (nattr_common + nattr_accessibility * num_devices); 4041 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 4042 4043 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4044 svm_attrs_size; 4045 4046 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 4047 if (!criu_svm_md) { 4048 pr_err("failed to allocate memory to store svm metadata\n"); 4049 return -ENOMEM; 4050 } 4051 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 4052 ret = -EINVAL; 4053 goto exit; 4054 } 4055 4056 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 4057 svm_priv_data_size); 4058 if (ret) { 4059 ret = -EFAULT; 4060 goto exit; 4061 } 4062 *priv_data_offset += svm_priv_data_size; 4063 4064 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 4065 4066 return 0; 4067 4068 4069 exit: 4070 kfree(criu_svm_md); 4071 return ret; 4072 } 4073 4074 void svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 4075 uint64_t *svm_priv_data_size) 4076 { 4077 uint64_t total_size, accessibility_size, common_attr_size; 4078 int nattr_common = 4, nattr_accessibility = 1; 4079 int num_devices = p->n_pdds; 4080 struct svm_range_list *svms; 4081 struct svm_range *prange; 4082 uint32_t count = 0; 4083 4084 *svm_priv_data_size = 0; 4085 4086 svms = &p->svms; 4087 4088 mutex_lock(&svms->lock); 4089 list_for_each_entry(prange, &svms->list, list) { 4090 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4091 prange, prange->start, prange->npages, 4092 prange->start + prange->npages - 1); 4093 count++; 4094 } 4095 mutex_unlock(&svms->lock); 4096 4097 *num_svm_ranges = count; 4098 /* Only the accessbility attributes need to be queried for all the gpus 4099 * individually, remaining ones are spanned across the entire process 4100 * regardless of the various gpu nodes. Of the remaining attributes, 4101 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4102 * 4103 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4104 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4105 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4106 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4107 * 4108 * ** ACCESSBILITY ATTRIBUTES ** 4109 * (Considered as one, type is altered during query, value is gpuid) 4110 * KFD_IOCTL_SVM_ATTR_ACCESS 4111 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4112 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4113 */ 4114 if (*num_svm_ranges > 0) { 4115 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4116 nattr_common; 4117 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4118 nattr_accessibility * num_devices; 4119 4120 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4121 common_attr_size + accessibility_size; 4122 4123 *svm_priv_data_size = *num_svm_ranges * total_size; 4124 } 4125 4126 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4127 *svm_priv_data_size); 4128 } 4129 4130 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4131 uint8_t __user *user_priv_data, 4132 uint64_t *priv_data_offset) 4133 { 4134 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4135 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4136 uint64_t svm_priv_data_size, query_attr_size = 0; 4137 int index, nattr_common = 4, ret = 0; 4138 struct svm_range_list *svms; 4139 int num_devices = p->n_pdds; 4140 struct svm_range *prange; 4141 struct mm_struct *mm; 4142 4143 svms = &p->svms; 4144 4145 mm = get_task_mm(p->lead_thread); 4146 if (!mm) { 4147 pr_err("failed to get mm for the target process\n"); 4148 return -ESRCH; 4149 } 4150 4151 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4152 (nattr_common + num_devices); 4153 4154 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4155 if (!query_attr) { 4156 ret = -ENOMEM; 4157 goto exit; 4158 } 4159 4160 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4161 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4162 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4163 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4164 4165 for (index = 0; index < num_devices; index++) { 4166 struct kfd_process_device *pdd = p->pdds[index]; 4167 4168 query_attr[index + nattr_common].type = 4169 KFD_IOCTL_SVM_ATTR_ACCESS; 4170 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4171 } 4172 4173 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4174 4175 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4176 if (!svm_priv) { 4177 ret = -ENOMEM; 4178 goto exit_query; 4179 } 4180 4181 index = 0; 4182 list_for_each_entry(prange, &svms->list, list) { 4183 4184 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4185 svm_priv->start_addr = prange->start; 4186 svm_priv->size = prange->npages; 4187 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4188 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4189 prange, prange->start, prange->npages, 4190 prange->start + prange->npages - 1, 4191 prange->npages * PAGE_SIZE); 4192 4193 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4194 svm_priv->size, 4195 (nattr_common + num_devices), 4196 svm_priv->attrs); 4197 if (ret) { 4198 pr_err("CRIU: failed to obtain range attributes\n"); 4199 goto exit_priv; 4200 } 4201 4202 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4203 svm_priv_data_size)) { 4204 pr_err("Failed to copy svm priv to user\n"); 4205 ret = -EFAULT; 4206 goto exit_priv; 4207 } 4208 4209 *priv_data_offset += svm_priv_data_size; 4210 4211 } 4212 4213 4214 exit_priv: 4215 kfree(svm_priv); 4216 exit_query: 4217 kfree(query_attr); 4218 exit: 4219 mmput(mm); 4220 return ret; 4221 } 4222 4223 int 4224 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4225 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4226 { 4227 struct mm_struct *mm = current->mm; 4228 int r; 4229 4230 start >>= PAGE_SHIFT; 4231 size >>= PAGE_SHIFT; 4232 4233 switch (op) { 4234 case KFD_IOCTL_SVM_OP_SET_ATTR: 4235 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4236 break; 4237 case KFD_IOCTL_SVM_OP_GET_ATTR: 4238 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4239 break; 4240 default: 4241 r = EINVAL; 4242 break; 4243 } 4244 4245 return r; 4246 } 4247