1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Loongson GPIO Support 4 * 5 * Copyright (C) 2022-2023 Loongson Technology Corporation Limited 6 */ 7 8 #include <linux/kernel.h> 9 #include <linux/init.h> 10 #include <linux/module.h> 11 #include <linux/spinlock.h> 12 #include <linux/err.h> 13 #include <linux/gpio/driver.h> 14 #include <linux/gpio/generic.h> 15 #include <linux/platform_device.h> 16 #include <linux/bitops.h> 17 #include <asm/types.h> 18 19 enum loongson_gpio_mode { 20 BIT_CTRL_MODE, 21 BYTE_CTRL_MODE, 22 }; 23 24 struct loongson_gpio_chip_data { 25 const char *label; 26 enum loongson_gpio_mode mode; 27 unsigned int conf_offset; 28 unsigned int out_offset; 29 unsigned int in_offset; 30 unsigned int inten_offset; 31 }; 32 33 struct loongson_gpio_chip { 34 struct gpio_generic_chip chip; 35 spinlock_t lock; 36 void __iomem *reg_base; 37 const struct loongson_gpio_chip_data *chip_data; 38 }; 39 40 static inline struct loongson_gpio_chip *to_loongson_gpio_chip(struct gpio_chip *chip) 41 { 42 return container_of(to_gpio_generic_chip(chip), 43 struct loongson_gpio_chip, chip); 44 } 45 46 static inline void loongson_commit_direction(struct loongson_gpio_chip *lgpio, unsigned int pin, 47 int input) 48 { 49 u8 bval = input ? 1 : 0; 50 51 writeb(bval, lgpio->reg_base + lgpio->chip_data->conf_offset + pin); 52 } 53 54 static void loongson_commit_level(struct loongson_gpio_chip *lgpio, unsigned int pin, int high) 55 { 56 u8 bval = high ? 1 : 0; 57 58 writeb(bval, lgpio->reg_base + lgpio->chip_data->out_offset + pin); 59 } 60 61 static int loongson_gpio_direction_input(struct gpio_chip *chip, unsigned int pin) 62 { 63 unsigned long flags; 64 struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip); 65 66 spin_lock_irqsave(&lgpio->lock, flags); 67 loongson_commit_direction(lgpio, pin, 1); 68 spin_unlock_irqrestore(&lgpio->lock, flags); 69 70 return 0; 71 } 72 73 static int loongson_gpio_direction_output(struct gpio_chip *chip, unsigned int pin, int value) 74 { 75 unsigned long flags; 76 struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip); 77 78 spin_lock_irqsave(&lgpio->lock, flags); 79 loongson_commit_level(lgpio, pin, value); 80 loongson_commit_direction(lgpio, pin, 0); 81 spin_unlock_irqrestore(&lgpio->lock, flags); 82 83 return 0; 84 } 85 86 static int loongson_gpio_get(struct gpio_chip *chip, unsigned int pin) 87 { 88 u8 bval; 89 int val; 90 struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip); 91 92 bval = readb(lgpio->reg_base + lgpio->chip_data->in_offset + pin); 93 val = bval & 1; 94 95 return val; 96 } 97 98 static int loongson_gpio_get_direction(struct gpio_chip *chip, unsigned int pin) 99 { 100 u8 bval; 101 struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip); 102 103 bval = readb(lgpio->reg_base + lgpio->chip_data->conf_offset + pin); 104 if (bval & 1) 105 return GPIO_LINE_DIRECTION_IN; 106 107 return GPIO_LINE_DIRECTION_OUT; 108 } 109 110 static int loongson_gpio_set(struct gpio_chip *chip, unsigned int pin, int value) 111 { 112 unsigned long flags; 113 struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip); 114 115 spin_lock_irqsave(&lgpio->lock, flags); 116 loongson_commit_level(lgpio, pin, value); 117 spin_unlock_irqrestore(&lgpio->lock, flags); 118 119 return 0; 120 } 121 122 static int loongson_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) 123 { 124 unsigned int u; 125 struct platform_device *pdev = to_platform_device(chip->parent); 126 struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip); 127 128 if (lgpio->chip_data->mode == BIT_CTRL_MODE) { 129 /* Get the register index from offset then multiply by bytes per register */ 130 u = readl(lgpio->reg_base + lgpio->chip_data->inten_offset + (offset / 32) * 4); 131 u |= BIT(offset % 32); 132 writel(u, lgpio->reg_base + lgpio->chip_data->inten_offset + (offset / 32) * 4); 133 } else { 134 writeb(1, lgpio->reg_base + lgpio->chip_data->inten_offset + offset); 135 } 136 137 return platform_get_irq(pdev, offset); 138 } 139 140 static int loongson_gpio_init(struct device *dev, struct loongson_gpio_chip *lgpio, 141 void __iomem *reg_base) 142 { 143 struct gpio_generic_chip_config config; 144 int ret; 145 146 lgpio->reg_base = reg_base; 147 if (lgpio->chip_data->mode == BIT_CTRL_MODE) { 148 config = (typeof(config)){ 149 .dev = dev, 150 .sz = 8, 151 .dat = lgpio->reg_base + lgpio->chip_data->in_offset, 152 .set = lgpio->reg_base + lgpio->chip_data->out_offset, 153 .dirin = lgpio->reg_base + lgpio->chip_data->conf_offset, 154 }; 155 156 ret = gpio_generic_chip_init(&lgpio->chip, &config); 157 if (ret) { 158 dev_err(dev, "unable to init generic GPIO\n"); 159 return ret; 160 } 161 } else { 162 lgpio->chip.gc.direction_input = loongson_gpio_direction_input; 163 lgpio->chip.gc.get = loongson_gpio_get; 164 lgpio->chip.gc.get_direction = loongson_gpio_get_direction; 165 lgpio->chip.gc.direction_output = loongson_gpio_direction_output; 166 lgpio->chip.gc.set = loongson_gpio_set; 167 lgpio->chip.gc.parent = dev; 168 spin_lock_init(&lgpio->lock); 169 } 170 171 lgpio->chip.gc.label = lgpio->chip_data->label; 172 lgpio->chip.gc.can_sleep = false; 173 if (lgpio->chip_data->inten_offset) 174 lgpio->chip.gc.to_irq = loongson_gpio_to_irq; 175 176 return devm_gpiochip_add_data(dev, &lgpio->chip.gc, lgpio); 177 } 178 179 static int loongson_gpio_probe(struct platform_device *pdev) 180 { 181 void __iomem *reg_base; 182 struct loongson_gpio_chip *lgpio; 183 struct device *dev = &pdev->dev; 184 185 lgpio = devm_kzalloc(dev, sizeof(*lgpio), GFP_KERNEL); 186 if (!lgpio) 187 return -ENOMEM; 188 189 lgpio->chip_data = device_get_match_data(dev); 190 191 reg_base = devm_platform_ioremap_resource(pdev, 0); 192 if (IS_ERR(reg_base)) 193 return PTR_ERR(reg_base); 194 195 return loongson_gpio_init(dev, lgpio, reg_base); 196 } 197 198 static const struct loongson_gpio_chip_data loongson_gpio_ls2k_data = { 199 .label = "ls2k_gpio", 200 .mode = BIT_CTRL_MODE, 201 .conf_offset = 0x0, 202 .in_offset = 0x20, 203 .out_offset = 0x10, 204 .inten_offset = 0x30, 205 }; 206 207 static const struct loongson_gpio_chip_data loongson_gpio_ls2k0500_data0 = { 208 .label = "ls2k0500_gpio", 209 .mode = BIT_CTRL_MODE, 210 .conf_offset = 0x0, 211 .in_offset = 0x8, 212 .out_offset = 0x10, 213 .inten_offset = 0xb0, 214 }; 215 216 static const struct loongson_gpio_chip_data loongson_gpio_ls2k0500_data1 = { 217 .label = "ls2k0500_gpio", 218 .mode = BIT_CTRL_MODE, 219 .conf_offset = 0x0, 220 .in_offset = 0x8, 221 .out_offset = 0x10, 222 .inten_offset = 0x98, 223 }; 224 225 static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data0 = { 226 .label = "ls2k2000_gpio", 227 .mode = BIT_CTRL_MODE, 228 .conf_offset = 0x0, 229 .in_offset = 0xc, 230 .out_offset = 0x8, 231 .inten_offset = 0x14, 232 }; 233 234 static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data1 = { 235 .label = "ls2k2000_gpio", 236 .mode = BIT_CTRL_MODE, 237 .conf_offset = 0x0, 238 .in_offset = 0x20, 239 .out_offset = 0x10, 240 .inten_offset = 0x30, 241 }; 242 243 static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data2 = { 244 .label = "ls2k2000_gpio", 245 .mode = BIT_CTRL_MODE, 246 .conf_offset = 0x4, 247 .in_offset = 0x8, 248 .out_offset = 0x0, 249 }; 250 251 static const struct loongson_gpio_chip_data loongson_gpio_ls3a5000_data = { 252 .label = "ls3a5000_gpio", 253 .mode = BIT_CTRL_MODE, 254 .conf_offset = 0x0, 255 .in_offset = 0xc, 256 .out_offset = 0x8, 257 .inten_offset = 0x14, 258 }; 259 260 static const struct loongson_gpio_chip_data loongson_gpio_ls7a_data = { 261 .label = "ls7a_gpio", 262 .mode = BYTE_CTRL_MODE, 263 .conf_offset = 0x800, 264 .in_offset = 0xa00, 265 .out_offset = 0x900, 266 .inten_offset = 0xb00, 267 }; 268 269 /* LS7A2000 chipset GPIO */ 270 static const struct loongson_gpio_chip_data loongson_gpio_ls7a2000_data0 = { 271 .label = "ls7a2000_gpio", 272 .mode = BYTE_CTRL_MODE, 273 .conf_offset = 0x800, 274 .in_offset = 0xa00, 275 .out_offset = 0x900, 276 .inten_offset = 0xb00, 277 }; 278 279 /* LS7A2000 ACPI GPIO */ 280 static const struct loongson_gpio_chip_data loongson_gpio_ls7a2000_data1 = { 281 .label = "ls7a2000_gpio", 282 .mode = BIT_CTRL_MODE, 283 .conf_offset = 0x4, 284 .in_offset = 0x8, 285 .out_offset = 0x0, 286 }; 287 288 /* Loongson-3A6000 node GPIO */ 289 static const struct loongson_gpio_chip_data loongson_gpio_ls3a6000_data = { 290 .label = "ls3a6000_gpio", 291 .mode = BIT_CTRL_MODE, 292 .conf_offset = 0x0, 293 .in_offset = 0xc, 294 .out_offset = 0x8, 295 .inten_offset = 0x14, 296 }; 297 298 static const struct of_device_id loongson_gpio_of_match[] = { 299 { 300 .compatible = "loongson,ls2k-gpio", 301 .data = &loongson_gpio_ls2k_data, 302 }, 303 { 304 .compatible = "loongson,ls2k0500-gpio0", 305 .data = &loongson_gpio_ls2k0500_data0, 306 }, 307 { 308 .compatible = "loongson,ls2k0500-gpio1", 309 .data = &loongson_gpio_ls2k0500_data1, 310 }, 311 { 312 .compatible = "loongson,ls2k2000-gpio0", 313 .data = &loongson_gpio_ls2k2000_data0, 314 }, 315 { 316 .compatible = "loongson,ls2k2000-gpio1", 317 .data = &loongson_gpio_ls2k2000_data1, 318 }, 319 { 320 .compatible = "loongson,ls2k2000-gpio2", 321 .data = &loongson_gpio_ls2k2000_data2, 322 }, 323 { 324 .compatible = "loongson,ls3a5000-gpio", 325 .data = &loongson_gpio_ls3a5000_data, 326 }, 327 { 328 .compatible = "loongson,ls7a-gpio", 329 .data = &loongson_gpio_ls7a_data, 330 }, 331 { 332 .compatible = "loongson,ls7a2000-gpio1", 333 .data = &loongson_gpio_ls7a2000_data0, 334 }, 335 { 336 .compatible = "loongson,ls7a2000-gpio2", 337 .data = &loongson_gpio_ls7a2000_data1, 338 }, 339 { 340 .compatible = "loongson,ls3a6000-gpio", 341 .data = &loongson_gpio_ls3a6000_data, 342 }, 343 {} 344 }; 345 MODULE_DEVICE_TABLE(of, loongson_gpio_of_match); 346 347 static const struct acpi_device_id loongson_gpio_acpi_match[] = { 348 { 349 .id = "LOON0002", 350 .driver_data = (kernel_ulong_t)&loongson_gpio_ls7a_data, 351 }, 352 { 353 .id = "LOON0007", 354 .driver_data = (kernel_ulong_t)&loongson_gpio_ls3a5000_data, 355 }, 356 { 357 .id = "LOON000A", 358 .driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data0, 359 }, 360 { 361 .id = "LOON000B", 362 .driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data1, 363 }, 364 { 365 .id = "LOON000C", 366 .driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data2, 367 }, 368 { 369 .id = "LOON000D", 370 .driver_data = (kernel_ulong_t)&loongson_gpio_ls7a2000_data0, 371 }, 372 { 373 .id = "LOON000E", 374 .driver_data = (kernel_ulong_t)&loongson_gpio_ls7a2000_data1, 375 }, 376 { 377 .id = "LOON000F", 378 .driver_data = (kernel_ulong_t)&loongson_gpio_ls3a6000_data, 379 }, 380 {} 381 }; 382 MODULE_DEVICE_TABLE(acpi, loongson_gpio_acpi_match); 383 384 static struct platform_driver loongson_gpio_driver = { 385 .driver = { 386 .name = "loongson-gpio", 387 .of_match_table = loongson_gpio_of_match, 388 .acpi_match_table = loongson_gpio_acpi_match, 389 }, 390 .probe = loongson_gpio_probe, 391 }; 392 393 static int __init loongson_gpio_setup(void) 394 { 395 return platform_driver_register(&loongson_gpio_driver); 396 } 397 postcore_initcall(loongson_gpio_setup); 398 399 MODULE_DESCRIPTION("Loongson gpio driver"); 400 MODULE_LICENSE("GPL"); 401